Merge pull request #760 from mjkillough/pca9685

Fix full on/off in pca9685.

.gitignore

@@ -10,3 +10,4 @@ firmware
 local.mk
 local.h
 screenlog.*
+*.swp

.gitmodules

@@ -1,9 +1,48 @@
 [submodule "lwip/lwip"]
 	path = lwip/lwip
-	url = https://github.com/SuperHouse/esp-lwip.git
+	url = https://github.com/ourairquality/lwip.git
 [submodule "extras/mbedtls/mbedtls"]
 	path = extras/mbedtls/mbedtls
 	url = https://github.com/ARMmbed/mbedtls.git
+[submodule "extras/jsmn/jsmn"]
+	path = extras/jsmn/jsmn
+	url = https://github.com/zserge/jsmn.git
+[submodule "bootloader/rboot"]
+	path = bootloader/rboot
+	url = https://github.com/raburton/rboot.git
+[submodule "extras/spiffs/spiffs"]
+	path = extras/spiffs/spiffs
+	url = https://github.com/pellepl/spiffs.git
 [submodule "tests/unity"]
 	path = tests/unity
 	url = https://github.com/ThrowTheSwitch/Unity.git
+[submodule "tests/fs-test"]
+	path = tests/fs-test
+	url = https://github.com/sheinz/fs-test
+[submodule "extras/bearssl/BearSSL"]
+	path = extras/bearssl/BearSSL
+	url = https://www.bearssl.org/git/BearSSL
+[submodule "extras/http-parser/http-parser"]
+	path = extras/http-parser/http-parser
+	url = https://github.com/nodejs/http-parser
+[submodule "extras/crc_generic/crc_lib"]
+	path = extras/crc_generic/crc_lib
+	url = https://github.com/Zaltora/crc_generic_lib.git
+[submodule "extras/libesphttpd/libesphttpd"]
+	path = extras/libesphttpd/libesphttpd
+	url = https://github.com/nochkin/libesphttpd
+[submodule "extras/libesphttpd/libesphttpd/lib/heatshrink"]
+	path = extras/libesphttpd/libesphttpd/lib/heatshrink
+	url = https://github.com/atomicobject/heatshrink
+[submodule "extras/multipwm"]
+	path = extras/multipwm
+	url = https://github.com/nochkin/multipwm
+[submodule "lvgl/lvgl"]
+	path = lvgl/lvgl
+	url = https://github.com/littlevgl/lvgl.git
+[submodule "lvgl/lv_drivers"]
+	path = lvgl/lv_drivers
+	url = https://github.com/littlevgl/lv_drivers.git
+[submodule "lvgl/lv_examples"]
+	path = lvgl/lv_examples
+	url = https://github.com/littlevgl/lv_examples.git

.travis.yml

@@ -2,16 +2,15 @@ language: c
 sudo: false
 env:
   # Target commit for https://github.com/pfalcon/esp-open-sdk/
-  OPENSDK_COMMIT=cd1d336
+  OPENSDK_COMMIT=b069537
   CROSS_ROOT="${HOME}/toolchain-${OPENSDK_COMMIT}"
   CROSS_BINDIR="${CROSS_ROOT}/bin"
-  ESPTOOL2_COMMIT=ec0e2c7
-  ESPTOOL2_DIR="${HOME}/esptool2-${ESPTOOL2_COMMIT}"
-  PATH=${PATH}:${CROSS_BINDIR}:${ESPTOOL2_DIR}
+  CROSS="ccache xtensa-lx106-elf-"
+  MAKE_CMD="make WARNINGS_AS_ERRORS=1 -C examples/ build-examples"
+  PATH=${PATH}:${CROSS_BINDIR}
 cache:
   directories:
     - ${CROSS_ROOT}
-    - ${ESPTOOL2_DIR}
 addons:
   apt:
     packages:
@@ -30,32 +29,22 @@ addons:
     - libncurses5-dev
     - libexpat1-dev
     - python
-    - python-serial
+    - python-pip
     - sed
     - git
+    - help2man
+    - vim-common
+    - zlib1g-dev
 
 before_install:
-  # Install a toolchain using esp-open-sdk (parts we need for this are the GNU toolchain and libhal)
-  #
-  # Adds hack of "{$HAS_TC} || -Buildstep-" to avoid rebuilding toolchain if it's already
-  # installed from the cache. If this gets any more complex it should be spun out to a standalone shell script.
-  - export HAS_TC="test -d ${CROSS_BINDIR}"
-  - unset CC # Travis sets this due to "language: c", but it confuses autotools configure when cross-building
-  - ${HAS_TC} || git clone --recursive https://github.com/pfalcon/esp-open-sdk.git
-  - ${HAS_TC} || cd esp-open-sdk
-  - ${HAS_TC} || git reset --hard ${OPENSDK_COMMIT}
-  - ${HAS_TC} || git submodule update
-  - ${HAS_TC} || sed -i "s/2.69/2.68/" lx106-hal/configure.ac # this is a nasty hack as Ubuntu Precise only has autoconf 2.68 not 2.69...
-  - ${HAS_TC} || sed -r -i 's%TOOLCHAIN ?=.*%TOOLCHAIN=${CROSS_ROOT}%' Makefile
-  - ${HAS_TC} || make STANDALONE=n
-  - export HAS_ET2="test -f ${ESPTOOL2_DIR}/esptool2"
-  - ${HAS_ET2} || git clone https://github.com/raburton/esptool2 ${ESPTOOL2_DIR}
-  - ${HAS_ET2} || cd ${ESPTOOL2_DIR}
-  - ${HAS_ET2} || git reset --hard ${ESPTOOL2_COMMIT}
-  - ${HAS_ET2} || make
+  - pip install --user pyserial
+  - travis_wait 30 utils/travis_build/install_toolchain.sh
 
 script:
   - cd ${TRAVIS_BUILD_DIR}
   # Remove ssid_config requirement for examples
-  - sed -i "s%#warning%//#warning%" include/ssid_config.h
-  - make -C examples/ build-examples CROSS="ccache xtensa-lx106-elf-" V=1
+  - echo -e '#define WIFI_SSID "mywifissid"\n#define WIFI_PASS "my secret password"\n' > include/private_ssid_config.h
+  # Don't verbose-build all examples (too much output), only verbose-build errors
+  - ( ${MAKE_CMD} ) || ( ${MAKE_CMD} V=1 )
+  # build bootloader
+  - make -C bootloader/

FreeRTOS/License/license.txt

@@ -1,440 +1,37 @@
-The FreeRTOS.org source code is licensed by the *modified* GNU General Public
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+
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+covers most of the source files in the demo application projects, which are
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---------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-The FreeRTOS GPL Exception Text:
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-or whether in whole or in part, can only be distributed by you under the terms 
-of the GNU General Public License plus this exception. An independent module is 
-a module which is not derived from or based on FreeRTOS.
-
-Clause 1:
-
-Linking FreeRTOS statically or dynamically with other modules is making a 
-combined work based on FreeRTOS. Thus, the terms and conditions of the GNU 
-General Public License cover the whole combination.
-
-As a special exception, the copyright holder of FreeRTOS gives you permission 
-to link FreeRTOS with independent modules that communicate with FreeRTOS 
-solely through the FreeRTOS API interface, regardless of the license terms of 
-these independent modules, and to copy and distribute the resulting combined 
-work under terms of your choice, provided that
-
-  + Every copy of the combined work is accompanied by a written statement that 
-  details to the recipient the version of FreeRTOS used and an offer by yourself 
-  to provide the FreeRTOS source code (including any modifications you may have 
-  made) should the recipient request it.
-
-  + The combined work is not itself an RTOS, scheduler, kernel or related product.
-
-  + The independent modules add significant and primary functionality to FreeRTOS 
-  and do not merely extend the existing functionality already present in FreeRTOS.
-
-Clause 2:
-
-FreeRTOS may not be used for any competitive or comparative purpose, including the 
-publication of any form of run time or compile time metric, without the express 
-permission of Real Time Engineers Ltd. (this is the norm within the industry and 
-is intended to ensure information accuracy).

FreeRTOS/Source/croutine.c

@@ -1,71 +1,37 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 #include "FreeRTOS.h"
 #include "task.h"
 #include "croutine.h"
 
+/* Remove the whole file is co-routines are not being used. */
+#if( configUSE_CO_ROUTINES != 0 )
+
 /*
  * Some kernel aware debuggers require data to be viewed to be global, rather
  * than file scope.
@@ -76,17 +42,17 @@
 
 
 /* Lists for ready and blocked co-routines. --------------------*/
-static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ];	/*< Prioritised ready co-routines. */
-static xList xDelayedCoRoutineList1;									/*< Delayed co-routines. */
-static xList xDelayedCoRoutineList2;									/*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
-static xList * pxDelayedCoRoutineList;									/*< Points to the delayed co-routine list currently being used. */
-static xList * pxOverflowDelayedCoRoutineList;							/*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
-static xList xPendingReadyCoRoutineList;								/*< Holds co-routines that have been readied by an external event.  They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
+static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ];	/*< Prioritised ready co-routines. */
+static List_t xDelayedCoRoutineList1;									/*< Delayed co-routines. */
+static List_t xDelayedCoRoutineList2;									/*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
+static List_t * pxDelayedCoRoutineList;									/*< Points to the delayed co-routine list currently being used. */
+static List_t * pxOverflowDelayedCoRoutineList;							/*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
+static List_t xPendingReadyCoRoutineList;								/*< Holds co-routines that have been readied by an external event.  They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
 
 /* Other file private variables. --------------------------------*/
-corCRCB * pxCurrentCoRoutine = NULL;
-static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0;
-static portTickType xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
+CRCB_t * pxCurrentCoRoutine = NULL;
+static UBaseType_t uxTopCoRoutineReadyPriority = 0;
+static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
 
 /* The initial state of the co-routine when it is created. */
 #define corINITIAL_STATE	( 0 )
@@ -104,7 +70,7 @@ static portTickType xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks =
 	{																												\
 		uxTopCoRoutineReadyPriority = pxCRCB->uxPriority;															\
 	}																												\
-	vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) );	\
+	vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) );	\
 }
 
 /*
@@ -133,13 +99,13 @@ static void prvCheckDelayedList( void );
 
 /*-----------------------------------------------------------*/
 
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex )
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex )
 {
-signed portBASE_TYPE xReturn;
-corCRCB *pxCoRoutine;
+BaseType_t xReturn;
+CRCB_t *pxCoRoutine;
 
 	/* Allocate the memory that will store the co-routine control block. */
-	pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) );
+	pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
 	if( pxCoRoutine )
 	{
 		/* If pxCurrentCoRoutine is NULL then this is the first co-routine to
@@ -166,14 +132,14 @@ corCRCB *pxCoRoutine;
 		vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
 		vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
 
-		/* Set the co-routine control block as a link back from the xListItem.
+		/* Set the co-routine control block as a link back from the ListItem_t.
 		This is so we can get back to the containing CRCB from a generic item
 		in a list. */
 		listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
 		listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
 
 		/* Event lists are always in priority order. */
-		listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority );
+		listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );
 
 		/* Now the co-routine has been initialised it can be added to the ready
 		list at the correct priority. */
@@ -190,9 +156,9 @@ corCRCB *pxCoRoutine;
 }
 /*-----------------------------------------------------------*/
 
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList )
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList )
 {
-portTickType xTimeToWake;
+TickType_t xTimeToWake;
 
 	/* Calculate the time to wake - this may overflow but this is
 	not a problem. */
@@ -201,7 +167,7 @@ portTickType xTimeToWake;
 	/* We must remove ourselves from the ready list before adding
 	ourselves to the blocked list as the same list item is used for
 	both lists. */
-	( void ) uxListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+	( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 
 	/* The list item will be inserted in wake time order. */
 	listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
@@ -210,13 +176,13 @@ portTickType xTimeToWake;
 	{
 		/* Wake time has overflowed.  Place this item in the
 		overflow list. */
-		vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+		vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 	}
 	else
 	{
 		/* The wake time has not overflowed, so we can use the
 		current block list. */
-		vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+		vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
 	}
 
 	if( pxEventList )
@@ -235,12 +201,12 @@ static void prvCheckPendingReadyList( void )
 	the	ready lists itself. */
 	while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
 	{
-		corCRCB *pxUnblockedCRCB;
+		CRCB_t *pxUnblockedCRCB;
 
 		/* The pending ready list can be accessed by an ISR. */
 		portDISABLE_INTERRUPTS();
 		{
-			pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );
+			pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );
 			( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
 		}
 		portENABLE_INTERRUPTS();
@@ -253,7 +219,7 @@ static void prvCheckPendingReadyList( void )
 
 static void prvCheckDelayedList( void )
 {
-corCRCB *pxCRCB;
+CRCB_t *pxCRCB;
 
 	xPassedTicks = xTaskGetTickCount() - xLastTickCount;
 	while( xPassedTicks )
@@ -264,7 +230,7 @@ corCRCB *pxCRCB;
 		/* If the tick count has overflowed we need to swap the ready lists. */
 		if( xCoRoutineTickCount == 0 )
 		{
-			xList * pxTemp;
+			List_t * pxTemp;
 
 			/* Tick count has overflowed so we need to swap the delay lists.  If there are
 			any items in pxDelayedCoRoutineList here then there is an error! */
@@ -276,7 +242,7 @@ corCRCB *pxCRCB;
 		/* See if this tick has made a timeout expire. */
 		while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
 		{
-			pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
+			pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
 
 			if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
 			{
@@ -291,10 +257,10 @@ corCRCB *pxCRCB;
 				have been moved to the pending ready list and the following
 				line is still valid.  Also the pvContainer parameter will have
 				been set to NULL so the following lines are also valid. */
-				uxListRemove( &( pxCRCB->xGenericListItem ) );
+				( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
 
 				/* Is the co-routine waiting on an event also? */
-				if( pxCRCB->xEventListItem.pvContainer )
+				if( pxCRCB->xEventListItem.pxContainer )
 				{
 					( void ) uxListRemove( &( pxCRCB->xEventListItem ) );
 				}
@@ -341,16 +307,16 @@ void vCoRoutineSchedule( void )
 
 static void prvInitialiseCoRoutineLists( void )
 {
-unsigned portBASE_TYPE uxPriority;
+UBaseType_t uxPriority;
 
 	for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
 	{
-		vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
+		vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
 	}
 
-	vListInitialise( ( xList * ) &xDelayedCoRoutineList1 );
-	vListInitialise( ( xList * ) &xDelayedCoRoutineList2 );
-	vListInitialise( ( xList * ) &xPendingReadyCoRoutineList );
+	vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );
+	vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );
+	vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );
 
 	/* Start with pxDelayedCoRoutineList using list1 and the
 	pxOverflowDelayedCoRoutineList using list2. */
@@ -359,17 +325,17 @@ unsigned portBASE_TYPE uxPriority;
 }
 /*-----------------------------------------------------------*/
 
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList )
+BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList )
 {
-corCRCB *pxUnblockedCRCB;
-signed portBASE_TYPE xReturn;
+CRCB_t *pxUnblockedCRCB;
+BaseType_t xReturn;
 
 	/* This function is called from within an interrupt.  It can only access
 	event lists and the pending ready list.  This function assumes that a
 	check has already been made to ensure pxEventList is not empty. */
-	pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
+	pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
 	( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
-	vListInsertEnd( ( xList * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
+	vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
 
 	if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
 	{
@@ -383,3 +349,5 @@ signed portBASE_TYPE xReturn;
 	return xReturn;
 }
 
+#endif /* configUSE_CO_ROUTINES == 0 */
+

FreeRTOS/Source/event_groups.c

@@ -0,0 +1,753 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* Standard includes. */
+#include <stdlib.h>
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "timers.h"
+#include "event_groups.h"
+
+/* Lint e961, e750 and e9021 are suppressed as a MISRA exception justified
+because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+for the header files above, but not in this file, in order to generate the
+correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */
+
+/* The following bit fields convey control information in a task's event list
+item value.  It is important they don't clash with the
+taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */
+#if configUSE_16_BIT_TICKS == 1
+	#define eventCLEAR_EVENTS_ON_EXIT_BIT	0x0100U
+	#define eventUNBLOCKED_DUE_TO_BIT_SET	0x0200U
+	#define eventWAIT_FOR_ALL_BITS			0x0400U
+	#define eventEVENT_BITS_CONTROL_BYTES	0xff00U
+#else
+	#define eventCLEAR_EVENTS_ON_EXIT_BIT	0x01000000UL
+	#define eventUNBLOCKED_DUE_TO_BIT_SET	0x02000000UL
+	#define eventWAIT_FOR_ALL_BITS			0x04000000UL
+	#define eventEVENT_BITS_CONTROL_BYTES	0xff000000UL
+#endif
+
+typedef struct EventGroupDef_t
+{
+	EventBits_t uxEventBits;
+	List_t xTasksWaitingForBits;		/*< List of tasks waiting for a bit to be set. */
+
+	#if( configUSE_TRACE_FACILITY == 1 )
+		UBaseType_t uxEventGroupNumber;
+	#endif
+
+	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+		uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */
+	#endif
+} EventGroup_t;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Test the bits set in uxCurrentEventBits to see if the wait condition is met.
+ * The wait condition is defined by xWaitForAllBits.  If xWaitForAllBits is
+ * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor
+ * are also set in uxCurrentEventBits.  If xWaitForAllBits is pdFALSE then the
+ * wait condition is met if any of the bits set in uxBitsToWait for are also set
+ * in uxCurrentEventBits.
+ */
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer )
+	{
+	EventGroup_t *pxEventBits;
+
+		/* A StaticEventGroup_t object must be provided. */
+		configASSERT( pxEventGroupBuffer );
+
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticEventGroup_t equals the size of the real
+			event group structure. */
+			volatile size_t xSize = sizeof( StaticEventGroup_t );
+			configASSERT( xSize == sizeof( EventGroup_t ) );
+		} /*lint !e529 xSize is referenced if configASSERT() is defined. */
+		#endif /* configASSERT_DEFINED */
+
+		/* The user has provided a statically allocated event group - use it. */
+		pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
+
+		if( pxEventBits != NULL )
+		{
+			pxEventBits->uxEventBits = 0;
+			vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
+
+			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+			{
+				/* Both static and dynamic allocation can be used, so note that
+				this event group was created statically in case the event group
+				is later deleted. */
+				pxEventBits->ucStaticallyAllocated = pdTRUE;
+			}
+			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+
+			traceEVENT_GROUP_CREATE( pxEventBits );
+		}
+		else
+		{
+			/* xEventGroupCreateStatic should only ever be called with
+			pxEventGroupBuffer pointing to a pre-allocated (compile time
+			allocated) StaticEventGroup_t variable. */
+			traceEVENT_GROUP_CREATE_FAILED();
+		}
+
+		return pxEventBits;
+	}
+
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	EventGroupHandle_t xEventGroupCreate( void )
+	{
+	EventGroup_t *pxEventBits;
+
+		/* Allocate the event group.  Justification for MISRA deviation as
+		follows:  pvPortMalloc() always ensures returned memory blocks are
+		aligned per the requirements of the MCU stack.  In this case
+		pvPortMalloc() must return a pointer that is guaranteed to meet the
+		alignment requirements of the EventGroup_t structure - which (if you
+		follow it through) is the alignment requirements of the TickType_t type
+		(EventBits_t being of TickType_t itself).  Therefore, whenever the
+		stack alignment requirements are greater than or equal to the
+		TickType_t alignment requirements the cast is safe.  In other cases,
+		where the natural word size of the architecture is less than
+		sizeof( TickType_t ), the TickType_t variables will be accessed in two
+		or more reads operations, and the alignment requirements is only that
+		of each individual read. */
+		pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */
+
+		if( pxEventBits != NULL )
+		{
+			pxEventBits->uxEventBits = 0;
+			vListInitialise( &( pxEventBits->xTasksWaitingForBits ) );
+
+			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+			{
+				/* Both static and dynamic allocation can be used, so note this
+				event group was allocated statically in case the event group is
+				later deleted. */
+				pxEventBits->ucStaticallyAllocated = pdFALSE;
+			}
+			#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+			traceEVENT_GROUP_CREATE( pxEventBits );
+		}
+		else
+		{
+			traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */
+		}
+
+		return pxEventBits;
+	}
+
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait )
+{
+EventBits_t uxOriginalBitValue, uxReturn;
+EventGroup_t *pxEventBits = xEventGroup;
+BaseType_t xAlreadyYielded;
+BaseType_t xTimeoutOccurred = pdFALSE;
+
+	configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
+	configASSERT( uxBitsToWaitFor != 0 );
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+	vTaskSuspendAll();
+	{
+		uxOriginalBitValue = pxEventBits->uxEventBits;
+
+		( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet );
+
+		if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor )
+		{
+			/* All the rendezvous bits are now set - no need to block. */
+			uxReturn = ( uxOriginalBitValue | uxBitsToSet );
+
+			/* Rendezvous always clear the bits.  They will have been cleared
+			already unless this is the only task in the rendezvous. */
+			pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
+
+			xTicksToWait = 0;
+		}
+		else
+		{
+			if( xTicksToWait != ( TickType_t ) 0 )
+			{
+				traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor );
+
+				/* Store the bits that the calling task is waiting for in the
+				task's event list item so the kernel knows when a match is
+				found.  Then enter the blocked state. */
+				vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait );
+
+				/* This assignment is obsolete as uxReturn will get set after
+				the task unblocks, but some compilers mistakenly generate a
+				warning about uxReturn being returned without being set if the
+				assignment is omitted. */
+				uxReturn = 0;
+			}
+			else
+			{
+				/* The rendezvous bits were not set, but no block time was
+				specified - just return the current event bit value. */
+				uxReturn = pxEventBits->uxEventBits;
+				xTimeoutOccurred = pdTRUE;
+			}
+		}
+	}
+	xAlreadyYielded = xTaskResumeAll();
+
+	if( xTicksToWait != ( TickType_t ) 0 )
+	{
+		if( xAlreadyYielded == pdFALSE )
+		{
+			portYIELD_WITHIN_API();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* The task blocked to wait for its required bits to be set - at this
+		point either the required bits were set or the block time expired.  If
+		the required bits were set they will have been stored in the task's
+		event list item, and they should now be retrieved then cleared. */
+		uxReturn = uxTaskResetEventItemValue();
+
+		if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
+		{
+			/* The task timed out, just return the current event bit value. */
+			taskENTER_CRITICAL();
+			{
+				uxReturn = pxEventBits->uxEventBits;
+
+				/* Although the task got here because it timed out before the
+				bits it was waiting for were set, it is possible that since it
+				unblocked another task has set the bits.  If this is the case
+				then it needs to clear the bits before exiting. */
+				if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor )
+				{
+					pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			taskEXIT_CRITICAL();
+
+			xTimeoutOccurred = pdTRUE;
+		}
+		else
+		{
+			/* The task unblocked because the bits were set. */
+		}
+
+		/* Control bits might be set as the task had blocked should not be
+		returned. */
+		uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
+	}
+
+	traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred );
+
+	/* Prevent compiler warnings when trace macros are not used. */
+	( void ) xTimeoutOccurred;
+
+	return uxReturn;
+}
+/*-----------------------------------------------------------*/
+
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait )
+{
+EventGroup_t *pxEventBits = xEventGroup;
+EventBits_t uxReturn, uxControlBits = 0;
+BaseType_t xWaitConditionMet, xAlreadyYielded;
+BaseType_t xTimeoutOccurred = pdFALSE;
+
+	/* Check the user is not attempting to wait on the bits used by the kernel
+	itself, and that at least one bit is being requested. */
+	configASSERT( xEventGroup );
+	configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
+	configASSERT( uxBitsToWaitFor != 0 );
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+	vTaskSuspendAll();
+	{
+		const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits;
+
+		/* Check to see if the wait condition is already met or not. */
+		xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits );
+
+		if( xWaitConditionMet != pdFALSE )
+		{
+			/* The wait condition has already been met so there is no need to
+			block. */
+			uxReturn = uxCurrentEventBits;
+			xTicksToWait = ( TickType_t ) 0;
+
+			/* Clear the wait bits if requested to do so. */
+			if( xClearOnExit != pdFALSE )
+			{
+				pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else if( xTicksToWait == ( TickType_t ) 0 )
+		{
+			/* The wait condition has not been met, but no block time was
+			specified, so just return the current value. */
+			uxReturn = uxCurrentEventBits;
+			xTimeoutOccurred = pdTRUE;
+		}
+		else
+		{
+			/* The task is going to block to wait for its required bits to be
+			set.  uxControlBits are used to remember the specified behaviour of
+			this call to xEventGroupWaitBits() - for use when the event bits
+			unblock the task. */
+			if( xClearOnExit != pdFALSE )
+			{
+				uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			if( xWaitForAllBits != pdFALSE )
+			{
+				uxControlBits |= eventWAIT_FOR_ALL_BITS;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			/* Store the bits that the calling task is waiting for in the
+			task's event list item so the kernel knows when a match is
+			found.  Then enter the blocked state. */
+			vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait );
+
+			/* This is obsolete as it will get set after the task unblocks, but
+			some compilers mistakenly generate a warning about the variable
+			being returned without being set if it is not done. */
+			uxReturn = 0;
+
+			traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor );
+		}
+	}
+	xAlreadyYielded = xTaskResumeAll();
+
+	if( xTicksToWait != ( TickType_t ) 0 )
+	{
+		if( xAlreadyYielded == pdFALSE )
+		{
+			portYIELD_WITHIN_API();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* The task blocked to wait for its required bits to be set - at this
+		point either the required bits were set or the block time expired.  If
+		the required bits were set they will have been stored in the task's
+		event list item, and they should now be retrieved then cleared. */
+		uxReturn = uxTaskResetEventItemValue();
+
+		if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 )
+		{
+			taskENTER_CRITICAL();
+			{
+				/* The task timed out, just return the current event bit value. */
+				uxReturn = pxEventBits->uxEventBits;
+
+				/* It is possible that the event bits were updated between this
+				task leaving the Blocked state and running again. */
+				if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE )
+				{
+					if( xClearOnExit != pdFALSE )
+					{
+						pxEventBits->uxEventBits &= ~uxBitsToWaitFor;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+				xTimeoutOccurred = pdTRUE;
+			}
+			taskEXIT_CRITICAL();
+		}
+		else
+		{
+			/* The task unblocked because the bits were set. */
+		}
+
+		/* The task blocked so control bits may have been set. */
+		uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES;
+	}
+	traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred );
+
+	/* Prevent compiler warnings when trace macros are not used. */
+	( void ) xTimeoutOccurred;
+
+	return uxReturn;
+}
+/*-----------------------------------------------------------*/
+
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )
+{
+EventGroup_t *pxEventBits = xEventGroup;
+EventBits_t uxReturn;
+
+	/* Check the user is not attempting to clear the bits used by the kernel
+	itself. */
+	configASSERT( xEventGroup );
+	configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
+
+	taskENTER_CRITICAL();
+	{
+		traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear );
+
+		/* The value returned is the event group value prior to the bits being
+		cleared. */
+		uxReturn = pxEventBits->uxEventBits;
+
+		/* Clear the bits. */
+		pxEventBits->uxEventBits &= ~uxBitsToClear;
+	}
+	taskEXIT_CRITICAL();
+
+	return uxReturn;
+}
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
+
+	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear )
+	{
+		BaseType_t xReturn;
+
+		traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear );
+		xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
+
+		return xReturn;
+	}
+
+#endif
+/*-----------------------------------------------------------*/
+
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
+{
+UBaseType_t uxSavedInterruptStatus;
+EventGroup_t const * const pxEventBits = xEventGroup;
+EventBits_t uxReturn;
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		uxReturn = pxEventBits->uxEventBits;
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return uxReturn;
+} /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */
+/*-----------------------------------------------------------*/
+
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet )
+{
+ListItem_t *pxListItem, *pxNext;
+ListItem_t const *pxListEnd;
+List_t const * pxList;
+EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits;
+EventGroup_t *pxEventBits = xEventGroup;
+BaseType_t xMatchFound = pdFALSE;
+
+	/* Check the user is not attempting to set the bits used by the kernel
+	itself. */
+	configASSERT( xEventGroup );
+	configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 );
+
+	pxList = &( pxEventBits->xTasksWaitingForBits );
+	pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+	vTaskSuspendAll();
+	{
+		traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet );
+
+		pxListItem = listGET_HEAD_ENTRY( pxList );
+
+		/* Set the bits. */
+		pxEventBits->uxEventBits |= uxBitsToSet;
+
+		/* See if the new bit value should unblock any tasks. */
+		while( pxListItem != pxListEnd )
+		{
+			pxNext = listGET_NEXT( pxListItem );
+			uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem );
+			xMatchFound = pdFALSE;
+
+			/* Split the bits waited for from the control bits. */
+			uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES;
+			uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES;
+
+			if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 )
+			{
+				/* Just looking for single bit being set. */
+				if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 )
+				{
+					xMatchFound = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor )
+			{
+				/* All bits are set. */
+				xMatchFound = pdTRUE;
+			}
+			else
+			{
+				/* Need all bits to be set, but not all the bits were set. */
+			}
+
+			if( xMatchFound != pdFALSE )
+			{
+				/* The bits match.  Should the bits be cleared on exit? */
+				if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 )
+				{
+					uxBitsToClear |= uxBitsWaitedFor;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				/* Store the actual event flag value in the task's event list
+				item before removing the task from the event list.  The
+				eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows
+				that is was unblocked due to its required bits matching, rather
+				than because it timed out. */
+				vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET );
+			}
+
+			/* Move onto the next list item.  Note pxListItem->pxNext is not
+			used here as the list item may have been removed from the event list
+			and inserted into the ready/pending reading list. */
+			pxListItem = pxNext;
+		}
+
+		/* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT
+		bit was set in the control word. */
+		pxEventBits->uxEventBits &= ~uxBitsToClear;
+	}
+	( void ) xTaskResumeAll();
+
+	return pxEventBits->uxEventBits;
+}
+/*-----------------------------------------------------------*/
+
+void vEventGroupDelete( EventGroupHandle_t xEventGroup )
+{
+EventGroup_t *pxEventBits = xEventGroup;
+const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
+
+	vTaskSuspendAll();
+	{
+		traceEVENT_GROUP_DELETE( xEventGroup );
+
+		while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 )
+		{
+			/* Unblock the task, returning 0 as the event list is being deleted
+			and cannot therefore have any bits set. */
+			configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) );
+			vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET );
+		}
+
+		#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
+		{
+			/* The event group can only have been allocated dynamically - free
+			it again. */
+			vPortFree( pxEventBits );
+		}
+		#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+		{
+			/* The event group could have been allocated statically or
+			dynamically, so check before attempting to free the memory. */
+			if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
+			{
+				vPortFree( pxEventBits );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+	}
+	( void ) xTaskResumeAll();
+}
+/*-----------------------------------------------------------*/
+
+/* For internal use only - execute a 'set bits' command that was pended from
+an interrupt. */
+void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet )
+{
+	( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
+}
+/*-----------------------------------------------------------*/
+
+/* For internal use only - execute a 'clear bits' command that was pended from
+an interrupt. */
+void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear )
+{
+	( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */
+}
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits )
+{
+BaseType_t xWaitConditionMet = pdFALSE;
+
+	if( xWaitForAllBits == pdFALSE )
+	{
+		/* Task only has to wait for one bit within uxBitsToWaitFor to be
+		set.  Is one already set? */
+		if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 )
+		{
+			xWaitConditionMet = pdTRUE;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		/* Task has to wait for all the bits in uxBitsToWaitFor to be set.
+		Are they set already? */
+		if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor )
+		{
+			xWaitConditionMet = pdTRUE;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+	return xWaitConditionMet;
+}
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) )
+
+	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken )
+	{
+	BaseType_t xReturn;
+
+		traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet );
+		xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */
+
+		return xReturn;
+	}
+
+#endif
+/*-----------------------------------------------------------*/
+
+#if (configUSE_TRACE_FACILITY == 1)
+
+	UBaseType_t uxEventGroupGetNumber( void* xEventGroup )
+	{
+	UBaseType_t xReturn;
+	EventGroup_t const *pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
+
+		if( xEventGroup == NULL )
+		{
+			xReturn = 0;
+		}
+		else
+		{
+			xReturn = pxEventBits->uxEventGroupNumber;
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	void vEventGroupSetNumber( void * xEventGroup, UBaseType_t uxEventGroupNumber )
+	{
+		( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+

FreeRTOS/Source/include/FreeRTOSConfig.h

@@ -1,15 +1,31 @@
-/* Default esp-open-sdk FreeRTOSConfig file.
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
-   You can override settings in here by creating your own
-   FreeRTOSConfig.h file in your program directory.
-
-   You could just copy this file there and edit it, but it's
-   recommended you instead define whatever you want to override and
-   then use #include_next<FreeRTOSConfig.h> to pick up these defaults.
-
-   The "blink" example in "examples/blink" provides an example of how
-   to do this.
-*/
 #ifndef __DEFAULT_FREERTOS_CONFIG_H
 #define __DEFAULT_FREERTOS_CONFIG_H
 
@@ -20,7 +36,7 @@
  * application requirements.
  *
  * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. 
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
  *
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
@@ -34,13 +50,20 @@
 #define configUSE_TICK_HOOK			0
 #endif
 #ifndef configCPU_CLOCK_HZ
+/* This is the _default_ clock speed for the CPU. Can be either 80MHz
+ * or 160MHz, and the system will set the clock speed to match at startup.
+ *
+ * Note that it's possible to change the clock speed at runtime, so you
+ * can/should use sdk_system_get_cpu_frequency() in order to determine the
+ * current CPU frequency, in preference to this macro.
+ */
 #define configCPU_CLOCK_HZ			( ( unsigned long ) 80000000 )
 #endif
 #ifndef configTICK_RATE_HZ
-#define configTICK_RATE_HZ			( ( portTickType ) 100 )
+#define configTICK_RATE_HZ			( ( TickType_t ) 100 )
 #endif
 #ifndef configMAX_PRIORITIES
-#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 15 )
+#define configMAX_PRIORITIES		( 15 )
 #endif
 #ifndef configMINIMAL_STACK_SIZE
 #define configMINIMAL_STACK_SIZE	( ( unsigned short )256 )
@@ -74,6 +97,9 @@
 #ifndef configCHECK_FOR_STACK_OVERFLOW
 #define configCHECK_FOR_STACK_OVERFLOW  2
 #endif
+#ifndef configUSE_RECURSIVE_MUTEXES
+#define configUSE_RECURSIVE_MUTEXES 1
+#endif
 #ifndef configUSE_MUTEXES
 #define configUSE_MUTEXES  1
 #endif
@@ -81,7 +107,6 @@
 #define configUSE_TIMERS    1
 #endif
 
-
 #if configUSE_TIMERS
 #ifndef configTIMER_TASK_PRIORITY
 #define configTIMER_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
@@ -102,6 +127,10 @@
 #define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
 #endif
 
+#ifndef configUSE_NEWLIB_REENTRANT
+#define configUSE_NEWLIB_REENTRANT 1
+#endif
+
 /* Set the following definitions to 1 to include the API function, or zero
 to exclude the API function. */
 #ifndef INCLUDE_vTaskPrioritySet
@@ -134,5 +163,14 @@ to exclude the API function. */
 #define INCLUDE_uxTaskGetStackHighWaterMark 1
 #endif
 
+#ifndef configENABLE_BACKWARD_COMPATIBILITY
+#define configENABLE_BACKWARD_COMPATIBILITY 0
+#endif
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+void vAssertCalled(const char * pcFile, unsigned long ulLine);
+#define configASSERT(x) if((x) == 0) vAssertCalled(__FILE__, __LINE__);
+
 #endif /* __DEFAULT_FREERTOS_CONFIG_H */
 

FreeRTOS/Source/include/StackMacros.h

@@ -1,179 +0,0 @@
-/*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
-#ifndef STACK_MACROS_H
-#define STACK_MACROS_H
-
-/*
- * Call the stack overflow hook function if the stack of the task being swapped
- * out is currently overflowed, or looks like it might have overflowed in the
- * past.
- *
- * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
- * the current stack state only - comparing the current top of stack value to
- * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
- * will also cause the last few stack bytes to be checked to ensure the value
- * to which the bytes were set when the task was created have not been
- * overwritten.  Note this second test does not guarantee that an overflowed
- * stack will always be recognised.
- */
-
-/*-----------------------------------------------------------*/
-
-#if( configCHECK_FOR_STACK_OVERFLOW == 0 )
-
-	/* FreeRTOSConfig.h is not set to check for stack overflows. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 0 */
-/*-----------------------------------------------------------*/
-
-#if( configCHECK_FOR_STACK_OVERFLOW == 1 )
-
-	/* FreeRTOSConfig.h is only set to use the first method of
-	overflow checking. */
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH < 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()														\
-	{																									\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
-		{																								\
-			vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW > 0 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH > 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskFIRST_CHECK_FOR_STACK_OVERFLOW()														\
-	{																									\
-																										\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
-		{																								\
-			vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
-
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()																								\
-	{																																			\
-	static const unsigned char ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																				\
-																																				\
-		/* Has the extremity of the task stack ever been written over? */																		\
-		if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
-		{																																		\
-			vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName );											\
-		}																																		\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
-
-	#define taskSECOND_CHECK_FOR_STACK_OVERFLOW()																								\
-	{																																			\
-	char *pcEndOfStack = ( char * ) pxCurrentTCB->pxEndOfStack;																					\
-	static const unsigned char ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-															tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																				\
-																																				\
-		pcEndOfStack -= sizeof( ucExpectedStackBytes );																							\
-																																				\
-		/* Has the extremity of the task stack ever been written over? */																		\
-		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )							\
-		{																																		\
-			vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName );											\
-		}																																		\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#endif /* STACK_MACROS_H */
-

FreeRTOS/Source/include/croutine.h

@@ -1,66 +1,29 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 #ifndef CO_ROUTINE_H
 #define CO_ROUTINE_H
@@ -78,28 +41,28 @@ extern "C" {
 /* Used to hide the implementation of the co-routine control block.  The
 control block structure however has to be included in the header due to
 the macro implementation of the co-routine functionality. */
-typedef void * xCoRoutineHandle;
+typedef void * CoRoutineHandle_t;
 
 /* Defines the prototype to which co-routine functions must conform. */
-typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE );
+typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t );
 
 typedef struct corCoRoutineControlBlock
 {
-	crCOROUTINE_CODE 		pxCoRoutineFunction;
-	xListItem				xGenericListItem;	/*< List item used to place the CRCB in ready and blocked queues. */
-	xListItem				xEventListItem;		/*< List item used to place the CRCB in event lists. */
-	unsigned portBASE_TYPE 	uxPriority;			/*< The priority of the co-routine in relation to other co-routines. */
-	unsigned portBASE_TYPE 	uxIndex;			/*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
-	unsigned short 		uxState;			/*< Used internally by the co-routine implementation. */
-} corCRCB; /* Co-routine control block.  Note must be identical in size down to uxPriority with tskTCB. */
+	crCOROUTINE_CODE 	pxCoRoutineFunction;
+	ListItem_t			xGenericListItem;	/*< List item used to place the CRCB in ready and blocked queues. */
+	ListItem_t			xEventListItem;		/*< List item used to place the CRCB in event lists. */
+	UBaseType_t 		uxPriority;			/*< The priority of the co-routine in relation to other co-routines. */
+	UBaseType_t 		uxIndex;			/*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
+	uint16_t 			uxState;			/*< Used internally by the co-routine implementation. */
+} CRCB_t; /* Co-routine control block.  Note must be identical in size down to uxPriority with TCB_t. */
 
 /**
  * croutine. h
  *<pre>
- portBASE_TYPE xCoRoutineCreate(
+ BaseType_t xCoRoutineCreate(
                                  crCOROUTINE_CODE pxCoRoutineCode,
-                                 unsigned portBASE_TYPE uxPriority,
-                                 unsigned portBASE_TYPE uxIndex
+                                 UBaseType_t uxPriority,
+                                 UBaseType_t uxIndex
                                );</pre>
  *
  * Create a new co-routine and add it to the list of co-routines that are
@@ -122,12 +85,12 @@ typedef struct corCoRoutineControlBlock
  * Example usage:
    <pre>
  // Co-routine to be created.
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
  // This may not be necessary for const variables.
  static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const portTickType uxFlashRates[ 2 ] = { 200, 400 };
+ static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
 
      // Must start every co-routine with a call to crSTART();
      crSTART( xHandle );
@@ -137,7 +100,7 @@ typedef struct corCoRoutineControlBlock
          // This co-routine just delays for a fixed period, then toggles
          // an LED.  Two co-routines are created using this function, so
          // the uxIndex parameter is used to tell the co-routine which
-         // LED to flash and how long to delay.  This assumes xQueue has
+         // LED to flash and how int32_t to delay.  This assumes xQueue has
          // already been created.
          vParTestToggleLED( cLedToFlash[ uxIndex ] );
          crDELAY( xHandle, uxFlashRates[ uxIndex ] );
@@ -150,9 +113,9 @@ typedef struct corCoRoutineControlBlock
  // Function that creates two co-routines.
  void vOtherFunction( void )
  {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-		
+ uint8_t ucParameterToPass;
+ TaskHandle_t xHandle;
+
      // Create two co-routines at priority 0.  The first is given index 0
      // so (from the code above) toggles LED 5 every 200 ticks.  The second
      // is given index 1 so toggles LED 6 every 400 ticks.
@@ -165,7 +128,7 @@ typedef struct corCoRoutineControlBlock
  * \defgroup xCoRoutineCreate xCoRoutineCreate
  * \ingroup Tasks
  */
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex );
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex );
 
 
 /**
@@ -212,17 +175,17 @@ void vCoRoutineSchedule( void );
 /**
  * croutine. h
  * <pre>
- crSTART( xCoRoutineHandle xHandle );</pre>
+ crSTART( CoRoutineHandle_t xHandle );</pre>
  *
  * This macro MUST always be called at the start of a co-routine function.
  *
  * Example usage:
    <pre>
  // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
+ static int32_t ulAVariable;
 
      // Must start every co-routine with a call to crSTART();
      crSTART( xHandle );
@@ -238,7 +201,7 @@ void vCoRoutineSchedule( void );
  * \defgroup crSTART crSTART
  * \ingroup Tasks
  */
-#define crSTART( pxCRCB ) switch( ( ( corCRCB * )( pxCRCB ) )->uxState ) { case 0:
+#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0:
 
 /**
  * croutine. h
@@ -250,10 +213,10 @@ void vCoRoutineSchedule( void );
  * Example usage:
    <pre>
  // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
+ static int32_t ulAVariable;
 
      // Must start every co-routine with a call to crSTART();
      crSTART( xHandle );
@@ -275,13 +238,13 @@ void vCoRoutineSchedule( void );
  * These macros are intended for internal use by the co-routine implementation
  * only.  The macros should not be used directly by application writers.
  */
-#define crSET_STATE0( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):
-#define crSET_STATE1( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):
+#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):
+#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):
 
 /**
  * croutine. h
  *<pre>
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );</pre>
+ crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );</pre>
  *
  * Delay a co-routine for a fixed period of time.
  *
@@ -294,18 +257,18 @@ void vCoRoutineSchedule( void );
  *
  * @param xTickToDelay The number of ticks that the co-routine should delay
  * for.  The actual amount of time this equates to is defined by
- * configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant portTICK_RATE_MS
+ * configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant portTICK_PERIOD_MS
  * can be used to convert ticks to milliseconds.
  *
  * Example usage:
    <pre>
  // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
  // This may not be necessary for const variables.
  // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;
+ static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
 
      // Must start every co-routine with a call to crSTART();
      crSTART( xHandle );
@@ -334,11 +297,11 @@ void vCoRoutineSchedule( void );
 /**
  * <pre>
  crQUEUE_SEND(
-                  xCoRoutineHandle xHandle,
-                  xQueueHandle pxQueue,
+                  CoRoutineHandle_t xHandle,
+                  QueueHandle_t pxQueue,
                   void *pvItemToQueue,
-                  portTickType xTicksToWait,
-                  portBASE_TYPE *pxResult
+                  TickType_t xTicksToWait,
+                  BaseType_t *pxResult
              )</pre>
  *
  * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
@@ -371,7 +334,7 @@ void vCoRoutineSchedule( void );
  * to wait for space to become available on the queue, should space not be
  * available immediately. The actual amount of time this equates to is defined
  * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
- * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example
  * below).
  *
  * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
@@ -382,11 +345,11 @@ void vCoRoutineSchedule( void );
    <pre>
  // Co-routine function that blocks for a fixed period then posts a number onto
  // a queue.
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xNumberToPost = 0;
- static portBASE_TYPE xResult;
+ static BaseType_t xNumberToPost = 0;
+ static BaseType_t xResult;
 
     // Co-routines must begin with a call to crSTART().
     crSTART( xHandle );
@@ -433,11 +396,11 @@ void vCoRoutineSchedule( void );
  * croutine. h
  * <pre>
   crQUEUE_RECEIVE(
-                     xCoRoutineHandle xHandle,
-                     xQueueHandle pxQueue,
+                     CoRoutineHandle_t xHandle,
+                     QueueHandle_t pxQueue,
                      void *pvBuffer,
-                     portTickType xTicksToWait,
-                     portBASE_TYPE *pxResult
+                     TickType_t xTicksToWait,
+                     BaseType_t *pxResult
                  )</pre>
  *
  * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
@@ -469,7 +432,7 @@ void vCoRoutineSchedule( void );
  * to wait for data to become available from the queue, should data not be
  * available immediately. The actual amount of time this equates to is defined
  * by configTICK_RATE_HZ (set in FreeRTOSConfig.h).  The constant
- * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the
+ * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the
  * crQUEUE_SEND example).
  *
  * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
@@ -480,11 +443,11 @@ void vCoRoutineSchedule( void );
  <pre>
  // A co-routine receives the number of an LED to flash from a queue.  It
  // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xResult;
- static unsigned portBASE_TYPE uxLEDToFlash;
+ static BaseType_t xResult;
+ static UBaseType_t uxLEDToFlash;
 
     // All co-routines must start with a call to crSTART().
     crSTART( xHandle );
@@ -525,9 +488,9 @@ void vCoRoutineSchedule( void );
  * croutine. h
  * <pre>
   crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
+                            QueueHandle_t pxQueue,
                             void *pvItemToQueue,
-                            portBASE_TYPE xCoRoutinePreviouslyWoken
+                            BaseType_t xCoRoutinePreviouslyWoken
                        )</pre>
  *
  * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
@@ -565,10 +528,10 @@ void vCoRoutineSchedule( void );
  * Example usage:
  <pre>
  // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  char cRxedChar;
- portBASE_TYPE xResult;
+ BaseType_t xResult;
 
      // All co-routines must start with a call to crSTART().
      crSTART( xHandle );
@@ -595,7 +558,7 @@ void vCoRoutineSchedule( void );
  void vUART_ISR( void )
  {
  char cRxedChar;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
+ BaseType_t xCRWokenByPost = pdFALSE;
 
      // We loop around reading characters until there are none left in the UART.
      while( UART_RX_REG_NOT_EMPTY() )
@@ -622,9 +585,9 @@ void vCoRoutineSchedule( void );
  * croutine. h
  * <pre>
   crQUEUE_SEND_FROM_ISR(
-                            xQueueHandle pxQueue,
+                            QueueHandle_t pxQueue,
                             void *pvBuffer,
-                            portBASE_TYPE * pxCoRoutineWoken
+                            BaseType_t * pxCoRoutineWoken
                        )</pre>
  *
  * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
@@ -663,12 +626,12 @@ void vCoRoutineSchedule( void );
  <pre>
  // A co-routine that posts a character to a queue then blocks for a fixed
  // period.  The character is incremented each time.
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
+ static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
  {
  // cChar holds its value while this co-routine is blocked and must therefore
  // be declared static.
  static char cCharToTx = 'a';
- portBASE_TYPE xResult;
+ BaseType_t xResult;
 
      // All co-routines must start with a call to crSTART().
      crSTART( xHandle );
@@ -711,7 +674,7 @@ void vCoRoutineSchedule( void );
  void vUART_ISR( void )
  {
  char cCharToTx;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
+ BaseType_t xCRWokenByPost = pdFALSE;
 
      while( UART_TX_REG_EMPTY() )
      {
@@ -739,7 +702,7 @@ void vCoRoutineSchedule( void );
  * Removes the current co-routine from its ready list and places it in the
  * appropriate delayed list.
  */
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList );
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList );
 
 /*
  * This function is intended for internal use by the queue implementation only.
@@ -748,7 +711,7 @@ void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList
  * Removes the highest priority co-routine from the event list and places it in
  * the pending ready list.
  */
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList );
+BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList );
 
 #ifdef __cplusplus
 }

FreeRTOS/Source/include/deprecated_definitions.h

@@ -0,0 +1,279 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef DEPRECATED_DEFINITIONS_H
+#define DEPRECATED_DEFINITIONS_H
+
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+pre-processor definition was used to ensure the pre-processor found the correct
+portmacro.h file for the port being used.  That scheme was deprecated in favour
+of setting the compiler's include path such that it found the correct
+portmacro.h file - removing the need for the constant and allowing the
+portmacro.h file to be located anywhere in relation to the port being used.  The
+definitions below remain in the code for backward compatibility only.  New
+projects should not use them. */
+
+#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
+	#include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
+	typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
+	#include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
+	typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef GCC_MEGA_AVR
+	#include "../portable/GCC/ATMega323/portmacro.h"
+#endif
+
+#ifdef IAR_MEGA_AVR
+	#include "../portable/IAR/ATMega323/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC24_PORT
+	#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_DSPIC_PORT
+	#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC18F_PORT
+	#include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC32MX_PORT
+	#include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
+#endif
+
+#ifdef _FEDPICC
+	#include "libFreeRTOS/Include/portmacro.h"
+#endif
+
+#ifdef SDCC_CYGNAL
+	#include "../../Source/portable/SDCC/Cygnal/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7
+	#include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7_ECLIPSE
+	#include "portmacro.h"
+#endif
+
+#ifdef ROWLEY_LPC23xx
+	#include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
+#endif
+
+#ifdef IAR_MSP430
+	#include "..\..\Source\portable\IAR\MSP430\portmacro.h"
+#endif
+
+#ifdef GCC_MSP430
+	#include "../../Source/portable/GCC/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ROWLEY_MSP430
+	#include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ARM7_LPC21xx_KEIL_RVDS
+	#include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
+#endif
+
+#ifdef SAM7_GCC
+	#include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
+#endif
+
+#ifdef SAM7_IAR
+	#include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
+#endif
+
+#ifdef SAM9XE_IAR
+	#include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
+#endif
+
+#ifdef LPC2000_IAR
+	#include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
+#endif
+
+#ifdef STR71X_IAR
+	#include "..\..\Source\portable\IAR\STR71x\portmacro.h"
+#endif
+
+#ifdef STR75X_IAR
+	#include "..\..\Source\portable\IAR\STR75x\portmacro.h"
+#endif
+
+#ifdef STR75X_GCC
+	#include "..\..\Source\portable\GCC\STR75x\portmacro.h"
+#endif
+
+#ifdef STR91X_IAR
+	#include "..\..\Source\portable\IAR\STR91x\portmacro.h"
+#endif
+
+#ifdef GCC_H8S
+	#include "../../Source/portable/GCC/H8S2329/portmacro.h"
+#endif
+
+#ifdef GCC_AT91FR40008
+	#include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
+#endif
+
+#ifdef RVDS_ARMCM3_LM3S102
+	#include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3_LM3S102
+	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3
+	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARM_CM3
+	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARMCM3_LM
+	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef HCS12_CODE_WARRIOR
+	#include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
+#endif
+
+#ifdef MICROBLAZE_GCC
+	#include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
+#endif
+
+#ifdef TERN_EE
+	#include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
+#endif
+
+#ifdef GCC_HCS12
+	#include "../../Source/portable/GCC/HCS12/portmacro.h"
+#endif
+
+#ifdef GCC_MCF5235
+    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_GCC
+	#include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_CODEWARRIOR
+	#include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef GCC_PPC405
+	#include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
+#endif
+
+#ifdef GCC_PPC440
+	#include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
+#endif
+
+#ifdef _16FX_SOFTUNE
+	#include "..\..\Source\portable\Softune\MB96340\portmacro.h"
+#endif
+
+#ifdef BCC_INDUSTRIAL_PC_PORT
+	/* A short file name has to be used in place of the normal
+	FreeRTOSConfig.h when using the Borland compiler. */
+	#include "frconfig.h"
+	#include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
+    typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef BCC_FLASH_LITE_186_PORT
+	/* A short file name has to be used in place of the normal
+	FreeRTOSConfig.h when using the Borland compiler. */
+	#include "frconfig.h"
+	#include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
+    typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef __GNUC__
+   #ifdef __AVR32_AVR32A__
+	   #include "portmacro.h"
+   #endif
+#endif
+
+#ifdef __ICCAVR32__
+   #ifdef __CORE__
+      #if __CORE__ == __AVR32A__
+	      #include "portmacro.h"
+      #endif
+   #endif
+#endif
+
+#ifdef __91467D
+	#include "portmacro.h"
+#endif
+
+#ifdef __96340
+	#include "portmacro.h"
+#endif
+
+
+#ifdef __IAR_V850ES_Fx3__
+	#include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3__
+	#include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3_L__
+	#include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx2__
+	#include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Hx2__
+	#include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3__
+	#include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3L__
+	#include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#endif /* DEPRECATED_DEFINITIONS_H */
+

FreeRTOS/Source/include/event_groups.h

@@ -0,0 +1,757 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef EVENT_GROUPS_H
+#define EVENT_GROUPS_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h" must appear in source files before "include event_groups.h"
+#endif
+
+/* FreeRTOS includes. */
+#include "timers.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * An event group is a collection of bits to which an application can assign a
+ * meaning.  For example, an application may create an event group to convey
+ * the status of various CAN bus related events in which bit 0 might mean "A CAN
+ * message has been received and is ready for processing", bit 1 might mean "The
+ * application has queued a message that is ready for sending onto the CAN
+ * network", and bit 2 might mean "It is time to send a SYNC message onto the
+ * CAN network" etc.  A task can then test the bit values to see which events
+ * are active, and optionally enter the Blocked state to wait for a specified
+ * bit or a group of specified bits to be active.  To continue the CAN bus
+ * example, a CAN controlling task can enter the Blocked state (and therefore
+ * not consume any processing time) until either bit 0, bit 1 or bit 2 are
+ * active, at which time the bit that was actually active would inform the task
+ * which action it had to take (process a received message, send a message, or
+ * send a SYNC).
+ *
+ * The event groups implementation contains intelligence to avoid race
+ * conditions that would otherwise occur were an application to use a simple
+ * variable for the same purpose.  This is particularly important with respect
+ * to when a bit within an event group is to be cleared, and when bits have to
+ * be set and then tested atomically - as is the case where event groups are
+ * used to create a synchronisation point between multiple tasks (a
+ * 'rendezvous').
+ *
+ * \defgroup EventGroup
+ */
+
+
+
+/**
+ * event_groups.h
+ *
+ * Type by which event groups are referenced.  For example, a call to
+ * xEventGroupCreate() returns an EventGroupHandle_t variable that can then
+ * be used as a parameter to other event group functions.
+ *
+ * \defgroup EventGroupHandle_t EventGroupHandle_t
+ * \ingroup EventGroup
+ */
+struct EventGroupDef_t;
+typedef struct EventGroupDef_t * EventGroupHandle_t;
+
+/*
+ * The type that holds event bits always matches TickType_t - therefore the
+ * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
+ * 32 bits if set to 0.
+ *
+ * \defgroup EventBits_t EventBits_t
+ * \ingroup EventGroup
+ */
+typedef TickType_t EventBits_t;
+
+/**
+ * event_groups.h
+ *<pre>
+ EventGroupHandle_t xEventGroupCreate( void );
+ </pre>
+ *
+ * Create a new event group.
+ *
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
+ * block of memory, in which the event group's structure is stored.  If an event
+ * groups is created using xEventGropuCreate() then the required memory is
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
+ * (see http://www.freertos.org/a00111.html).  If an event group is created
+ * using xEventGropuCreateStatic() then the application writer must instead
+ * provide the memory that will get used by the event group.
+ * xEventGroupCreateStatic() therefore allows an event group to be created
+ * without using any dynamic memory allocation.
+ *
+ * Although event groups are not related to ticks, for internal implementation
+ * reasons the number of bits available for use in an event group is dependent
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
+ * event bits within an event group.
+ *
+ * @return If the event group was created then a handle to the event group is
+ * returned.  If there was insufficient FreeRTOS heap available to create the
+ * event group then NULL is returned.  See http://www.freertos.org/a00111.html
+ *
+ * Example usage:
+   <pre>
+	// Declare a variable to hold the created event group.
+	EventGroupHandle_t xCreatedEventGroup;
+
+	// Attempt to create the event group.
+	xCreatedEventGroup = xEventGroupCreate();
+
+	// Was the event group created successfully?
+	if( xCreatedEventGroup == NULL )
+	{
+		// The event group was not created because there was insufficient
+		// FreeRTOS heap available.
+	}
+	else
+	{
+		// The event group was created.
+	}
+   </pre>
+ * \defgroup xEventGroupCreate xEventGroupCreate
+ * \ingroup EventGroup
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * event_groups.h
+ *<pre>
+ EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
+ </pre>
+ *
+ * Create a new event group.
+ *
+ * Internally, within the FreeRTOS implementation, event groups use a [small]
+ * block of memory, in which the event group's structure is stored.  If an event
+ * groups is created using xEventGropuCreate() then the required memory is
+ * automatically dynamically allocated inside the xEventGroupCreate() function.
+ * (see http://www.freertos.org/a00111.html).  If an event group is created
+ * using xEventGropuCreateStatic() then the application writer must instead
+ * provide the memory that will get used by the event group.
+ * xEventGroupCreateStatic() therefore allows an event group to be created
+ * without using any dynamic memory allocation.
+ *
+ * Although event groups are not related to ticks, for internal implementation
+ * reasons the number of bits available for use in an event group is dependent
+ * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h.  If
+ * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit
+ * 0 to bit 7).  If configUSE_16_BIT_TICKS is set to 0 then each event group has
+ * 24 usable bits (bit 0 to bit 23).  The EventBits_t type is used to store
+ * event bits within an event group.
+ *
+ * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type
+ * StaticEventGroup_t, which will be then be used to hold the event group's data
+ * structures, removing the need for the memory to be allocated dynamically.
+ *
+ * @return If the event group was created then a handle to the event group is
+ * returned.  If pxEventGroupBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+   <pre>
+	// StaticEventGroup_t is a publicly accessible structure that has the same
+	// size and alignment requirements as the real event group structure.  It is
+	// provided as a mechanism for applications to know the size of the event
+	// group (which is dependent on the architecture and configuration file
+	// settings) without breaking the strict data hiding policy by exposing the
+	// real event group internals.  This StaticEventGroup_t variable is passed
+	// into the xSemaphoreCreateEventGroupStatic() function and is used to store
+	// the event group's data structures
+	StaticEventGroup_t xEventGroupBuffer;
+
+	// Create the event group without dynamically allocating any memory.
+	xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
+   </pre>
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupWaitBits( 	EventGroupHandle_t xEventGroup,
+										const EventBits_t uxBitsToWaitFor,
+										const BaseType_t xClearOnExit,
+										const BaseType_t xWaitForAllBits,
+										const TickType_t xTicksToWait );
+ </pre>
+ *
+ * [Potentially] block to wait for one or more bits to be set within a
+ * previously created event group.
+ *
+ * This function cannot be called from an interrupt.
+ *
+ * @param xEventGroup The event group in which the bits are being tested.  The
+ * event group must have previously been created using a call to
+ * xEventGroupCreate().
+ *
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
+ * inside the event group.  For example, to wait for bit 0 and/or bit 2 set
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and/or bit 1 and/or bit 2 set
+ * uxBitsToWaitFor to 0x07.  Etc.
+ *
+ * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within
+ * uxBitsToWaitFor that are set within the event group will be cleared before
+ * xEventGroupWaitBits() returns if the wait condition was met (if the function
+ * returns for a reason other than a timeout).  If xClearOnExit is set to
+ * pdFALSE then the bits set in the event group are not altered when the call to
+ * xEventGroupWaitBits() returns.
+ *
+ * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then
+ * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor
+ * are set or the specified block time expires.  If xWaitForAllBits is set to
+ * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set
+ * in uxBitsToWaitFor is set or the specified block time expires.  The block
+ * time is specified by the xTicksToWait parameter.
+ *
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
+ * for one/all (depending on the xWaitForAllBits value) of the bits specified by
+ * uxBitsToWaitFor to become set.
+ *
+ * @return The value of the event group at the time either the bits being waited
+ * for became set, or the block time expired.  Test the return value to know
+ * which bits were set.  If xEventGroupWaitBits() returned because its timeout
+ * expired then not all the bits being waited for will be set.  If
+ * xEventGroupWaitBits() returned because the bits it was waiting for were set
+ * then the returned value is the event group value before any bits were
+ * automatically cleared in the case that xClearOnExit parameter was set to
+ * pdTRUE.
+ *
+ * Example usage:
+   <pre>
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+		// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
+		// the event group.  Clear the bits before exiting.
+		uxBits = xEventGroupWaitBits(
+					xEventGroup,	// The event group being tested.
+					BIT_0 | BIT_4,	// The bits within the event group to wait for.
+					pdTRUE,			// BIT_0 and BIT_4 should be cleared before returning.
+					pdFALSE,		// Don't wait for both bits, either bit will do.
+					xTicksToWait );	// Wait a maximum of 100ms for either bit to be set.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// xEventGroupWaitBits() returned because both bits were set.
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// xEventGroupWaitBits() returned because just BIT_0 was set.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// xEventGroupWaitBits() returned because just BIT_4 was set.
+		}
+		else
+		{
+			// xEventGroupWaitBits() returned because xTicksToWait ticks passed
+			// without either BIT_0 or BIT_4 becoming set.
+		}
+   }
+   </pre>
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
+ </pre>
+ *
+ * Clear bits within an event group.  This function cannot be called from an
+ * interrupt.
+ *
+ * @param xEventGroup The event group in which the bits are to be cleared.
+ *
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear
+ * in the event group.  For example, to clear bit 3 only, set uxBitsToClear to
+ * 0x08.  To clear bit 3 and bit 0 set uxBitsToClear to 0x09.
+ *
+ * @return The value of the event group before the specified bits were cleared.
+ *
+ * Example usage:
+   <pre>
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+
+		// Clear bit 0 and bit 4 in xEventGroup.
+		uxBits = xEventGroupClearBits(
+								xEventGroup,	// The event group being updated.
+								BIT_0 | BIT_4 );// The bits being cleared.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// Both bit 0 and bit 4 were set before xEventGroupClearBits() was
+			// called.  Both will now be clear (not set).
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// Bit 0 was set before xEventGroupClearBits() was called.  It will
+			// now be clear.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// Bit 4 was set before xEventGroupClearBits() was called.  It will
+			// now be clear.
+		}
+		else
+		{
+			// Neither bit 0 nor bit 4 were set in the first place.
+		}
+   }
+   </pre>
+ * \defgroup xEventGroupClearBits xEventGroupClearBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *<pre>
+	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ </pre>
+ *
+ * A version of xEventGroupClearBits() that can be called from an interrupt.
+ *
+ * Setting bits in an event group is not a deterministic operation because there
+ * are an unknown number of tasks that may be waiting for the bit or bits being
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed
+ * while interrupts are disabled, so protects event groups that are accessed
+ * from tasks by suspending the scheduler rather than disabling interrupts.  As
+ * a result event groups cannot be accessed directly from an interrupt service
+ * routine.  Therefore xEventGroupClearBitsFromISR() sends a message to the
+ * timer task to have the clear operation performed in the context of the timer
+ * task.
+ *
+ * @param xEventGroup The event group in which the bits are to be cleared.
+ *
+ * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear.
+ * For example, to clear bit 3 only, set uxBitsToClear to 0x08.  To clear bit 3
+ * and bit 0 set uxBitsToClear to 0x09.
+ *
+ * @return If the request to execute the function was posted successfully then
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
+ * if the timer service queue was full.
+ *
+ * Example usage:
+   <pre>
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   // An event group which it is assumed has already been created by a call to
+   // xEventGroupCreate().
+   EventGroupHandle_t xEventGroup;
+
+   void anInterruptHandler( void )
+   {
+		// Clear bit 0 and bit 4 in xEventGroup.
+		xResult = xEventGroupClearBitsFromISR(
+							xEventGroup,	 // The event group being updated.
+							BIT_0 | BIT_4 ); // The bits being set.
+
+		if( xResult == pdPASS )
+		{
+			// The message was posted successfully.
+		}
+  }
+   </pre>
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
+ * \ingroup EventGroup
+ */
+#if( configUSE_TRACE_FACILITY == 1 )
+	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+#else
+	#define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
+#endif
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+ </pre>
+ *
+ * Set bits within an event group.
+ * This function cannot be called from an interrupt.  xEventGroupSetBitsFromISR()
+ * is a version that can be called from an interrupt.
+ *
+ * Setting bits in an event group will automatically unblock tasks that are
+ * blocked waiting for the bits.
+ *
+ * @param xEventGroup The event group in which the bits are to be set.
+ *
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
+ * and bit 0 set uxBitsToSet to 0x09.
+ *
+ * @return The value of the event group at the time the call to
+ * xEventGroupSetBits() returns.  There are two reasons why the returned value
+ * might have the bits specified by the uxBitsToSet parameter cleared.  First,
+ * if setting a bit results in a task that was waiting for the bit leaving the
+ * blocked state then it is possible the bit will be cleared automatically
+ * (see the xClearBitOnExit parameter of xEventGroupWaitBits()).  Second, any
+ * unblocked (or otherwise Ready state) task that has a priority above that of
+ * the task that called xEventGroupSetBits() will execute and may change the
+ * event group value before the call to xEventGroupSetBits() returns.
+ *
+ * Example usage:
+   <pre>
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+
+		// Set bit 0 and bit 4 in xEventGroup.
+		uxBits = xEventGroupSetBits(
+							xEventGroup,	// The event group being updated.
+							BIT_0 | BIT_4 );// The bits being set.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// Both bit 0 and bit 4 remained set when the function returned.
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// Bit 0 remained set when the function returned, but bit 4 was
+			// cleared.  It might be that bit 4 was cleared automatically as a
+			// task that was waiting for bit 4 was removed from the Blocked
+			// state.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// Bit 4 remained set when the function returned, but bit 0 was
+			// cleared.  It might be that bit 0 was cleared automatically as a
+			// task that was waiting for bit 0 was removed from the Blocked
+			// state.
+		}
+		else
+		{
+			// Neither bit 0 nor bit 4 remained set.  It might be that a task
+			// was waiting for both of the bits to be set, and the bits were
+			// cleared as the task left the Blocked state.
+		}
+   }
+   </pre>
+ * \defgroup xEventGroupSetBits xEventGroupSetBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *<pre>
+	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
+ </pre>
+ *
+ * A version of xEventGroupSetBits() that can be called from an interrupt.
+ *
+ * Setting bits in an event group is not a deterministic operation because there
+ * are an unknown number of tasks that may be waiting for the bit or bits being
+ * set.  FreeRTOS does not allow nondeterministic operations to be performed in
+ * interrupts or from critical sections.  Therefore xEventGroupSetBitsFromISR()
+ * sends a message to the timer task to have the set operation performed in the
+ * context of the timer task - where a scheduler lock is used in place of a
+ * critical section.
+ *
+ * @param xEventGroup The event group in which the bits are to be set.
+ *
+ * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.
+ * For example, to set bit 3 only, set uxBitsToSet to 0x08.  To set bit 3
+ * and bit 0 set uxBitsToSet to 0x09.
+ *
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
+ * will result in a message being sent to the timer daemon task.  If the
+ * priority of the timer daemon task is higher than the priority of the
+ * currently running task (the task the interrupt interrupted) then
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE by
+ * xEventGroupSetBitsFromISR(), indicating that a context switch should be
+ * requested before the interrupt exits.  For that reason
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
+ * example code below.
+ *
+ * @return If the request to execute the function was posted successfully then
+ * pdPASS is returned, otherwise pdFALSE is returned.  pdFALSE will be returned
+ * if the timer service queue was full.
+ *
+ * Example usage:
+   <pre>
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   // An event group which it is assumed has already been created by a call to
+   // xEventGroupCreate().
+   EventGroupHandle_t xEventGroup;
+
+   void anInterruptHandler( void )
+   {
+   BaseType_t xHigherPriorityTaskWoken, xResult;
+
+		// xHigherPriorityTaskWoken must be initialised to pdFALSE.
+		xHigherPriorityTaskWoken = pdFALSE;
+
+		// Set bit 0 and bit 4 in xEventGroup.
+		xResult = xEventGroupSetBitsFromISR(
+							xEventGroup,	// The event group being updated.
+							BIT_0 | BIT_4   // The bits being set.
+							&xHigherPriorityTaskWoken );
+
+		// Was the message posted successfully?
+		if( xResult == pdPASS )
+		{
+			// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+			// switch should be requested.  The macro used is port specific and
+			// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
+			// refer to the documentation page for the port being used.
+			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+		}
+  }
+   </pre>
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
+ * \ingroup EventGroup
+ */
+#if( configUSE_TRACE_FACILITY == 1 )
+	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#else
+	#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
+#endif
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupSync(	EventGroupHandle_t xEventGroup,
+									const EventBits_t uxBitsToSet,
+									const EventBits_t uxBitsToWaitFor,
+									TickType_t xTicksToWait );
+ </pre>
+ *
+ * Atomically set bits within an event group, then wait for a combination of
+ * bits to be set within the same event group.  This functionality is typically
+ * used to synchronise multiple tasks, where each task has to wait for the other
+ * tasks to reach a synchronisation point before proceeding.
+ *
+ * This function cannot be used from an interrupt.
+ *
+ * The function will return before its block time expires if the bits specified
+ * by the uxBitsToWait parameter are set, or become set within that time.  In
+ * this case all the bits specified by uxBitsToWait will be automatically
+ * cleared before the function returns.
+ *
+ * @param xEventGroup The event group in which the bits are being tested.  The
+ * event group must have previously been created using a call to
+ * xEventGroupCreate().
+ *
+ * @param uxBitsToSet The bits to set in the event group before determining
+ * if, and possibly waiting for, all the bits specified by the uxBitsToWait
+ * parameter are set.
+ *
+ * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test
+ * inside the event group.  For example, to wait for bit 0 and bit 2 set
+ * uxBitsToWaitFor to 0x05.  To wait for bits 0 and bit 1 and bit 2 set
+ * uxBitsToWaitFor to 0x07.  Etc.
+ *
+ * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait
+ * for all of the bits specified by uxBitsToWaitFor to become set.
+ *
+ * @return The value of the event group at the time either the bits being waited
+ * for became set, or the block time expired.  Test the return value to know
+ * which bits were set.  If xEventGroupSync() returned because its timeout
+ * expired then not all the bits being waited for will be set.  If
+ * xEventGroupSync() returned because all the bits it was waiting for were
+ * set then the returned value is the event group value before any bits were
+ * automatically cleared.
+ *
+ * Example usage:
+ <pre>
+ // Bits used by the three tasks.
+ #define TASK_0_BIT		( 1 << 0 )
+ #define TASK_1_BIT		( 1 << 1 )
+ #define TASK_2_BIT		( 1 << 2 )
+
+ #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
+
+ // Use an event group to synchronise three tasks.  It is assumed this event
+ // group has already been created elsewhere.
+ EventGroupHandle_t xEventBits;
+
+ void vTask0( void *pvParameters )
+ {
+ EventBits_t uxReturn;
+ TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 0 in the event flag to note this task has reached the
+		// sync point.  The other two tasks will set the other two bits defined
+		// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
+		// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
+		// for this to happen.
+		uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
+
+		if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
+		{
+			// All three tasks reached the synchronisation point before the call
+			// to xEventGroupSync() timed out.
+		}
+	}
+ }
+
+ void vTask1( void *pvParameters )
+ {
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 1 in the event flag to note this task has reached the
+		// synchronisation point.  The other two tasks will set the other two
+		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+		// indefinitely for this to happen.
+		xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+		// xEventGroupSync() was called with an indefinite block time, so
+		// this task will only reach here if the syncrhonisation was made by all
+		// three tasks, so there is no need to test the return value.
+	 }
+ }
+
+ void vTask2( void *pvParameters )
+ {
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 2 in the event flag to note this task has reached the
+		// synchronisation point.  The other two tasks will set the other two
+		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+		// indefinitely for this to happen.
+		xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+		// xEventGroupSync() was called with an indefinite block time, so
+		// this task will only reach here if the syncrhonisation was made by all
+		// three tasks, so there is no need to test the return value.
+	}
+ }
+
+ </pre>
+ * \defgroup xEventGroupSync xEventGroupSync
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
+ </pre>
+ *
+ * Returns the current value of the bits in an event group.  This function
+ * cannot be used from an interrupt.
+ *
+ * @param xEventGroup The event group being queried.
+ *
+ * @return The event group bits at the time xEventGroupGetBits() was called.
+ *
+ * \defgroup xEventGroupGetBits xEventGroupGetBits
+ * \ingroup EventGroup
+ */
+#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 )
+
+/**
+ * event_groups.h
+ *<pre>
+	EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
+ </pre>
+ *
+ * A version of xEventGroupGetBits() that can be called from an ISR.
+ *
+ * @param xEventGroup The event group being queried.
+ *
+ * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.
+ *
+ * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *<pre>
+	void xEventGroupDelete( EventGroupHandle_t xEventGroup );
+ </pre>
+ *
+ * Delete an event group that was previously created by a call to
+ * xEventGroupCreate().  Tasks that are blocked on the event group will be
+ * unblocked and obtain 0 as the event group's value.
+ *
+ * @param xEventGroup The event group being deleted.
+ */
+void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+/* For internal use only. */
+void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;
+void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;
+
+
+#if (configUSE_TRACE_FACILITY == 1)
+	UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION;
+	void vEventGroupSetNumber( void* xEventGroup, UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EVENT_GROUPS_H */
+
+

FreeRTOS/Source/include/list.h

@@ -1,73 +1,36 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 /*
  * This is the list implementation used by the scheduler.  While it is tailored
  * heavily for the schedulers needs, it is also available for use by
  * application code.
  *
- * xLists can only store pointers to xListItems.  Each xListItem contains a
+ * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
  * numeric value (xItemValue).  Most of the time the lists are sorted in
  * descending item value order.
  *
@@ -90,6 +53,9 @@
  * \ingroup FreeRTOSIntro
  */
 
+#ifndef INC_FREERTOS_H
+	#error FreeRTOS.h must be included before list.h
+#endif
 
 #ifndef LIST_H
 #define LIST_H
@@ -114,8 +80,8 @@
  * complete and obvious failure of the scheduler.  If this is ever experienced
  * then the volatile qualifier can be inserted in the relevant places within the
  * list structures by simply defining configLIST_VOLATILE to volatile in
- * FreeRTOSConfig.h (as per the example at the bottom of this comment block).  
- * If configLIST_VOLATILE is not defined then the preprocessor directives below 
+ * FreeRTOSConfig.h (as per the example at the bottom of this comment block).
+ * If configLIST_VOLATILE is not defined then the preprocessor directives below
  * will simply #define configLIST_VOLATILE away completely.
  *
  * To use volatile list structure members then add the following line to
@@ -129,36 +95,80 @@
 #ifdef __cplusplus
 extern "C" {
 #endif
+
+/* Macros that can be used to place known values within the list structures,
+then check that the known values do not get corrupted during the execution of
+the application.   These may catch the list data structures being overwritten in
+memory.  They will not catch data errors caused by incorrect configuration or
+use of FreeRTOS.*/
+#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
+	/* Define the macros to do nothing. */
+	#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
+	#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
+	#define listFIRST_LIST_INTEGRITY_CHECK_VALUE
+	#define listSECOND_LIST_INTEGRITY_CHECK_VALUE
+	#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+	#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+	#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
+	#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
+	#define listTEST_LIST_ITEM_INTEGRITY( pxItem )
+	#define listTEST_LIST_INTEGRITY( pxList )
+#else
+	/* Define macros that add new members into the list structures. */
+	#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE				TickType_t xListItemIntegrityValue1;
+	#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE				TickType_t xListItemIntegrityValue2;
+	#define listFIRST_LIST_INTEGRITY_CHECK_VALUE					TickType_t xListIntegrityValue1;
+	#define listSECOND_LIST_INTEGRITY_CHECK_VALUE					TickType_t xListIntegrityValue2;
+
+	/* Define macros that set the new structure members to known values. */
+	#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )		( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+	#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )	( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+	#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )		( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+	#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )		( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+
+	/* Define macros that will assert if one of the structure members does not
+	contain its expected value. */
+	#define listTEST_LIST_ITEM_INTEGRITY( pxItem )		configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+	#define listTEST_LIST_INTEGRITY( pxList )			configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
+
+
 /*
  * Definition of the only type of object that a list can contain.
  */
+struct xLIST;
 struct xLIST_ITEM
 {
-	configLIST_VOLATILE portTickType xItemValue;	/*< The value being listed.  In most cases this is used to sort the list in descending order. */
-	struct xLIST_ITEM * configLIST_VOLATILE pxNext;	/*< Pointer to the next xListItem in the list. */
-	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;/*< Pointer to the previous xListItem in the list. */
-	void * pvOwner;									/*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
-	void * configLIST_VOLATILE pvContainer;			/*< Pointer to the list in which this list item is placed (if any). */
+	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	configLIST_VOLATILE TickType_t xItemValue;			/*< The value being listed.  In most cases this is used to sort the list in descending order. */
+	struct xLIST_ITEM * configLIST_VOLATILE pxNext;		/*< Pointer to the next ListItem_t in the list. */
+	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;	/*< Pointer to the previous ListItem_t in the list. */
+	void * pvOwner;										/*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
+	struct xLIST * configLIST_VOLATILE pxContainer;		/*< Pointer to the list in which this list item is placed (if any). */
+	listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 };
-typedef struct xLIST_ITEM xListItem;				/* For some reason lint wants this as two separate definitions. */
+typedef struct xLIST_ITEM ListItem_t;					/* For some reason lint wants this as two separate definitions. */
 
 struct xMINI_LIST_ITEM
 {
-	configLIST_VOLATILE portTickType xItemValue;
+	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	configLIST_VOLATILE TickType_t xItemValue;
 	struct xLIST_ITEM * configLIST_VOLATILE pxNext;
 	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
 };
-typedef struct xMINI_LIST_ITEM xMiniListItem;
+typedef struct xMINI_LIST_ITEM MiniListItem_t;
 
 /*
  * Definition of the type of queue used by the scheduler.
  */
 typedef struct xLIST
 {
-	configLIST_VOLATILE unsigned portBASE_TYPE uxNumberOfItems;
-	xListItem * configLIST_VOLATILE pxIndex;		/*< Used to walk through the list.  Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */
-	xMiniListItem xListEnd;							/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
-} xList;
+	listFIRST_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	volatile UBaseType_t uxNumberOfItems;
+	ListItem_t * configLIST_VOLATILE pxIndex;			/*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
+	MiniListItem_t xListEnd;							/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
+	listSECOND_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+} List_t;
 
 /*
  * Access macro to set the owner of a list item.  The owner of a list item
@@ -176,7 +186,7 @@ typedef struct xLIST
  * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
  * \ingroup LinkedList
  */
-#define listGET_LIST_ITEM_OWNER( pxListItem )		( pxListItem )->pvOwner
+#define listGET_LIST_ITEM_OWNER( pxListItem )	( ( pxListItem )->pvOwner )
 
 /*
  * Access macro to set the value of the list item.  In most cases the value is
@@ -185,26 +195,50 @@ typedef struct xLIST
  * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
  * \ingroup LinkedList
  */
-#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )		( ( pxListItem )->xItemValue = ( xValue ) )
+#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )	( ( pxListItem )->xItemValue = ( xValue ) )
 
 /*
  * Access macro to retrieve the value of the list item.  The value can
- * represent anything - for example a the priority of a task, or the time at
+ * represent anything - for example the priority of a task, or the time at
  * which a task should be unblocked.
  *
  * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
  * \ingroup LinkedList
  */
-#define listGET_LIST_ITEM_VALUE( pxListItem )				( ( pxListItem )->xItemValue )
+#define listGET_LIST_ITEM_VALUE( pxListItem )	( ( pxListItem )->xItemValue )
 
 /*
- * Access macro the retrieve the value of the list item at the head of a given
+ * Access macro to retrieve the value of the list item at the head of a given
  * list.
  *
  * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
  * \ingroup LinkedList
  */
-#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )			( (&( ( pxList )->xListEnd ))->pxNext->xItemValue )
+#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )	( ( ( pxList )->xListEnd ).pxNext->xItemValue )
+
+/*
+ * Return the list item at the head of the list.
+ *
+ * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_HEAD_ENTRY( pxList )	( ( ( pxList )->xListEnd ).pxNext )
+
+/*
+ * Return the list item at the head of the list.
+ *
+ * \page listGET_NEXT listGET_NEXT
+ * \ingroup LinkedList
+ */
+#define listGET_NEXT( pxListItem )	( ( pxListItem )->pxNext )
+
+/*
+ * Return the list item that marks the end of the list
+ *
+ * \page listGET_END_MARKER listGET_END_MARKER
+ * \ingroup LinkedList
+ */
+#define listGET_END_MARKER( pxList )	( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
 
 /*
  * Access macro to determine if a list contains any items.  The macro will
@@ -213,19 +247,19 @@ typedef struct xLIST
  * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
  * \ingroup LinkedList
  */
-#define listLIST_IS_EMPTY( pxList )				( ( portBASE_TYPE ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 ) )
+#define listLIST_IS_EMPTY( pxList )	( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
 
 /*
  * Access macro to return the number of items in the list.
  */
-#define listCURRENT_LIST_LENGTH( pxList )		( ( pxList )->uxNumberOfItems )
+#define listCURRENT_LIST_LENGTH( pxList )	( ( pxList )->uxNumberOfItems )
 
 /*
  * Access function to obtain the owner of the next entry in a list.
  *
  * The list member pxIndex is used to walk through a list.  Calling
  * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
- * and returns that entries pxOwner parameter.  Using multiple calls to this
+ * and returns that entry's pxOwner parameter.  Using multiple calls to this
  * function it is therefore possible to move through every item contained in
  * a list.
  *
@@ -234,6 +268,7 @@ typedef struct xLIST
  * The pxOwner parameter effectively creates a two way link between the list
  * item and its owner.
  *
+ * @param pxTCB pxTCB is set to the address of the owner of the next list item.
  * @param pxList The list from which the next item owner is to be returned.
  *
  * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
@@ -241,7 +276,7 @@ typedef struct xLIST
  */
 #define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )										\
 {																							\
-xList * const pxConstList = ( pxList );														\
+List_t * const pxConstList = ( pxList );													\
 	/* Increment the index to the next item and return the item, ensuring */				\
 	/* we don't return the marker used at the end of the list.  */							\
 	( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;							\
@@ -278,18 +313,17 @@ xList * const pxConstList = ( pxList );														\
  *
  * @param pxList The list we want to know if the list item is within.
  * @param pxListItem The list item we want to know if is in the list.
- * @return pdTRUE is the list item is in the list, otherwise pdFALSE.
- * pointer against
+ * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
  */
-#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( portBASE_TYPE ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) )
+#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
 
 /*
  * Return the list a list item is contained within (referenced from).
  *
  * @param pxListItem The list item being queried.
- * @return A pointer to the xList object that references the pxListItem
+ * @return A pointer to the List_t object that references the pxListItem
  */
-#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pvContainer )
+#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )
 
 /*
  * This provides a crude means of knowing if a list has been initialised, as
@@ -308,7 +342,7 @@ xList * const pxConstList = ( pxList );														\
  * \page vListInitialise vListInitialise
  * \ingroup LinkedList
  */
-void vListInitialise( xList * const pxList );
+void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
 
 /*
  * Must be called before a list item is used.  This sets the list container to
@@ -319,7 +353,7 @@ void vListInitialise( xList * const pxList );
  * \page vListInitialiseItem vListInitialiseItem
  * \ingroup LinkedList
  */
-void vListInitialiseItem( xListItem * const pxItem );
+void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert a list item into a list.  The item will be inserted into the list in
@@ -327,24 +361,24 @@ void vListInitialiseItem( xListItem * const pxItem );
  *
  * @param pxList The list into which the item is to be inserted.
  *
- * @param pxNewListItem The item to that is to be placed in the list.
+ * @param pxNewListItem The item that is to be placed in the list.
  *
  * \page vListInsert vListInsert
  * \ingroup LinkedList
  */
-void vListInsert( xList * const pxList, xListItem * const pxNewListItem );
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert a list item into a list.  The item will be inserted in a position
  * such that it will be the last item within the list returned by multiple
  * calls to listGET_OWNER_OF_NEXT_ENTRY.
  *
- * The list member pvIndex is used to walk through a list.  Calling
- * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list.
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
  * Placing an item in a list using vListInsertEnd effectively places the item
- * in the list position pointed to by pvIndex.  This means that every other
+ * in the list position pointed to by pxIndex.  This means that every other
  * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
- * the pvIndex parameter again points to the item being inserted.
+ * the pxIndex parameter again points to the item being inserted.
  *
  * @param pxList The list into which the item is to be inserted.
  *
@@ -353,7 +387,7 @@ void vListInsert( xList * const pxList, xListItem * const pxNewListItem );
  * \page vListInsertEnd vListInsertEnd
  * \ingroup LinkedList
  */
-void vListInsertEnd( xList * const pxList, xListItem * const pxNewListItem );
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Remove an item from a list.  The list item has a pointer to the list that
@@ -368,7 +402,7 @@ void vListInsertEnd( xList * const pxList, xListItem * const pxNewListItem );
  * \page uxListRemove uxListRemove
  * \ingroup LinkedList
  */
-unsigned portBASE_TYPE uxListRemove( xListItem * const pxItemToRemove );
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
 
 #ifdef __cplusplus
 }

FreeRTOS/Source/include/message_buffer.h

@@ -0,0 +1,798 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+/*
+ * Message buffers build functionality on top of FreeRTOS stream buffers.
+ * Whereas stream buffers are used to send a continuous stream of data from one
+ * task or interrupt to another, message buffers are used to send variable
+ * length discrete messages from one task or interrupt to another.  Their
+ * implementation is light weight, making them particularly suited for interrupt
+ * to task and core to core communication scenarios.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * timeout to 0.
+ *
+ * Message buffers hold variable length messages.  To enable that, when a
+ * message is written to the message buffer an additional sizeof( size_t ) bytes
+ * are also written to store the message's length (that happens internally, with
+ * the API function).  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so writing a 10 byte message to a message buffer on a 32-bit
+ * architecture will actually reduce the available space in the message buffer
+ * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length
+ * of the message).
+ */
+
+#ifndef FREERTOS_MESSAGE_BUFFER_H
+#define FREERTOS_MESSAGE_BUFFER_H
+
+/* Message buffers are built onto of stream buffers. */
+#include "stream_buffer.h"
+
+#if defined( __cplusplus )
+extern "C" {
+#endif
+
+/**
+ * Type by which message buffers are referenced.  For example, a call to
+ * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can
+ * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),
+ * etc.
+ */
+typedef void * MessageBufferHandle_t;
+
+/*-----------------------------------------------------------*/
+
+/**
+ * message_buffer.h
+ *
+<pre>
+MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
+</pre>
+ *
+ * Creates a new message buffer using dynamically allocated memory.  See
+ * xMessageBufferCreateStatic() for a version that uses statically allocated
+ * memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xMessageBufferCreate() to be available.
+ *
+ * @param xBufferSizeBytes The total number of bytes (not messages) the message
+ * buffer will be able to hold at any one time.  When a message is written to
+ * the message buffer an additional sizeof( size_t ) bytes are also written to
+ * store the message's length.  sizeof( size_t ) is typically 4 bytes on a
+ * 32-bit architecture, so on most 32-bit architectures a 10 byte message will
+ * take up 14 bytes of message buffer space.
+ *
+ * @return If NULL is returned, then the message buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the message buffer data structures and storage area.  A non-NULL value being
+ * returned indicates that the message buffer has been created successfully -
+ * the returned value should be stored as the handle to the created message
+ * buffer.
+ *
+ * Example use:
+<pre>
+
+void vAFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+const size_t xMessageBufferSizeBytes = 100;
+
+    // Create a message buffer that can hold 100 bytes.  The memory used to hold
+    // both the message buffer structure and the messages themselves is allocated
+    // dynamically.  Each message added to the buffer consumes an additional 4
+    // bytes which are used to hold the lengh of the message.
+    xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
+
+    if( xMessageBuffer == NULL )
+    {
+        // There was not enough heap memory space available to create the
+        // message buffer.
+    }
+    else
+    {
+        // The message buffer was created successfully and can now be used.
+    }
+
+</pre>
+ * \defgroup xMessageBufferCreate xMessageBufferCreate
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
+                                                  uint8_t *pucMessageBufferStorageArea,
+                                                  StaticMessageBuffer_t *pxStaticMessageBuffer );
+</pre>
+ * Creates a new message buffer using statically allocated memory.  See
+ * xMessageBufferCreate() for a version that uses dynamically allocated memory.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucMessageBufferStorageArea parameter.  When a message is written to the
+ * message buffer an additional sizeof( size_t ) bytes are also written to store
+ * the message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so on most 32-bit architecture a 10 byte message will take up
+ * 14 bytes of message buffer space.  The maximum number of bytes that can be
+ * stored in the message buffer is actually (xBufferSizeBytes - 1).
+ *
+ * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes + 1 big.  This is the array to which messages are
+ * copied when they are written to the message buffer.
+ *
+ * @param pxStaticMessageBuffer Must point to a variable of type
+ * StaticMessageBuffer_t, which will be used to hold the message buffer's data
+ * structure.
+ *
+ * @return If the message buffer is created successfully then a handle to the
+ * created message buffer is returned. If either pucMessageBufferStorageArea or
+ * pxStaticmessageBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+<pre>
+
+// Used to dimension the array used to hold the messages.  The available space
+// will actually be one less than this, so 999.
+#define STORAGE_SIZE_BYTES 1000
+
+// Defines the memory that will actually hold the messages within the message
+// buffer.
+static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+
+// The variable used to hold the message buffer structure.
+StaticMessageBuffer_t xMessageBufferStruct;
+
+void MyFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+
+    xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
+                                                 ucBufferStorage,
+                                                 &xMessageBufferStruct );
+
+    // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
+    // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
+    // reference the created message buffer in other message buffer API calls.
+
+    // Other code that uses the message buffer can go here.
+}
+
+</pre>
+ * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
+                           const void *pvTxData,
+                           size_t xDataLengthBytes,
+                           TickType_t xTicksToWait );
+<pre>
+ *
+ * Sends a discrete message to the message buffer.  The message can be any
+ * length that fits within the buffer's free space, and is copied into the
+ * buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param xTicksToWait The maximum amount of time the calling task should remain
+ * in the Blocked state to wait for enough space to become available in the
+ * message buffer, should the message buffer have insufficient space when
+ * xMessageBufferSend() is called.  The calling task will never block if
+ * xTicksToWait is zero.  The block time is specified in tick periods, so the
+ * absolute time it represents is dependent on the tick frequency.  The macro
+ * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into
+ * a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will cause
+ * the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The number of bytes written to the message buffer.  If the call to
+ * xMessageBufferSend() times out before there was enough space to write the
+ * message into the message buffer then zero is returned.  If the call did not
+ * time out then xDataLengthBytes is returned.
+ *
+ * Example use:
+<pre>
+void vAFunction( MessageBufferHandle_t xMessageBuffer )
+{
+size_t xBytesSent;
+uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+char *pcStringToSend = "String to send";
+const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+
+    // Send an array to the message buffer, blocking for a maximum of 100ms to
+    // wait for enough space to be available in the message buffer.
+    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+
+    if( xBytesSent != sizeof( ucArrayToSend ) )
+    {
+        // The call to xMessageBufferSend() times out before there was enough
+        // space in the buffer for the data to be written.
+    }
+
+    // Send the string to the message buffer.  Return immediately if there is
+    // not enough space in the buffer.
+    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The string could not be added to the message buffer because there was
+        // not enough free space in the buffer.
+    }
+}
+</pre>
+ * \defgroup xMessageBufferSend xMessageBufferSend
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
+                                  const void *pvTxData,
+                                  size_t xDataLengthBytes,
+                                  BaseType_t *pxHigherPriorityTaskWoken );
+<pre>
+ *
+ * Interrupt safe version of the API function that sends a discrete message to
+ * the message buffer.  The message can be any length that fits within the
+ * buffer's free space, and is copied into the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xMessageBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xMessageBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes actually written to the message buffer.  If the
+ * message buffer didn't have enough free space for the message to be stored
+ * then 0 is returned, otherwise xDataLengthBytes is returned.
+ *
+ * Example use:
+<pre>
+// A message buffer that has already been created.
+MessageBufferHandle_t xMessageBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+size_t xBytesSent;
+char *pcStringToSend = "String to send";
+BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+
+    // Attempt to send the string to the message buffer.
+    xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
+                                            ( void * ) pcStringToSend,
+                                            strlen( pcStringToSend ),
+                                            &xHigherPriorityTaskWoken );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The string could not be added to the message buffer because there was
+        // not enough free space in the buffer.
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xMessageBufferSendFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+</pre>
+ * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
+                              void *pvRxData,
+                              size_t xBufferLengthBytes,
+                              TickType_t xTicksToWait );
+</pre>
+ *
+ * Receives a discrete message from a message buffer.  Messages can be of
+ * variable length and are copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for a message, should the message buffer be empty.
+ * xMessageBufferReceive() will return immediately if xTicksToWait is zero and
+ * the message buffer is empty.  The block time is specified in tick periods, so
+ * the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.  If xMessageBufferReceive() times out before a message became available
+ * then zero is returned.  If the length of the message is greater than
+ * xBufferLengthBytes then the message will be left in the message buffer and
+ * zero is returned.
+ *
+ * Example use:
+<pre>
+void vAFunction( MessageBuffer_t xMessageBuffer )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+
+    // Receive the next message from the message buffer.  Wait in the Blocked
+    // state (so not using any CPU processing time) for a maximum of 100ms for
+    // a message to become available.
+    xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
+                                            ( void * ) ucRxData,
+                                            sizeof( ucRxData ),
+                                            xBlockTime );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains a message that is xReceivedBytes long.  Process
+        // the message here....
+    }
+}
+</pre>
+ * \defgroup xMessageBufferReceive xMessageBufferReceive
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
+
+
+/**
+ * message_buffer.h
+ *
+<pre>
+size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
+                                     void *pvRxData,
+                                     size_t xBufferLengthBytes,
+                                     BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * An interrupt safe version of the API function that receives a discrete
+ * message from a message buffer.  Messages can be of variable length and are
+ * copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xMessageBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.
+ *
+ * Example use:
+<pre>
+// A message buffer that has already been created.
+MessageBuffer_t xMessageBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+
+    // Receive the next message from the message buffer.
+    xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
+                                                  ( void * ) ucRxData,
+                                                  sizeof( ucRxData ),
+                                                  &xHigherPriorityTaskWoken );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains a message that is xReceivedBytes long.  Process
+        // the message here....
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xMessageBufferReceiveFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+</pre>
+ * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
+</pre>
+ *
+ * Deletes a message buffer that was previously created using a call to
+ * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message
+ * buffer was created using dynamic memory (that is, by xMessageBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A message buffer handle must not be used after the message buffer has been
+ * deleted.
+ *
+ * @param xMessageBuffer The handle of the message buffer to be deleted.
+ *
+ */
+#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+<pre>
+BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
+</pre>
+ *
+ * Tests to see if a message buffer is full.  A message buffer is full if it
+ * cannot accept any more messages, of any size, until space is made available
+ * by a message being removed from the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is full then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ */
+#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+<pre>
+BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
+</pre>
+ *
+ * Tests to see if a message buffer is empty (does not contain any messages).
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is empty then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ *
+ */
+#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+<pre>
+BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
+</pre>
+ *
+ * Resets a message buffer to its initial empty state, discarding any message it
+ * contained.
+ *
+ * A message buffer can only be reset if there are no tasks blocked on it.
+ *
+ * @param xMessageBuffer The handle of the message buffer being reset.
+ *
+ * @return If the message buffer was reset then pdPASS is returned.  If the
+ * message buffer could not be reset because either there was a task blocked on
+ * the message queue to wait for space to become available, or to wait for a
+ * a message to be available, then pdFAIL is returned.
+ *
+ * \defgroup xMessageBufferReset xMessageBufferReset
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
+
+
+/**
+ * message_buffer.h
+<pre>
+size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
+</pre>
+ * Returns the number of bytes of free space in the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The number of bytes that can be written to the message buffer before
+ * the message buffer would be full.  When a message is written to the message
+ * buffer an additional sizeof( size_t ) bytes are also written to store the
+ * message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size
+ * of the largest message that can be written to the message buffer is 6 bytes.
+ *
+ * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+ <pre>
+ size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
+ </pre>
+ * Returns the length (in bytes) of the next message in a message buffer.
+ * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
+ * passed into xMessageBufferReceive() was too small to hold the next message.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The length (in bytes) of the next message in the message buffer, or 0
+ * if the message buffer is empty.
+ *
+ * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * message_buffer.h
+ *
+<pre>
+BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xMessageBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferSendCompletedFromISR().  If calling
+ * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+<pre>
+BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xMessageBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferReceiveCompletedFromISR().  If calling
+ * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+#if defined( __cplusplus )
+} /* extern "C" */
+#endif
+
+#endif	/* !defined( FREERTOS_MESSAGE_BUFFER_H ) */

FreeRTOS/Source/include/mpu_prototypes.h

@@ -0,0 +1,157 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * When the MPU is used the standard (non MPU) API functions are mapped to
+ * equivalents that start "MPU_", the prototypes for which are defined in this
+ * header files.  This will cause the application code to call the MPU_ version
+ * which wraps the non-MPU version with privilege promoting then demoting code,
+ * so the kernel code always runs will full privileges.
+ */
+
+
+#ifndef MPU_PROTOTYPES_H
+#define MPU_PROTOTYPES_H
+
+/* MPU versions of tasks.h API functions. */
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
+char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of queue.h API functions. */
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of timers.h API functions. */
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of event_group.h API functions. */
+EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of message/stream_buffer.h API functions. */
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
+
+
+
+#endif /* MPU_PROTOTYPES_H */
+

FreeRTOS/Source/include/mpu_wrappers.h

@@ -1,66 +1,29 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 #ifndef MPU_WRAPPERS_H
 #define MPU_WRAPPERS_H
@@ -74,68 +37,138 @@ only for ports that are using the MPU. */
 	those files. */
 	#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
 
-		#define xTaskGenericCreate				MPU_xTaskGenericCreate
-		#define vTaskAllocateMPURegions			MPU_vTaskAllocateMPURegions
-		#define vTaskDelete						MPU_vTaskDelete
-		#define vTaskDelayUntil					MPU_vTaskDelayUntil
-		#define vTaskDelay						MPU_vTaskDelay
-		#define uxTaskPriorityGet				MPU_uxTaskPriorityGet
-		#define vTaskPrioritySet				MPU_vTaskPrioritySet
-		#define eTaskGetState					MPU_eTaskGetState
-		#define vTaskSuspend					MPU_vTaskSuspend
-		#define xTaskIsTaskSuspended			MPU_xTaskIsTaskSuspended
-		#define vTaskResume						MPU_vTaskResume
-		#define vTaskSuspendAll					MPU_vTaskSuspendAll
-		#define xTaskResumeAll					MPU_xTaskResumeAll
-		#define xTaskGetTickCount				MPU_xTaskGetTickCount
-		#define uxTaskGetNumberOfTasks			MPU_uxTaskGetNumberOfTasks
-		#define vTaskList						MPU_vTaskList
-		#define vTaskGetRunTimeStats			MPU_vTaskGetRunTimeStats
-		#define vTaskSetApplicationTaskTag		MPU_vTaskSetApplicationTaskTag
-		#define xTaskGetApplicationTaskTag		MPU_xTaskGetApplicationTaskTag
-		#define xTaskCallApplicationTaskHook	MPU_xTaskCallApplicationTaskHook
-		#define uxTaskGetStackHighWaterMark		MPU_uxTaskGetStackHighWaterMark
-		#define xTaskGetCurrentTaskHandle		MPU_xTaskGetCurrentTaskHandle
-		#define xTaskGetSchedulerState			MPU_xTaskGetSchedulerState
-		#define xTaskGetIdleTaskHandle			MPU_xTaskGetIdleTaskHandle
-		#define uxTaskGetSystemState			MPU_uxTaskGetSystemState
+		/*
+		 * Map standard (non MPU) API functions to equivalents that start
+		 * "MPU_".  This will cause the application code to call the MPU_
+		 * version, which wraps the non-MPU version with privilege promoting
+		 * then demoting code, so the kernel code always runs will full
+		 * privileges.
+		 */
 
-		#define xQueueGenericCreate				MPU_xQueueGenericCreate
-		#define xQueueCreateMutex				MPU_xQueueCreateMutex
-		#define xQueueGiveMutexRecursive		MPU_xQueueGiveMutexRecursive
-		#define xQueueTakeMutexRecursive		MPU_xQueueTakeMutexRecursive
-		#define xQueueCreateCountingSemaphore	MPU_xQueueCreateCountingSemaphore
-		#define xQueueGenericSend				MPU_xQueueGenericSend
-		#define xQueueAltGenericSend			MPU_xQueueAltGenericSend
-		#define xQueueAltGenericReceive			MPU_xQueueAltGenericReceive
-		#define xQueueGenericReceive			MPU_xQueueGenericReceive
-		#define uxQueueMessagesWaiting			MPU_uxQueueMessagesWaiting
-		#define vQueueDelete					MPU_vQueueDelete
-		#define xQueueGenericReset				MPU_xQueueGenericReset
-		#define xQueueCreateSet					MPU_xQueueCreateSet
-		#define xQueueSelectFromSet				MPU_xQueueSelectFromSet
-		#define xQueueAddToSet					MPU_xQueueAddToSet
-		#define xQueueRemoveFromSet				MPU_xQueueRemoveFromSet
-		#define xQueuePeekFromISR				MPU_xQueuePeekFromISR
+		/* Map standard tasks.h API functions to the MPU equivalents. */
+		#define xTaskCreate								MPU_xTaskCreate
+		#define xTaskCreateStatic						MPU_xTaskCreateStatic
+		#define xTaskCreateRestricted					MPU_xTaskCreateRestricted
+		#define vTaskAllocateMPURegions					MPU_vTaskAllocateMPURegions
+		#define vTaskDelete								MPU_vTaskDelete
+		#define vTaskDelay								MPU_vTaskDelay
+		#define vTaskDelayUntil							MPU_vTaskDelayUntil
+		#define xTaskAbortDelay							MPU_xTaskAbortDelay
+		#define uxTaskPriorityGet						MPU_uxTaskPriorityGet
+		#define eTaskGetState							MPU_eTaskGetState
+		#define vTaskGetInfo							MPU_vTaskGetInfo
+		#define vTaskPrioritySet						MPU_vTaskPrioritySet
+		#define vTaskSuspend							MPU_vTaskSuspend
+		#define vTaskResume								MPU_vTaskResume
+		#define vTaskSuspendAll							MPU_vTaskSuspendAll
+		#define xTaskResumeAll							MPU_xTaskResumeAll
+		#define xTaskGetTickCount						MPU_xTaskGetTickCount
+		#define uxTaskGetNumberOfTasks					MPU_uxTaskGetNumberOfTasks
+		#define pcTaskGetName							MPU_pcTaskGetName
+		#define xTaskGetHandle							MPU_xTaskGetHandle
+		#define uxTaskGetStackHighWaterMark				MPU_uxTaskGetStackHighWaterMark
+		#define uxTaskGetStackHighWaterMark2			MPU_uxTaskGetStackHighWaterMark2
+		#define vTaskSetApplicationTaskTag				MPU_vTaskSetApplicationTaskTag
+		#define xTaskGetApplicationTaskTag				MPU_xTaskGetApplicationTaskTag
+		#define vTaskSetThreadLocalStoragePointer		MPU_vTaskSetThreadLocalStoragePointer
+		#define pvTaskGetThreadLocalStoragePointer		MPU_pvTaskGetThreadLocalStoragePointer
+		#define xTaskCallApplicationTaskHook			MPU_xTaskCallApplicationTaskHook
+		#define xTaskGetIdleTaskHandle					MPU_xTaskGetIdleTaskHandle
+		#define uxTaskGetSystemState					MPU_uxTaskGetSystemState
+		#define vTaskList								MPU_vTaskList
+		#define vTaskGetRunTimeStats					MPU_vTaskGetRunTimeStats
+		#define xTaskGetIdleRunTimeCounter				MPU_xTaskGetIdleRunTimeCounter
+		#define xTaskGenericNotify						MPU_xTaskGenericNotify
+		#define xTaskNotifyWait							MPU_xTaskNotifyWait
+		#define ulTaskNotifyTake						MPU_ulTaskNotifyTake
+		#define xTaskNotifyStateClear					MPU_xTaskNotifyStateClear
 
-		#define pvPortMalloc					MPU_pvPortMalloc
-		#define vPortFree						MPU_vPortFree
-		#define xPortGetFreeHeapSize			MPU_xPortGetFreeHeapSize
-		#define vPortInitialiseBlocks			MPU_vPortInitialiseBlocks
+		#define xTaskGetCurrentTaskHandle				MPU_xTaskGetCurrentTaskHandle
+		#define vTaskSetTimeOutState					MPU_vTaskSetTimeOutState
+		#define xTaskCheckForTimeOut					MPU_xTaskCheckForTimeOut
+		#define xTaskGetSchedulerState					MPU_xTaskGetSchedulerState
 
-		#if configQUEUE_REGISTRY_SIZE > 0
-			#define vQueueAddToRegistry				MPU_vQueueAddToRegistry
-			#define vQueueUnregisterQueue			MPU_vQueueUnregisterQueue
+		/* Map standard queue.h API functions to the MPU equivalents. */
+		#define xQueueGenericSend						MPU_xQueueGenericSend
+		#define xQueueReceive							MPU_xQueueReceive
+		#define xQueuePeek								MPU_xQueuePeek
+		#define xQueueSemaphoreTake						MPU_xQueueSemaphoreTake
+		#define uxQueueMessagesWaiting					MPU_uxQueueMessagesWaiting
+		#define uxQueueSpacesAvailable					MPU_uxQueueSpacesAvailable
+		#define vQueueDelete							MPU_vQueueDelete
+		#define xQueueCreateMutex						MPU_xQueueCreateMutex
+		#define xQueueCreateMutexStatic					MPU_xQueueCreateMutexStatic
+		#define xQueueCreateCountingSemaphore			MPU_xQueueCreateCountingSemaphore
+		#define xQueueCreateCountingSemaphoreStatic		MPU_xQueueCreateCountingSemaphoreStatic
+		#define xQueueGetMutexHolder					MPU_xQueueGetMutexHolder
+		#define xQueueTakeMutexRecursive				MPU_xQueueTakeMutexRecursive
+		#define xQueueGiveMutexRecursive				MPU_xQueueGiveMutexRecursive
+		#define xQueueGenericCreate						MPU_xQueueGenericCreate
+		#define xQueueGenericCreateStatic				MPU_xQueueGenericCreateStatic
+		#define xQueueCreateSet							MPU_xQueueCreateSet
+		#define xQueueAddToSet							MPU_xQueueAddToSet
+		#define xQueueRemoveFromSet						MPU_xQueueRemoveFromSet
+		#define xQueueSelectFromSet						MPU_xQueueSelectFromSet
+		#define xQueueGenericReset						MPU_xQueueGenericReset
+
+		#if( configQUEUE_REGISTRY_SIZE > 0 )
+			#define vQueueAddToRegistry						MPU_vQueueAddToRegistry
+			#define vQueueUnregisterQueue					MPU_vQueueUnregisterQueue
+			#define pcQueueGetName							MPU_pcQueueGetName
 		#endif
 
-		/* Remove the privileged function macro. */
+		/* Map standard timer.h API functions to the MPU equivalents. */
+		#define xTimerCreate							MPU_xTimerCreate
+		#define xTimerCreateStatic						MPU_xTimerCreateStatic
+		#define pvTimerGetTimerID						MPU_pvTimerGetTimerID
+		#define vTimerSetTimerID						MPU_vTimerSetTimerID
+		#define xTimerIsTimerActive						MPU_xTimerIsTimerActive
+		#define xTimerGetTimerDaemonTaskHandle			MPU_xTimerGetTimerDaemonTaskHandle
+		#define xTimerPendFunctionCall					MPU_xTimerPendFunctionCall
+		#define pcTimerGetName							MPU_pcTimerGetName
+		#define vTimerSetReloadMode						MPU_vTimerSetReloadMode
+		#define xTimerGetPeriod							MPU_xTimerGetPeriod
+		#define xTimerGetExpiryTime						MPU_xTimerGetExpiryTime
+		#define xTimerGenericCommand					MPU_xTimerGenericCommand
+
+		/* Map standard event_group.h API functions to the MPU equivalents. */
+		#define xEventGroupCreate						MPU_xEventGroupCreate
+		#define xEventGroupCreateStatic					MPU_xEventGroupCreateStatic
+		#define xEventGroupWaitBits						MPU_xEventGroupWaitBits
+		#define xEventGroupClearBits					MPU_xEventGroupClearBits
+		#define xEventGroupSetBits						MPU_xEventGroupSetBits
+		#define xEventGroupSync							MPU_xEventGroupSync
+		#define vEventGroupDelete						MPU_vEventGroupDelete
+
+		/* Map standard message/stream_buffer.h API functions to the MPU
+		equivalents. */
+		#define xStreamBufferSend						MPU_xStreamBufferSend
+		#define xStreamBufferReceive					MPU_xStreamBufferReceive
+		#define xStreamBufferNextMessageLengthBytes		MPU_xStreamBufferNextMessageLengthBytes
+		#define vStreamBufferDelete						MPU_vStreamBufferDelete
+		#define xStreamBufferIsFull						MPU_xStreamBufferIsFull
+		#define xStreamBufferIsEmpty					MPU_xStreamBufferIsEmpty
+		#define xStreamBufferReset						MPU_xStreamBufferReset
+		#define xStreamBufferSpacesAvailable			MPU_xStreamBufferSpacesAvailable
+		#define xStreamBufferBytesAvailable				MPU_xStreamBufferBytesAvailable
+		#define xStreamBufferSetTriggerLevel			MPU_xStreamBufferSetTriggerLevel
+		#define xStreamBufferGenericCreate				MPU_xStreamBufferGenericCreate
+		#define xStreamBufferGenericCreateStatic		MPU_xStreamBufferGenericCreateStatic
+
+
+		/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
+		macro so applications can place data in privileged access sections
+		(useful when using statically allocated objects). */
 		#define PRIVILEGED_FUNCTION
+		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
+		#define FREERTOS_SYSTEM_CALL
 
 	#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
 		/* Ensure API functions go in the privileged execution section. */
 		#define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
 		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
+		#define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls")))
 
 	#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
 
@@ -143,6 +176,7 @@ only for ports that are using the MPU. */
 
 	#define PRIVILEGED_FUNCTION
 	#define PRIVILEGED_DATA
+	#define FREERTOS_SYSTEM_CALL
 	#define portUSING_MPU_WRAPPERS 0
 
 #endif /* portUSING_MPU_WRAPPERS */

FreeRTOS/Source/include/portable.h

@@ -1,66 +1,29 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 /*-----------------------------------------------------------
  * Portable layer API.  Each function must be defined for each port.
@@ -69,255 +32,34 @@
 #ifndef PORTABLE_H
 #define PORTABLE_H
 
-/* Include the macro file relevant to the port being used. */
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+pre-processor definition was used to ensure the pre-processor found the correct
+portmacro.h file for the port being used.  That scheme was deprecated in favour
+of setting the compiler's include path such that it found the correct
+portmacro.h file - removing the need for the constant and allowing the
+portmacro.h file to be located anywhere in relation to the port being used.
+Purely for reasons of backward compatibility the old method is still valid, but
+to make it clear that new projects should not use it, support for the port
+specific constants has been moved into the deprecated_definitions.h header
+file. */
+#include "deprecated_definitions.h"
 
-#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
-	#include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
-	typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
-	#include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
-	typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef GCC_MEGA_AVR
-	#include "../portable/GCC/ATMega323/portmacro.h"
-#endif
-
-#ifdef IAR_MEGA_AVR
-	#include "../portable/IAR/ATMega323/portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC24_PORT
-	#include "..\..\Source\portable\MPLAB\PIC24_dsPIC\portmacro.h"
-#endif
-
-#ifdef MPLAB_DSPIC_PORT
-	#include "..\..\Source\portable\MPLAB\PIC24_dsPIC\portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC18F_PORT
-	#include "..\..\Source\portable\MPLAB\PIC18F\portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC32MX_PORT
-	#include "..\..\Source\portable\MPLAB\PIC32MX\portmacro.h"
-#endif
-
-#ifdef _FEDPICC
-	#include "libFreeRTOS/Include/portmacro.h"
-#endif
-
-#ifdef SDCC_CYGNAL
-	#include "../../Source/portable/SDCC/Cygnal/portmacro.h"
-#endif
-
-#ifdef GCC_ARM7
-	#include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
-#endif
-
-#ifdef GCC_ARM7_ECLIPSE
-	#include "portmacro.h"
-#endif
-
-#ifdef ROWLEY_LPC23xx
-	#include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
-#endif
-
-#ifdef IAR_MSP430
-	#include "..\..\Source\portable\IAR\MSP430\portmacro.h"
-#endif
-
-#ifdef GCC_MSP430
-	#include "../../Source/portable/GCC/MSP430F449/portmacro.h"
-#endif
-
-#ifdef ROWLEY_MSP430
-	#include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
-#endif
-
-#ifdef ARM7_LPC21xx_KEIL_RVDS
-	#include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
-#endif
-
-#ifdef SAM7_GCC
-	#include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
-#endif
-
-#ifdef SAM7_IAR
-	#include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
-#endif
-
-#ifdef SAM9XE_IAR
-	#include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
-#endif
-
-#ifdef LPC2000_IAR
-	#include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
-#endif
-
-#ifdef STR71X_IAR
-	#include "..\..\Source\portable\IAR\STR71x\portmacro.h"
-#endif
-
-#ifdef STR75X_IAR
-	#include "..\..\Source\portable\IAR\STR75x\portmacro.h"
-#endif
-
-#ifdef STR75X_GCC
-	#include "..\..\Source\portable\GCC\STR75x\portmacro.h"
-#endif
-
-#ifdef STR91X_IAR
-	#include "..\..\Source\portable\IAR\STR91x\portmacro.h"
-#endif
-
-#ifdef GCC_H8S
-	#include "../../Source/portable/GCC/H8S2329/portmacro.h"
-#endif
-
-#ifdef GCC_AT91FR40008
-	#include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
-#endif
-
-#ifdef RVDS_ARMCM3_LM3S102
-	#include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef GCC_ARMCM3_LM3S102
-	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef GCC_ARMCM3
-	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef IAR_ARM_CM3
-	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef IAR_ARMCM3_LM
-	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef HCS12_CODE_WARRIOR
-	#include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
-#endif
-
-#ifdef MICROBLAZE_GCC
-	#include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
-#endif
-
-#ifdef TERN_EE
-	#include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
-#endif
-
-#ifdef GCC_HCS12
-	#include "../../Source/portable/GCC/HCS12/portmacro.h"
-#endif
-
-#ifdef GCC_MCF5235
-    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
-#endif
-
-#ifdef COLDFIRE_V2_GCC
-	#include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
-#endif
-
-#ifdef COLDFIRE_V2_CODEWARRIOR
-	#include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
-#endif
-
-#ifdef GCC_PPC405
-	#include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
-#endif
-
-#ifdef GCC_PPC440
-	#include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
-#endif
-
-#ifdef _16FX_SOFTUNE
-	#include "..\..\Source\portable\Softune\MB96340\portmacro.h"
-#endif
-
-#ifdef BCC_INDUSTRIAL_PC_PORT
-	/* A short file name has to be used in place of the normal
-	FreeRTOSConfig.h when using the Borland compiler. */
-	#include "frconfig.h"
-	#include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
-    typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef BCC_FLASH_LITE_186_PORT
-	/* A short file name has to be used in place of the normal
-	FreeRTOSConfig.h when using the Borland compiler. */
-	#include "frconfig.h"
-	#include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
-    typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef __GNUC__
-   #ifdef __AVR32_AVR32A__
-	   #include "portmacro.h"
-   #endif
-#endif
-
-#ifdef __ICCAVR32__
-   #ifdef __CORE__
-      #if __CORE__ == __AVR32A__
-	      #include "portmacro.h"
-      #endif
-   #endif
-#endif
-
-#ifdef __91467D
-	#include "portmacro.h"
-#endif
-
-#ifdef __96340
-	#include "portmacro.h"
-#endif
-
-
-#ifdef __IAR_V850ES_Fx3__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx3__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx3_L__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx2__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Hx2__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_78K0R_Kx3__
-	#include "../../Source/portable/IAR/78K0R/portmacro.h"
-#endif
-
-#ifdef __IAR_78K0R_Kx3L__
-	#include "../../Source/portable/IAR/78K0R/portmacro.h"
-#endif
-
-/* Catch all to ensure portmacro.h is included in the build.  Newer demos
-have the path as part of the project options, rather than as relative from
-the project location.  If portENTER_CRITICAL() has not been defined then
-portmacro.h has not yet been included - as every portmacro.h provides a
-portENTER_CRITICAL() definition.  Check the demo application for your demo
-to find the path to the correct portmacro.h file. */
+/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
+did not result in a portmacro.h header file being included - and it should be
+included here.  In this case the path to the correct portmacro.h header file
+must be set in the compiler's include path. */
 #ifndef portENTER_CRITICAL
 	#include "portmacro.h"
 #endif
 
+#if portBYTE_ALIGNMENT == 32
+	#define portBYTE_ALIGNMENT_MASK ( 0x001f )
+#endif
+
+#if portBYTE_ALIGNMENT == 16
+	#define portBYTE_ALIGNMENT_MASK ( 0x000f )
+#endif
+
 #if portBYTE_ALIGNMENT == 8
 	#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
 #endif
@@ -342,6 +84,14 @@ to find the path to the correct portmacro.h file. */
 	#define portNUM_CONFIGURABLE_REGIONS 1
 #endif
 
+#ifndef portHAS_STACK_OVERFLOW_CHECKING
+	#define portHAS_STACK_OVERFLOW_CHECKING 0
+#endif
+
+#ifndef portARCH_NAME
+	#define portARCH_NAME NULL
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -355,11 +105,40 @@ extern "C" {
  *
  */
 #if( portUSING_MPU_WRAPPERS == 1 )
-	portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged ) PRIVILEGED_FUNCTION;
+	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+	#else
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+	#endif
 #else
-	portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
+	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
+	#else
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
+	#endif
 #endif
 
+/* Used by heap_5.c. */
+typedef struct HeapRegion
+{
+	uint8_t *pucStartAddress;
+	size_t xSizeInBytes;
+} HeapRegion_t;
+
+/*
+ * Used to define multiple heap regions for use by heap_5.c.  This function
+ * must be called before any calls to pvPortMalloc() - not creating a task,
+ * queue, semaphore, mutex, software timer, event group, etc. will result in
+ * pvPortMalloc being called.
+ *
+ * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
+ * defines a region of memory that can be used as the heap.  The array is
+ * terminated by a HeapRegions_t structure that has a size of 0.  The region
+ * with the lowest start address must appear first in the array.
+ */
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+
+
 /*
  * Map to the memory management routines required for the port.
  */
@@ -367,12 +146,13 @@ void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
 void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
 void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 
 /*
  * Setup the hardware ready for the scheduler to take control.  This generally
  * sets up a tick interrupt and sets timers for the correct tick frequency.
  */
-portBASE_TYPE xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
 
 /*
  * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
@@ -390,7 +170,7 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
  */
 #if( portUSING_MPU_WRAPPERS == 1 )
 	struct xMEMORY_REGION;
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth ) PRIVILEGED_FUNCTION;
+	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
 #endif
 
 #ifdef __cplusplus

FreeRTOS/Source/include/projdefs.h

@@ -1,87 +1,123 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 #ifndef PROJDEFS_H
 #define PROJDEFS_H
 
-/* Defines the prototype to which task functions must conform. */
-typedef void (*pdTASK_CODE)( void * );
+/*
+ * Defines the prototype to which task functions must conform.  Defined in this
+ * file to ensure the type is known before portable.h is included.
+ */
+typedef void (*TaskFunction_t)( void * );
 
-#define pdFALSE		( ( portBASE_TYPE ) 0 )
-#define pdTRUE		( ( portBASE_TYPE ) 1 )
+/* Converts a time in milliseconds to a time in ticks.  This macro can be
+overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+definition here is not suitable for your application. */
+#ifndef pdMS_TO_TICKS
+	#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
+#endif
 
-#define pdPASS									( pdTRUE )
-#define pdFAIL									( pdFALSE )
-#define errQUEUE_EMPTY							( ( portBASE_TYPE ) 0 )
-#define errQUEUE_FULL							( ( portBASE_TYPE ) 0 )
+#define pdFALSE			( ( BaseType_t ) 0 )
+#define pdTRUE			( ( BaseType_t ) 1 )
 
-/* Error definitions. */
+#define pdPASS			( pdTRUE )
+#define pdFAIL			( pdFALSE )
+#define errQUEUE_EMPTY	( ( BaseType_t ) 0 )
+#define errQUEUE_FULL	( ( BaseType_t ) 0 )
+
+/* FreeRTOS error definitions. */
 #define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY	( -1 )
-#define errNO_TASK_TO_RUN						( -2 )
 #define errQUEUE_BLOCKED						( -4 )
 #define errQUEUE_YIELD							( -5 )
 
+/* Macros used for basic data corruption checks. */
+#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
+	#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
+#endif
+
+#if( configUSE_16_BIT_TICKS == 1 )
+	#define pdINTEGRITY_CHECK_VALUE 0x5a5a
+#else
+	#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
+#endif
+
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
+itself. */
+#define pdFREERTOS_ERRNO_NONE			0	/* No errors */
+#define	pdFREERTOS_ERRNO_ENOENT			2	/* No such file or directory */
+#define	pdFREERTOS_ERRNO_EINTR			4	/* Interrupted system call */
+#define	pdFREERTOS_ERRNO_EIO			5	/* I/O error */
+#define	pdFREERTOS_ERRNO_ENXIO			6	/* No such device or address */
+#define	pdFREERTOS_ERRNO_EBADF			9	/* Bad file number */
+#define	pdFREERTOS_ERRNO_EAGAIN			11	/* No more processes */
+#define	pdFREERTOS_ERRNO_EWOULDBLOCK	11	/* Operation would block */
+#define	pdFREERTOS_ERRNO_ENOMEM			12	/* Not enough memory */
+#define	pdFREERTOS_ERRNO_EACCES			13	/* Permission denied */
+#define	pdFREERTOS_ERRNO_EFAULT			14	/* Bad address */
+#define	pdFREERTOS_ERRNO_EBUSY			16	/* Mount device busy */
+#define	pdFREERTOS_ERRNO_EEXIST			17	/* File exists */
+#define	pdFREERTOS_ERRNO_EXDEV			18	/* Cross-device link */
+#define	pdFREERTOS_ERRNO_ENODEV			19	/* No such device */
+#define	pdFREERTOS_ERRNO_ENOTDIR		20	/* Not a directory */
+#define	pdFREERTOS_ERRNO_EISDIR			21	/* Is a directory */
+#define	pdFREERTOS_ERRNO_EINVAL			22	/* Invalid argument */
+#define	pdFREERTOS_ERRNO_ENOSPC			28	/* No space left on device */
+#define	pdFREERTOS_ERRNO_ESPIPE			29	/* Illegal seek */
+#define	pdFREERTOS_ERRNO_EROFS			30	/* Read only file system */
+#define	pdFREERTOS_ERRNO_EUNATCH		42	/* Protocol driver not attached */
+#define	pdFREERTOS_ERRNO_EBADE			50	/* Invalid exchange */
+#define	pdFREERTOS_ERRNO_EFTYPE			79	/* Inappropriate file type or format */
+#define	pdFREERTOS_ERRNO_ENMFILE		89	/* No more files */
+#define	pdFREERTOS_ERRNO_ENOTEMPTY		90	/* Directory not empty */
+#define	pdFREERTOS_ERRNO_ENAMETOOLONG 	91	/* File or path name too long */
+#define	pdFREERTOS_ERRNO_EOPNOTSUPP		95	/* Operation not supported on transport endpoint */
+#define	pdFREERTOS_ERRNO_ENOBUFS		105	/* No buffer space available */
+#define	pdFREERTOS_ERRNO_ENOPROTOOPT	109	/* Protocol not available */
+#define	pdFREERTOS_ERRNO_EADDRINUSE		112	/* Address already in use */
+#define	pdFREERTOS_ERRNO_ETIMEDOUT		116	/* Connection timed out */
+#define	pdFREERTOS_ERRNO_EINPROGRESS	119	/* Connection already in progress */
+#define	pdFREERTOS_ERRNO_EALREADY		120	/* Socket already connected */
+#define	pdFREERTOS_ERRNO_EADDRNOTAVAIL 	125	/* Address not available */
+#define	pdFREERTOS_ERRNO_EISCONN		127	/* Socket is already connected */
+#define	pdFREERTOS_ERRNO_ENOTCONN		128	/* Socket is not connected */
+#define	pdFREERTOS_ERRNO_ENOMEDIUM		135	/* No medium inserted */
+#define	pdFREERTOS_ERRNO_EILSEQ			138	/* An invalid UTF-16 sequence was encountered. */
+#define	pdFREERTOS_ERRNO_ECANCELED		140	/* Operation canceled. */
+
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
+itself. */
+#define pdFREERTOS_LITTLE_ENDIAN		0
+#define pdFREERTOS_BIG_ENDIAN			1
+
+/* Re-defining endian values for generic naming. */
+#define pdLITTLE_ENDIAN					pdFREERTOS_LITTLE_ENDIAN
+#define pdBIG_ENDIAN					pdFREERTOS_BIG_ENDIAN
+
+
 #endif /* PROJDEFS_H */
 
 

FreeRTOS/Source/include/stack_macros.h

@@ -0,0 +1,129 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef STACK_MACROS_H
+#define STACK_MACROS_H
+
+/*
+ * Call the stack overflow hook function if the stack of the task being swapped
+ * out is currently overflowed, or looks like it might have overflowed in the
+ * past.
+ *
+ * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
+ * the current stack state only - comparing the current top of stack value to
+ * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
+ * will also cause the last few stack bytes to be checked to ensure the value
+ * to which the bytes were set when the task was created have not been
+ * overwritten.  Note this second test does not guarantee that an overflowed
+ * stack will always be recognised.
+ */
+
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+	/* Only the current stack state is to be checked. */
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+		/* Is the currently saved stack pointer within the stack limit? */								\
+		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+	/* Only the current stack state is to be checked. */
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+																										\
+		/* Is the currently saved stack pointer within the stack limit? */								\
+		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
+		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
+																										\
+		if( ( pulStack[ 0 ] != ulCheckValue ) ||														\
+			( pulStack[ 1 ] != ulCheckValue ) ||														\
+			( pulStack[ 2 ] != ulCheckValue ) ||														\
+			( pulStack[ 3 ] != ulCheckValue ) )															\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
+	{																																	\
+	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
+	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
+																																		\
+																																		\
+		pcEndOfStack -= sizeof( ucExpectedStackBytes );																					\
+																																		\
+		/* Has the extremity of the task stack ever been written over? */																\
+		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
+		{																																\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
+		}																																\
+	}
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+/* Remove stack overflow macro if not being used. */
+#ifndef taskCHECK_FOR_STACK_OVERFLOW
+	#define taskCHECK_FOR_STACK_OVERFLOW()
+#endif
+
+
+
+#endif /* STACK_MACROS_H */
+

FreeRTOS/Source/include/stream_buffer.h

@@ -0,0 +1,855 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * Stream buffers are used to send a continuous stream of data from one task or
+ * interrupt to another.  Their implementation is light weight, making them
+ * particularly suited for interrupt to task and core to core communication
+ * scenarios.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section section and set the
+ * receive block time to 0.
+ *
+ */
+
+#ifndef STREAM_BUFFER_H
+#define STREAM_BUFFER_H
+
+#if defined( __cplusplus )
+extern "C" {
+#endif
+
+/**
+ * Type by which stream buffers are referenced.  For example, a call to
+ * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
+ * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),
+ * etc.
+ */
+struct StreamBufferDef_t;
+typedef struct StreamBufferDef_t * StreamBufferHandle_t;
+
+
+/**
+ * message_buffer.h
+ *
+<pre>
+StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
+</pre>
+ *
+ * Creates a new stream buffer using dynamically allocated memory.  See
+ * xStreamBufferCreateStatic() for a version that uses statically allocated
+ * memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xStreamBufferCreate() to be available.
+ *
+ * @param xBufferSizeBytes The total number of bytes the stream buffer will be
+ * able to hold at any one time.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @return If NULL is returned, then the stream buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the stream buffer data structures and storage area.  A non-NULL value being
+ * returned indicates that the stream buffer has been created successfully -
+ * the returned value should be stored as the handle to the created stream
+ * buffer.
+ *
+ * Example use:
+<pre>
+
+void vAFunction( void )
+{
+StreamBufferHandle_t xStreamBuffer;
+const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
+
+    // Create a stream buffer that can hold 100 bytes.  The memory used to hold
+    // both the stream buffer structure and the data in the stream buffer is
+    // allocated dynamically.
+    xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
+
+    if( xStreamBuffer == NULL )
+    {
+        // There was not enough heap memory space available to create the
+        // stream buffer.
+    }
+    else
+    {
+        // The stream buffer was created successfully and can now be used.
+    }
+}
+</pre>
+ * \defgroup xStreamBufferCreate xStreamBufferCreate
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
+                                                size_t xTriggerLevelBytes,
+                                                uint8_t *pucStreamBufferStorageArea,
+                                                StaticStreamBuffer_t *pxStaticStreamBuffer );
+</pre>
+ * Creates a new stream buffer using statically allocated memory.  See
+ * xStreamBufferCreate() for a version that uses dynamically allocated memory.
+ *
+ * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
+ * xStreamBufferCreateStatic() to be available.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucStreamBufferStorageArea parameter.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes + 1 big.  This is the array to which streams are
+ * copied when they are written to the stream buffer.
+ *
+ * @param pxStaticStreamBuffer Must point to a variable of type
+ * StaticStreamBuffer_t, which will be used to hold the stream buffer's data
+ * structure.
+ *
+ * @return If the stream buffer is created successfully then a handle to the
+ * created stream buffer is returned. If either pucStreamBufferStorageArea or
+ * pxStaticstreamBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+<pre>
+
+// Used to dimension the array used to hold the streams.  The available space
+// will actually be one less than this, so 999.
+#define STORAGE_SIZE_BYTES 1000
+
+// Defines the memory that will actually hold the streams within the stream
+// buffer.
+static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+
+// The variable used to hold the stream buffer structure.
+StaticStreamBuffer_t xStreamBufferStruct;
+
+void MyFunction( void )
+{
+StreamBufferHandle_t xStreamBuffer;
+const size_t xTriggerLevel = 1;
+
+    xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
+                                               xTriggerLevel,
+                                               ucBufferStorage,
+                                               &xStreamBufferStruct );
+
+    // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
+    // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
+    // reference the created stream buffer in other stream buffer API calls.
+
+    // Other code that uses the stream buffer can go here.
+}
+
+</pre>
+ * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                          const void *pvTxData,
+                          size_t xDataLengthBytes,
+                          TickType_t xTicksToWait );
+</pre>
+ *
+ * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the buffer that holds the bytes to be copied
+ * into the stream buffer.
+ *
+ * @param xDataLengthBytes   The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for enough space to become available in the stream
+ * buffer, should the stream buffer contain too little space to hold the
+ * another xDataLengthBytes bytes.  The block time is specified in tick periods,
+ * so the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  If a task times out
+ * before it can write all xDataLengthBytes into the buffer it will still write
+ * as many bytes as possible.  A task does not use any CPU time when it is in
+ * the blocked state.
+ *
+ * @return The number of bytes written to the stream buffer.  If a task times
+ * out before it can write all xDataLengthBytes into the buffer it will still
+ * write as many bytes as possible.
+ *
+ * Example use:
+<pre>
+void vAFunction( StreamBufferHandle_t xStreamBuffer )
+{
+size_t xBytesSent;
+uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+char *pcStringToSend = "String to send";
+const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+
+    // Send an array to the stream buffer, blocking for a maximum of 100ms to
+    // wait for enough space to be available in the stream buffer.
+    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+
+    if( xBytesSent != sizeof( ucArrayToSend ) )
+    {
+        // The call to xStreamBufferSend() times out before there was enough
+        // space in the buffer for the data to be written, but it did
+        // successfully write xBytesSent bytes.
+    }
+
+    // Send the string to the stream buffer.  Return immediately if there is not
+    // enough space in the buffer.
+    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The entire string could not be added to the stream buffer because
+        // there was not enough free space in the buffer, but xBytesSent bytes
+        // were sent.  Could try again to send the remaining bytes.
+    }
+}
+</pre>
+ * \defgroup xStreamBufferSend xStreamBufferSend
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+						  const void *pvTxData,
+						  size_t xDataLengthBytes,
+						  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+                                 const void *pvTxData,
+                                 size_t xDataLengthBytes,
+                                 BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * Interrupt safe version of the API function that sends a stream of bytes to
+ * the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the data that is to be copied into the stream
+ * buffer.
+ *
+ * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xStreamBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xStreamBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the example code below for an example.
+ *
+ * @return The number of bytes actually written to the stream buffer, which will
+ * be less than xDataLengthBytes if the stream buffer didn't have enough free
+ * space for all the bytes to be written.
+ *
+ * Example use:
+<pre>
+// A stream buffer that has already been created.
+StreamBufferHandle_t xStreamBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+size_t xBytesSent;
+char *pcStringToSend = "String to send";
+BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+
+    // Attempt to send the string to the stream buffer.
+    xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
+                                           ( void * ) pcStringToSend,
+                                           strlen( pcStringToSend ),
+                                           &xHigherPriorityTaskWoken );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // There was not enough free space in the stream buffer for the entire
+        // string to be written, ut xBytesSent bytes were written.
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xStreamBufferSendFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+</pre>
+ * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+								 const void *pvTxData,
+								 size_t xDataLengthBytes,
+								 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                             void *pvRxData,
+                             size_t xBufferLengthBytes,
+                             TickType_t xTicksToWait );
+</pre>
+ *
+ * Receives bytes from a stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use
+ * xStreamBufferReceiveFromISR() to read from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which bytes are to
+ * be received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes will be
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for data to become available if the stream buffer is
+ * empty.  xStreamBufferReceive() will return immediately if xTicksToWait is
+ * zero.  The block time is specified in tick periods, so the absolute time it
+ * represents is dependent on the tick frequency.  The macro pdMS_TO_TICKS() can
+ * be used to convert a time specified in milliseconds into a time specified in
+ * ticks.  Setting xTicksToWait to portMAX_DELAY will cause the task to wait
+ * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1
+ * in FreeRTOSConfig.h.  A task does not use any CPU time when it is in the
+ * Blocked state.
+ *
+ * @return The number of bytes actually read from the stream buffer, which will
+ * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed
+ * out before xBufferLengthBytes were available.
+ *
+ * Example use:
+<pre>
+void vAFunction( StreamBuffer_t xStreamBuffer )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+
+    // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
+    // Wait in the Blocked state (so not using any CPU processing time) for a
+    // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
+    // available.
+    xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
+                                           ( void * ) ucRxData,
+                                           sizeof( ucRxData ),
+                                           xBlockTime );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains another xRecievedBytes bytes of data, which can
+        // be processed here....
+    }
+}
+</pre>
+ * \defgroup xStreamBufferReceive xStreamBufferReceive
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+							 void *pvRxData,
+							 size_t xBufferLengthBytes,
+							 TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+                                    void *pvRxData,
+                                    size_t xBufferLengthBytes,
+                                    BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * An interrupt safe version of the API function that receives bytes from a
+ * stream buffer.
+ *
+ * Use xStreamBufferReceive() to read bytes from a stream buffer from a task.
+ * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which a stream
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes are
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xStreamBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes read from the stream buffer, if any.
+ *
+ * Example use:
+<pre>
+// A stream buffer that has already been created.
+StreamBuffer_t xStreamBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+
+    // Receive the next stream from the stream buffer.
+    xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
+                                                  ( void * ) ucRxData,
+                                                  sizeof( ucRxData ),
+                                                  &xHigherPriorityTaskWoken );
+
+    if( xReceivedBytes > 0 )
+    {
+        // ucRxData contains xReceivedBytes read from the stream buffer.
+        // Process the stream here....
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xStreamBufferReceiveFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+</pre>
+ * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+									void *pvRxData,
+									size_t xBufferLengthBytes,
+									BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Deletes a stream buffer that was previously created using a call to
+ * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream
+ * buffer was created using dynamic memory (that is, by xStreamBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A stream buffer handle must not be used after the stream buffer has been
+ * deleted.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to be deleted.
+ *
+ * \defgroup vStreamBufferDelete vStreamBufferDelete
+ * \ingroup StreamBufferManagement
+ */
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Queries a stream buffer to see if it is full.  A stream buffer is full if it
+ * does not have any free space, and therefore cannot accept any more data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferIsFull xStreamBufferIsFull
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
+ * it does not contain any data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Resets a stream buffer to its initial, empty, state.  Any data that was in
+ * the stream buffer is discarded.  A stream buffer can only be reset if there
+ * are no tasks blocked waiting to either send to or receive from the stream
+ * buffer.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being reset.
+ *
+ * @return If the stream buffer is reset then pdPASS is returned.  If there was
+ * a task blocked waiting to send to or read from the stream buffer then the
+ * stream buffer is not reset and pdFAIL is returned.
+ *
+ * \defgroup xStreamBufferReset xStreamBufferReset
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Queries a stream buffer to see how much free space it contains, which is
+ * equal to the amount of data that can be sent to the stream buffer before it
+ * is full.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be written to the stream buffer before
+ * the stream buffer would be full.
+ *
+ * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
+</pre>
+ *
+ * Queries a stream buffer to see how much data it contains, which is equal to
+ * the number of bytes that can be read from the stream buffer before the stream
+ * buffer would be empty.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be read from the stream buffer before
+ * the stream buffer would be empty.
+ *
+ * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
+</pre>
+ *
+ * A stream buffer's trigger level is the number of bytes that must be in the
+ * stream buffer before a task that is blocked on the stream buffer to
+ * wait for data is moved out of the blocked state.  For example, if a task is
+ * blocked on a read of an empty stream buffer that has a trigger level of 1
+ * then the task will be unblocked when a single byte is written to the buffer
+ * or the task's block time expires.  As another example, if a task is blocked
+ * on a read of an empty stream buffer that has a trigger level of 10 then the
+ * task will not be unblocked until the stream buffer contains at least 10 bytes
+ * or the task's block time expires.  If a reading task's block time expires
+ * before the trigger level is reached then the task will still receive however
+ * many bytes are actually available.  Setting a trigger level of 0 will result
+ * in a trigger level of 1 being used.  It is not valid to specify a trigger
+ * level that is greater than the buffer size.
+ *
+ * A trigger level is set when the stream buffer is created, and can be modified
+ * using xStreamBufferSetTriggerLevel().
+ *
+ * @param xStreamBuffer The handle of the stream buffer being updated.
+ *
+ * @param xTriggerLevel The new trigger level for the stream buffer.
+ *
+ * @return If xTriggerLevel was less than or equal to the stream buffer's length
+ * then the trigger level will be updated and pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xStreamBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferSendCompletedFromISR().  If calling
+ * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+<pre>
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+</pre>
+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xStreamBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferReceiveCompletedFromISR().  If calling
+ * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/* Functions below here are not part of the public API. */
+StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+												 size_t xTriggerLevelBytes,
+												 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
+
+StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+													   size_t xTriggerLevelBytes,
+													   BaseType_t xIsMessageBuffer,
+													   uint8_t * const pucStreamBufferStorageArea,
+													   StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
+
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+#if( configUSE_TRACE_FACILITY == 1 )
+	void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
+	UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+	uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+#endif
+
+#if defined( __cplusplus )
+}
+#endif
+
+#endif	/* !defined( STREAM_BUFFER_H ) */

FreeRTOS/Source/list.c

@@ -1,66 +1,29 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 
 #include <stdlib.h>
@@ -71,12 +34,12 @@
  * PUBLIC LIST API documented in list.h
  *----------------------------------------------------------*/
 
-void vListInitialise( xList * const pxList )
+void vListInitialise( List_t * const pxList )
 {
 	/* The list structure contains a list item which is used to mark the
 	end of the list.  To initialise the list the list end is inserted
 	as the only list entry. */
-	pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd );			/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
 	/* The list end value is the highest possible value in the list to
 	ensure it remains at the end of the list. */
@@ -84,56 +47,78 @@ void vListInitialise( xList * const pxList )
 
 	/* The list end next and previous pointers point to itself so we know
 	when the list is empty. */
-	pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd );	/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-	pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 
-	pxList->uxNumberOfItems = ( unsigned portBASE_TYPE ) 0U;
+	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+
+	/* Write known values into the list if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
 }
 /*-----------------------------------------------------------*/
 
-void vListInitialiseItem( xListItem * const pxItem )
+void vListInitialiseItem( ListItem_t * const pxItem )
 {
 	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pvContainer = NULL;
+	pxItem->pxContainer = NULL;
+
+	/* Write known values into the list item if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
 }
 /*-----------------------------------------------------------*/
 
-void IRAM vListInsertEnd( xList * const pxList, xListItem * const pxNewListItem )
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
 {
-xListItem * pxIndex;
+ListItem_t * const pxIndex = pxList->pxIndex;
+
+	/* Only effective when configASSERT() is also defined, these tests may catch
+	the list data structures being overwritten in memory.  They will not catch
+	data errors caused by incorrect configuration or use of FreeRTOS. */
+	listTEST_LIST_INTEGRITY( pxList );
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
 	/* Insert a new list item into pxList, but rather than sort the list,
 	makes the new list item the last item to be removed by a call to
-	pvListGetOwnerOfNextEntry. */
-	pxIndex = pxList->pxIndex;
-
+	listGET_OWNER_OF_NEXT_ENTRY(). */
 	pxNewListItem->pxNext = pxIndex;
 	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
 	pxIndex->pxPrevious->pxNext = pxNewListItem;
 	pxIndex->pxPrevious = pxNewListItem;
 
 	/* Remember which list the item is in. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
+	pxNewListItem->pxContainer = pxList;
 
 	( pxList->uxNumberOfItems )++;
 }
 /*-----------------------------------------------------------*/
 
-void IRAM vListInsert( xList * const pxList, xListItem * const pxNewListItem )
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
 {
-xListItem *pxIterator;
-portTickType xValueOfInsertion;
+ListItem_t *pxIterator;
+const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 
-	/* Insert the new list item into the list, sorted in ulListItem order. */
-	xValueOfInsertion = pxNewListItem->xItemValue;
+	/* Only effective when configASSERT() is also defined, these tests may catch
+	the list data structures being overwritten in memory.  They will not catch
+	data errors caused by incorrect configuration or use of FreeRTOS. */
+	listTEST_LIST_INTEGRITY( pxList );
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
 
-	/* If the list already contains a list item with the same item value then
-	the new list item should be placed after it.  This ensures that TCB's which
-	are stored in ready lists (all of which have the same ulListItem value)
-	get an equal share of the CPU.  However, if the xItemValue is the same as
-	the back marker the iteration loop below will not end.  This means we need
-	to guard against this by checking the value first and modifying the
-	algorithm slightly if necessary. */
+	/* Insert the new list item into the list, sorted in xItemValue order.
+
+	If the list already contains a list item with the same item value then the
+	new list item should be placed after it.  This ensures that TCBs which are
+	stored in ready lists (all of which have the same xItemValue value) get a
+	share of the CPU.  However, if the xItemValue is the same as the back marker
+	the iteration loop below will not end.  Therefore the value is checked
+	first, and the algorithm slightly modified if necessary. */
 	if( xValueOfInsertion == portMAX_DELAY )
 	{
 		pxIterator = pxList->xListEnd.pxPrevious;
@@ -141,26 +126,31 @@ portTickType xValueOfInsertion;
 	else
 	{
 		/* *** NOTE ***********************************************************
-		If you find your application is crashing here then likely causes are:
+		If you find your application is crashing here then likely causes are
+		listed below.  In addition see https://www.freertos.org/FAQHelp.html for
+		more tips, and ensure configASSERT() is defined!
+		https://www.freertos.org/a00110.html#configASSERT
+
 			1) Stack overflow -
-			   see http://www.freertos.org/Stacks-and-stack-overflow-checking.html
-			2) Incorrect interrupt priority assignment, especially on Cortex-M3
+			   see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
+			2) Incorrect interrupt priority assignment, especially on Cortex-M
 			   parts where numerically high priority values denote low actual
-			   interrupt priories, which can seem counter intuitive.  See
-			   configMAX_SYSCALL_INTERRUPT_PRIORITY on http://www.freertos.org/a00110.html
+			   interrupt priorities, which can seem counter intuitive.  See
+			   https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
+			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
+			   https://www.freertos.org/a00110.html
 			3) Calling an API function from within a critical section or when
 			   the scheduler is suspended, or calling an API function that does
 			   not end in "FromISR" from an interrupt.
 			4) Using a queue or semaphore before it has been initialised or
 			   before the scheduler has been started (are interrupts firing
 			   before vTaskStartScheduler() has been called?).
-		See http://www.freertos.org/FAQHelp.html for more tips.
 		**********************************************************************/
 
-		for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 		{
-			/* There is nothing to do here, we are just iterating to the
-			wanted insertion position. */
+			/* There is nothing to do here, just iterating to the wanted
+			insertion position. */
 		}
 	}
 
@@ -171,30 +161,35 @@ portTickType xValueOfInsertion;
 
 	/* Remember which list the item is in.  This allows fast removal of the
 	item later. */
-	pxNewListItem->pvContainer = ( void * ) pxList;
+	pxNewListItem->pxContainer = pxList;
 
 	( pxList->uxNumberOfItems )++;
 }
 /*-----------------------------------------------------------*/
 
-unsigned portBASE_TYPE IRAM uxListRemove( xListItem * const pxItemToRemove )
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
 {
-xList * pxList;
+/* The list item knows which list it is in.  Obtain the list from the list
+item. */
+List_t * const pxList = pxItemToRemove->pxContainer;
 
 	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 
-	/* The list item knows which list it is in.  Obtain the list from the list
-	item. */
-	pxList = ( xList * ) pxItemToRemove->pvContainer;
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
 
 	/* Make sure the index is left pointing to a valid item. */
 	if( pxList->pxIndex == pxItemToRemove )
 	{
 		pxList->pxIndex = pxItemToRemove->pxPrevious;
 	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
 
-	pxItemToRemove->pvContainer = NULL;
+	pxItemToRemove->pxContainer = NULL;
 	( pxList->uxNumberOfItems )--;
 
 	return pxList->uxNumberOfItems;

FreeRTOS/Source/portable/esp8266/port.c

@@ -1,66 +1,30 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 /*-----------------------------------------------------------
  * Implementation of functions defined in portable.h for ESP8266
@@ -73,9 +37,12 @@
 #include <malloc.h>
 #include <unistd.h>
 #include <stdio.h>
+#include <stdlib.h>
+#include <xtensa_ops.h>
 
 #include "FreeRTOS.h"
 #include "task.h"
+#include "queue.h"
 #include "xtensa_rtos.h"
 
 unsigned cpu_sr;
@@ -90,16 +57,23 @@ char level1_int_disabled;
 */
 void *xPortSupervisorStackPointer;
 
+void vAssertCalled(const char * pcFile, unsigned long ulLine)
+{
+    printf("rtos assert %s %lu\n", pcFile, ulLine);
+    abort();
+    //for (;;);
+}
+
 /*
  * Stack initialization
  */
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
 {
     #define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v)
     portSTACK_TYPE *sp, *tp;
 
     /* Create interrupt stack frame aligned to 16 byte boundary */
-    sp = (portSTACK_TYPE*) (((uint32_t)(pxTopOfStack+1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
+    sp = (portSTACK_TYPE*) (((uint32_t)(pxTopOfStack + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
 
     /* Clear the entire frame (do not use memset() because we don't depend on C library) */
     for (tp = sp; tp <= pxTopOfStack; ++tp)
@@ -120,30 +94,29 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
 static int pending_soft_sv;
 static int pending_maclayer_sv;
 
-/* PendSV is called in place of vPortYield() to request a supervisor
-   call.
-
-   The portYIELD macro calls pendSV if it's a software request.
-
-   The libpp and libudhcp libraries also call this function, assuming
-   always with arg==2 (but maybe sometimes with arg==1?)
-
-   In the original esp_iot_rtos_sdk implementation, arg was a char. Using an
-   enum is ABI-compatible, though.
-*/
+/*
+ * The portYIELD macro calls PendSV with SVC_Software to set a pending interrupt
+ * service callback that allows a task switch, and this occur when interrupts
+ * are enabled which might be after exiting the critical region below.
+ *
+ * The wdev NMI calls this function from pp_post() with SVC_MACLayer to set a
+ * pending interrupt service callback which flushs the queue of messages that
+ * the NMI stashes away. This interrupt will be triggered after the return from
+ * the NMI and when interrupts are enabled. The NMI can not touch the FreeRTOS
+ * queues itself. The NMI must not touch the interrupt masks so that path must
+ * not call vPortEnterCritical and vPortExitCritical.
+ */
 void IRAM PendSV(enum SVC_ReqType req)
 {
-	vPortEnterCritical();
-
-	if(req == SVC_Software)
-	{
-		pending_soft_sv = 1;
-	}
-	else if(req == SVC_MACLayer)
-		pending_maclayer_sv= 1;
-
-	xthal_set_intset(BIT(INUM_SOFT));
-	vPortExitCritical();
+    if (req == SVC_Software) {
+        vPortEnterCritical();
+        pending_soft_sv = 1;
+        WSR(BIT(INUM_SOFT), interrupt);
+        vPortExitCritical();
+    } else if (req == SVC_MACLayer) {
+        pending_maclayer_sv= 1;
+        WSR(BIT(INUM_SOFT), interrupt);
+    }
 }
 
 /* This MAC layer ISR handler is defined in libpp.a, and is called
@@ -152,31 +125,24 @@ void IRAM PendSV(enum SVC_ReqType req)
  */
 extern portBASE_TYPE sdk_MacIsrSigPostDefHdl(void);
 
-void IRAM SV_ISR(void)
+void IRAM SV_ISR(void *arg)
 {
-	portBASE_TYPE xHigherPriorityTaskWoken=pdFALSE ;
-	if(pending_maclayer_sv)
-	{
-		xHigherPriorityTaskWoken = sdk_MacIsrSigPostDefHdl();
-		pending_maclayer_sv = 0;
-	}
-	if( xHigherPriorityTaskWoken || pending_soft_sv)
-	{
-	    sdk__xt_timer_int1();
-	    pending_soft_sv = 0;
-	}
+    portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE ;
+    if (pending_maclayer_sv) {
+        xHigherPriorityTaskWoken = sdk_MacIsrSigPostDefHdl();
+        pending_maclayer_sv = 0;
+    }
+    if (xHigherPriorityTaskWoken || pending_soft_sv) {
+        sdk__xt_timer_int1();
+        pending_soft_sv = 0;
+    }
 }
 
 void xPortSysTickHandle (void)
 {
-	//CloseNMI();
-	{
-		if(xTaskIncrementTick() !=pdFALSE )
-		{
-			vTaskSwitchContext();
-		}
-	}
-	//OpenNMI();
+    if (xTaskIncrementTick() != pdFALSE) {
+        vTaskSwitchContext();
+    }
 }
 
 /*
@@ -184,11 +150,11 @@ void xPortSysTickHandle (void)
  */
 portBASE_TYPE xPortStartScheduler( void )
 {
-    _xt_isr_attach(INUM_SOFT, SV_ISR);
+    _xt_isr_attach(INUM_SOFT, SV_ISR, NULL);
     _xt_isr_unmask(BIT(INUM_SOFT));
 
     /* Initialize system tick timer interrupt and schedule the first tick. */
-    _xt_isr_attach(INUM_TICK, sdk__xt_timer_int);
+    _xt_isr_attach(INUM_TICK, sdk__xt_timer_int, NULL);
     _xt_isr_unmask(BIT(INUM_TICK));
     sdk__xt_tick_timer_init();
 
@@ -220,8 +186,10 @@ size_t xPortGetFreeHeapSize( void )
     uint32_t brk_val = (uint32_t) sbrk(0);
 
     intptr_t sp = (intptr_t)xPortSupervisorStackPointer;
-    if(sp == 0) /* scheduler not started */
-        __asm__ __volatile__ ("mov %0, a1\n" : "=a"(sp));
+    if (sp == 0) {
+        /* scheduler not started */
+        SP(sp);
+    }
     return sp - brk_val + mi.fordblks;
 }
 
@@ -232,8 +200,6 @@ void vPortEndScheduler( void )
 
 /*-----------------------------------------------------------*/
 
-/* Each task maintains its own interrupt status in the critical nesting
-variable. */
 static unsigned portBASE_TYPE uxCriticalNesting = 0;
 
 /* These nested vPortEnter/ExitCritical macros are called by SDK
@@ -242,18 +208,42 @@ static unsigned portBASE_TYPE uxCriticalNesting = 0;
  * It may be possible to replace the global nesting count variable
  * with a save/restore of interrupt level, although it's difficult as
  * the functions have no return value.
+ *
+ * These should not be called from the NMI in regular operation and
+ * the NMI must not touch the interrupt mask, but that might occur in
+ * exceptional paths such as aborts and debug code.
  */
-void IRAM vPortEnterCritical( void )
-{
+void IRAM vPortEnterCritical(void) {
     portDISABLE_INTERRUPTS();
     uxCriticalNesting++;
 }
+
 /*-----------------------------------------------------------*/
 
-void IRAM vPortExitCritical( void )
-{
+void IRAM vPortExitCritical(void) {
     uxCriticalNesting--;
-    if( uxCriticalNesting == 0 )
-	portENABLE_INTERRUPTS();
+    if (uxCriticalNesting == 0)
+        portENABLE_INTERRUPTS();
 }
 
+/* Backward compatibility, for the sdk library. */
+
+signed portBASE_TYPE xTaskGenericCreate(TaskFunction_t pxTaskCode,
+                                        const signed char * const pcName,
+                                        unsigned short usStackDepth,
+                                        void *pvParameters,
+                                        unsigned portBASE_TYPE uxPriority,
+                                        TaskHandle_t *pxCreatedTask,
+                                        portSTACK_TYPE *puxStackBuffer,
+                                        const MemoryRegion_t * const xRegions) {
+    (void)puxStackBuffer;
+    (void)xRegions;
+    return xTaskCreate(pxTaskCode, (const char * const)pcName, usStackDepth,
+                       pvParameters, uxPriority, pxCreatedTask);
+}
+
+BaseType_t xQueueGenericReceive(QueueHandle_t xQueue, void * const pvBuffer,
+                                TickType_t xTicksToWait, const BaseType_t xJustPeeking) {
+    configASSERT(xJustPeeking == 0);
+    return xQueueReceive(xQueue, pvBuffer, xTicksToWait);
+}

FreeRTOS/Source/portable/esp8266/portmacro.h

@@ -1,67 +1,30 @@
 /*
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
-
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
-    ***************************************************************************
-     *                                                                       *
-     *    FreeRTOS provides completely free yet professionally developed,    *
-     *    robust, strictly quality controlled, supported, and cross          *
-     *    platform software that has become a de facto standard.             *
-     *                                                                       *
-     *    Help yourself get started quickly and support the FreeRTOS         *
-     *    project by purchasing a FreeRTOS tutorial book, reference          *
-     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *
-     *                                                                       *
-     *    Thank you!                                                         *
-     *                                                                       *
-    ***************************************************************************
-
-    This file is part of the FreeRTOS distribution.
-
-    FreeRTOS is free software; you can redistribute it and/or modify it under
-    the terms of the GNU General Public License (version 2) as published by the
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
-
-    >>! NOTE: The modification to the GPL is included to allow you to distribute
-    >>! a combined work that includes FreeRTOS without being obliged to provide
-    >>! the source code for proprietary components outside of the FreeRTOS
-    >>! kernel.
-
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following
-    link: http://www.freertos.org/a00114.html
-
-    1 tab == 4 spaces!
-
-    ***************************************************************************
-     *                                                                       *
-     *    Having a problem?  Start by reading the FAQ "My application does   *
-     *    not run, what could be wrong?"                                     *
-     *                                                                       *
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *
-     *                                                                       *
-    ***************************************************************************
-
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,
-    license and Real Time Engineers Ltd. contact details.
-
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS
-    licenses offer ticketed support, indemnification and middleware.
-
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety
-    engineered and independently SIL3 certified version for use in safety and
-    mission critical applications that require provable dependability.
-
-    1 tab == 4 spaces!
-*/
-
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
 
 #ifndef PORTMACRO_H
 #define PORTMACRO_H
@@ -92,15 +55,20 @@ extern "C" {
 #define portDOUBLE              double
 #define portLONG                long
 #define portSHORT               short
-#define portSTACK_TYPE          unsigned portLONG
+#define portSTACK_TYPE          uint32_t
 #define portBASE_TYPE           long
 
-typedef uint32_t portTickType;
-#define portMAX_DELAY ( portTickType ) 0xffffffff
+typedef portSTACK_TYPE StackType_t;
+typedef portBASE_TYPE BaseType_t;
+typedef unsigned portBASE_TYPE UBaseType_t;
+
+typedef uint32_t TickType_t;
+#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
 
 /* Architecture specifics. */
+#define portARCH_NAME				"ESP8266"
 #define portSTACK_GROWTH			( -1 )
-#define portTICK_RATE_MS			( ( portTickType ) 1000 / configTICK_RATE_HZ )
+#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
 #define portBYTE_ALIGNMENT			8
 /*-----------------------------------------------------------*/
 
@@ -139,7 +107,7 @@ void PendSV(enum SVC_ReqType);
    ESPTODO: It may be possible to just read the 'ps' register instead
    of accessing thisvariable.
 */
-extern char sdk_NMIIrqIsOn;
+extern uint8_t sdk_NMIIrqIsOn;
 extern char level1_int_disabled;
 extern unsigned cpu_sr;
 
@@ -151,6 +119,9 @@ extern unsigned cpu_sr;
    prefer to _xt_disable_interrupts & _xt_enable_interrupts and store
    the ps value in a local variable - that approach is recursive-safe
    and generally better.
+
+   The NMI must not touch the interrupt mask and it should not in
+   regular operation, but there is a guard here just in case.
 */
 inline static __attribute__((always_inline)) void portDISABLE_INTERRUPTS(void)
 {
@@ -180,6 +151,10 @@ not necessary for to use this port.  They are defined so the common demo files
 (which build with all the ports) will build. */
 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+
+/* FreeRTOS API functions should not be called from the NMI handler. */
+#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT(sdk_NMIIrqIsOn == 0)
+
 /*-----------------------------------------------------------*/
 
 #ifdef __cplusplus

FreeRTOS/Source/portable/readme.txt

@@ -0,0 +1,20 @@
+Each real time kernel port consists of three files that contain the core kernel
+components and are common to every port, and one or more files that are
+specific to a particular microcontroller and/or compiler.
+
+
++ The FreeRTOS/Source/Portable/MemMang directory contains the five sample
+memory allocators as described on the http://www.FreeRTOS.org WEB site.
+
++ The other directories each contain files specific to a particular
+microcontroller or compiler, where the directory name denotes the compiler
+specific files the directory contains.
+
+
+
+For example, if you are interested in the [compiler] port for the [architecture]
+microcontroller, then the port specific files are contained in
+FreeRTOS/Source/Portable/[compiler]/[architecture] directory.  If this is the
+only port you are interested in then all the other directories can be
+ignored.
+

FreeRTOS/readme.txt

@@ -1,21 +0,0 @@
-Directories:
-
-+ The FreeRTOS/Source directory contains the FreeRTOS source code, and contains
-  its own readme file.
-
-+ The FreeRTOS/Demo directory contains a demo application for every official
-FreeRTOS port, and contains its own readme file.
-
-+ See http://www.freertos.org/a00017.html for full details of the directory 
-  structure and information on locating the files you require.
-
-The easiest way to use FreeRTOS is to start with one of the pre-configured demo 
-application projects (found in the FreeRTOS/Demo directory).  That way you will
-have the correct FreeRTOS source files included, and the correct include paths
-configured.  Once a demo application is building and executing you can remove
-the demo application file, and start to add in your own application source
-files.
-
-See also -
-http://www.freertos.org/FreeRTOS-quick-start-guide.html
-http://www.freertos.org/FAQHelp.html

README.md

@@ -18,7 +18,7 @@ Please note that this project is released with a [Contributor Code of Conduct](h
 
 ## Quick Start
 
-* Install [esp-open-sdk](https://github.com/pfalcon/esp-open-sdk/), build it with `make STANDALONE=n`, then edit your PATH and add the generated toolchain `bin` directory. The path will be something like `/path/to/esp-open-sdk/xtensa-lx106-elf/bin`. (Despite the similar name esp-open-sdk has different maintainers - but we think it's fantastic!)
+* Install [esp-open-sdk](https://github.com/pfalcon/esp-open-sdk/), build it with `make toolchain esptool libhal STANDALONE=n`, then edit your PATH and add the generated toolchain `bin` directory. The path will be something like `/path/to/esp-open-sdk/xtensa-lx106-elf/bin`. (Despite the similar name esp-open-sdk has different maintainers - but we think it's fantastic!)
 
     (Other toolchains may also work, as long as a gcc cross-compiler is available on the PATH and libhal (and libhal headers) are compiled and available to gcc. The proprietary Tensilica "xcc" compiler will probably not work.)
 
@@ -33,15 +33,13 @@ git clone --recursive https://github.com/Superhouse/esp-open-rtos.git
 cd esp-open-rtos
 ```
 
-* To build any examples that use WiFi, edit `include/ssid_config.h` and change the two macro defines:
+* To build any examples that use WiFi, create `include/private_ssid_config.h` defining the two macro defines:
 
 ```c
 #define WIFI_SSID "mywifissid"
 #define WIFI_PASS "my secret password"
 ```
 
-Remove the `#warning` line and follow the git ignore instructions written in the header file to keep your credentials from being pushed to Github.
-
 * Build an example project (found in the 'examples' directory) and flash it to a serial port:
 
 ```
@@ -79,9 +77,9 @@ Current status is alpha quality, actively developed. AP STATION mode (ie wifi cl
 
 ## Open Source Components
 
-* [FreeRTOS](http://www.freertos.org/) V7.5.2
-* [lwIP](http://lwip.wikia.com/wiki/LwIP_Wiki) v1.4.1, modified via the [esp-lwip project](https://github.com/kadamski/esp-lwip) by @kadamski.
-* [newlib](https://github.com/projectgus/newlib-xtensa) v2.2.0, with patches for xtensa support and locking stubs for thread-safe operation on FreeRTOS.
+* [FreeRTOS](http://www.freertos.org/) V10.2.0
+* [lwIP](http://lwip.wikia.com/wiki/LwIP_Wiki) v2.0.3, with [some modifications](https://github.com/ourairquality/lwip/).
+* [newlib](https://github.com/ourairquality/newlib) v3.0.0, with patches for xtensa support and locking stubs for thread-safe operation on FreeRTOS.
 
 For details of how third party libraries are integrated, [see the wiki page](https://github.com/SuperHouse/esp-open-rtos/wiki/Third-Party-Libraries).
 
@@ -102,7 +100,7 @@ Some binary libraries appear to contain unattributed open source code:
 
 * BSD license (as described in LICENSE) applies to original source files, [lwIP](http://lwip.wikia.com/wiki/LwIP_Wiki). lwIP is Copyright (C) Swedish Institute of Computer Science.
 
-* FreeRTOS is provided under the GPL with the FreeRTOS linking exception, allowing non-GPL firmwares to be produced using FreeRTOS as the RTOS core. License details in files under FreeRTOS dir. FreeRTOS is Copyright (C) Real Time Engineers Ltd.
+* FreeRTOS (since v10) is provided under the MIT license. License details in files under FreeRTOS dir. FreeRTOS is Copyright (C) Amazon.
 
 * Source & binary components from the [Espressif IOT RTOS SDK](https://github.com/espressif/esp_iot_rtos_sdk) were released under the MIT license. Source code components are relicensed here under the BSD license. The original parts are Copyright (C) Espressif Systems.
 

bootloader/Makefile

@@ -0,0 +1,59 @@
+# This is a wrapper around the rboot makefile, which gives us the parameters
+# we need to use rboot with esp-open-rtos.
+#
+# Use 'make bootloader' to build a custom bootloader.
+#
+# 'make flash' for any esp-open-rtos program will use the compiled
+# bootloader if it exists, or a prebuilt bootloader if no custom
+# bootloader was compiled.
+#
+# The wrapper means we don't require esptool2 in the build process, so we can just use
+# esptool.py (still need xxd, grep, sed to generate the header - see below.)
+BOOTLOADER_DIR:=$(dir $(abspath $(lastword $(MAKEFILE_LIST))))
+
+include ../parameters.mk
+
+all: $(FIRMWARE_DIR)/rboot.bin
+
+rboot/Makefile:
+	$(error rboot git submodule is not checkedo out. Try running 'git submodule update --init --recursive')
+
+$(FIRMWARE_DIR)/rboot.bin: $(BUILD_DIR)/rboot.elf $(FIRMWARE_DIR)
+	@echo "FW rboot.bin"
+	$(Q) $(ESPTOOL) elf2image $(ESPTOOL_ARGS) $< -o $(BUILD_DIR)/
+	$(Q) mv $(BUILD_DIR)/0x00000.bin $@
+
+# rboot generates this header using the 'esptool2 -header' option. To try and avoid
+# esptool2 as a dependency, we try it here using grep, sed, xxd (all fairly common Unix tools)
+$(BUILD_DIR)/rboot-hex2a.h: $(BUILD_DIR)/rboot-stage2a.elf $(BUILD_DIR)
+	@echo "Extracting stub image header..."
+	$(Q) xtensa-lx106-elf-objcopy $< --only-section .text -Obinary $(BUILD_DIR)/rboot-hex2a.bin
+	$(Q) xxd -i $(BUILD_DIR)/rboot-hex2a.bin > $@.in
+	$(Q) sed -i "s/unsigned char .\+\[\]/const uint8 _text_data[]/" $@.in
+	$(Q) sed -i "s/unsigned int .\+_len/const uint32 _text_len/" $@.in
+	$(Q) echo "const uint32 entry_addr = $$(xtensa-lx106-elf-objdump -f $< | grep 'start address' | grep -o '0x.\+');" >> $@.in
+	$(Q) echo "const uint32 _text_addr = 0x$$(xtensa-lx106-elf-objdump -h -j .text $< | grep ".text" | grep -o '401.....' | head -n1);" >> $@.in
+	$(Q) mv $@.in $@
+
+
+RBOOT_BUILD_BASE="$(abspath $(BUILD_DIR))"
+RBOOT_FW_BASE="$(abspath $(FIRMWARE_DIR))"
+MAKE_VARS=RBOOT_EXTRA_INCDIR=$(BOOTLOADER_DIR) RBOOT_BUILD_BASE=$(RBOOT_BUILD_BASE) RBOOT_FW_BASE=$(RBOOT_FW_BASE)
+
+$(BUILD_DIR)/rboot-stage2a.elf: $(BUILD_DIR)
+	$(Q) $(MAKE) -C rboot $(RBOOT_BUILD_BASE)/rboot-stage2a.elf $(MAKE_VARS)
+
+$(BUILD_DIR)/rboot.elf: $(BUILD_DIR)/rboot-hex2a.h
+	$(Q) $(MAKE) -C rboot $(RBOOT_BUILD_BASE)/rboot.elf $(MAKE_VARS)
+
+$(BUILD_DIR) $(FIRMWARE_DIR):
+	mkdir -p $@
+
+flash: $(FIRMWARE_DIR)/rboot.bin
+	$(Q) $(ESPTOOL) -p $(ESPPORT) -b $(ESPBAUD) write_flash $(ESPTOOL_ARGS) 0x0 $<
+
+clean:
+	$(Q) rm -rf $(BUILD_DIR)
+	$(Q) rm -rf $(FIRMWARE_DIR)
+
+.PHONY: all

bootloader/README.md

@@ -0,0 +1,12 @@
+OTA Bootloader (rboot) source module and support files.
+
+rboot is an open source bootloader by Richard Burton:
+https://github.com/raburton/rboot
+
+Can be used to build an esp-open-rtos compatible rboot bootloader. Run 'make bootloader' in this directory to compile a new bootloader.
+
+Compiling a new bootloader is optional, there's a prebuilt one in the "firmware_prebuilt" directory that will be used if no new bootloader was compiled.
+
+It is also possible to use rboot from upstream verbatim, but *ensure that the `RBOOT_BIG_FLASH` option is enabled or images in slots other than 0 won't work correctly.
+
+See the contents of the 'rboot' directory for more information on rboot.

bootloader/c_types.h

@@ -0,0 +1,10 @@
+/* rboot type definitions */
+
+
+typedef int int32;
+typedef unsigned short uint16;
+typedef unsigned int uint32;
+typedef unsigned char uint8;
+
+#define TRUE 1
+#define FALSE 0

bootloader/rboot

@@ -0,0 +1 @@
+Subproject commit 3b067a8686a07474c5f722953d3b2f0e71db681f

bootloader/rboot.h

@@ -0,0 +1,23 @@
+/* rboot header overrides
+
+   This "wrapper" header contains default values for building rboot
+   on/for esp-open-rtos. It gets included both when building the
+   bootloader and when building extras/rboot-ota support. It includes
+   the default bootloader/rboot/rboot.h header via the gcc
+   include_next mechanism.
+*/
+#ifndef __RBOOT_H__
+
+// Big flash support is required for esp-open-rtos (we use 8Mbit
+// "slots" only.)
+#define BOOT_BIG_FLASH
+
+// enable 2 way communication between
+// rBoot and the user app via the esp rtc data area
+#define BOOT_RTC_ENABLED
+
+// Call 'main' rboot.h to pick up defaults for other parameters
+#include_next "rboot.h"
+
+#endif
+

common.mk

@@ -20,133 +20,10 @@
 # assume the 'root' directory (ie top of the tree) is the directory common.mk is in
 ROOT := $(dir $(lastword $(MAKEFILE_LIST)))
 
-# include optional local overrides at the root level, then in program directory
-#
-# Create either of these files for local system overrides if possible,
-# instead of editing this makefile directly.
--include $(ROOT)local.mk
--include local.mk
-
-# Flash size in megabits
-# Valid values are same as for esptool.py - 2,4,8,16,32
-FLASH_SIZE ?= 16
-
-# Flash mode, valid values are same as for esptool.py - qio,qout,dio.dout
-FLASH_MODE ?= qio
-
-# Flash speed in MHz, valid values are same as for esptool.py - 80, 40, 26, 20
-FLASH_SPEED ?= 40
-
-# Output directories to store intermediate compiled files
-# relative to the program directory
-BUILD_DIR ?= $(PROGRAM_DIR)build/
-FW_BASE ?= $(PROGRAM_DIR)firmware/
-
-# esptool.py from https://github.com/themadinventor/esptool
-ESPTOOL ?= esptool.py
-# serial port settings for esptool.py
-ESPPORT ?= /dev/ttyUSB0
-ESPBAUD ?= 115200
-
-# Set OTA to 1 to build an image that supports rBoot OTA bootloader
-#
-# Currently only works with 16mbit or more flash sizes, with 8mbit
-# images for each "slot"
-OTA ?= 0
-
-ifeq ($(OTA),1)
-# for OTA, we build a "SDK v1.2 bootloader" compatible image where everything is in
-# one file (should work with the v1.2 binary bootloader, and the FOSS rBoot bootloader).
-IMGTOOL ?= esptool2
-
-# Tell C preprocessor that we're building for OTA
-CPPFLAGS = -DOTA
-endif
-
-FLAVOR ?= release # or debug
-
-# Compiler names, etc. assume gdb
-CROSS ?= xtensa-lx106-elf-
-
-AR = $(CROSS)ar
-CC = $(CROSS)gcc
-CPP = $(CROSS)cpp
-LD = $(CROSS)gcc
-NM = $(CROSS)nm
-C++ = $(CROSS)g++
-SIZE = $(CROSS)size
-OBJCOPY = $(CROSS)objcopy
-OBJDUMP = $(CROSS)objdump
-
-# Source components to compile and link. Each of these are subdirectories
-# of the root, with a 'component.mk' file.
-COMPONENTS     ?= $(EXTRA_COMPONENTS) FreeRTOS lwip core
-
-# binary esp-iot-rtos SDK libraries to link. These are pre-processed prior to linking.
-SDK_LIBS		?= main net80211 phy pp wpa
-
-# open source libraries linked in
-LIBS ?= hal gcc c
-
-# set to 0 if you want to use the toolchain libc instead of esp-open-rtos newlib
-OWN_LIBC ?= 1
-
-# Note: you will need a recent esp
-ENTRY_SYMBOL ?= call_user_start
-
-# Set this to zero if you don't want individual function & data sections
-# (some code may be slightly slower, linking will be slighty slower,
-# but compiled code size will come down a small amount.)
-SPLIT_SECTIONS ?= 1
-
-# Common flags for both C & C++_
-C_CXX_FLAGS     ?= -Wall -Werror -Wl,-EL -nostdlib $(EXTRA_C_CXX_FLAGS)
-# Flags for C only
-CFLAGS		?= $(C_CXX_FLAGS) -std=gnu99 $(EXTRA_CFLAGS)
-# Flags for C++ only
-CXXFLAGS	?= $(C_CXX_FLAGS) -fno-exceptions -fno-rtti $(EXTRA_CXXFLAGS)
-
-# these aren't technically preprocesor args, but used by all 3 of C, C++, assembler
-CPPFLAGS	+= -mlongcalls -mtext-section-literals
-
-LDFLAGS		= -nostdlib -Wl,--no-check-sections -L$(BUILD_DIR)sdklib -L$(ROOT)lib -u $(ENTRY_SYMBOL) -Wl,-static -Wl,-Map=build/${PROGRAM}.map $(addprefix -T,$(LINKER_SCRIPTS)) $(EXTRA_LDFLAGS)
-
-ifeq ($(SPLIT_SECTIONS),1)
-  C_CXX_FLAGS += -ffunction-sections -fdata-sections
-  LDFLAGS += -Wl,-gc-sections
-endif
-
-ifeq ($(FLAVOR),debug)
-    C_CXX_FLAGS += -g -O0
-    LDFLAGS += -g -O0
-else ifeq ($(FLAVOR),sdklike)
-    # These are flags intended to produce object code as similar as possible to
-    # the output of the compiler used to build the SDK libs (for comparison of
-    # disassemblies when coding replacement routines).  It is not normally
-    # intended to be used otherwise.
-    CFLAGS += -O2 -Os -fno-inline -fno-ipa-cp -fno-toplevel-reorder
-    LDFLAGS += -O2
-else
-    C_CXX_FLAGS += -g -O2
-    LDFLAGS += -g -O2
-endif
-
-GITSHORTREV=\"$(shell cd $(ROOT); git rev-parse --short -q HEAD)\"
-CPPFLAGS += -DGITSHORTREV=$(GITSHORTREV)
-
-ifeq ($(OTA),0)
-LINKER_SCRIPTS = $(ROOT)ld/nonota.ld
-else
-LINKER_SCRIPTS = $(ROOT)ld/ota.ld
-endif
-LINKER_SCRIPTS += $(ROOT)ld/common.ld $(ROOT)ld/rom.ld $(EXTRA_LINKER_SCRIPTS)
-
-####
-#### no user configurable options below here
-####
+include $(ROOT)parameters.mk
 
 ifndef PROGRAM
-	$(error "Set the PROGRAM environment variable in your Makefile before including common.mk"
+$(error "Set the PROGRAM environment variable in your Makefile before including common.mk")
 endif
 
 # hacky way to get a single space value
@@ -163,29 +40,9 @@ PROGRAM_DIR := $(dir $(firstword $(MAKEFILE_LIST)))
 SDK_LIB_ARGS  = $(addprefix -l,$(SDK_LIBS))
 LIB_ARGS      = $(addprefix -l,$(LIBS))
 PROGRAM_OUT   = $(BUILD_DIR)$(PROGRAM).out
+LDFLAGS      += $(addprefix -T,$(LINKER_SCRIPTS))
 
-ifeq ($(OTA),0)
-# for non-OTA, we create two different files for uploading into the flash
-# these are the names and options to generate them
-FW_ADDR_1	= 0x00000
-FW_ADDR_2	= 0x20000
-FW_FILE_1    = $(addprefix $(FW_BASE),$(FW_ADDR_1).bin)
-FW_FILE_2    = $(addprefix $(FW_BASE),$(FW_ADDR_2).bin)
-else
-# for OTA, it's a single monolithic image
-FW_FILE = $(addprefix $(FW_BASE),$(PROGRAM).bin)
-endif
-
-# firmware tool arguments
-ESPTOOL_ARGS=-fs $(FLASH_SIZE)m -fm $(FLASH_MODE) -ff $(FLASH_SPEED)m
-
-IMGTOOL_FLASH_SIZE_2=256
-IMGTOOL_FLASH_SIZE_4=512
-IMGTOOL_FLASH_SIZE_8=1024
-IMGTOOL_FLASH_SIZE_16=2048
-IMGTOOL_FLASH_SIZE_32=4096
-IMGTOOL_FLASH_SIZE=$(value IMGTOOL_FLASH_SIZE_$(FLASH_SIZE))
-IMGTOOL_ARGS=-$(IMGTOOL_FLASH_SIZE) -$(FLASH_MODE) -$(FLASH_SPEED)
+FW_FILE = $(addprefix $(FIRMWARE_DIR),$(PROGRAM).bin)
 
 # Common include directories, shared across all "components"
 # components will add their include directories to this argument
@@ -198,6 +55,9 @@ INC_DIRS      = $(PROGRAM_DIR) $(PROGRAM_DIR)include $(ROOT)include
 ifeq ($(OWN_LIBC),1)
     INC_DIRS += $(ROOT)libc/xtensa-lx106-elf/include
     LDFLAGS += -L$(ROOT)libc/xtensa-lx106-elf/lib
+   ifeq ($(PRINTF_SCANF_FLOAT_SUPPORT),1)
+     LDFLAGS += -u _printf_float -u _scanf_float
+   endif
 endif
 
 ifeq ("$(V)","1")
@@ -208,7 +68,7 @@ Q := @
 vecho := @echo
 endif
 
-.PHONY: all clean debug_print
+.PHONY: all clean flash erase_flash test size rebuild
 
 all: $(PROGRAM_OUT) $(FW_FILE_1) $(FW_FILE_2) $(FW_FILE)
 
@@ -229,8 +89,9 @@ all: $(PROGRAM_OUT) $(FW_FILE_1) $(FW_FILE_2) $(FW_FILE)
 # $(1)_INC_DIR = List of include directories specific for the component
 #
 #
-# Each call appends to COMPONENT_ARS which is a list of archive files for compiled components
+# Each call appends to COMPONENT_ARS or WHOLE_ARCHIVES which are lists of archive files for compiled components
 COMPONENT_ARS =
+WHOLE_ARCHIVES =
 define component_compile_rules
 $(1)_DEFAULT_ROOT := $(dir $(lastword $(MAKEFILE_LIST)))
 $(1)_ROOT ?= $$($(1)_DEFAULT_ROOT)
@@ -274,25 +135,58 @@ $$($(1)_OBJ_DIR)%.o: $$($(1)_REAL_ROOT)%.S $$($(1)_MAKEFILE) $(wildcard $(ROOT)*
 	$$($(1)_CC_BASE) -c $$< -o $$@
 	$$($(1)_CC_BASE) -MM -MT $$@ -MF $$(@:.o=.d) $$<
 
-# the component is shown to depend on both obj and source files so we get a meaningful error message
-# for missing explicitly named source files
-$$($(1)_AR): $$($(1)_OBJ_FILES) $$($(1)_SRC_FILES)
+$(1)_AR_IN_FILES = $$($(1)_OBJ_FILES)
+
+# The component is shown to depend on both obj and source files so we get
+# a meaningful error message for missing explicitly named source files.
+# But do not include source files into a static library because when adding this
+# library with '--whole-archive' linker gives error that archive contains
+# unknown objects (source files)
+ifndef $(1)_WHOLE_ARCHIVE
+   $(1)_AR_IN_FILES += $$($(1)_SRC_FILES)
+endif
+
+$$($(1)_AR): $$($(1)_AR_IN_FILES)
 	$(vecho) "AR $$@"
 	$(Q) mkdir -p $$(dir $$@)
-	$(Q) $(AR) cru $$@ $$(filter %.o,$$^)
+	$(Q) $(AR) cru $$@ $$^
 
-COMPONENT_ARS += $$($(1)_AR)
+ifdef $(1)_WHOLE_ARCHIVE
+   WHOLE_ARCHIVES += $$($(1)_AR)
+else
+   COMPONENT_ARS += $$($(1)_AR)
+endif
 
 -include $$($(1)_OBJ_FILES:.o=.d)
 endef
 
+# Remove comment lines from libgcc.remove file
+$(BUILD_DIR)libgcc.remove: $(ROOT)lib/libgcc.remove | $(BUILD_DIR)
+	$(Q) grep -v "^#" $< | cat > $@
+
+# Remove unwanted object files listed in libgcc.remove
+$(BUILD_DIR)libgcc.a: $(ROOT)lib/libgcc.a $(BUILD_DIR)libgcc.remove | $(BUILD_DIR)
+	@echo "Removing unwanted objects from $<"
+	$(Q) cat $< > $@
+	$(Q) $(AR) d $@ @$(word 2,$^)
+
+# Remove comment lines from libc.remove file
+$(BUILD_DIR)libc.remove: $(ROOT)libc/libc.remove | $(BUILD_DIR)
+	$(Q) grep -v "^#" $< | cat > $@
+
+# Remove unwanted object files listed in libgcc.remove
+$(BUILD_DIR)libc.a: $(ROOT)libc/xtensa-lx106-elf/lib/libc.a $(BUILD_DIR)libc.remove | $(BUILD_DIR)
+	@echo "Removing unwanted objects from $<"
+	$(Q) cat $< > $@
+	$(Q) $(AR) d $@ @$(word 2,$^)
+
 ## Linking rules for SDK libraries
 ## SDK libraries are preprocessed to:
 # - remove object files named in <libname>.remove
 # - prefix all defined symbols with 'sdk_'
 # - weaken all global symbols so they can be overriden from the open SDK side
 #
-# SDK binary libraries are preprocessed into build/sdklib
+# SDK binary libraries are preprocessed into $(BUILD_DIR)/sdklib
 SDK_PROCESSED_LIBS = $(addsuffix .a,$(addprefix $(BUILD_DIR)sdklib/lib,$(SDK_LIBS)))
 
 # Make rules for preprocessing each SDK library
@@ -334,34 +228,37 @@ $(foreach component,$(COMPONENTS), 					\
 )
 
 # final linking step to produce .elf
-$(PROGRAM_OUT): $(COMPONENT_ARS) $(SDK_PROCESSED_LIBS) $(LINKER_SCRIPTS)
+$(PROGRAM_OUT): $(WHOLE_ARCHIVES) $(COMPONENT_ARS) $(BUILD_DIR)libgcc.a $(BUILD_DIR)libc.a $(SDK_PROCESSED_LIBS) $(LINKER_SCRIPTS)
 	$(vecho) "LD $@"
-	$(Q) $(LD) $(LDFLAGS) -Wl,--start-group $(COMPONENT_ARS) $(LIB_ARGS) $(SDK_LIB_ARGS) -Wl,--end-group -o $@
+	$(Q) $(LD) $(LDFLAGS) -Wl,--whole-archive $(WHOLE_ARCHIVES) -Wl,--no-whole-archive -Wl,--start-group $(COMPONENT_ARS) $(BUILD_DIR)libgcc.a $(BUILD_DIR)libc.a $(LIB_ARGS) $(SDK_LIB_ARGS) -Wl,--end-group -o $@
 
-$(BUILD_DIR) $(FW_BASE) $(BUILD_DIR)sdklib:
+$(BUILD_DIR) $(FIRMWARE_DIR) $(BUILD_DIR)sdklib:
 	$(Q) mkdir -p $@
 
-$(FW_FILE_1) $(FW_FILE_2): $(PROGRAM_OUT) $(FW_BASE)
+$(FW_FILE_1) $(FW_FILE_2): $(PROGRAM_OUT) $(FIRMWARE_DIR)
 	$(vecho) "FW $@"
-	$(Q) $(ESPTOOL) elf2image $(ESPTOOL_ARGS) $< -o $(FW_BASE)
+	$(Q) $(ESPTOOL) elf2image $(ESPTOOL_ARGS) $< -o $(FIRMWARE_DIR)
 
-$(FW_FILE): $(PROGRAM_OUT) $(FW_BASE)
-	$(Q) $(IMGTOOL) $(IMGTOOL_ARGS) -bin -boot2 $(PROGRAM_OUT) $(FW_FILE) .text .data .rodata
+$(FW_FILE): $(PROGRAM_OUT) $(FIRMWARE_DIR)
+	$(vecho) "FW $@"
+	$(Q) $(ESPTOOL) elf2image --version=2 $(ESPTOOL_ARGS) $< -o $(FW_FILE)
 
-ifeq ($(OTA),0)
-flash: $(FW_FILE_1) $(FW_FILE_2)
-	$(ESPTOOL) -p $(ESPPORT) --baud $(ESPBAUD) write_flash $(ESPTOOL_ARGS) $(FW_ADDR_2) $(FW_FILE_2) $(FW_ADDR_1) $(FW_FILE_1)
-else
-flash: $(FW_FILE)
-	$(vecho) "Flashing OTA image slot 0 (bootloader not updated)"
-	$(ESPTOOL) -p $(ESPPORT) --baud $(ESPBAUD) write_flash $(ESPTOOL_ARGS) 0x2000 $(FW_FILE)
-endif
+flash: all
+	$(if will_flash, $(call will_flash, "flash"))
+	$(ESPTOOL) -p $(ESPPORT) --baud $(ESPBAUD) write_flash $(ESPTOOL_ARGS) \
+		$(RBOOT_ARGS) 0x2000 $(FW_FILE) $(SPIFFS_ESPTOOL_ARGS)
+	$(if did_flash, $(call did_flash, "flash"))
+
+erase_flash:
+	$(if will_flash, $(call will_flash, "erase"))
+	$(ESPTOOL) -p $(ESPPORT) --baud $(ESPBAUD) erase_flash
+	$(if did_flash, $(call did_flash, "erase"))
 
 size: $(PROGRAM_OUT)
 	$(Q) $(CROSS)size --format=sysv $(PROGRAM_OUT)
 
 test: flash
-	screen $(ESPPORT) 115200
+	$(FILTEROUTPUT) --port $(ESPPORT) --baud 115200 --elf $(PROGRAM_OUT)
 
 # the rebuild target is written like this so it can be run in a parallel build
 # environment without causing weird side effects
@@ -371,7 +268,7 @@ rebuild:
 
 clean:
 	$(Q) rm -rf $(BUILD_DIR)
-	$(Q) rm -rf $(FW_BASE)
+	$(Q) rm -rf $(FIRMWARE_DIR)
 
 # prevent "intermediate" files from being deleted
 .SECONDARY:

core/app_main.c

@@ -21,18 +21,24 @@
 #include "esp/spi_regs.h"
 #include "esp/dport_regs.h"
 #include "esp/wdev_regs.h"
+#include "esp/wdt_regs.h"
+#include "esp/rtcmem_regs.h"
+#include "esp/hwrand.h"
 #include "os_version.h"
 
 #include "espressif/esp_common.h"
-#include "sdk_internal.h"
+#include "espressif/phy_info.h"
+#include "esplibs/libmain.h"
+#include "esplibs/libnet80211.h"
+#include "esplibs/libphy.h"
+#include "esplibs/libpp.h"
+#include "sysparam.h"
 
 /* This is not declared in any header file (but arguably should be) */
 
 void user_init(void);
 
 #define BOOT_INFO_SIZE 28
-//TODO: phy_info should probably be a struct (no idea about its organization, though)
-#define PHY_INFO_SIZE 128
 
 // These are the offsets of these values within the RTCMEM regions.  It appears
 // that the ROM saves them to RTCMEM before calling us, and we pull them out of
@@ -40,31 +46,9 @@ void user_init(void);
 #define RTCMEM_BACKUP_PHY_VER  31
 #define RTCMEM_SYSTEM_PP_VER   62
 
-#define halt()  while (1) {}
-
 extern uint32_t _bss_start;
 extern uint32_t _bss_end;
 
-// .Ldata003 -- .irom.text+0x0
-static const uint8_t IROM default_phy_info[PHY_INFO_SIZE] = {
-    0x05, 0x00, 0x04, 0x02, 0x05, 0x05, 0x05, 0x02,
-    0x05, 0x00, 0x04, 0x05, 0x05, 0x04, 0x05, 0x05,
-    0x04, 0xfe, 0xfd, 0xff, 0xf0, 0xf0, 0xf0, 0xe0,
-    0xe0, 0xe0, 0xe1, 0x0a, 0xff, 0xff, 0xf8, 0x00,
-    0xf8, 0xf8, 0x52, 0x4e, 0x4a, 0x44, 0x40, 0x38,
-    0x00, 0x00, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05,
-    0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0xe1, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x01, 0x93, 0x43, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
 // user_init_flag -- .bss+0x0
 uint8_t sdk_user_init_flag;
 
@@ -72,19 +56,18 @@ uint8_t sdk_user_init_flag;
 struct sdk_info_st sdk_info;
 
 // xUserTaskHandle -- .bss+0x28
-xTaskHandle sdk_xUserTaskHandle;
+TaskHandle_t sdk_xUserTaskHandle;
 
 // xWatchDogTaskHandle -- .bss+0x2c
-xTaskHandle sdk_xWatchDogTaskHandle;
+TaskHandle_t sdk_xWatchDogTaskHandle;
 
 /* Static function prototypes */
 
 static void IRAM get_otp_mac_address(uint8_t *buf);
 static void IRAM set_spi0_divisor(uint32_t divisor);
 static void zero_bss(void);
-static void init_networking(uint8_t *phy_info, uint8_t *mac_addr);
+static void init_networking(sdk_phy_info_t *phy_info, uint8_t *mac_addr);
 static void init_g_ic(void);
-static void dump_excinfo(void);
 static void user_start_phase2(void);
 static void dump_flash_sector(uint32_t start_sector, uint32_t length);
 static void dump_flash_config_sectors(uint32_t start_sector);
@@ -101,11 +84,11 @@ static void IRAM get_otp_mac_address(uint8_t *buf) {
     if (!(otp_flags & 0x8000)) {
         //FIXME: do we really need this check?
         printf("Firmware ONLY supports ESP8266!!!\n");
-        halt();
+        abort();
     }
     if (otp_id0 == 0 && otp_id1 == 0) {
         printf("empty otp\n");
-        halt();
+        abort();
     }
     if (otp_flags & 0x1000) {
         // If bit 12 is set, it indicates that the vendor portion of the MAC
@@ -146,28 +129,15 @@ static void IRAM set_spi0_divisor(uint32_t divisor) {
     SPI(0).CTRL0 = SET_FIELD(SPI(0).CTRL0, SPI_CTRL0_CLOCK, clkdiv);
 }
 
-// .text+0x148
-void IRAM sdk_user_fatal_exception_handler(void) {
-    if (!sdk_NMIIrqIsOn) {
-        vPortEnterCritical();
-        do {
-            DPORT.DPORT0 &= 0xffffffe0;
-        } while (DPORT.DPORT0 & 0x00000001);
-    }
-    Cache_Read_Disable();
-    Cache_Read_Enable(0, 0, 1);
-    dump_excinfo();
-    uart_flush_txfifo(0);
-    uart_flush_txfifo(1);
-    sdk_system_restart_in_nmi();
-    halt();
-}
-
 
 static void IRAM default_putc(char c) {
     uart_putc(0, c);
 }
 
+void init_newlib_locks(void);
+extern uint8_t sdk_wDevCtrl[];
+void nano_malloc_insert_chunk(void *start, size_t size);
+
 // .text+0x258
 void IRAM sdk_user_start(void) {
     uint32_t buf32[sizeof(struct sdk_g_ic_saved_st) / 4];
@@ -180,6 +150,8 @@ void IRAM sdk_user_start(void) {
     uint32_t cksum_len;
     uint32_t cksum_value;
     uint32_t ic_flash_addr;
+    uint32_t sysparam_addr;
+    sysparam_status_t status;
 
     SPI(0).USER0 |= SPI_USER0_CS_SETUP;
     sdk_SPIRead(0, buf32, 4);
@@ -202,25 +174,32 @@ void IRAM sdk_user_start(void) {
     }
     switch (buf8[3] >> 4) {
         case 0x0:   // 4 Mbit (512 KByte)
-            flash_sectors = 128;
+            flash_size = 524288;
             break;
         case 0x1:  // 2 Mbit (256 Kbyte)
-            flash_sectors = 64;
+            flash_size = 262144;
             break;
         case 0x2:  // 8 Mbit (1 Mbyte)
-            flash_sectors = 256;
+            flash_size = 1048576;
             break;
         case 0x3:  // 16 Mbit (2 Mbyte)
-            flash_sectors = 512;
+        case 0x5:  // 16 Mbit (2 Mbyte)
+            flash_size = 2097152;
             break;
         case 0x4:  // 32 Mbit (4 Mbyte)
-            flash_sectors = 1024;
+        case 0x6:  // 32 Mbit (4 Mbyte)
+            flash_size = 4194304;
+            break;
+        case 0x8:  // 64 Mbit (8 Mbyte)
+            flash_size = 8388608;
+            break;
+        case 0x9:  // 128 Mbit (16 Mbyte)
+            flash_size = 16777216;
             break;
         default:   // Invalid -- Assume 4 Mbit (512 KByte)
-            flash_sectors = 128;
+            flash_size = 524288;
     }
-    //FIXME: we should probably calculate flash_sectors by starting with flash_size and dividing by sdk_flashchip.sector_size instead of vice-versa.
-    flash_size = flash_sectors * 4096;
+    flash_sectors = flash_size / sdk_flashchip.sector_size;
     sdk_flashchip.chip_size = flash_size;
     set_spi0_divisor(flash_speed_divisor);
     sdk_SPIRead(flash_size - 4096, buf32, BOOT_INFO_SIZE);
@@ -233,6 +212,15 @@ void IRAM sdk_user_start(void) {
     Cache_Read_Enable(0, 0, 1);
     zero_bss();
     sdk_os_install_putc1(default_putc);
+
+    /* HACK Reclaim a region of unused bss from wdev.o. This would not be
+     * necessary if the source code to wdev were available, and then it would
+     * not be a fragmented area, but the extra memory is desparately needed and
+     * it is in very useful dram. */
+    nano_malloc_insert_chunk((void *)(sdk_wDevCtrl + 0x2190), 8000);
+
+    init_newlib_locks();
+
     if (cksum_magic == 0xffffffff) {
         // No checksum required
     } else if ((cksum_magic == 0x55aa55aa) &&
@@ -245,21 +233,35 @@ void IRAM sdk_user_start(void) {
     }
     memcpy(&sdk_g_ic.s, buf32, sizeof(struct sdk_g_ic_saved_st));
 
+    // By default, put the sysparam region just below the config sectors at the
+    // top of the flash space, and allowing one extra sector spare.
+    sysparam_addr = flash_size - (5 + DEFAULT_SYSPARAM_SECTORS) * sdk_flashchip.sector_size;
+    status = sysparam_init(sysparam_addr, flash_size);
+    if (status == SYSPARAM_NOTFOUND) {
+        status = sysparam_create_area(sysparam_addr, DEFAULT_SYSPARAM_SECTORS, false);
+        if (status == SYSPARAM_OK) {
+            status = sysparam_init(sysparam_addr, 0);
+        }
+    }
+    if (status != SYSPARAM_OK) {
+        printf("WARNING: Could not initialize sysparams (%d)!\n", status);
+    }
+
     user_start_phase2();
 }
 
 // .text+0x3a8
-void IRAM vApplicationStackOverflowHook(xTaskHandle task, char *task_name) {
-    printf("\"%s\"(stack_size = %lu) overflow the heap_size.\n", task_name, uxTaskGetStackHighWaterMark(task));
+void IRAM vApplicationStackOverflowHook(TaskHandle_t task, char *task_name) {
+    printf("Task stack overflow (high water mark=%lu name=\"%s\")\n", uxTaskGetStackHighWaterMark(task), task_name);
 }
 
 // .text+0x3d8
-void IRAM vApplicationIdleHook(void) {
+void __attribute__((weak)) IRAM vApplicationIdleHook(void) {
     printf("idle %u\n", WDEV.SYS_TIME);
 }
 
 // .text+0x404
-void IRAM vApplicationTickHook(void) {
+void __attribute__((weak)) IRAM vApplicationTickHook(void) {
     printf("tick %u\n", WDEV.SYS_TIME);
 }
 
@@ -273,13 +275,26 @@ static void zero_bss(void) {
 }
 
 // .Lfunc006 -- .irom0.text+0x70
-static void init_networking(uint8_t *phy_info, uint8_t *mac_addr) {
+static void init_networking(sdk_phy_info_t *phy_info, uint8_t *mac_addr) {
+    // The call to sdk_register_chipv6_phy appears to change the bus clock,
+    // perhaps from 40MHz to 26MHz, at least it has such an effect on the uart
+    // baud rate. The caller flushes the TX fifos.
     if (sdk_register_chipv6_phy(phy_info)) {
         printf("FATAL: sdk_register_chipv6_phy failed");
-        halt();
+        abort();
     }
-    uart_set_baud(0, 74906);
-    uart_set_baud(1, 74906);
+
+    // The boot rom initializes uart0 for a 115200 baud rate but the bus clock
+    // does not appear to be as expected so the initial baud rate is actually
+    // 74906. On a cold boot, to keep the 74906 baud rate the uart0 divisor
+    // would need to changed here to 74906. On a warm boot the bus clock is
+    // expected to have already been set so the boot baud rate is 115200.
+    // Reset the rate here and settle on a 115200 baud rate.
+    if (sdk_rst_if.reason > 0) {
+        uart_set_baud(0, 115200);
+        uart_set_baud(1, 115200);
+    }
+
     sdk_phy_disable_agc();
     sdk_ieee80211_phy_init(sdk_g_ic.s.phy_mode);
     sdk_lmacInit();
@@ -316,13 +331,13 @@ static void init_g_ic(void) {
     if (sdk_g_ic.s._unknown310 > 4) {
         sdk_g_ic.s._unknown310 = 4;
     }
-    if (sdk_g_ic.s._unknown1e4._unknown1e4 == 0xffffffff) {
-        bzero(&sdk_g_ic.s._unknown1e4, sizeof(sdk_g_ic.s._unknown1e4));
-        bzero(&sdk_g_ic.s._unknown20f, sizeof(sdk_g_ic.s._unknown20f));
+    if (sdk_g_ic.s.sta_ssid.ssid_length == 0xffffffff) {
+        bzero(&sdk_g_ic.s.sta_ssid, sizeof(sdk_g_ic.s.sta_ssid));
+        bzero(&sdk_g_ic.s.sta_password, sizeof(sdk_g_ic.s.sta_password));
     }
     sdk_g_ic.s.wifi_led_enable = 0;
-    if (sdk_g_ic.s._unknown281 > 1) {
-        sdk_g_ic.s._unknown281 = 0;
+    if (sdk_g_ic.s.sta_bssid_set > 1) {
+        sdk_g_ic.s.sta_bssid_set = 0;
     }
     if (sdk_g_ic.s.ap_number > 5) {
         sdk_g_ic.s.ap_number = 1;
@@ -332,37 +347,6 @@ static void init_g_ic(void) {
     }
 }
 
-// .Lfunc008 -- .irom0.text+0x2a0
-static void dump_excinfo(void) {
-    uint32_t exccause, epc1, epc2, epc3, excvaddr, depc, excsave1;
-    uint32_t excinfo[8];
-
-    RSR(exccause, exccause);
-    printf("Fatal exception (%d): \n", (int)exccause);
-    RSR(epc1, epc1);
-    RSR(epc2, epc2);
-    RSR(epc3, epc3);
-    RSR(excvaddr, excvaddr);
-    RSR(depc, depc);
-    RSR(excsave1, excsave1);
-    printf("%s=0x%08x\n", "epc1", epc1);
-    printf("%s=0x%08x\n", "epc2", epc2);
-    printf("%s=0x%08x\n", "epc3", epc3);
-    printf("%s=0x%08x\n", "excvaddr", excvaddr);
-    printf("%s=0x%08x\n", "depc", depc);
-    printf("%s=0x%08x\n", "excsave1", excsave1);
-    sdk_system_rtc_mem_read(0, excinfo, 32); // Why?
-    excinfo[0] = 2;
-    excinfo[1] = exccause;
-    excinfo[2] = epc1;
-    excinfo[3] = epc2;
-    excinfo[4] = epc3;
-    excinfo[5] = excvaddr;
-    excinfo[6] = depc;
-    excinfo[7] = excsave1;
-    sdk_system_rtc_mem_write(0, excinfo, 32);
-}
-
 // .irom0.text+0x398
 void sdk_wdt_init(void) {
     WDT.CTRL &= ~WDT_CTRL_ENABLE;
@@ -375,10 +359,16 @@ void sdk_wdt_init(void) {
     sdk_pp_soft_wdt_init();
 }
 
+extern void *xPortSupervisorStackPointer;
+
 // .irom0.text+0x474
 void sdk_user_init_task(void *params) {
     int phy_ver, pp_ver;
 
+    /* The start up stack is not used after scheduling has started, so all of
+     * the top area of RAM which was stack can be used for the dynamic heap. */
+    xPortSupervisorStackPointer = (void *)0x40000000;
+
     sdk_ets_timer_init();
     printf("\nESP-Open-SDK ver: %s compiled @ %s %s\n", OS_VERSION_STR, __DATE__, __TIME__);
     phy_ver = RTCMEM_BACKUP[RTCMEM_BACKUP_PHY_VER] >> 16;
@@ -388,18 +378,24 @@ void sdk_user_init_task(void *params) {
     user_init();
     sdk_user_init_flag = 1;
     sdk_wifi_mode_set(sdk_g_ic.s.wifi_mode);
-    if (sdk_g_ic.s.wifi_mode == 1) {
+    if (sdk_g_ic.s.wifi_mode == STATION_MODE) {
         sdk_wifi_station_start();
+        LOCK_TCPIP_CORE();
         netif_set_default(sdk_g_ic.v.station_netif_info->netif);
+        UNLOCK_TCPIP_CORE();
     }
-    if (sdk_g_ic.s.wifi_mode == 2) {
+    if (sdk_g_ic.s.wifi_mode == SOFTAP_MODE) {
         sdk_wifi_softap_start();
+        LOCK_TCPIP_CORE();
         netif_set_default(sdk_g_ic.v.softap_netif_info->netif);
+        UNLOCK_TCPIP_CORE();
     }
-    if (sdk_g_ic.s.wifi_mode == 3) {
+    if (sdk_g_ic.s.wifi_mode == STATIONAP_MODE) {
         sdk_wifi_station_start();
         sdk_wifi_softap_start();
-        netif_set_default(sdk_g_ic.v.softap_netif_info->netif);
+        LOCK_TCPIP_CORE();
+        netif_set_default(sdk_g_ic.v.station_netif_info->netif);
+        UNLOCK_TCPIP_CORE();
     }
     if (sdk_wifi_station_get_auto_connect()) {
         sdk_wifi_station_connect();
@@ -411,13 +407,13 @@ extern void (*__init_array_start)(void);
 extern void (*__init_array_end)(void);
 
 // .Lfunc009 -- .irom0.text+0x5b4
-static void user_start_phase2(void) {
+static __attribute__((noinline)) void user_start_phase2(void) {
     uint8_t *buf;
-    uint8_t *phy_info;
+    sdk_phy_info_t phy_info, default_phy_info;
 
     sdk_system_rtc_mem_read(0, &sdk_rst_if, sizeof(sdk_rst_if));
-    if (sdk_rst_if.version > 3) {
-        // Bad version number. Probably garbage.
+    if (sdk_rst_if.reason > 3) {
+        // Bad reason. Probably garbage.
         bzero(&sdk_rst_if, sizeof(sdk_rst_if));
     }
     buf = malloc(sizeof(sdk_rst_if));
@@ -427,35 +423,42 @@ static void user_start_phase2(void) {
     sdk_sleep_reset_analog_rtcreg_8266();
     get_otp_mac_address(sdk_info.sta_mac_addr);
     sdk_wifi_softap_cacl_mac(sdk_info.softap_mac_addr, sdk_info.sta_mac_addr);
-    sdk_info._unknown0 = 0x0104a8c0;
-    sdk_info._unknown1 = 0x00ffffff;
-    sdk_info._unknown2 = 0x0104a8c0;
+    sdk_info.softap_ipaddr.addr = 0x0104a8c0;  // 192.168.4.1
+    sdk_info.softap_netmask.addr = 0x00ffffff; // 255.255.255.0
+    sdk_info.softap_gw.addr = 0x0104a8c0;      // 192.168.4.1
     init_g_ic();
-    phy_info = malloc(PHY_INFO_SIZE);
-    sdk_spi_flash_read(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)phy_info, PHY_INFO_SIZE);
 
-    // Disable default buffering on stdout
-    setbuf(stdout, NULL);
+    read_saved_phy_info(&phy_info);
+    get_default_phy_info(&default_phy_info);
+
+    if (phy_info.version != default_phy_info.version) {
+        /* Versions don't match, use default for PHY info
+           (may be a blank config sector, or a new default version.)
+         */
+        memcpy(&phy_info, &default_phy_info, sizeof(sdk_phy_info_t));
+    }
+
     // Wait for UARTs to finish sending anything in their queues.
     uart_flush_txfifo(0);
     uart_flush_txfifo(1);
 
+    init_networking(&phy_info, sdk_info.sta_mac_addr);
+
+    srand(hwrand()); /* seed libc rng */
+
+    // Set intial CPU clock speed to 160MHz if necessary
+    _Static_assert(configCPU_CLOCK_HZ == 80000000 || configCPU_CLOCK_HZ == 160000000, "FreeRTOSConfig must define initial clock speed as either 80MHz or 160MHz");
+    sdk_system_update_cpu_freq(configCPU_CLOCK_HZ / 1000000);
+
     // Call gcc constructor functions
     void (**ctor)(void);
     for ( ctor = &__init_array_start; ctor != &__init_array_end; ++ctor) {
         (*ctor)();
     }
 
-    if (phy_info[0] != 5) {
-        // Bad version byte.  Discard what we read and use default values
-        // instead.
-        memcpy(phy_info, default_phy_info, PHY_INFO_SIZE);
-    }
-    init_networking(phy_info, sdk_info.sta_mac_addr);
-    free(phy_info);
     tcpip_init(NULL, NULL);
     sdk_wdt_init();
-    xTaskCreate(sdk_user_init_task, (signed char *)"uiT", 1024, 0, 14, &sdk_xUserTaskHandle);
+    xTaskCreate(sdk_user_init_task, "uiT", 1024, 0, 14, &sdk_xUserTaskHandle);
     vTaskStartScheduler();
 }
 
@@ -482,11 +485,11 @@ static void dump_flash_sector(uint32_t start_sector, uint32_t length) {
 }
 
 // .Lfunc011 -- .irom0.text+0x790
-static void dump_flash_config_sectors(uint32_t start_sector) {
+static __attribute__((noinline)) void dump_flash_config_sectors(uint32_t start_sector) {
     printf("system param error\n");
     // Note: original SDK code didn't dump PHY info
     printf("phy_info:\n");
-    dump_flash_sector(start_sector, PHY_INFO_SIZE);
+    dump_flash_sector(start_sector, sizeof(sdk_phy_info_t));
     printf("\ng_ic saved 0:\n");
     dump_flash_sector(start_sector + 1, sizeof(struct sdk_g_ic_saved_st));
     printf("\ng_ic saved 1:\n");

core/cplusplus_operators.cpp

@@ -4,22 +4,22 @@
 #include <stdio.h>
 #include <stdlib.h>
 
-void *operator new(size_t size)
+void * __attribute__((weak)) operator new(size_t size)
 {
     return malloc(size);
 }
 
-void *operator new[](size_t size)
+void * __attribute__((weak)) operator new[](size_t size)
 {
     return malloc(size);
 }
 
-void operator delete(void * ptr)
+void __attribute__((weak)) operator delete(void * ptr)
 {
     free(ptr);
 }
 
-void operator delete[](void * ptr)
+void __attribute__((weak)) operator delete[](void * ptr)
 {
     free(ptr);
 }

core/debug_dumps.c

@@ -0,0 +1,245 @@
+/* Code for dumping status/debug output/etc, including fatal
+ * exception handling & abort implementation.
+ *
+ * Part of esp-open-rtos
+ *
+ * Partially reverse engineered from MIT licensed Espressif RTOS SDK Copyright (C) Espressif Systems.
+ * Additions Copyright (C) 2015 Superhouse Automation Pty Ltd
+ * BSD Licensed as described in the file LICENSE
+ */
+#include <string.h>
+#include <stdio.h>
+#include <FreeRTOS.h>
+#include <task.h>
+#include <malloc.h>
+#include <unistd.h>
+
+#include "debug_dumps.h"
+#include "common_macros.h"
+#include "xtensa_ops.h"
+#include "esp/rom.h"
+#include "esp/uart.h"
+#include "esp/dport_regs.h"
+#include "espressif/esp_common.h"
+#include "esplibs/libmain.h"
+#include "user_exception.h"
+
+/* Forward declarations */
+static void IRAM fatal_handler_prelude(void);
+/* Inner parts of crash handlers */
+typedef void __attribute__((noreturn)) (*fatal_exception_handler_fn)(uint32_t *sp, bool registers_saved_on_stack);
+static void __attribute__((noreturn)) standard_fatal_exception_handler_inner(uint32_t *sp, bool registers_saved_on_stack);
+static void __attribute__((noreturn)) second_fatal_exception_handler_inner(uint32_t *sp, bool registers_saved_on_stack);
+static void __attribute__((noinline)) __attribute__((noreturn)) abort_handler_inner(uint32_t *caller, uint32_t *sp);
+
+static IRAM_DATA fatal_exception_handler_fn fatal_exception_handler_inner = standard_fatal_exception_handler_inner;
+
+static void (*user_exception_handler)(void) = NULL;
+
+/* fatal_exception_handler called from any unhandled user exception
+ *
+ * (similar to a hard fault on other processor architectures)
+ *
+ * This function is run from IRAM, but the majority of the handler
+ * runs from flash after fatal_handler_prelude ensures it is mapped
+ * safely.
+ */
+void IRAM __attribute__((noreturn)) fatal_exception_handler(uint32_t *sp, bool registers_saved_on_stack) {
+    fatal_handler_prelude();
+    fatal_exception_handler_fn inner_fn = fatal_exception_handler_inner;
+    inner_fn(sp, registers_saved_on_stack);
+}
+
+/* Abort implementation
+ *
+ * Replaces the weak-linked abort implementation provided by newlib libc.
+ *
+ * Disable interrupts, enable flash mapping, dump stack & caller
+ * address, restart.
+ *
+ * This function is run from IRAM, but the majority of the abort
+ * handler runs from flash after fatal_handler_prelude ensures it is
+ * mapped safely.
+ *
+ */
+void IRAM abort(void) {
+    uint32_t *sp, *caller;
+    RETADDR(caller);
+    /* abort() caller is one instruction before our return address */
+    caller = (uint32_t *)((intptr_t)caller - 3);
+    SP(sp);
+    fatal_handler_prelude();
+    abort_handler_inner(caller, sp);
+}
+
+/* Dump exception information from special function registers */
+static void dump_excinfo(void) {
+    uint32_t exccause, epc1, epc2, epc3, excvaddr, depc, excsave1;
+    uint32_t excinfo[8];
+
+    RSR(exccause, exccause);
+    printf("Fatal exception (%d): \n", (int)exccause);
+    RSR(epc1, epc1);
+    RSR(epc2, epc2);
+    RSR(epc3, epc3);
+    RSR(excvaddr, excvaddr);
+    RSR(depc, depc);
+    RSR(excsave1, excsave1);
+    printf("%s=0x%08x\n", "epc1", epc1);
+    printf("%s=0x%08x\n", "epc2", epc2);
+    printf("%s=0x%08x\n", "epc3", epc3);
+    printf("%s=0x%08x\n", "excvaddr", excvaddr);
+    printf("%s=0x%08x\n", "depc", depc);
+    printf("%s=0x%08x\n", "excsave1", excsave1);
+    sdk_system_rtc_mem_read(0, excinfo, 32); // Why?
+    excinfo[0] = 2;
+    excinfo[1] = exccause;
+    excinfo[2] = epc1;
+    excinfo[3] = epc2;
+    excinfo[4] = epc3;
+    excinfo[5] = excvaddr;
+    excinfo[6] = depc;
+    excinfo[7] = excsave1;
+    sdk_system_rtc_mem_write(0, excinfo, 32);
+}
+
+/* dump stack memory (frames above sp) to stdout
+
+   There's a lot of smart stuff we could do while dumping stack
+   but for now we just dump what looks like our stack region.
+
+   Probably dumps more memory than it needs to, the first instance of
+   0xa5a5a5a5 probably constitutes the end of our stack.
+*/
+void dump_stack(uint32_t *sp) {
+    printf("\nStack: SP=%p\n", sp);
+    for(uint32_t *p = sp; p < sp + 32; p += 4) {
+        if((intptr_t)p >= 0x3fffc000) {
+            break; /* approximate end of RAM */
+        }
+        printf("%p: %08x %08x %08x %08x\n", p, p[0], p[1], p[2], p[3]);
+        if(p[0] == 0xa5a5a5a5 && p[1] == 0xa5a5a5a5
+           && p[2] == 0xa5a5a5a5 && p[3] == 0xa5a5a5a5) {
+            break; /* FreeRTOS uses this pattern to mark untouched stack space */
+        }
+    }
+}
+
+/* Dump normal registers that were stored above 'sp'
+   by the exception handler preamble
+*/
+void dump_registers_in_exception_handler(uint32_t *sp) {
+    uint32_t excsave1;
+    uint32_t *saved = sp - (0x50 / sizeof(uint32_t));
+    printf("Registers:\n");
+    RSR(excsave1, excsave1);
+    printf("a0 %08x ", excsave1);
+    printf("a1 %08x ", (intptr_t)sp);
+    for(int a = 2; a < 14; a++) {
+        printf("a%-2d %08x%c", a, saved[a+3], a == 3 || a == 7 || a == 11 ? '\n':' ');
+    }
+    printf("SAR %08x\n", saved[0x13]);
+}
+
+static void __attribute__((noreturn)) post_crash_reset(void) {
+    uart_flush_txfifo(0);
+    uart_flush_txfifo(1);
+    sdk_system_restart_in_nmi();
+    while(1) {}
+}
+
+/* Prelude ensures exceptions/NMI off and flash is mapped, allowing
+   calls to non-IRAM functions.
+*/
+static void IRAM fatal_handler_prelude(void) {
+    if (!sdk_NMIIrqIsOn) {
+        vPortEnterCritical();
+        do {
+            DPORT.DPORT0 &= 0xffffffe0;
+        } while (DPORT.DPORT0 & 0x00000001);
+    }
+    Cache_Read_Disable();
+    Cache_Read_Enable(0, 0, 1);
+
+    if (user_exception_handler != NULL) {
+      user_exception_handler();
+    }
+}
+
+/* Main part of fatal exception handler, is run from flash to save
+   some IRAM.
+*/
+static void standard_fatal_exception_handler_inner(uint32_t *sp, bool registers_saved_on_stack) {
+    /* Replace the fatal exception handler 'inner' function so we
+       don't end up in a crash loop if this handler crashes. */
+    fatal_exception_handler_inner = second_fatal_exception_handler_inner;
+    dump_excinfo();
+    if (sp) {
+        if (registers_saved_on_stack) {
+            dump_registers_in_exception_handler(sp);
+        }
+        dump_stack(sp);
+    }
+    dump_heapinfo();
+    post_crash_reset();
+}
+
+/* This is the exception handler that gets called if a crash occurs inside the standard handler,
+   so we don't end up in a crash loop. It doesn't rely on contents of stack or heap.
+*/
+static void second_fatal_exception_handler_inner(uint32_t *sp, bool registers_saved_on_stack) {
+    dump_excinfo();
+    printf("Second fatal exception occured inside fatal exception handler. Can't continue.\n");
+    post_crash_reset();
+}
+
+void dump_heapinfo(void)
+{
+    extern char _heap_start;
+    extern uint32_t xPortSupervisorStackPointer;
+    struct mallinfo mi = mallinfo();
+    uint32_t brk_val = (uint32_t) sbrk(0);
+    uint32_t sp = xPortSupervisorStackPointer;
+    if(sp == 0) {
+        SP(sp);
+    }
+
+    /* Total free heap is all memory that could be allocated via
+       malloc (assuming fragmentation doesn't become a problem) */
+    printf("\nFree Heap: %d\n", sp - brk_val + mi.fordblks);
+
+    /* delta between brk & supervisor sp is the contiguous memory
+       region that is available to be put into heap space via
+       brk(). */
+    printf("_heap_start %p brk 0x%08x supervisor sp 0x%08x sp-brk %d bytes\n",
+           &_heap_start, brk_val, sp, sp-brk_val);
+
+    /* arena/fordblks/uordblks determines the amount of free space
+      inside the heap region already added via brk(). May be
+      fragmented.
+
+       The values in parentheses are the values used internally by
+       nano-mallocr.c, the field names outside parentheses are the
+       POSIX compliant field names of the mallinfo structure.
+
+       "arena" should be equal to brk-_heap_start ie total size available.
+     */
+    printf("arena (total_size) %d fordblks (free_size) %d uordblocks (used_size) %d\n",
+           mi.arena, mi.fordblks, mi.uordblks);
+}
+
+/* Main part of abort handler, can be run from flash to save some
+   IRAM.
+*/
+static void abort_handler_inner(uint32_t *caller, uint32_t *sp) {
+    printf("abort() invoked at %p.\n", caller);
+    dump_stack(sp);
+    dump_heapinfo();
+    post_crash_reset();
+}
+
+void set_user_exception_handler(void (*fn)(void))
+{
+  user_exception_handler = fn;
+}
+

core/esp_gpio.c

@@ -5,35 +5,85 @@
  * BSD Licensed as described in the file LICENSE
  */
 #include <esp/gpio.h>
+#include <esp/rtc_regs.h>
 
 void gpio_enable(const uint8_t gpio_num, const gpio_direction_t direction)
 {
-    uint32_t iomux_flags;
+    if (gpio_num == 16) {
+        RTC.GPIO_CFG[3] = (RTC.GPIO_CFG[3] & 0xffffffbc) | 1;
+        RTC.GPIO_CONF = (RTC.GPIO_CONF & 0xfffffffe) | 0;
+        switch (direction) {
+        case GPIO_INPUT:
+            RTC.GPIO_ENABLE = (RTC.GPIO_OUT & 0xfffffffe);
+            break;
+        case GPIO_OUTPUT:
+        case GPIO_OUT_OPEN_DRAIN:
+            /* TODO open drain? */
+            RTC.GPIO_ENABLE = (RTC.GPIO_OUT & 0xfffffffe) | 1;
+            break;
+        }
+        return;
+    }
 
-    switch(direction) {
+    switch (direction) {
     case GPIO_INPUT:
-        iomux_flags = 0;
+        GPIO.ENABLE_OUT_CLEAR = BIT(gpio_num);
+        iomux_set_gpio_function(gpio_num, false);
         break;
     case GPIO_OUTPUT:
-        iomux_flags = IOMUX_PIN_OUTPUT_ENABLE;
+        GPIO.CONF[gpio_num] &= ~GPIO_CONF_OPEN_DRAIN;
+        GPIO.ENABLE_OUT_SET = BIT(gpio_num);
+        iomux_set_gpio_function(gpio_num, true);
         break;
     case GPIO_OUT_OPEN_DRAIN:
-        iomux_flags = IOMUX_PIN_OUTPUT_ENABLE;
-        break;
-    case GPIO_INPUT_PULLUP:
-        iomux_flags = IOMUX_PIN_PULLUP;
-        break;
-    default:
-        return; /* Invalid direction flag */
-    }
-    iomux_set_gpio_function(gpio_num, iomux_flags);
-    if(direction == GPIO_OUT_OPEN_DRAIN)
         GPIO.CONF[gpio_num] |= GPIO_CONF_OPEN_DRAIN;
-    else
-        GPIO.CONF[gpio_num] &= ~GPIO_CONF_OPEN_DRAIN;
-    if (iomux_flags & IOMUX_PIN_OUTPUT_ENABLE)
         GPIO.ENABLE_OUT_SET = BIT(gpio_num);
-    else
-        GPIO.ENABLE_OUT_CLEAR = BIT(gpio_num);
+        iomux_set_gpio_function(gpio_num, true);
+        break;
+    }
 }
 
+void gpio_set_pullup(uint8_t gpio_num, bool enabled, bool enabled_during_sleep)
+{
+    uint32_t flags = 0;
+
+    if (enabled) {
+        flags |= IOMUX_PIN_PULLUP;
+    }
+    if (enabled_during_sleep) {
+        flags |= IOMUX_PIN_PULLUP_SLEEP;
+    }
+    iomux_set_pullup_flags(gpio_to_iomux(gpio_num), flags);
+}
+
+static gpio_interrupt_handler_t gpio_interrupt_handlers[16] = { 0 };
+
+void __attribute__((weak)) IRAM gpio_interrupt_handler(void *arg)
+{
+    uint32_t status_reg = GPIO.STATUS;
+    GPIO.STATUS_CLEAR = status_reg;
+
+    uint8_t gpio_idx;
+    while ((gpio_idx = __builtin_ffs(status_reg)))
+    {
+        gpio_idx--;
+        status_reg &= ~BIT(gpio_idx);
+        if (FIELD2VAL(GPIO_CONF_INTTYPE, GPIO.CONF[gpio_idx])) {
+            gpio_interrupt_handler_t handler = gpio_interrupt_handlers[gpio_idx];
+            if (handler) {
+                handler(gpio_idx);
+            }
+        }
+    }
+}
+
+void gpio_set_interrupt(const uint8_t gpio_num, const gpio_inttype_t int_type, gpio_interrupt_handler_t handler)
+{
+    gpio_interrupt_handlers[gpio_num] = handler;
+
+    GPIO.CONF[gpio_num] = SET_FIELD(GPIO.CONF[gpio_num], GPIO_CONF_INTTYPE, int_type);
+    if (int_type != GPIO_INTTYPE_NONE) {
+        _xt_isr_attach(INUM_GPIO, gpio_interrupt_handler, NULL);
+        _xt_isr_unmask(1<<INUM_GPIO);
+    }
+}

core/esp_gpio_interrupts.c

@@ -1,80 +0,0 @@
-/* ESP GPIO interrupts.
-
-   Use with gpio_set_interrupt(), defined in esp/gpio.h
-
-   These interrupt vectors are default implementations with weak
-   linkage. If you write your own GPIO interrupt vectors in your program
-   then they will replace these at link time.
-
-   Look in examples/button/ for a simple GPIO interrupt example.
-
-   You can implement GPIO interrupt handlers in either of two ways:
-
-   - Implement gpXX_interrupt_handler() for each GPIO pin number that
-     you want to use interrupt with. This is simple but it may not
-     be enough in all cases.
-
-   void gpio01_interrupt_handler(void) {
-       // Do something when GPIO 01 changes
-   }
-
-   void gpio12_interrupt_handler(void) {
-       // Do something when GPIO 12 changes
-   }
-
-   OR
-
-   - Implement a single function named gpio_interrupt_handler(). This
-     will need to manually check GPIO.STATUS and clear any status
-     bits after handling interrupts. This gives you full control, but
-     you can't combine it with the first approach.
-
-
-  Part of esp-open-rtos
-  Copyright (C) 2015 Superhouse Automation Pty Ltd
-  BSD Licensed as described in the file LICENSE
- */
-#include "esp8266.h"
-
-void gpio_interrupt_handler(void);
-void gpio_noop_interrupt_handler(void) { }
-void gpio00_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio01_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio02_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio03_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio04_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio05_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio06_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio07_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio08_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio09_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio10_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio11_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio12_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio13_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio14_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-void gpio15_interrupt_handler(void) __attribute__((weak, alias("gpio_noop_interrupt_handler")));
-
-typedef void (* gpio_interrupt_handler_t)(void);
-
-const gpio_interrupt_handler_t gpio_interrupt_handlers[16] = {
-    gpio00_interrupt_handler, gpio01_interrupt_handler, gpio02_interrupt_handler,
-    gpio03_interrupt_handler, gpio04_interrupt_handler, gpio05_interrupt_handler,
-    gpio06_interrupt_handler, gpio07_interrupt_handler, gpio08_interrupt_handler,
-    gpio09_interrupt_handler, gpio10_interrupt_handler, gpio11_interrupt_handler,
-    gpio12_interrupt_handler, gpio13_interrupt_handler, gpio14_interrupt_handler,
-    gpio15_interrupt_handler };
-
-void __attribute__((weak)) IRAM gpio_interrupt_handler(void)
-{
-    uint32_t status_reg = GPIO.STATUS;
-    GPIO.STATUS_CLEAR = status_reg;
-    uint8_t gpio_idx;
-    while((gpio_idx = __builtin_ffs(status_reg)))
-    {
-        gpio_idx--;
-        status_reg &= ~BIT(gpio_idx);
-        if(FIELD2VAL(GPIO_CONF_INTTYPE, GPIO.CONF[gpio_idx]))
-            gpio_interrupt_handlers[gpio_idx]();
-    }
-}

core/esp_hwrand.c

@@ -10,8 +10,13 @@
 #include <esp/wdev_regs.h>
 #include <string.h>
 
-/* Return a random 32-bit number */
-uint32_t hwrand(void)
+/* Return a random 32-bit number.
+ *
+ * This is also used as a substitute for rand() called from
+ * lmac.a:sdk_lmacTxFrame to avoid touching the newlib reent structures within
+ * the NMI and the NMI code needs to be in IRAM.
+ */
+uint32_t IRAM hwrand(void)
 {
     return WDEV.HWRNG;
 }

core/esp_interrupts.c

@@ -7,11 +7,19 @@
  */
 #include <esp/interrupts.h>
 
-_xt_isr isr[16];
+typedef struct _xt_isr_entry_ {
+    _xt_isr handler;
+    void *arg;
+} _xt_isr_entry;
 
-void IRAM _xt_isr_attach(uint8_t i, _xt_isr func)
+_xt_isr_entry isr[16];
+
+bool esp_in_isr;
+
+void IRAM _xt_isr_attach(uint8_t i, _xt_isr func, void *arg)
 {
-    isr[i] = func;
+    isr[i].handler = func;
+    isr[i].arg = arg;
 }
 
 /* Generic ISR handler.
@@ -20,20 +28,27 @@ void IRAM _xt_isr_attach(uint8_t i, _xt_isr func)
 */
 uint16_t IRAM _xt_isr_handler(uint16_t intset)
 {
+    esp_in_isr = true;
+
     /* WDT has highest priority (occasional WDT resets otherwise) */
-    if(intset & BIT(INUM_WDT)) {
+    if (intset & BIT(INUM_WDT)) {
         _xt_clear_ints(BIT(INUM_WDT));
-        isr[INUM_WDT]();
+        isr[INUM_WDT].handler(NULL);
         intset -= BIT(INUM_WDT);
     }
 
-    while(intset) {
+    while (intset) {
         uint8_t index = __builtin_ffs(intset) - 1;
         uint16_t mask = BIT(index);
         _xt_clear_ints(mask);
-        isr[index]();
+        _xt_isr handler = isr[index].handler;
+        if (handler) {
+            handler(isr[index].arg);
+        }
         intset -= mask;
     }
 
+    esp_in_isr = false;
+
     return 0;
 }

core/esp_phy.c

@@ -0,0 +1,32 @@
+/** esp/phy.h
+ *
+ * PHY hardware management functions.
+ *
+ * Part of esp-open-rtos
+ * Copyright (C) 2016 ChefSteps, Inc
+ * BSD Licensed as described in the file LICENSE
+ */
+#include <esp/phy.h>
+#include <esp/gpio.h>
+
+void bt_coexist_configure(bt_coexist_mode_t mode, uint8_t bt_active_pin, uint8_t bt_priority_pin)
+{
+    /* Disable coexistence entirely before changing pin assignments */
+    GPIO.OUT &= ~(GPIO_OUT_BT_COEXIST_MASK);
+    uint32_t new_mask = 0;
+
+    new_mask = VAL2FIELD_M(GPIO_OUT_BT_ACTIVE_PIN, bt_active_pin) +
+        VAL2FIELD_M(GPIO_OUT_BT_PRIORITY_PIN, bt_priority_pin);
+
+    if(mode == BT_COEXIST_USE_BT_ACTIVE || mode == BT_COEXIST_USE_BT_ACTIVE_PRIORITY) {
+        gpio_enable(bt_active_pin, GPIO_INPUT);
+        new_mask |= GPIO_OUT_BT_ACTIVE_ENABLE;
+    }
+    if(mode == BT_COEXIST_USE_BT_ACTIVE_PRIORITY) {
+        gpio_enable(bt_priority_pin, GPIO_INPUT);
+        new_mask |= GPIO_OUT_BT_PRIORITY_ENABLE;
+    }
+    GPIO.OUT |= new_mask;
+}
+
+

core/esp_spi.c

@@ -0,0 +1,369 @@
+/*
+ * ESP hardware SPI master driver
+ *
+ * Part of esp-open-rtos
+ * Copyright (c) Ruslan V. Uss, 2016
+ * BSD Licensed as described in the file LICENSE
+ */
+#include "esp/spi.h"
+
+#include "esp/iomux.h"
+#include "esp/gpio.h"
+#include <string.h>
+
+#define _SPI0_SCK_GPIO  6
+#define _SPI0_MISO_GPIO 7
+#define _SPI0_MOSI_GPIO 8
+#define _SPI0_HD_GPIO   9
+#define _SPI0_WP_GPIO   10
+#define _SPI0_CS0_GPIO  11
+
+#define _SPI1_MISO_GPIO 12
+#define _SPI1_MOSI_GPIO 13
+#define _SPI1_SCK_GPIO  14
+#define _SPI1_CS0_GPIO  15
+
+#define _SPI0_FUNC IOMUX_FUNC(1)
+#define _SPI1_FUNC IOMUX_FUNC(2)
+
+#define _SPI_BUF_SIZE 64
+#define __min(a,b) ((a > b) ? (b):(a))
+
+static bool _minimal_pins[2] = {false, false};
+
+bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins)
+{
+    switch (bus)
+    {
+        case 0:
+            gpio_set_iomux_function(_SPI0_MISO_GPIO, _SPI0_FUNC);
+            gpio_set_iomux_function(_SPI0_MOSI_GPIO, _SPI0_FUNC);
+            gpio_set_iomux_function(_SPI0_SCK_GPIO, _SPI0_FUNC);
+            if (!minimal_pins)
+            {
+                gpio_set_iomux_function(_SPI0_HD_GPIO, _SPI0_FUNC);
+                gpio_set_iomux_function(_SPI0_WP_GPIO, _SPI0_FUNC);
+                gpio_set_iomux_function(_SPI0_CS0_GPIO, _SPI0_FUNC);
+            }
+            break;
+        case 1:
+            gpio_set_iomux_function(_SPI1_MISO_GPIO, _SPI1_FUNC);
+            gpio_set_iomux_function(_SPI1_MOSI_GPIO, _SPI1_FUNC);
+            gpio_set_iomux_function(_SPI1_SCK_GPIO, _SPI1_FUNC);
+            if (!minimal_pins)
+                gpio_set_iomux_function(_SPI1_CS0_GPIO, _SPI1_FUNC);
+            break;
+        default:
+            return false;
+    }
+
+    _minimal_pins[bus] = minimal_pins;
+    SPI(bus).USER0 = SPI_USER0_MOSI | SPI_USER0_CLOCK_IN_EDGE | SPI_USER0_DUPLEX |
+        (minimal_pins ? 0 : (SPI_USER0_CS_HOLD | SPI_USER0_CS_SETUP));
+
+    spi_set_frequency_div(bus, freq_divider);
+    spi_set_mode(bus, mode);
+    spi_set_msb(bus, msb);
+    spi_set_endianness(bus, endianness);
+
+    return true;
+}
+
+void spi_get_settings(uint8_t bus, spi_settings_t *s)
+{
+    s->mode = spi_get_mode(bus);
+    s->freq_divider = spi_get_frequency_div(bus);
+    s->msb = spi_get_msb(bus);
+    s->endianness = spi_get_endianness(bus);
+    s->minimal_pins = _minimal_pins[bus];
+}
+
+void spi_set_mode(uint8_t bus, spi_mode_t mode)
+{
+    bool cpha = (uint8_t)mode & 1;
+    bool cpol = (uint8_t)mode & 2;
+    if (cpol)
+        cpha = !cpha;  // CPHA must be inverted when CPOL = 1, I have no idea why
+
+    // CPHA
+    if (cpha)
+        SPI(bus).USER0 |= SPI_USER0_CLOCK_OUT_EDGE;
+    else
+        SPI(bus).USER0 &= ~SPI_USER0_CLOCK_OUT_EDGE;
+
+    // CPOL - see http://bbs.espressif.com/viewtopic.php?t=342#p5384
+    if (cpol)
+        SPI(bus).PIN |= SPI_PIN_IDLE_EDGE;
+    else
+        SPI(bus).PIN &= ~SPI_PIN_IDLE_EDGE;
+}
+
+spi_mode_t spi_get_mode(uint8_t bus)
+{
+    uint8_t cpha = SPI(bus).USER0 & SPI_USER0_CLOCK_OUT_EDGE ? 1 : 0;
+    uint8_t cpol = SPI(bus).PIN & SPI_PIN_IDLE_EDGE ? 2 : 0;
+
+    return (spi_mode_t)(cpol | (cpol ? 1 - cpha : cpha)); // see spi_set_mode
+}
+
+void spi_set_msb(uint8_t bus, bool msb)
+{
+    if (msb)
+        SPI(bus).CTRL0 &= ~(SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
+    else
+        SPI(bus).CTRL0 |= (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
+}
+
+void spi_set_endianness(uint8_t bus, spi_endianness_t endianness)
+{
+    if (endianness == SPI_BIG_ENDIAN)
+        SPI(bus).USER0 |= (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
+    else
+        SPI(bus).USER0 &= ~(SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
+}
+
+void spi_set_frequency_div(uint8_t bus, uint32_t divider)
+{
+    uint32_t predivider = (divider & 0xffff) - 1;
+    uint32_t count = (divider >> 16) - 1;
+    if (count || predivider)
+    {
+        IOMUX.CONF &= ~(bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK);
+        SPI(bus).CLOCK = VAL2FIELD_M(SPI_CLOCK_DIV_PRE, predivider) |
+                         VAL2FIELD_M(SPI_CLOCK_COUNT_NUM, count) |
+                         VAL2FIELD_M(SPI_CLOCK_COUNT_HIGH, count / 2) |
+                         VAL2FIELD_M(SPI_CLOCK_COUNT_LOW, count);
+    }
+    else
+    {
+        IOMUX.CONF |= bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK;
+        SPI(bus).CLOCK = SPI_CLOCK_EQU_SYS_CLOCK;
+    }
+}
+
+inline static void _set_size(uint8_t bus, uint8_t bytes)
+{
+    uint32_t bits = ((uint32_t)bytes << 3) - 1;
+    SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MISO_BITLEN, bits);
+    SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MOSI_BITLEN, bits);
+}
+
+inline static void _wait(uint8_t bus)
+{
+    while (SPI(bus).CMD & SPI_CMD_USR)
+        ;
+}
+
+inline static void _start(uint8_t bus)
+{
+    SPI(bus).CMD |= SPI_CMD_USR;
+}
+
+inline static void _store_data(uint8_t bus, const void *data, size_t len)
+{
+    uint8_t words = len / 4;
+    uint8_t tail = len % 4;
+
+    memcpy((void *)SPI(bus).W, data, len - tail);
+
+    if (!tail) return;
+
+    uint32_t last = 0;
+    uint8_t *offs = (uint8_t *)data + len - tail;
+    for (uint8_t i = 0; i < tail; i++)
+        last = last | (offs[i] << (i * 8));
+    SPI(bus).W[words] = last;
+}
+
+inline static uint32_t _swap_bytes(uint32_t value)
+{
+    return (value << 24) | ((value << 8) & 0x00ff0000) | ((value >> 8) & 0x0000ff00) | (value >> 24);
+}
+
+inline static uint32_t _swap_words(uint32_t value)
+{
+    return (value << 16) | (value >> 16);
+}
+
+static void _spi_buf_prepare(uint8_t bus, size_t len, spi_endianness_t e, spi_word_size_t word_size)
+{
+    if (e == SPI_LITTLE_ENDIAN || word_size == SPI_32BIT) return;
+
+    size_t count = word_size == SPI_16BIT ? (len + 1) / 2 : (len + 3) / 4;
+    uint32_t *data = (uint32_t *)SPI(bus).W;
+    for (size_t i = 0; i < count; i ++)
+    {
+        data[i] = word_size == SPI_16BIT
+            ? _swap_words(data[i])
+            : _swap_bytes(data[i]);
+    }
+}
+
+static void _spi_buf_transfer(uint8_t bus, const void *out_data, void *in_data,
+    size_t len, spi_endianness_t e, spi_word_size_t word_size)
+{
+    _wait(bus);
+    size_t bytes = len * (uint8_t)word_size;
+    _set_size(bus, bytes);
+    _store_data(bus, out_data, bytes);
+    _spi_buf_prepare(bus, len, e, word_size);
+    _start(bus);
+    _wait(bus);
+    if (in_data)
+    {
+        _spi_buf_prepare(bus, len, e, word_size);
+        memcpy(in_data, (void *)SPI(bus).W, bytes);
+    }
+}
+
+uint8_t spi_transfer_8(uint8_t bus, uint8_t data)
+{
+    uint8_t res;
+    _spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_8BIT);
+    return res;
+}
+
+uint16_t spi_transfer_16(uint8_t bus, uint16_t data)
+{
+    uint16_t res;
+    _spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_16BIT);
+    return res;
+}
+
+uint32_t spi_transfer_32(uint8_t bus, uint32_t data)
+{
+    uint32_t res;
+    _spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_32BIT);
+    return res;
+}
+
+static void _rearm_extras_bit(uint8_t bus, bool arm)
+{
+    if (!_minimal_pins[bus]) return;
+    static uint8_t status[2];
+
+    if (arm)
+    {
+        if (status[bus] & 0x01) SPI(bus).USER0 |= (SPI_USER0_ADDR);
+        if (status[bus] & 0x02) SPI(bus).USER0 |= (SPI_USER0_COMMAND);
+        if (status[bus] & 0x04)
+            SPI(bus).USER0 |= (SPI_USER0_DUMMY | SPI_USER0_MISO);
+        status[bus] = 0;
+    }
+    else
+    {
+        if (SPI(bus).USER0 & SPI_USER0_ADDR)
+        {
+            SPI(bus).USER0 &= ~(SPI_USER0_ADDR);
+            status[bus] |= 0x01;
+        }
+        if (SPI(bus).USER0 & SPI_USER0_COMMAND)
+        {
+            SPI(bus).USER0 &= ~(SPI_USER0_COMMAND);
+            status[bus] |= 0x02;
+        }
+        if (SPI(bus).USER0 & SPI_USER0_DUMMY)
+        {
+            SPI(bus).USER0 &= ~(SPI_USER0_DUMMY | SPI_USER0_MISO);
+            status[bus] |= 0x04;
+        }
+    }
+}
+
+size_t spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len, spi_word_size_t word_size)
+{
+    if (!out_data || !len) return 0;
+
+    spi_endianness_t e = spi_get_endianness(bus);
+    uint8_t buf_size = _SPI_BUF_SIZE / (uint8_t)word_size;
+
+    size_t blocks = len / buf_size;
+    for (size_t i = 0; i < blocks; i++)
+    {
+        size_t offset = i * _SPI_BUF_SIZE;
+        _spi_buf_transfer(bus, (const uint8_t *)out_data + offset,
+            in_data ? (uint8_t *)in_data + offset : NULL, buf_size, e, word_size);
+       _rearm_extras_bit(bus, false);
+    }
+
+    uint8_t tail = len % buf_size;
+    if (tail)
+    {
+        _spi_buf_transfer(bus, (const uint8_t *)out_data + blocks * _SPI_BUF_SIZE,
+            in_data ? (uint8_t *)in_data + blocks * _SPI_BUF_SIZE : NULL, tail, e, word_size);
+    }
+
+    if (blocks) _rearm_extras_bit(bus, true);
+    return len;
+}
+
+static void _spi_buf_read(uint8_t bus, uint8_t b, void *in_data,
+    size_t len, spi_endianness_t e, spi_word_size_t word_size)
+{
+    _wait(bus);
+    size_t bytes = len * (uint8_t)word_size;
+    _set_size(bus, bytes);
+    uint32_t w = ((uint32_t)b << 24) | ((uint32_t)b << 16) | ((uint32_t)b << 8) | b;
+    for (uint8_t i = 0; i < _SPI_BUF_SIZE / 4; i ++)
+        SPI(bus).W[i] = w;
+    _start(bus);
+    _wait(bus);
+    _spi_buf_prepare(bus, len, e, word_size);
+    memcpy(in_data, (void *)SPI(bus).W, bytes);
+}
+
+void spi_read(uint8_t bus, uint8_t out_byte, void *in_data, size_t len, spi_word_size_t word_size)
+{
+    spi_endianness_t e = spi_get_endianness(bus);
+    uint8_t buf_size = _SPI_BUF_SIZE / (uint8_t)word_size;
+
+    size_t blocks = len / buf_size;
+    for (size_t i = 0; i < blocks; i++)
+    {
+        size_t offset = i * _SPI_BUF_SIZE;
+        _spi_buf_read(bus, out_byte, (uint8_t *)in_data + offset, buf_size, e, word_size);
+       _rearm_extras_bit(bus, false);
+    }
+
+    uint8_t tail = len % buf_size;
+    if (tail)
+        _spi_buf_read(bus, out_byte, (uint8_t *)in_data + blocks * _SPI_BUF_SIZE, tail, e, word_size);
+
+    if (blocks) _rearm_extras_bit(bus, true);
+}
+
+static void _repeat_send(uint8_t bus, uint32_t *dword, int32_t *repeats,
+    spi_word_size_t size)
+{
+    uint8_t i = 0;
+    while (*repeats > 0)
+    {
+        uint16_t bytes_to_transfer = __min(*repeats * size, _SPI_BUF_SIZE);
+        _wait(bus);
+        if (i) _rearm_extras_bit(bus, false);
+        _set_size(bus, bytes_to_transfer);
+        for (i = 0; i < (bytes_to_transfer + 3) / 4; i++)
+            SPI(bus).W[i] = *dword; //need test with memcpy !
+        _start(bus);
+        *repeats -= (bytes_to_transfer / size);
+    }
+    _wait(bus);
+    _rearm_extras_bit(bus, true);
+}
+
+void spi_repeat_send_8(uint8_t bus, uint8_t data, int32_t repeats)
+{
+    uint32_t dword = data << 24 | data << 16 | data << 8 | data;
+    _repeat_send(bus, &dword, &repeats, SPI_8BIT);
+}
+
+void spi_repeat_send_16(uint8_t bus, uint16_t data, int32_t repeats)
+{
+    uint32_t dword = data << 16 | data;
+    _repeat_send(bus, &dword, &repeats, SPI_16BIT);
+}
+
+void spi_repeat_send_32(uint8_t bus, uint32_t data, int32_t repeats)
+{
+    _repeat_send(bus, &data, &repeats, SPI_32BIT);
+}

core/esp_timer.c

@@ -83,6 +83,11 @@ int timer_set_frequency(const timer_frc_t frc, uint32_t freq)
     uint32_t counts = 0;
     timer_clkdiv_t div = timer_freq_to_div(freq);
 
+    if(freq == 0) //can't divide by 0
+    {
+        return -EINVAL;
+    }
+
     counts = timer_freq_to_count(frc, freq, div);
     if(counts == 0)
     {

core/exception_vectors.S

@@ -45,6 +45,15 @@ LoadStoreErrorHandlerStack:
         .word   0       # a3
         .word   0       # a4
 
+        .balign 4
+        .global debug_saved_ctx
+debug_saved_ctx:
+        .word   0       # a0
+        .word   0       # a1
+        .word   0       # a2
+        .word   0       # a3
+        .word   0       # a4
+
 /***************************** Exception Vectors *****************************/
 
         .section .vecbase.text, "x"
@@ -66,10 +75,7 @@ VecBase:
         .org    VecBase + 0x10
 DebugExceptionVector:
         .type   DebugExceptionVector, @function
-
-        wsr     a0, excsave2
-        call0   sdk_user_fatal_exception_handler
-        rfi     2
+        j       DebugExceptionHandler
 
         .org    VecBase + 0x20
 NMIExceptionVector:
@@ -81,7 +87,9 @@ KernelExceptionVector:
         .type   KernelExceptionVector, @function
 
         break   1, 0
-        call0   sdk_user_fatal_exception_handler
+        mov     a2, a1
+        movi    a3, 0
+        call0   fatal_exception_handler
         rfe
 
         .org    VecBase + 0x50
@@ -98,7 +106,9 @@ DoubleExceptionVector:
         .type   DoubleExceptionVector, @function
 
         break   1, 4
-        call0   sdk_user_fatal_exception_handler
+        mov     a2, a1
+        movi    a3, 0
+        call0   fatal_exception_handler
 
 /* Reset vector at offset 0x80 is unused, as vecbase gets reset to mask ROM
  * vectors on chip reset. */
@@ -251,11 +261,13 @@ LoadStoreErrorHandler:
          * will have correct values */
         wsr     a0, sar
         l32i    a0, sp, 0
-        l32i    a2, sp, 0x08
+        /*l32i    a2, sp, 0x08*/
         l32i    a3, sp, 0x0c
         l32i    a4, sp, 0x10
         rsr     a1, excsave1
-        call0   sdk_user_fatal_exception_handler
+        mov     a2, a1
+        movi    a3, 0
+        call0   fatal_exception_handler
 
         .balign 4
 .LSE_assign_a1:
@@ -354,6 +366,32 @@ LoadStoreErrorHandler:
         rsr     a1, excsave1
         rfe
 
+/*************************** Debug exception handler *************************/
+
+        .section .vecbase.text, "x"
+        .literal_position
+        .balign 4
+
+DebugExceptionHandler:
+        wsr     a0, excsave2
+        // Save context in case an actual debugger is running
+        movi    a0, debug_saved_ctx
+        // Save a1 - a4 as we are going to use them later
+        s32i    a1, a0, 0x04
+        s32i    a2, a0, 0x08
+        s32i    a3, a0, 0x0C
+        s32i    a4, a0, 0x10
+        // Save a0
+        rsr     a4, excsave2
+        s32i    a4, a0, 0x00
+        // Default handler is fatal_exception_handler(uint32_t * sp, bool registers_saved_on_stack)
+        // sp
+        mov     a2, a1
+        // registers_saved_on_stack
+        movi    a3, 0
+        call0   debug_exception_handler
+        rfi     2
+
 /****************************** call_user_start ******************************/
 
         .section .vecbase.text, "x"
@@ -483,7 +521,15 @@ NMIExceptionHandler:
         .balign  4
 UserExceptionHandler:
         .type   UserExceptionHandler, @function
-        xsr     a0, excsave1    # a0 now contains sp
+        // save a0, a1 to debug_saved_ctx before stack pointer is affected
+        // excsave1 contains a1
+        // a1 was changed earlier
+        movi    a1, debug_saved_ctx
+        // store a0
+        s32i    a0, a1, 0x00
+        xsr     a0, excsave1
+        // store a1
+        s32i    a0, a1, 0x04
         mov     sp, a0
         addi    sp, sp, -0x50
         s32i    a0, sp, 0x10
@@ -515,7 +561,9 @@ UserExceptionHandler:
         .literal_position
 .LUserFailOtherExceptionCause:
         break   1, 1
-        call0   sdk_user_fatal_exception_handler
+        addi    a2, a1, 0x50 /* UserExceptionHandler pushes stack down 0x50 */
+        movi    a3, 1
+        call0   fatal_exception_handler
 
 /* _xt_user_exit is pushed onto the stack as part of the user exception handler,
    restores same set registers which were saved there and returns from exception */

core/include/common_macros.h

@@ -37,15 +37,79 @@
 #define VAL2FIELD_M(fieldname, value) (((value) & fieldname##_M) << fieldname##_S)
 #define SET_FIELD_M(regbits, fieldname, value) (((regbits) & ~FIELD_MASK(fieldname)) | VAL2FIELD_M(fieldname, value))
 
-/* Use this macro to store constant values in IROM flash instead
-   of having them loaded into rodata (which resides in DRAM)
+/* Set bits in reg with specified mask.
+ */
+#define SET_MASK_BITS(reg, mask) (reg) |= (mask)
 
-   Unlike the ESP8266 SDK you don't need an attribute like this for
-   standard functions. They're stored in flash by default. But
-   variables need them.
+/* Clear bits in reg with specified mask
+ */
+#define CLEAR_MASK_BITS(reg, mask) (reg) &= ~(mask)
 
-   Important to note: IROM flash can only be accessed via 32-bit word
-   aligned reads. It's up to the user of this attribute to ensure this.
+/* Use the IRAM macro to place functions into Instruction RAM (IRAM)
+   instead of flash (aka irom).
+
+   (This is the opposite to the Espressif SDK, where functions default
+   to being placed in IRAM but the ICACHE_FLASH_ATTR attribute will
+   place them in flash.)
+
+   Use the IRAM attribute for functions which are called when the
+   flash may not be available (for example during NMI exceptions), or
+   for functions which are called very frequently and need high
+   performance.
+
+   Usage example:
+
+   void IRAM high_performance_function(void)
+   {
+       // do important thing here
+   }
+
+   Bear in mind IRAM is limited (32KB), compared to up to 1MB of flash.
+*/
+#define IRAM __attribute__((section(".iram1.text")))
+
+/* Use the RAM macro to place constant data (rodata) into RAM (data
+   RAM) instead of the default placement in flash. This is useful for
+   constant data which needs high performance access.
+
+   Usage example:
+
+   const RAM uint8_t constants[] = { 1, 2, 3, 7 };
+
+   When placing string literals in RAM, they need to be declared with
+   the type "const char[]" not "const char *"
+
+   Usage example:
+
+   const RAM char hello_world[] = "Hello World";
+*/
+#define RAM __attribute__((section(".data")))
+
+/* Use the IRAM_DATA macro to place data into Instruction RAM (IRAM)
+   instead of the default of flash (for constant data) or data RAM
+   (for non-constant data).
+
+   This may be useful to free up data RAM. However all data read from
+   any instruction space (either IRAM or Flash) must be 32-bit aligned
+   word reads. Reading unaligned data stored with IRAM_DATA will be
+   slower than reading data stored in RAM. You can't perform unaligned
+   writes to IRAM.
+*/
+#define IRAM_DATA __attribute__((section(".iram1.data")))
+
+/* Use the IROM macro to store constant values in IROM flash. In
+  esp-open-rtos this is already the default location for most constant
+  data (rodata), so you don't need this attribute in 99% of cases.
+
+  The exceptions are to mark data in the core & freertos libraries,
+  where the default for constant data storage is RAM.
+
+  (Unlike the Espressif SDK you don't need to use an attribute like
+  ICACHE_FLASH_ATTR for functions, they go into flash by default.)
+
+  Important to note: IROM flash is accessed via 32-bit word aligned
+  reads. esp-open-rtos does some magic to "fix" unaligned reads, but
+  performance is reduced.
 */
 #ifdef	__cplusplus
     #define IROM __attribute__((section(".irom0.literal")))
@@ -53,30 +117,5 @@
     #define IROM __attribute__((section(".irom0.literal"))) const
 #endif
 
-/* Use this macro to place functions into Instruction RAM (IRAM)
-   instead of flash memory (IROM).
-
-   This is useful for functions which are called when the flash may
-   not be available (for example during NMI exceptions), or for
-   functions which are called very frequently and need high
-   performance.
-
-   Bear in mind IRAM is limited (32KB), compared to up to 1MB of flash.
-*/
-#define IRAM __attribute__((section(".iram1.text")))
-
-/* Use this macro to place read-only data into Instruction RAM (IRAM)
-   instead of loaded into rodata which resides in DRAM.
-
-   This may be useful to free up data RAM. However all data read from
-   the instruction space must be 32-bit aligned word reads
-   (non-aligned reads will use an interrupt routine to "fix" them and
-   still work, but are very slow..
-*/
-#ifdef	__cplusplus
-    #define IRAM_DATA __attribute__((section(".iram1.rodata")))
-#else
-    #define IRAM_DATA __attribute__((section(".iram1.rodata"))) const
-#endif
 
 #endif

core/include/debug_dumps.h

@@ -0,0 +1,27 @@
+/* Functions for dumping status/debug output/etc, including fatal
+ * exception handling.
+ *
+ * Part of esp-open-rtos
+ *
+ * Copyright (C) 2015-2016 Superhouse Automation Pty Ltd
+ * BSD Licensed as described in the file LICENSE
+ */
+#ifndef _DEBUG_DUMPS_H
+#define _DEBUG_DUMPS_H
+#include <stdint.h>
+
+/* Dump stack memory to stdout, starting from stack pointer address sp. */
+void dump_stack(uint32_t *sp);
+
+/* Dump heap statistics to stdout */
+void dump_heapinfo(void);
+
+/* Called from exception_vectors.S when a fatal exception occurs.
+
+   Probably not useful to be called in other contexts.
+*/
+void __attribute__((noreturn)) fatal_exception_handler(uint32_t *sp, bool registers_saved_on_stack);
+void __attribute__((weak, alias("fatal_exception_handler")))
+	debug_exception_handler(uint32_t *sp, bool registers_saved_on_stack);
+
+#endif

core/include/esp/dport_regs.h

@@ -90,6 +90,10 @@ _Static_assert(sizeof(struct DPORT_REGS) == 0x60, "DPORT_REGS is the wrong size"
 
 /* Details for CLOCKGATE_WATCHDOG register */
 
+// Set and then cleared during sdk_system_restart_in_nmi().
+// Not sure what this does.  May be related to ESPSAR.UNKNOWN_48
+#define DPORT_CLOCKGATE_WATCHDOG_UNKNOWN_8  BIT(8)
+
 /* Comment found in pvvx/mp3_decode headers: "use clockgate_watchdog(flg) { if(flg) 0x3FF00018 &= 0x77; else 0x3FF00018 |= 8; }".  Not sure what this means or does. */
 
 #define DPORT_CLOCKGATE_WATCHDOG_DISABLE  BIT(3)

core/include/esp/gpio.h

@@ -10,21 +10,36 @@
 #define _ESP_GPIO_H
 #include <stdbool.h>
 #include "esp/gpio_regs.h"
+#include "esp/rtc_regs.h"
 #include "esp/iomux.h"
 #include "esp/interrupts.h"
 
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
 typedef enum {
     GPIO_INPUT,
     GPIO_OUTPUT,         /* "Standard" push-pull output */
     GPIO_OUT_OPEN_DRAIN, /* Open drain output */
-    GPIO_INPUT_PULLUP,
 } gpio_direction_t;
 
-/* Enable GPIO on the specified pin, and set it to input/output/ with
- *  pullup as needed
+/* Enable GPIO on the specified pin, and set it to input or output mode.
  */
 void gpio_enable(const uint8_t gpio_num, const gpio_direction_t direction);
 
+/* Enable/disable internal pullup resistor for a particular GPIO
+ *
+ * Note: According to Espressif, pullup resistor values are between 30K and
+ * 100K ohms (see http://bbs.espressif.com/viewtopic.php?t=1079#p4097)
+ * However, measured values suggest that the actual value is likely to be close
+ * to 47K in reality.
+ *
+ * NOTE: The enabled_during_sleep setting is currently untested (please send
+ * feedback if you give it a try)
+ */
+void gpio_set_pullup(uint8_t gpio_num, bool enabled, bool enabled_during_sleep);
+
 /* Disable GPIO on the specified pin, and set it Hi-Z.
  *
  * If later muxing this pin to a different function, make sure to set
@@ -36,21 +51,50 @@ static inline void gpio_disable(const uint8_t gpio_num)
     *gpio_iomux_reg(gpio_num) &= ~IOMUX_PIN_OUTPUT_ENABLE;
 }
 
+/* Set whether the specified pin continues to drive its output when the ESP8266
+ * goes into sleep mode.  Note that this setting is reset to off whenever
+ * gpio_enable is called, so this must be called after calling that function.
+ *
+ * NOTE: This functionality is currently untested (please send feedback if you
+ * give it a try)
+ */
+static inline void gpio_set_output_on_sleep(const uint8_t gpio_num, bool enabled)
+{
+    if (enabled) {
+        IOMUX.PIN[gpio_to_iomux(gpio_num)] |= IOMUX_PIN_OUTPUT_ENABLE_SLEEP;
+    } else {
+        IOMUX.PIN[gpio_to_iomux(gpio_num)] &= ~IOMUX_PIN_OUTPUT_ENABLE_SLEEP;
+    }
+}
+
 /* Set output of a pin high or low.
  *
- * Only works if pin has been set to GPIO_OUTPUT via gpio_enable()
+ * Only works if pin has been set to GPIO_OUTPUT or GPIO_OUT_OPEN_DRAIN via
+ * gpio_enable()
+ *
+ * If the mode is GPIO_OUT_OPEN_DRAIN, setting it low (false) will pull the pin
+ * down to ground, but setting it high (true) will allow it to float.  Note
+ * that even in GPIO_OUT_OPEN_DRAIN mode, the input gates are still physically
+ * connected to the pin, and can be damaged if the voltage is not in either the
+ * "low" or "high" range.  Make sure there is some sort of pull-up resistor on
+ * the line to avoid floating logic lines!
  */
 static inline void gpio_write(const uint8_t gpio_num, const bool set)
 {
-    if(set)
-        GPIO.OUT_SET = BIT(gpio_num);
+    if (gpio_num == 16) {
+        RTC.GPIO_OUT = (RTC.GPIO_OUT & 0xfffffffe) | (set ? 1 : 0);
+    } else if (set)
+        GPIO.OUT_SET = BIT(gpio_num) & GPIO_OUT_PIN_MASK;
     else
-        GPIO.OUT_CLEAR = BIT(gpio_num);
+        GPIO.OUT_CLEAR = BIT(gpio_num) & GPIO_OUT_PIN_MASK;
 }
 
 /* Toggle output of a pin
  *
- * Only works if pin has been set to GPIO_OUTPUT via gpio_enable()
+ * Only works if pin has been set to GPIO_OUTPUT or GPIO_OUT_OPEN_DRAIN via
+ * gpio_enable()
+ *
+ * See notes in gpio_write() about GPIO_OUT_OPEN_DRAIN mode.
  */
 static inline void gpio_toggle(const uint8_t gpio_num)
 {
@@ -60,36 +104,67 @@ static inline void gpio_toggle(const uint8_t gpio_num)
        get an invalid value. Prevents one task from clobbering another
        task's pins, without needing to disable/enable interrupts.
     */
-    if(GPIO.OUT & BIT(gpio_num))
-        GPIO.OUT_CLEAR = BIT(gpio_num);
+    if (GPIO.OUT & BIT(gpio_num))
+        GPIO.OUT_CLEAR = BIT(gpio_num) & GPIO_OUT_PIN_MASK;
     else
-        GPIO.OUT_SET = BIT(gpio_num);
+        GPIO.OUT_SET = BIT(gpio_num) & GPIO_OUT_PIN_MASK;
 }
 
 /* Read input value of a GPIO pin.
  *
- * If pin is set as an input, this reads the value on the pin.
- * If pin is set as an output, this reads the last value written to the pin.
+ * If pin is set GPIO_INPUT, this reads the level on the pin.
+ * If pin is set GPIO_OUTPUT, this reads the level at which the pin is
+ * currently being driven (i.e. the last value written).
+ * If pin is set GPIO_OUT_OPEN_DRAIN, when the pin is written low, this will
+ * return low (false), when the pin is written high, this will behave like
+ * GPIO_INPUT.
  */
 static inline bool gpio_read(const uint8_t gpio_num)
 {
-    return GPIO.IN & BIT(gpio_num);
+    if (gpio_num == 16)
+        return RTC.GPIO_IN & 1;
+    else
+        return GPIO.IN & BIT(gpio_num);
 }
 
-extern void gpio_interrupt_handler(void);
+typedef void (* gpio_interrupt_handler_t)(uint8_t gpio_num);
+
+/*
+ * You can implement GPIO interrupt handlers in either of two ways:
+ * - Implement handler and use it with the gpio_set_interrupt()
+ *
+ *    Example:
+ *
+ *    void my_intr_handler(uint8_t gpio_num) {
+ *        // Do something when GPIO changes
+ *    }
+ *    ...
+ *    gpio_set_interrupt(MY_GPIO_NUM, GPIO_INTTYPE_EDGE_ANY, my_intr_handler);
+ *
+ * OR
+ *
+ * - Implement a single function named gpio_interrupt_handler(). This
+ *   will need to manually check GPIO.STATUS and clear any status
+ *   bits after handling interrupts. This gives you full control, but
+ *   you can't combine it with the first approach.
+ *
+ *   Example:
+ *
+ *   void IRAM gpio_interrupt_handler(void *arg) {
+ *        // check GPIO.STATUS
+ *        // write GPIO.STATUS_CLEAR
+ *        // Do something when GPIO changes
+ *   }
+ *   ...
+ *   gpio_set_interrupt(MY_GPIO_NUM, GPIO_INTTYPE_EDGE_ANY, NULL);
+ */
 
 /* Set the interrupt type for a given pin
  *
- * If int_type is not GPIO_INTTYPE_NONE, the gpio_interrupt_handler will be attached and unmasked.
+ * If int_type is not GPIO_INTTYPE_NONE, the gpio_interrupt_handler will be
+ * attached and unmasked.
  */
-static inline void gpio_set_interrupt(const uint8_t gpio_num, const gpio_inttype_t int_type)
-{
-    GPIO.CONF[gpio_num] = SET_FIELD(GPIO.CONF[gpio_num], GPIO_CONF_INTTYPE, int_type);
-    if(int_type != GPIO_INTTYPE_NONE) {
-        _xt_isr_attach(INUM_GPIO, gpio_interrupt_handler);
-        _xt_isr_unmask(1<<INUM_GPIO);
-    }
-}
+void gpio_set_interrupt(const uint8_t gpio_num, const gpio_inttype_t int_type, gpio_interrupt_handler_t handler);
 
 /* Return the interrupt type set for a pin */
 static inline gpio_inttype_t gpio_get_interrupt(const uint8_t gpio_num)
@@ -97,4 +172,18 @@ static inline gpio_inttype_t gpio_get_interrupt(const uint8_t gpio_num)
     return (gpio_inttype_t)FIELD2VAL(GPIO_CONF_INTTYPE, GPIO.CONF[gpio_num]);
 }
 
+/* Set GPIO I/O Mux function.
+ * The 'func' is an IOMUX_GPIO<n>_FUNC_<function> value, see iomux_regs.h
+ */
+inline static void gpio_set_iomux_function(const uint8_t gpio_num, uint32_t func)
+{
+    uint8_t iomux_num = gpio_to_iomux(gpio_num);
+    uint32_t prev = IOMUX.PIN[iomux_num] & ~IOMUX_PIN_FUNC_MASK;
+    IOMUX.PIN[iomux_num] = func | prev;
+}
+
+#ifdef	__cplusplus
+}
+#endif
+
 #endif

core/include/esp/gpio_regs.h

@@ -40,6 +40,22 @@
  * be reset by writing to STATUS or STATUS_CLEAR.
  *
  * (_SET/_CLEAR function similarly to OUT registers)
+ *
+ * IN:
+ *
+ * Low 16 bits represent GPIO0-15 state (see also above).
+ *
+ * High 16 bits represent "strapping pins" values captured at reset time:
+ * bit 31 - GPIO10 (SD_DATA3)
+ * bit 30 - GPIO9 (SD_DATA2)
+ * bit 29 - GPIO7 (SD_DATA0)
+ * bit 18 - GPIO15 (MTDO)
+ * bit 17 - GPIO0
+ * bit 16 - GPIO2
+ * (In other words, highest 3 and lowest 3 bits of 16-bit half-word are used).
+ * BootROM uses strapping pin values to determine boot mode.
+ *
+ * Source and more information: 0D-ESP8266__Pin_List*.xlsx document
  */
 
 struct GPIO_REGS {
@@ -54,13 +70,28 @@ struct GPIO_REGS {
     uint32_t volatile STATUS_SET;       // 0x20
     uint32_t volatile STATUS_CLEAR;     // 0x24
     uint32_t volatile CONF[16];         // 0x28 - 0x64
-    uint32_t volatile PWM;              // 0x68
+    uint32_t volatile DSM;              // 0x68
     uint32_t volatile RTC_CALIB;        // 0x6c
     uint32_t volatile RTC_CALIB_RESULT; // 0x70
 };
 
 _Static_assert(sizeof(struct GPIO_REGS) == 0x74, "GPIO_REGS is the wrong size");
 
+/* Details for additional OUT register fields */
+
+/* Bottom 16 bits of GPIO.OUT are for GPIOs 0-15, but upper 16 bits
+   are used to configure the input signalling pins for Bluetooth
+   Coexistence config (see esp/phy.h for a wrapper function).
+*/
+#define GPIO_OUT_PIN_MASK 0x0000FFFF
+#define GPIO_OUT_BT_COEXIST_MASK 0x03FF0000
+#define GPIO_OUT_BT_ACTIVE_ENABLE BIT(24)
+#define GPIO_OUT_BT_PRIORITY_ENABLE BIT(25)
+#define GPIO_OUT_BT_ACTIVE_PIN_M 0x0F
+#define GPIO_OUT_BT_ACTIVE_PIN_S 16
+#define GPIO_OUT_BT_PRIORITY_PIN_M 0x0F
+#define GPIO_OUT_BT_PRIORITY_PIN_S 20
+
 /* Details for CONF[i] registers */
 
 /* GPIO.CONF[i] control the pin behavior for the corresponding GPIO in/output.
@@ -86,9 +117,9 @@ _Static_assert(sizeof(struct GPIO_REGS) == 0x74, "GPIO_REGS is the wrong size");
  *     GPIO_CONF_OPEN_DRAIN does not appear to work on all pins.
  *
  *
- * GPIO_CONF_SOURCE_PWM (boolean)
- *     When set, GPIO pin output will be connected to the sigma-delta PWM
- *     generator (controlled by the GPIO.PWM register).  When cleared, pin
+ * GPIO_CONF_SOURCE_DSM (boolean)
+ *     When set, GPIO pin output will be connected to the sigma-delta
+ *     generator (controlled by the GPIO.DSM register).  When cleared, pin
  *     output will function as a normal GPIO output (controlled by the
  *     GPIO.OUT* registers).
  */
@@ -99,7 +130,7 @@ _Static_assert(sizeof(struct GPIO_REGS) == 0x74, "GPIO_REGS is the wrong size");
 #define GPIO_CONF_INTTYPE_M      0x00000007
 #define GPIO_CONF_INTTYPE_S      7
 #define GPIO_CONF_OPEN_DRAIN     BIT(2)
-#define GPIO_CONF_SOURCE_PWM     BIT(0)
+#define GPIO_CONF_SOURCE_DSM     BIT(0)
 
 /* Valid values for the GPIO_CONF_INTTYPE field */
 typedef enum {
@@ -111,13 +142,13 @@ typedef enum {
     GPIO_INTTYPE_LEVEL_HIGH = 5,
 } gpio_inttype_t;
 
-/* Details for PWM register */
+/* Details for DSM register */
 
-#define GPIO_PWM_ENABLE          BIT(16)
-#define GPIO_PWM_PRESCALER_M     0x000000ff
-#define GPIO_PWM_PRESCALER_S     8
-#define GPIO_PWM_TARGET_M        0x000000ff
-#define GPIO_PWM_TARGET_S        0
+#define GPIO_DSM_ENABLE          BIT(16)
+#define GPIO_DSM_PRESCALER_M     0x000000ff
+#define GPIO_DSM_PRESCALER_S     8
+#define GPIO_DSM_TARGET_M        0x000000ff
+#define GPIO_DSM_TARGET_S        0
 
 /* Details for RTC_CALIB register */
 

core/include/esp/interrupts.h

@@ -17,8 +17,10 @@
 
 /* Interrupt numbers for level 1 exception handler. */
 typedef enum {
+    INUM_WDEV_FIQ = 0,
     INUM_SLC = 1,
     INUM_SPI = 2,
+    INUM_RTC = 3,
     INUM_GPIO = 4,
     INUM_UART = 5,
     INUM_TICK = 6, /* RTOS timer tick, possibly xtensa CPU CCOMPARE0(?) */
@@ -33,19 +35,37 @@ typedef enum {
     INUM_TIMER_FRC2 = 10,
 } xt_isr_num_t;
 
-void sdk__xt_int_exit (void);
-void _xt_user_exit (void);
-void sdk__xt_tick_timer_init (void);
-void sdk__xt_timer_int(void);
+void sdk__xt_int_exit(void);
+void _xt_user_exit(void);
+void sdk__xt_tick_timer_init(void);
+void sdk__xt_timer_int(void *);
 void sdk__xt_timer_int1(void);
 
+/* The normal running level is 0.
+ * The system tick isr, timer frc2_isr, sv_isr etc  run at level 1.
+ * Debug exceptions run at level 2?
+ * The wdev nmi runs at level 3.
+ */
 static inline uint32_t _xt_get_intlevel(void)
 {
     uint32_t level;
-    __asm__ volatile("rsr %0, intlevel" : "=a"(level));
-    return level;
+    __asm__ volatile("rsr %0, ps" : "=a"(level));
+    return level & 0xf;
 }
 
+/*
+ * There are conflicting definitions for XCHAL_EXCM_LEVEL. Newlib
+ * defines it to be 1 and xtensa_rtos.h defines it to be 3. Don't want
+ * 3 as that is for the NMI and might want to check that the OS apis
+ * are not entered in level 3. Setting the interrupt level to 3 does
+ * not disable the NMI anyway. So set the level to 2.
+ */
+
+#ifdef XCHAL_EXCM_LEVEL
+#undef XCHAL_EXCM_LEVEL
+#define XCHAL_EXCM_LEVEL 2
+#endif
+
 /* Disable interrupts and return the old ps value, to pass into
    _xt_restore_interrupts later.
 
@@ -66,25 +86,27 @@ static inline void _xt_restore_interrupts(uint32_t new_ps)
     __asm__ volatile ("wsr %0, ps; rsync" :: "a" (new_ps));
 }
 
-/* ESPTODO: the mask/unmask functions aren't thread safe */
-
-static inline void _xt_isr_unmask(uint32_t unmask)
+static inline uint32_t _xt_isr_unmask(uint32_t unmask)
 {
+    uint32_t old_level = _xt_disable_interrupts();
     uint32_t intenable;
     asm volatile ("rsr %0, intenable" : "=a" (intenable));
-    intenable |= unmask;
-    asm volatile ("wsr %0, intenable; esync" :: "a" (intenable));
+    asm volatile ("wsr %0, intenable;" :: "a" (intenable | unmask));
+    _xt_restore_interrupts(old_level);
+    return intenable;
 }
 
-static inline void _xt_isr_mask (uint32_t mask)
+static inline uint32_t _xt_isr_mask(uint32_t mask)
 {
+    uint32_t old_level = _xt_disable_interrupts();
     uint32_t intenable;
     asm volatile ("rsr %0, intenable" : "=a" (intenable));
-    intenable &= ~mask;
-    asm volatile ("wsr %0, intenable; esync" :: "a" (intenable));
+    asm volatile ("wsr %0, intenable;" :: "a" (intenable & ~mask));
+    _xt_restore_interrupts(old_level);
+    return intenable;
 }
 
-static inline uint32_t _xt_read_ints (void)
+static inline uint32_t _xt_read_ints(void)
 {
     uint32_t interrupt;
     asm volatile ("rsr %0, interrupt" : "=a" (interrupt));
@@ -96,9 +118,7 @@ static inline void _xt_clear_ints(uint32_t mask)
     asm volatile ("wsr %0, intclear; esync" :: "a" (mask));
 }
 
-typedef void (* _xt_isr)(void);
-/* This function is implemeneted in FreeRTOS port.c at the moment,
-   should be moved or converted to an inline */
-void        _xt_isr_attach (uint8_t i, _xt_isr func);
+typedef void (* _xt_isr)(void *arg);
+void _xt_isr_attach (uint8_t i, _xt_isr func, void *arg);
 
 #endif

core/include/esp/iomux.h

@@ -43,25 +43,48 @@ inline static esp_reg_t gpio_iomux_reg(const uint8_t gpio_number)
     return &(IOMUX.PIN[gpio_to_iomux(gpio_number)]);
 }
 
+/**
+ * Set IOMUX function.
+ *
+ * @param iomux_num Index of IOMUX register. Can be converted from GPIO number
+ * with gpio_to_iomux.
+ * @param iomux_func GPIO function definition IOMUX_GPIOn_FUNC_* 
+ */
+inline static void iomux_set_function(uint8_t iomux_num, uint32_t iomux_func)
+{
+    uint32_t prev = IOMUX.PIN[iomux_num] & ~IOMUX_PIN_FUNC_MASK;
+    IOMUX.PIN[iomux_num] = iomux_func | prev;
+}
+
+inline static void iomux_set_direction_flags(uint8_t iomux_num, uint32_t dir_flags)
+{
+    uint32_t mask = IOMUX_PIN_OUTPUT_ENABLE | IOMUX_PIN_OUTPUT_ENABLE_SLEEP;
+    uint32_t prev = IOMUX.PIN[iomux_num] & ~mask;
+    IOMUX.PIN[iomux_num] = dir_flags | prev;
+}
+
+inline static void iomux_set_pullup_flags(uint8_t iomux_num, uint32_t pullup_flags)
+{
+    uint32_t mask = IOMUX_PIN_PULLUP | IOMUX_PIN_PULLDOWN | IOMUX_PIN_PULLUP_SLEEP | IOMUX_PIN_PULLDOWN_SLEEP;
+    uint32_t prev = IOMUX.PIN[iomux_num] & ~mask;
+    IOMUX.PIN[iomux_num] = pullup_flags | prev;
+}
+
 /**
  * Set a pin to the GPIO function.
  *
  * This allows you to set pins to GPIO without knowing in advance the
  * exact register masks to use.
  *
- * flags can be any of IOMUX_PIN_OUTPUT_ENABLE, IOMUX_PIN_PULLUP, IOMUX_PIN_PULLDOWN, etc. Any other flags will be cleared.
- *
- * Equivalent to a direct register operation if gpio_number is known at compile time.
- * ie the following are equivalent:
- *
- * iomux_set_gpio_function(12, IOMUX_PIN_OUTPUT_ENABLE);
- * IOMUX_GPIO12 = IOMUX_GPIO12_FUNC_GPIO | IOMUX_PIN_OUTPUT_ENABLE;
+ * Sets the function and direction, but leaves the pullup configuration the
+ * same as before.
  */
-inline static void iomux_set_gpio_function(const uint8_t gpio_number, const uint32_t flags)
+inline static void iomux_set_gpio_function(uint8_t gpio_number, bool output_enable)
 {
-    const uint8_t reg_idx = gpio_to_iomux(gpio_number);
-    const uint32_t func = (reg_idx > 11 ? IOMUX_FUNC(0) : IOMUX_FUNC(3)) | flags;
-    IOMUX.PIN[reg_idx] = func | flags;
+    const uint8_t iomux_num = gpio_to_iomux(gpio_number);
+    const uint32_t func = iomux_num > 11 ? IOMUX_FUNC(0) : IOMUX_FUNC(3);
+    iomux_set_function(iomux_num, func);
+    iomux_set_direction_flags(iomux_num, output_enable ? IOMUX_PIN_OUTPUT_ENABLE : 0);
 }
 
 #ifdef	__cplusplus

core/include/esp/iomux_regs.h

@@ -47,11 +47,6 @@ _Static_assert(sizeof(struct IOMUX_REGS) == 0x44, "IOMUX_REGS is the wrong size"
 /* WARNING: Macro evaluates argument twice */
 #define IOMUX_FUNC(val) (VAL2FIELD_M(IOMUX_PIN_FUNC_LOW, val) | VAL2FIELD_M(IOMUX_PIN_FUNC_HIGH, val))
 
-/* WARNING: Macro evaluates argument twice */
-#define IOMUX_FUNC_VALUE(regbits) (FIELD2VAL(IOMUX_PIN_FUNC_LOW, regbits) | FIELD2VAL(IOMUX_PIN_FUNC_HIGH, regbits))
-
-#define IOMUX_SET_FUNC(regbits, funcval) (((regbits) & ~IOMUX_PIN_FUNC_MASK) | (funcval))
-
 #define IOMUX_GPIO0   IOMUX.PIN[12]
 #define IOMUX_GPIO1   IOMUX.PIN[5]
 #define IOMUX_GPIO2   IOMUX.PIN[13]

core/include/esp/phy.h

@@ -0,0 +1,58 @@
+/** esp/phy.h
+ *
+ * PHY hardware management functions.
+ *
+ * These are not enough to configure the ESP8266 PHY by themselves
+ * (yet), but they provide utilities to modify the configuration set
+ * up via the SDK.
+ *
+ * Functions implemented here deal directly with the hardware, not the
+ * SDK software layers.
+ *
+ * Part of esp-open-rtos
+ * Copyright (C) 2016 ChefSteps, Inc
+ * BSD Licensed as described in the file LICENSE
+ */
+#ifndef _ESP_PHY_H
+#define _ESP_PHY_H
+
+#include <esp/types.h>
+#include <common_macros.h>
+
+#include <stdint.h>
+
+typedef enum {
+    BT_COEXIST_NONE,
+    BT_COEXIST_USE_BT_ACTIVE,
+    BT_COEXIST_USE_BT_ACTIVE_PRIORITY,
+} bt_coexist_mode_t;
+
+/** Override the Bluetooth Coexistence BT_ACTIVE pin setting
+    taken from the phy_info structure.
+
+    This enables other pins to be used for Bluetooth Coexistence
+    signals (rather than just the two provided for by phy_info). (Note
+    that not that not all pins are confirmed to work, GPIO 0 is
+    confirmed not usable as the SDK configures it as the WLAN_ACTIVE
+    output - even if you change the pin mode the SDK will change it
+    back.)
+
+    To change pins and have coexistence work successfully the BT
+    coexistence feature must be enabled in the phy_info configuration
+    (get_default_phy_info()). You can then modify the initial
+    configuration by calling this function from your own user_init
+    function.
+
+    (Eventually we should be able to support enough PHY registers
+    to enable coexistence without SDK support at all, but not yet.)
+
+    This function will enable bt_active_pin & bt_priority_as GPIO
+    inputs, according to the mode parameter.
+
+    Remember that the default Bluetooth Coexistence pins will be
+    configured as GPIOs by the SDK already, so you may want to
+    reconfigure/re-iomux them after calling this function.
+*/
+void bt_coexist_configure(bt_coexist_mode_t mode, uint8_t bt_active_pin, uint8_t bt_priority_pin);
+
+#endif

core/include/esp/phy_regs.h

@@ -0,0 +1,74 @@
+/* esp/phy_regs.h
+ *
+ * ESP8266 PHY register definitions
+ *
+ * Not compatible with ESP SDK register access code.
+ */
+
+#ifndef _ESP_PHY_REGS_H
+#define _ESP_PHY_REGS_H
+
+#include "esp/types.h"
+#include "common_macros.h"
+
+#define PHY_BASE 0x60000500
+#define PHY (*(struct PHY_REGS *)(PHY_BASE))
+
+struct PHY_REGS {
+    // 0x00 — 0x60
+    uint32_t volatile _gap0[24];
+    // TX digital predistortion control
+    // 0x60
+    uint32_t volatile TX_DPD;
+    // 0x64 — 0x7c
+    uint32_t volatile _gap1[6];
+    // IQ imbalance estimation control
+    // 0x7c
+    uint32_t volatile IQ_EST;
+    // Looks like RSSI,
+    // may be per OFDM subcarrier
+    // 0x80
+    uint32_t volatile RX_IQ_0;
+    // 0x84
+    uint32_t volatile RX_IQ_1;
+    // 0x88
+    uint32_t volatile RX_IQ_2;
+    // 0x8c
+    uint32_t volatile RX_IQ_3;
+    // RX gain control
+    // 0x90
+    uint32_t volatile RX_GAIN_CTL;
+    // Whatever pbus is, these registers controls it
+    // 0x94
+    uint32_t volatile PBUS_CTL_0;
+    // 0x98
+    uint32_t volatile PBUS_CTL_1;
+    // 0x9C
+    uint32_t volatile PBUS_CTL_2;
+    // 0xA0
+    uint32_t volatile PBUS_CTL_3;
+    uint32_t volatile _gap2[5];
+    // Looks like baseband synthesizer control regs
+    // 0xB8
+    uint32_t volatile BB_CTL_0;
+    // 0xBC
+    uint32_t volatile BB_CTL_1;
+    // 0xC0
+    uint32_t volatile BB_CTL_2;
+    // 0xC4
+    uint32_t volatile BB_CTL_3;
+    // These registers do exist but I don't know
+    // what they are for.
+    // 0xC8
+    uint32_t volatile UNK_0;
+    uint32_t volatile UNK_1;
+    uint32_t volatile UNK_2;
+    uint32_t volatile UNK_3;
+    uint32_t volatile UNK_4;
+};
+
+_Static_assert((uintptr_t) &PHY.TX_DPD == 0x60000560, "RF PHY TX_DPD address");
+_Static_assert((uintptr_t) &PHY.IQ_EST == 0x6000057C, "RF PHY IQ_EST address");
+_Static_assert((uintptr_t) &PHY.BB_CTL_3 == 0x600005C4, "RF PHY BB_CTL_3 address");
+
+#endif /* _ESP_PHY_REGS_H */

core/include/esp/rom.h

@@ -5,7 +5,9 @@
  */
 #ifndef _ESP_ROM_H
 #define _ESP_ROM_H
-#include <stdint.h>
+
+#include "esp/types.h"
+#include "flashchip.h"
 
 #ifdef	__cplusplus
 extern "C" {
@@ -21,8 +23,19 @@ void Cache_Read_Disable(void);
  */
 void Cache_Read_Enable(uint32_t odd_even, uint32_t mb_count, uint32_t no_idea);
 
+/* Low-level SPI flash read/write routines */
+int Enable_QMode(sdk_flashchip_t *chip);
+int Disable_QMode(sdk_flashchip_t *chip);
+int SPI_page_program(sdk_flashchip_t *chip, uint32_t dest_addr, uint32_t *src_addr, uint32_t size);
+int SPI_read_data(sdk_flashchip_t *chip, uint32_t src_addr, uint32_t *dest_addr, uint32_t size);
+int SPI_write_enable(sdk_flashchip_t *chip);
+int SPI_sector_erase(sdk_flashchip_t *chip, uint32_t addr);
+int SPI_read_status(sdk_flashchip_t *chip, uint32_t *status);
+int SPI_write_status(sdk_flashchip_t *chip, uint32_t status);
+int Wait_SPI_Idle(sdk_flashchip_t *chip);
+
 #ifdef	__cplusplus
 }
 #endif
 
-#endif
+#endif /* _ESP_ROM_H */

core/include/esp/rtc_regs.h

@@ -31,7 +31,8 @@ struct RTC_REGS {
     uint32_t volatile CTRL0;        // 0x00
     uint32_t volatile COUNTER_ALARM;    // 0x04
     uint32_t volatile RESET_REASON0;    // 0x08       //FIXME: need better name
-    uint32_t volatile _unknownc[2];     // 0x0c - 0x10
+    uint32_t volatile _unknownc;        // 0x0c
+    uint32_t volatile _unknown10;       // 0x10
     uint32_t volatile RESET_REASON1;    // 0x14       //FIXME: need better name
     uint32_t volatile RESET_REASON2;    // 0x18       //FIXME: need better name
     uint32_t volatile COUNTER;          // 0x1c
@@ -40,7 +41,10 @@ struct RTC_REGS {
     uint32_t volatile INT_ENABLE;       // 0x28
     uint32_t volatile _unknown2c;       // 0x2c
     uint32_t volatile SCRATCH[4];       // 0x30 - 3c
-    uint32_t volatile _unknown40[10];   // 0x40 - 0x64
+    uint32_t volatile _unknown40;       // 0x40
+    uint32_t volatile _unknown44;       // 0x44
+    uint32_t volatile _unknown48;       // 0x48
+    uint32_t volatile _unknown4c[7];    // 0x4c - 0x64
     uint32_t volatile GPIO_OUT;         // 0x68
     uint32_t volatile _unknown6c[2];    // 0x6c - 0x70
     uint32_t volatile GPIO_ENABLE;      // 0x74

core/include/esp/sar_regs.h

@@ -0,0 +1,39 @@
+/* esp/sar_regs.h
+ *
+ * ESP8266 register definitions for the "sar" region (0x3FF2xxx)
+ *
+ * The 0x60000D00 register region is referred to as "sar" by some old header
+ * files. Apparently referenced both by ROM I2C functions as well as ADC
+ * config/read functions.
+ *
+ * Not compatible with ESP SDK register access code.
+ */
+
+#ifndef _ESP_SAR_REGS_H
+#define _ESP_SAR_REGS_H
+
+#include "esp/types.h"
+#include "common_macros.h"
+
+#define SAR_BASE 0x60000d00
+// Unfortunately,
+// esp-open-sdk/xtensa-lx106-elf/xtensa-lx106-elf/sysroot/usr/include/xtensa/config/specreg.h
+// already has a "SAR" macro definition which would conflict with this, so
+// we'll use "ESPSAR" instead..
+#define ESPSAR (*(struct SAR_REGS *)(SAR_BASE))
+
+/* Note: This memory region is not currently well understood.  Pretty much all
+ * of the definitions here are from reverse-engineering the Espressif SDK code,
+ * many are just educated guesses, and almost certainly some are misleading or
+ * wrong.  If you can improve on any of this, please contribute!
+ */
+
+struct SAR_REGS {
+    uint32_t volatile _unknown0[18];   // 0x00 - 0x44
+    uint32_t volatile UNKNOWN_48;      // 0x48 : used by sdk_system_restart_in_nmi()
+} __attribute__ (( packed ));
+
+_Static_assert(sizeof(struct SAR_REGS) == 0x4c, "SAR_REGS is the wrong size");
+
+#endif /* _ESP_SAR_REGS_H */
+

core/include/esp/spi.h

@@ -0,0 +1,433 @@
+/**
+ * \file Hardware SPI master driver
+ *
+ * Part of esp-open-rtos
+ *
+ * \copyright Ruslan V. Uss, 2016
+ * BSD Licensed as described in the file LICENSE
+ */
+#ifndef _ESP_SPI_H_
+#define _ESP_SPI_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp/spi_regs.h"
+#include "esp/clocks.h"
+
+/**
+ * Macro for use with spi_init and spi_set_frequency_div.
+ * SPI frequency = 80000000 / divider / count
+ * dvider must be in 1..8192 and count in 1..64
+ */
+#define SPI_GET_FREQ_DIV(divider, count) (((count) << 16) | ((divider) & 0xffff))
+
+/**
+ * Predefinded SPI frequency dividers
+ */
+#define SPI_FREQ_DIV_125K SPI_GET_FREQ_DIV(64, 10) ///< 125kHz
+#define SPI_FREQ_DIV_250K SPI_GET_FREQ_DIV(32, 10) ///< 250kHz
+#define SPI_FREQ_DIV_500K SPI_GET_FREQ_DIV(16, 10) ///< 500kHz
+#define SPI_FREQ_DIV_1M   SPI_GET_FREQ_DIV(8, 10)  ///< 1MHz
+#define SPI_FREQ_DIV_2M   SPI_GET_FREQ_DIV(4, 10)  ///< 2MHz
+#define SPI_FREQ_DIV_4M   SPI_GET_FREQ_DIV(2, 10)  ///< 4MHz
+#define SPI_FREQ_DIV_8M   SPI_GET_FREQ_DIV(5,  2)  ///< 8MHz
+#define SPI_FREQ_DIV_10M  SPI_GET_FREQ_DIV(4,  2)  ///< 10MHz
+#define SPI_FREQ_DIV_20M  SPI_GET_FREQ_DIV(2,  2)  ///< 20MHz
+#define SPI_FREQ_DIV_40M  SPI_GET_FREQ_DIV(1,  2)  ///< 40MHz
+#define SPI_FREQ_DIV_80M  SPI_GET_FREQ_DIV(1,  1)  ///< 80MHz
+
+/*
+ * Possible Data Structure of SPI Transaction
+ *
+ * [COMMAND]+[ADDRESS]+[DataOUT]+[DUMMYBITS]+[DataIN]
+ *
+ * [COMMAND]+[ADDRESS]+[DUMMYBITS]+[DataOUT]
+ *
+ */
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+typedef enum _spi_mode_t {
+    SPI_MODE0 = 0,  ///< CPOL = 0, CPHA = 0
+    SPI_MODE1,      ///< CPOL = 0, CPHA = 1
+    SPI_MODE2,      ///< CPOL = 1, CPHA = 0
+    SPI_MODE3       ///< CPOL = 1, CPHA = 1
+} spi_mode_t;
+
+typedef enum _spi_endianness_t {
+    SPI_LITTLE_ENDIAN = 0,
+    SPI_BIG_ENDIAN
+} spi_endianness_t;
+
+typedef enum _spi_word_size_t {
+    SPI_8BIT  = 1,  ///< 1 byte
+    SPI_16BIT = 2,  ///< 2 bytes
+    SPI_32BIT = 4   ///< 4 bytes
+} spi_word_size_t;
+
+/**
+ * SPI bus settings
+ */
+typedef struct
+{
+    spi_mode_t mode;              ///< Bus mode
+    uint32_t freq_divider;        ///< Bus frequency as a divider. See spi_init()
+    bool msb;                     ///< MSB first if true
+    spi_endianness_t endianness;  ///< Bus byte order
+    bool minimal_pins;            ///< Minimal set of pins if true. Spee spi_init()
+} spi_settings_t;
+
+/**
+ * \brief Initalize SPI bus
+ * Initalize specified SPI bus and setup appropriate pins:
+ * Bus 0:
+ *   - MISO = GPIO 7
+ *   - MOSI = GPIO 8
+ *   - SCK  = GPIO 6
+ *   - CS0  = GPIO 11 (if minimal_pins is false)
+ *   - HD   = GPIO 9  (if minimal_pins is false)
+ *   - WP   = GPIO 10 (if minimal_pins is false)
+ * Bus 1:
+ *   - MISO = GPIO 12
+ *   - MOSI = GPIO 13
+ *   - SCK  = GPIO 14
+ *   - CS0  = GPIO 15 (if minimal_pins is false)
+ * Note that system flash memory is on the bus 0!
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param mode Bus mode
+ * \param freq_divider SPI bus frequency divider, use SPI_GET_FREQ_DIV() or predefined value
+ * \param msb Bit order, MSB first if true
+ * \param endianness Byte order
+ * \param minimal_pins If true use the minimal set of pins: MISO, MOSI and SCK.
+ * \return false when error
+ */
+bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins);
+/**
+ * \brief Initalize SPI bus
+ * spi_init() wrapper.
+ * Example:
+ *
+ *     const spi_settings_t my_settings = {
+ *         .mode = SPI_MODE0,
+ *         .freq_divider = SPI_FREQ_DIV_4M,
+ *         .msb = true,
+ *         .endianness = SPI_LITTLE_ENDIAN,
+ *         .minimal_pins = true
+ *     }
+ *     ....
+ *     spi_settings_t old;
+ *     spi_get_settings(1, &old); // save current settings
+ *     //spi_init(1, SPI_MODE0, SPI_FREQ_DIV_4M, true, SPI_LITTLE_ENDIAN, true); // use own settings
+ *     // or
+ *     spi_set_settings(1, &my_settings);
+ *     // some work with spi here
+ *     ....
+ *     spi_set_settings(1, &old); // restore saved settings
+ *
+ * \param s Pointer to the settings structure
+ * \return false when error
+ */
+static inline bool spi_set_settings(uint8_t bus, const spi_settings_t *s)
+{
+    return spi_init(bus, s->mode, s->freq_divider, s->msb, s->endianness, s->minimal_pins);
+}
+/**
+ * \brief Get current settings of the SPI bus
+ * See spi_set_settings().
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param s Pointer to the structure that receives SPI bus settings
+ */
+void spi_get_settings(uint8_t bus, spi_settings_t *s);
+
+/**
+ * \brief Set SPI bus mode
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param mode Bus mode
+ */
+void spi_set_mode(uint8_t bus, spi_mode_t mode);
+/**
+ * \brief Get mode of the SPI bus
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \return Bus mode
+ */
+spi_mode_t spi_get_mode(uint8_t bus);
+
+/**
+ * \brief Set SPI bus frequency
+ * Examples:
+ *
+ *     spi_set_frequency_div(1, SPI_FREQ_DIV_8M); // 8 MHz, predefined value
+ *     ...
+ *     spi_set_frequency_div(1, SPI_GET_FREQ_DIV(8, 10)); // divider = 8, count = 10,
+ *                                                        // frequency = 80000000 Hz / 8 / 10 = 1000000 Hz
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param divider Predivider of the system bus frequency (80MHz) in the 2 low
+ *     bytes and period pulses count in the third byte. Please note that
+ *     divider must be be in range 1..8192 and count in range 2..64. Use the
+ *     macro SPI_GET_FREQ_DIV(divider, count) to get the correct parameter value.
+ */
+void spi_set_frequency_div(uint8_t bus, uint32_t divider);
+/**
+ * \brief Get SPI bus frequency as a divider
+ * Example:
+ *
+ *   uint32_t old_freq = spi_get_frequency_div(1);
+ *   spi_set_frequency_div(1, SPI_FREQ_DIV_8M);
+ *   ...
+ *   spi_set_frequency_div(1, old_freq);
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \return SPI frequency, as divider.
+ */
+inline uint32_t spi_get_frequency_div(uint8_t bus)
+{
+    return (FIELD2VAL(SPI_CLOCK_DIV_PRE, SPI(bus).CLOCK) + 1) |
+           (FIELD2VAL(SPI_CLOCK_COUNT_NUM, SPI(bus).CLOCK) + 1);
+}
+/**
+ * \brief Get SPI bus frequency in Hz
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \return SPI frequency, Hz
+ */
+inline uint32_t spi_get_frequency_hz(uint8_t bus)
+{
+    return APB_CLK_FREQ /
+           (FIELD2VAL(SPI_CLOCK_DIV_PRE, SPI(bus).CLOCK) + 1) /
+           (FIELD2VAL(SPI_CLOCK_COUNT_NUM, SPI(bus).CLOCK) + 1);
+}
+
+/**
+ * \brief Set SPI bus bit order
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param msb Bit order, MSB first if true
+ */
+void spi_set_msb(uint8_t bus, bool msb);
+/**
+ * \brief Get SPI bus bit order
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \return msb Bit order, MSB first if true
+ */
+inline bool spi_get_msb(uint8_t bus)
+{
+    return !(SPI(bus).CTRL0 & (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER));
+}
+
+/**
+ * \brief Set SPI bus byte order
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param endianness Byte order
+ */
+void spi_set_endianness(uint8_t bus, spi_endianness_t endianness);
+/**
+ * \brief Get SPI bus byte order
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \return endianness Byte order
+ */
+inline spi_endianness_t spi_get_endianness(uint8_t bus)
+{
+    return SPI(bus).USER0 & (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER)
+            ? SPI_BIG_ENDIAN
+            : SPI_LITTLE_ENDIAN;
+}
+
+/**
+ * \brief Transfer 8 bits over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data Byte to send
+ * \return Received byte
+ */
+uint8_t spi_transfer_8(uint8_t bus, uint8_t data);
+/**
+ * \brief Transfer 16 bits over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data Word to send
+ * \return Received word
+ */
+uint16_t spi_transfer_16(uint8_t bus, uint16_t data);
+/**
+ * \brief Transfer 32 bits over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data dword to send
+ * \return Received dword
+ */
+uint32_t spi_transfer_32(uint8_t bus, uint32_t data);
+/**
+ * \brief Transfer buffer of words over SPI
+ * Please note that the buffer size is in words, not in bytes!
+ * Example:
+ *
+ *    const uint16_t out_buf[] = { 0xa0b0, 0xa1b1, 0xa2b2, 0xa3b3 };
+ *    uint16_t in_buf[sizeof(out_buf)];
+ *    spi_init(1, SPI_MODE1, SPI_FREQ_DIV_4M, true, SPI_BIG_ENDIAN, true);
+ *    spi_transfer(1, out_buf, in_buf, sizeof(out_buf), SPI_16BIT); // len = 4 words * 2 bytes = 8 bytes
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param out_data Data to send.
+ * \param in_data Receive buffer. If NULL, received data will be lost.
+ * \param len Buffer size in words
+ * \param word_size Size of the word
+ * \return Transmitted/received words count
+ */
+size_t spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len, spi_word_size_t word_size);
+
+/**
+ * \brief Add permanent command bits when transfert data over SPI
+ * Example:
+ *
+ *    spi_set_command(1, 1, 0x01); // Set one command bit to 1
+ *    for (uint8_t i = 0; i < x; i++ ) {
+ *    	spi_transfer_8(1, 0x55);  // Send 1 bit command + 8 bits data x times
+ *    }
+ *    spi_clear_command(1); // Clear command
+ *    spi_transfer_8(1, 0x55);  // Send 8 bits data
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param bits Number of bits (max: 16).
+ * \param data Command to send for each transfert.
+ */
+static inline void spi_set_command(uint8_t bus, uint8_t bits, uint16_t data)
+{
+    if (!bits) return;
+
+    SPI(bus).USER0 |= SPI_USER0_COMMAND;                                //enable COMMAND function in SPI module
+    uint16_t command;
+    // Commands are always sent using little endian byte order
+    if (!spi_get_msb(bus)) {
+        // "data" are natively little endian, with LSB bit order
+        // this makes all bits of the command ready to be sent as-is
+        command = data;
+    } else {
+        // MSB
+        command = data << (16 - bits);                                 //align command data to high bits
+        command = ((command >> 8) & 0xff) | ((command << 8) & 0xff00); //swap byte order
+    }
+    SPI(bus).USER2 = SET_FIELD(SPI(bus).USER2, SPI_USER2_COMMAND_BITLEN, --bits);
+    SPI(bus).USER2 = SET_FIELD(SPI(bus).USER2, SPI_USER2_COMMAND_VALUE, command);
+}
+
+/**
+ * \brief Add permanent address bits when transfert data over SPI
+ * Example:
+ *
+ *    spi_set_address(1,8,0x45); // Set one address byte to 0x45
+ *    for (uint8_t i = 0 ; i < x ; i++ ) {
+ *    	spi_transfer_16(1,0xC584);  // Send 16 bits address + 16 bits data x times
+ *    }
+ *    spi_clear_address(1); // Clear command
+ *    spi_transfer_16(1,0x55);  // Send 16 bits data
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param bits Number of bits (max: 32).
+ * \param data Address to send for each transfert.
+ */
+static inline void spi_set_address(uint8_t bus, uint8_t bits, uint32_t data)
+{
+    if (!bits) return;
+
+    SPI(bus).USER0 |= SPI_USER0_ADDR; //enable ADDRess function in SPI module
+    // addresses are always sent using big endian byte order
+    if (spi_get_msb(bus)) {
+        SPI(bus).ADDR = data << (32 - bits); //align address data to high bits
+    } else {
+        // swap bytes from native little to command's big endian order
+        // bits in each byte are already arranged properly for LSB
+        SPI(bus).ADDR = (data & 0xff) << 24 | (data & 0xff00) << 8 | ((data >> 8) & 0xff00) | ((data >> 24) & 0xff);
+    }
+    SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_ADDR_BITLEN, --bits);
+}
+
+/**
+ * \brief Add permanent dummy bits when transfert data over SPI
+ * Example:
+ *
+ *    spi_set_dummy_bits(1, 4, false); // Set 4 dummy bit before Dout
+ *    for (uint8_t i = 0; i < x; i++ ) {
+ *    	spi_transfer_16(1, 0xC584);  // Send 4 bits dummy + 16 bits Dout x times
+ *    }
+ *    spi_set_dummy_bits(1, 4, true); // Set 4 dummy bit between Dout and Din
+ *    spi_transfer_8(1, 0x55);  // Send 8 bits Dout + 4 bits dummy + 8 bits Din
+ *
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param bits Number of bits
+ * \param pos Position of dummy bit, between Dout and Din if true.
+ */
+static inline void spi_set_dummy_bits(uint8_t bus, uint8_t bits, bool pos)
+{
+    if (!bits) return;
+    if (pos)
+        SPI(bus).USER0 |= SPI_USER0_MISO; // Dummy bit will be between Dout and Din data if set
+    SPI(bus).USER0 |= SPI_USER0_DUMMY; //enable dummy bits
+    SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_DUMMY_CYCLELEN, --bits);
+}
+
+/**
+ * \brief Clear adress Bits
+ * \param bus Bus ID: 0 - system, 1 - user
+ */
+static inline void spi_clear_address(uint8_t bus)
+{
+    SPI(bus).USER0 &= ~(SPI_USER0_ADDR);
+}
+
+/**
+ * \brief Clear command Bits
+ * \param bus Bus ID: 0 - system, 1 - user
+ */
+
+static inline void spi_clear_command(uint8_t bus)
+{
+    SPI(bus).USER0 &= ~(SPI_USER0_COMMAND);
+}
+
+/**
+ * \brief Clear dummy Bits
+ * \param bus Bus ID: 0 - system, 1 - user
+ */
+static inline void spi_clear_dummy(uint8_t bus)
+{
+    SPI(bus).USER0 &= ~(SPI_USER0_DUMMY | SPI_USER0_MISO);
+}
+
+/**
+ * \brief Send many 8 bits template over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data Byte template (8 bits)
+ * \param repeats Copy byte number
+ */
+void spi_repeat_send_8(uint8_t bus, uint8_t data, int32_t repeats);
+
+/**
+ * \brief Send many 16 bits template over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data Word template (16 bits)
+ * \param repeats Copy word number
+ */
+void spi_repeat_send_16(uint8_t bus, uint16_t data, int32_t repeats);
+
+/**
+ * \brief Send many 32 bits template over SPI
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param data Dualword template (32 bits)
+ * \param repeats Copy dword number
+ */
+void spi_repeat_send_32(uint8_t bus, uint32_t data, int32_t repeats);
+
+/**
+ * \brief Repeatedly send byte over SPI and receive data
+ * \param bus Bus ID: 0 - system, 1 - user
+ * \param out_byte Byte to send
+ * \param in_data Receive buffer
+ * \param len Buffer size in words
+ * \param word_size Size of the word
+ */
+void spi_read(uint8_t bus, uint8_t out_byte, void *in_data, size_t len, spi_word_size_t word_size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ESP_SPI_H_ */

core/include/esp/spi_regs.h

@@ -46,22 +46,7 @@ struct SPI_REGS {
     uint32_t volatile SLAVE1;       // 0x34
     uint32_t volatile SLAVE2;       // 0x38
     uint32_t volatile SLAVE3;       // 0x3c
-    uint32_t volatile W0;           // 0x40
-    uint32_t volatile W1;           // 0x44
-    uint32_t volatile W2;           // 0x48
-    uint32_t volatile W3;           // 0x4c
-    uint32_t volatile W4;           // 0x50
-    uint32_t volatile W5;           // 0x54
-    uint32_t volatile W6;           // 0x58
-    uint32_t volatile W7;           // 0x5c
-    uint32_t volatile W8;           // 0x60
-    uint32_t volatile W9;           // 0x64
-    uint32_t volatile W10;          // 0x68
-    uint32_t volatile W11;          // 0x6c
-    uint32_t volatile W12;          // 0x70
-    uint32_t volatile W13;          // 0x74
-    uint32_t volatile W14;          // 0x78
-    uint32_t volatile W15;          // 0x7c
+    uint32_t volatile W[16];        // 0x40 - 0x7c
     uint32_t volatile _unused[28];  // 0x80 - 0xec
     uint32_t volatile EXT0;         // 0xf0
     uint32_t volatile EXT1;         // 0xf4
@@ -73,6 +58,19 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
 
 /* Details for CMD register */
 
+#define SPI_CMD_READ                       BIT(31)
+#define SPI_CMD_WRITE_ENABLE               BIT(30)
+#define SPI_CMD_WRITE_DISABLE              BIT(29)
+#define SPI_CMD_READ_ID                    BIT(28)
+#define SPI_CMD_READ_SR                    BIT(27)
+#define SPI_CMD_WRITE_SR                   BIT(26)
+#define SPI_CMD_PP                         BIT(25)
+#define SPI_CMD_SE                         BIT(24)
+#define SPI_CMD_BE                         BIT(23)
+#define SPI_CMD_CE                         BIT(22)
+#define SPI_CMD_DP                         BIT(21)
+#define SPI_CMD_RES                        BIT(20)
+#define SPI_CMD_HPM                        BIT(19)
 #define SPI_CMD_USR                        BIT(18)
 
 /* Details for CTRL0 register */
@@ -152,6 +150,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
 #define SPI_USER0_CS_SETUP                 BIT(5)
 #define SPI_USER0_CS_HOLD                  BIT(4)
 #define SPI_USER0_FLASH_MODE               BIT(2)
+#define SPI_USER0_DUPLEX                   BIT(0)
 
 /* Details for USER1 register */
 
@@ -173,6 +172,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
 
 /* Details for PIN register */
 
+#define SPI_PIN_IDLE_EDGE                  BIT(29)  ///< CPOL
 #define SPI_PIN_CS2_DISABLE                BIT(2)
 #define SPI_PIN_CS1_DISABLE                BIT(1)
 #define SPI_PIN_CS0_DISABLE                BIT(0)

core/include/esp/types.h

@@ -2,6 +2,8 @@
 #define _ESP_TYPES_H
 
 #include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
 
 typedef volatile uint32_t *esp_reg_t;
 

core/include/esp/uart.h

@@ -124,4 +124,50 @@ static inline int uart_get_baud(int uart_num)
     return APB_CLK_FREQ / FIELD2VAL(UART_CLOCK_DIVIDER_VALUE, UART(uart_num).CLOCK_DIVIDER);
 }
 
+/* Set uart stop bit count to the desired value */
+static inline void uart_set_stopbits(int uart_num, UART_StopBits stop_bits) {
+    UART(uart_num).CONF0 = SET_FIELD(UART(uart_num).CONF0, UART_CONF0_STOP_BITS, stop_bits);
+}
+
+/* Returns the current stopbit count for the UART */
+static inline UART_StopBits uart_get_stopbits(int uart_num) {
+    return (UART_StopBits)(FIELD2VAL(UART_CONF0_STOP_BITS, UART(uart_num).CONF0));
+}
+
+/* Set if uart parity bit should be enabled */
+static inline void uart_set_parity_enabled(int uart_num, bool enable) {
+    if(enable)
+        UART(uart_num).CONF0 = SET_MASK_BITS(UART(uart_num).CONF0, UART_CONF0_PARITY_ENABLE);
+    else
+        UART(uart_num).CONF0 = CLEAR_MASK_BITS(UART(uart_num).CONF0, UART_CONF0_PARITY_ENABLE);
+}
+
+/* Set uart parity bit type */
+static inline void uart_set_parity(int uart_num, UART_Parity parity) {
+    if(parity == UART_PARITY_EVEN)
+        UART(uart_num).CONF0 = CLEAR_MASK_BITS(UART(uart_num).CONF0, UART_CONF0_PARITY);
+    else
+        UART(uart_num).CONF0 = SET_MASK_BITS(UART(uart_num).CONF0, UART_CONF0_PARITY);
+}
+
+/* Returns if parity bit is currently enabled for UART uart_num */
+static inline bool uart_get_parity_enabled(int uart_num) {
+    return ((UART(uart_num).CONF0 & UART_CONF0_PARITY_ENABLE) != 0);
+}
+
+/* Returns the current parity bit type for UART uart_num (also if parity bit is not enabled) */
+static inline UART_Parity uart_get_parity(int uart_num) {
+    return (UART_Parity)((UART(uart_num).CONF0 & UART_CONF0_PARITY) != 0);
+}
+
+/* Set uart data bits length to the desired value */
+static inline void uart_set_byte_length(int uart_num, UART_ByteLength byte_length) {
+    UART(uart_num).CONF0 = SET_FIELD(UART(uart_num).CONF0, UART_CONF0_BYTE_LEN, byte_length);
+}
+
+/* Returns the current data bits length for the UART */
+static inline UART_ByteLength uart_get_byte_length(int uart_num) {
+    return (UART_ByteLength)(FIELD2VAL(UART_CONF0_BYTE_LEN, UART(uart_num).CONF0));
+}
+
 #endif /* _ESP_UART_H */

core/include/esp/uart_regs.h

@@ -50,6 +50,25 @@ struct UART_REGS {
 
 _Static_assert(sizeof(struct UART_REGS) == 0x80, "UART_REGS is the wrong size");
 
+typedef enum {
+    UART_STOPBITS_0 = 0b00,
+    UART_STOPBITS_1 = 0b01,
+    UART_STOPBITS_1_5 = 0b10,
+    UART_STOPBITS_2 = 0b11
+} UART_StopBits;
+
+typedef enum {
+    UART_PARITY_EVEN = 0b0,
+    UART_PARITY_ODD = 0b1
+} UART_Parity;
+
+typedef enum {
+    UART_BYTELENGTH_5 = 0b00,
+    UART_BYTELENGTH_6 = 0b01,
+    UART_BYTELENGTH_7 = 0b10,
+    UART_BYTELENGTH_8 = 0b11,
+} UART_ByteLength;
+
 /* Details for FIFO register */
 
 #define UART_FIFO_DATA_M  0x000000ff
@@ -153,7 +172,7 @@ _Static_assert(sizeof(struct UART_REGS) == 0x80, "UART_REGS is the wrong size");
 #define UART_CONF0_BYTE_LEN_M                0x00000003
 #define UART_CONF0_BYTE_LEN_S                2
 #define UART_CONF0_PARITY_ENABLE             BIT(1)
-#define UART_CONF0_PARITY                    BIT(0) //FIXME: does this indicate odd or even?
+#define UART_CONF0_PARITY                    BIT(0) //where 0 means even
 
 /* Details for CONF1 register */
 

core/include/esp/wdt_regs.h

@@ -25,7 +25,9 @@ struct WDT_REGS {
     uint32_t volatile CTRL;        // 0x00
     uint32_t volatile REG1;        // 0x04
     uint32_t volatile REG2;        // 0x08
-    uint32_t volatile _unused[2];  // 0x0c - 0x10
+    // Current value, decrementing
+    uint32_t volatile VAL;         // 0x0c
+    uint32_t volatile _unused[1];  // 0x10
     uint32_t volatile FEED;        // 0x14
 };
 

core/include/flashchip.h

@@ -0,0 +1,41 @@
+/* flashchip.h
+ *
+ * sdk_flashchip_t structure used by the SDK and some bootrom routines
+ *
+ * This is in a separate include file because it's referenced by several other
+ * headers which are otherwise independent of each other.
+ *
+ * Part of esp-open-rtos
+ * Copyright (C) 2015 Alex Stewart and Angus Gratton
+ * BSD Licensed as described in the file LICENSE
+ */
+
+#ifndef _FLASHCHIP_H
+#define _FLASHCHIP_H
+
+/* SDK/bootrom uses this structure internally to account for flash size.
+
+   chip_size field is initialised during startup from the flash size
+   saved in the image header (on the first 8 bytes of SPI flash).
+
+   Other field are initialised to hardcoded values by the SDK.
+
+   ** NOTE: This structure is passed to some bootrom routines and is therefore
+   fixed.  Be very careful if you want to change it that you do not break
+   things. **
+
+   Based on RE work by @foogod at
+   http://esp8266-re.foogod.com/wiki/Flashchip_%28IoT_RTOS_SDK_0.9.9%29
+*/
+typedef struct {
+    uint32_t device_id;
+    uint32_t chip_size;   /* in bytes */
+    uint32_t block_size;  /* in bytes */
+    uint32_t sector_size; /* in bytes */
+    uint32_t page_size;   /* in bytes */
+    uint32_t status_mask;
+} sdk_flashchip_t;
+
+extern sdk_flashchip_t sdk_flashchip;
+
+#endif /* _FLASHCHIP_H */

core/include/sdk_internal.h

@@ -3,6 +3,8 @@
 
 #include "espressif/esp_wifi.h"
 #include "espressif/spi_flash.h"
+#include "espressif/phy_info.h"
+#include "etstimer.h"
 #include "lwip/netif.h"
 
 ///////////////////////////////////////////////////////////////////////////////
@@ -12,33 +14,134 @@
 // 'info' is declared in app_main.o at .bss+0x4
 
 struct sdk_info_st {
-    uint32_t _unknown0;
-    uint32_t _unknown1;
-    uint32_t _unknown2;
-    uint8_t _unknown3[12];
-    uint8_t softap_mac_addr[6];
-    uint8_t sta_mac_addr[6];
+    ip4_addr_t softap_ipaddr;    // 0x00
+    ip4_addr_t softap_netmask;   // 0x04
+    ip4_addr_t softap_gw;        // 0x08
+    ip4_addr_t sta_ipaddr;       // 0x0c
+    ip4_addr_t sta_netmask;      // 0x10
+    ip4_addr_t sta_gw;           // 0x14
+    uint8_t softap_mac_addr[6]; // 0x18
+    uint8_t sta_mac_addr[6];    // 0x1e
 };
 
-extern struct sdk_info_st sdk_info;
 
-// 'rst_if' is declared in user_interface.o at .bss+0xfc
-
-struct sdk_rst_if_st {
-    uint32_t version;
-    uint8_t _unknown[28];
+struct wl_channel {
+    uint8_t _unknown00;
+    uint8_t _unknown01;
+    uint8_t _unknown02;
+    uint8_t _unknown03;
+    uint8_t _unknown04;
+    uint8_t _unknown05;
+    uint8_t num; // eagle_auth_done
 };
 
-extern struct sdk_rst_if_st sdk_rst_if;
 
-// 'g_ic' is declared in libnet80211/ieee80211.o at .bss+0x0
-// See also: http://esp8266-re.foogod.com/wiki/G_ic_(IoT_RTOS_SDK_0.9.9)
+struct _unknown_softap2 {
+    uint32_t _unknown00;
+    uint32_t _unknown04;
+    uint32_t _unknown08;
+    uint32_t _unknown0c;
+    uint32_t _unknown10[8]; // block copied from sdk_g_ic.s._unknown28c
+    uint32_t _unknown30;
+    uint32_t _unknown34;
+    uint32_t *_unknown38;
+    uint8_t *_unknown3c; // string copied from sdk_g_ic.s._unknown2ac
+    uint32_t _unknown40[29];
+    uint32_t _unknownb4; // 300
+    uint32_t _unknownb8[5];
+};
+
+
+struct _unknown_softap1 {
+    uint32_t _unknown00;
+    struct _unknown_softap2 *_unknown04;
+    uint32_t _unknown08[4];
+    uint32_t *_unknown18; // result of sdk_wpa_init, dynamically allocated object.
+};
+
+
+struct _unknown_wpa1 {
+    uint32_t _unknown00; // 1, 2, 3
+    uint32_t _unknown04; // 2
+    uint32_t _unknown08; // 10
+    uint32_t _unknown0c;
+    uint32_t _unknown10;
+    uint32_t _unknown14;
+    uint32_t _unknown18;
+    uint32_t _unknown1c;
+    uint32_t _unknown20; // 10
+    uint32_t _unknown24;
+    uint32_t _unknown28;
+    uint32_t _unknown2c;
+    uint32_t _unknown30;
+    uint32_t _unknown34;
+    uint32_t _unknown38;
+    uint32_t _unknown3c;
+    uint32_t _unknown40; // 2
+    uint32_t _unknown44;
+    uint32_t _unknown48;
+};
+
+
+struct sdk_cnx_node {
+    uint8_t mac_addr[6];
+    uint8_t _unknown07[2];
+
+    uint32_t _unknown08; // eagle_auth_done
+
+    uint32_t _unknown0c[3];
+
+    int8_t _unknown18; // eagle_auth_done
+    int8_t _unknown19;
+    int8_t _unknown1a;
+    int8_t _unknown1b;
+
+    uint32_t _unknown1c[23];
+
+    struct wl_channel *channel; // 0x78 eagle_auth_done
+
+    uint32_t _unknown7c[8];
+
+    uint16_t _unknown9c; // ieee80211_hostap. increases by one one each timer func called.
+    uint16_t _unknown9e;
+
+    uint32_t _unknowna0[17];
+
+    void *_unknowne4;
+
+    uint8_t _unknowne8; //
+    uint8_t _unknowne9; // ppInstallKey
+    int8_t _unknownea;
+    int8_t _unknowneb;
+
+    uint32_t _unknownec[7];
+
+    uint32_t _unknown108; // hostap_handle_timer count
+};
+
 
 struct sdk_g_ic_netif_info {
-    struct netif *netif;
-    //TODO: rest of this structure is unknown.
+    struct netif *netif;     // 0x00
+    ETSTimer timer;          // 0x04 - 0x20
+    uint8_t _unknown20[28];  // 0x20 - 0x3c
+    uint32_t _unknown3c;     // 0x3c (referenced by sdk_wifi_station_disconnect)
+    uint8_t _unknown40[6];   // 0x40 - 0x46
+    uint8_t _unknown46[2];   // 0x46 - 0x47
+    uint32_t _unknown48;     // 0x48
+    uint8_t _unknown4c;      // 0x4c
+    uint8_t _unknown4d[59];  // 0x4d - 0x88
+    struct sdk_cnx_node *_unknown88;  // 0x88
+    uint32_t _unknown8c;     // 0x8c
+    struct sdk_cnx_node *cnx_nodes[6]; // 0x90 - 0xa8
+    uint8_t _unknowna8[12];  // 0xa8 - 0xb4
+    struct _unknown_softap1 *_unknownb4;
+    uint8_t statusb8;        // 0xb8 (arg of sta_status_set)
+    uint8_t statusb9;        // 0xb9 (compared to arg of sta_status_set)
+    uint8_t connect_status;  // 0xba (result of wifi_station_get_connect_status)
+    uint8_t started;         // 0xbb (referenced by sdk_wifi_station_start / sdk_wifi_station_stop)
 };
 
+
 // This is the portion of g_ic which is not loaded/saved to the flash ROM, and
 // starts out zeroed on every boot.
 struct sdk_g_ic_volatile_st {
@@ -64,9 +167,11 @@ struct sdk_g_ic_volatile_st {
     uint8_t _unknown7e;
     uint8_t _unknown7f;
 
-    uint8_t _unknown80[204];
+    uint32_t _unknown80;
 
-    void *_unknown14c;
+    uint32_t _unknown84[50]; // wifi_softap_start, channels.
+
+    void * volatile _unknown14c; // wifi_softap_start, current channel, arg to ieee80211_chan2ieee
 
     uint8_t _unknown150[20];
 
@@ -83,8 +188,7 @@ struct sdk_g_ic_volatile_st {
     void *_unknown184;
     struct station_info *station_info_head;
     struct station_info *station_info_tail;
-    uint32_t _unknown190;
-    uint32_t _unknown194;
+    void *_unknown190[2]; // cnx_sta_leave
 
     uint8_t _unknown198[40];
 
@@ -103,9 +207,10 @@ struct sdk_g_ic_volatile_st {
     uint8_t _unknown1d5[3];
 };
 
-struct sdk_g_ic_unk0_st {
-    uint32_t _unknown1e4;
-    uint8_t _unknown1e8[32];
+
+struct sdk_g_ic_ssid_with_length {
+    uint32_t ssid_length;  // 0x1e4 sdk_wpa_config_profile
+    uint8_t ssid[32];  // 0x1e8 Station ssid. Null terminated string.
 };
 
 // This is the portion of g_ic which is loaded/saved to the flash ROM, and thus
@@ -118,40 +223,46 @@ struct sdk_g_ic_saved_st {
     uint8_t wifi_mode;
     uint8_t wifi_led_enable;
     uint8_t wifi_led_gpio;
-    uint8_t _unknown1e3;
+    uint8_t wifi_led_state;  // 0 or 1.
 
-    struct sdk_g_ic_unk0_st _unknown1e4;
+    // Current station ap config ssid and length.
+    struct sdk_g_ic_ssid_with_length sta_ssid; // 0x1e4
 
     uint8_t _unknown208;
-    uint8_t _unknown209;
-    uint8_t _unknown20a;
+    uint8_t _unknown209; // sdk_wpa_config_profile
+    uint8_t _unknown20a; // sdk_wpa_config_profile
     uint8_t _unknown20b;
-    uint8_t _unknown20c;
+    uint8_t _unknown20c; // sdk_wpa_config_profile
     uint8_t _unknown20d;
     uint8_t _unknown20e;
-    uint8_t _unknown20f[64];
+    uint8_t sta_password[64]; // 0x20f Null terminated string.
     uint8_t _unknown24f;
 
     uint8_t _unknown250[49];
 
-    uint8_t _unknown281;
+    uint8_t sta_bssid_set; // 0x281 One if bssid is used, otherwise zero.
 
-    uint8_t _unknown282[6];
+    uint8_t sta_bssid[6]; // 0x282
 
-    uint32_t _unknown288;
+    uint16_t _unknown288;
+    uint16_t _unknown28a;
     uint8_t _unknown28c;
 
-    uint8_t _unknown28d[31];
+    uint8_t _unknown28d[21];
 
-    uint8_t _unknown2ac[64];
+    uint8_t _unknown2a0; // used in dhcp_bind_check wpa_main.o
+
+    uint8_t _unknown2a1[9];
+
+    char _unknown2ac[64]; // string.
     uint8_t _unknonwn2ec;
 
     uint8_t _unknown2ed[32];
 
-    uint8_t _unknown30d;
+    uint8_t _unknown30d; // result of ieee80211_chan2ieee
     uint8_t _unknown30e;
     uint8_t _unknown30f;
-    uint8_t _unknown310;
+    uint8_t _unknown310; // count of entries in the softap cnx_node array, less two.
 
     uint8_t _unknown311[3];
 
@@ -185,7 +296,20 @@ struct sdk_g_ic_st {
     struct sdk_g_ic_saved_st    s; // 0x1d8 - 0x548
 };
 
-extern struct sdk_g_ic_st sdk_g_ic;
+
+
+struct esf_buf {
+    struct pbuf *pbuf1;    // 0x00
+    struct pbuf *pbuf2;    // 0x04
+    uint32_t *_unknown8_;  // 0x08
+    uint32_t *_unknownc_;  // 0x0c
+    uint8_t *frame;        // 0x10 IEEE-802.11 payload data?
+    uint16_t _unknown14_;  // 0x14
+    uint16_t length;       // 0x16
+    uint32_t *_unknown18_; // 0x18
+    struct esf_buf *next;  // 0x1c Free list.
+    void *extra;           // 0x20
+};
 
 ///////////////////////////////////////////////////////////////////////////////
 // The above structures all refer to data regions outside our control, and a
@@ -196,37 +320,60 @@ extern struct sdk_g_ic_st sdk_g_ic;
 ///////////////////////////////////////////////////////////////////////////////
 
 _Static_assert(sizeof(struct sdk_info_st) == 0x24, "info_st is the wrong size!");
-_Static_assert(sizeof(struct sdk_rst_if_st) == 0x20, "sdk_rst_if_st is the wrong size!");
+_Static_assert(offsetof(struct sdk_info_st, sta_mac_addr) == 0x1e, "bad struct");
+
+_Static_assert(offsetof(struct wl_channel, num) == 0x06, "bad struct");
+
+_Static_assert(sizeof(struct _unknown_softap2) == 0xcc, "_unknown_softap2 is the wrong size!");
+_Static_assert(offsetof(struct _unknown_softap2, _unknownb8) == 0xb8, "bad struct");
+
+_Static_assert(sizeof(struct _unknown_softap1) == 0x1c, "_unknown_softap1 is the wrong size!");
+_Static_assert(offsetof(struct _unknown_softap1, _unknown18) == 0x18, "bad struct");
+
+_Static_assert(sizeof(struct _unknown_wpa1) == 0x4c, "_unknown_wpa1 is the wrong size!");
+_Static_assert(offsetof(struct _unknown_wpa1, _unknown48) == 0x48, "bad struct");
+
+_Static_assert(offsetof(struct sdk_cnx_node, channel) == 0x78, "bad struct");
+_Static_assert(offsetof(struct sdk_cnx_node, _unknown108) == 0x108, "bad struct");
+
+_Static_assert(offsetof(struct sdk_g_ic_netif_info, started) == 0xbb, "bad struct");
+
 _Static_assert(sizeof(struct sdk_g_ic_volatile_st) == 0x1d8, "sdk_g_ic_volatile_st is the wrong size!");
+_Static_assert(offsetof(struct sdk_g_ic_volatile_st, _unknown1d5) == 0x1d5, "bad struct");
+
 _Static_assert(sizeof(struct sdk_g_ic_saved_st) == 0x370, "sdk_g_ic_saved_st is the wrong size!");
+_Static_assert(offsetof(struct sdk_g_ic_saved_st, sta_ssid) == 0x1e4 - 0x1d8, "bad struct");
+_Static_assert(offsetof(struct sdk_g_ic_saved_st, _unknown546) == 0x546 - 0x1d8, "bad struct");
+
 _Static_assert(sizeof(struct sdk_g_ic_st) == 0x548, "sdk_g_ic_st is the wrong size!");
 
-///////////////////////////////////////////////////////////////////////////////
-//                            Function Prototypes                            //
-///////////////////////////////////////////////////////////////////////////////
+_Static_assert(sizeof(struct esf_buf) == 0x24, "struct esf_buf: wrong size");
+_Static_assert(offsetof(struct esf_buf, extra) == 0x20, "bad struct");
+_Static_assert(offsetof(struct esf_buf, length) == 0x16, "bad struct");
 
-sdk_SpiFlashOpResult sdk_SPIRead(uint32_t src_addr, uint32_t *des_addr, uint32_t size);
-sdk_SpiFlashOpResult sdk_SPIWrite(uint32_t des_addr, uint32_t *src_addr, uint32_t size);
-void sdk_cnx_attach(struct sdk_g_ic_st *);
-void sdk_ets_timer_init(void);
-void sdk_ieee80211_ifattach(struct sdk_g_ic_st *, uint8_t *);
-void sdk_ieee80211_phy_init(enum sdk_phy_mode);
-void sdk_lmacInit(void);
-void sdk_phy_disable_agc(void);
-void sdk_phy_enable_agc(void);
-void sdk_pm_attach(void);
-void sdk_pp_attach(void);
-void sdk_pp_soft_wdt_init(void);
-int sdk_register_chipv6_phy(uint8_t *);
-void sdk_sleep_reset_analog_rtcreg_8266(void);
-uint32_t sdk_system_get_checksum(uint8_t *, uint32_t);
-void sdk_system_restart_in_nmi(void);
-void sdk_wDevEnableRx(void);
-void sdk_wDev_Initialize(void);
-void sdk_wifi_mode_set(uint8_t);
-void sdk_wifi_softap_cacl_mac(uint8_t *, uint8_t *);
-void sdk_wifi_softap_set_default_ssid(void);
-void sdk_wifi_softap_start(void);
-void sdk_wifi_station_start(void);
+// The SDK access some slots in lwip structures.
+
+// The netif->state is initialized in netif_add within lwip with a struct
+// sdk_g_ic_netif_info, see sdk_wifi_station_start and sdk_wifi_softap_start.
+// There is a known sdk read of the netif->state in ieee80211_output.o
+// ieee80211_output_pbuf and perhaps elsewhere. The value is just passed through
+// lwip and and not used by lwip so just ensure this slot is at the expected
+// offset.
+_Static_assert(offsetof(struct netif, state) == 4, "netif->state offset wrong!");
+
+// Some sdk uses of netif->hwaddr have been converted to source code, but many
+// remain, but the content of this slot should not change in future versions of
+// lwip, so just ensure it is at the expected offset. Note the sdk binary
+// libraries have been patched to move this offset from 41 to 42 to keep it
+// 16-bit aligned to keep lwip v2 happy.
+_Static_assert(offsetof(struct netif, hwaddr) == 8, "netif->hwaddr offset wrong!");
+
+_Static_assert(offsetof(struct pbuf, esf_buf) == 16, "pbuf->esf_buf offset wrong!");
+
+
+/// Misc.
+
+err_t ethernetif_init(struct netif *netif);
+void ethernetif_input(struct netif *netif, struct pbuf *p);
 
 #endif /* _INTERNAL_SDK_STRUCTURES_H */

core/include/spiflash.h

@@ -0,0 +1,64 @@
+/**
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 sheinz (https://github.com/sheinz)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef __SPIFLASH_H__
+#define __SPIFLASH_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "common_macros.h"
+
+#define SPI_FLASH_SECTOR_SIZE      4096
+
+/**
+ * Read data from SPI flash.
+ *
+ * @param addr Address to read from. Can be not aligned.
+ * @param buf Buffer to read to. Doesn't have to be aligned.
+ * @param size Size of data to read. Buffer size must be >= than data size.
+ *
+ * @return true if success, otherwise false
+ */
+bool IRAM spiflash_read(uint32_t addr, uint8_t *buf, uint32_t size);
+
+/**
+ * Write data to SPI flash.
+ *
+ * @param addr Address to write to. Can be not aligned.
+ * @param buf Buffer of data to write to flash. Doesn't have to be aligned.
+ * @param size Size of data to write. Buffer size must be >= than data size.
+ *
+ * @return true if success, otherwise false
+ */
+bool IRAM spiflash_write(uint32_t addr, uint8_t *buf, uint32_t size);
+
+/**
+ * Erase a sector.
+ *
+ * @param addr Address of sector to erase. Must be sector aligned.
+ *
+ * @return true if success, otherwise false
+ */
+bool IRAM spiflash_erase_sector(uint32_t addr);
+
+#endif  // __SPIFLASH_H__

core/include/stdout_redirect.h

@@ -0,0 +1,45 @@
+/*
+ * Part of esp-open-rtos
+ * Copyright (C) 2016 Oto Petrik <oto.petrik@gmail.com>
+ * BSD Licensed as described in the file LICENSE
+ */
+
+#ifndef _STDOUT_REDIRECT_H_
+#define _STDOUT_REDIRECT_H_
+
+#include <sys/reent.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+typedef ssize_t _WriteFunction(struct _reent *r, int fd, const void *ptr, size_t len);
+
+/** Set implementation of write syscall for stdout.
+ *
+ *  Use this function to redirect stdout for further processing (save to file, send over network).
+ *  It may be good idea to save result of `get_write_stdout()` beforehand and call
+ *  it at the end of the supplied function.
+ *
+ *  NOTE: use NULL to reset to default implementation.
+ *
+ *  @param[in] f  New code to handle stdout output
+ *
+ */
+void set_write_stdout(_WriteFunction *f);
+
+/** Get current implementation of write syscall for stdout.
+ *
+ *  Save returned value before calling `set_write_stdout`, it allows for chaining
+ *  multiple independent handlers.
+ *
+ *  @returns current stdout handler
+ */
+_WriteFunction *get_write_stdout();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _STDOUT_REDIRECT_H_ */

core/include/sysparam.h

@@ -0,0 +1,467 @@
+/*
+ * Part of esp-open-rtos
+ * Copyright (C) 2016 Alex Stewart
+ * BSD Licensed as described in the file LICENSE
+ */
+
+#ifndef _SYSPARAM_H_
+#define _SYSPARAM_H_
+
+#include <esp/types.h>
+
+#ifndef DEFAULT_SYSPARAM_SECTORS
+#define DEFAULT_SYSPARAM_SECTORS 4
+#endif
+
+/** @file sysparam.h
+ *
+ *  Read/write "system parameters" to persistent flash.
+ *
+ *  System parameters are stored as key/value pairs.  Keys are string values
+ *  between 1 and 65535 characters long.  Values can be any data up to 65535
+ *  bytes in length (but are most commonly also text strings). Up to 126 key/
+ *  value pairs can be stored at a time.
+ *
+ *  Keys and values are stored in flash using a progressive list structure
+ *  which allows space-efficient storage and minimizes flash erase cycles,
+ *  improving write speed and increasing the lifespan of the flash memory.
+ */
+
+/** Status codes returned by all sysparam functions
+ *
+ *  Error codes (`SYSPARAM_ERR_*`) all have values less than zero, and can be
+ *  returned by any function.  Values greater than zero are non-error status
+ *  codes which may be returned by some functions to indicate various results.
+ */
+typedef enum {
+    SYSPARAM_OK           = 0,  ///< Success
+    SYSPARAM_NOTFOUND     = 1,  ///< Entry not found matching criteria
+    SYSPARAM_PARSEFAILED  = 2,  ///< Unable to parse retrieved value
+    SYSPARAM_ERR_NOINIT   = -1, ///< sysparam_init() must be called first
+    SYSPARAM_ERR_BADVALUE = -2, ///< One or more arguments were invalid
+    SYSPARAM_ERR_FULL     = -3, ///< No space left in sysparam area (or too many keys in use)
+    SYSPARAM_ERR_IO       = -4, ///< I/O error reading/writing flash
+    SYSPARAM_ERR_CORRUPT  = -5, ///< Sysparam region has bad/corrupted data
+    SYSPARAM_ERR_NOMEM    = -6, ///< Unable to allocate memory
+} sysparam_status_t;
+
+/** Structure used by sysparam_iter_next() to keep track of its current state
+ * and return its results.  This should be initialized by calling
+ * sysparam_iter_start() and cleaned up afterward by calling
+ * sysparam_iter_end().
+ */
+typedef struct {
+    char *key;
+    uint8_t *value;
+    size_t key_len;
+    size_t value_len;
+    bool binary;
+    size_t bufsize;
+    struct sysparam_context *ctx;
+} sysparam_iter_t;
+
+/** Initialize sysparam and set up the current area of flash to use.
+ *
+ *  This must be called (and return successfully) before any other sysparam
+ *  routines (except sysparam_create_area()) are called.
+ *
+ *  This should normally be taken care of automatically on boot by the OS
+ *  startup routines.  It may be necessary to call it specially, however, if
+ *  the normal initialization failed, or after calling sysparam_create_area()
+ *  to reformat the current area.
+ *
+ *  This routine will start at `base_addr` and scan all sectors up to
+ *  `top_addr` looking for a valid sysparam area.  If `top_addr` is zero (or
+ *  equal to `base_addr`, then only the sector at `base_addr` will be checked.
+ *
+ *  @param[in] base_addr  The flash address to start looking for the start of
+ *                        the (already present) sysparam area
+ *  @param[in] top_addr   The flash address to stop looking for the sysparam
+ *                        area
+ *
+ *  @retval ::SYSPARAM_OK           Initialization successful.
+ *  @retval ::SYSPARAM_NOTFOUND     The specified address does not appear to
+ *                                  contain a sysparam area.  It may be
+ *                                  necessary to call sysparam_create_area() to
+ *                                  create one first.
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_init(uint32_t base_addr, uint32_t top_addr);
+
+/** Create a new sysparam area in flash at the specified address.
+ *
+ *  By default, this routine will scan the specified area to make sure it
+ *  appears to be empty (i.e. all 0xFF bytes) before setting it up as a new
+ *  sysparam area.  If there appears to be other data already present, it will
+ *  not overwrite it.  Setting `force` to `true` will cause it to clobber any
+ *  existing data instead.
+ *
+ *  @param[in] base_addr   The flash address at which it should start
+ *                         (must be a multiple of the sector size)
+ *  @param[in] num_sectors The number of flash sectors to use for the sysparam
+ *                         area.  This should be an even number >= 2.  Note
+ *                         that the actual amount of useable parameter space
+ *                         will be roughly half this amount.
+ *  @param[in] force       Proceed even if the space does not appear to be empty
+ *
+ *  @retval ::SYSPARAM_OK           Area (re)created successfully.
+ *  @retval ::SYSPARAM_NOTFOUND     `force` was not specified, and the area at
+ *                                  `base_addr` appears to have other data.  No
+ *                                  action taken.
+ *  @retval ::SYSPARAM_ERR_BADVALUE The `num_sectors` value was not even (or
+ *                                  was zero)
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ *
+ *  Note: This routine can create a sysparam area in another location than the
+ *  one currently being used, but does not change which area is currently used
+ *  (you will need to call sysparam_init() again if you want to do that).  If
+ *  you reformat the area currently being used, you will also need to call
+ *  sysparam_init() again afterward before you will be able to continue using
+ *  it.
+ */
+sysparam_status_t sysparam_create_area(uint32_t base_addr, uint16_t num_sectors, bool force);
+
+/** Get the start address and size of the currently active sysparam area
+ *
+ *  Fills in `base_addr` and `num_sectors` with the location and size of the
+ *  currently active sysparam area.  The returned values correspond to the
+ *  arguments passed to the sysparam_create_area() call when the area was
+ *  originally created.
+ *
+ *  @param[out] base_addr   The flash address at which the sysparam area starts
+ *  @param[out] num_sectors The number of flash sectors used by the sysparam
+ *                          area
+ *
+ *  @retval ::SYSPARAM_OK           Completed successfully
+ *  @retval ::SYSPARAM_ERR_NOINIT   No current sysparam area is active
+ */
+sysparam_status_t sysparam_get_info(uint32_t *base_addr, uint32_t *num_sectors);
+
+/** Compact the sysparam area.
+ *
+ *  This also flattens the log.
+ *
+ *  @retval ::SYSPARAM_OK           Completed successfully
+ *  @retval ::SYSPARAM_ERR_NOINIT   No current sysparam area is active
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_compact();
+
+/** Get the value associated with a key
+ *
+ *  This is the core "get value" function.  It will retrieve the value for the
+ *  specified key in a freshly malloc()'d buffer and return it.  Raw values can
+ *  contain any data (including zero bytes), so the `actual_length` parameter
+ *  should be used to determine the length of the data in the buffer.
+ *
+ *  It is up to the caller to free() the returned buffer when done using it.
+ *
+ *  Note: If the status result is anything other than ::SYSPARAM_OK, the value
+ *  in `destptr` is not changed.  This means it is possible to set a default
+ *  value before calling this function which will be left as-is if a sysparam
+ *  value could not be successfully read.
+ *
+ *  @param[in]  key            Key name (zero-terminated string)
+ *  @param[out] destptr        Pointer to a location to hold the address of the
+ *                             returned data buffer
+ *  @param[out] actual_length  Pointer to a location to hold the length of the
+ *                             returned data buffer (may be NULL)
+ *  @param[out] is_binary      Pointer to a bool to hold whether the returned
+ *                             value is "binary" or not (may be NULL)
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved.
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found.  No buffer returned.
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_data(const char *key, uint8_t **destptr, size_t *actual_length, bool *is_binary);
+
+/** Get the value associated with a key (static value buffer)
+ *
+ *  This performs the same function as sysparam_get_data() but without
+ *  allocating memory for the result value.  It can thus be used before the heap
+ *  has been configured or in other cases where using the heap would be a
+ *  problem (i.e. in an OOM handler, etc).  It requires that the caller pass in
+ *  a suitably sized buffer for the value to be read (if the supplied buffer is
+ *  not large enough, the returned value will be truncated and the full required
+ *  length will be returned in `actual_length`).
+ *
+ *  @param[in]  key            Key name (zero-terminated string)
+ *  @param[in]  dest           Pointer to a buffer to hold the returned value.
+ *  @param[in]  dest_size      Length of the supplied buffer in bytes.
+ *  @param[out] actual_length  Pointer to a location to hold the actual length
+ *                             of the data which was associated with the key
+ *                             (may be NULL).
+ *  @param[out] is_binary      Pointer to a bool to hold whether the returned
+ *                             value is "binary" or not (may be NULL)
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    The supplied buffer is too small
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_data_static(const char *key, uint8_t *dest, size_t dest_size, size_t *actual_length, bool *is_binary);
+
+/** Get the string value associated with a key
+ *
+ *  This routine can be used if you know that the value in a key will (or at
+ *  least should) be a string.  It will return a zero-terminated char buffer
+ *  containing the value retrieved.
+ *
+ *  It is up to the caller to free() the returned buffer when done using it.
+ *
+ *  Note: If the status result is anything other than ::SYSPARAM_OK, the value
+ *  in `destptr` is not changed.  This means it is possible to set a default
+ *  value before calling this function which will be left as-is if a sysparam
+ *  value could not be successfully read.
+ *
+ *  @param[in]  key      Key name (zero-terminated string)
+ *  @param[out] destptr  Pointer to a location to hold the address of the
+ *                       returned data buffer
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved.
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found.
+ *  @retval ::SYSPARAM_PARSEFAILED  The retrieved value was a binary value
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_string(const char *key, char **destptr);
+
+/** Get the int32_t value associated with a key
+ *
+ *  This routine can be used if you know that the value in a key will (or at
+ *  least should) be an int32_t value. This is done without allocating any
+ *  memory.
+ *
+ *  Note: If the status result is anything other than ::SYSPARAM_OK, the value
+ *  in `result` is not changed.  This means it is possible to set a default
+ *  value before calling this function which will be left as-is if a sysparam
+ *  value could not be successfully read.
+ *
+ *  @param[in]  key     Key name (zero-terminated string)
+ *  @param[out] result  Pointer to a location to hold returned integer value
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved.
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found.
+ *  @retval ::SYSPARAM_PARSEFAILED  The retrieved value could not be parsed as
+ *                                  an integer.
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_int32(const char *key, int32_t *result);
+
+/** Get the int8_t value associated with a key
+ *
+ *  This routine can be used if you know that the value in a key will (or at
+ *  least should) be a uint8_t binary value. This is done without allocating any
+ *  memory.
+ *
+ *  Note: If the status result is anything other than ::SYSPARAM_OK, the value
+ *  in `result` is not changed.  This means it is possible to set a default
+ *  value before calling this function which will be left as-is if a sysparam
+ *  value could not be successfully read.
+ *
+ *  @param[in]  key     Key name (zero-terminated string)
+ *  @param[out] result  Pointer to a location to hold returned boolean value
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved.
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found.
+ *  @retval ::SYSPARAM_PARSEFAILED  The retrieved value could not be parsed as a
+ *                                  boolean setting.
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_int8(const char *key, int8_t *result);
+
+/** Get the boolean value associated with a key
+ *
+ *  This routine can be used if you know that the value in a key will (or at
+ *  least should) be a boolean setting.  It will read the specified value as a
+ *  text string and attempt to parse it as a boolean value.
+ *
+ *  It will recognize the following (case-insensitive) strings:
+ *    * True: "yes", "y", "true", "t", "1"
+ *    * False: "no", "n", "false", "f", "0"
+ *
+ *  Note: If the status result is anything other than ::SYSPARAM_OK, the value
+ *  in `result` is not changed.  This means it is possible to set a default
+ *  value before calling this function which will be left as-is if a sysparam
+ *  value could not be successfully read.
+ *
+ *  @param[in]  key     Key name (zero-terminated string)
+ *  @param[out] result  Pointer to a location to hold returned boolean value
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully retrieved.
+ *  @retval ::SYSPARAM_NOTFOUND     Key/value not found.
+ *  @retval ::SYSPARAM_PARSEFAILED  The retrieved value could not be parsed as a
+ *                                  boolean setting.
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_get_bool(const char *key, bool *result);
+
+/** Set the value associated with a key
+ *
+ *  The supplied value can be any data, up to 255 bytes in length.  If `value`
+ *  is NULL or `value_len` is 0, this is treated as a request to delete any
+ *  current entry matching `key`. This is done without allocating any memory.
+ *
+ *  If `binary` is true, the data will be considered binary (unprintable) data,
+ *  and this will be annotated in the saved entry.  This does not affect the
+ *  saving or loading process in any way, but may be used by some applications
+ *  to (for example) print binary data differently than text entries when
+ *  printing parameter values.
+ *
+ *  @param[in] key        Key name (zero-terminated string)
+ *  @param[in] value      Pointer to a buffer containing the value data
+ *  @param[in] value_len  Length of the data in the buffer
+ *  @param[in] binary     Whether the data should be considered "binary"
+ *                        (unprintable) data
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully set.
+ *  @retval ::SYSPARAM_ERR_NOINIT   sysparam_init() must be called first
+ *  @retval ::SYSPARAM_ERR_BADVALUE Either an empty key was provided or
+ *                                  value_len is too large
+ *  @retval ::SYSPARAM_ERR_FULL     No space left in sysparam area
+ *                                  (or too many keys in use)
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_set_data(const char *key, const uint8_t *value, size_t value_len, bool binary);
+
+/** Set a key's value from a string
+ *
+ *  Performs the same function as sysparam_set_data(), but accepts a
+ *  zero-terminated string value instead.
+ *
+ *  @param[in] key        Key name (zero-terminated string)
+ *  @param[in] value      Value to set (zero-terminated string)
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully set.
+ *  @retval ::SYSPARAM_ERR_BADVALUE Either an empty key was provided or the
+ *                                  length of `value` is too large
+ *  @retval ::SYSPARAM_ERR_FULL     No space left in sysparam area
+ *                                  (or too many keys in use)
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_set_string(const char *key, const char *value);
+
+/** Set a key's value as a number
+ *
+ *  Write an int32_t binary value to the specified key. This does the inverse of
+ *  the sysparam_get_int32() function. This is done without allocating any
+ *  memory.
+ *
+ *  @param[in] key        Key name (zero-terminated string)
+ *  @param[in] value      Value to set
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully set.
+ *  @retval ::SYSPARAM_ERR_BADVALUE An empty key was provided.
+ *  @retval ::SYSPARAM_ERR_FULL     No space left in sysparam area
+ *                                  (or too many keys in use)
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_set_int32(const char *key, int32_t value);
+
+/** Set a key's value as a number
+ *
+ *  Write an int8_t binary value to the specified key. This does the inverse of
+ *  the sysparam_get_int8() function. This is done without allocating any
+ *  memory.
+ *
+ *  @param[in] key        Key name (zero-terminated string)
+ *  @param[in] value      Value to set
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully set.
+ *  @retval ::SYSPARAM_ERR_BADVALUE An empty key was provided.
+ *  @retval ::SYSPARAM_ERR_FULL     No space left in sysparam area
+ *                                  (or too many keys in use)
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_set_int8(const char *key, int8_t value);
+
+/** Set a key's value as a boolean (yes/no) string
+ *
+ *  Converts a bool value to a corresponding text string and writes it to the
+ *  specified key.  This does the inverse of the sysparam_get_bool()
+ *  function.
+ *
+ *  @param[in] key        Key name (zero-terminated string)
+ *  @param[in] value      Value to set
+ *
+ *  @retval ::SYSPARAM_OK           Value successfully set.
+ *  @retval ::SYSPARAM_ERR_BADVALUE An empty key was provided.
+ *  @retval ::SYSPARAM_ERR_FULL     No space left in sysparam area
+ *                                  (or too many keys in use)
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_set_bool(const char *key, bool value);
+
+/** Begin iterating through all key/value pairs
+ *
+ *  This function initializes a sysparam_iter_t structure to prepare it for
+ *  iterating through the list of key/value pairs using sysparam_iter_next().
+ *  This does not fetch any items (the first successive call to
+ *  sysparam_iter_next() will return the first key/value in the list).
+ *
+ *  NOTE: When done, you must call sysparam_iter_end() to free the resources
+ *  associated with `iter`, or you will leak memory.
+ *
+ *  @param[in] iter  A pointer to a sysparam_iter_t structure to initialize
+ *
+ *  @retval ::SYSPARAM_OK           Initialization successful
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ */
+sysparam_status_t sysparam_iter_start(sysparam_iter_t *iter);
+
+/** Fetch the next key/value pair
+ *
+ *  This will retrieve the next key and value from the sysparam area, placing
+ *  them in `iter->key`, and `iter->value` (and updating `iter->key_len` and
+ *  `iter->value_len`).
+ *
+ *  NOTE: `iter->key` and `iter->value` are static buffers local to the `iter`
+ *  structure, and will be overwritten with the next call to
+ *  sysparam_iter_next() using the same `iter`.  They should *not* be free()d
+ *  after use.
+ *
+ *  @param[in] iter  The iterator structure to update
+ *
+ *  @retval ::SYSPARAM_OK           Next key/value retrieved
+ *  @retval ::SYSPARAM_ERR_NOMEM    Unable to allocate memory
+ *  @retval ::SYSPARAM_ERR_CORRUPT  Sysparam region has bad/corrupted data
+ *  @retval ::SYSPARAM_ERR_IO       I/O error reading/writing flash
+ */
+sysparam_status_t sysparam_iter_next(sysparam_iter_t *iter);
+
+/** Finish iterating through keys/values
+ *
+ *  Cleans up and releases resources allocated by sysparam_iter_start() /
+ *  sysparam_iter_next().
+ */
+void sysparam_iter_end(sysparam_iter_t *iter);
+
+#endif /* _SYSPARAM_H_ */

core/include/user_exception.h

@@ -0,0 +1,9 @@
+/* Allows the user to set their own exception handler. */
+
+#ifndef _USER_EXCEPTION_H
+#define _USER_EXCEPTION_H
+
+void set_user_exception_handler(void (*fn)(void));
+
+#endif
+

core/include/xtensa_ops.h

@@ -11,6 +11,20 @@
 #ifndef _XTENSA_OPS_H
 #define _XTENSA_OPS_H
 
+/* Read stack pointer to variable.
+ *
+ * Note that the compiler will push a stack frame (minimum 16 bytes)
+ * in the prelude of a C function that calls any other functions.
+ */
+#define SP(var) asm volatile ("mov %0, a1" : "=r" (var))
+
+/* Read the function return address to a variable.
+ *
+ * Depends on the containing function being simple enough that a0 is
+ * being used as a working register.
+ */
+#define RETADDR(var) asm volatile ("mov %0, a0" : "=r" (var))
+
 // GCC macros for reading, writing, and exchanging Xtensa processor special
 // registers:
 
@@ -18,4 +32,11 @@
 #define WSR(var, reg) asm volatile ("wsr %0, " #reg : : "r" (var));
 #define XSR(var, reg) asm volatile ("xsr %0, " #reg : "+r" (var));
 
+// GCC macros for performing associated "*sync" opcodes
+
+#define ISYNC() asm volatile ( "isync" )
+#define RSYNC() asm volatile ( "rsync" )
+#define ESYNC() asm volatile ( "esync" )
+#define DSYNC() asm volatile ( "dsync" )
+
 #endif /* _XTENSA_OPS_H */

core/newlib_syscalls.c

@@ -9,12 +9,34 @@
 #include <sys/errno.h>
 #include <espressif/sdk_private.h>
 #include <common_macros.h>
+#include <xtensa_ops.h>
 #include <esp/uart.h>
 #include <stdlib.h>
+#include <stdout_redirect.h>
+#include <sys/time.h>
+#include <lwip/sockets.h>
+#include <sys/lock.h>
+#include <FreeRTOS.h>
+#include <semphr.h>
+#include <esp/hwrand.h>
+
+/*
+ * The file descriptor index space is allocated in blocks. The first block of 3
+ * is for newlib I/O the stdin stdout and stderr. The next block of
+ * MEMP_NUM_NETCONN is allocated for lwip sockets, and the remainer to file
+ * system descriptors. The newlib default FD_SETSIZE is 64.
+ */
+#if LWIP_SOCKET_OFFSET < 3
+#error Expecting a LWIP_SOCKET_OFFSET >= 3, to allow room for the standard I/O descriptors.
+#endif
+#define FILE_DESCRIPTOR_OFFSET (LWIP_SOCKET_OFFSET + MEMP_NUM_NETCONN)
+#if FILE_DESCRIPTOR_OFFSET > FD_SETSIZE
+#error Too many lwip sockets for the FD_SETSIZE.
+#endif
 
 extern void *xPortSupervisorStackPointer;
 
-IRAM caddr_t _sbrk_r (struct _reent *r, int incr)
+IRAM void *_sbrk_r (struct _reent *r, ptrdiff_t incr)
 {
     extern char   _heap_start; /* linker script defined */
     static char * heap_end;
@@ -26,61 +48,158 @@ IRAM caddr_t _sbrk_r (struct _reent *r, int incr)
 
     intptr_t sp = (intptr_t)xPortSupervisorStackPointer;
     if(sp == 0) /* scheduler not started */
-        __asm__ __volatile__ ("mov %0, a1\n" : "=a"(sp));
+        SP(sp);
 
     if ((intptr_t)heap_end + incr >= sp)
     {
         r->_errno = ENOMEM;
         return (caddr_t)-1;
     }
+
     heap_end += incr;
 
     return (caddr_t) prev_heap_end;
 }
 
+
+/* Insert a disjoint region into the nano malloc pool. Create a malloc chunk,
+ * filling the size as newlib nano malloc expects, and then free it. */
+void nano_malloc_insert_chunk(void *start, size_t size) {
+    *(uint32_t *)start = size;
+    free(start + sizeof(size_t));
+}
+
 /* syscall implementation for stdio write to UART */
-long _write_r(struct _reent *r, int fd, const char *ptr, int len )
+__attribute__((weak)) ssize_t _write_stdout_r(struct _reent *r, int fd, const void *ptr, size_t len )
 {
-    if(fd != r->_stdout->_file) {
-        r->_errno = EBADF;
-        return -1;
-    }
     for(int i = 0; i < len; i++) {
         /* Auto convert CR to CRLF, ignore other LFs (compatible with Espressif SDK behaviour) */
-        if(ptr[i] == '\r')
+        if(((char *)ptr)[i] == '\r')
             continue;
-        if(ptr[i] == '\n')
+        if(((char *)ptr)[i] == '\n')
             uart_putc(0, '\r');
-        uart_putc(0, ptr[i]);
+        uart_putc(0, ((char *)ptr)[i]);
     }
     return len;
 }
 
+static _WriteFunction *current_stdout_write_r = &_write_stdout_r;
+
+void set_write_stdout(_WriteFunction *f)
+{
+    if  (f != NULL) {
+        current_stdout_write_r = f;
+    } else {
+        current_stdout_write_r = &_write_stdout_r;
+    }
+}
+
+_WriteFunction *get_write_stdout()
+{
+    return current_stdout_write_r;
+}
+
+/* default implementation, replace in a filesystem */
+__attribute__((weak)) ssize_t _write_filesystem_r(struct _reent *r, int fd, const void *ptr, size_t len)
+{
+    r->_errno = EBADF;
+    return -1;
+}
+
+__attribute__((weak)) ssize_t _write_r(struct _reent *r, int fd, const void *ptr, size_t len)
+{
+    if (fd >= FILE_DESCRIPTOR_OFFSET) {
+        return _write_filesystem_r(r, fd, ptr, len);
+    }
+    if (fd >= LWIP_SOCKET_OFFSET) {
+        return lwip_write(fd, ptr, len);
+    }
+    if (fd == r->_stdout->_file) {
+        return current_stdout_write_r(r, fd, ptr, len);
+    }
+    r->_errno = EBADF;
+    return -1;
+}
+
 /* syscall implementation for stdio read from UART */
-__attribute__((weak)) long _read_r( struct _reent *r, int fd, char *ptr, int len )
+__attribute__((weak)) ssize_t _read_stdin_r(struct _reent *r, int fd, void *ptr, size_t len)
 {
     int ch, i;
-
-    if(fd != r->_stdin->_file) {
-        r->_errno = EBADF;
-        return -1;
-    }
     uart_rxfifo_wait(0, 1);
     for(i = 0; i < len; i++) {
         ch = uart_getc_nowait(0);
         if (ch < 0) break;
-        ptr[i] = ch;
+        ((char *)ptr)[i] = ch;
     }
     return i;
 }
 
+/* default implementation, replace in a filesystem */
+__attribute__((weak)) ssize_t _read_filesystem_r( struct _reent *r, int fd, void *ptr, size_t len )
+{
+    r->_errno = EBADF;
+    return -1;
+}
+
+__attribute__((weak)) ssize_t _read_r( struct _reent *r, int fd, void *ptr, size_t len )
+{
+    if (fd >= FILE_DESCRIPTOR_OFFSET) {
+        return _read_filesystem_r(r, fd, ptr, len);
+    }
+    if (fd >= LWIP_SOCKET_OFFSET) {
+        return lwip_read(fd, ptr, len);
+    }
+    if (fd == r->_stdin->_file) {
+        return _read_stdin_r(r, fd, ptr, len);
+    }
+    r->_errno = EBADF;
+    return -1;
+}
+
+/* default implementation, replace in a filesystem */
+__attribute__((weak)) int _close_filesystem_r(struct _reent *r, int fd)
+{
+    r->_errno = EBADF;
+    return -1;
+}
+
+__attribute__((weak)) int _close_r(struct _reent *r, int fd)
+{
+    if (fd >= FILE_DESCRIPTOR_OFFSET) {
+        return _close_filesystem_r(r, fd);
+    }
+    if (fd >= LWIP_SOCKET_OFFSET) {
+        return lwip_close(fd);
+    }
+    r->_errno = EBADF;
+    return -1;
+}
+
 /* Stub syscall implementations follow, to allow compiling newlib functions that
    pull these in via various codepaths
 */
-__attribute__((alias("syscall_returns_enosys"))) int _open_r(struct _reent *r, const char *pathname, int flags, int mode);
-__attribute__((alias("syscall_returns_enosys"))) int _fstat_r(struct _reent *r, int fd, void *buf);
-__attribute__((alias("syscall_returns_enosys"))) int _close_r(struct _reent *r, int fd);
-__attribute__((alias("syscall_returns_enosys"))) off_t _lseek_r(struct _reent *r, int fd, off_t offset, int whence);
+__attribute__((weak, alias("syscall_returns_enosys"))) 
+int _open_r(struct _reent *r, const char *pathname, int flags, int mode);
+
+__attribute__((weak, alias("syscall_returns_enosys"))) 
+int _unlink_r(struct _reent *r, const char *path);
+
+__attribute__((weak, alias("syscall_returns_enosys"))) 
+int _fstat_r(struct _reent *r, int fd, struct stat *buf);
+
+__attribute__((weak, alias("syscall_returns_enosys"))) 
+int _stat_r(struct _reent *r, const char *pathname, struct stat *buf);
+
+__attribute__((weak, alias("syscall_returns_enosys"))) 
+off_t _lseek_r(struct _reent *r, int fd, off_t offset, int whence);
+
+__attribute__((weak, alias("_gettimeofday_r")))
+int _gettimeofday_r (struct _reent *ptr, struct timeval *ptimeval, void *ptimezone) {
+  ptimeval->tv_sec = 0;
+  ptimeval->tv_usec = 0;
+  errno = ENOSYS;
+  return -1;
+}
 
 /* Generic stub for any newlib syscall that fails with errno ENOSYS
    ("Function not implemented") and a return value equivalent to
@@ -90,3 +209,125 @@ static int syscall_returns_enosys(struct _reent *r)
     r->_errno=ENOSYS;
     return -1;
 }
+
+int getentropy(void *ptr, size_t n)
+{
+    hwrand_fill(ptr, n);
+    return 0;
+}
+
+void _arc4random_getentropy_fail(void)
+{
+}
+
+void _exit(int status)
+{
+    while(1);
+}
+
+/*
+ * Newlib lock implementation. Some newlib locks are statically allocated, but
+ * can not be statically initialized so are set to NULL and initialized at
+ * startup. The malloc lock is used before it can be initialized so there are
+ * runtime checks on the functions that use it early.
+ */
+static int locks_initialized = 0;
+
+extern _lock_t __arc4random_mutex;
+extern _lock_t __at_quick_exit_mutex;
+//extern _lock_t __dd_hash_mutex;
+extern _lock_t __tz_mutex;
+
+extern _lock_t __atexit_recursive_mutex;
+extern _lock_t __env_recursive_mutex;
+extern _lock_t __malloc_recursive_mutex;
+extern _lock_t __sfp_recursive_mutex;
+extern _lock_t __sinit_recursive_mutex;
+
+void init_newlib_locks()
+{
+#if 0
+    /* Used a separate mutex for each lock.
+     * Each mutex uses about 96 bytes which adds up. */
+    _lock_init(&__arc4random_mutex);
+    _lock_init(&__at_quick_exit_mutex);
+    //_lock_init(&__dd_hash_mutex);
+    _lock_init(&__tz_mutex);
+
+    _lock_init_recursive(&__atexit_recursive_mutex);
+    _lock_init_recursive(&__env_recursive_mutex);
+    _lock_init_recursive(&__malloc_recursive_mutex);
+    _lock_init_recursive(&__sfp_recursive_mutex);
+    _lock_init_recursive(&__sinit_recursive_mutex);
+#else
+    /* Reuse one mutex and one recursive mutex for this set, reducing memory
+     * usage. Newlib will still allocate other locks dynamically and some of
+     * those need to be separate such as the file lock where a thread might
+     * block with them held. */
+    _lock_init(&__arc4random_mutex);
+    __at_quick_exit_mutex = __arc4random_mutex;
+    //__dd_hash_mutex = __arc4random_mutex;
+    __tz_mutex = __arc4random_mutex;
+
+    _lock_init_recursive(&__atexit_recursive_mutex);
+    __env_recursive_mutex  = __atexit_recursive_mutex;
+    __malloc_recursive_mutex = __atexit_recursive_mutex;
+    __sfp_recursive_mutex = __atexit_recursive_mutex;
+    __sinit_recursive_mutex = __atexit_recursive_mutex;
+#endif
+
+    locks_initialized = 1;
+}
+
+void _lock_init(_lock_t *lock) {
+    *lock = (_lock_t)xSemaphoreCreateMutex();
+}
+
+void _lock_init_recursive(_lock_t *lock) {
+    *lock = (_lock_t)xSemaphoreCreateRecursiveMutex();
+}
+
+void _lock_close(_lock_t *lock) {
+    vSemaphoreDelete((QueueHandle_t)*lock);
+    *lock = 0;
+}
+
+void _lock_close_recursive(_lock_t *lock) {
+    vSemaphoreDelete((QueueHandle_t)*lock);
+    *lock = 0;
+}
+
+void _lock_acquire(_lock_t *lock) {
+    xSemaphoreTake((QueueHandle_t)*lock, portMAX_DELAY);
+}
+
+void _lock_acquire_recursive(_lock_t *lock) {
+    if (locks_initialized) {
+        if (sdk_NMIIrqIsOn) {
+            uart_putc(0, ':');
+            return;
+        }
+        xSemaphoreTakeRecursive((QueueHandle_t)*lock, portMAX_DELAY);
+    }
+}
+
+int _lock_try_acquire(_lock_t *lock) {
+    return xSemaphoreTake((QueueHandle_t)*lock, 0);
+}
+
+int _lock_try_acquire_recursive(_lock_t *lock) {
+    return xSemaphoreTakeRecursive((QueueHandle_t)*lock, 0);
+}
+
+void _lock_release(_lock_t *lock) {
+    xSemaphoreGive((QueueHandle_t)*lock);
+}
+
+void _lock_release_recursive(_lock_t *lock) {
+    if (locks_initialized) {
+        if (sdk_NMIIrqIsOn) {
+            return;
+        }
+        xSemaphoreGiveRecursive((QueueHandle_t)*lock);
+    }
+}

core/phy_info.c

@@ -0,0 +1,161 @@
+/* Routines to allow custom access to the Internal Espressif
+   SDK PHY datastructures.
+
+   Matches espressif/phy_internal.h
+
+   Part of esp-open-rtos. Copyright (C) 2016 Angus Gratton,
+   BSD Licensed as described in the file LICENSE.
+ */
+#include <espressif/phy_info.h>
+#include <espressif/esp_common.h>
+#include <common_macros.h>
+#include <string.h>
+
+static const sdk_phy_info_t IROM default_phy_info = {
+    ._reserved00 = { 0x05, 0x00, 0x04, 0x02, 0x05 },
+    .version = 5,
+    ._reserved06 = { 0x05, 0x02, 0x05, 0x00, 0x04, 0x05, 0x05, 0x04,
+                     0x05, 0x05, 0x04,-0x02,-0x03,-0x01,-0x10,-0x10,
+                     -0x10,-0x20,-0x20, -0x20},
+    .spur_freq_primary = 225,
+    .spur_freq_divisor = 10,
+    .spur_freq_en_h = 0xFF,
+    .spur_freq_en_l = 0xFF,
+
+    ._reserved1e = { 0xf8, 0, 0xf8, 0xf8 },
+
+    .target_power = { 82, 78, 74, 68, 64, 56 },
+    .target_power_index_mcs = { 0, 0, 1, 1, 2, 3, 4, 5 },
+
+    .crystal_freq = CRYSTAL_FREQ_26M,
+
+    .sdio_config = SDIO_CONFIG_AUTO,
+
+    .bt_coexist_config = BT_COEXIST_CONFIG_NONE,
+    .bt_coexist_protocol = BT_COEXIST_PROTOCOL_WIFI_ONLY,
+
+    .dual_ant_config = DUAL_ANT_CONFIG_NONE,
+
+    ._reserved34 = 0x02,
+
+    .crystal_sleep = CRYSTAL_SLEEP_OFF,
+
+    .spur_freq_2_primary = 225,
+    .spur_freq_2_divisor = 10,
+    .spur_freq_2_en_h = 0x00,
+    .spur_freq_2_en_l = 0x00,
+    .spur_freq_cfg_msb = 0x00,
+    .spur_freq_2_cfg_msb = 0x00,
+    .spur_freq_3_cfg = 0x0000,
+    .spur_freq_4_cfg = 0x0000,
+
+    ._reserved4a = { 0x01, 0x93, 0x43, 0x00 },
+
+    .low_power_en = false,
+    .lp_atten_stage01 = LP_ATTEN_STAGE01_23DB,
+    .lp_atten_bb = 0,
+
+    .pwr_ind_11b_en = false,
+    .pwr_ind_11b_0 = 0,
+    .pwr_ind_11b_1 = 0,
+
+    /* Nominal 3.3V VCC. NOTE: This value is 0 in the
+       esp-open-rtos SDK default config sector, and may be unused
+       by that version of the SDK?
+    */
+    .pa_vdd = 33,
+
+    /* Note: untested with the esp-open-rtos SDK default config sector, may be unused? */
+    .freq_correct_mode = FREQ_CORRECT_DISABLE,
+    .force_freq_offset = 0,
+
+    /* Note: is zero with the esp-open-rtos SDK default config sector, may be unused? */
+    .rf_cal_mode = RF_CAL_MODE_SAVED,
+};
+
+void get_default_phy_info(sdk_phy_info_t *info) __attribute__((weak, alias("get_sdk_default_phy_info")));
+
+void get_sdk_default_phy_info(sdk_phy_info_t *info)
+{
+    memcpy(info, &default_phy_info, sizeof(sdk_phy_info_t));
+}
+
+void read_saved_phy_info(sdk_phy_info_t *info)
+{
+    sdk_spi_flash_read(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)info, sizeof(sdk_phy_info_t));
+}
+
+void write_saved_phy_info(const sdk_phy_info_t *info)
+{
+    sdk_spi_flash_write(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)info, sizeof(sdk_phy_info_t));
+}
+
+void dump_phy_info(const sdk_phy_info_t *info, bool raw)
+{
+    printf("version=%d\n", info->version);
+    printf("spur_freq = %.3f (%d/%d)\n",
+           (float)info->spur_freq_primary / info->spur_freq_divisor,
+           info->spur_freq_primary,
+           info->spur_freq_divisor);
+    printf("spur_freq_en = 0x%02x 0x%02x\n", info->spur_freq_en_h,
+           info->spur_freq_en_l);
+    printf("target_power\n");
+    for(int i = 0; i < 6; i++) {
+        printf("  %d: %.2fdB (raw 0x%02x)\n", i,
+               info->target_power[i]/4.0,
+               info->target_power[i]);
+    }
+    printf("target_power_index_mcs:");
+    for(int i = 0; i < 8; i++) {
+        printf(" %d%c", info->target_power_index_mcs[i],
+               i == 7 ? '\n' : ',');
+    }
+
+    printf("crystal_freq: %s (raw %d)\n",
+           (info->crystal_freq == CRYSTAL_FREQ_40M ? "40MHz" :
+            (info->crystal_freq == CRYSTAL_FREQ_26M ? "26MHz" :
+             (info->crystal_freq == CRYSTAL_FREQ_24M ? "24MHz" : "???"))),
+           info->crystal_freq);
+
+    printf("sdio_config: %d\n", info->sdio_config);
+    printf("bt_coexist config: %d protocol: 0x%02x\n",
+           info->bt_coexist_config, info->bt_coexist_protocol);
+    printf("dual_ant_config: %d\n", info->dual_ant_config);
+
+    printf("crystal_sleep: %d\n", info->crystal_sleep);
+
+    printf("spur_freq_2 = %.3f (%d/%d)\n",
+           (float)info->spur_freq_2_primary / info->spur_freq_2_divisor,
+           info->spur_freq_2_primary,
+           info->spur_freq_2_divisor);
+    printf("spur_freq_2_en = 0x%02x 0x%02x\n", info->spur_freq_2_en_h,
+           info->spur_freq_2_en_l);
+
+    printf("spur_freq_cfg_msb = 0x%02x\n", info->spur_freq_cfg_msb);
+    printf("spur_freq_2_)cfg_msb = 0x%02x\n", info->spur_freq_2_cfg_msb);
+    printf("spur_freq_3_cfg = 0x%04x\n", info->spur_freq_3_cfg);
+    printf("spur_freq_4_cfg = 0x%04x\n", info->spur_freq_4_cfg);
+
+    printf("low_power_en = %d\n", info->low_power_en);
+    printf("lp_atten_stage01 = 0x%02x\n", info->lp_atten_stage01);
+    printf("lp_atten_bb = %.2f (raw 0x%02x)\n", info->lp_atten_bb / 4.0,
+           info->lp_atten_bb);
+
+    printf("pa_vdd = %d\n", info->pa_vdd);
+
+    printf("freq_correct_mode = 0x%02x\n", info->freq_correct_mode);
+    printf("force_freq_offset = %d\n", info->force_freq_offset);
+    printf("rf_cal_mode = 0x%02x\n", info->rf_cal_mode);
+
+    if(raw) {
+        printf("Raw values:");
+        uint8_t *p = (uint8_t *)info;
+        for(int i = 0; i < sizeof(sdk_phy_info_t); i ++) {
+            if(i % 8 == 0) {
+                printf("\n0x%02x:", i);
+            }
+            printf(" %02x", p[i]);
+        }
+        printf("\n\n");
+    }
+}

core/spiflash-cache-enable.S

@@ -12,8 +12,6 @@
  * Copyright (C) 2015 Superhouse Automation Pty Ltd
  * BSD Licensed as described in the file LICENSE
 */
-#ifdef OTA
-
 #define RBOOT_CONFIG_BASE (0x40200000 + 0x1000)
 #define RBOOT_ROMS_OFFS 0x8 /* offset of rboot_config_t.roms array in config */
 
@@ -74,5 +72,3 @@ Cache_Read_Enable:
 	movi a0, cache_return_save /* restore a0 return address */
 	l32i a0, a0, 0
 	ret.n
-
-#endif

core/spiflash.c

@@ -0,0 +1,259 @@
+/**
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 sheinz (https://github.com/sheinz)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "include/spiflash.h"
+
+#include "include/flashchip.h"
+#include "include/esp/rom.h"
+#include "include/esp/spi_regs.h"
+
+#include <FreeRTOS.h>
+#include <string.h>
+
+/**
+ * Note about Wait_SPI_Idle.
+ *
+ * Each write/erase flash operation sets BUSY bit in flash status register.
+ * If attempt to access flash while BUSY bit is set operation will fail.
+ * Function Wait_SPI_Idle loops until this bit is not cleared.
+ *
+ * The approach in the following code is that each write function that is
+ * accessible from the outside should leave flash in Idle state.
+ * The read operations doesn't set BUSY bit in a flash. So they do not wait.
+ * They relay that previous operation is completely finished.
+ *
+ * This approach is different from ESP8266 bootrom where Wait_SPI_Idle is
+ * called where it needed and not.
+ */
+
+#define SPI_WRITE_MAX_SIZE  64
+
+// 64 bytes read causes hang
+// http://bbs.espressif.com/viewtopic.php?f=6&t=2439
+#define SPI_READ_MAX_SIZE   60
+
+
+/**
+ * Low level SPI flash write. Write block of data up to 64 bytes.
+ */
+static inline void IRAM spi_write_data(sdk_flashchip_t *chip, uint32_t addr,
+        uint8_t *buf, uint32_t size)
+{
+    uint32_t words = size >> 2;
+    if (size & 0b11) {
+        words++;
+    }
+
+    Wait_SPI_Idle(chip);  // wait for previous write to finish
+
+    SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
+
+    memcpy((void*)SPI(0).W, buf, words<<2);
+
+    __asm__ volatile("memw");
+
+    SPI_write_enable(chip);
+
+    SPI(0).CMD = SPI_CMD_PP;
+    while (SPI(0).CMD) {}
+}
+
+/**
+ * Write a page of flash. Data block should not cross page boundary.
+ */
+static bool IRAM spi_write_page(sdk_flashchip_t *flashchip, uint32_t dest_addr,
+    uint8_t *buf, uint32_t size)
+{
+    // check if block to write doesn't cross page boundary
+    if (flashchip->page_size < size + (dest_addr % flashchip->page_size)) {
+        return false;
+    }
+
+    if (size < 1) {
+        return true;
+    }
+
+    while (size >= SPI_WRITE_MAX_SIZE) {
+        spi_write_data(flashchip, dest_addr, buf, SPI_WRITE_MAX_SIZE);
+
+        size -= SPI_WRITE_MAX_SIZE;
+        dest_addr += SPI_WRITE_MAX_SIZE;
+        buf += SPI_WRITE_MAX_SIZE;
+
+        if (size < 1) {
+            return true;
+        }
+    }
+
+    spi_write_data(flashchip, dest_addr, buf, size);
+
+    return true;
+}
+
+/**
+ * Split block of data into pages and write pages.
+ */
+static bool IRAM spi_write(uint32_t addr, uint8_t *dst, uint32_t size)
+{
+    if (sdk_flashchip.chip_size < (addr + size)) {
+        return false;
+    }
+
+    uint32_t write_bytes_to_page = sdk_flashchip.page_size -
+        (addr % sdk_flashchip.page_size);  // TODO: place for optimization
+
+    if (size < write_bytes_to_page) {
+        if (!spi_write_page(&sdk_flashchip, addr, dst, size)) {
+            return false;
+        }
+    } else {
+        if (!spi_write_page(&sdk_flashchip, addr, dst, write_bytes_to_page)) {
+            return false;
+        }
+
+        uint32_t offset = write_bytes_to_page;
+        uint32_t pages_to_write = (size - offset) / sdk_flashchip.page_size;
+        for (uint32_t i = 0; i < pages_to_write; i++) {
+            if (!spi_write_page(&sdk_flashchip, addr + offset,
+                        dst + offset, sdk_flashchip.page_size)) {
+                return false;
+            }
+            offset += sdk_flashchip.page_size;
+        }
+
+        if (!spi_write_page(&sdk_flashchip, addr + offset,
+                    dst + offset, size - offset)) {
+            return false;
+        }
+    }
+
+    return true;
+}
+
+bool IRAM spiflash_write(uint32_t addr, uint8_t *buf, uint32_t size)
+{
+    bool result = false;
+
+    if (buf) {
+        vPortEnterCritical();
+        Cache_Read_Disable();
+
+        result = spi_write(addr, buf, size);
+
+        // make sure all write operations is finished before exiting
+        Wait_SPI_Idle(&sdk_flashchip);
+
+        Cache_Read_Enable(0, 0, 1);
+        vPortExitCritical();
+    }
+
+    return result;
+}
+
+/**
+ * Read SPI flash up to 64 bytes.
+ */
+static inline void IRAM read_block(sdk_flashchip_t *chip, uint32_t addr,
+        uint8_t *buf, uint32_t size)
+{
+    SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
+    SPI(0).CMD = SPI_CMD_READ;
+
+    while (SPI(0).CMD) {};
+
+    __asm__ volatile("memw");
+
+    memcpy(buf, (const void*)SPI(0).W, size);
+}
+
+/**
+ * Read SPI flash data. Data region doesn't need to be page aligned.
+ */
+static inline bool IRAM read_data(sdk_flashchip_t *flashchip, uint32_t addr,
+        uint8_t *dst, uint32_t size)
+{
+    if (size < 1) {
+        return true;
+    }
+
+    if ((addr + size) > flashchip->chip_size) {
+        return false;
+    }
+
+    while (size >= SPI_READ_MAX_SIZE) {
+        read_block(flashchip, addr, dst, SPI_READ_MAX_SIZE);
+        dst += SPI_READ_MAX_SIZE;
+        size -= SPI_READ_MAX_SIZE;
+        addr += SPI_READ_MAX_SIZE;
+    }
+
+    if (size > 0) {
+        read_block(flashchip, addr, dst, size);
+    }
+
+    return true;
+}
+
+bool IRAM spiflash_read(uint32_t dest_addr, uint8_t *buf, uint32_t size)
+{
+    bool result = false;
+
+    if (buf) {
+        vPortEnterCritical();
+        Cache_Read_Disable();
+
+        result = read_data(&sdk_flashchip, dest_addr, buf, size);
+
+        Cache_Read_Enable(0, 0, 1);
+        vPortExitCritical();
+    }
+
+    return result;
+}
+
+bool IRAM spiflash_erase_sector(uint32_t addr)
+{
+    if ((addr + sdk_flashchip.sector_size) > sdk_flashchip.chip_size) {
+        return false;
+    }
+
+    if (addr & 0xFFF) {
+        return false;
+    }
+
+    vPortEnterCritical();
+    Cache_Read_Disable();
+
+    SPI_write_enable(&sdk_flashchip);
+
+    SPI(0).ADDR = addr & 0x00FFFFFF;
+    SPI(0).CMD = SPI_CMD_SE;
+    while (SPI(0).CMD) {};
+
+    Wait_SPI_Idle(&sdk_flashchip);
+
+    Cache_Read_Enable(0, 0, 1);
+    vPortExitCritical();
+
+    return true;
+}

examples/Makefile

@@ -2,6 +2,7 @@ EXAMPLES = $(shell find $(dir $(lastword $(MAKEFILE_LIST))) -mindepth 2 -name Ma
 # Generate some dummy .dummybuild/.dummyrebuild target files
 EXAMPLES_BUILD = $(patsubst %,%.dummybuild,$(EXAMPLES))
 EXAMPLES_REBUILD = $(patsubst %,%.dummyrebuild,$(EXAMPLES))
+EXAMPLES_CLEAN = $(patsubst %,%.dummyclean,$(EXAMPLES))
 
 warning:
 	@echo "******************************************************"
@@ -21,12 +22,17 @@ build-examples: $(EXAMPLES_BUILD)
 
 rebuild-examples: $(EXAMPLES_REBUILD)
 
+clean-examples: $(EXAMPLES_CLEAN)
+
 %.dummybuild:
 	$(MAKE) -C $(dir $@)
 
 %.dummyrebuild:
 	$(MAKE) -C $(dir $@) rebuild
 
-.PHONY: warning rebuild-examples build-examples
+%.dummyclean:
+	$(MAKE) -C $(dir $@) clean
+
+.PHONY: warning rebuild-examples build-examples clean-examples
 .NOTPARALLEL:
 .ONESHELL:

examples/access_point/Makefile

@@ -0,0 +1,5 @@
+# Makefile for access_point example
+PROGRAM=access_point
+EXTRA_COMPONENTS=extras/dhcpserver
+
+include ../../common.mk

examples/access_point/access_point.c

@@ -0,0 +1,90 @@
+/**
+ * Very basic example showing usage of access point mode and the DHCP server.
+ * The ESP in the example runs a telnet server on 172.16.0.1 (port 23) that
+ * outputs some status information if you connect to it, then closes
+ * the connection.
+ *
+ * This example code is in the public domain.
+ */
+#include <string.h>
+
+#include <espressif/esp_common.h>
+#include <esp/uart.h>
+#include <FreeRTOS.h>
+#include <task.h>
+#include <queue.h>
+#include <dhcpserver.h>
+
+#include <lwip/api.h>
+
+#define AP_SSID "esp-open-rtos AP"
+#define AP_PSK "esp-open-rtos"
+
+#define TELNET_PORT 23
+
+static void telnetTask(void *pvParameters);
+
+void user_init(void)
+{
+    uart_set_baud(0, 115200);
+    printf("SDK version:%s\n", sdk_system_get_sdk_version());
+
+    sdk_wifi_set_opmode(SOFTAP_MODE);
+    struct ip_info ap_ip;
+    IP4_ADDR(&ap_ip.ip, 172, 16, 0, 1);
+    IP4_ADDR(&ap_ip.gw, 0, 0, 0, 0);
+    IP4_ADDR(&ap_ip.netmask, 255, 255, 0, 0);
+    sdk_wifi_set_ip_info(1, &ap_ip);
+
+    struct sdk_softap_config ap_config = { .ssid = AP_SSID, .ssid_hidden = 0, .channel = 3, .ssid_len = strlen(AP_SSID), .authmode =
+            AUTH_WPA_WPA2_PSK, .password = AP_PSK, .max_connection = 3, .beacon_interval = 100, };
+    sdk_wifi_softap_set_config(&ap_config);
+
+    xTaskCreate(telnetTask, "telnetTask", 512, NULL, 2, NULL);
+}
+
+/* Telnet task listens on port 23, returns some status information and then closes
+ the connection if you connect to it.
+ */
+static void telnetTask(void *pvParameters)
+{
+    ip_addr_t first_client_ip;
+    IP4_ADDR(&first_client_ip, 172, 16, 0, 2);
+    dhcpserver_start(&first_client_ip, 4);
+
+    struct netconn *nc = netconn_new(NETCONN_TCP);
+    if (!nc)
+    {
+        printf("Status monitor: Failed to allocate socket.\r\n");
+        return;
+    }
+    netconn_bind(nc, IP_ANY_TYPE, TELNET_PORT);
+    netconn_listen(nc);
+
+    while (1)
+    {
+        struct netconn *client = NULL;
+        err_t err = netconn_accept(nc, &client);
+
+        if (err != ERR_OK)
+        {
+            if (client)
+                netconn_delete(client);
+            continue;
+        }
+
+        ip_addr_t client_addr;
+        uint16_t port_ignore;
+        netconn_peer(client, &client_addr, &port_ignore);
+
+        char buf[80];
+        snprintf(buf, sizeof(buf), "Uptime %d seconds\r\n", xTaskGetTickCount() * portTICK_PERIOD_MS / 1000);
+        netconn_write(client, buf, strlen(buf), NETCONN_COPY);
+        snprintf(buf, sizeof(buf), "Free heap %d bytes\r\n", (int) xPortGetFreeHeapSize());
+        netconn_write(client, buf, strlen(buf), NETCONN_COPY);
+        char abuf[40];
+        snprintf(buf, sizeof(buf), "Your address is %s\r\n\r\n", ipaddr_ntoa_r(&client_addr, abuf, sizeof(abuf)));
+        netconn_write(client, buf, strlen(buf), NETCONN_COPY);
+        netconn_delete(client);
+    }
+}

examples/ad770x/Makefile

@@ -0,0 +1,4 @@
+PROGRAM = ad770x
+EXTRA_COMPONENTS = extras/ad770x
+#ESPBAUD = 460800
+include ../../common.mk

examples/ad770x/main.c

@@ -0,0 +1,49 @@
+/*
+ * Example of using AD7705/AD7706 driver
+ *
+ * Part of esp-open-rtos
+ * Copyright (C) 2017 Ruslan V. Uss <unclerus@gmail.com>
+ * BSD Licensed as described in the file LICENSE
+ */
+#include <esp/uart.h>
+#include <espressif/esp_common.h>
+#include <stdio.h>
+#include <ad770x/ad770x.h>
+#include <FreeRTOS.h>
+#include <task.h>
+
+#define CS_PIN 2
+#define AIN_CHANNEL 0 // AIN1+,AIN1- for AD7705
+
+static const ad770x_params_t dev = {
+    .cs_pin = CS_PIN,
+    .master_clock = AD770X_MCLK_4_9152MHz, // 4.9152 MHz
+    .bipolar = false,                      // Unipolar mode
+    .gain = AD770X_GAIN_1,                 // No gain
+    .update_rate = AD770X_RATE_50          // 50 Hz output update rate
+};
+
+void user_init(void)
+{
+    uart_set_baud(0, 115200);
+    printf("SDK version:%s\n", sdk_system_get_sdk_version());
+
+    while (ad770x_init(&dev, AIN_CHANNEL) != 0)
+    {
+        printf("Cannot initialize AD7705\n");
+        vTaskDelay(500 / portTICK_PERIOD_MS);
+    }
+
+    while (true)
+    {
+        // wait for data
+        while (!ad770x_data_ready(&dev, AIN_CHANNEL)) {}
+
+        // Read result
+        uint16_t raw = ad770x_raw_adc_value(&dev, AIN_CHANNEL);
+
+        printf("Raw ADC value: %d\n", raw);
+
+        vTaskDelay(500 / portTICK_PERIOD_MS);
+    }
+}

examples/ads1115_test/Makefile

@@ -0,0 +1,4 @@
+PROGRAM = ads1115_test
+EXTRA_COMPONENTS = extras/i2c extras/ads111x
+#ESPBAUD = 460800
+include ../../common.mk

examples/ads1115_test/main.c

@@ -0,0 +1,60 @@
+/*
+ * Example of using DS1302 RTC driver
+ *
+ * Part of esp-open-rtos
+ * Copyright (C) 2016 Ruslan V. Uss <unclerus@gmail.com>
+ *                    Pavel Merzlyakov <merzlyakovpavel@gmail.com>
+ * BSD Licensed as described in the file LICENSE
+ */
+#include <esp/uart.h>
+#include <espressif/esp_common.h>
+#include <stdio.h>
+#include <i2c/i2c.h>
+#include <ads111x/ads111x.h>
+#include <FreeRTOS.h>
+#include <task.h>
+
+// Connect ADDR pin to GND
+#define ADDR ADS111X_ADDR_GND
+
+#define I2C_BUS 0
+#define SCL_PIN 5
+#define SDA_PIN 4
+
+// +-4.096V
+#define GAIN ADS111X_GAIN_4V096
+
+void user_init(void)
+{
+    uart_set_baud(0, 115200);
+    printf("SDK version:%s\n", sdk_system_get_sdk_version());
+
+    i2c_dev_t dev = {
+        .addr = ADDR,
+        .bus = I2C_BUS,
+    };
+    i2c_init(I2C_BUS, SCL_PIN, SDA_PIN, I2C_FREQ_100K);
+
+    ads111x_set_mode(&dev, ADS111X_MODE_CONTUNOUS);
+    ads111x_set_data_rate(&dev, ADS111X_DATA_RATE_32);
+
+    ads111x_set_input_mux(&dev, ADS111X_MUX_0_GND);
+    ads111x_set_gain(&dev, GAIN);
+
+    float gain_val = ads111x_gain_values[GAIN];
+
+    while (true)
+    {
+        // wait for conversion end
+        while (ads111x_busy(&dev)) {}
+
+        // Read result
+        int16_t raw = ads111x_get_value(&dev);
+
+        float voltage = gain_val / ADS111X_MAX_VALUE * raw;
+
+        printf("Raw ADC value: %d, voltage: %.04f volts\n", raw, voltage);
+
+        vTaskDelay(500 / portTICK_PERIOD_MS);
+    }
+}

examples/aws_iot/Makefile

@@ -0,0 +1,3 @@
+PROGRAM=aws_iot
+EXTRA_COMPONENTS = extras/paho_mqtt_c extras/mbedtls
+include ../../common.mk

examples/aws_iot/README.md

@@ -0,0 +1,60 @@
+Please follow the steps below to build and run the example on your ESP8266.
+
+1. Modify client_config.c to provide your own account-specific AWS IoT
+ endpoint, ECC-based client certificate, and private key.
+
+ Your endpoint is in the form of ```<prefix>.iot.<region>.amazonaws.com```.
+ It can be retrieved using the following command:
+
+ ```sh
+ $ aws iot describe-endpoint
+ ```
+
+ Your ECC-based certificate and private key can be generated by using 
+ the following commands:
+
+ ```sh
+ $ openssl ecparam -out ecckey.key -name prime256v1 -genkey
+ $ openssl req -new -sha256 -key ecckey.key -nodes -out eccCsr.csr
+ $ aws iot create-certificate-from-csr --certificate-signing-request file://eccCsr.csr --certificate-pem-outfile eccCert.crt --set-as-active
+ ```
+
+ To convert the certificate or key file into C string, you could try
+ the following example:
+
+ ```sh
+ $ cat ecckey.key | sed -e 's/^/"/g' | sed -e 's/$/\\r\\n"/g'
+ ```
+
+ *Note, more information about using ECC-based certificate with AWS IoT
+ can be found in the following blog*
+
+ https://aws.amazon.com/blogs/iot/elliptic-curve-cryptography-and-forward-secrecy-support-in-aws-iot-3/
+
+2. Create and attach AWS IoT access policy to the certificate
+
+ ```sh
+ $ aws iot create-policy --policy-name test-thing-policy --policy-document '{ "Version": "2012-10-17", "Statement": [{"Action": ["iot:*"], "Resource": ["*"], "Effect": "Allow" }] }'
+ $ aws iot attach-principal-policy --policy-name test-thing-policy --principal "arn:aws:iot:eu-west-1:892804553548:cert/2d9c2da32a95b5e95a277c3b8f7af40869727f5259dc2e907fc8aba916c857e"
+ ```
+
+ *Note, the 'principal' argument is the certificate ARN generated from the
+ pervious command 'aws iot create-certificate-from-csr'.*
+
+3. Modify include/ssid_config.h with your Wifi access Id and credential.
+
+4. Build and flash the example firmware to the device using the command
+ below:
+
+ ```sh
+ $ make flash -C examples/aws_iot ESPPORT=/dev/ttyUSB0
+ ```
+
+ *Note, it assumes your ESP8266 is connected through USB and exposed under
+ your Linux host as /dev/ttyUSB0.*
+
+5. Once the ESP8266 is connected to AWS IoT, you can use the MQTT client
+ on the AWS IoT console to receive the messages published by the ESP8266
+ to topic 'esp8266/status'. You could also publish 'on' or 'off' message
+ to topic 'esp8266/control' to toggle the GPIO/LED (GPIO2 is used by the
+ example).

examples/aws_iot/aws_iot.c

@@ -0,0 +1,280 @@
+/*
+ * Derived from examples/mqtt_client/mqtt_client.c - added TLS1.2 support and some minor modifications.
+ */
+#include "espressif/esp_common.h"
+#include "esp/uart.h"
+
+#include <string.h>
+
+#include <FreeRTOS.h>
+#include <task.h>
+#include <queue.h>
+#include <ssid_config.h>
+
+#include <espressif/esp_sta.h>
+#include <espressif/esp_wifi.h>
+
+#include <paho_mqtt_c/MQTTESP8266.h>
+#include <paho_mqtt_c/MQTTClient.h>
+
+// this must be ahead of any mbedtls header files so the local mbedtls/config.h can be properly referenced
+#include "ssl_connection.h"
+
+#define MQTT_PUB_TOPIC "esp8266/status"
+#define MQTT_SUB_TOPIC "esp8266/control"
+#define GPIO_LED 2
+#define MQTT_PORT 8883
+
+/* certs, key, and endpoint */
+extern char *ca_cert, *client_endpoint, *client_cert, *client_key;
+
+static int wifi_alive = 0;
+static int ssl_reset;
+static SSLConnection *ssl_conn;
+static QueueHandle_t publish_queue;
+
+static void beat_task(void *pvParameters) {
+    char msg[16];
+    int count = 0;
+
+    while (1) {
+        if (!wifi_alive) {
+            vTaskDelay(1000 / portTICK_PERIOD_MS);
+            continue;
+        }
+
+        printf("Schedule to publish\r\n");
+
+        snprintf(msg, sizeof(msg), "%d", count);
+        if (xQueueSend(publish_queue, (void *) msg, 0) == pdFALSE) {
+            printf("Publish queue overflow\r\n");
+        }
+
+        vTaskDelay(10000 / portTICK_PERIOD_MS);
+    }
+}
+
+static void topic_received(mqtt_message_data_t *md) {
+    mqtt_message_t *message = md->message;
+    int i;
+
+    printf("Received: ");
+    for (i = 0; i < md->topic->lenstring.len; ++i)
+        printf("%c", md->topic->lenstring.data[i]);
+
+    printf(" = ");
+    for (i = 0; i < (int) message->payloadlen; ++i)
+        printf("%c", ((char *) (message->payload))[i]);
+    printf("\r\n");
+
+    if (!strncmp(message->payload, "on", 2)) {
+        printf("Turning on LED\r\n");
+        gpio_write(GPIO_LED, 0);
+    } else if (!strncmp(message->payload, "off", 3)) {
+        printf("Turning off LED\r\n");
+        gpio_write(GPIO_LED, 1);
+    }
+}
+
+static const char *get_my_id(void) {
+    // Use MAC address for Station as unique ID
+    static char my_id[13];
+    static bool my_id_done = false;
+    int8_t i;
+    uint8_t x;
+    if (my_id_done)
+        return my_id;
+    if (!sdk_wifi_get_macaddr(STATION_IF, (uint8_t *) my_id))
+        return NULL;
+    for (i = 5; i >= 0; --i) {
+        x = my_id[i] & 0x0F;
+        if (x > 9)
+            x += 7;
+        my_id[i * 2 + 1] = x + '0';
+        x = my_id[i] >> 4;
+        if (x > 9)
+            x += 7;
+        my_id[i * 2] = x + '0';
+    }
+    my_id[12] = '\0';
+    my_id_done = true;
+    return my_id;
+}
+
+static int mqtt_ssl_read(mqtt_network_t * n, unsigned char* buffer, int len,
+        int timeout_ms) {
+    int r = ssl_read(ssl_conn, buffer, len, timeout_ms);
+    if (r <= 0
+            && (r != MBEDTLS_ERR_SSL_WANT_READ
+                    && r != MBEDTLS_ERR_SSL_WANT_WRITE
+                    && r != MBEDTLS_ERR_SSL_TIMEOUT)) {
+        printf("%s: TLS read error (%d), resetting\n\r", __func__, r);
+        ssl_reset = 1;
+    };
+    return r;
+}
+
+static int mqtt_ssl_write(mqtt_network_t* n, unsigned char* buffer, int len,
+        int timeout_ms) {
+    int r = ssl_write(ssl_conn, buffer, len, timeout_ms);
+    if (r <= 0
+            && (r != MBEDTLS_ERR_SSL_WANT_READ
+                    && r != MBEDTLS_ERR_SSL_WANT_WRITE)) {
+        printf("%s: TLS write error (%d), resetting\n\r", __func__, r);
+        ssl_reset = 1;
+    }
+    return r;
+}
+
+static void mqtt_task(void *pvParameters) {
+    int ret = 0;
+    struct mqtt_network network;
+    mqtt_client_t client = mqtt_client_default;
+    char mqtt_client_id[20];
+    uint8_t mqtt_buf[100];
+    uint8_t mqtt_readbuf[100];
+    mqtt_packet_connect_data_t data = mqtt_packet_connect_data_initializer;
+
+    memset(mqtt_client_id, 0, sizeof(mqtt_client_id));
+    strcpy(mqtt_client_id, "ESP-");
+    strcat(mqtt_client_id, get_my_id());
+
+    ssl_conn = (SSLConnection *) malloc(sizeof(SSLConnection));
+    while (1) {
+        if (!wifi_alive) {
+            vTaskDelay(1000 / portTICK_PERIOD_MS);
+            continue;
+        }
+
+        printf("%s: started\n\r", __func__);
+        ssl_reset = 0;
+        ssl_init(ssl_conn);
+        ssl_conn->ca_cert_str = ca_cert;
+        ssl_conn->client_cert_str = client_cert;
+        ssl_conn->client_key_str = client_key;
+
+        mqtt_network_new(&network);
+        network.mqttread = mqtt_ssl_read;
+        network.mqttwrite = mqtt_ssl_write;
+
+        printf("%s: connecting to MQTT server %s ... ", __func__,
+                client_endpoint);
+        ret = ssl_connect(ssl_conn, client_endpoint, MQTT_PORT);
+
+        if (ret) {
+            printf("error: %d\n\r", ret);
+            ssl_destroy(ssl_conn);
+            continue;
+        }
+        printf("done\n\r");
+        mqtt_client_new(&client, &network, 5000, mqtt_buf, 100, mqtt_readbuf,
+                100);
+
+        data.willFlag = 0;
+        data.MQTTVersion = 4;
+        data.cleansession = 1;
+        data.clientID.cstring = mqtt_client_id;
+        data.username.cstring = NULL;
+        data.password.cstring = NULL;
+        data.keepAliveInterval = 1000;
+        printf("Send MQTT connect ... ");
+        ret = mqtt_connect(&client, &data);
+        if (ret) {
+            printf("error: %d\n\r", ret);
+            ssl_destroy(ssl_conn);
+            continue;
+        }
+        printf("done\r\n");
+        mqtt_subscribe(&client, MQTT_SUB_TOPIC, MQTT_QOS1, topic_received);
+        xQueueReset(publish_queue);
+
+        while (wifi_alive && !ssl_reset) {
+            char msg[64];
+            while (xQueueReceive(publish_queue, (void *) msg, 0) == pdTRUE) {
+                TickType_t task_tick = xTaskGetTickCount();
+                uint32_t free_heap = xPortGetFreeHeapSize();
+                uint32_t free_stack = uxTaskGetStackHighWaterMark(NULL);
+                snprintf(msg, sizeof(msg), "%u: free heap %u, free stack %u",
+                        task_tick, free_heap, free_stack * 4);
+                printf("Publishing: %s\r\n", msg);
+
+                mqtt_message_t message;
+                message.payload = msg;
+                message.payloadlen = strlen(msg);
+                message.dup = 0;
+                message.qos = MQTT_QOS1;
+                message.retained = 0;
+                ret = mqtt_publish(&client, MQTT_PUB_TOPIC, &message);
+                if (ret != MQTT_SUCCESS) {
+                    printf("error while publishing message: %d\n", ret);
+                    break;
+                }
+            }
+
+            ret = mqtt_yield(&client, 1000);
+            if (ret == MQTT_DISCONNECTED)
+                break;
+        }
+        printf("Connection dropped, request restart\n\r");
+        ssl_destroy(ssl_conn);
+    }
+}
+
+static void wifi_task(void *pvParameters) {
+    uint8_t status = 0;
+    uint8_t retries = 30;
+    struct sdk_station_config config = { .ssid = WIFI_SSID, .password =
+            WIFI_PASS, };
+
+    printf("%s: Connecting to WiFi\n\r", __func__);
+    sdk_wifi_set_opmode (STATION_MODE);
+    sdk_wifi_station_set_config(&config);
+
+    while (1) {
+        wifi_alive = 0;
+
+        while ((status != STATION_GOT_IP) && (retries)) {
+            status = sdk_wifi_station_get_connect_status();
+            printf("%s: status = %d\n\r", __func__, status);
+            if (status == STATION_WRONG_PASSWORD) {
+                printf("WiFi: wrong password\n\r");
+                break;
+            } else if (status == STATION_NO_AP_FOUND) {
+                printf("WiFi: AP not found\n\r");
+                break;
+            } else if (status == STATION_CONNECT_FAIL) {
+                printf("WiFi: connection failed\r\n");
+                break;
+            }
+            vTaskDelay(1000 / portTICK_PERIOD_MS);
+            --retries;
+        }
+
+        while ((status = sdk_wifi_station_get_connect_status())
+                == STATION_GOT_IP) {
+            if (wifi_alive == 0) {
+                printf("WiFi: Connected\n\r");
+                wifi_alive = 1;
+            }
+            vTaskDelay(500 / portTICK_PERIOD_MS);
+        }
+
+        wifi_alive = 0;
+        printf("WiFi: disconnected\n\r");
+        vTaskDelay(1000 / portTICK_PERIOD_MS);
+    }
+}
+
+void user_init(void) {
+    uart_set_baud(0, 115200);
+    printf("SDK version: %s, free heap %u\n", sdk_system_get_sdk_version(),
+            xPortGetFreeHeapSize());
+
+    gpio_enable(GPIO_LED, GPIO_OUTPUT);
+    gpio_write(GPIO_LED, 1);
+
+    publish_queue = xQueueCreate(3, 16);
+    xTaskCreate(&wifi_task, "wifi_task", 256, NULL, 2, NULL);
+    xTaskCreate(&beat_task, "beat_task", 256, NULL, 2, NULL);
+    xTaskCreate(&mqtt_task, "mqtt_task", 2048, NULL, 2, NULL);
+}

examples/aws_iot/ca_cert.c

@@ -0,0 +1,29 @@
+// trusted root CA certificate - https://www.symantec.com/content/en/us/enterprise/verisign/roots/VeriSign-Class%203-Public-Primary-Certification-Authority-G5.pem
+const char *ca_cert = "-----BEGIN CERTIFICATE-----\r\n"
+        "MIIE0zCCA7ugAwIBAgIQGNrRniZ96LtKIVjNzGs7SjANBgkqhkiG9w0BAQUFADCB\r\n"
+        "yjELMAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQL\r\n"
+        "ExZWZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNiBWZXJp\r\n"
+        "U2lnbiwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxW\r\n"
+        "ZXJpU2lnbiBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0\r\n"
+        "aG9yaXR5IC0gRzUwHhcNMDYxMTA4MDAwMDAwWhcNMzYwNzE2MjM1OTU5WjCByjEL\r\n"
+        "MAkGA1UEBhMCVVMxFzAVBgNVBAoTDlZlcmlTaWduLCBJbmMuMR8wHQYDVQQLExZW\r\n"
+        "ZXJpU2lnbiBUcnVzdCBOZXR3b3JrMTowOAYDVQQLEzEoYykgMjAwNiBWZXJpU2ln\r\n"
+        "biwgSW5jLiAtIEZvciBhdXRob3JpemVkIHVzZSBvbmx5MUUwQwYDVQQDEzxWZXJp\r\n"
+        "U2lnbiBDbGFzcyAzIFB1YmxpYyBQcmltYXJ5IENlcnRpZmljYXRpb24gQXV0aG9y\r\n"
+        "aXR5IC0gRzUwggEiMA0GCSqGSIb3DQEBAQUAA4IBDwAwggEKAoIBAQCvJAgIKXo1\r\n"
+        "nmAMqudLO07cfLw8RRy7K+D+KQL5VwijZIUVJ/XxrcgxiV0i6CqqpkKzj/i5Vbex\r\n"
+        "t0uz/o9+B1fs70PbZmIVYc9gDaTY3vjgw2IIPVQT60nKWVSFJuUrjxuf6/WhkcIz\r\n"
+        "SdhDY2pSS9KP6HBRTdGJaXvHcPaz3BJ023tdS1bTlr8Vd6Gw9KIl8q8ckmcY5fQG\r\n"
+        "BO+QueQA5N06tRn/Arr0PO7gi+s3i+z016zy9vA9r911kTMZHRxAy3QkGSGT2RT+\r\n"
+        "rCpSx4/VBEnkjWNHiDxpg8v+R70rfk/Fla4OndTRQ8Bnc+MUCH7lP59zuDMKz10/\r\n"
+        "NIeWiu5T6CUVAgMBAAGjgbIwga8wDwYDVR0TAQH/BAUwAwEB/zAOBgNVHQ8BAf8E\r\n"
+        "BAMCAQYwbQYIKwYBBQUHAQwEYTBfoV2gWzBZMFcwVRYJaW1hZ2UvZ2lmMCEwHzAH\r\n"
+        "BgUrDgMCGgQUj+XTGoasjY5rw8+AatRIGCx7GS4wJRYjaHR0cDovL2xvZ28udmVy\r\n"
+        "aXNpZ24uY29tL3ZzbG9nby5naWYwHQYDVR0OBBYEFH/TZafC3ey78DAJ80M5+gKv\r\n"
+        "MzEzMA0GCSqGSIb3DQEBBQUAA4IBAQCTJEowX2LP2BqYLz3q3JktvXf2pXkiOOzE\r\n"
+        "p6B4Eq1iDkVwZMXnl2YtmAl+X6/WzChl8gGqCBpH3vn5fJJaCGkgDdk+bW48DW7Y\r\n"
+        "5gaRQBi5+MHt39tBquCWIMnNZBU4gcmU7qKEKQsTb47bDN0lAtukixlE0kF6BWlK\r\n"
+        "WE9gyn6CagsCqiUXObXbf+eEZSqVir2G3l6BFoMtEMze/aiCKm0oHw0LxOXnGiYZ\r\n"
+        "4fQRbxC1lfznQgUy286dUV4otp6F01vvpX1FQHKOtw5rDgb7MzVIcbidJ4vEZV8N\r\n"
+        "hnacRHr2lVz2XTIIM6RUthg/aFzyQkqFOFSDX9HoLPKsEdao7WNq\r\n"
+        "-----END CERTIFICATE-----\r\n";

examples/aws_iot/client_config.c

@@ -0,0 +1,17 @@
+// AWS IoT client endpoint
+const char *client_endpoint = "<your-prefix>.iot.<aws-region>.amazonaws.com";
+
+// AWS IoT device certificate (ECC)
+const char *client_cert =
+"-----BEGIN CERTIFICATE-----\r\n"
+"------------------ <your client certificate> -------------------\r\n"
+"-----END CERTIFICATE-----\r\n";
+
+// AWS IoT device private key (ECC)
+const char *client_key = 
+"-----BEGIN EC PARAMETERS-----\r\n"
+"BggqhkjOPQMBBw==\r\n"
+"-----END EC PARAMETERS-----\r\n"
+"-----BEGIN EC PRIVATE KEY-----\r\n"
+"------------------ <your client private key> -------------------\r\n"
+"-----END EC PRIVATE KEY-----\r\n";

examples/aws_iot/mbedtls/config.h

@@ -0,0 +1,119 @@
+/**
+ * \file config.h
+ *
+ * \brief Configuration options (set of defines)
+ *
+ *  Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *  This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+/*
+ * This set of compile-time options may be used to enable
+ * or disable features selectively, and reduce the global
+ * memory footprint.
+ */
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+/* System support */
+#define MBEDTLS_HAVE_ASM
+#define MBEDTLS_DEPRECATED_WARNING
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/* mbed TLS feature support */
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/* Debug support (optional) */
+// #define MBEDTLS_ERROR_C
+// #define MBEDTLS_DEBUG_C
+
+/* mbed TLS modules */
+#define MBEDTLS_AES_C
+#define MBEDTLS_ASN1_PARSE_C
+#define MBEDTLS_ASN1_WRITE_C
+#define MBEDTLS_BIGNUM_C
+#define MBEDTLS_CIPHER_C
+#define MBEDTLS_CTR_DRBG_C
+#define MBEDTLS_ECDH_C
+#define MBEDTLS_ECDSA_C
+#define MBEDTLS_ECP_C
+#define MBEDTLS_ENTROPY_C
+#define MBEDTLS_GCM_C
+#define MBEDTLS_MD_C
+#define MBEDTLS_NET_C
+#define MBEDTLS_OID_C
+#define MBEDTLS_PK_C
+#define MBEDTLS_PK_PARSE_C
+#define MBEDTLS_SHA256_C
+#define MBEDTLS_SHA512_C
+#define MBEDTLS_SSL_CLI_C
+#define MBEDTLS_SSL_SRV_C
+#define MBEDTLS_SSL_TLS_C
+#define MBEDTLS_X509_CRT_PARSE_C
+#define MBEDTLS_X509_USE_C
+
+/* For verify RSA based root CA certificate (optional if root CA cert is signed using ECC) */
+#define MBEDTLS_RSA_C
+#define MBEDTLS_SHA1_C
+#define MBEDTLS_PKCS1_V15
+#define MBEDTLS_PKCS1_V21
+
+/* For test certificates */
+#define MBEDTLS_BASE64_C
+#define MBEDTLS_CERTS_C
+#define MBEDTLS_PEM_PARSE_C
+
+/* Save RAM at the expense of ROM */
+#define MBEDTLS_AES_ROM_TABLES
+
+/* Save RAM by adjusting to our exact needs */
+#define MBEDTLS_ECP_MAX_BITS   384
+#define MBEDTLS_MPI_MAX_SIZE   256 // 2048 bits
+
+/* Save RAM at the expense of speed, see ecp.h */
+#define MBEDTLS_ECP_WINDOW_SIZE        2
+#define MBEDTLS_ECP_FIXED_POINT_OPTIM  0
+
+/* Significant speed benefit at the expense of some ROM */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/*
+ * You should adjust this to the exact number of sources you're using: default
+ * is the "mbedtls_platform_entropy_poll" source, but you may want to add other ones.
+ * Minimum is 2 for the entropy test suite.
+ */
+#define MBEDTLS_ENTROPY_MAX_SOURCES 2
+
+/* Save ROM and a few bytes of RAM by specifying our own ciphersuite list */
+#define MBEDTLS_SSL_CIPHERSUITES                        \
+    MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+
+/*
+ * Save RAM at the expense of interoperability: do this only if you control
+ * both ends of the connection!  (See coments in "mbedtls/ssl.h".)
+ * The minimum size here depends on the certificate chain used as well as the
+ * typical size of records.
+ */
+#define MBEDTLS_SSL_MAX_CONTENT_LEN             4096
+
+#include "mbedtls/check_config.h"
+
+#endif /* MBEDTLS_CONFIG_H */

examples/aws_iot/ssl_connection.c

@@ -0,0 +1,170 @@
+#include <espressif/esp_common.h>
+#include <lwip/sockets.h>
+#include <lwip/inet.h>
+#include <lwip/netdb.h>
+#include <lwip/sys.h>
+#include <string.h>
+
+// this must be ahead of any mbedtls header files so the local mbedtls/config.h can be properly referenced
+#include "ssl_connection.h"
+
+#define SSL_READ_TIMEOUT_MS           2000
+
+const char *pers = "esp-tls";
+
+static int handle_error(int err) {
+
+#ifdef MBEDTLS_ERROR_C
+    char error_buf[100];
+
+    mbedtls_strerror(err, error_buf, 100);
+    printf("%s\n", error_buf);
+#endif
+    printf("Error: %d\n", err);
+    return err;
+}
+
+#ifdef MBEDTLS_DEBUG_C
+static void my_debug(void *ctx, int level, const char *file, int line,
+        const char *str) {
+    ((void) level);
+    fprintf((FILE *) ctx, "%s:%04d: %s", file, line, str);
+    fflush((FILE *) ctx);
+}
+#endif
+
+void ssl_init(SSLConnection* conn) {
+    /*
+     * Initialize the RNG and the session data
+     */
+    mbedtls_net_init(&conn->net_ctx);
+    mbedtls_ssl_init(&conn->ssl_ctx);
+    mbedtls_ssl_config_init(&conn->ssl_conf);
+
+    mbedtls_x509_crt_init(&conn->ca_cert);
+    mbedtls_x509_crt_init(&conn->client_cert);
+    mbedtls_pk_init(&conn->client_key);
+
+    mbedtls_ctr_drbg_init(&conn->drbg_ctx);
+    mbedtls_entropy_init(&conn->entropy_ctx);
+
+}
+
+int ssl_connect(SSLConnection* conn, const char* host, int port) {
+    int ret;
+    char buffer[8];
+
+    ret = mbedtls_ctr_drbg_seed(&conn->drbg_ctx, mbedtls_entropy_func,
+            &conn->entropy_ctx, (const unsigned char *) pers, strlen(pers));
+    if (ret < 0) {
+        return -1;
+    }
+
+    ret = mbedtls_x509_crt_parse(&conn->ca_cert,
+            (const unsigned char *) conn->ca_cert_str,
+            strlen(conn->ca_cert_str) + 1);
+    if (ret < 0) {
+        return handle_error(ret);
+    }
+
+    ret = mbedtls_x509_crt_parse(&conn->client_cert,
+            (const unsigned char *) conn->client_cert_str,
+            strlen(conn->client_cert_str) + 1);
+    if (ret < 0) {
+        return handle_error(ret);
+    }
+
+    ret = mbedtls_pk_parse_key(&conn->client_key,
+            (const unsigned char *) conn->client_key_str,
+            strlen(conn->client_key_str) + 1, NULL, 0);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    snprintf(buffer, sizeof(buffer), "%d", port);
+    ret = mbedtls_net_connect(&conn->net_ctx, host, buffer,
+            MBEDTLS_NET_PROTO_TCP);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    ret = mbedtls_ssl_config_defaults(&conn->ssl_conf, MBEDTLS_SSL_IS_CLIENT,
+            MBEDTLS_SSL_TRANSPORT_STREAM, MBEDTLS_SSL_PRESET_DEFAULT);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+#ifdef MBEDTLS_DEBUG_C
+    mbedtls_ssl_conf_dbg(&conn->ssl_conf, my_debug, stdout);
+    mbedtls_debug_set_threshold(5);
+#endif
+
+    mbedtls_ssl_conf_authmode(&conn->ssl_conf, MBEDTLS_SSL_VERIFY_REQUIRED);
+    mbedtls_ssl_conf_rng(&conn->ssl_conf, mbedtls_ctr_drbg_random,
+            &conn->drbg_ctx);
+    mbedtls_ssl_conf_read_timeout(&conn->ssl_conf, SSL_READ_TIMEOUT_MS);
+    mbedtls_ssl_conf_ca_chain(&conn->ssl_conf, &conn->ca_cert, NULL);
+
+    ret = mbedtls_ssl_conf_own_cert(&conn->ssl_conf, &conn->client_cert,
+            &conn->client_key);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    ret = mbedtls_ssl_setup(&conn->ssl_ctx, &conn->ssl_conf);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    ret = mbedtls_ssl_set_hostname(&conn->ssl_ctx, host);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    mbedtls_ssl_set_bio(&conn->ssl_ctx, &conn->net_ctx, mbedtls_net_send, NULL,
+            mbedtls_net_recv_timeout);
+
+    while ((ret = mbedtls_ssl_handshake(&conn->ssl_ctx)) != 0) {
+        if (ret != MBEDTLS_ERR_SSL_WANT_READ
+                && ret != MBEDTLS_ERR_SSL_WANT_WRITE) {
+            if (ret == MBEDTLS_ERR_X509_CERT_VERIFY_FAILED) {
+                return handle_error(ret);
+            }
+        }
+        handle_error(ret);
+
+        vTaskDelay(5000 / portTICK_PERIOD_MS);
+    }
+
+    mbedtls_ssl_get_record_expansion(&conn->ssl_ctx);
+    ret = mbedtls_ssl_get_verify_result(&conn->ssl_ctx);
+    if (ret != 0) {
+        return handle_error(ret);
+    }
+
+    return ret;
+}
+
+int ssl_destroy(SSLConnection* conn) {
+    mbedtls_net_free(&conn->net_ctx);
+    mbedtls_ssl_free(&conn->ssl_ctx);
+    mbedtls_ssl_config_free(&conn->ssl_conf);
+    mbedtls_ctr_drbg_free(&conn->drbg_ctx);
+    mbedtls_entropy_free(&conn->entropy_ctx);
+    mbedtls_x509_crt_free(&conn->ca_cert);
+    mbedtls_x509_crt_free(&conn->client_cert);
+    mbedtls_pk_free(&conn->client_key);
+
+    return 0;
+}
+
+int ssl_read(SSLConnection* n, unsigned char* buffer, int len, int timeout_ms) {
+    // NB: timeout_ms is ignored, so blocking read will timeout after SSL_READ_TIMEOUT_MS
+    return mbedtls_ssl_read(&n->ssl_ctx, buffer, len);
+}
+
+int ssl_write(SSLConnection* n, unsigned char* buffer, int len,
+        int timeout_ms) {
+    // NB: timeout_ms is ignored, so write is always block write
+    return mbedtls_ssl_write(&n->ssl_ctx, buffer, len);
+}

examples/aws_iot/ssl_connection.h

@@ -0,0 +1,40 @@
+#ifndef _SSL_CONNECTION_H_
+#define _SSL_CONNECTION_H_
+
+// this must be ahead of any mbedtls header files so the local mbedtls/config.h can be properly referenced
+#include "mbedtls/config.h"
+
+#include "mbedtls/net_sockets.h"
+#include "mbedtls/debug.h"
+#include "mbedtls/ssl.h"
+#include "mbedtls/entropy.h"
+#include "mbedtls/ctr_drbg.h"
+#include "mbedtls/error.h"
+#include "mbedtls/certs.h"
+
+typedef struct SSLConnection {
+    mbedtls_net_context net_ctx;
+    mbedtls_ssl_context ssl_ctx;
+    mbedtls_ssl_config ssl_conf;
+
+    mbedtls_ctr_drbg_context drbg_ctx;
+    mbedtls_entropy_context entropy_ctx;
+
+    mbedtls_x509_crt ca_cert;
+    mbedtls_x509_crt client_cert;
+    mbedtls_pk_context client_key;
+
+    char *ca_cert_str;
+    char *client_cert_str;
+    char *client_key_str;
+} SSLConnection;
+
+extern void ssl_init(SSLConnection* n);
+extern int ssl_connect(SSLConnection* n, const char* host, int port);
+extern int ssl_destroy(SSLConnection* n);
+extern int ssl_read(SSLConnection* n, unsigned char* buffer, int len,
+        int timeout_ms);
+extern int ssl_write(SSLConnection* n, unsigned char* buffer, int len,
+        int timeout_ms);
+
+#endif /* _SSL_CONNECTION_H_ */

examples/bh1750/Makefile

@@ -0,0 +1,3 @@
+PROGRAM=bh1750_example
+EXTRA_COMPONENTS = extras/i2c extras/bh1750
+include ../../common.mk