SPIFFS: Optimized SPI data read/write.
Unaligned read/write from/to SPI data registers is rewritten in assembler to improve performance.
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281faa2cac
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2 changed files with 150 additions and 34 deletions
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@ -45,40 +45,53 @@
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* called where it needed and not.
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*/
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#define SPI_WRITE_MAX_SIZE 32
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#define SPI_READ_MAX_SIZE 32
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#define SPI_WRITE_MAX_SIZE 64
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// 64 bytes read causes hang
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// http://bbs.espressif.com/viewtopic.php?f=6&t=2439
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#define SPI_READ_MAX_SIZE 60
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/**
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* Copy unaligned data to 4-byte aligned destination buffer.
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*
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* @param words Number of 4-byte words to write.
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*
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* @see unaligned_memcpy.S
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*/
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void memcpy_unaligned_src(volatile uint32_t *dst, uint8_t *src, uint8_t words);
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/**
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* Copy 4-byte aligned source data to unaligned destination buffer.
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*
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* @param bytes Number of byte to copy to dst.
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*
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* @see unaligned_memcpy.S
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*/
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void memcpy_unaligned_dst(uint8_t *dst, volatile uint32_t *src, uint8_t bytes);
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/**
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* Low level SPI flash write. Write block of data up to 64 bytes.
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*/
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static inline uint32_t IRAM spi_write_data(sdk_flashchip_t *chip, uint32_t addr,
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static inline void IRAM spi_write_data(sdk_flashchip_t *chip, uint32_t addr,
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uint8_t *buf, uint32_t size)
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{
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Wait_SPI_Idle(chip); // wait for previous write to finish
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SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
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uint32_t words = size >> 2;
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if (size & 0b11) {
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words++;
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}
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uint32_t data = 0;
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for (uint32_t i = 0; i < (words << 2); i++) {
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data >>= 8;
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data |= (uint32_t)buf[i] << 24;
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if (i & 0b11) {
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SPI(0).W[i >> 2] = data;
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}
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}
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if (SPI_write_enable(chip)) {
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return ESP_SPIFFS_FLASH_ERROR;
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}
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Wait_SPI_Idle(chip); // wait for previous write to finish
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SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
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memcpy_unaligned_src(SPI(0).W, buf, words);
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SPI_write_enable(chip);
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SPI(0).CMD = SPI_CMD_PP;
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while (SPI(0).CMD) {}
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return ESP_SPIFFS_FLASH_OK;
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}
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/**
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@ -97,9 +110,7 @@ static uint32_t IRAM spi_write_page(sdk_flashchip_t *flashchip, uint32_t dest_ad
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}
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while (size >= SPI_WRITE_MAX_SIZE) {
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if (spi_write_data(flashchip, dest_addr, buf, SPI_WRITE_MAX_SIZE)) {
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return ESP_SPIFFS_FLASH_ERROR;
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}
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spi_write_data(flashchip, dest_addr, buf, SPI_WRITE_MAX_SIZE);
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size -= SPI_WRITE_MAX_SIZE;
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dest_addr += SPI_WRITE_MAX_SIZE;
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@ -110,9 +121,7 @@ static uint32_t IRAM spi_write_page(sdk_flashchip_t *flashchip, uint32_t dest_ad
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}
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}
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if (spi_write_data(flashchip, dest_addr, buf, size)) {
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return ESP_SPIFFS_FLASH_ERROR;
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}
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spi_write_data(flashchip, dest_addr, buf, size);
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return ESP_SPIFFS_FLASH_OK;
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}
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@ -185,15 +194,10 @@ static inline void IRAM read_block(sdk_flashchip_t *chip, uint32_t addr,
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{
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SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
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SPI(0).CMD = SPI_CMD_READ;
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while (SPI(0).CMD) {};
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uint32_t data = 0;
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for (uint32_t i = 0; i < size; i++) {
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if (!(i & 0b11)) {
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data = SPI(0).W[i>>2];
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}
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buf[i] = 0xFF & data;
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data >>= 8;
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}
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memcpy_unaligned_dst(buf, SPI(0).W, size);
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}
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/**
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112
extras/spiffs/unaligned_memcpy.S
Normal file
112
extras/spiffs/unaligned_memcpy.S
Normal file
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@ -0,0 +1,112 @@
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/**
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 sheinz (https://github.com/sheinz)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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.text
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.section .iram1.text, "x"
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.literal_position
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/**
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* Copy unaligned data to 4-byte aligned buffer.
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*/
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.align 4
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.global memcpy_unaligned_src
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.type memcpy_unaligned_src, @function
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memcpy_unaligned_src:
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/* a2: dst, a3: src, a4: size */
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ssa8l a3
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srli a3, a3, 2
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slli a3, a3, 2
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beqz a4, u_src_end
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l32i a6, a3, 0
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u_src_loop:
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l32i a7, a3, 4
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src a8, a7, a6
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memw
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s32i a8, a2, 0
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mov a6, a7
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addi a3, a3, 4
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addi a2, a2, 4
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addi a4, a4, -1
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bnez a4, u_src_loop
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u_src_end:
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movi a2, 0
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ret.n
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/**
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* Copy data from 4-byte aligned source to unaligned destination buffer.
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*/
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.align 4
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.global memcpy_unaligned_dst
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.type memcpy_unaligned_dst, @function
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memcpy_unaligned_dst:
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/* a2: dst, a3: src, a4: size */
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beqz.n a4, u_dst_end
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extui a5, a4, 0, 2
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beqz.n a5, aligned_dst_loop
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u_dst_loop:
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/* Load data word */
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memw
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l32i.n a5, a3, 0
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/* Save byte number 0 */
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s8i a5, a2, 0
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addi.n a4, a4, -1
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beqz a4, u_dst_end
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addi.n a2, a2, 1
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/* Shift and save byte number 1 */
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srli a5, a5, 8
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s8i a5, a2, 0
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addi.n a4, a4, -1
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beqz a4, u_dst_end
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addi.n a2, a2, 1
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/* Shift and save byte number 2 */
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srli a5, a5, 8
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s8i a5, a2, 0
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addi.n a4, a4, -1
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beqz a4, u_dst_end
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addi.n a2, a2, 1
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/* Shift and save byte number 3 */
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srli a5, a5, 8
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s8i a5, a2, 0
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addi.n a4, a4, -1
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addi.n a2, a2, 1
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/* Next word */
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addi.n a3, a3, 4
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bnez.n a4, u_dst_loop
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ret.n
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aligned_dst_loop:
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memw
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l32i a5, a3, 0
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s32i a5, a2, 0
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addi.n a3, a3, 4
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addi.n a2, a2, 4
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addi.n a4, a4, -4
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bnez.n a4, aligned_dst_loop
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u_dst_end: ret.n
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