commit
b6132a480e
3 changed files with 454 additions and 0 deletions
245
core/esp_spi.c
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245
core/esp_spi.c
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/*
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* ESP hardware SPI master driver
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*
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* Part of esp-open-rtos
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* Copyright (c) Ruslan V. Uss, 2016
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* BSD Licensed as described in the file LICENSE
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*/
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#include "esp/spi.h"
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#include "esp/iomux.h"
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#include "esp/gpio.h"
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#include <string.h>
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#define _SPI0_SCK_GPIO 6
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#define _SPI0_MISO_GPIO 7
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#define _SPI0_MOSI_GPIO 8
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#define _SPI0_HD_GPIO 9
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#define _SPI0_WP_GPIO 10
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#define _SPI0_CS0_GPIO 11
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#define _SPI1_MISO_GPIO 12
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#define _SPI1_MOSI_GPIO 13
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#define _SPI1_SCK_GPIO 14
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#define _SPI1_CS0_GPIO 15
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#define _SPI0_FUNC 1
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#define _SPI1_FUNC 2
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#define _SPI_BUF_SIZE 64
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inline static void _set_pin_function(uint8_t pin, uint32_t function)
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{
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iomux_set_function(gpio_to_iomux(pin), function);
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}
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bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins)
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{
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switch (bus)
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{
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case 0:
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_set_pin_function(_SPI0_MISO_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_MOSI_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_SCK_GPIO, _SPI0_FUNC);
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if (!minimal_pins)
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{
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_set_pin_function(_SPI0_HD_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_WP_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_CS0_GPIO, _SPI0_FUNC);
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}
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break;
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case 1:
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_set_pin_function(_SPI1_MISO_GPIO, _SPI1_FUNC);
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_set_pin_function(_SPI1_MOSI_GPIO, _SPI1_FUNC);
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_set_pin_function(_SPI1_SCK_GPIO, _SPI1_FUNC);
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if (!minimal_pins)
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_set_pin_function(_SPI1_CS0_GPIO, _SPI1_FUNC);
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break;
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default:
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return false;
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}
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SPI(bus).USER0 = SPI_USER0_MOSI | SPI_USER0_CLOCK_IN_EDGE | SPI_USER0_DUPLEX |
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(minimal_pins ? 0 : (SPI_USER0_CS_HOLD | SPI_USER0_CS_SETUP));
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spi_set_frequency_div(bus, freq_divider);
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spi_set_mode(bus, mode);
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spi_set_msb(bus, msb);
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spi_set_endianness(bus, endianness);
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return true;
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}
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void spi_set_mode(uint8_t bus, spi_mode_t mode)
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{
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bool cpha = (uint8_t)mode & 1;
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bool cpol = (uint8_t)mode & 2;
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if (cpol)
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cpha = !cpha; // CPHA must be inverted when CPOL = 1, I have no idea why
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// CPHA
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if (cpha)
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SPI(bus).USER0 |= SPI_USER0_CLOCK_OUT_EDGE;
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else
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SPI(bus).USER0 &= ~SPI_USER0_CLOCK_OUT_EDGE;
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// CPOL - see http://bbs.espressif.com/viewtopic.php?t=342#p5384
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if (cpol)
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SPI(bus).PIN |= SPI_PIN_IDLE_EDGE;
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else
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SPI(bus).PIN &= ~SPI_PIN_IDLE_EDGE;
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}
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spi_mode_t spi_get_mode(uint8_t bus)
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{
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uint8_t cpha = SPI(bus).USER0 & SPI_USER0_CLOCK_OUT_EDGE ? 1 : 0;
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uint8_t cpol = SPI(bus).PIN & SPI_PIN_IDLE_EDGE ? 2 : 0;
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return (spi_mode_t)(cpol | (cpol ? 1 - cpha : cpha)); // see spi_set_mode
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}
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void spi_set_msb(uint8_t bus, bool msb)
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{
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if (msb)
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SPI(bus).CTRL0 &= ~(SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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else
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SPI(bus).CTRL0 |= (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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}
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void spi_set_endianness(uint8_t bus, spi_endianness_t endianness)
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{
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if (endianness == SPI_BIG_ENDIAN)
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SPI(bus).USER0 |= (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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else
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SPI(bus).USER0 &= ~(SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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}
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void spi_set_frequency_div(uint8_t bus, uint32_t divider)
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{
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uint32_t predivider = (divider & 0xffff) - 1;
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uint32_t count = (divider >> 16) - 1;
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if (count || predivider)
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{
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IOMUX.CONF &= ~(bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK);
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SPI(bus).CLOCK = VAL2FIELD_M(SPI_CLOCK_DIV_PRE, predivider) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_NUM, count) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_HIGH, count / 2) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_LOW, count);
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}
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else
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{
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IOMUX.CONF |= bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK;
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SPI(bus).CLOCK = SPI_CLOCK_EQU_SYS_CLOCK;
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}
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}
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inline static void _set_size(uint8_t bus, uint8_t bytes)
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{
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uint32_t bits = ((uint32_t)bytes << 3) - 1;
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SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MISO_BITLEN, bits);
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SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MOSI_BITLEN, bits);
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}
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inline static void _wait(uint8_t bus)
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{
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while (SPI(bus).CMD & SPI_CMD_USR)
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;
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}
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inline static void _start(uint8_t bus)
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{
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SPI(bus).CMD |= SPI_CMD_USR;
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}
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inline static uint32_t _swap_bytes(uint32_t value)
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{
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return (value << 24) | ((value << 8) & 0x00ff0000) | ((value >> 8) & 0x0000ff00) | (value >> 24);
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}
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inline static uint32_t _swap_words(uint32_t value)
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{
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return (value << 16) | (value >> 16);
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}
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static void _prepare_buffer(uint8_t bus, size_t len, spi_endianness_t e, spi_word_size_t word_size)
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{
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if (e == SPI_LITTLE_ENDIAN || word_size == SPI_32BIT) return;
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if (word_size == SPI_16BIT)
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{
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if (len % 2)
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len ++;
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len /= 2;
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}
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uint32_t *data = (uint32_t *)&SPI(bus).W0;
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for (size_t i = 0; i < len; i ++)
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{
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data[i] = word_size == SPI_16BIT
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? _swap_words(data[i])
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: _swap_bytes(data[i]);
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}
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}
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static void _spi_buf_transfer(uint8_t bus, const void *out_data, void *in_data,
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size_t len, spi_endianness_t e, spi_word_size_t word_size)
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{
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_wait(bus);
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size_t bytes = len * (uint8_t)word_size;
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_set_size(bus, bytes);
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memcpy((void *)&SPI(bus).W0, out_data, bytes);
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_prepare_buffer(bus, len, e, word_size);
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_start(bus);
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_wait(bus);
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if (in_data)
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{
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_prepare_buffer(bus, len, e, word_size);
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memcpy(in_data, (void *)&SPI(bus).W0, bytes);
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}
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}
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uint8_t spi_transfer_8(uint8_t bus, uint8_t data)
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{
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uint8_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_8BIT);
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return res;
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}
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uint16_t spi_transfer_16(uint8_t bus, uint16_t data)
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{
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uint16_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_16BIT);
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return res;
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}
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uint32_t spi_transfer_32(uint8_t bus, uint32_t data)
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{
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uint32_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_32BIT);
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return res;
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}
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size_t spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len, spi_word_size_t word_size)
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{
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if (!out_data || !len) return 0;
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spi_endianness_t e = spi_get_endianness(bus);
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uint8_t buf_size = _SPI_BUF_SIZE / (uint8_t)word_size;
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size_t blocks = len / buf_size;
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for (size_t i = 0; i < blocks; i++)
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{
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size_t offset = i * _SPI_BUF_SIZE;
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_spi_buf_transfer(bus, (const uint8_t *)out_data + offset,
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in_data ? (uint8_t *)in_data + offset : NULL, buf_size, e, word_size);
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}
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uint8_t tail = len % buf_size;
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if (tail)
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{
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_spi_buf_transfer(bus, (const uint8_t *)out_data + blocks * _SPI_BUF_SIZE,
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in_data ? (uint8_t *)in_data + blocks * _SPI_BUF_SIZE : NULL, tail, e, word_size);
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}
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return len;
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}
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core/include/esp/spi.h
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core/include/esp/spi.h
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/**
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* \file Hardware SPI master driver
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*
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* Part of esp-open-rtos
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*
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* \copyright Ruslan V. Uss, 2016
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _ESP_SPI_H_
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#define _ESP_SPI_H_
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#include <stdbool.h>
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#include <stdint.h>
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#include "esp/spi_regs.h"
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#include "esp/clocks.h"
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/**
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* Macro for use with spi_init and spi_set_frequency_div.
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* SPI frequency = 80000000 / divider / count
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* dvider must be in 1..8192 and count in 1..64
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*/
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#define SPI_GET_FREQ_DIV(divider, count) (((count) << 16) | (divider))
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/**
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* Predefinded SPI frequency dividers
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*/
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#define SPI_FREQ_DIV_125K SPI_GET_FREQ_DIV(64, 10) ///< 125kHz
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#define SPI_FREQ_DIV_250K SPI_GET_FREQ_DIV(32, 10) ///< 250kHz
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#define SPI_FREQ_DIV_500K SPI_GET_FREQ_DIV(16, 10) ///< 500kHz
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#define SPI_FREQ_DIV_1M SPI_GET_FREQ_DIV(8, 10) ///< 1MHz
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#define SPI_FREQ_DIV_2M SPI_GET_FREQ_DIV(4, 10) ///< 2MHz
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#define SPI_FREQ_DIV_4M SPI_GET_FREQ_DIV(2, 10) ///< 4MHz
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#define SPI_FREQ_DIV_8M SPI_GET_FREQ_DIV(5, 2) ///< 8MHz
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#define SPI_FREQ_DIV_10M SPI_GET_FREQ_DIV(4, 2) ///< 10MHz
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#define SPI_FREQ_DIV_20M SPI_GET_FREQ_DIV(2, 2) ///< 20MHz
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#define SPI_FREQ_DIV_40M SPI_GET_FREQ_DIV(1, 2) ///< 40MHz
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#define SPI_FREQ_DIV_80M SPI_GET_FREQ_DIV(1, 1) ///< 80MHz
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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typedef enum _spi_mode_t {
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SPI_MODE0 = 0, ///< CPOL = 0, CPHA = 0
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SPI_MODE1, ///< CPOL = 0, CPHA = 1
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SPI_MODE2, ///< CPOL = 1, CPHA = 0
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SPI_MODE3 ///< CPOL = 1, CPHA = 1
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} spi_mode_t;
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typedef enum _spi_endianness_t {
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SPI_LITTLE_ENDIAN = 0,
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SPI_BIG_ENDIAN
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} spi_endianness_t;
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typedef enum _spi_word_size_t {
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SPI_8BIT = 1, ///< 1 byte
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SPI_16BIT = 2, ///< 2 bytes
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SPI_32BIT = 4 ///< 4 bytes
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} spi_word_size_t;
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/**
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* \brief Initalize SPI bus
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* Initalize specified SPI bus and setup appropriate pins:
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* Bus 0:
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* - MISO = GPIO 7
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* - MOSI = GPIO 8
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* - SCK = GPIO 6
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* - CS0 = GPIO 11 (if minimal_pins is false)
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* - HD = GPIO 9 (if minimal_pins is false)
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* - WP = GPIO 10 (if minimal_pins is false)
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* Bus 1:
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* - MISO = GPIO 12
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* - MOSI = GPIO 13
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* - SCK = GPIO 14
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* - CS0 = GPIO 15 (if minimal_pins is false)
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* Note that system flash memory is on the bus 0!
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* \param bus Bus ID: 0 - system, 1 - user
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* \param mode Bus mode
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* \param freq_divider SPI bus frequency divider, use SPI_GET_FREQ_DIV() or predefined value
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* \param msb Bit order, MSB first if true
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* \param endianness Byte order
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* \param minimal_pins If true use the minimal set of pins: MISO, MOSI and SCK.
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* \return false when error
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*/
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bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins);
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/**
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* \brief Set SPI bus mode
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* \param bus Bus ID: 0 - system, 1 - user
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* \param mode Bus mode.
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*/
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void spi_set_mode(uint8_t bus, spi_mode_t mode);
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/**
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* \brief Get mode of the SPI bus
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* \param bus Bus ID: 0 - system, 1 - user
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* \return Bus mode
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*/
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spi_mode_t spi_get_mode(uint8_t bus);
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/**
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* \brief Set SPI bus frequency
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* Examples:
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*
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* spi_set_frequency_div(1, SPI_FREQ_DIV_8M); // 8 MHz, predefined value
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* ...
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* spi_set_frequency_div(1, SPI_GET_FREQ_DIV(8, 10)); // divider = 8, count = 10,
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* // frequency = 80000000 Hz / 8 / 10 = 1000000 Hz
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*
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* \param bus Bus ID: 0 - system, 1 - user
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* \param divider Predivider of the system bus frequency (80MHz) in the 2 low
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* bytes and period pulses count in the third byte. Please note that
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* divider must be be in range 1..8192 and count in range 2..64. Use the
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* macro SPI_GET_FREQ_DIV(divider, count) to get the correct parameter value.
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*/
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void spi_set_frequency_div(uint8_t bus, uint32_t divider);
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/**
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* \brief Get SPI bus frequency
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* Note the result is in Hz.
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* \param bus Bus ID: 0 - system, 1 - user
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* \return SPI frequency, Hz
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*/
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inline uint32_t spi_get_frequency_hz(uint8_t bus)
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{
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return APB_CLK_FREQ /
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(FIELD2VAL(SPI_CLOCK_DIV_PRE, SPI(bus).CLOCK) + 1) /
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(FIELD2VAL(SPI_CLOCK_COUNT_NUM, SPI(bus).CLOCK) + 1);
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}
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/**
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* \brief Set SPI bus bit order
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* \param bus Bus ID: 0 - system, 1 - user
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* \param msb Bit order, MSB first if true
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*/
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void spi_set_msb(uint8_t bus, bool msb);
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/**
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* \brief Get SPI bus bit order
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* \param bus Bus ID: 0 - system, 1 - user
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* \return msb Bit order, MSB first if true
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*/
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inline bool spi_get_msb(uint8_t bus)
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{
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return !(SPI(bus).CTRL0 & (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER));
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}
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/**
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* \brief Set SPI bus byte order
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* \param bus Bus ID: 0 - system, 1 - user
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* \param endianness Byte order
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*/
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void spi_set_endianness(uint8_t bus, spi_endianness_t endianness);
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/**
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* \brief Get SPI bus byte order
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* \param bus Bus ID: 0 - system, 1 - user
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* \return endianness Byte order
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*/
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inline spi_endianness_t spi_get_endianness(uint8_t bus)
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{
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return SPI(bus).USER0 & (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER)
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? SPI_BIG_ENDIAN
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: SPI_LITTLE_ENDIAN;
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}
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/**
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* \brief Transfer 8 bits over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data Byte to send
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* \return Received byte
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*/
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uint8_t spi_transfer_8(uint8_t bus, uint8_t data);
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/**
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* \brief Transfer 16 bits over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data Word to send
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* \return Received word
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*/
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uint16_t spi_transfer_16(uint8_t bus, uint16_t data);
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/**
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* \brief Transfer 32 bits over SPI
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* \param bus Bus ID: 0 - system, 1 - user
|
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* \param data dword to send
|
||||
* \return Received dword
|
||||
*/
|
||||
uint32_t spi_transfer_32(uint8_t bus, uint32_t data);
|
||||
/**
|
||||
* \brief Transfer buffer of words over SPI
|
||||
* Please note that the buffer size is in words, not in bytes!
|
||||
* Example:
|
||||
* const uint16_t out_buf[] = { 0xa0b0, 0xa1b1, 0xa2b2, 0xa3b3 };
|
||||
* uint16_t in_buf[sizeof(out_buf)];
|
||||
* spi_init(1, SPI_MODE1, SPI_FREQ_DIV_4M, true, SPI_BIG_ENDIAN, true);
|
||||
* spi_transfer(1, out_buf, in_buf, sizeof(out_buf), SPI_16BIT); // len = 4 words * 2 bytes = 8 bytes
|
||||
*
|
||||
* \param bus Bus ID: 0 - system, 1 - user
|
||||
* \param out_data Data to send.
|
||||
* \param in_data Receive buffer. If NULL, received data will be lost.
|
||||
* \param len Buffer size in words
|
||||
* \param word_size Size of the word
|
||||
* \return Transmitted/received words count
|
||||
*/
|
||||
size_t spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len, spi_word_size_t word_size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ESP_SPI_H_ */
|
|
@ -152,6 +152,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
|
|||
#define SPI_USER0_CS_SETUP BIT(5)
|
||||
#define SPI_USER0_CS_HOLD BIT(4)
|
||||
#define SPI_USER0_FLASH_MODE BIT(2)
|
||||
#define SPI_USER0_DUPLEX BIT(0)
|
||||
|
||||
/* Details for USER1 register */
|
||||
|
||||
|
@ -173,6 +174,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
|
|||
|
||||
/* Details for PIN register */
|
||||
|
||||
#define SPI_PIN_IDLE_EDGE BIT(29) ///< CPOL
|
||||
#define SPI_PIN_CS2_DISABLE BIT(2)
|
||||
#define SPI_PIN_CS1_DISABLE BIT(1)
|
||||
#define SPI_PIN_CS0_DISABLE BIT(0)
|
||||
|
|
Loading…
Reference in a new issue