SPIFFS: Bypass SDK and bootrom for flash access.
Accessing SPI flash using reversed engineered functions.
This commit is contained in:
sheinz
parent
fb187eae08
commit
5d5f28a22f
3 changed files with 356 additions and 148 deletions
336
extras/spiffs/esp_spi_flash.c
Normal file
336
extras/spiffs/esp_spi_flash.c
Normal file
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@ -0,0 +1,336 @@
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#include "esp_spi_flash.h"
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#include "flashchip.h"
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#include "espressif/spi_flash.h"
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#include "FreeRTOS.h"
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#include "esp/rom.h"
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#include "esp/spi_regs.h"
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static uint32_t IRAM read_status(sdk_flashchip_t *flashchip, uint32_t *status)
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{
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uint32_t _status;
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do {
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SPI(0).RSTATUS = 0;
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SPI(0).CMD = SPI_CMD_READ_SR;
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while (SPI(0).CMD) {}
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_status = SPI(0).RSTATUS & flashchip->status_mask;
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} while ( _status & 0b1);
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*status = _status;
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return 0;
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}
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static uint32_t IRAM wait_idle(sdk_flashchip_t *flashchip)
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{
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while (DPORT.SPI_READY & DPORT_SPI_READY_IDLE) {}
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uint32_t a3;
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return read_status(flashchip, &a3);
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}
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static uint32_t IRAM write_enable(sdk_flashchip_t *flashchip)
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{
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uint32_t local0 = 0;
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wait_idle(flashchip);
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SPI(0).CMD = SPI_CMD_WRITE_ENABLE;
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while (SPI(0).CMD) {}
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if (!(local0 & 0b1)) {
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do {
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read_status(flashchip, &local0);
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} while (!(local0 & (1<<1)));
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}
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return 0;
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}
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static uint32_t IRAM page_program(sdk_flashchip_t *flashchip, uint32_t dest_addr,
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uint32_t *buf, uint32_t size)
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{
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if (size & 0b11) {
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return 1;
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}
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// check if block to write doesn't cross page boundary
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if (flashchip->page_size < size + (dest_addr % flashchip->page_size)) {
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return 1;
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}
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wait_idle(flashchip);
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if (size < 1) {
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return 0;
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}
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// a12 = 0x60000200
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// a0 = 0x00FFFFFF
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// a6 = (dest_addr & 0x00FFFFFF) | 0x20000000
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while (size >= 32) {
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SPI(0).ADDR = (dest_addr & 0x00FFFFFF) | 0x20000000;
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// a4 - loop variable += 4
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// a5 = buf[0]
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for (uint8_t i = 0; i != 8; i++) {
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SPI(0).W[i] = buf[i];
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}
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size -= 32;
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dest_addr += 32;
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buf += 8;
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if (write_enable(flashchip)) {
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return 1;
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}
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SPI(0).CMD = SPI_CMD_PP;
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while (SPI(0).CMD) {} // wait for reg->cmd to be 0
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wait_idle(flashchip);
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// a0 = 0x00FFFFFF
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if (size < 1) {
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return 0;
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}
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}
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// a7 = 0x00FFFFFF & dest_addr
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// a4 = size << 24;
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// a4 = a7 | a4
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SPI(0).ADDR = (size << 24) | (0x00FFFFFF & dest_addr);
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// a6 = 0b11 & size
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// a3 = size >> 2;
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// a5 = a3 + 1
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uint32_t words = size >> 2;
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if (0b11 & size) {
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words += 1;
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}
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words = words & 0xFF;
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if (words != 0) {
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// a4 = 0
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uint8_t i = 0;
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if (words & 0b1) { // bit 0 is set in a3
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SPI(0).W[0] = buf[0];
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i++;
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}
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// a6 = a3 >> 1;
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if (words >> 1) {
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// a6 = 0x600000200
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// buff[0]
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for (; i != words; i++) {
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SPI(0).W[i] = buf[i];
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}
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}
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}
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if (write_enable(flashchip)) {
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return 1;
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}
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SPI(0).CMD = SPI_CMD_PP;
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while (SPI(0).CMD) {} // wait for reg->cmd to be 0
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wait_idle(flashchip);
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// a0 = 0x00FFFFFF
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return 0;
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}
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static uint32_t IRAM read_data(sdk_flashchip_t *flashchip, uint32_t addr,
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uint32_t *dst, uint32_t size)
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{
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// a12 = dst
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if ((addr + size) > flashchip->chip_size) {
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return 1;
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}
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// a14 = addr
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// a13 = size
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wait_idle(flashchip);
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if (size < 1) {
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return 0;
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}
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// SPI(0).CMD
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while (size >= 32) {
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// a8 = addr | 0x20000000;
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SPI(0).ADDR = addr | 0x20000000;
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SPI(0).CMD = SPI_CMD_READ;
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while (SPI(0).CMD) {};
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for (uint32_t a2 = 0; a2 < 8; a2++) {
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*dst = SPI(0).W[a2];
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dst++;
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}
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size -= 32;
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addr += 32;
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}
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if (size >= 1) {
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// a7 = size << 24;
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// a7 = addr | a7
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SPI(0).ADDR = addr | (size << 24);
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SPI(0).CMD = SPI_CMD_READ;
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while (SPI(0).CMD) {};
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// a10 = size & 0b11
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uint8_t a7 = size >> 2;
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// a9 = a7 + 1
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if (size & 0b11) {
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// a7 = a7 + 1
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a7++;
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}
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// a7 = a7 & 0xFF
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if (!a7) {
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return 0;
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}
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uint8_t a2 = 0;
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if (a7 & 0b1) {
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a2 = 1;
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// a11 = SPI(0).W0
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*dst = SPI(0).W[0];
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dst += 1;
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}
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size = a7 >> 1;
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if (!size) {
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return 0;
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}
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for (; a2 != a7; a2++) {
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*dst = SPI(0).W[a2];
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dst += 1;
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}
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}
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return 0;
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIRead
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*/
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static uint32_t IRAM spi_read(uint32_t dest_addr, void *src, uint32_t size)
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{
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if (read_data(&sdk_flashchip, dest_addr, (uint32_t*)src, size)) {
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return 1;
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} else {
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return 0;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_read
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*/
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uint32_t IRAM esp_spi_flash_read(uint32_t dest_addr, void *src, uint32_t size)
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{
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if (src) {
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vPortEnterCritical();
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Cache_Read_Disable();
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uint32_t result = spi_read(dest_addr, src, size);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return result;
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} else {
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return 1;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIWrite
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*/
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static uint32_t IRAM spi_write(uint32_t dest_addr, void *dst, uint32_t size)
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{
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if (sdk_flashchip.chip_size < (dest_addr + size)) {
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return 1;
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}
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uint32_t write_bytes_to_page = sdk_flashchip.page_size -
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(dest_addr % sdk_flashchip.page_size);
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if (size < write_bytes_to_page) {
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if (page_program(&sdk_flashchip, dest_addr, (uint32_t*)dst, size)) {
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return 1;
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} else {
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return 0;
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}
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}
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if (page_program(&sdk_flashchip, dest_addr, (uint32_t*)dst, write_bytes_to_page)) {
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return 1;
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}
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uint32_t offset = write_bytes_to_page;
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uint32_t pages_to_write = (size - offset) / sdk_flashchip.page_size;
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for (uint8_t i = 0; i != pages_to_write; i++) {
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if (page_program(&sdk_flashchip, dest_addr + offset,
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dst + ((offset>>2)<<2), sdk_flashchip.page_size)) {
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return 1;
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}
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offset += sdk_flashchip.page_size;
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}
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if (page_program(&sdk_flashchip, dest_addr + offset,
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dst + ((offset>>2)<<2), size - offset)) {
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return 1;
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} else {
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return 0;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_write
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*/
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uint32_t IRAM esp_spi_flash_write(uint32_t dest_addr, void *dst, uint32_t size)
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{
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if (dst) {
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if (size & 0b11) { // not 4-byte aligned
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size = size >> 2;
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size = (size << 2) + 1;
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}
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vPortEnterCritical();
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Cache_Read_Disable();
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uint32_t result = spi_write(dest_addr, dst, size);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return result;
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} else {
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return 1;
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}
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}
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static uint32_t IRAM sector_erase(sdk_flashchip_t *chip, uint32_t addr)
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{
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// a12 -> addr
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// a0 = addr & 0xFFF
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if (addr & 0xFFF) {
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return 1;
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}
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wait_idle(chip);
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SPI(0).ADDR = addr & 0x00FFFFFF;
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SPI(0).CMD = SPI_CMD_SE;
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while (SPI(0).CMD) {};
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wait_idle(chip);
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return 0;
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIEraseSector
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*/
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static uint32_t IRAM spi_erase_sector(uint32_t sector)
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{
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if (sector >= (sdk_flashchip.chip_size / sdk_flashchip.sector_size)) {
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return 1;
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}
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if (write_enable(&sdk_flashchip)) {
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return 1;
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}
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if (sector_erase(&sdk_flashchip, sdk_flashchip.sector_size * sector)) {
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return 1;
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}
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return 0;
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_erase_sector
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*/
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uint32_t IRAM esp_spi_flash_erase(uint32_t sector)
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{
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vPortEnterCritical();
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Cache_Read_Disable();
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uint32_t result = spi_erase_sector(sector);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return result;
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}
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11
extras/spiffs/esp_spi_flash.h
Normal file
11
extras/spiffs/esp_spi_flash.h
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#ifndef __ESP_SPI_FLASH_H__
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#define __ESP_SPI_FLASH_H__
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#include <stdint.h>
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#include "common_macros.h"
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uint32_t IRAM esp_spi_flash_read(uint32_t dest_addr, void *src, uint32_t size);
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uint32_t IRAM esp_spi_flash_write(uint32_t dest_addr, void *dst, uint32_t size);
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uint32_t IRAM esp_spi_flash_erase(uint32_t sector);
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#endif // __ESP_SPI_FLASH_H__
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@ -9,11 +9,9 @@
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#include "spiffs.h"
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#include <espressif/spi_flash.h>
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#include <stdbool.h>
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#include "common_macros.h"
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#include "FreeRTOS.h"
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#include "esp/rom.h"
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#include <esp/uart.h>
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#include <fcntl.h>
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#include "esp_spi_flash.h"
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spiffs fs;
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@ -34,143 +32,6 @@ static fs_buf_t cache_buf = {0};
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#define ESP_SPIFFS_CACHE_PAGES 5
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// ROM functions
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uint32_t SPI_read_data(sdk_flashchip_t *p, uint32_t dest_addr, void *src,
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uint32_t size);
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uint32_t SPI_page_program(sdk_flashchip_t *p, uint32_t dest_addr, void *dst,
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uint32_t size);
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uint32_t SPI_write_enable(sdk_flashchip_t *p);
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uint32_t SPI_sector_erase(sdk_flashchip_t *p, uint32_t sector_addr);
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIRead
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*/
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uint32_t IRAM spi_read(uint32_t dest_addr, void *src, uint32_t size)
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{
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if (SPI_read_data(&sdk_flashchip, dest_addr, src, size)) {
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return 1;
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} else {
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return 0;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_read
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*/
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uint32_t IRAM spi_flash_read(uint32_t dest_addr, void *src, uint32_t size)
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{
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if (src) {
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vPortEnterCritical();
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Cache_Read_Disable();
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uint32_t result = spi_read(dest_addr, src, size);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return result;
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} else {
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return 1;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIWrite
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*/
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uint32_t IRAM spi_write(uint32_t dest_addr, void *dst, uint32_t size)
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{
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if (sdk_flashchip.chip_size < (dest_addr + size)) {
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return 1;
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}
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uint32_t write_bytes_to_page = sdk_flashchip.page_size -
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(dest_addr % sdk_flashchip.page_size);
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if (size < write_bytes_to_page) {
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if (SPI_page_program(&sdk_flashchip, dest_addr, dst, size)) {
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return 1;
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} else {
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return 0;
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}
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}
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if (SPI_page_program(&sdk_flashchip, dest_addr, dst, write_bytes_to_page)) {
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return 1;
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}
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uint32_t offset = write_bytes_to_page;
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uint32_t pages_to_write = (size - offset) / sdk_flashchip.page_size;
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for (uint8_t i = 0; i != pages_to_write; i++) {
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if (SPI_page_program(&sdk_flashchip, dest_addr + offset,
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dst + ((offset>>2)<<2), sdk_flashchip.page_size)) {
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return 1;
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}
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offset += sdk_flashchip.page_size;
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}
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if (SPI_page_program(&sdk_flashchip, dest_addr + offset,
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dst + ((offset>>2)<<2), size - offset)) {
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return 1;
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} else {
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return 0;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_write
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*/
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uint32_t IRAM spi_flash_write(uint32_t dest_addr, void *dst, uint32_t size)
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{
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if (dst) {
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if (size & 0b11) { // not 4-byte aligned
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size = size >> 2;
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size = (size << 2) + 1;
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}
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vPortEnterCritical();
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Cache_Read_Disable();
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uint32_t result = spi_write(dest_addr, dst, size);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return result;
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} else {
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return 1;
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}
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_SPIEraseSector
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*/
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uint32_t IRAM spi_erase_sector(uint32_t sector)
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{
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if (sector >= (sdk_flashchip.chip_size / sdk_flashchip.sector_size)) {
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return 1;
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}
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if (SPI_write_enable(&sdk_flashchip)) {
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return 1;
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}
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if (SPI_sector_erase(&sdk_flashchip, sdk_flashchip.sector_size * sector)) {
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return 1;
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}
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return 0;
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}
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/**
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* Reverse engineered implementation of spi_flash.o:sdk_spi_flash_erase_sector
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*/
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uint32_t IRAM spi_flash_erase_sector(uint32_t sector)
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{
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vPortEnterCritical();
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Cache_Read_Disable();
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||||
uint32_t result = spi_erase_sector(sector);
|
||||
|
||||
Cache_Read_Enable(0, 0, 1);
|
||||
vPortExitCritical();
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Flash addresses and size alignment is a rip-off of Arduino implementation.
|
||||
*/
|
||||
|
|
@ -187,7 +48,7 @@ static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst)
|
|||
if (addr < alignedBegin) {
|
||||
uint32_t nb = alignedBegin - addr;
|
||||
uint32_t tmp;
|
||||
if (spi_flash_read(alignedEnd - 4, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
if (esp_spi_flash_read(alignedEnd - 4, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_read failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
}
|
||||
|
|
@ -195,7 +56,7 @@ static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst)
|
|||
}
|
||||
|
||||
if (alignedEnd != alignedBegin) {
|
||||
if (spi_flash_read(alignedBegin,
|
||||
if (esp_spi_flash_read(alignedBegin,
|
||||
(uint32_t*) (dst + alignedBegin - addr),
|
||||
alignedEnd - alignedBegin) != SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_read failed\n");
|
||||
|
|
@ -206,7 +67,7 @@ static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst)
|
|||
if (addr + size > alignedEnd) {
|
||||
uint32_t nb = addr + size - alignedEnd;
|
||||
uint32_t tmp;
|
||||
if (spi_flash_read(alignedEnd, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
if (esp_spi_flash_read(alignedEnd, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_read failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
}
|
||||
|
|
@ -232,7 +93,7 @@ static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src)
|
|||
uint32_t nb = (size < ofs) ? size : ofs;
|
||||
uint8_t tmp[4] __attribute__((aligned(4))) = {0xff, 0xff, 0xff, 0xff};
|
||||
memcpy(tmp + 4 - ofs, src, nb);
|
||||
if (spi_flash_write(alignedBegin - 4, (uint32_t*) tmp, 4)
|
||||
if (esp_spi_flash_write(alignedBegin - 4, (uint32_t*) tmp, 4)
|
||||
!= SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_write failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
|
|
@ -243,7 +104,7 @@ static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src)
|
|||
uint32_t* srcLeftover = (uint32_t*) (src + alignedBegin - addr);
|
||||
uint32_t srcAlign = ((uint32_t) srcLeftover) & 3;
|
||||
if (!srcAlign) {
|
||||
if (spi_flash_write(alignedBegin, (uint32_t*) srcLeftover,
|
||||
if (esp_spi_flash_write(alignedBegin, (uint32_t*) srcLeftover,
|
||||
alignedEnd - alignedBegin) != SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_write failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
|
|
@ -255,7 +116,7 @@ static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src)
|
|||
size_t willCopy = sizeLeft < sizeof(buf) ? sizeLeft : sizeof(buf);
|
||||
memcpy(buf, srcLeftover, willCopy);
|
||||
|
||||
if (spi_flash_write(alignedBegin, (uint32_t*) buf, willCopy)
|
||||
if (esp_spi_flash_write(alignedBegin, (uint32_t*) buf, willCopy)
|
||||
!= SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_write failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
|
|
@ -273,7 +134,7 @@ static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src)
|
|||
uint32_t tmp = 0xffffffff;
|
||||
memcpy(&tmp, src + size - nb, nb);
|
||||
|
||||
if (spi_flash_write(alignedEnd, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
if (esp_spi_flash_write(alignedEnd, &tmp, 4) != SPI_FLASH_RESULT_OK) {
|
||||
printf("spi_flash_write failed\n");
|
||||
return SPIFFS_ERR_INTERNAL;
|
||||
}
|
||||
|
|
@ -295,7 +156,7 @@ static s32_t esp_spiffs_erase(u32_t addr, u32_t size)
|
|||
const uint32_t sectorCount = size / SPI_FLASH_SEC_SIZE;
|
||||
|
||||
for (uint32_t i = 0; i < sectorCount; ++i) {
|
||||
spi_flash_erase_sector(sector + i);
|
||||
esp_spi_flash_erase(sector + i);
|
||||
}
|
||||
return SPIFFS_OK;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue