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pvvx 2017-02-26 03:15:02 +03:00
parent 5615d7ab9c
commit e851661fa4
71 changed files with 2326 additions and 11244 deletions
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7
.cproject
View file

@ -141,7 +141,7 @@
</toolChain> </toolChain>
</folderInfo> </folderInfo>
<sourceEntries> <sourceEntries>
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</sourceEntries> </sourceEntries>
</configuration> </configuration>
</storageModule> </storageModule>
@ -486,6 +486,7 @@
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof.1627791721.1436404427" name="Generate prof information (-p)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof.1627791721"/> <option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof.1627791721.1436404427" name="Generate prof information (-p)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.prof.1627791721"/>
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof.977946526.1412845431" name="Generate gprof information (-pg)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof.977946526"/> <option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof.977946526.1412845431" name="Generate gprof information (-pg)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.gprof.977946526"/>
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.other.70094073.566509087" name="Other debugging flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.other.70094073"/> <option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.other.70094073.566509087" name="Other debugging flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.other.70094073"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform" isAbstract="false" osList="all" superClass="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform"/>
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.1622564502" name="Cross ARM GNU Assembler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.986275098"> <tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.1622564502" name="Cross ARM GNU Assembler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.986275098">
<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input.1333644780" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input"/> <inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input.1333644780" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input"/>
</tool> </tool>
@ -505,7 +506,7 @@
</folderInfo> </folderInfo>
<sourceEntries> <sourceEntries>
<entry excluding="RTL00_SDKV35a|${ProjSDK}|project/realtek_ameba1_va0_example/disasm_to_c_boot|component/soc/realtek/8195a/misc/gcc_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_1.c|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM4F|doc|project/realtek_ameba1_va0_example/example_sources|build|project/realtek_ameba1_va0_example/GCC-RELEASE|component/common/network/lwip/lwip_v1.5.0.beta|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_4.c|component1|component/common/network/lwip/lwip_v1.3.2|flasher|component/os/freertos/freertos_v8.1.2/Source/portable/IAR|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3_MPU|component/common/network/lwip/lwip_v1.4.1/port/stm32f2x7|component/os/freertos/freertos_v8.1.2/Demo|component/os/freertos/freertos_v8.1.2/Source/portable/RVDS|component/soc/realtek/8195a/misc/iar_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_3.c|tools|component/common/network/ssl/polarssl-1.3.8/ssl_self_test.c|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_2.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/> <entry excluding="RTL00_SDKV35a|${ProjSDK}|project/realtek_ameba1_va0_example/disasm_to_c_boot|component/soc/realtek/8195a/misc/gcc_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_1.c|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM4F|doc|project/realtek_ameba1_va0_example/example_sources|build|project/realtek_ameba1_va0_example/GCC-RELEASE|component/common/network/lwip/lwip_v1.5.0.beta|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_4.c|component1|component/common/network/lwip/lwip_v1.3.2|flasher|component/os/freertos/freertos_v8.1.2/Source/portable/IAR|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3_MPU|component/common/network/lwip/lwip_v1.4.1/port/stm32f2x7|component/os/freertos/freertos_v8.1.2/Demo|component/os/freertos/freertos_v8.1.2/Source/portable/RVDS|component/soc/realtek/8195a/misc/iar_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_3.c|tools|component/common/network/ssl/polarssl-1.3.8/ssl_self_test.c|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_2.c" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name=""/>
<entry excluding=".git/|.settings/|AutoMake/|build/|flasher/|LibAutoMake/|project/" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="RTL00_SDKV35a"/> <entry excluding="component/soc/realtek/8195a/misc/iar_utility|doc|example_sources|.git/|.settings/|AutoMake/|build/|flasher/|LibAutoMake/|project/" flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="RTL00_SDKV35a"/>
</sourceEntries> </sourceEntries>
</configuration> </configuration>
</storageModule> </storageModule>
@ -806,7 +807,7 @@
</toolChain> </toolChain>
</folderInfo> </folderInfo>
<sourceEntries> <sourceEntries>
<entry excluding="RTL00_SDKV35a/project|project/realtek_ameba1_va0_example/disasm_to_c_boot|component/soc/realtek/8195a/misc/gcc_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_1.c|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM4F|doc|project/realtek_ameba1_va0_example/example_sources|build|project/realtek_ameba1_va0_example/GCC-RELEASE|component/common/network/lwip/lwip_v1.5.0.beta|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_4.c|component1|component/common/network/lwip/lwip_v1.3.2|flasher|component/os/freertos/freertos_v8.1.2/Source/portable/IAR|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3_MPU|component/common/network/lwip/lwip_v1.4.1/port/stm32f2x7|component/os/freertos/freertos_v8.1.2/Demo|component/os/freertos/freertos_v8.1.2/Source/portable/RVDS|component/soc/realtek/8195a/misc/iar_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_3.c|tools|component/common/network/ssl/polarssl-1.3.8/ssl_self_test.c|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_2.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> <entry excluding="RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility|RTL00_SDKV35a/doc|RTL00_SDKV35a/example_sources|RTL00_SDKV35a/project|project/realtek_ameba1_va0_example/disasm_to_c_boot|component/soc/realtek/8195a/misc/gcc_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_1.c|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM4F|doc|project/realtek_ameba1_va0_example/example_sources|build|project/realtek_ameba1_va0_example/GCC-RELEASE|component/common/network/lwip/lwip_v1.5.0.beta|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_4.c|component1|component/common/network/lwip/lwip_v1.3.2|flasher|component/os/freertos/freertos_v8.1.2/Source/portable/IAR|component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3_MPU|component/common/network/lwip/lwip_v1.4.1/port/stm32f2x7|component/os/freertos/freertos_v8.1.2/Demo|component/os/freertos/freertos_v8.1.2/Source/portable/RVDS|component/soc/realtek/8195a/misc/iar_utility|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_3.c|tools|component/common/network/ssl/polarssl-1.3.8/ssl_self_test.c|component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_2.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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</configuration> </configuration>
</storageModule> </storageModule>

1
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
View file

@ -587,6 +587,7 @@
#define BIT_SYS_SYSPLL_LVPC_EN BIT(0) #define BIT_SYS_SYSPLL_LVPC_EN BIT(0)
//2 REG_SYS_SYSPLL_CTRL1 //2 REG_SYS_SYSPLL_CTRL1
#define BIT_SYS_SYSPLL_DIV5_3 BIT(17)
#define BIT_SYS_SYSPLL_CK500K_SEL BIT(15) #define BIT_SYS_SYSPLL_CK500K_SEL BIT(15)
#define BIT_SYS_SYSPLL_CK200M_EN BIT(14) #define BIT_SYS_SYSPLL_CK200M_EN BIT(14)
#define BIT_SYS_SYSPLL_CKSDR_EN BIT(13) #define BIT_SYS_SYSPLL_CKSDR_EN BIT(13)

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform.a.0
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Binary file not shown.

16
RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld
View file

@ -8,7 +8,7 @@ INCLUDE "export-rom_v04.txt"
MEMORY MEMORY
{ {
ROM_USED_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */ ROM_USED_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */
ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */ ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */
RAM_HEAP1 (rwx) : ORIGIN = 0x10003000, LENGTH = 12K /* end 0x10006000 */ RAM_HEAP1 (rwx) : ORIGIN = 0x10003000, LENGTH = 12K /* end 0x10006000 */
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */ BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */ TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */
@ -125,11 +125,11 @@ SECTIONS
*(.hal.gpio.text*) *(.hal.gpio.text*)
*(.fwu.text*) *(.fwu.text*)
*(.otg.rom.text*) *(.otg.rom.text*)
*(.text*)
*(.sdram.text*) *(.sdram.text*)
*(.p2p.text*) *(.p2p.text*)
*(.wps.text*) *(.wps.text*)
*(.websocket.text*) *(.websocket.text*)
*(.text*)
} > BD_RAM } > BD_RAM
.ram_image2.rodata : .ram_image2.rodata :
@ -156,6 +156,10 @@ SECTIONS
{ {
__data_start__ = .; __data_start__ = .;
*(.data*) *(.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
*(.sdram.data*)
__data_end__ = .; __data_end__ = .;
__ram_image2_text_end__ = .; __ram_image2_text_end__ = .;
} > BD_RAM } > BD_RAM
@ -170,12 +174,8 @@ SECTIONS
*(.fwu.data*) *(.fwu.data*)
*(.bdsram.data*) *(.bdsram.data*)
*(.bfsram.data*) *(.bfsram.data*)
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
*(.bss*)
*(COMMON) *(COMMON)
*(.bss*)
*(.sdram.bss*) *(.sdram.bss*)
*(.p2p.bss*) *(.p2p.bss*)
*(.wps.bss*) *(.wps.bss*)
@ -222,5 +222,3 @@ SECTIONS
KEEP(*(.loader.head*)) KEEP(*(.loader.head*))
} }
} }

7
RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c
View file

@ -9,13 +9,13 @@
#include "rtl8195a.h" #include "rtl8195a.h"
//#include <stdarg.h> //#include <stdarg.h>
#include "rtl_consol.h" #include "rtl_bios_data.h"
//#include "rtl_consol.h"
#include "osdep_api.h" #include "osdep_api.h"
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1) #if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
#include "freertos_pmu.h" #include "freertos_pmu.h"
#endif #endif
#include "tcm_heap.h" #include "tcm_heap.h"
#include "rtl_bios_data.h"
//MON_RAM_BSS_SECTION UART_LOG_CTL UartLogCtl; //MON_RAM_BSS_SECTION UART_LOG_CTL UartLogCtl;
//MON_RAM_BSS_SECTION UART_LOG_CTL *pUartLogCtl; //MON_RAM_BSS_SECTION UART_LOG_CTL *pUartLogCtl;
@ -316,8 +316,7 @@ RtlConsolTaskRam(
//4 Set this for UartLog check cmd history //4 Set this for UartLog check cmd history
#ifdef CONFIG_KERNEL #ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 1; pUartLogCtl->TaskRdy = 1;
#endif #else
#ifndef CONFIG_KERNEL
pUartLogCtl->BootRdy = 1; pUartLogCtl->BootRdy = 1;
#endif #endif
do{ do{

23
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf
View file

@ -1,23 +0,0 @@
;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Used to define address zones within the ARM address space (Memory).
;;
;; Name may be almost anything
;; AdrSpace must be Memory
;; StartAdr start of memory block
;; EndAdr end of memory block
;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
[Memory]
;; Name AdrSpace StartAdr EndAdr AccType Width
Memory = ROM Memory 0x00000000 0x003FFFFF RW
Memory = SRAM Memory 0x10000000 0x1FFFFFFF RW
Memory = DRAM Memory 0x30000000 0x30FFFFFF RW
Memory = SFR Memory 0x40000000 0x41FFFFFF RW
Memory = SFR_Bitband Memory 0x42000000 0x43FFFFFF RW
Memory = PPB Memory 0xE0000000 0xFFFFFFFF RW
TrustedRanges = true
UseSfrFilter = true
[SfrInclude]

41
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac
View file

@ -1,41 +0,0 @@
__load_dram_param(){
//DRAM_INFO
DeviceType = 8; //DRAM_SDR
Page = 0; //DRAM_COLADDR_8B
Bank=0; //DRAM_BANK_2
DqWidth=0; //DRAM_DQ_1
//DRAM_MODE_REG_INFO
BstLen=0; //BST_LEN_4
BstType=0; //SENQUENTIAL
Mode0Cas=3;
Mode0Wr=0;
Mode1DllEnN=0;
Mode1AllLat=0;
Mode2Cwl=0;
//DRAM_TIMING_INFO
DramTimingTref = 64000;
DramRowNum = 8192;
//SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
Tck = 80000; //SDR 12.5MHZ
TrfcPs=60000;
TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
WrMaxTck=2;
TrcdPs=15000;
TrpPs=15000;
TrasPs=42000;
TrrdTck=2;
TwrPs=Tck*2;
TwtrTck=0;
TmrdTck=2;
TrtpTck=0;
TccdTck=1;
TrcPs=60000;
//DRAM_DEVICE_INFO
DdrPeriodPs=Tck;
DfiRate=0; //DFI_RATIO_1
}

4
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac
View file

@ -1,4 +0,0 @@
__load_dram_common(){
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
}

4
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt
View file

@ -1,4 +0,0 @@
To Change DRAM setting
1. Create and Fill content like EM6A6165TS_7G.mac
2. Change load file in common.mac

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader.zip Normal file
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281
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.dep
View file

@ -1,281 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>2</fileVersion>
<fileChecksum>4138292931</fileChecksum>
<configuration>
<name>Debug</name>
<outputs>
<file>$PROJ_DIR$\Debug\Obj\FlashLoader.pbd</file>
<file>$PROJ_DIR$\framework2\flash_loader.c</file>
<file>$PROJ_DIR$\framework2\flash_loader_asm.s</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.o</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Threads.h</file>
<file>$TOOLKIT_DIR$\inc\c\yvals.h</file>
<file>$TOOLKIT_DIR$\inc\c\stdint.h</file>
<file>$PROJ_DIR$\framework2\flash_loader.h</file>
<file>$PROJ_DIR$\framework2\flash_config.h</file>
<file>$PROJ_DIR$\framework2\flash_loader_extra.h</file>
<file>$TOOLKIT_DIR$\inc\c\ycheck.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.o</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Defaults.h</file>
<file>$TOOLKIT_DIR$\inc\c\xencoding_limits.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Product.h</file>
<file>$PROJ_DIR$\..\FlashRTL8195aMP.out</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.o</file>
<file>$TOOLKIT_DIR$\inc\c\stddef.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.pbi</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader_asm.o</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.pbi</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_timer.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_util.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_diag.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_irqn.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_peri_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\..\common\bsp\basic_types.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_peri_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_spi_flash.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_common.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\..\common\bsp\section_config.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_timer.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cmFunc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cm3.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_sys_on.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_pinmux.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_soc_ps_monitor.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\device\diag.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_platform.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_api.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_misc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_vector_table.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_spi_flash.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_efuse.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\cmsis\core_cmInstr.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_log_uart.h</file>
<file>$PROJ_DIR$\flash_MX25L8008.c</file>
<file>$PROJ_DIR$\rtl8195a\hal_misc.c</file>
<file>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</file>
<file>$TOOLKIT_DIR$\inc\c\ysizet.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a.h</file>
<file>$TOOLKIT_DIR$\inc\c\DLib_Product_string.h</file>
<file>$TOOLKIT_DIR$\lib\rt7M_tl.a</file>
<file>$PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.__cstat.et</file>
<file>$TOOLKIT_DIR$\inc\c\string.h</file>
<file>$TOOLKIT_DIR$\inc\c\stdlib.h</file>
<file>$PROJ_DIR$\Debug\Obj\flash_loader.__cstat.et</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.__cstat.et</file>
<file>$PROJ_DIR$\Debug\Obj\flash_MX25L8008.__cstat.et</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_dac.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2s.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2s.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_pwm.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_pwm.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_wdt.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2c.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_adc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_nfc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2c.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_dac.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_nfc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_adc.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_mii.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a_usb.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_mii.h</file>
<file>$TOOLKIT_DIR$\lib\m7M_tl.a</file>
<file>$TOOLKIT_DIR$\lib\dl7M_tln.a</file>
<file>$PROJ_DIR$\platform_autoconf.h</file>
<file>$PROJ_DIR$\..\FlashLoader.bin</file>
<file>$PROJ_DIR$\mx25l8008_flashloader_mp.icf</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_ssi.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_gdma.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_ssi.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_uart.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_gpio.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gpio.h</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gdma.h</file>
<file>$PROJ_DIR$\Debug\List\FlashRTL8195aMP.map</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\hal_uart.h</file>
<file>$PROJ_DIR$\Debug\Obj\hal_misc.o</file>
<file>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</file>
</outputs>
<file>
<name>$PROJ_DIR$\framework2\flash_loader.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 21</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 3</file>
</tool>
<tool>
<name>__cstat</name>
<file> 59</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 9 6 5 10 4 7 8 12 13 14 15</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 7 8 6 10 5 12 14 15 13 4 9</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\framework2\flash_loader_asm.s</name>
<outputs>
<tool>
<name>AARM</name>
<file> 22</file>
</tool>
</outputs>
</file>
<file>
<name>[ROOT_NODE]</name>
<outputs>
<tool>
<name>ILINK</name>
<file> 16 92</file>
</tool>
</outputs>
</file>
<file>
<name>$PROJ_DIR$\..\FlashRTL8195aMP.out</name>
<outputs>
<tool>
<name>ILINK</name>
<file> 92</file>
</tool>
<tool>
<name>OBJCOPY</name>
<file> 83</file>
</tool>
</outputs>
<inputs>
<tool>
<name>ILINK</name>
<file> 84 3 22 18 94 11 55 80 81</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\flash_MX25L8008.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 23</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 18</file>
</tool>
<tool>
<name>__cstat</name>
<file> 61</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 42 26 89 69 4 43 87 78 53 10 5 29 46 65 62 41 74 7 52 6 45 39 66 79 27 58 9 54 12 13 14 15 37 44 24 40 91 93 73 70 71 82 19 35 86 57 8 33 30 38 28 31 25 32 36 90 85 88 72 67 64 63 75 68 76 48 77 34 47</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 57 10 5 12 14 15 13 4 52 54 58 7 8 6 9 53 82 29 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_misc.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 17</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 94</file>
</tool>
<tool>
<name>__cstat</name>
<file> 60</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 42 24 10 26 91 89 69 93 70 13 15 87 78 37 44 40 73 71 29 53 74 41 43 45 46 39 66 65 62 79 12 14 82 6 33 30 38 28 27 31 25 32 36 86 90 85 88 72 67 64 63 75 68 76 48 77 5 4 34 35 19 52 47</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 20</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 11</file>
</tool>
<tool>
<name>__cstat</name>
<file> 56</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</name>
<outputs>
<tool>
<name>BICOMP</name>
<file> 20</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 11</file>
</tool>
<tool>
<name>__cstat</name>
<file> 56</file>
</tool>
</outputs>
<inputs>
<tool>
<name>BICOMP</name>
<file> 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78</file>
</tool>
<tool>
<name>ICCARM</name>
<file> 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79</file>
</tool>
</inputs>
</file>
</configuration>
</project>

1522
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewd
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995
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewp
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@ -1,995 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
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<name>ObjPath</name>
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<state>1</state>
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<option>
<name>AWarnOne</name>
<state></state>
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<state></state>
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<name>AWarnRange2</name>
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</option>
<option>
<name>AltRegisterNames</name>
<state>0</state>
</option>
<option>
<name>ADefines</name>
<state></state>
</option>
<option>
<name>AList</name>
<state>0</state>
</option>
<option>
<name>AListHeader</name>
<state>1</state>
</option>
<option>
<name>AListing</name>
<state>1</state>
</option>
<option>
<name>Includes</name>
<state>0</state>
</option>
<option>
<name>MacDefs</name>
<state>0</state>
</option>
<option>
<name>MacExps</name>
<state>1</state>
</option>
<option>
<name>MacExec</name>
<state>0</state>
</option>
<option>
<name>OnlyAssed</name>
<state>0</state>
</option>
<option>
<name>MultiLine</name>
<state>0</state>
</option>
<option>
<name>PageLengthCheck</name>
<state>0</state>
</option>
<option>
<name>PageLength</name>
<state>80</state>
</option>
<option>
<name>TabSpacing</name>
<state>8</state>
</option>
<option>
<name>AXRef</name>
<state>0</state>
</option>
<option>
<name>AXRefDefines</name>
<state>0</state>
</option>
<option>
<name>AXRefInternal</name>
<state>0</state>
</option>
<option>
<name>AXRefDual</name>
<state>0</state>
</option>
<option>
<name>AProcessor</name>
<state>1</state>
</option>
<option>
<name>AFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>AOutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>AMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsCheck</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsEdit</name>
<state>100</state>
</option>
<option>
<name>AIgnoreStdInclude</name>
<state>0</state>
</option>
<option>
<name>AUserIncludes</name>
<state></state>
</option>
<option>
<name>AExtraOptionsCheckV2</name>
<state>0</state>
</option>
<option>
<name>AExtraOptionsV2</name>
<state></state>
</option>
<option>
<name>AsmNoLiteralPool</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>OBJCOPY</name>
<archiveVersion>0</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>OOCOutputFormat</name>
<version>3</version>
<state>3</state>
</option>
<option>
<name>OCOutputOverride</name>
<state>1</state>
</option>
<option>
<name>OOCOutputFile</name>
<state>FlashLoader.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
<state>1</state>
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>CUSTOM</name>
<archiveVersion>3</archiveVersion>
<data>
<extensions></extensions>
<cmdline></cmdline>
<hasPrio>0</hasPrio>
</data>
</settings>
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data/>
</settings>
<settings>
<name>BUILDACTION</name>
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild></postbuild>
</data>
</settings>
<settings>
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>16</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>IlinkLibIOConfig</name>
<state>1</state>
</option>
<option>
<name>XLinkMisraHandler</name>
<state>0</state>
</option>
<option>
<name>IlinkInputFileSlave</name>
<state>0</state>
</option>
<option>
<name>IlinkOutputFile</name>
<state>FlashRTL8195aMP.out</state>
</option>
<option>
<name>IlinkDebugInfoEnable</name>
<state>1</state>
</option>
<option>
<name>IlinkKeepSymbols</name>
<state></state>
</option>
<option>
<name>IlinkRawBinaryFile</name>
<state></state>
</option>
<option>
<name>IlinkRawBinarySymbol</name>
<state></state>
</option>
<option>
<name>IlinkRawBinarySegment</name>
<state></state>
</option>
<option>
<name>IlinkRawBinaryAlign</name>
<state></state>
</option>
<option>
<name>IlinkDefines</name>
<state></state>
</option>
<option>
<name>IlinkConfigDefines</name>
<state></state>
</option>
<option>
<name>IlinkMapFile</name>
<state>1</state>
</option>
<option>
<name>IlinkLogFile</name>
<state>0</state>
</option>
<option>
<name>IlinkLogInitialization</name>
<state>0</state>
</option>
<option>
<name>IlinkLogModule</name>
<state>0</state>
</option>
<option>
<name>IlinkLogSection</name>
<state>0</state>
</option>
<option>
<name>IlinkLogVeneer</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfOverride</name>
<state>1</state>
</option>
<option>
<name>IlinkIcfFile</name>
<state>$PROJ_DIR$\mx25l8008_flashloader_mp.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
<state></state>
</option>
<option>
<name>IlinkEnableRemarks</name>
<state>0</state>
</option>
<option>
<name>IlinkSuppressDiags</name>
<state>Lp048, Lp049</state>
</option>
<option>
<name>IlinkTreatAsRem</name>
<state></state>
</option>
<option>
<name>IlinkTreatAsWarn</name>
<state></state>
</option>
<option>
<name>IlinkTreatAsErr</name>
<state></state>
</option>
<option>
<name>IlinkWarningsAreErrors</name>
<state>0</state>
</option>
<option>
<name>IlinkUseExtraOptions</name>
<state>0</state>
</option>
<option>
<name>IlinkExtraOptions</name>
<state></state>
</option>
<option>
<name>IlinkLowLevelInterfaceSlave</name>
<state>1</state>
</option>
<option>
<name>IlinkAutoLibEnable</name>
<state>1</state>
</option>
<option>
<name>IlinkAdditionalLibs</name>
<state></state>
</option>
<option>
<name>IlinkOverrideProgramEntryLabel</name>
<state>1</state>
</option>
<option>
<name>IlinkProgramEntryLabelSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkProgramEntryLabel</name>
<state>FlashInitEntry</state>
</option>
<option>
<name>DoFill</name>
<state>0</state>
</option>
<option>
<name>FillerByte</name>
<state>0xFF</state>
</option>
<option>
<name>FillerStart</name>
<state>0x0</state>
</option>
<option>
<name>FillerEnd</name>
<state>0x0</state>
</option>
<option>
<name>CrcSize</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
</option>
<option>
<name>CrcCompl</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CrcBitOrder</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CrcInitialValue</name>
<state>0x0</state>
</option>
<option>
<name>DoCrc</name>
<state>0</state>
</option>
<option>
<name>IlinkBE8Slave</name>
<state>1</state>
</option>
<option>
<name>IlinkBufferedTerminalOutput</name>
<state>1</state>
</option>
<option>
<name>IlinkStdoutInterfaceSlave</name>
<state>1</state>
</option>
<option>
<name>CrcFullSize</name>
<state>0</state>
</option>
<option>
<name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
<option>
<name>IlinkLogAutoLibSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkLogRedirSymbols</name>
<state>0</state>
</option>
<option>
<name>IlinkLogUnusedFragments</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcReverseByteOrder</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcUseAsInput</name>
<state>1</state>
</option>
<option>
<name>IlinkOptInline</name>
<state>0</state>
</option>
<option>
<name>IlinkOptExceptionsAllow</name>
<state>0</state>
</option>
<option>
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>0</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
<option>
<name>IlinkStackAnalysisEnable</name>
<state>0</state>
</option>
<option>
<name>IlinkStackControlFile</name>
<state></state>
</option>
<option>
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>IlinkThreadsSlave</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARCHIVE</name>
<archiveVersion>0</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>IarchiveInputs</name>
<state></state>
</option>
<option>
<name>IarchiveOverride</name>
<state>0</state>
</option>
<option>
<name>IarchiveOutput</name>
<state>###Unitialized###</state>
</option>
</data>
</settings>
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data/>
</settings>
</configuration>
<group>
<name>Framework</name>
<file>
<name>$PROJ_DIR$\framework2\flash_loader.c</name>
</file>
<file>
<name>$PROJ_DIR$\framework2\flash_loader_asm.s</name>
</file>
</group>
<group>
<name>rtl8195a</name>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_misc.c</name>
</file>
<file>
<name>$PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\flash_MX25L8008.c</name>
</file>
</project>

1074
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewt
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File diff suppressed because it is too large Load diff

10
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.eww
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@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\FlashLoader.ewp</path>
</project>
<batchBuild/>
</workspace>

395
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/flash_MX25L8008.c
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@ -1,395 +0,0 @@
/*******************************************************************************
*
* Project: Realtek Ameba flash loader project
*
* Description: Memory-specific routines for Flash Loader.
*
* Copyright by Diolan Ltd. All rights reserved.
*
*******************************************************************************/
#include <string.h>
#include <stdlib.h>
#include "flash_loader.h"
#include "flash_loader_extra.h"
#include "rtl8195a.h"
//#include "rtl8195a/hal_misc.h"
//#include "rtl8195a/hal_spi_flash.h"
//#include "rtl8195a/core_cm3.h"
extern VOID
HalReInitPlatformLogUart(
VOID
);
extern VOID
PatchHalInitPlatformTimer(
VOID
);
extern VOID
PatchHalInitPlatformLogUart(
VOID
);
extern VOID
PatchSpicInitRtl8195A
(
IN u8 InitBaudRate,
IN u8 SpicBitMode
);
extern VOID
SpicLoadInitParaFromClockRtl8195A
(
IN u8 CpuClkMode,
IN u8 BaudRate,
IN PSPIC_INIT_PARA pSpicInitPara
);
extern VOID
SpicWaitBusyDoneRtl8195A();
extern VOID
SpicWaitWipDoneRtl8195A
(
IN SPIC_INIT_PARA SpicInitPara
);
extern VOID
SpicTxCmdRtl8195A
(
IN u8 cmd,
IN SPIC_INIT_PARA SpicInitPara
);
extern u8
SpicGetFlashStatusRtl8195A
(
IN SPIC_INIT_PARA SpicInitPara
);
__no_init unsigned int flash_loc;
__no_init unsigned int erase_loc;
__no_init unsigned int is_cascade;
__no_init unsigned int is_head;
__no_init unsigned int is_dbgmsg;
__no_init unsigned int is_erasecal;
__no_init unsigned int img2_addr;
int rest_count;
int first_write;
SPIC_INIT_PARA SpicInitPara;
#define PATTERN_1 0x96969999
#define PATTERN_2 0xFC66CC3F
#define PATTERN_3 0x03CC33C0
#define PATTERN_4 0x6231DCE5
#define DBGPRINT(fmt, arg...) do \
{ if( is_dbgmsg ) DiagPrintf(fmt, ##arg); }\
while(0)
//unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
unsigned int seg_head[4] = {0,0,0,0};
extern SPIC_INIT_PARA SpicInitCPUCLK[4];
void dump_flash_header(void)
{
uint32_t data;
data = HAL_READ32(SPI_FLASH_BASE, 0);
DBGPRINT("\n\r 0: %x", data);
data = HAL_READ32(SPI_FLASH_BASE, 4);
DBGPRINT("\n\r 4: %x", data);
data = HAL_READ32(SPI_FLASH_BASE, 8);
DBGPRINT("\n\r 8: %x", data);
data = HAL_READ32(SPI_FLASH_BASE, 12);
DBGPRINT("\n\r 12: %x", data);
}
const char* find_option(char* option, int withValue, int argc, char const* argv[])
{
int i;
for (i = 0; i < argc; i++) {
if (strcmp(option, argv[i]) == 0){
if (withValue) {
if (i + 1 < argc) {
// The next argument is the value.
return argv[i + 1];
}
else {
// The option was found but there is no value to return.
return 0;
}
}
else
{
// Return the flag argument itself just to get a non-zero pointer.
return argv[i];
}
}
}
return 0;
}
static VOID
FlashDownloadHalInitialROMCodeGlobalVar(VOID)
{
// to initial ROM code using global variable
ConfigDebugErr = _DBG_MISC_;
ConfigDebugInfo= 0x0;
ConfigDebugWarn= 0x0;
}
/*
static VOID
FlashDownloadHalCleanROMCodeGlobalVar(VOID)
{
ConfigDebugErr = 0x0;
ConfigDebugInfo= 0x0;
ConfigDebugWarn= 0x0;
}
*/
// Please clean this Array
extern SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
u8 FlashType;
uint32_t FlashInit(void *base_of_flash, uint32_t image_size, uint32_t link_address, uint32_t flags, int argc, char const *argv[])
{
u8 CpuClk;
u8 Value8, InitBaudRate;
char *addr;
SPIC_INIT_PARA InitCPUCLK[4] = {
{0x1,0x1,0x5E,0}, //default cpu 41, baud 1
{0x1,0x1,0x0,0}, //cpu 20.8 , baud 1
{0x1,0x2,0x23,0}, //cpu 83.3, baud 1
{0x1,0x5,0x5,0},
};
memcpy(SpicInitCPUCLK, InitCPUCLK, sizeof(InitCPUCLK));
memset(SpicInitParaAllClk, 0, sizeof(SPIC_INIT_PARA)*3*CPU_CLK_TYPE_NO);
SpicInitPara.BaudRate = 0;
SpicInitPara.DelayLine = 0;
SpicInitPara.RdDummyCyle = 0;
SpicInitPara.Rsvd = 0;
if(find_option( "--erase_cal", 0, argc, argv ))
is_erasecal = 1;
else
is_erasecal = 0;
if(find_option( "--cascade", 0, argc, argv ))
is_cascade = 1;
else
is_cascade = 0;
if(find_option( "--head", 0, argc, argv ))
is_head = 1;
else
is_head = 0;
if(find_option( "--dbgmsg", 0, argc, argv ))
is_dbgmsg = 1;
else
is_dbgmsg = 0;
if( (addr = (char*)find_option( "--img2_addr", 1, argc, argv))){
img2_addr = atol(addr)/1024; // strtod(addr, NULL)/1024; //
DBG_8195A(" image2 start address = %s, offset = %x\n\r", addr, img2_addr);
}else
img2_addr = 0;
memset((void *) 0x10000300, 0, 0xbc0-0x300);
// Load Efuse Setting
Value8 = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6) & 0xFF000000)
>> 24);
InitBaudRate = ((Value8 & 0xC)>>2);
// Make sure InitBaudRate != 0
if (!InitBaudRate) {
InitBaudRate +=1;
}
CpuClk = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
// Reset to low speed
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1, 0x21);
FlashDownloadHalInitialROMCodeGlobalVar();
//2 Need Modify
VectorTableInitRtl8195A(0x1FFFFFFC);
//3 Initial Log Uart
PatchHalInitPlatformLogUart();
//3 Initial hardware timer
PatchHalInitPlatformTimer();
DBG_8195A("\r\n===> Flash Init \n\r");
//4 Initialize the flash first
if (HAL_READ32(REG_SOC_FUNC_EN,BIT_SOC_FLASH_EN) & BIT_SOC_FLASH_EN) {
FLASH_FCTRL(OFF);
}
FLASH_FCTRL(ON);
ACTCK_FLASH_CCTRL(ON);
SLPCK_FLASH_CCTRL(ON);
PinCtrl(SPI_FLASH,S0,ON);
PatchSpicInitRtl8195A(SpicInitPara.BaudRate, SpicOneBitMode);
SpicFlashInitRtl8195A(SpicOneBitMode);
FlashType = SpicInitParaAllClk[SpicOneBitMode][0].flashtype;
char* vendor[] = {"Others", "MXIC", "Winbond", "Micron"};
DBG_8195A("\r\n===> Flash Init Done, vendor: \x1b[32m%s\x1b[m \n\r", vendor[FlashType]);
first_write = 1;
rest_count = theFlashParams.block_size;
seg_head[0] = theFlashParams.block_size;
seg_head[1] = theFlashParams.offset_into_block;
if(is_head){
seg_head[2] = 0xFFFF0000|img2_addr;
seg_head[3] = 0xFFFFFFFF;
}else{
if(is_cascade==0){
// Image2 signature
seg_head[2] = 0x35393138; //8195
seg_head[3] = 0x31313738; //8711
}else{
seg_head[2] = 0xFFFFFFFF;
seg_head[3] = 0xFFFFFFFF;
}
}
//DBG_8195A("link_address = %08x, flags = %08x ...\n\r", link_address, flags);
if(is_cascade==0 && is_head==0){
// mark partition 2 to old if existing
unsigned int ota_addr = HAL_READ32(SPI_FLASH_BASE, 0x9000);
//check OTA address valid
if( ota_addr == 0xFFFFFFFF || ota_addr > 64*1024*1024 ){
DBG_8195A("\r\n\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
DBG_8195A("continue downloading...\n\r" );
return RESULT_OK;
}else{
DBG_8195A("\x1b[36mOTA addr is %x \x1b[m\n\r", ota_addr );
}
int sig0 = HAL_READ32(SPI_FLASH_BASE, ota_addr+8);
int sig1 = HAL_READ32(SPI_FLASH_BASE, ota_addr+12);
if(sig0==0x35393138 && sig1==0x31313738){
DBG_8195A("\r\n>>>> mark parition 2 as older \n\r" );
HAL_WRITE32(SPI_FLASH_BASE, ota_addr+8, 0x35393130); // mark to older version
// wait spic busy done
SpicWaitBusyDoneRtl8195A();
// wait flash busy done (wip=0)
if(FlashType == FLASH_MICRON)
SpicWaitOperationDoneRtl8195A(SpicInitPara);
else
SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
}
}
dump_flash_header();
//SpicEraseFlashRtl8195A();
return RESULT_OK;
}
void write_spi_flash(uint32_t data)
{
HAL_WRITE32(SPI_FLASH_BASE, flash_loc, data);
// wait spic busy done
SpicWaitBusyDoneRtl8195A();
// wait flash busy done (wip=0)
if(FlashType == FLASH_MICRON)
SpicWaitOperationDoneRtl8195A(SpicInitPara);
else
SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
flash_loc+=4;
}
uint32_t FlashWrite(void *block_start, uint32_t offset_into_block, uint32_t count, char const *buffer)
{
int write_cnt=0;
uint32_t* buffer32 = (uint32_t*)buffer;
DBG_8195A("\r\n===> Flash Write, start %x, addr %x, offset %d, count %d, buf %x\n\r", block_start, flash_loc, offset_into_block, count, buffer);
if(first_write){
if(!is_cascade){
flash_loc = (unsigned int)block_start;
}
if(is_head){
unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
DBGPRINT("Write FW header....");
flash_loc=0;
write_spi_flash(fw_head[0]);
write_spi_flash(fw_head[1]);
write_spi_flash(fw_head[2]);
write_spi_flash(fw_head[3]);
DBGPRINT("Write FW header.... %x %x %x %x --> Done\n\r", fw_head[0], fw_head[1], fw_head[2], fw_head[3]);
}
DBGPRINT("Write SEG header....");
first_write = 0;
write_spi_flash(seg_head[0]);
write_spi_flash(seg_head[1]);
write_spi_flash(seg_head[2]);
write_spi_flash(seg_head[3]);
DBGPRINT("Write SEG header.... %x %x %x %x --> Done\n\r", seg_head[0], seg_head[1], seg_head[2], seg_head[3]);
}
if(rest_count < count)
count = rest_count;
// DO Write Here
DBG_8195A("Write Binary....");
while (write_cnt < count)
{
write_spi_flash(*buffer32);
write_cnt += 4;
buffer32++;
}
DBG_8195A("Write Binary....Done\n\r");
rest_count-=count;
DBG_8195A("\r\n<=== Flash Write Done %x\n\r", flash_loc);
DBGPRINT("first 4 bytes %2x %2x %2x %2x\n\r", buffer[0],buffer[1],buffer[2],buffer[3]);
DBGPRINT("last 4 bytes %2x %2x %2x %2x\n\r", buffer[count-4],buffer[count-3],buffer[count-2],buffer[count-1]);
return RESULT_OK;
}
uint32_t FlashErase(void *block_start, uint32_t block_size)
{
if(is_head == 1)
erase_loc = 0;
if(!is_cascade)
erase_loc = (unsigned int)block_start;
if(erase_loc != 0xa000){
SpicSectorEraseFlashRtl8195A(erase_loc);
DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
}else{
if(is_erasecal){
SpicSectorEraseFlashRtl8195A(erase_loc);
DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
}
}
erase_loc += 4096;
return 0;
}

22
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_config.h
View file

@ -1,22 +0,0 @@
// You should create a copy of this file in your flash loader project
// and configure it as described below
// when this macro is non-zero, your FlashInit function should accept
// extra 'argc' and 'argv' arguments as specified by the function
// prototype in 'flash_loader.h'
#define USE_ARGC_ARGV 1
// You can customize the memory reserved for passing arguments to FlashInit
// through argc and argv.
#if USE_ARGC_ARGV
// This specifies the maximum allowed number of arguments in argv
#define MAX_ARGS 5
// This specifies the maximum combined size of the arguments, including
// a trailing null for each argument
#define MAX_ARG_SIZE 64
#endif
// If this is true (non-zero), the parameter designating the code destination
// in flash operations will be a 'void *', otherwise it will be a uint32_t.
// Targets where void * is smaller than a code pointer should set this to 0.
#define CODE_ADDR_AS_VOID_PTR 1

145
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.c
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@ -1,145 +0,0 @@
// Wrapper for target-specific flash loader code
#include "flash_loader.h"
#include "flash_loader_extra.h"
#ifndef MAX_ARGS
#define MAX_ARGS 7
#endif
// Maximum combined size of arguments, including a trailing null for each argument.
#ifndef MAX_ARG_SIZE
#define MAX_ARG_SIZE 64
#endif
// Functions in this file, called from the assembly wrapper
void Fl2FlashInitEntry(void);
void Fl2FlashWriteEntry(void);
void Fl2FlashEraseWriteEntry(void);
void Fl2FlashChecksumEntry(void);
void Fl2FlashSignoffEntry(void);
void FlashBreak(void);
#if CODE_ADDR_AS_VOID_PTR
extern uint32_t FlashChecksum(void const *begin, uint32_t count);
#else
extern uint32_t FlashChecksum(uint32_t begin, uint32_t count);
#endif
extern uint32_t FlashSignoff();
uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum);
__root __no_init FlashParamsHolder theFlashParams;
__no_init int __argc;
__no_init char __argvbuf[MAX_ARG_SIZE];
#pragma required=__argvbuf
__no_init const char* __argv[MAX_ARGS];
#if CODE_ADDR_AS_VOID_PTR
#define CODE_REF void *
#else
#define CODE_REF uint32_t
#endif
void Fl2FlashInitEntry()
{
#if USE_ARGC_ARGV
theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
theFlashParams.block_size, // Image size
theFlashParams.offset_into_block,// link adr
theFlashParams.count, // flags
__argc,
__argv);
#else
theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
theFlashParams.block_size, // Image size
theFlashParams.offset_into_block,// link adr
theFlashParams.count); // flags
#endif
}
// The normal flash write function ----------------------------------------------
void Fl2FlashWriteEntry()
{
theFlashParams.count = FlashWrite((CODE_REF)theFlashParams.base_ptr,
theFlashParams.offset_into_block,
theFlashParams.count,
theFlashParams.buffer);
}
// The erase-first flash write function -----------------------------------------
void Fl2FlashEraseWriteEntry()
{
uint32_t tmp = theFlashParams.block_size;
if (tmp == 0)
{
FlashEraseData *p = (FlashEraseData*)theFlashParams.buffer;
for (uint32_t i = 0; i < theFlashParams.count; ++i)
{
tmp = FlashErase((CODE_REF)p->start, p->length);
if (tmp != 0) break;
++p;
}
}
else
{
tmp = FlashErase((CODE_REF)theFlashParams.base_ptr,
theFlashParams.block_size);
if (tmp == 0)
{
tmp = FlashWrite((CODE_REF)theFlashParams.base_ptr,
theFlashParams.offset_into_block,
theFlashParams.count,
theFlashParams.buffer);
}
}
theFlashParams.count = tmp;
}
void Fl2FlashChecksumEntry()
{
theFlashParams.count = FlashChecksum((CODE_REF)theFlashParams.base_ptr,
theFlashParams.count);
}
void Fl2FlashSignoffEntry()
{
theFlashParams.count = FlashSignoff();
}
uint16_t Crc16(uint8_t const *p, uint32_t len)
{
uint8_t zero[2] = { 0, 0 };
uint16_t sum = Crc16_helper(p, len, 0);
return Crc16_helper(zero, 2, sum);
}
uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum)
{
while (len--)
{
int i;
uint8_t byte = *p++;
for (i = 0; i < 8; ++i)
{
uint32_t osum = sum;
sum <<= 1;
if (byte & 0x80)
sum |= 1 ;
if (osum & 0x8000)
sum ^= 0x1021;
byte <<= 1;
}
}
return sum;
}
#pragma optimize=no_inline
__root void FlashBreak()
{
while(1);
}

78
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.h
View file

@ -1,78 +0,0 @@
#include "flash_config.h"
#include <stdint.h>
#define RESULT_OK 0
#define RESULT_ERROR 1
#define RESULT_OVERRIDE_DEVICE 2
#define RESULT_ERASE_DONE 3
#define RESULT_CUSTOM_FIRST 100
#define RESULT_CUSTOM_LAST 200
#define FLAG_ERASE_ONLY 0x1
#ifndef CODE_ADDR_AS_VOID_PTR
#define CODE_ADDR_AS_VOID_PTR 1
#endif
// These are functions you MUST implement -------------------------------
#if CODE_ADDR_AS_VOID_PTR
#if USE_ARGC_ARGV
uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
uint32_t link_address, uint32_t flags,
int argc, char const *argv[]);
#else
uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
uint32_t link_address, uint32_t flags);
#endif
uint32_t FlashWrite(void *block_start,
uint32_t offset_into_block,
uint32_t count,
char const *buffer);
uint32_t FlashErase(void *block_start,
uint32_t block_size);
#else // !CODE_ADDR_AS_VOID_PTR
#if USE_ARGC_ARGV
uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
uint32_t link_address, uint32_t flags,
int argc, char const *argv[]);
#else
uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
uint32_t link_address, uint32_t flags);
#endif
uint32_t FlashWrite(uint32_t block_start,
uint32_t offset_into_block,
uint32_t count,
char const *buffer);
uint32_t FlashErase(uint32_t block_start,
uint32_t block_size);
#endif // CODE_ADDR_AS_VOID_PTR
// These are functions you MAY implement --------------------------------
#if CODE_ADDR_AS_VOID_PTR
uint32_t FlashChecksum(void const *begin, uint32_t count);
#else
uint32_t FlashChecksum(uint32_t begin, uint32_t count);
#endif
uint32_t FlashSignoff(void);
#define OPTIONAL_CHECKSUM _Pragma("required=FlashChecksumEntry") __root
#define OPTIONAL_SIGNOFF _Pragma("required=FlashSignoffEntry") __root
void FlashChecksumEntry();
void FlashSignoffEntry();
// These are functions you may call -------------------------------------
// If your code cannot be accessed using data pointers, you will have to
// write your own Crc16 function.
uint16_t Crc16(uint8_t const *p, uint32_t len);

197
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_asm.s
View file

@ -1,197 +0,0 @@
;---------------------------------
;
; Functions accessed by the debugger to perform a flash download.
; All public symbols and the function FlashBreak() are looked up and called by the debugger.
;
; Copyright (c) 2008 IAR Systems
;
; $Revision: 38034 $
;
;---------------------------------
#define _CORTEX_ ((__CORE__ == __ARM6M__) || (__CORE__ == __ARM6SM__) || (__CORE__ == __ARM7M__) || (__CORE__ == __ARM7EM__))
PUBLIC FlashInitEntry
PUBLIC FlashWriteEntry
PUBLIC FlashEraseWriteEntry
PUBLIC FlashChecksumEntry
PUBLIC FlashSignoffEntry
PUBLIC FlashBufferStart
PUBLIC FlashBufferEnd
EXTERN FlashBreak
EXTERN Fl2FlashInitEntry
EXTERN Fl2FlashWriteEntry
EXTERN Fl2FlashEraseWriteEntry
EXTERN Fl2FlashChecksumEntry
EXTERN Fl2FlashSignoffEntry
SECTION CSTACK:DATA:NOROOT(3)
;---------------------------------
;
; FlashInitEntry()
; Debugger interface function
;
;---------------------------------
SECTION .text:CODE:ROOT(2)
#if !_CORTEX_
ARM
#else
THUMB
#endif
FlashInitEntry:
#if !_CORTEX_
;; Set up the normal stack pointer.
LDR sp, =SFE(CSTACK) ; End of CSTACK
#endif
BL Fl2FlashInitEntry
B FlashBreak
;---------------------------------
;
; FlashWriteEntry()
; Debugger interface function
;
;---------------------------------
SECTION .text:CODE:ROOT(2)
#if !_CORTEX_
ARM
#else
THUMB
#endif
FlashWriteEntry:
BL Fl2FlashWriteEntry
B FlashBreak
;---------------------------------
;
; FlashEraseWriteEntry
; Debugger interface function
;
;---------------------------------
SECTION .text:CODE:ROOT(2)
#if !_CORTEX_
ARM
#else
THUMB
#endif
FlashEraseWriteEntry:
BL Fl2FlashEraseWriteEntry
B FlashBreak
;---------------------------------
;
; FlashChecksumEntry
; Debugger interface function
;
;---------------------------------
SECTION .text:CODE:NOROOT(2)
#if !_CORTEX_
ARM
#else
THUMB
#endif
FlashChecksumEntry:
BL Fl2FlashChecksumEntry
B FlashBreak
;---------------------------------
;
; FlashSignoffEntry
; Debugger interface function
;
;---------------------------------
SECTION .text:CODE:NOROOT(2)
#if !_CORTEX_
ARM
#else
THUMB
#endif
FlashSignoffEntry:
BL Fl2FlashSignoffEntry
B FlashBreak
;---------------------------------
;
; Flash buffer and Cortex stack
;
;---------------------------------
SECTION LOWEND:DATA(8)
DATA
FlashBufferStart:
SECTION HIGHSTART:DATA
DATA
FlashBufferEnd:
#if _CORTEX_
PUBLIC __vector_table
SECTION .intvec:CODE:ROOT(2)
DATA
__vector_table:
#if 0
DC32 SFE(CSTACK)
DC32 FlashInitEntry
#endif
#endif
;---------------------------------
; Entry: 0x200006b4
; ram start up, normal boot
; : 0x200006c4
; ram wake up, use debugger,
; 0x40000218 BIT(31) must 1
; Section: .start.ram.data,
; put to 0x200006b4
; : .patch.start.ram.data,
; put to 0x200006bc
;---------------------------------
#if _CORTEX_
PUBLIC __ram_start_table
SECTION .start:CODE:ROOT(2)
DATA
__ram_start_table:
DC32 FlashInitEntry
DC32 FlashInitEntry
DC32 FlashInitEntry
DC32 FlashInitEntry
#endif
#if _CORTEX_
PUBLIC __patch_ram_start_table
SECTION .patch:CODE:ROOT(2)
DATA
__patch_ram_start_table:
DC32 FlashInitEntry
DC32 FlashInitEntry
DC32 FlashInitEntry
DC32 FlashInitEntry
#endif
END

27
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_extra.h
View file

@ -1,27 +0,0 @@
#define OVERRIDE_LAYOUT 0x010000
#define OVERRIDE_BUFSIZE 0x020000
#define OVERRIDE_PAGESIZE 0x040000
#define LAYOUT_OVERRIDE_BUFFER ((char*)theFlashParams.buffer)
#define SET_BUFSIZE_OVERRIDE(new_size) theFlashParams.block_size = (new_size)
#define SET_PAGESIZE_OVERRIDE(new_size) theFlashParams.offset_into_block = (new_size)
// parameter passing structure
typedef struct {
uint32_t base_ptr;
uint32_t count;
uint32_t offset_into_block;
void *buffer;
uint32_t block_size;
} FlashParamsHolder;
typedef struct {
uint32_t start;
uint32_t length;
} FlashEraseData;
extern FlashParamsHolder theFlashParams;
extern char FlashBufferStart;
extern char FlashBufferEnd;

60
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/mx25l8008_flashloader_mp.icf
View file

@ -1,60 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x10000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00010000;
define symbol __ICFEDIT_region_RAM_start__ = 0x10000bc0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1006FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
//do not initialize {readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
place at start of RAM_region { section .start, section .patch, block RamTop with fixed order {readonly, section LOWEND }};
place at end of RAM_region { block RamBottom with fixed order {section HIGHSTART, readwrite, section .init,
block CSTACK, block HEAP}};
define exported symbol __ram_start_table_start__ = 0x10000bc0;
define exported symbol __rom_bss_start__ = 0x10000300;
define exported symbol __rom_bss_end__ = 0x10000bc0;
// rom symbols
define exported symbol DiagPrintf = 0x0000f39d;
define exported symbol SpicWaitBusyDoneRtl8195A = 0x00002ea5;
define exported symbol SpicWaitWipDoneRtl8195A = 0x00002f55;
define exported symbol SpicLoadInitParaFromClockRtl8195A = 0x00003081;
define exported symbol VectorTableInitForOSRtl8195A = 0x00004019;
define exported symbol HalPinCtrlRtl8195A =0x00002b39;
define exported symbol SpicInitCPUCLK = 0x00030c98 ;
define exported symbol VectorTableInitRtl8195A = 0x00003de5;
define exported symbol SpicCmpDataForCalibrationRtl8195A = 0x00003049;
define exported symbol HalTimerInitRtl8195a = 0x0000ef3d;
define exported symbol VectorIrqDisRtl8195A = 0x0000418d;
define exported symbol VectorIrqRegisterRtl8195A = 0x00004029;
define exported symbol SpicInitRtl8195A = 0x000030e5;
define exported symbol HalCpuClkConfig = 0x00000341;
define exported symbol HalDelayUs = 0x00000899;
define exported symbol HalGetCpuClk = 0x00000355;
define exported symbol _memcpy = 0x0000f465;
define exported symbol ConfigDebugErr = 0x10000314;
define exported symbol ConfigDebugInfo = 0x10000310;
define exported symbol ConfigDebugWarn = 0x1000030c;

210
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h
View file

@ -1,210 +0,0 @@
/*
* Automatically generated by make menuconfig: don't edit
*/
#define AUTOCONF_INCLUDED
/*
* Target Platform Selection
*/
#define CONFIG_WITHOUT_MONITOR 1
#define CONFIG_RTL8195A 1
#undef CONFIG_FPGA
#undef CONFIG_RTL_SIM
#undef CONFIG_POST_SIM
/*
* < Mass Production Option
*/
#undef CONFIG_MP
#undef CONFIG_CP
#undef CONFIG_FT
#define RTL8195A 1
#define CONFIG_CPU_CLK 1
#define CONFIG_CPU_166_6MHZ 1
#undef CONFIG_CPU_83_3MHZ
#undef CONFIG_CPU_41_6MHZ
#undef CONFIG_CPU_20_8MHZ
#undef CONFIG_CPU_10_4MHZ
#undef CONFIG_CPU_4MHZ
#undef CONFIG_FPGA_CLK
#define PLATFORM_CLOCK (166666666)
#define CPU_CLOCK_SEL_VALUE (0)
#define CONFIG_SDR_CLK 1
#define CONFIG_SDR_100MHZ 1
#undef CONFIG_SDR_50MHZ
#undef CONFIG_SDR_25MHZ
#undef CONFIG_SDR_12_5MHZ
#define SDR_CLOCK_SEL_VALUE (0)
#define CONFIG_BOOT_PROCEDURE 1
#define CONFIG_IMAGE_PAGE_LOAD 1
#undef CONFIG_IMAGE_AUTO_LOAD
#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
#undef CONFIG_PERI_UPDATE_IMG
#define CONFIG_BOOT_FROM_JTAG 1
#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
#define CONFIG_KERNEL 1
#define PLATFORM_FREERTOS 1
#undef PLATFORM_UCOSII
#undef PLATFORM_ECOS
#undef CONFIG_TASK_SCHEDUL_DIS
#define TASK_SCHEDULER_DISABLED (0)
#define CONFIG_NORMALL_MODE 1
#undef CONFIG_MEMORY_VERIFY_MODE
#define CONFIG_TIMER_EN 1
#define CONFIG_TIMER_NORMAL 1
#undef CONFIG_TIMER_TEST
#define CONFIG_TIMER_MODULE 1
#define CONFIG_WDG 1
#undef CONFIG_WDG_NON
#define CONFIG_WDG_NORMAL 1
#define CONFIG_GDMA_EN 1
#define CONFIG_GDMA_NORMAL 1
#undef CONFIG_GDMA_TEST
#define CONFIG_GDMA_MODULE 1
#define CONFIG_WIFI_EN 1
#define CONFIG_WIFI_NORMAL 1
#undef CONFIG_WIFI_TEST
#define CONFIG_WIFI_MODULE 1
#define CONFIG_GPIO_EN 1
#define CONFIG_GPIO_NORMAL 1
#undef CONFIG_GPIO_TEST
#define CONFIG_GPIO_MODULE 1
#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
#define CONFIG_SDIO_DEVICE_EN 1
#define CONFIG_SDIO_DEVICE_NORMAL 1
#undef CONFIG_SDIO_DEVICE_TEST
#define CONFIG_SDIO_DEVICE_MODULE 1
#else
#undef CONFIG_SDIO_DEVICE_EN
#endif
#define CONFIG_SDIO_HOST_EN 1
#define CONFIG_USB_EN 1
#undef CONFIG_USB_NORMAL
#define CONFIG_USB_TEST 1
#define CONFIG_USB_MODULE 1
#define CONFIG_USB_VERIFY 1
#undef CONFIG_USB_ROM_LIB
//#define CONFIG_USB_DBGINFO_EN 1
#ifdef CONFIG_INIC//defined(CONFIG_INIC)
#define DWC_DEVICE_ONLY 1
#else
#define DWC_HOST_ONLY 1
#define CONFIG_USB_HOST_ONLY 1
#endif
#define CONFIG_SPI_COM_EN 1
#define CONFIG_SPI_COM_NORMAL 1
#undef CONFIG_SPI_COM_TEST
#define CONFIG_SPI_COM_MODULE 1
#define CONFIG_UART_EN 1
#define CONFIG_UART_NORMAL 1
#undef CONFIG_UART_TEST
#define CONFIG_UART_MODULE 1
#define CONFIG_I2C_EN 1
#define CONFIG_I2C_NORMAL 1
#undef CONFIG_I2C_TEST
#define CONFIG_I2C_MODULE 1
#undef CONFIG_DEBUG_LOG_I2C_HAL
#undef CONFIG_PCM_EN
#define CONFIG_I2S_EN 1
#define CONFIG_I2S_NORMAL 1
#undef CONFIG_I2S_TEST
#define CONFIG_I2S_MODULE 1
#undef CONFIG_DEBUG_LOG_I2S_HAL
#define CONFIG_NFC_EN 1
#define CONFIG_NFC_NORMAL 1
#undef CONFIG_NFC_TEST
#define CONFIG_NFC_MODULE 1
#define CONFIG_SOC_PS_EN 1
#define CONFIG_SOC_PS_NORMAL 1
#undef CONFIG_SOC_PS_TEST
#define CONFIG_SOC_PS_MODULE 1
#define CONFIG_CRYPTO_EN 1
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
#define CONFIG_MII_EN 1
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
#undef CONFIG_PWM_TEST
#define CONFIG_PWM_MODULE 1
#define CONFIG_EFUSE_EN 1
#define CONFIG_EFUSE_NORMAL 1
#undef CONFIG_EFUSE_TEST
#define CONFIG_EFUSE_MODULE 1
#define CONFIG_SDR_EN 1
#define CONFIG_SDR_NORMAL 1
#undef CONFIG_SDR_TEST
#define CONFIG_SDR_MODULE 1
#define CONFIG_SPIC_EN 1
#define CONFIG_SPIC_NORMAL 1
#undef CONFIG_SPIC_TEST
#define CONFIG_SPIC_MODULE 1
#define CONFIG_ADC_EN 1
#define CONFIG_DAC_EN 1
#define CONFIG_NOR_FLASH 1
#undef CONFIG_SPI_FLASH
#undef CONFIG_NAND_FLASH
#undef CONFIG_NONE_FLASH
#undef CONFIG_BTBX_EN
/*
* < Engineer Mode Config
*/
#undef CONFIG_JTAG
#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
#undef CONFIG_CMSIS_MATH_LIB_EN
/*
* < Application Config
*/
#define CONFIG_NETWORK 1
#define CONFIG_RTLIB_EN 1
#define CONFIG_RTLIB_NORMAL 1
#undef CONFIG_RTLIB_TEST
#define CONFIG_RTLIB_MODULE 1
/*
* < System Debug Message Config
*/
#define CONFIG_UART_LOG_HISTORY 1
#undef CONFIG_CONSOLE_NORMALL_MODE
#define CONFIG_CONSOLE_VERIFY_MODE 1
#define CONFIG_DEBUG_LOG 1
#define CONFIG_DEBUG_ERR_MSG 1
#undef CONFIG_DEBUG_WARN_MSG
#undef CONFIG_DEBUG_INFO_MSG
/*
* < SDK Option Config
*/
#undef CONFIG_MBED_ENABLED
#undef CONFIG_APP_DEMO
/*
* < Select Chip Version
*/
#undef CONFIG_CHIP_A_CUT
#define CONFIG_CHIP_B_CUT 1
#undef CONFIG_CHIP_C_CUT
#undef CONFIG_CHIP_E_CUT
/*
* < Select toolchain
*/
#undef CONFIG_TOOLCHAIN_ASDK
#undef CONFIG_TOOLCHAIN_ARM_GCC
/*
* < Build Option
*/
#define CONFIG_LINK_ROM_LIB 1
#undef CONFIG_LINK_ROM_SYMB
#undef CONFIG_NORMAL_BUILD
#undef CONFIG_RELEASE_BUILD
#undef CONFIG_RELEASE_BUILD_LIBRARIES
#undef CONFIG_LIB_BUILD_RAM
#define CONFIG_RELEASE_BUILD_RAM_ALL 1
#undef CONFIG_IMAGE_ALL
#define CONFIG_IMAGE_SEPARATE 1

210
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h.1
View file

@ -1,210 +0,0 @@
/*
* Automatically generated by make menuconfig: don't edit
*/
#define AUTOCONF_INCLUDED
/*
* Target Platform Selection
*/
#define CONFIG_WITHOUT_MONITOR 1
#define CONFIG_RTL8195A 1
#undef CONFIG_FPGA
#undef CONFIG_RTL_SIM
#undef CONFIG_POST_SIM
/*
* < Mass Production Option
*/
#undef CONFIG_MP
#undef CONFIG_CP
#undef CONFIG_FT
#define RTL8195A 1
#define CONFIG_CPU_CLK 1
#define CONFIG_CPU_166_6MHZ 1
#undef CONFIG_CPU_83_3MHZ
#undef CONFIG_CPU_41_6MHZ
#undef CONFIG_CPU_20_8MHZ
#undef CONFIG_CPU_10_4MHZ
#undef CONFIG_CPU_4MHZ
#undef CONFIG_FPGA_CLK
#define PLATFORM_CLOCK (166666666)
#define CPU_CLOCK_SEL_VALUE (0)
#define CONFIG_SDR_CLK 1
#define CONFIG_SDR_100MHZ 1
#undef CONFIG_SDR_50MHZ
#undef CONFIG_SDR_25MHZ
#undef CONFIG_SDR_12_5MHZ
#define SDR_CLOCK_SEL_VALUE (0)
#define CONFIG_BOOT_PROCEDURE 1
#define CONFIG_IMAGE_PAGE_LOAD 1
#undef CONFIG_IMAGE_AUTO_LOAD
#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
#undef CONFIG_PERI_UPDATE_IMG
#define CONFIG_BOOT_FROM_JTAG 1
#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
#define CONFIG_KERNEL 1
#define PLATFORM_FREERTOS 1
#undef PLATFORM_UCOSII
#undef PLATFORM_ECOS
#undef CONFIG_TASK_SCHEDUL_DIS
#define TASK_SCHEDULER_DISABLED (0)
#define CONFIG_NORMALL_MODE 1
#undef CONFIG_MEMORY_VERIFY_MODE
#define CONFIG_TIMER_EN 1
#define CONFIG_TIMER_NORMAL 1
#undef CONFIG_TIMER_TEST
#define CONFIG_TIMER_MODULE 1
#define CONFIG_WDG 1
#undef CONFIG_WDG_NON
#define CONFIG_WDG_NORMAL 1
#define CONFIG_GDMA_EN 1
#define CONFIG_GDMA_NORMAL 1
#undef CONFIG_GDMA_TEST
#define CONFIG_GDMA_MODULE 1
#define CONFIG_WIFI_EN 1
#define CONFIG_WIFI_NORMAL 1
#undef CONFIG_WIFI_TEST
#define CONFIG_WIFI_MODULE 1
#define CONFIG_GPIO_EN 1
#define CONFIG_GPIO_NORMAL 1
#undef CONFIG_GPIO_TEST
#define CONFIG_GPIO_MODULE 1
#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
#define CONFIG_SDIO_DEVICE_EN 1
#define CONFIG_SDIO_DEVICE_NORMAL 1
#undef CONFIG_SDIO_DEVICE_TEST
#define CONFIG_SDIO_DEVICE_MODULE 1
#else
#undef CONFIG_SDIO_DEVICE_EN
#endif
#define CONFIG_SDIO_HOST_EN 1
#define CONFIG_USB_EN 1
#undef CONFIG_USB_NORMAL
#define CONFIG_USB_TEST 1
#define CONFIG_USB_MODULE 1
#define CONFIG_USB_VERIFY 1
#undef CONFIG_USB_ROM_LIB
//#define CONFIG_USB_DBGINFO_EN 1
#ifdef CONFIG_INIC//defined(CONFIG_INIC)
#define DWC_DEVICE_ONLY 1
#else
#define DWC_HOST_ONLY 1
#define CONFIG_USB_HOST_ONLY 1
#endif
#define CONFIG_SPI_COM_EN 1
#define CONFIG_SPI_COM_NORMAL 1
#undef CONFIG_SPI_COM_TEST
#define CONFIG_SPI_COM_MODULE 1
#define CONFIG_UART_EN 1
#define CONFIG_UART_NORMAL 1
#undef CONFIG_UART_TEST
#define CONFIG_UART_MODULE 1
#define CONFIG_I2C_EN 1
#define CONFIG_I2C_NORMAL 1
#undef CONFIG_I2C_TEST
#define CONFIG_I2C_MODULE 1
#undef CONFIG_DEBUG_LOG_I2C_HAL
#undef CONFIG_PCM_EN
#define CONFIG_I2S_EN 1
#define CONFIG_I2S_NORMAL 1
#undef CONFIG_I2S_TEST
#define CONFIG_I2S_MODULE 1
#undef CONFIG_DEBUG_LOG_I2S_HAL
#define CONFIG_NFC_EN 1
#define CONFIG_NFC_NORMAL 1
#undef CONFIG_NFC_TEST
#define CONFIG_NFC_MODULE 1
#define CONFIG_SOC_PS_EN 1
#define CONFIG_SOC_PS_NORMAL 1
#undef CONFIG_SOC_PS_TEST
#define CONFIG_SOC_PS_MODULE 1
#define CONFIG_CRYPTO_EN 1
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
#define CONFIG_MII_EN 1
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
#undef CONFIG_PWM_TEST
#define CONFIG_PWM_MODULE 1
#define CONFIG_EFUSE_EN 1
#define CONFIG_EFUSE_NORMAL 1
#undef CONFIG_EFUSE_TEST
#define CONFIG_EFUSE_MODULE 1
#define CONFIG_SDR_EN 1
#define CONFIG_SDR_NORMAL 1
#undef CONFIG_SDR_TEST
#define CONFIG_SDR_MODULE 1
#define CONFIG_SPIC_EN 1
#define CONFIG_SPIC_NORMAL 1
#undef CONFIG_SPIC_TEST
#define CONFIG_SPIC_MODULE 1
#define CONFIG_ADC_EN 1
#define CONFIG_DAC_EN 1
#define CONFIG_NOR_FLASH 1
#undef CONFIG_SPI_FLASH
#undef CONFIG_NAND_FLASH
#undef CONFIG_NONE_FLASH
#undef CONFIG_BTBX_EN
/*
* < Engineer Mode Config
*/
#undef CONFIG_JTAG
#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
#undef CONFIG_CMSIS_MATH_LIB_EN
/*
* < Application Config
*/
#define CONFIG_NETWORK 1
#define CONFIG_RTLIB_EN 1
#define CONFIG_RTLIB_NORMAL 1
#undef CONFIG_RTLIB_TEST
#define CONFIG_RTLIB_MODULE 1
/*
* < System Debug Message Config
*/
#define CONFIG_UART_LOG_HISTORY 1
#undef CONFIG_CONSOLE_NORMALL_MODE
#define CONFIG_CONSOLE_VERIFY_MODE 1
#define CONFIG_DEBUG_LOG 1
#define CONFIG_DEBUG_ERR_MSG 1
#undef CONFIG_DEBUG_WARN_MSG
#undef CONFIG_DEBUG_INFO_MSG
/*
* < SDK Option Config
*/
#undef CONFIG_MBED_ENABLED
#undef CONFIG_APP_DEMO
/*
* < Select Chip Version
*/
#undef CONFIG_CHIP_A_CUT
#define CONFIG_CHIP_B_CUT 1
#undef CONFIG_CHIP_C_CUT
#undef CONFIG_CHIP_E_CUT
/*
* < Select toolchain
*/
#undef CONFIG_TOOLCHAIN_ASDK
#undef CONFIG_TOOLCHAIN_ARM_GCC
/*
* < Build Option
*/
#define CONFIG_LINK_ROM_LIB 1
#undef CONFIG_LINK_ROM_SYMB
#undef CONFIG_NORMAL_BUILD
#undef CONFIG_RELEASE_BUILD
#undef CONFIG_RELEASE_BUILD_LIBRARIES
#undef CONFIG_LIB_BUILD_RAM
#define CONFIG_RELEASE_BUILD_RAM_ALL 1
#undef CONFIG_IMAGE_ALL
#define CONFIG_IMAGE_SEPARATE 1

64
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/preload.mp.mac
View file

@ -1,64 +0,0 @@
setup()
{
__var tmp;
__hwResetWithStrategy(0, 1);
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
execUserPreload()
{
__var tmp;
//setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}
execUserSetup()
{
//execUserPreload();
//__loadImage("$TARGET_PATH$ ", 0, 0);
//__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
{
__var tmp;
__message "----- Prepare hardware for Flashloader -----\n";
//setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}

360
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_misc.c
View file

@ -1,360 +0,0 @@
#include "rtl8195a.h"
typedef struct _UART_LOG_BUF_ {
u8 BufCount; //record the input cmd char number.
u8 UARTLogBuf[127]; //record the input command.
} UART_LOG_BUF, *PUART_LOG_BUF;
typedef struct _UART_LOG_CTL_ {
u8 NewIdx;
u8 SeeIdx;
u8 RevdNo;
u8 EscSTS;
u8 ExecuteCmd;
u8 ExecuteEsc;
u8 BootRdy;
u8 Resvd;
PUART_LOG_BUF pTmpLogBuf;
VOID *pfINPUT;
PCOMMAND_TABLE pCmdTbl;
u32 CmdTblSz;
u32 CRSTS;
u8 (*pHistoryBuf)[127];
u32 TaskRdy;
u32 Sema;
} UART_LOG_CTL, *PUART_LOG_CTL;
volatile UART_LOG_CTL UartLogCtl;
volatile UART_LOG_CTL *pUartLogCtl;
u8 *ArgvArray[10];
UART_LOG_BUF UartLogBuf;
u8 UartLogHistoryBuf[5][127];
extern VOID
SpicLoadInitParaFromClockRtl8195A
(
IN u8 CpuClkMode,
IN u8 BaudRate,
IN PSPIC_INIT_PARA pSpicInitPara
);
VOID
PatchSpicInitRtl8195A
(
IN u8 InitBaudRate,
IN u8 SpicBitMode
)
{
u32 Value32;
SPIC_INIT_PARA SpicInitPara;
#ifdef CONFIG_FPGA
SpicInitPara.BaudRate = 1;//FPGASpicInitPara.BaudRate;
SpicInitPara.RdDummyCyle = 1;//FPGASpicInitPara.RdDummyCyle;
SpicInitPara.DelayLine = 0;//FPGASpicInitPara.DelayLine;
#else
u8 CpuClk;
CpuClk = (((u8)(HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70))) >> 4);
SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
#endif
// Disable SPI_FLASH User Mode
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
HAL_SPI_WRITE32(REG_SPIC_BAUDR, BIT_SCKDV(InitBaudRate));
HAL_SPI_WRITE32(REG_SPIC_SER, BIT_SER);
Value32 = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH,
((Value32 & 0xFFFF0000) | BIT_RD_DUMMY_LENGTH(SpicInitPara.RdDummyCyle)));
HAL_WRITE32(PERI_ON_BASE, REG_PESOC_MEM_CTRL,
((HAL_READ32(PERI_ON_BASE, REG_PESOC_MEM_CTRL)&0xFFFFFF00)|
SpicInitPara.DelayLine));
HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(4));
switch (SpicBitMode) {
case SpicOneBitMode:
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
(HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))));
break;
case SpicDualBitMode:
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
(BIT_ADDR_CH(1)|BIT_DATA_CH(1))));
break;
case SpicQuadBitMode:
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
(BIT_ADDR_CH(2)|BIT_DATA_CH(2))));
break;
}
// Enable SPI_FLASH User Mode
// HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
}
#include "hal_timer.h"
extern BOOL
HalTimerInitRtl8195a(
IN VOID *Data
);
VOID
PatchHalInitPlatformTimer(
VOID
)
{
TIMER_ADAPTER TimerAdapter;
OSC32K_CKGEN_CTRL(ON);
GTIMER_FCTRL(ON);
ACTCK_TIMER_CCTRL(ON);
SLPCK_TIMER_CCTRL(ON);
TimerAdapter.IrqDis = ON;
// TimerAdapter.IrqHandle = (IRQ_FUN)NULL;
TimerAdapter.TimerId = 1;
TimerAdapter.TimerIrqPriority = 0;
TimerAdapter.TimerLoadValueUs = 0;
TimerAdapter.TimerMode = FREE_RUN_MODE;
HalTimerInitRtl8195a((VOID*) &TimerAdapter);
}
#define UART_BAUD_RATE_2400 2400
#define UART_BAUD_RATE_4800 4800
#define UART_BAUD_RATE_9600 9600
#define UART_BAUD_RATE_19200 19200
#define UART_BAUD_RATE_38400 38400
#define UART_BAUD_RATE_57600 57600
#define UART_BAUD_RATE_115200 115200
#define UART_BAUD_RATE_921600 921600
#define UART_BAUD_RATE_1152000 1152000
#define UART_PARITY_ENABLE 0x08
#define UART_PARITY_DISABLE 0
#define UART_DATA_LEN_5BIT 0x0
#define UART_DATA_LEN_6BIT 0x1
#define UART_DATA_LEN_7BIT 0x2
#define UART_DATA_LEN_8BIT 0x3
#define UART_STOP_1BIT 0x0
#define UART_STOP_2BIT 0x4
extern u32
HalLogUartInit(
IN LOG_UART_ADAPTER UartAdapter
);
extern u32
HalGetCpuClk(
VOID
);
const u32 StartupCpkClkTbl[]= {
200000000,
100000000,
50000000,
25000000,
12500000,
4000000
};
u32
StartupHalGetCpuClk(
VOID
)
{
u32 CpuType = 0, CpuClk = 0, FreqDown = 0;
CpuType = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
FreqDown = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) & BIT17;
CpuClk = StartupCpkClkTbl[CpuType];
if ( !FreqDown ) {
if ( CpuClk > 4000000 ){
CpuClk = (CpuClk*5/6);
}
}
return CpuClk;
}
u32
PatchHalLogUartInit(
IN LOG_UART_ADAPTER UartAdapter
)
{
u32 SetData;
u32 Divisor;
u32 Dlh;
u32 Dll;
u32 SysClock;
/*
Interrupt enable Register
7: THRE Interrupt Mode Enable
2: Enable Receiver Line Status Interrupt
1: Enable Transmit Holding Register Empty Interrupt
0: Enable Received Data Available Interrupt
*/
// disable all interrupts
HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, 0);
/*
Line Control Register
7: DLAB, enable reading and writing DLL and DLH register, and must be cleared after
initial baud rate setup
3: PEN, parity enable/disable
2: STOP, stop bit
1:0 DLS, data length
*/
// set DLAB bit to 1
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0x80);
// set up buad rate division
#ifdef CONFIG_FPGA
SysClock = SYSTEM_CLK;
Divisor = (SysClock / (16 * (UartAdapter.BaudRate)));
#else
{
u32 SampleRate,Remaind;
//SysClock = (HalGetCpuClk()>>2);
SysClock = (StartupHalGetCpuClk()>>2);
SampleRate = (16 * (UartAdapter.BaudRate));
Divisor= SysClock/SampleRate;
Remaind = ((SysClock*10)/SampleRate) - (Divisor*10);
if (Remaind>4) {
Divisor++;
}
}
#endif
Dll = Divisor & 0xff;
Dlh = (Divisor & 0xff00)>>8;
HAL_UART_WRITE32(UART_DLL_OFF, Dll);
HAL_UART_WRITE32(UART_DLH_OFF, Dlh);
// clear DLAB bit
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0);
// set data format
SetData = UartAdapter.Parity | UartAdapter.Stop | UartAdapter.DataLength;
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, SetData);
/* FIFO Control Register
7:6 level of receive data available interrupt
5:4 level of TX empty trigger
2 XMIT FIFO reset
1 RCVR FIFO reset
0 FIFO enable/disable
*/
// FIFO setting, enable FIFO and set trigger level (2 less than full when receive
// and empty when transfer
HAL_UART_WRITE32(UART_FIFO_CTL_REG_OFF, UartAdapter.FIFOControl);
/*
Interrupt Enable Register
7: THRE Interrupt Mode enable
2: Enable Receiver Line status Interrupt
1: Enable Transmit Holding register empty INT32
0: Enable received data available interrupt
*/
HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, UartAdapter.IntEnReg);
if (UartAdapter.IntEnReg) {
// Enable Peripheral_IRQ Setting for Log_Uart
HAL_WRITE32(VENDOR_REG_BASE, PERIPHERAL_IRQ_EN, 0x1000000);
// Enable ARM Cortex-M3 IRQ
NVIC_SetPriorityGrouping(0x3);
NVIC_SetPriority(PERIPHERAL_IRQ, 14);
NVIC_EnableIRQ(PERIPHERAL_IRQ);
}
return 0;
}
u32 log_uart_irq(VOID *Data)
{
return 0;
}
VOID
PatchHalInitPlatformLogUart(
VOID
)
{
IRQ_HANDLE UartIrqHandle;
LOG_UART_ADAPTER UartAdapter;
//4 Release log uart reset and clock
LOC_UART_FCTRL(OFF);
LOC_UART_FCTRL(ON);
ACTCK_LOG_UART_CCTRL(ON);
PinCtrl(LOG_UART,S0,ON);
//4 Register Log Uart Callback function
UartIrqHandle.Data = (u32)NULL;//(u32)&UartAdapter;
UartIrqHandle.IrqNum = UART_LOG_IRQ;
UartIrqHandle.IrqFun = (IRQ_FUN) log_uart_irq;//UartLogIrqHandleRam;
UartIrqHandle.Priority = 0;
//4 Inital Log uart
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
UartAdapter.FIFOControl = 0xC1;
UartAdapter.IntEnReg = 0x00;
UartAdapter.Parity = UART_PARITY_DISABLE;
UartAdapter.Stop = UART_STOP_1BIT;
//4 Initial Log Uart
PatchHalLogUartInit(UartAdapter);
//4 Register Isr handle
InterruptRegister(&UartIrqHandle);
UartAdapter.IntEnReg = 0x05;
//4 Initial Log Uart for Interrupt
PatchHalLogUartInit(UartAdapter);
//4 initial uart log parameters before any uartlog operation
//RtlConsolInit(ROM_STAGE,GetRomCmdNum(),(VOID*)&UartLogRomCmdTable);// executing boot seq.,
}

1457
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_spi_flash_ram.c
View file

File diff suppressed because it is too large Load diff

40
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.cspy.bat
View file

@ -1,40 +0,0 @@
@REM This batch file has been generated by the IAR Embedded Workbench
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
@echo off
if not "%~1" == "" goto debugFile
@echo on
"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
@echo off
goto end
:debugFile
@echo on
"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" "--debug_file=%~1" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
@echo off
:end

23
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.driver.xcl
View file

@ -1,23 +0,0 @@
"--endian=little"
"--cpu=Cortex-M3"
"--fpu=None"
"--semihosting=none"
"--drv_communication=USB0"
"--drv_interface_speed=auto"
"--jlink_initial_speed=1000"
"--jlink_reset_strategy=0,0"
"--drv_catch_exceptions=0x000"
"--drv_swo_clock_setup=72000000,0,2000000"

13
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.general.xcl
View file

@ -1,13 +0,0 @@
"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armproc.dll"
"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armjlink2.dll"
"E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out"
--plugin "D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armbat.dll"
--macro "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\..\FlashRTL8195aMP.mac"

16
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.crun
View file

@ -1,16 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<crun>
<version>1</version>
<filter_entries>
<filter index="0" type="default">
<type>*</type>
<start_file>*</start_file>
<end_file>*</end_file>
<action_debugger>0</action_debugger>
<action_log>1</action_log>
</filter>
</filter_entries>
</crun>

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dbgdt
View file

@ -1,5 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project/>

22
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dni
View file

@ -1,22 +0,0 @@
[SfrWindow]
Show=1 1
Sort=4 0
[Stack]
FillEnabled=0
OverflowWarningsEnabled=1
WarningThreshold=90
SpWarningsEnabled=1
WarnLogOnly=1
UseTrigger=1
TriggerName=main
LimitSize=0
ByteLimit=50
[JLinkDriver]
CStepIntDis=_ 0
[Disassemble mode]
mode=0
[Breakpoints2]
Count=0
[Aliases]
Count=0
SuppressDialog=0

155
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wsdt
View file

@ -1,155 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>FlashLoader/Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
<Column0>282</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
</Workspace>
<Build>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows>
<Window>
<Factory>Select-Ambiguous-Definitions</Factory>
</Window>
</Windows>
</PreferedWindows>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1392</ColumnWidth1><ColumnWidth2>371</ColumnWidth2><ColumnWidth3>92</ColumnWidth3></Build>
<PROJECT_GUI_CSTAT>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>Check</item>
<item>File</item>
<item>Line</item>
<item>Message</item>
<item>Severity</item>
</col-names>
<col-widths>
<item>200</item>
<item>200</item>
<item>100</item>
<item>662</item>
<item>100</item>
</col-widths>
</PROJECT_GUI_CSTAT>
<DRIVER_CUSTOM_SFR>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>Access</item>
<item>Address</item>
<item>Name</item>
<item>Size</item>
<item>Zone</item>
<item>_I0</item>
</col-names>
<col-widths>
<item>120</item>
<item>150</item>
<item>150</item>
<item>50</item>
<item>120</item>
<item>20</item>
</col-widths>
</DRIVER_CUSTOM_SFR>
<PROJECT_GUI_CALL_GRAPH>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows/>
</PreferedWindows>
<col-names>
<item>File</item>
<item>Function</item>
<item>Line</item>
</col-names>
<col-widths>
<item>200</item>
<item>700</item>
<item>100</item>
</col-widths>
</PROJECT_GUI_CALL_GRAPH>
<Select-Ambiguous-Definitions>
<PreferedWindows>
<Position>3</Position>
<ScreenPosX>0</ScreenPosX>
<ScreenPosY>0</ScreenPosY>
<Windows>
<Window>
<Factory>Build</Factory>
</Window>
</Windows>
</PreferedWindows>
<ColumnWidth0>660</ColumnWidth0>
<ColumnWidth1>94</ColumnWidth1>
<ColumnWidth2>1132</ColumnWidth2>
</Select-Ambiguous-Definitions>
</Static>
<Windows>
<Wnd1>
<Tabs>
<Tab>
<Identity>TabID-6666-21578</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>FlashLoader</ExpandedNode><ExpandedNode>FlashLoader/Framework</ExpandedNode><ExpandedNode>FlashLoader/Output</ExpandedNode><ExpandedNode>FlashLoader/rtl8195a</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd1><Wnd2>
<Tabs>
<Tab>
<Identity>TabID-3028-28606</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2></Windows>
<Editor>
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\flash_MX25L8008.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd><XPos2>0</XPos2><YPos2>351</YPos2><SelStart2>10147</SelStart2><SelEnd2>10147</SelEnd2></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-0096FCB8><key>iaridepm.enu1</key></Toolbar-0096FCB8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>768</Bottom><Right>356</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>104712</sizeHorzCX><sizeHorzCY>197824</sizeHorzCY><sizeVertCX>187435</sizeVertCX><sizeVertCY>761622</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1912</Right><x>-2</x><y>-2</y><xscreen>1914</xscreen><yscreen>200</yscreen><sizeHorzCX>1002094</sizeHorzCX><sizeHorzCY>197824</sizeHorzCY><sizeVertCX>104712</sizeVertCX><sizeVertCY>197824</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

2
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wspos
View file

@ -1,2 +0,0 @@
[MainWindow]
WindowPlacement=_ 341 233 2261 1294 1

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashLoader.bin
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24
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board
View file

@ -1,24 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc0 0x10003FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head</args>
</pass>
<pass>
<range>CODE 0x10004000 0x1006FFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--cascade</args>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--cascade</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bbf</ignore>
</flash_board>

10
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash
View file

@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out</exe>
<flash_base>0x00000000</flash_base>
<page>8</page>
<block>512 0x1000</block>
<macro>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.mac</macro>
<aggregate>1</aggregate>
</flash_device>

72
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac
View file

@ -1,72 +0,0 @@
setup()
{
__var tmp;
__hwResetWithStrategy(0, 2);
__hwReset(1);
tmp = __readMemory32(0x40000014,"Memory"); __delay(10);
__message "0x40000014=",tmp:%x;
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
/*
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
*/
}
execUserPreload()
{
__var tmp;
setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}
execUserSetup()
{
//execUserPreload();
//__loadImage("$TARGET_PATH$ ", 0, 0);
//__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
{
__var tmp;
__message "----- Prepare hardware for Flashloader -----\n";
__writeMemory32(0x1FFFFFF8, 0x10000000, "Memory");
__writeMemory32(0x101, 0x10000004, "Memory");
setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.out
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17
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board
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@ -1,17 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc8 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bc7</ignore>
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
</flash_board>

17
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board
View file

@ -1,17 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc0 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bbf</ignore>
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
</flash_board>

26
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board
View file

@ -1,26 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc8 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<pass>
<range>CODE 0x10006000 0x1006FFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0xB000</abs_offset>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x0000</abs_offset>
<args>--cascade</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bc7</ignore>
<ignore>CODE 0x1FFF0000 0x1FFFFFFF</ignore>
</flash_board>

30
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board
View file

@ -1,30 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x200006b4 0x2002FFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00000000</abs_offset>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00010000</abs_offset>
<ignore>DATA_Z 0x30000000 0x301FFFFF</ignore>
</pass>
<pass>
<range>CODE 0x20080000 0x200BFFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00020000</abs_offset>
<ignore>DATA_Z 0x20080000 0x200BFFFF</ignore>
</pass>
<pass>
<range>CODE 0x00000000 0x00000000</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00030000</abs_offset>
</pass>
<ignore>CODE 0x00000001 0x000BFFFF</ignore>
<ignore>CODE 0x20000000 0x200006b3</ignore>
</flash_board>

10
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash
View file

@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\flashloader\FlashRTL8195aQA.out</exe>
<flash_base>0x00000000</flash_base>
<page>8</page>
<block>256 0x1000</block>
<macro>$PROJ_DIR$\flashloader\FlashRTL8195aQA.mac</macro>
<aggregate>1</aggregate>
</flash_device>

60
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac
View file

@ -1,60 +0,0 @@
setup()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
execUserPreload()
{
__message "----- Prepare hardware for Flashloader -----\n";
setup();
__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserSetup()
{
//execUserPreload();
//__loadImage("$TARGET_PATH$ ", 0, 0);
//__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
{
__message "----- Prepare hardware for Flashloader -----\n";
setup();
__writeMemory32(0x80000000, 0x40000218, "Memory");
}

BIN
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.out
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53
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat
View file

@ -1,53 +0,0 @@
@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end0
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %3 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x301FFFFF^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x%end0%^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

69
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat
View file

@ -1,69 +0,0 @@
@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end3
@set /a tmp4 = %4
@call :toHex %tmp4% flash_run_start
@set /a tmp4 = %5-1
@call :toHex %tmp4% flash_run_end
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x10000bc8 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head >> tmp.board
@echo --img2_addr >> tmp.board
@echo 0xB000^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xB000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
if NOT "%3"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x%end3%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x0000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
if NOT "%4"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x%flash_run_start% 0x%flash_run_end%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xA4000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x10000bc7^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x1FFF0000 0x1FFFFFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

47
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat
View file

@ -1,47 +0,0 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
del Debug/Exe/target.map Debug/Exe/target.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
)
:: SDRAM case
if defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
)
:: board generator
%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
exit

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs
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@ -1,5 +0,0 @@
Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

30
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.bat
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@ -1,30 +0,0 @@
set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set alinkdir=%1\..\..\..\component\common\application\alink
::echo %tooldir% > %alinkdir%\test.txt
::echo %alinkdir% >> %alinkdir%\test.txt
cd /D %tooldir%
::echo "%tooldir%\iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a" >> %alinkdir%\test.txt
echo cmd /c iarchive.exe --create lib_alink.a >out.bat
cmd /c "iarchive.exe -t %alinkdir%\lib_porting.a" >>out.bat
cmd /c "iarchive.exe -t %alinkdir%\cloud\lib\libalink.a" >>out.bat
cmd /c "iarchive.exe -t %alinkdir%\zconfig\lib\libaws.a" >>out.bat
cmd /c sed ':a;N;$ s/\n/ /g;ba' out.bat > out1.bat
cmd /c "iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a"
cmd /c "iarchive.exe --extract %alinkdir%\zconfig\lib\libaws.a"
cmd /c "iarchive.exe --extract %alinkdir%\lib_porting.a"
cmd /c "out1.bat"
del %alinkdir%\lib_porting.a
cmd /c copy lib_alink.a %alinkdir%
del *.o
del *.bat
del *.a
exit

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.vbs
View file

@ -1,5 +0,0 @@
Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_alink.bat "+WScript.Arguments.Item(0), 0

33
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat
View file

@ -1,33 +0,0 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
::%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
:: update ram_1.p.bin, raw file for application
copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
:: delete hal_spi_flash_ram.o object after image built
del Debug\Obj\hal_spi_flash_ram.*
exit

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs
View file

@ -1,5 +0,0 @@
Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

77
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat
View file

@ -1,77 +0,0 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
set cfgdir=%3
echo config %3
del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A3 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
if defined %ram3_start (
%tooldir%\objcopy -j "A5 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
)
if defined %flash_run_start (
%tooldir%\objcopy -j "A7 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
) else (
set flash_run_start=0xFFFFFFFF
set flash_run_end=0xFFFFFFFF
)
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
)
:: force update ram_1.p.bin
del %cfgdir%\Exe\ram_1.p.bin
:: check ram_1.p.bin exist, copy default
if not exist %cfgdir%\Exe\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
)
::if not exist %cfgdir%\Exe\data.p.bin (
:: copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
::)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
set ram3_end=0xFFFFFFFF
)
%tooldir%\checksum %cfgdir%\Exe\ota.bin
:: board generator
%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
exit

5
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs
View file

@ -1,5 +0,0 @@
Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+""" """+WScript.Arguments.Item(2)+"""""", 0

61
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat
View file

@ -1,61 +0,0 @@
cd /D %2
set bindir=application/Debug/bin
set bindirw=application\Debug\bin
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
echo %tooldir%
echo %libdir%
::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::echo %ram1_start% > tmp.txt
echo %ram2_start%
echo %ram3_start%
::echo %ram1_end% >> tmp.txt
echo %ram2_end%
echo %ram3_end%
%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
if NOT %ram3_start% == %ram3_end% (
%tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
)
%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
)
:: check ram_1.p.bin exist, copy default
if not exist %bindirw%\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
)
%tooldir%\checksum Debug\Exe\ota.bin
:: NO SDRAM case
if not defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
)
exit

29
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat
View file

@ -1,29 +0,0 @@
cd /D %1
set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%1\..\..\..\component\soc\realtek\8195a\misc\bsp
:: Generate build_info.h
echo off
::echo %date:~0,10%-%time:~0,8%
::echo %USERNAME%
for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
::echo %hostname%
echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_DATE "%date:~0,4%%date:~5,2%%date:~8,2%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
echo. > main.icf
for /f "delims=" %%i in ('cmd /c "%tooldir%\coan defs -g e ../src/main.c | %tooldir%\grep "#define" | %tooldir%\grep __ICFEDIT_region_BD_RAM_start__ | %tooldir%\gawk '{print $3}'"') do set BD_RAM_start=%%i
if defined %BD_RAM_start (
echo define symbol __ICFEDIT_region_BD_RAM_start__ = %BD_RAM_start%; >> main.icf
echo define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006CFFF; >> main.icf
)
exit

15
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs
View file

@ -1,15 +0,0 @@
Option Explicit
DIM fso
Dim WshShell
Set fso = CreateObject("Scripting.FileSystemObject")
If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat")) Then
MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat" , vbinformation
WScript.Quit()
End If
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat"" """ & WScript.Arguments(0) & """""", 0, true

372
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.dap.mac
View file

@ -1,372 +0,0 @@
//DRAM_INFO
__var DeviceType;
__var Page;
__var Bank;
__var DqWidth;
//DRAM_MODE_REG_INFO
__var BstLen;
__var BstType;
__var Mode0Cas;
__var Mode0Wr;
__var Mode1DllEnN;
__var Mode1AllLat;
__var Mode2Cwl;
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
__var DramTimingTref;
__var DramRowNum;
__var Tck;
//DRAM_TIMING_INFO
__var TrfcPs;
__var TrefiPs;
__var WrMaxTck;
__var TrcdPs;
__var TrpPs;
__var TrasPs;
__var TrrdTck;
__var TwrPs;
__var TwtrTck;
__var TmrdTck;
__var TrtpTck;
__var TccdTck;
__var TrcPs;
//DRAM_DEVICE_INFO
__var DdrPeriodPs;
__var DfiRate;
__config_dram_param(){
__var CsBstLen;
__var CasWr;
__var CasRd;
__var CasRdT;
__var ClrSrt;
__var AddLat;
__var DramEmr2;
__var DramMr0;
__var CrTwr;
__var DramMaxWr;
__var DramWr;
__var CrTrtw;
__var CrTrtwT;
__var DramPeriod;
__var DdrType;
//__var paDqWidth;
//__var paPage;
//__var paDfiRate
__var tmp;
// Register dram common.mac
//__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__load_dram_common();
// Load parameter
__load_dram_param();
DfiRate = 1<<DfiRate;
DramPeriod = DdrPeriodPs*DfiRate;
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
DramWr = ((TwrPs) / DramPeriod)+1;
CrTwr = ((TwrPs) / DramPeriod) + 3;
if (CrTwr < DramMaxWr) {
CrTwr = CrTwr;
}else {
CrTwr = DramMaxWr;
}
if(DeviceType==2){ // Case DDR2
DdrType = 2;
if (BstLen == 0){
CsBstLen = 0;
CrTrtwT = 4;
DramMr0 = 2;
}else{
CsBstLen = 1;
CrTrtwT = 6;
DramMr0 = 3;
}
CasRd = Mode0Cas;
AddLat = Mode1AllLat;
CasWr = CasRd + AddLat -1;
DramEmr2 = 0;
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
}
if(DeviceType==3){ // Case DDR3
DdrType = 3;
if (BstLen==0){
CsBstLen = 0; //bst_4
DramMr0 = 2;
}else{
CsBstLen = 1; // bst_8
DramMr0 = 0;
}
CrlSrt = (Mode0Cas >> 1);
if (((Mode0Cas) & 0x1) ) {
CasRdT = CrlSrt+ 12;
}else{
CasRdT = CrlSrt+ 4;
}
AddLat = 0;
if (Mode1AllLat == 1) { // CL-1
AddLat = CasRd -1;
}
if (Mode1AllLat == 2){ // CL-2
AddLat = CasRd -2;
}
CasRd = CasRdT + AddLat;
CasWr = Mode2Cwl + 5 + AddLat;
DramEmr2 = Mode2Cwl << 3;
DramWr = (DramWr + 1) / 2;
if (DramWr == 16) {
DramWr = 0;
}
if (DramWr <= 9) { // 5< wr <= 9
DramWr = DramWr - 4;
}
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
CrTrtwT = (CasRdT + 6) - CasWr;
}
if (DeviceType == 8){
DdrType = 8;
if (BstLen == 0) {
DramMr0 = 2; // bst_4
CsBstLen = 0; //bst_4
CasRd = 0x2;
} else {
DramMr0 = 3; // bst_8
CsBstLen = 1; // bst_8
CasRd = 0x3;
}
CasWr = 0;
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
}
// countting tRTW
if ((CrTrtwT & 0x1)) {
CrTrtw = (CrTrtwT+1) /(DfiRate);
} else {
CrTrtw = CrTrtwT /(DfiRate);
}
DqWidth = DqWidth;
Page = Page +1; // DQ16 -> memory:byte_unit *2
if (DqWidth == 1) { // paralle dq_16 => Page + 1
Page = Page +1;
}
// REG_SDR_MISC
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
// REG_SDR_DCR
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
// REG_SDR_IOCR
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
if(DeviceType != 8){
tmp =DramEmr2;
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
}
tmp =DramMr0;
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
tmp =(CrTrtw << 20) |
((((TwtrTck)/DfiRate)+3) << 17) |
((((TccdTck)/DfiRate)+1) << 14) |
((((TrcdPs)/DramPeriod)+1) << 10) |
((((TrcPs)/DramPeriod)+1) << 4 ) |
(((TrrdTck/DfiRate)+1) << 0);
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
// Set Idle
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
// start init
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
// enter memory mode
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
}
__config_dram_param_fixed(){
__var tmp;
// Dram Attribute
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
__mem_test(){
__var i;
__var vaddr;
__var tmp;
i=0;
while(i<10){
vaddr = 0x30000000+((i*23)&0x1FFFFC);
__writeMemory32(0x55AA55AA, vaddr, "Memory");
tmp = __readMemory32(vaddr,"Memory");
if(tmp!=0x55AA55AA)
return 1;
i=i+1;
}
return 0;
}
__var ok_pipe_id0;
__var ok_pipe_id1;
__var ok_tpc_min0;
__var ok_tpc_max0;
__var ok_tpc_min1;
__var ok_tpc_max1;
__var tpc0_cnt;
__var tpc1_cnt;
// calibration result
__var isCalibrationDone;
__dram_calibration(){
__var rdp;
__var tpc;
__var rdp_reg;
__var tpc_reg;
__var err_cnt;
__var ok_cnt;
ok_cnt=0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
err_cnt=0;
// try pipe
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
// try tpc
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
if(__mem_test()==0){
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
}else{
err_cnt++;
}
}
if(ok_pipe_id0!=15){
ok_pipe_id1 = ok_pipe_id0;
ok_tpc_min1 = ok_tpc_min0;
ok_tpc_max1 = ok_tpc_max0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
}
}
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
if(tpc0_cnt<0) tpc0_cnt = 0;
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
if(tpc1_cnt<0) tpc1_cnt = 0;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}
__setup_system()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__config_dram_param();
if(isCalibrationDone){
__var rdp_reg;
__var tpc_reg;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}else{
// Calibration
__dram_calibration();
isCalibrationDone = 1;
}
}
execUserPreload()
{
// Register dram common.mac
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__message "User Preload....";
//isCalibrationDone = 0;
__setup_system();
}
execUserSetup()
{
__var tmp;
__message "User Setup....";
// if use normal reset, please unmark those 2 lines
//execUserPreload();
__setup_system();
//__loadImage("$TARGET_PATH$", 0, 0);
// DISABLE DRAM init
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
__writeMemory32(tmp, 0x40000210, "Memory");
}

392
RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.mac
View file

@ -1,392 +0,0 @@
//DRAM_INFO
__var DeviceType;
__var Page;
__var Bank;
__var DqWidth;
//DRAM_MODE_REG_INFO
__var BstLen;
__var BstType;
__var Mode0Cas;
__var Mode0Wr;
__var Mode1DllEnN;
__var Mode1AllLat;
__var Mode2Cwl;
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
__var DramTimingTref;
__var DramRowNum;
__var Tck;
//DRAM_TIMING_INFO
__var TrfcPs;
__var TrefiPs;
__var WrMaxTck;
__var TrcdPs;
__var TrpPs;
__var TrasPs;
__var TrrdTck;
__var TwrPs;
__var TwtrTck;
__var TmrdTck;
__var TrtpTck;
__var TccdTck;
__var TrcPs;
//DRAM_DEVICE_INFO
__var DdrPeriodPs;
__var DfiRate;
__config_dram_param(){
__var CsBstLen;
__var CasWr;
__var CasRd;
__var CasRdT;
__var ClrSrt;
__var AddLat;
__var DramEmr2;
__var DramMr0;
__var CrTwr;
__var DramMaxWr;
__var DramWr;
__var CrTrtw;
__var CrTrtwT;
__var DramPeriod;
__var DdrType;
//__var paDqWidth;
//__var paPage;
//__var paDfiRate
__var tmp;
// Load parameter
__load_dram_param();
DfiRate = 1<<DfiRate;
DramPeriod = DdrPeriodPs*DfiRate;
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
DramWr = ((TwrPs) / DramPeriod)+1;
CrTwr = ((TwrPs) / DramPeriod) + 3;
if (CrTwr < DramMaxWr) {
CrTwr = CrTwr;
}else {
CrTwr = DramMaxWr;
}
if(DeviceType==2){ // Case DDR2
DdrType = 2;
if (BstLen == 0){
CsBstLen = 0;
CrTrtwT = 4;
DramMr0 = 2;
}else{
CsBstLen = 1;
CrTrtwT = 6;
DramMr0 = 3;
}
CasRd = Mode0Cas;
AddLat = Mode1AllLat;
CasWr = CasRd + AddLat -1;
DramEmr2 = 0;
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
}
if(DeviceType==3){ // Case DDR3
DdrType = 3;
if (BstLen==0){
CsBstLen = 0; //bst_4
DramMr0 = 2;
}else{
CsBstLen = 1; // bst_8
DramMr0 = 0;
}
CrlSrt = (Mode0Cas >> 1);
if (((Mode0Cas) & 0x1) ) {
CasRdT = CrlSrt+ 12;
}else{
CasRdT = CrlSrt+ 4;
}
AddLat = 0;
if (Mode1AllLat == 1) { // CL-1
AddLat = CasRd -1;
}
if (Mode1AllLat == 2){ // CL-2
AddLat = CasRd -2;
}
CasRd = CasRdT + AddLat;
CasWr = Mode2Cwl + 5 + AddLat;
DramEmr2 = Mode2Cwl << 3;
DramWr = (DramWr + 1) / 2;
if (DramWr == 16) {
DramWr = 0;
}
if (DramWr <= 9) { // 5< wr <= 9
DramWr = DramWr - 4;
}
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
CrTrtwT = (CasRdT + 6) - CasWr;
}
if (DeviceType == 8){
DdrType = 8;
if (BstLen == 0) {
DramMr0 = 2; // bst_4
CsBstLen = 0; //bst_4
CasRd = 0x2;
} else {
DramMr0 = 3; // bst_8
CsBstLen = 1; // bst_8
CasRd = 0x3;
}
CasWr = 0;
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
}
// countting tRTW
if ((CrTrtwT & 0x1)) {
CrTrtw = (CrTrtwT+1) /(DfiRate);
} else {
CrTrtw = CrTrtwT /(DfiRate);
}
DqWidth = DqWidth;
Page = Page +1; // DQ16 -> memory:byte_unit *2
if (DqWidth == 1) { // paralle dq_16 => Page + 1
Page = Page +1;
}
// REG_SDR_MISC
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
// REG_SDR_DCR
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
// REG_SDR_IOCR
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
if(DeviceType != 8){
tmp =DramEmr2;
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
}
tmp =DramMr0;
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
tmp =(CrTrtw << 20) |
((((TwtrTck)/DfiRate)+3) << 17) |
((((TccdTck)/DfiRate)+1) << 14) |
((((TrcdPs)/DramPeriod)+1) << 10) |
((((TrcPs)/DramPeriod)+1) << 4 ) |
(((TrrdTck/DfiRate)+1) << 0);
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
// Set Idle
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
// start init
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
// enter memory mode
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
}
__config_dram_param_fixed(){
__var tmp;
// Dram Attribute
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
__mem_test(){
__var i;
__var vaddr;
__var tmp;
i=0;
while(i<10){
vaddr = 0x30000000+((i*23)&0x1FFFFC);
__writeMemory32(0x55AA55AA, vaddr, "Memory");
tmp = __readMemory32(vaddr,"Memory");
if(tmp!=0x55AA55AA)
return 1;
i=i+1;
}
return 0;
}
__var ok_pipe_id0;
__var ok_pipe_id1;
__var ok_tpc_min0;
__var ok_tpc_max0;
__var ok_tpc_min1;
__var ok_tpc_max1;
__var tpc0_cnt;
__var tpc1_cnt;
// calibration result
__var isCalibrationDone;
__dram_calibration(){
__var rdp;
__var tpc;
__var rdp_reg;
__var tpc_reg;
__var err_cnt;
__var ok_cnt;
ok_cnt=0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
err_cnt=0;
// try pipe
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
// try tpc
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
if(__mem_test()==0){
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
}else{
err_cnt++;
}
}
if(ok_pipe_id0!=15){
ok_pipe_id1 = ok_pipe_id0;
ok_tpc_min1 = ok_tpc_min0;
ok_tpc_max1 = ok_tpc_max0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
}
}
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
if(tpc0_cnt<0) tpc0_cnt = 0;
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
if(tpc1_cnt<0) tpc1_cnt = 0;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}
__setup_system()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__config_dram_param();
if(isCalibrationDone){
__var rdp_reg;
__var tpc_reg;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}else{
// Calibration
__dram_calibration();
isCalibrationDone = 1;
}
}
execUserPreload()
{
// Register dram common.mac
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__load_dram_common();
isCalibrationDone = 0;
__message "User Preload....";
if(__driverType("jlink")){
__message "driver type J-LINK";
}else if(__driverType("cmsisdap")){
__message "driver type CMSIS-DAP";
}else if(__driverType("cmsisdap")){
__message "driver type I-JET";
}
__setup_system();
}
execUserSetup()
{
__var tmp;
__message "User Setup....";
// if use normal reset, please unmark those 2 lines
//execUserPreload();
__setup_system();
if(__driverType("jlink")){
__loadImage("$TARGET_PATH$ ", 0, 0);
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
//tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
}else if(__driverType("cmsisdap") || __driverType("ijet")){
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
}else{
__message "Not support drive type";
}
__writeMemory32(tmp, 0x40000210, "Memory");
}
execUserReset()
{
__var tmp;
__message "User Reset....";
tmp = __readMemory32(0x40000210, "Memory")&(~(1<<27));
tmp = tmp & (~(1<<21));
__writeMemory32(tmp, 0x40000210, "Memory");
}

2
RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h
View file

@ -54,7 +54,7 @@ extern u32 ConfigDebugErr; // 10000314
/* ROM + hal_timer.h & .. */ /* ROM + hal_timer.h & .. */
extern HAL_TIMER_OP HalTimerOp; // 10000318 extern HAL_TIMER_OP HalTimerOp; // 10000318
extern u16 GPIOState[11]; // 10000334 // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию. extern u16 GPIOState[11]; // 10000334 побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию.
extern u32 gTimerRecord; // 1000034C extern u32 gTimerRecord; // 1000034C
/* ROM + hal_ssi.h */ /* ROM + hal_ssi.h */
extern u32 SSI_DBG_CONFIG; // 10000350 extern u32 SSI_DBG_CONFIG; // 10000350

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build/bin/ota.bin
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build/bin/ram_2.bin
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build/bin/ram_2.ns.bin
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build/bin/ram_2.p.bin
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build/bin/ram_all.bin
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4500
build/obj/build.nmap
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File diff suppressed because it is too large Load diff

62
project/inc/platform_autoconf.h
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@ -1,8 +1,10 @@
/* /*
* Automatically generated by make menuconfig: don't edit *
*/ */
#define AUTOCONF_INCLUDED #define AUTOCONF_INCLUDED
#define RTL8710AF
//#define RTL8711AM
/* /*
* Target Platform Selection * Target Platform Selection
*/ */
@ -13,7 +15,6 @@
#undef CONFIG_FPGA #undef CONFIG_FPGA
#undef CONFIG_RTL_SIM #undef CONFIG_RTL_SIM
#undef CONFIG_POST_SIM #undef CONFIG_POST_SIM
/* /*
* < Mass Production Option * < Mass Production Option
*/ */
@ -21,13 +22,15 @@
#undef CONFIG_CP #undef CONFIG_CP
#undef CONFIG_FT #undef CONFIG_FT
#define RTL8195A 1 #define RTL8195A 1
#define CONFIG_CPU_CLK 1 /* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
#define CONFIG_CPU_166_6MHZ 1 // RUN/IDLE/SLP ~63/21/6.4 mA 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
//#define CONFIG_CPU_83_3MHZ 1 // RUN/IDLE/SLP ~55/15/6.4 mA #define CONFIG_CPU_CLK 0
//#define CONFIG_CPU_41_6MHZ 1 // RUN/IDLE ~51/11 mA //166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
//#define CONFIG_CPU_20_8MHZ 1 // RUN/IDLE ~49/9.5 mA //83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA
//#define CONFIG_CPU_10_4MHZ 1 //41.6MHZ - RUN/IDLE ~51/11 mA
//#define CONFIG_CPU_4MHZ 1 // IDLE ~8 mA //20.8MHZ - RUN/IDLE ~49/9.5 mA
//4MHZ - IDLE ~8 mA
#undef CONFIG_FPGA_CLK
#define CONFIG_SDR_CLK 1 #define CONFIG_SDR_CLK 1
#define CONFIG_SDR_100MHZ 1 #define CONFIG_SDR_100MHZ 1
#undef CONFIG_SDR_50MHZ #undef CONFIG_SDR_50MHZ
@ -78,7 +81,7 @@
#else #else
#undef CONFIG_SDIO_DEVICE_EN #undef CONFIG_SDIO_DEVICE_EN
#endif #endif
//#define CONFIG_SDIO_HOST_EN 1 #define CONFIG_SDIO_HOST_EN 1
//#define CONFIG_USB_EN 1 //#define CONFIG_USB_EN 1
#undef CONFIG_USB_NORMAL #undef CONFIG_USB_NORMAL
#define CONFIG_USB_TEST 1 #define CONFIG_USB_TEST 1
@ -124,6 +127,7 @@
#define CONFIG_CRYPTO_NORMAL 1 #define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST #undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1 #define CONFIG_CRYPTO_MODULE 1
#define CONFIG_CRYPTO_STARTUP 0
#define CONFIG_MII_EN 1 #define CONFIG_MII_EN 1
#define CONFIG_PWM_EN 1 #define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1 #define CONFIG_PWM_NORMAL 1
@ -133,7 +137,9 @@
#define CONFIG_EFUSE_NORMAL 1 #define CONFIG_EFUSE_NORMAL 1
#undef CONFIG_EFUSE_TEST #undef CONFIG_EFUSE_TEST
#define CONFIG_EFUSE_MODULE 1 #define CONFIG_EFUSE_MODULE 1
//#define CONFIG_SDR_EN 1 #ifdef RTL8711AM
#define CONFIG_SDR_EN 1
#endif
#define CONFIG_SDR_NORMAL 1 #define CONFIG_SDR_NORMAL 1
#undef CONFIG_SDR_TEST #undef CONFIG_SDR_TEST
#define CONFIG_SDR_MODULE 1 #define CONFIG_SDR_MODULE 1
@ -191,7 +197,6 @@
//#undef CONFIG_DEBUG_WARN_MSG //#undef CONFIG_DEBUG_WARN_MSG
//#undef CONFIG_DEBUG_INFO_MSG //#undef CONFIG_DEBUG_INFO_MSG
#endif // CONFIG_DEBUG_LOG #endif // CONFIG_DEBUG_LOG
/* /*
* < SDK Option Config * < SDK Option Config
*/ */
@ -225,26 +230,17 @@
#undef CONFIG_IMAGE_ALL #undef CONFIG_IMAGE_ALL
#define CONFIG_IMAGE_SEPARATE 1 #define CONFIG_IMAGE_SEPARATE 1
#if defined(CONFIG_CPU_166_6MHZ) #if CONFIG_CPU_CLK < 6
#define CPU_CLOCK_SEL_VALUE 0 #define CPU_CLOCK_SEL_DIV5_3 0
#define PLATFORM_CLOCK (166666666) // (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1)) #define CPU_CLOCK_SEL_VALUE CONFIG_CPU_CLK
#elif defined(CONFIG_CPU_83_3MHZ)
#define CPU_CLOCK_SEL_VALUE 1
#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
#elif defined(CONFIG_CPU_41_6MHZ)
#define CPU_CLOCK_SEL_VALUE 2
#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
#elif defined(CONFIG_CPU_20_8MHZ)
#define CPU_CLOCK_SEL_VALUE 3
#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
#elif defined(CONFIG_CPU_10_4MHZ)
#define CPU_CLOCK_SEL_VALUE 4
#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
#elif defined(CONFIG_CPU_4MHZ)
#define CPU_CLOCK_SEL_VALUE 5
#define PLATFORM_CLOCK (4000000)
#else #else
#define CONFIG_CPU_166_6MHZ 1 #define CPU_CLOCK_SEL_DIV5_3 1
#define CPU_CLOCK_SEL_VALUE (0) #define CPU_CLOCK_SEL_VALUE (CONFIG_CPU_CLK-6)
#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
#endif #endif
#if CPU__CLK_DIV5_3
#define PLATFORM_CLOCK (200000000ul>>CPU_CLOCK_SEL_VALUE)
#else
#define PLATFORM_CLOCK (((200000000ul*5ul)/3ul)>>CPU_CLOCK_SEL_VALUE)
#endif

40
project/src/user/main.c
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@ -121,7 +121,7 @@ static enum mad_flow input(struct mad_stream *stream) {
// We both silence the output as well as wait a while by pushing silent samples into the i2s system. // We both silence the output as well as wait a while by pushing silent samples into the i2s system.
// This waits for about 200mS // This waits for about 200mS
#if DEBUG_MAIN_LEVEL > 1 #if DEBUG_MAIN_LEVEL > 1
DBG_8195A("FIFO: Buffer Underrun\n"); // DBG_8195A("FIFO: Buffer Underrun\n");
#endif #endif
for (n = 0; n < 441*2; n++) sampToOut(0); for (n = 0; n < 441*2; n++) sampToOut(0);
} else { } else {
@ -491,31 +491,37 @@ void connect_start(void) {
*/ */
void main(void) { void main(void) {
#if DEBUG_MAIN_LEVEL > 2 #if DEBUG_MAIN_LEVEL > 3
ConfigDebugErr = -1; ConfigDebugErr = -1;
ConfigDebugInfo = -1; ConfigDebugInfo = -1; //~_DBG_SPI_FLASH_;
ConfigDebugWarn = -1; ConfigDebugWarn = -1;
CfgSysDebugErr = -1;
CfgSysDebugInfo = -1;
CfgSysDebugWarn = -1;
#endif #endif
/* if(HalGetCpuClk() != PLATFORM_CLOCK) {
if ( rtl_cryptoEngine_init() != 0 ) DBG_8195A("crypto engine init failed\r\n"); #if CPU_CLOCK_SEL_DIV5_3
*/ // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz
#if defined(CONFIG_CPU_CLK) HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
#if 1 // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz *((int *)0x40000074) |= (1<<17); // REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) & (~(1<<17))); #else
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
#else // 0 - 200000000 Hz, 1 - 10000000 Hz, 2 - 50000000 Hz, 3 - 25000000 Hz, 4 - 12500000 Hz, 5 - 4000000 Hz *((int *)0x40000074) &= ~(1<<17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
HalCpuClkConfig(1); HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) | (1<<17));
#endif #endif
HAL_LOG_UART_ADAPTER pUartAdapter; HAL_LOG_UART_ADAPTER pUartAdapter;
pUartAdapter.BaudRate = RUART_BAUD_RATE_38400; pUartAdapter.BaudRate = UART_BAUD_RATE_38400;
HalLogUartSetBaudRate(&pUartAdapter); HalLogUartSetBaudRate(&pUartAdapter);
SystemCoreClockUpdate(); SystemCoreClockUpdate();
En32KCalibration(); En32KCalibration();
}
#if defined(CONFIG_CRYPTO_STARTUP) && (CONFIG_CRYPTO_STARTUP)
if ( rtl_cryptoEngine_init() != 0 ) {
DBG_8195A("crypto engine init failed\r\n");
}
#endif #endif
#if DEBUG_MAIN_LEVEL > 1
DBG_INFO_MSG_ON(_DBG_TCM_HEAP_); // On Debug TCM MEM
#endif
#if DEBUG_MAIN_LEVEL > 0 #if DEBUG_MAIN_LEVEL > 0
vPortFree(pvPortMalloc(4)); // Init RAM heap vPortFree(pvPortMalloc(4)); // Init RAM heap
fATST(NULL); // RAM/TCM/Heaps info fATST(NULL); // RAM/TCM/Heaps info