diff --git a/.cproject b/.cproject
index c2ce21c..c87b3e5 100644
--- a/.cproject
+++ b/.cproject
@@ -141,7 +141,7 @@
-
+
@@ -486,6 +486,7 @@
+
@@ -505,7 +506,7 @@
-
+
@@ -806,7 +807,7 @@
-
+
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
index 19453de..f82b9b4 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sys_on.h
@@ -587,6 +587,7 @@
#define BIT_SYS_SYSPLL_LVPC_EN BIT(0)
//2 REG_SYS_SYSPLL_CTRL1
+#define BIT_SYS_SYSPLL_DIV5_3 BIT(17)
#define BIT_SYS_SYSPLL_CK500K_SEL BIT(15)
#define BIT_SYS_SYSPLL_CK200M_EN BIT(14)
#define BIT_SYS_SYSPLL_CKSDR_EN BIT(13)
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform.a.0 b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform.a.0
deleted file mode 100644
index 90e7f68..0000000
Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform.a.0 and /dev/null differ
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld
index 3fe1352..b74c467 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld
@@ -8,7 +8,7 @@ INCLUDE "export-rom_v04.txt"
MEMORY
{
ROM_USED_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */
- ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */
+ ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */
RAM_HEAP1 (rwx) : ORIGIN = 0x10003000, LENGTH = 12K /* end 0x10006000 */
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */
@@ -99,7 +99,7 @@ SECTIONS
.ram_image2.text :
{
- *(.infra.ram.start*)
+ *(.infra.ram.start*)
. = ALIGN(4);
KEEP(*(.init))
@@ -120,16 +120,16 @@ SECTIONS
PROVIDE (__fini_array_end = .);
*(.mon.ram.text*)
- *(.hal.flash.text*)
+ *(.hal.flash.text*)
*(.hal.sdrc.text*)
*(.hal.gpio.text*)
*(.fwu.text*)
*(.otg.rom.text*)
+ *(.text*)
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
- *(.text*)
} > BD_RAM
.ram_image2.rodata :
@@ -143,11 +143,11 @@ SECTIONS
. = ALIGN(4);
xHeapRegions = .;
LONG(__ram_heap1_start__)
- LONG(__ram_heap1_end__ - __ram_heap1_start__)
+ LONG(__ram_heap1_end__ - __ram_heap1_start__)
LONG(__ram_heap2_start__)
LONG(__ram_heap2_end__ - __ram_heap2_start__)
LONG(__sdram_heap_start__)
- LONG(__sdram_heap_end__ - __sdram_heap_start__)
+ LONG(__sdram_heap_end__ - __sdram_heap_start__)
LONG(0)
LONG(0)
} > BD_RAM
@@ -156,26 +156,26 @@ SECTIONS
{
__data_start__ = .;
*(.data*)
+ *(.p2p.data*)
+ *(.wps.data*)
+ *(.websocket.data*)
+ *(.sdram.data*)
__data_end__ = .;
- __ram_image2_text_end__ = .;
+ __ram_image2_text_end__ = .;
} > BD_RAM
.ram.bss :
{
__bss_start__ = .;
.ram.bss$$Base = .;
- *(.hal.flash.data*)
- *(.hal.sdrc.data*)
+ *(.hal.flash.data*)
+ *(.hal.sdrc.data*)
*(.hal.gpio.data*)
*(.fwu.data*)
*(.bdsram.data*)
*(.bfsram.data*)
- *(.sdram.data*)
- *(.p2p.data*)
- *(.wps.data*)
- *(.websocket.data*)
- *(.bss*)
*(COMMON)
+ *(.bss*)
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
@@ -222,5 +222,3 @@ SECTIONS
KEEP(*(.loader.head*))
}
}
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c
index 30c230a..6403587 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_consol.c
@@ -9,13 +9,13 @@
#include "rtl8195a.h"
//#include
-#include "rtl_consol.h"
+#include "rtl_bios_data.h"
+//#include "rtl_consol.h"
#include "osdep_api.h"
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
#include "freertos_pmu.h"
#endif
#include "tcm_heap.h"
-#include "rtl_bios_data.h"
//MON_RAM_BSS_SECTION UART_LOG_CTL UartLogCtl;
//MON_RAM_BSS_SECTION UART_LOG_CTL *pUartLogCtl;
@@ -316,8 +316,7 @@ RtlConsolTaskRam(
//4 Set this for UartLog check cmd history
#ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 1;
-#endif
-#ifndef CONFIG_KERNEL
+#else
pUartLogCtl->BootRdy = 1;
#endif
do{
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf
deleted file mode 100644
index c00b2b0..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf
+++ /dev/null
@@ -1,23 +0,0 @@
-;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Used to define address zones within the ARM address space (Memory).
-;;
-;; Name may be almost anything
-;; AdrSpace must be Memory
-;; StartAdr start of memory block
-;; EndAdr end of memory block
-;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
-
-[Memory]
-;; Name AdrSpace StartAdr EndAdr AccType Width
-Memory = ROM Memory 0x00000000 0x003FFFFF RW
-Memory = SRAM Memory 0x10000000 0x1FFFFFFF RW
-Memory = DRAM Memory 0x30000000 0x30FFFFFF RW
-Memory = SFR Memory 0x40000000 0x41FFFFFF RW
-Memory = SFR_Bitband Memory 0x42000000 0x43FFFFFF RW
-Memory = PPB Memory 0xE0000000 0xFFFFFFFF RW
-
-TrustedRanges = true
-UseSfrFilter = true
-
-[SfrInclude]
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac
deleted file mode 100644
index 64aea1e..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac
+++ /dev/null
@@ -1,41 +0,0 @@
-__load_dram_param(){
- //DRAM_INFO
- DeviceType = 8; //DRAM_SDR
- Page = 0; //DRAM_COLADDR_8B
- Bank=0; //DRAM_BANK_2
- DqWidth=0; //DRAM_DQ_1
-
- //DRAM_MODE_REG_INFO
- BstLen=0; //BST_LEN_4
- BstType=0; //SENQUENTIAL
- Mode0Cas=3;
- Mode0Wr=0;
- Mode1DllEnN=0;
- Mode1AllLat=0;
- Mode2Cwl=0;
-
- //DRAM_TIMING_INFO
- DramTimingTref = 64000;
- DramRowNum = 8192;
- //SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
- Tck = 80000; //SDR 12.5MHZ
-
- TrfcPs=60000;
- TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
- WrMaxTck=2;
- TrcdPs=15000;
- TrpPs=15000;
- TrasPs=42000;
- TrrdTck=2;
- TwrPs=Tck*2;
- TwtrTck=0;
- TmrdTck=2;
- TrtpTck=0;
- TccdTck=1;
- TrcPs=60000;
-
- //DRAM_DEVICE_INFO
- DdrPeriodPs=Tck;
- DfiRate=0; //DFI_RATIO_1
-
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac
deleted file mode 100644
index d79771c..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac
+++ /dev/null
@@ -1,4 +0,0 @@
-
-__load_dram_common(){
- __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt
deleted file mode 100644
index 2fa0238..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-To Change DRAM setting
-
-1. Create and Fill content like EM6A6165TS_7G.mac
-2. Change load file in common.mac
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader.zip b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader.zip
new file mode 100644
index 0000000..7b69728
Binary files /dev/null and b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader.zip differ
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.dep b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.dep
deleted file mode 100644
index d330010..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.dep
+++ /dev/null
@@ -1,281 +0,0 @@
-
-
-
- 2
- 4138292931
-
- Debug
-
- $PROJ_DIR$\Debug\Obj\FlashLoader.pbd
- $PROJ_DIR$\framework2\flash_loader.c
- $PROJ_DIR$\framework2\flash_loader_asm.s
- $PROJ_DIR$\Debug\Obj\flash_loader.o
- $TOOLKIT_DIR$\inc\c\DLib_Threads.h
- $TOOLKIT_DIR$\inc\c\yvals.h
- $TOOLKIT_DIR$\inc\c\stdint.h
- $PROJ_DIR$\framework2\flash_loader.h
- $PROJ_DIR$\framework2\flash_config.h
- $PROJ_DIR$\framework2\flash_loader_extra.h
- $TOOLKIT_DIR$\inc\c\ycheck.h
- $PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.o
- $TOOLKIT_DIR$\inc\c\DLib_Defaults.h
- $TOOLKIT_DIR$\inc\c\xencoding_limits.h
- $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
- $TOOLKIT_DIR$\inc\c\DLib_Product.h
- $PROJ_DIR$\..\FlashRTL8195aMP.out
- $PROJ_DIR$\Debug\Obj\hal_misc.pbi
- $PROJ_DIR$\Debug\Obj\flash_MX25L8008.o
- $TOOLKIT_DIR$\inc\c\stddef.h
- $PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.pbi
- $PROJ_DIR$\Debug\Obj\flash_loader.pbi
- $PROJ_DIR$\Debug\Obj\flash_loader_asm.o
- $PROJ_DIR$\Debug\Obj\flash_MX25L8008.pbi
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_timer.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_util.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_diag.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_irqn.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_peri_on.h
- $PROJ_DIR$\..\..\..\..\..\..\common\bsp\basic_types.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_peri_on.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_spi_flash.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_common.h
- $PROJ_DIR$\..\..\..\..\..\..\common\bsp\section_config.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_timer.h
- $PROJ_DIR$\..\..\..\..\..\cmsis\core_cmFunc.h
- $PROJ_DIR$\..\..\..\..\..\cmsis\core_cm3.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_sys_on.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_pinmux.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_soc_ps_monitor.h
- $PROJ_DIR$\..\..\..\..\..\cmsis\device\diag.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_platform.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_api.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_misc.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_vector_table.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_spi_flash.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_efuse.h
- $PROJ_DIR$\..\..\..\..\..\cmsis\core_cmInstr.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_log_uart.h
- $PROJ_DIR$\flash_MX25L8008.c
- $PROJ_DIR$\rtl8195a\hal_misc.c
- $PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c
- $TOOLKIT_DIR$\inc\c\ysizet.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a.h
- $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
- $TOOLKIT_DIR$\lib\rt7M_tl.a
- $PROJ_DIR$\Debug\Obj\hal_spi_flash_ram.__cstat.et
- $TOOLKIT_DIR$\inc\c\string.h
- $TOOLKIT_DIR$\inc\c\stdlib.h
- $PROJ_DIR$\Debug\Obj\flash_loader.__cstat.et
- $PROJ_DIR$\Debug\Obj\hal_misc.__cstat.et
- $PROJ_DIR$\Debug\Obj\flash_MX25L8008.__cstat.et
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_usb.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_dac.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2s.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2s.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_pwm.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_pwm.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_wdt.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_i2c.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_adc.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_nfc.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_i2c.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_dac.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_nfc.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_adc.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_usb.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_mii.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a_usb.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_mii.h
- $TOOLKIT_DIR$\lib\m7M_tl.a
- $TOOLKIT_DIR$\lib\dl7M_tln.a
- $PROJ_DIR$\platform_autoconf.h
- $PROJ_DIR$\..\FlashLoader.bin
- $PROJ_DIR$\mx25l8008_flashloader_mp.icf
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_ssi.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_gdma.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_ssi.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_uart.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_gpio.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gpio.h
- $PROJ_DIR$\..\..\..\..\..\fwlib\rtl8195a\rtl8195a_gdma.h
- $PROJ_DIR$\Debug\List\FlashRTL8195aMP.map
- $PROJ_DIR$\..\..\..\..\..\fwlib\hal_uart.h
- $PROJ_DIR$\Debug\Obj\hal_misc.o
- $PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c
-
-
- $PROJ_DIR$\framework2\flash_loader.c
-
-
- BICOMP
- 21
-
-
- ICCARM
- 3
-
-
- __cstat
- 59
-
-
-
-
- BICOMP
- 9 6 5 10 4 7 8 12 13 14 15
-
-
- ICCARM
- 7 8 6 10 5 12 14 15 13 4 9
-
-
-
-
- $PROJ_DIR$\framework2\flash_loader_asm.s
-
-
- AARM
- 22
-
-
-
-
- [ROOT_NODE]
-
-
- ILINK
- 16 92
-
-
-
-
- $PROJ_DIR$\..\FlashRTL8195aMP.out
-
-
- ILINK
- 92
-
-
- OBJCOPY
- 83
-
-
-
-
- ILINK
- 84 3 22 18 94 11 55 80 81
-
-
-
-
- $PROJ_DIR$\flash_MX25L8008.c
-
-
- BICOMP
- 23
-
-
- ICCARM
- 18
-
-
- __cstat
- 61
-
-
-
-
- BICOMP
- 42 26 89 69 4 43 87 78 53 10 5 29 46 65 62 41 74 7 52 6 45 39 66 79 27 58 9 54 12 13 14 15 37 44 24 40 91 93 73 70 71 82 19 35 86 57 8 33 30 38 28 31 25 32 36 90 85 88 72 67 64 63 75 68 76 48 77 34 47
-
-
- ICCARM
- 57 10 5 12 14 15 13 4 52 54 58 7 8 6 9 53 82 29 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79
-
-
-
-
- $PROJ_DIR$\rtl8195a\hal_misc.c
-
-
- BICOMP
- 17
-
-
- ICCARM
- 94
-
-
- __cstat
- 60
-
-
-
-
- BICOMP
- 42 24 10 26 91 89 69 93 70 13 15 87 78 37 44 40 73 71 29 53 74 41 43 45 46 39 66 65 62 79 12 14 82 6 33 30 38 28 27 31 25 32 36 86 90 85 88 72 67 64 63 75 68 76 48 77 5 4 34 35 19 52 47
-
-
- ICCARM
- 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79
-
-
-
-
- $PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c
-
-
- BICOMP
- 20
-
-
- ICCARM
- 11
-
-
- __cstat
- 56
-
-
-
-
- BICOMP
- 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78
-
-
- ICCARM
- 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79
-
-
-
-
- $PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c
-
-
- BICOMP
- 20
-
-
- ICCARM
- 11
-
-
- __cstat
- 56
-
-
-
-
- BICOMP
- 27 72 36 26 33 39 90 48 29 6 65 38 31 86 67 75 68 89 87 69 42 53 82 30 28 25 32 24 85 88 64 63 74 76 77 5 10 4 34 35 79 45 37 41 43 44 46 40 91 93 66 73 70 71 62 12 13 14 15 19 52 47 78
-
-
- ICCARM
- 53 82 29 6 10 5 12 14 15 13 4 33 37 30 41 38 42 27 28 43 44 26 45 31 24 34 25 46 39 40 19 52 32 36 47 35 86 91 89 90 85 87 93 88 72 69 66 67 64 65 73 63 75 70 71 74 68 76 78 62 48 77 79
-
-
-
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewd b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewd
deleted file mode 100644
index 539dcac..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewd
+++ /dev/null
@@ -1,1522 +0,0 @@
-
-
-
- 2
-
- Debug
-
- ARM
-
- 1
-
- C-SPY
- 2
-
- 27
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- ARMSIM_ID
- 2
-
- 1
- 1
- 1
-
-
-
-
-
-
-
- ANGEL_ID
- 2
-
- 0
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
- CMSISDAP_ID
- 2
-
- 2
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewp b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewp
deleted file mode 100644
index 1cdbff3..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewp
+++ /dev/null
@@ -1,995 +0,0 @@
-
-
-
- 2
-
- Debug
-
- ARM
-
- 1
-
- General
- 3
-
- 24
- 1
- 1
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-
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- 31
- 1
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- 1
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-
- $PROJ_DIR$\framework2\flash_loader.c
-
-
- $PROJ_DIR$\framework2\flash_loader_asm.s
-
-
-
- rtl8195a
-
- $PROJ_DIR$\rtl8195a\hal_misc.c
-
-
- $PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c
-
-
-
- $PROJ_DIR$\flash_MX25L8008.c
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewt b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewt
deleted file mode 100644
index cc2f75e..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.ewt
+++ /dev/null
@@ -1,1074 +0,0 @@
-
-
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- 2
-
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-
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-
- 1
-
- C-STAT
- 1
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-
-
-
- Framework
-
- $PROJ_DIR$\framework2\flash_loader.c
-
-
- $PROJ_DIR$\framework2\flash_loader_asm.s
-
-
-
- rtl8195a
-
- $PROJ_DIR$\rtl8195a\hal_misc.c
-
-
- $PROJ_DIR$\rtl8195a\hal_spi_flash_ram.c
-
-
-
- $PROJ_DIR$\flash_MX25L8008.c
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.eww b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.eww
deleted file mode 100644
index 306dcc2..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/FlashLoader.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
-
- $WS_DIR$\FlashLoader.ewp
-
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/flash_MX25L8008.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/flash_MX25L8008.c
deleted file mode 100644
index 7215b59..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/flash_MX25L8008.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*******************************************************************************
-*
-* Project: Realtek Ameba flash loader project
-*
-* Description: Memory-specific routines for Flash Loader.
-*
-* Copyright by Diolan Ltd. All rights reserved.
-*
-*******************************************************************************/
-#include
-#include
-#include "flash_loader.h"
-#include "flash_loader_extra.h"
-
-#include "rtl8195a.h"
-//#include "rtl8195a/hal_misc.h"
-//#include "rtl8195a/hal_spi_flash.h"
-//#include "rtl8195a/core_cm3.h"
-
-extern VOID
-HalReInitPlatformLogUart(
- VOID
-);
-
-extern VOID
-PatchHalInitPlatformTimer(
-VOID
-);
-
-extern VOID
-PatchHalInitPlatformLogUart(
- VOID
-);
-
-extern VOID
-PatchSpicInitRtl8195A
-(
- IN u8 InitBaudRate,
- IN u8 SpicBitMode
-);
-
-extern VOID
-SpicLoadInitParaFromClockRtl8195A
-(
- IN u8 CpuClkMode,
- IN u8 BaudRate,
- IN PSPIC_INIT_PARA pSpicInitPara
-);
-
-extern VOID
-SpicWaitBusyDoneRtl8195A();
-
-extern VOID
-SpicWaitWipDoneRtl8195A
-(
- IN SPIC_INIT_PARA SpicInitPara
-);
-
-extern VOID
-SpicTxCmdRtl8195A
-(
- IN u8 cmd,
- IN SPIC_INIT_PARA SpicInitPara
-);
-
-extern u8
-SpicGetFlashStatusRtl8195A
-(
- IN SPIC_INIT_PARA SpicInitPara
-);
-
-__no_init unsigned int flash_loc;
-__no_init unsigned int erase_loc;
-__no_init unsigned int is_cascade;
-__no_init unsigned int is_head;
-__no_init unsigned int is_dbgmsg;
-__no_init unsigned int is_erasecal;
-__no_init unsigned int img2_addr;
-
-int rest_count;
-int first_write;
-SPIC_INIT_PARA SpicInitPara;
-
-#define PATTERN_1 0x96969999
-#define PATTERN_2 0xFC66CC3F
-#define PATTERN_3 0x03CC33C0
-#define PATTERN_4 0x6231DCE5
-
-
-#define DBGPRINT(fmt, arg...) do \
-{ if( is_dbgmsg ) DiagPrintf(fmt, ##arg); }\
-while(0)
-
-//unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
-unsigned int seg_head[4] = {0,0,0,0};
-
-extern SPIC_INIT_PARA SpicInitCPUCLK[4];
-
-void dump_flash_header(void)
-{
- uint32_t data;
- data = HAL_READ32(SPI_FLASH_BASE, 0);
- DBGPRINT("\n\r 0: %x", data);
- data = HAL_READ32(SPI_FLASH_BASE, 4);
- DBGPRINT("\n\r 4: %x", data);
- data = HAL_READ32(SPI_FLASH_BASE, 8);
- DBGPRINT("\n\r 8: %x", data);
- data = HAL_READ32(SPI_FLASH_BASE, 12);
- DBGPRINT("\n\r 12: %x", data);
-}
-
-const char* find_option(char* option, int withValue, int argc, char const* argv[])
-{
- int i;
- for (i = 0; i < argc; i++) {
- if (strcmp(option, argv[i]) == 0){
- if (withValue) {
- if (i + 1 < argc) {
- // The next argument is the value.
- return argv[i + 1];
- }
- else {
- // The option was found but there is no value to return.
- return 0;
- }
- }
- else
- {
- // Return the flag argument itself just to get a non-zero pointer.
- return argv[i];
- }
- }
- }
- return 0;
-}
-
-static VOID
-FlashDownloadHalInitialROMCodeGlobalVar(VOID)
-{
- // to initial ROM code using global variable
- ConfigDebugErr = _DBG_MISC_;
- ConfigDebugInfo= 0x0;
- ConfigDebugWarn= 0x0;
-}
-/*
-static VOID
-FlashDownloadHalCleanROMCodeGlobalVar(VOID)
-{
- ConfigDebugErr = 0x0;
- ConfigDebugInfo= 0x0;
- ConfigDebugWarn= 0x0;
-}
-*/
-// Please clean this Array
-extern SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
-
-u8 FlashType;
-uint32_t FlashInit(void *base_of_flash, uint32_t image_size, uint32_t link_address, uint32_t flags, int argc, char const *argv[])
-{
- u8 CpuClk;
- u8 Value8, InitBaudRate;
-
- char *addr;
-
- SPIC_INIT_PARA InitCPUCLK[4] = {
- {0x1,0x1,0x5E,0}, //default cpu 41, baud 1
- {0x1,0x1,0x0,0}, //cpu 20.8 , baud 1
- {0x1,0x2,0x23,0}, //cpu 83.3, baud 1
- {0x1,0x5,0x5,0},
- };
- memcpy(SpicInitCPUCLK, InitCPUCLK, sizeof(InitCPUCLK));
- memset(SpicInitParaAllClk, 0, sizeof(SPIC_INIT_PARA)*3*CPU_CLK_TYPE_NO);
-
- SpicInitPara.BaudRate = 0;
- SpicInitPara.DelayLine = 0;
- SpicInitPara.RdDummyCyle = 0;
- SpicInitPara.Rsvd = 0;
-
- if(find_option( "--erase_cal", 0, argc, argv ))
- is_erasecal = 1;
- else
- is_erasecal = 0;
-
- if(find_option( "--cascade", 0, argc, argv ))
- is_cascade = 1;
- else
- is_cascade = 0;
-
- if(find_option( "--head", 0, argc, argv ))
- is_head = 1;
- else
- is_head = 0;
-
- if(find_option( "--dbgmsg", 0, argc, argv ))
- is_dbgmsg = 1;
- else
- is_dbgmsg = 0;
-
- if( (addr = (char*)find_option( "--img2_addr", 1, argc, argv))){
- img2_addr = atol(addr)/1024; // strtod(addr, NULL)/1024; //
- DBG_8195A(" image2 start address = %s, offset = %x\n\r", addr, img2_addr);
- }else
- img2_addr = 0;
-
- memset((void *) 0x10000300, 0, 0xbc0-0x300);
-
- // Load Efuse Setting
- Value8 = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6) & 0xFF000000)
- >> 24);
-
- InitBaudRate = ((Value8 & 0xC)>>2);
-
- // Make sure InitBaudRate != 0
- if (!InitBaudRate) {
- InitBaudRate +=1;
- }
-
- CpuClk = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
- SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
-
- // Reset to low speed
- HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1, 0x21);
-
- FlashDownloadHalInitialROMCodeGlobalVar();
-
- //2 Need Modify
- VectorTableInitRtl8195A(0x1FFFFFFC);
-
- //3 Initial Log Uart
- PatchHalInitPlatformLogUart();
-
- //3 Initial hardware timer
- PatchHalInitPlatformTimer();
-
- DBG_8195A("\r\n===> Flash Init \n\r");
- //4 Initialize the flash first
- if (HAL_READ32(REG_SOC_FUNC_EN,BIT_SOC_FLASH_EN) & BIT_SOC_FLASH_EN) {
- FLASH_FCTRL(OFF);
- }
-
- FLASH_FCTRL(ON);
- ACTCK_FLASH_CCTRL(ON);
- SLPCK_FLASH_CCTRL(ON);
- PinCtrl(SPI_FLASH,S0,ON);
-
- PatchSpicInitRtl8195A(SpicInitPara.BaudRate, SpicOneBitMode);
-
- SpicFlashInitRtl8195A(SpicOneBitMode);
-
- FlashType = SpicInitParaAllClk[SpicOneBitMode][0].flashtype;
-
- char* vendor[] = {"Others", "MXIC", "Winbond", "Micron"};
- DBG_8195A("\r\n===> Flash Init Done, vendor: \x1b[32m%s\x1b[m \n\r", vendor[FlashType]);
-
- first_write = 1;
- rest_count = theFlashParams.block_size;
- seg_head[0] = theFlashParams.block_size;
- seg_head[1] = theFlashParams.offset_into_block;
- if(is_head){
- seg_head[2] = 0xFFFF0000|img2_addr;
- seg_head[3] = 0xFFFFFFFF;
- }else{
- if(is_cascade==0){
- // Image2 signature
- seg_head[2] = 0x35393138; //8195
- seg_head[3] = 0x31313738; //8711
- }else{
- seg_head[2] = 0xFFFFFFFF;
- seg_head[3] = 0xFFFFFFFF;
- }
- }
-
- //DBG_8195A("link_address = %08x, flags = %08x ...\n\r", link_address, flags);
-
- if(is_cascade==0 && is_head==0){
- // mark partition 2 to old if existing
- unsigned int ota_addr = HAL_READ32(SPI_FLASH_BASE, 0x9000);
-
- //check OTA address valid
- if( ota_addr == 0xFFFFFFFF || ota_addr > 64*1024*1024 ){
- DBG_8195A("\r\n\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
- DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
- DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
- DBG_8195A("continue downloading...\n\r" );
- return RESULT_OK;
- }else{
- DBG_8195A("\x1b[36mOTA addr is %x \x1b[m\n\r", ota_addr );
- }
-
- int sig0 = HAL_READ32(SPI_FLASH_BASE, ota_addr+8);
- int sig1 = HAL_READ32(SPI_FLASH_BASE, ota_addr+12);
-
- if(sig0==0x35393138 && sig1==0x31313738){
- DBG_8195A("\r\n>>>> mark parition 2 as older \n\r" );
- HAL_WRITE32(SPI_FLASH_BASE, ota_addr+8, 0x35393130); // mark to older version
- // wait spic busy done
- SpicWaitBusyDoneRtl8195A();
- // wait flash busy done (wip=0)
- if(FlashType == FLASH_MICRON)
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- else
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
- }
- }
- dump_flash_header();
- //SpicEraseFlashRtl8195A();
- return RESULT_OK;
-}
-
-void write_spi_flash(uint32_t data)
-{
- HAL_WRITE32(SPI_FLASH_BASE, flash_loc, data);
- // wait spic busy done
- SpicWaitBusyDoneRtl8195A();
-
- // wait flash busy done (wip=0)
- if(FlashType == FLASH_MICRON)
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- else
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
- flash_loc+=4;
-}
-
-uint32_t FlashWrite(void *block_start, uint32_t offset_into_block, uint32_t count, char const *buffer)
-{
- int write_cnt=0;
- uint32_t* buffer32 = (uint32_t*)buffer;
-
- DBG_8195A("\r\n===> Flash Write, start %x, addr %x, offset %d, count %d, buf %x\n\r", block_start, flash_loc, offset_into_block, count, buffer);
-
- if(first_write){
- if(!is_cascade){
- flash_loc = (unsigned int)block_start;
- }
- if(is_head){
- unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
- DBGPRINT("Write FW header....");
- flash_loc=0;
- write_spi_flash(fw_head[0]);
- write_spi_flash(fw_head[1]);
- write_spi_flash(fw_head[2]);
- write_spi_flash(fw_head[3]);
- DBGPRINT("Write FW header.... %x %x %x %x --> Done\n\r", fw_head[0], fw_head[1], fw_head[2], fw_head[3]);
- }
- DBGPRINT("Write SEG header....");
- first_write = 0;
- write_spi_flash(seg_head[0]);
- write_spi_flash(seg_head[1]);
- write_spi_flash(seg_head[2]);
- write_spi_flash(seg_head[3]);
- DBGPRINT("Write SEG header.... %x %x %x %x --> Done\n\r", seg_head[0], seg_head[1], seg_head[2], seg_head[3]);
- }
-
- if(rest_count < count)
- count = rest_count;
-
- // DO Write Here
- DBG_8195A("Write Binary....");
- while (write_cnt < count)
- {
- write_spi_flash(*buffer32);
- write_cnt += 4;
- buffer32++;
- }
- DBG_8195A("Write Binary....Done\n\r");
-
- rest_count-=count;
- DBG_8195A("\r\n<=== Flash Write Done %x\n\r", flash_loc);
- DBGPRINT("first 4 bytes %2x %2x %2x %2x\n\r", buffer[0],buffer[1],buffer[2],buffer[3]);
- DBGPRINT("last 4 bytes %2x %2x %2x %2x\n\r", buffer[count-4],buffer[count-3],buffer[count-2],buffer[count-1]);
- return RESULT_OK;
-}
-
-uint32_t FlashErase(void *block_start, uint32_t block_size)
-{
- if(is_head == 1)
- erase_loc = 0;
-
- if(!is_cascade)
- erase_loc = (unsigned int)block_start;
-
- if(erase_loc != 0xa000){
- SpicSectorEraseFlashRtl8195A(erase_loc);
- DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
- }else{
- if(is_erasecal){
- SpicSectorEraseFlashRtl8195A(erase_loc);
- DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
- }
- }
- erase_loc += 4096;
-
- return 0;
-}
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_config.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_config.h
deleted file mode 100644
index d5c4c34..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_config.h
+++ /dev/null
@@ -1,22 +0,0 @@
-// You should create a copy of this file in your flash loader project
-// and configure it as described below
-
-// when this macro is non-zero, your FlashInit function should accept
-// extra 'argc' and 'argv' arguments as specified by the function
-// prototype in 'flash_loader.h'
-#define USE_ARGC_ARGV 1
-
-// You can customize the memory reserved for passing arguments to FlashInit
-// through argc and argv.
-#if USE_ARGC_ARGV
-// This specifies the maximum allowed number of arguments in argv
-#define MAX_ARGS 5
-// This specifies the maximum combined size of the arguments, including
-// a trailing null for each argument
-#define MAX_ARG_SIZE 64
-#endif
-
-// If this is true (non-zero), the parameter designating the code destination
-// in flash operations will be a 'void *', otherwise it will be a uint32_t.
-// Targets where void * is smaller than a code pointer should set this to 0.
-#define CODE_ADDR_AS_VOID_PTR 1
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.c
deleted file mode 100644
index fcc21fe..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.c
+++ /dev/null
@@ -1,145 +0,0 @@
-// Wrapper for target-specific flash loader code
-
-#include "flash_loader.h"
-#include "flash_loader_extra.h"
-
-#ifndef MAX_ARGS
-#define MAX_ARGS 7
-#endif
-
-// Maximum combined size of arguments, including a trailing null for each argument.
-#ifndef MAX_ARG_SIZE
-#define MAX_ARG_SIZE 64
-#endif
-
-// Functions in this file, called from the assembly wrapper
-void Fl2FlashInitEntry(void);
-void Fl2FlashWriteEntry(void);
-void Fl2FlashEraseWriteEntry(void);
-void Fl2FlashChecksumEntry(void);
-void Fl2FlashSignoffEntry(void);
-void FlashBreak(void);
-
-#if CODE_ADDR_AS_VOID_PTR
-extern uint32_t FlashChecksum(void const *begin, uint32_t count);
-#else
-extern uint32_t FlashChecksum(uint32_t begin, uint32_t count);
-#endif
-extern uint32_t FlashSignoff();
-
-uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum);
-
-__root __no_init FlashParamsHolder theFlashParams;
-
-__no_init int __argc;
-__no_init char __argvbuf[MAX_ARG_SIZE];
-#pragma required=__argvbuf
-__no_init const char* __argv[MAX_ARGS];
-
-#if CODE_ADDR_AS_VOID_PTR
-#define CODE_REF void *
-#else
-#define CODE_REF uint32_t
-#endif
-
-void Fl2FlashInitEntry()
-{
-#if USE_ARGC_ARGV
- theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.block_size, // Image size
- theFlashParams.offset_into_block,// link adr
- theFlashParams.count, // flags
- __argc,
- __argv);
-#else
- theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.block_size, // Image size
- theFlashParams.offset_into_block,// link adr
- theFlashParams.count); // flags
-#endif
-}
-
-// The normal flash write function ----------------------------------------------
-void Fl2FlashWriteEntry()
-{
- theFlashParams.count = FlashWrite((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.offset_into_block,
- theFlashParams.count,
- theFlashParams.buffer);
-}
-
-// The erase-first flash write function -----------------------------------------
-void Fl2FlashEraseWriteEntry()
-{
- uint32_t tmp = theFlashParams.block_size;
- if (tmp == 0)
- {
- FlashEraseData *p = (FlashEraseData*)theFlashParams.buffer;
- for (uint32_t i = 0; i < theFlashParams.count; ++i)
- {
- tmp = FlashErase((CODE_REF)p->start, p->length);
- if (tmp != 0) break;
- ++p;
- }
- }
- else
- {
- tmp = FlashErase((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.block_size);
- if (tmp == 0)
- {
- tmp = FlashWrite((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.offset_into_block,
- theFlashParams.count,
- theFlashParams.buffer);
- }
- }
- theFlashParams.count = tmp;
-}
-
-
-void Fl2FlashChecksumEntry()
-{
- theFlashParams.count = FlashChecksum((CODE_REF)theFlashParams.base_ptr,
- theFlashParams.count);
-}
-
-void Fl2FlashSignoffEntry()
-{
- theFlashParams.count = FlashSignoff();
-}
-
-
-uint16_t Crc16(uint8_t const *p, uint32_t len)
-{
- uint8_t zero[2] = { 0, 0 };
- uint16_t sum = Crc16_helper(p, len, 0);
- return Crc16_helper(zero, 2, sum);
-}
-
-uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum)
-{
- while (len--)
- {
- int i;
- uint8_t byte = *p++;
-
- for (i = 0; i < 8; ++i)
- {
- uint32_t osum = sum;
- sum <<= 1;
- if (byte & 0x80)
- sum |= 1 ;
- if (osum & 0x8000)
- sum ^= 0x1021;
- byte <<= 1;
- }
- }
- return sum;
-}
-
-#pragma optimize=no_inline
-__root void FlashBreak()
-{
- while(1);
-}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.h
deleted file mode 100644
index c385c4c..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader.h
+++ /dev/null
@@ -1,78 +0,0 @@
-
-#include "flash_config.h"
-#include
-
-#define RESULT_OK 0
-#define RESULT_ERROR 1
-#define RESULT_OVERRIDE_DEVICE 2
-#define RESULT_ERASE_DONE 3
-#define RESULT_CUSTOM_FIRST 100
-#define RESULT_CUSTOM_LAST 200
-
-#define FLAG_ERASE_ONLY 0x1
-
-#ifndef CODE_ADDR_AS_VOID_PTR
-#define CODE_ADDR_AS_VOID_PTR 1
-#endif
-
-// These are functions you MUST implement -------------------------------
-#if CODE_ADDR_AS_VOID_PTR
-
-#if USE_ARGC_ARGV
-uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
- uint32_t link_address, uint32_t flags,
- int argc, char const *argv[]);
-#else
-uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
- uint32_t link_address, uint32_t flags);
-#endif
-
-uint32_t FlashWrite(void *block_start,
- uint32_t offset_into_block,
- uint32_t count,
- char const *buffer);
-
-uint32_t FlashErase(void *block_start,
- uint32_t block_size);
-
-#else // !CODE_ADDR_AS_VOID_PTR
-
-#if USE_ARGC_ARGV
-uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
- uint32_t link_address, uint32_t flags,
- int argc, char const *argv[]);
-#else
-uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
- uint32_t link_address, uint32_t flags);
-#endif
-
-uint32_t FlashWrite(uint32_t block_start,
- uint32_t offset_into_block,
- uint32_t count,
- char const *buffer);
-
-uint32_t FlashErase(uint32_t block_start,
- uint32_t block_size);
-
-#endif // CODE_ADDR_AS_VOID_PTR
-
-// These are functions you MAY implement --------------------------------
-
-#if CODE_ADDR_AS_VOID_PTR
-uint32_t FlashChecksum(void const *begin, uint32_t count);
-#else
-uint32_t FlashChecksum(uint32_t begin, uint32_t count);
-#endif
-
-uint32_t FlashSignoff(void);
-
-#define OPTIONAL_CHECKSUM _Pragma("required=FlashChecksumEntry") __root
-#define OPTIONAL_SIGNOFF _Pragma("required=FlashSignoffEntry") __root
-void FlashChecksumEntry();
-void FlashSignoffEntry();
-
-// These are functions you may call -------------------------------------
-
-// If your code cannot be accessed using data pointers, you will have to
-// write your own Crc16 function.
-uint16_t Crc16(uint8_t const *p, uint32_t len);
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_asm.s b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_asm.s
deleted file mode 100644
index db962cd..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_asm.s
+++ /dev/null
@@ -1,197 +0,0 @@
-;---------------------------------
-;
-; Functions accessed by the debugger to perform a flash download.
-; All public symbols and the function FlashBreak() are looked up and called by the debugger.
-;
-; Copyright (c) 2008 IAR Systems
-;
-; $Revision: 38034 $
-;
-;---------------------------------
-
-#define _CORTEX_ ((__CORE__ == __ARM6M__) || (__CORE__ == __ARM6SM__) || (__CORE__ == __ARM7M__) || (__CORE__ == __ARM7EM__))
-
- PUBLIC FlashInitEntry
- PUBLIC FlashWriteEntry
- PUBLIC FlashEraseWriteEntry
- PUBLIC FlashChecksumEntry
- PUBLIC FlashSignoffEntry
- PUBLIC FlashBufferStart
- PUBLIC FlashBufferEnd
-
- EXTERN FlashBreak
- EXTERN Fl2FlashInitEntry
- EXTERN Fl2FlashWriteEntry
- EXTERN Fl2FlashEraseWriteEntry
- EXTERN Fl2FlashChecksumEntry
- EXTERN Fl2FlashSignoffEntry
-
- SECTION CSTACK:DATA:NOROOT(3)
-
-
-;---------------------------------
-;
-; FlashInitEntry()
-; Debugger interface function
-;
-;---------------------------------
- SECTION .text:CODE:ROOT(2)
-#if !_CORTEX_
- ARM
-#else
- THUMB
-#endif
-
-FlashInitEntry:
-#if !_CORTEX_
- ;; Set up the normal stack pointer.
- LDR sp, =SFE(CSTACK) ; End of CSTACK
-#endif
- BL Fl2FlashInitEntry
- B FlashBreak
-
-
-;---------------------------------
-;
-; FlashWriteEntry()
-; Debugger interface function
-;
-;---------------------------------
- SECTION .text:CODE:ROOT(2)
-#if !_CORTEX_
- ARM
-#else
- THUMB
-#endif
-
-FlashWriteEntry:
- BL Fl2FlashWriteEntry
- B FlashBreak
-
-
-;---------------------------------
-;
-; FlashEraseWriteEntry
-; Debugger interface function
-;
-;---------------------------------
- SECTION .text:CODE:ROOT(2)
-#if !_CORTEX_
- ARM
-#else
- THUMB
-#endif
-
-FlashEraseWriteEntry:
- BL Fl2FlashEraseWriteEntry
- B FlashBreak
-
-
-;---------------------------------
-;
-; FlashChecksumEntry
-; Debugger interface function
-;
-;---------------------------------
- SECTION .text:CODE:NOROOT(2)
-#if !_CORTEX_
- ARM
-#else
- THUMB
-#endif
-
-FlashChecksumEntry:
- BL Fl2FlashChecksumEntry
- B FlashBreak
-
-
-;---------------------------------
-;
-; FlashSignoffEntry
-; Debugger interface function
-;
-;---------------------------------
- SECTION .text:CODE:NOROOT(2)
-#if !_CORTEX_
- ARM
-#else
- THUMB
-#endif
-
-FlashSignoffEntry:
- BL Fl2FlashSignoffEntry
- B FlashBreak
-
-
-;---------------------------------
-;
-; Flash buffer and Cortex stack
-;
-;---------------------------------
- SECTION LOWEND:DATA(8)
- DATA
-FlashBufferStart:
-
- SECTION HIGHSTART:DATA
- DATA
-FlashBufferEnd:
-
-
-
-#if _CORTEX_
- PUBLIC __vector_table
-
- SECTION .intvec:CODE:ROOT(2)
- DATA
-
-__vector_table:
-#if 0
- DC32 SFE(CSTACK)
- DC32 FlashInitEntry
-#endif
-#endif
-
-;---------------------------------
-; Entry: 0x200006b4
-; ram start up, normal boot
-; : 0x200006c4
-; ram wake up, use debugger,
-; 0x40000218 BIT(31) must 1
-; Section: .start.ram.data,
-; put to 0x200006b4
-; : .patch.start.ram.data,
-; put to 0x200006bc
-;---------------------------------
-
-#if _CORTEX_
- PUBLIC __ram_start_table
-
- SECTION .start:CODE:ROOT(2)
- DATA
-
-__ram_start_table:
- DC32 FlashInitEntry
- DC32 FlashInitEntry
- DC32 FlashInitEntry
- DC32 FlashInitEntry
-
-#endif
-
-#if _CORTEX_
- PUBLIC __patch_ram_start_table
-
- SECTION .patch:CODE:ROOT(2)
- DATA
-
-__patch_ram_start_table:
- DC32 FlashInitEntry
- DC32 FlashInitEntry
- DC32 FlashInitEntry
- DC32 FlashInitEntry
-
-#endif
- END
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_extra.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_extra.h
deleted file mode 100644
index 3982fe6..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/framework2/flash_loader_extra.h
+++ /dev/null
@@ -1,27 +0,0 @@
-
-
-#define OVERRIDE_LAYOUT 0x010000
-#define OVERRIDE_BUFSIZE 0x020000
-#define OVERRIDE_PAGESIZE 0x040000
-
-#define LAYOUT_OVERRIDE_BUFFER ((char*)theFlashParams.buffer)
-#define SET_BUFSIZE_OVERRIDE(new_size) theFlashParams.block_size = (new_size)
-#define SET_PAGESIZE_OVERRIDE(new_size) theFlashParams.offset_into_block = (new_size)
-
-// parameter passing structure
-typedef struct {
- uint32_t base_ptr;
- uint32_t count;
- uint32_t offset_into_block;
- void *buffer;
- uint32_t block_size;
-} FlashParamsHolder;
-
-typedef struct {
- uint32_t start;
- uint32_t length;
-} FlashEraseData;
-
-extern FlashParamsHolder theFlashParams;
-extern char FlashBufferStart;
-extern char FlashBufferEnd;
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/mx25l8008_flashloader_mp.icf b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/mx25l8008_flashloader_mp.icf
deleted file mode 100644
index f3240b5..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/mx25l8008_flashloader_mp.icf
+++ /dev/null
@@ -1,60 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x10000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
-define symbol __ICFEDIT_region_ROM_end__ = 0x00010000;
-define symbol __ICFEDIT_region_RAM_start__ = 0x10000bc0;
-define symbol __ICFEDIT_region_RAM_end__ = 0x1006FFFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x200;
-define symbol __ICFEDIT_size_heap__ = 0x000;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
-define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
-
-initialize by copy { readwrite };
-//do not initialize {readwrite };
-do not initialize { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
-
-place at start of RAM_region { section .start, section .patch, block RamTop with fixed order {readonly, section LOWEND }};
-place at end of RAM_region { block RamBottom with fixed order {section HIGHSTART, readwrite, section .init,
- block CSTACK, block HEAP}};
-
-define exported symbol __ram_start_table_start__ = 0x10000bc0;
-define exported symbol __rom_bss_start__ = 0x10000300;
-define exported symbol __rom_bss_end__ = 0x10000bc0;
-
-
-// rom symbols
-define exported symbol DiagPrintf = 0x0000f39d;
-define exported symbol SpicWaitBusyDoneRtl8195A = 0x00002ea5;
-define exported symbol SpicWaitWipDoneRtl8195A = 0x00002f55;
-define exported symbol SpicLoadInitParaFromClockRtl8195A = 0x00003081;
-define exported symbol VectorTableInitForOSRtl8195A = 0x00004019;
-define exported symbol HalPinCtrlRtl8195A =0x00002b39;
-define exported symbol SpicInitCPUCLK = 0x00030c98 ;
-define exported symbol VectorTableInitRtl8195A = 0x00003de5;
-define exported symbol SpicCmpDataForCalibrationRtl8195A = 0x00003049;
-define exported symbol HalTimerInitRtl8195a = 0x0000ef3d;
-define exported symbol VectorIrqDisRtl8195A = 0x0000418d;
-define exported symbol VectorIrqRegisterRtl8195A = 0x00004029;
-define exported symbol SpicInitRtl8195A = 0x000030e5;
-define exported symbol HalCpuClkConfig = 0x00000341;
-define exported symbol HalDelayUs = 0x00000899;
-define exported symbol HalGetCpuClk = 0x00000355;
-define exported symbol _memcpy = 0x0000f465;
-
-
-define exported symbol ConfigDebugErr = 0x10000314;
-define exported symbol ConfigDebugInfo = 0x10000310;
-define exported symbol ConfigDebugWarn = 0x1000030c;
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h
deleted file mode 100644
index a30d475..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * Automatically generated by make menuconfig: don't edit
- */
-#define AUTOCONF_INCLUDED
-
-/*
- * Target Platform Selection
- */
-#define CONFIG_WITHOUT_MONITOR 1
-
-#define CONFIG_RTL8195A 1
-#undef CONFIG_FPGA
-#undef CONFIG_RTL_SIM
-#undef CONFIG_POST_SIM
-
-/*
- * < Mass Production Option
- */
-#undef CONFIG_MP
-#undef CONFIG_CP
-#undef CONFIG_FT
-#define RTL8195A 1
-#define CONFIG_CPU_CLK 1
-#define CONFIG_CPU_166_6MHZ 1
-#undef CONFIG_CPU_83_3MHZ
-#undef CONFIG_CPU_41_6MHZ
-#undef CONFIG_CPU_20_8MHZ
-#undef CONFIG_CPU_10_4MHZ
-#undef CONFIG_CPU_4MHZ
-#undef CONFIG_FPGA_CLK
-#define PLATFORM_CLOCK (166666666)
-#define CPU_CLOCK_SEL_VALUE (0)
-#define CONFIG_SDR_CLK 1
-#define CONFIG_SDR_100MHZ 1
-#undef CONFIG_SDR_50MHZ
-#undef CONFIG_SDR_25MHZ
-#undef CONFIG_SDR_12_5MHZ
-#define SDR_CLOCK_SEL_VALUE (0)
-#define CONFIG_BOOT_PROCEDURE 1
-#define CONFIG_IMAGE_PAGE_LOAD 1
-#undef CONFIG_IMAGE_AUTO_LOAD
-#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
-#undef CONFIG_PERI_UPDATE_IMG
-#define CONFIG_BOOT_FROM_JTAG 1
-#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
-#define CONFIG_KERNEL 1
-#define PLATFORM_FREERTOS 1
-#undef PLATFORM_UCOSII
-#undef PLATFORM_ECOS
-#undef CONFIG_TASK_SCHEDUL_DIS
-#define TASK_SCHEDULER_DISABLED (0)
-#define CONFIG_NORMALL_MODE 1
-#undef CONFIG_MEMORY_VERIFY_MODE
-#define CONFIG_TIMER_EN 1
-#define CONFIG_TIMER_NORMAL 1
-#undef CONFIG_TIMER_TEST
-#define CONFIG_TIMER_MODULE 1
-#define CONFIG_WDG 1
-#undef CONFIG_WDG_NON
-#define CONFIG_WDG_NORMAL 1
-#define CONFIG_GDMA_EN 1
-#define CONFIG_GDMA_NORMAL 1
-#undef CONFIG_GDMA_TEST
-#define CONFIG_GDMA_MODULE 1
-#define CONFIG_WIFI_EN 1
-#define CONFIG_WIFI_NORMAL 1
-#undef CONFIG_WIFI_TEST
-#define CONFIG_WIFI_MODULE 1
-#define CONFIG_GPIO_EN 1
-#define CONFIG_GPIO_NORMAL 1
-#undef CONFIG_GPIO_TEST
-#define CONFIG_GPIO_MODULE 1
-#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
-#define CONFIG_SDIO_DEVICE_EN 1
-#define CONFIG_SDIO_DEVICE_NORMAL 1
-#undef CONFIG_SDIO_DEVICE_TEST
-#define CONFIG_SDIO_DEVICE_MODULE 1
-#else
-#undef CONFIG_SDIO_DEVICE_EN
-#endif
-#define CONFIG_SDIO_HOST_EN 1
-#define CONFIG_USB_EN 1
-#undef CONFIG_USB_NORMAL
-#define CONFIG_USB_TEST 1
-#define CONFIG_USB_MODULE 1
-#define CONFIG_USB_VERIFY 1
-#undef CONFIG_USB_ROM_LIB
-//#define CONFIG_USB_DBGINFO_EN 1
-#ifdef CONFIG_INIC//defined(CONFIG_INIC)
-#define DWC_DEVICE_ONLY 1
-#else
-#define DWC_HOST_ONLY 1
-#define CONFIG_USB_HOST_ONLY 1
-#endif
-#define CONFIG_SPI_COM_EN 1
-#define CONFIG_SPI_COM_NORMAL 1
-#undef CONFIG_SPI_COM_TEST
-#define CONFIG_SPI_COM_MODULE 1
-#define CONFIG_UART_EN 1
-#define CONFIG_UART_NORMAL 1
-#undef CONFIG_UART_TEST
-#define CONFIG_UART_MODULE 1
-#define CONFIG_I2C_EN 1
-#define CONFIG_I2C_NORMAL 1
-#undef CONFIG_I2C_TEST
-#define CONFIG_I2C_MODULE 1
-#undef CONFIG_DEBUG_LOG_I2C_HAL
-#undef CONFIG_PCM_EN
-#define CONFIG_I2S_EN 1
-#define CONFIG_I2S_NORMAL 1
-#undef CONFIG_I2S_TEST
-#define CONFIG_I2S_MODULE 1
-#undef CONFIG_DEBUG_LOG_I2S_HAL
-#define CONFIG_NFC_EN 1
-#define CONFIG_NFC_NORMAL 1
-#undef CONFIG_NFC_TEST
-#define CONFIG_NFC_MODULE 1
-#define CONFIG_SOC_PS_EN 1
-#define CONFIG_SOC_PS_NORMAL 1
-#undef CONFIG_SOC_PS_TEST
-#define CONFIG_SOC_PS_MODULE 1
-#define CONFIG_CRYPTO_EN 1
-#define CONFIG_CRYPTO_NORMAL 1
-#undef CONFIG_CRYPTO_TEST
-#define CONFIG_CRYPTO_MODULE 1
-#define CONFIG_MII_EN 1
-#define CONFIG_PWM_EN 1
-#define CONFIG_PWM_NORMAL 1
-#undef CONFIG_PWM_TEST
-#define CONFIG_PWM_MODULE 1
-#define CONFIG_EFUSE_EN 1
-#define CONFIG_EFUSE_NORMAL 1
-#undef CONFIG_EFUSE_TEST
-#define CONFIG_EFUSE_MODULE 1
-#define CONFIG_SDR_EN 1
-#define CONFIG_SDR_NORMAL 1
-#undef CONFIG_SDR_TEST
-#define CONFIG_SDR_MODULE 1
-#define CONFIG_SPIC_EN 1
-#define CONFIG_SPIC_NORMAL 1
-#undef CONFIG_SPIC_TEST
-#define CONFIG_SPIC_MODULE 1
-#define CONFIG_ADC_EN 1
-#define CONFIG_DAC_EN 1
-#define CONFIG_NOR_FLASH 1
-#undef CONFIG_SPI_FLASH
-#undef CONFIG_NAND_FLASH
-#undef CONFIG_NONE_FLASH
-#undef CONFIG_BTBX_EN
-
-/*
- * < Engineer Mode Config
- */
-#undef CONFIG_JTAG
-#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
-#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
-#undef CONFIG_CMSIS_MATH_LIB_EN
-
-/*
- * < Application Config
- */
-#define CONFIG_NETWORK 1
-#define CONFIG_RTLIB_EN 1
-#define CONFIG_RTLIB_NORMAL 1
-#undef CONFIG_RTLIB_TEST
-#define CONFIG_RTLIB_MODULE 1
-
-/*
- * < System Debug Message Config
- */
-#define CONFIG_UART_LOG_HISTORY 1
-#undef CONFIG_CONSOLE_NORMALL_MODE
-#define CONFIG_CONSOLE_VERIFY_MODE 1
-#define CONFIG_DEBUG_LOG 1
-#define CONFIG_DEBUG_ERR_MSG 1
-#undef CONFIG_DEBUG_WARN_MSG
-#undef CONFIG_DEBUG_INFO_MSG
-
-/*
- * < SDK Option Config
- */
-#undef CONFIG_MBED_ENABLED
-#undef CONFIG_APP_DEMO
-
-/*
- * < Select Chip Version
- */
-#undef CONFIG_CHIP_A_CUT
-#define CONFIG_CHIP_B_CUT 1
-#undef CONFIG_CHIP_C_CUT
-#undef CONFIG_CHIP_E_CUT
-
-/*
- * < Select toolchain
- */
-#undef CONFIG_TOOLCHAIN_ASDK
-#undef CONFIG_TOOLCHAIN_ARM_GCC
-
-/*
- * < Build Option
- */
-#define CONFIG_LINK_ROM_LIB 1
-#undef CONFIG_LINK_ROM_SYMB
-#undef CONFIG_NORMAL_BUILD
-#undef CONFIG_RELEASE_BUILD
-#undef CONFIG_RELEASE_BUILD_LIBRARIES
-#undef CONFIG_LIB_BUILD_RAM
-#define CONFIG_RELEASE_BUILD_RAM_ALL 1
-#undef CONFIG_IMAGE_ALL
-#define CONFIG_IMAGE_SEPARATE 1
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h.1 b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h.1
deleted file mode 100644
index a30d475..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/platform_autoconf.h.1
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * Automatically generated by make menuconfig: don't edit
- */
-#define AUTOCONF_INCLUDED
-
-/*
- * Target Platform Selection
- */
-#define CONFIG_WITHOUT_MONITOR 1
-
-#define CONFIG_RTL8195A 1
-#undef CONFIG_FPGA
-#undef CONFIG_RTL_SIM
-#undef CONFIG_POST_SIM
-
-/*
- * < Mass Production Option
- */
-#undef CONFIG_MP
-#undef CONFIG_CP
-#undef CONFIG_FT
-#define RTL8195A 1
-#define CONFIG_CPU_CLK 1
-#define CONFIG_CPU_166_6MHZ 1
-#undef CONFIG_CPU_83_3MHZ
-#undef CONFIG_CPU_41_6MHZ
-#undef CONFIG_CPU_20_8MHZ
-#undef CONFIG_CPU_10_4MHZ
-#undef CONFIG_CPU_4MHZ
-#undef CONFIG_FPGA_CLK
-#define PLATFORM_CLOCK (166666666)
-#define CPU_CLOCK_SEL_VALUE (0)
-#define CONFIG_SDR_CLK 1
-#define CONFIG_SDR_100MHZ 1
-#undef CONFIG_SDR_50MHZ
-#undef CONFIG_SDR_25MHZ
-#undef CONFIG_SDR_12_5MHZ
-#define SDR_CLOCK_SEL_VALUE (0)
-#define CONFIG_BOOT_PROCEDURE 1
-#define CONFIG_IMAGE_PAGE_LOAD 1
-#undef CONFIG_IMAGE_AUTO_LOAD
-#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
-#undef CONFIG_PERI_UPDATE_IMG
-#define CONFIG_BOOT_FROM_JTAG 1
-#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
-#define CONFIG_KERNEL 1
-#define PLATFORM_FREERTOS 1
-#undef PLATFORM_UCOSII
-#undef PLATFORM_ECOS
-#undef CONFIG_TASK_SCHEDUL_DIS
-#define TASK_SCHEDULER_DISABLED (0)
-#define CONFIG_NORMALL_MODE 1
-#undef CONFIG_MEMORY_VERIFY_MODE
-#define CONFIG_TIMER_EN 1
-#define CONFIG_TIMER_NORMAL 1
-#undef CONFIG_TIMER_TEST
-#define CONFIG_TIMER_MODULE 1
-#define CONFIG_WDG 1
-#undef CONFIG_WDG_NON
-#define CONFIG_WDG_NORMAL 1
-#define CONFIG_GDMA_EN 1
-#define CONFIG_GDMA_NORMAL 1
-#undef CONFIG_GDMA_TEST
-#define CONFIG_GDMA_MODULE 1
-#define CONFIG_WIFI_EN 1
-#define CONFIG_WIFI_NORMAL 1
-#undef CONFIG_WIFI_TEST
-#define CONFIG_WIFI_MODULE 1
-#define CONFIG_GPIO_EN 1
-#define CONFIG_GPIO_NORMAL 1
-#undef CONFIG_GPIO_TEST
-#define CONFIG_GPIO_MODULE 1
-#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
-#define CONFIG_SDIO_DEVICE_EN 1
-#define CONFIG_SDIO_DEVICE_NORMAL 1
-#undef CONFIG_SDIO_DEVICE_TEST
-#define CONFIG_SDIO_DEVICE_MODULE 1
-#else
-#undef CONFIG_SDIO_DEVICE_EN
-#endif
-#define CONFIG_SDIO_HOST_EN 1
-#define CONFIG_USB_EN 1
-#undef CONFIG_USB_NORMAL
-#define CONFIG_USB_TEST 1
-#define CONFIG_USB_MODULE 1
-#define CONFIG_USB_VERIFY 1
-#undef CONFIG_USB_ROM_LIB
-//#define CONFIG_USB_DBGINFO_EN 1
-#ifdef CONFIG_INIC//defined(CONFIG_INIC)
-#define DWC_DEVICE_ONLY 1
-#else
-#define DWC_HOST_ONLY 1
-#define CONFIG_USB_HOST_ONLY 1
-#endif
-#define CONFIG_SPI_COM_EN 1
-#define CONFIG_SPI_COM_NORMAL 1
-#undef CONFIG_SPI_COM_TEST
-#define CONFIG_SPI_COM_MODULE 1
-#define CONFIG_UART_EN 1
-#define CONFIG_UART_NORMAL 1
-#undef CONFIG_UART_TEST
-#define CONFIG_UART_MODULE 1
-#define CONFIG_I2C_EN 1
-#define CONFIG_I2C_NORMAL 1
-#undef CONFIG_I2C_TEST
-#define CONFIG_I2C_MODULE 1
-#undef CONFIG_DEBUG_LOG_I2C_HAL
-#undef CONFIG_PCM_EN
-#define CONFIG_I2S_EN 1
-#define CONFIG_I2S_NORMAL 1
-#undef CONFIG_I2S_TEST
-#define CONFIG_I2S_MODULE 1
-#undef CONFIG_DEBUG_LOG_I2S_HAL
-#define CONFIG_NFC_EN 1
-#define CONFIG_NFC_NORMAL 1
-#undef CONFIG_NFC_TEST
-#define CONFIG_NFC_MODULE 1
-#define CONFIG_SOC_PS_EN 1
-#define CONFIG_SOC_PS_NORMAL 1
-#undef CONFIG_SOC_PS_TEST
-#define CONFIG_SOC_PS_MODULE 1
-#define CONFIG_CRYPTO_EN 1
-#define CONFIG_CRYPTO_NORMAL 1
-#undef CONFIG_CRYPTO_TEST
-#define CONFIG_CRYPTO_MODULE 1
-#define CONFIG_MII_EN 1
-#define CONFIG_PWM_EN 1
-#define CONFIG_PWM_NORMAL 1
-#undef CONFIG_PWM_TEST
-#define CONFIG_PWM_MODULE 1
-#define CONFIG_EFUSE_EN 1
-#define CONFIG_EFUSE_NORMAL 1
-#undef CONFIG_EFUSE_TEST
-#define CONFIG_EFUSE_MODULE 1
-#define CONFIG_SDR_EN 1
-#define CONFIG_SDR_NORMAL 1
-#undef CONFIG_SDR_TEST
-#define CONFIG_SDR_MODULE 1
-#define CONFIG_SPIC_EN 1
-#define CONFIG_SPIC_NORMAL 1
-#undef CONFIG_SPIC_TEST
-#define CONFIG_SPIC_MODULE 1
-#define CONFIG_ADC_EN 1
-#define CONFIG_DAC_EN 1
-#define CONFIG_NOR_FLASH 1
-#undef CONFIG_SPI_FLASH
-#undef CONFIG_NAND_FLASH
-#undef CONFIG_NONE_FLASH
-#undef CONFIG_BTBX_EN
-
-/*
- * < Engineer Mode Config
- */
-#undef CONFIG_JTAG
-#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
-#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
-#undef CONFIG_CMSIS_MATH_LIB_EN
-
-/*
- * < Application Config
- */
-#define CONFIG_NETWORK 1
-#define CONFIG_RTLIB_EN 1
-#define CONFIG_RTLIB_NORMAL 1
-#undef CONFIG_RTLIB_TEST
-#define CONFIG_RTLIB_MODULE 1
-
-/*
- * < System Debug Message Config
- */
-#define CONFIG_UART_LOG_HISTORY 1
-#undef CONFIG_CONSOLE_NORMALL_MODE
-#define CONFIG_CONSOLE_VERIFY_MODE 1
-#define CONFIG_DEBUG_LOG 1
-#define CONFIG_DEBUG_ERR_MSG 1
-#undef CONFIG_DEBUG_WARN_MSG
-#undef CONFIG_DEBUG_INFO_MSG
-
-/*
- * < SDK Option Config
- */
-#undef CONFIG_MBED_ENABLED
-#undef CONFIG_APP_DEMO
-
-/*
- * < Select Chip Version
- */
-#undef CONFIG_CHIP_A_CUT
-#define CONFIG_CHIP_B_CUT 1
-#undef CONFIG_CHIP_C_CUT
-#undef CONFIG_CHIP_E_CUT
-
-/*
- * < Select toolchain
- */
-#undef CONFIG_TOOLCHAIN_ASDK
-#undef CONFIG_TOOLCHAIN_ARM_GCC
-
-/*
- * < Build Option
- */
-#define CONFIG_LINK_ROM_LIB 1
-#undef CONFIG_LINK_ROM_SYMB
-#undef CONFIG_NORMAL_BUILD
-#undef CONFIG_RELEASE_BUILD
-#undef CONFIG_RELEASE_BUILD_LIBRARIES
-#undef CONFIG_LIB_BUILD_RAM
-#define CONFIG_RELEASE_BUILD_RAM_ALL 1
-#undef CONFIG_IMAGE_ALL
-#define CONFIG_IMAGE_SEPARATE 1
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/preload.mp.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/preload.mp.mac
deleted file mode 100644
index 5742875..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/preload.mp.mac
+++ /dev/null
@@ -1,64 +0,0 @@
-setup()
-{
- __var tmp;
-
- __hwResetWithStrategy(0, 1);
- __hwReset(1);
-
- __writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
- __writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
- __writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
- __writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
- __writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
- __writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
- __writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
-
- __writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
- __writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
- __writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
- __delay(3);
-
- // Enable
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- __delay(20);
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
- __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
- __delay(30);
-}
-
-execUserPreload()
-{
- __var tmp;
- //setup();
- tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
-
-execUserSetup()
-{
- //execUserPreload();
- //__loadImage("$TARGET_PATH$ ", 0, 0);
- //__writeMemory32(0x80000000, 0x40000218, "Memory");
-}
-
-execUserFlashInit() // Called by debugger before loading flash loader in RAM.
-{
- __var tmp;
- __message "----- Prepare hardware for Flashloader -----\n";
- //setup();
- tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_misc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_misc.c
deleted file mode 100644
index 862857a..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_misc.c
+++ /dev/null
@@ -1,360 +0,0 @@
-
-#include "rtl8195a.h"
-
-typedef struct _UART_LOG_BUF_ {
- u8 BufCount; //record the input cmd char number.
- u8 UARTLogBuf[127]; //record the input command.
-} UART_LOG_BUF, *PUART_LOG_BUF;
-
-
-
-
-typedef struct _UART_LOG_CTL_ {
- u8 NewIdx;
- u8 SeeIdx;
- u8 RevdNo;
- u8 EscSTS;
- u8 ExecuteCmd;
- u8 ExecuteEsc;
- u8 BootRdy;
- u8 Resvd;
- PUART_LOG_BUF pTmpLogBuf;
- VOID *pfINPUT;
- PCOMMAND_TABLE pCmdTbl;
- u32 CmdTblSz;
-
- u32 CRSTS;
-
- u8 (*pHistoryBuf)[127];
-
- u32 TaskRdy;
- u32 Sema;
-} UART_LOG_CTL, *PUART_LOG_CTL;
-
- volatile UART_LOG_CTL UartLogCtl;
-
- volatile UART_LOG_CTL *pUartLogCtl;
-
- u8 *ArgvArray[10];
-
- UART_LOG_BUF UartLogBuf;
-
-
- u8 UartLogHistoryBuf[5][127];
-
-extern VOID
-SpicLoadInitParaFromClockRtl8195A
-(
- IN u8 CpuClkMode,
- IN u8 BaudRate,
- IN PSPIC_INIT_PARA pSpicInitPara
-);
-
-VOID
-PatchSpicInitRtl8195A
-(
- IN u8 InitBaudRate,
- IN u8 SpicBitMode
-)
-{
-
- u32 Value32;
- SPIC_INIT_PARA SpicInitPara;
-
-#ifdef CONFIG_FPGA
- SpicInitPara.BaudRate = 1;//FPGASpicInitPara.BaudRate;
- SpicInitPara.RdDummyCyle = 1;//FPGASpicInitPara.RdDummyCyle;
- SpicInitPara.DelayLine = 0;//FPGASpicInitPara.DelayLine;
-#else
- u8 CpuClk;
- CpuClk = (((u8)(HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70))) >> 4);
- SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
-#endif
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, BIT_SCKDV(InitBaudRate));
-
- HAL_SPI_WRITE32(REG_SPIC_SER, BIT_SER);
-
- Value32 = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
-
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH,
- ((Value32 & 0xFFFF0000) | BIT_RD_DUMMY_LENGTH(SpicInitPara.RdDummyCyle)));
-
- HAL_WRITE32(PERI_ON_BASE, REG_PESOC_MEM_CTRL,
- ((HAL_READ32(PERI_ON_BASE, REG_PESOC_MEM_CTRL)&0xFFFFFF00)|
- SpicInitPara.DelayLine));
-
- HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(4));
-
- switch (SpicBitMode) {
- case SpicOneBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- (HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))));
- break;
-
- case SpicDualBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- ((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
- (BIT_ADDR_CH(1)|BIT_DATA_CH(1))));
-
- break;
-
- case SpicQuadBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- ((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
- (BIT_ADDR_CH(2)|BIT_DATA_CH(2))));
- break;
-
- }
-
- // Enable SPI_FLASH User Mode
-// HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
-}
-
-
-#include "hal_timer.h"
-extern BOOL
-HalTimerInitRtl8195a(
- IN VOID *Data
-);
-
-VOID
-PatchHalInitPlatformTimer(
-VOID
-)
-{
- TIMER_ADAPTER TimerAdapter;
-
- OSC32K_CKGEN_CTRL(ON);
- GTIMER_FCTRL(ON);
- ACTCK_TIMER_CCTRL(ON);
- SLPCK_TIMER_CCTRL(ON);
-
- TimerAdapter.IrqDis = ON;
-// TimerAdapter.IrqHandle = (IRQ_FUN)NULL;
- TimerAdapter.TimerId = 1;
- TimerAdapter.TimerIrqPriority = 0;
- TimerAdapter.TimerLoadValueUs = 0;
- TimerAdapter.TimerMode = FREE_RUN_MODE;
-
- HalTimerInitRtl8195a((VOID*) &TimerAdapter);
-
-}
-
-#define UART_BAUD_RATE_2400 2400
-#define UART_BAUD_RATE_4800 4800
-#define UART_BAUD_RATE_9600 9600
-#define UART_BAUD_RATE_19200 19200
-#define UART_BAUD_RATE_38400 38400
-#define UART_BAUD_RATE_57600 57600
-#define UART_BAUD_RATE_115200 115200
-#define UART_BAUD_RATE_921600 921600
-#define UART_BAUD_RATE_1152000 1152000
-
-#define UART_PARITY_ENABLE 0x08
-#define UART_PARITY_DISABLE 0
-
-#define UART_DATA_LEN_5BIT 0x0
-#define UART_DATA_LEN_6BIT 0x1
-#define UART_DATA_LEN_7BIT 0x2
-#define UART_DATA_LEN_8BIT 0x3
-
-#define UART_STOP_1BIT 0x0
-#define UART_STOP_2BIT 0x4
-
-
-extern u32
-HalLogUartInit(
- IN LOG_UART_ADAPTER UartAdapter
-);
-
-extern u32
-HalGetCpuClk(
- VOID
-);
-
-const u32 StartupCpkClkTbl[]= {
- 200000000,
- 100000000,
- 50000000,
- 25000000,
- 12500000,
- 4000000
-};
-
-
-u32
-StartupHalGetCpuClk(
- VOID
-)
-{
- u32 CpuType = 0, CpuClk = 0, FreqDown = 0;
-
- CpuType = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
- FreqDown = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) & BIT17;
-
- CpuClk = StartupCpkClkTbl[CpuType];
-
- if ( !FreqDown ) {
- if ( CpuClk > 4000000 ){
- CpuClk = (CpuClk*5/6);
- }
- }
-
- return CpuClk;
-}
-
-u32
-PatchHalLogUartInit(
- IN LOG_UART_ADAPTER UartAdapter
-)
-{
- u32 SetData;
- u32 Divisor;
- u32 Dlh;
- u32 Dll;
- u32 SysClock;
-
- /*
- Interrupt enable Register
- 7: THRE Interrupt Mode Enable
- 2: Enable Receiver Line Status Interrupt
- 1: Enable Transmit Holding Register Empty Interrupt
- 0: Enable Received Data Available Interrupt
- */
- // disable all interrupts
- HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, 0);
-
- /*
- Line Control Register
- 7: DLAB, enable reading and writing DLL and DLH register, and must be cleared after
- initial baud rate setup
- 3: PEN, parity enable/disable
- 2: STOP, stop bit
- 1:0 DLS, data length
- */
-
- // set DLAB bit to 1
- HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0x80);
-
- // set up buad rate division
-
-#ifdef CONFIG_FPGA
- SysClock = SYSTEM_CLK;
- Divisor = (SysClock / (16 * (UartAdapter.BaudRate)));
-#else
- {
- u32 SampleRate,Remaind;
-
- //SysClock = (HalGetCpuClk()>>2);
- SysClock = (StartupHalGetCpuClk()>>2);
-
- SampleRate = (16 * (UartAdapter.BaudRate));
-
- Divisor= SysClock/SampleRate;
-
- Remaind = ((SysClock*10)/SampleRate) - (Divisor*10);
-
- if (Remaind>4) {
- Divisor++;
- }
- }
-#endif
-
-
- Dll = Divisor & 0xff;
- Dlh = (Divisor & 0xff00)>>8;
- HAL_UART_WRITE32(UART_DLL_OFF, Dll);
- HAL_UART_WRITE32(UART_DLH_OFF, Dlh);
-
- // clear DLAB bit
- HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0);
-
- // set data format
- SetData = UartAdapter.Parity | UartAdapter.Stop | UartAdapter.DataLength;
- HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, SetData);
-
- /* FIFO Control Register
- 7:6 level of receive data available interrupt
- 5:4 level of TX empty trigger
- 2 XMIT FIFO reset
- 1 RCVR FIFO reset
- 0 FIFO enable/disable
- */
- // FIFO setting, enable FIFO and set trigger level (2 less than full when receive
- // and empty when transfer
- HAL_UART_WRITE32(UART_FIFO_CTL_REG_OFF, UartAdapter.FIFOControl);
-
- /*
- Interrupt Enable Register
- 7: THRE Interrupt Mode enable
- 2: Enable Receiver Line status Interrupt
- 1: Enable Transmit Holding register empty INT32
- 0: Enable received data available interrupt
- */
- HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, UartAdapter.IntEnReg);
-
- if (UartAdapter.IntEnReg) {
- // Enable Peripheral_IRQ Setting for Log_Uart
- HAL_WRITE32(VENDOR_REG_BASE, PERIPHERAL_IRQ_EN, 0x1000000);
-
- // Enable ARM Cortex-M3 IRQ
- NVIC_SetPriorityGrouping(0x3);
- NVIC_SetPriority(PERIPHERAL_IRQ, 14);
- NVIC_EnableIRQ(PERIPHERAL_IRQ);
- }
-
-
- return 0;
-}
-
-u32 log_uart_irq(VOID *Data)
-{
- return 0;
-}
-
-VOID
-PatchHalInitPlatformLogUart(
- VOID
-)
-{
- IRQ_HANDLE UartIrqHandle;
- LOG_UART_ADAPTER UartAdapter;
-
- //4 Release log uart reset and clock
- LOC_UART_FCTRL(OFF);
- LOC_UART_FCTRL(ON);
- ACTCK_LOG_UART_CCTRL(ON);
-
- PinCtrl(LOG_UART,S0,ON);
-
- //4 Register Log Uart Callback function
- UartIrqHandle.Data = (u32)NULL;//(u32)&UartAdapter;
- UartIrqHandle.IrqNum = UART_LOG_IRQ;
- UartIrqHandle.IrqFun = (IRQ_FUN) log_uart_irq;//UartLogIrqHandleRam;
- UartIrqHandle.Priority = 0;
-
- //4 Inital Log uart
- UartAdapter.BaudRate = UART_BAUD_RATE_38400;
- UartAdapter.DataLength = UART_DATA_LEN_8BIT;
- UartAdapter.FIFOControl = 0xC1;
- UartAdapter.IntEnReg = 0x00;
- UartAdapter.Parity = UART_PARITY_DISABLE;
- UartAdapter.Stop = UART_STOP_1BIT;
-
- //4 Initial Log Uart
- PatchHalLogUartInit(UartAdapter);
-
- //4 Register Isr handle
- InterruptRegister(&UartIrqHandle);
-
- UartAdapter.IntEnReg = 0x05;
-
- //4 Initial Log Uart for Interrupt
- PatchHalLogUartInit(UartAdapter);
-
- //4 initial uart log parameters before any uartlog operation
- //RtlConsolInit(ROM_STAGE,GetRomCmdNum(),(VOID*)&UartLogRomCmdTable);// executing boot seq.,
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_spi_flash_ram.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_spi_flash_ram.c
deleted file mode 100644
index d72df2c..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/rtl8195a/hal_spi_flash_ram.c
+++ /dev/null
@@ -1,1457 +0,0 @@
-/*
- * Routines to access hardware
- *
- * Copyright (c) 2013 Realtek Semiconductor Corp.
- *
- * This module is a confidential and proprietary property of RealTek and
- * possession or use of this module requires written permission of RealTek.
- */
-#include "rtl8195a.h"
-#include "hal_spi_flash.h"
-
-
-#include "rtl8195a_spi_flash.h"
-
-#define DEF_INIT_SPICINITPARA() { \
- .BaudRate =0, \
- .RdDummyCyle =0, \
- .DelayLine =0, \
- .Valid =0 }
-
-
-#define SPI_CTRL_BASE 0x1FFEF000
-#define SPI_DLY_CTRL_ADDR 0x40000300 // [7:0]
-#define MIN_BAUDRATE 0x01
-#define MAX_BAUDRATE 0x04
-#define MAX_AUTOLEN 0x14
-#define MAX_DLYLINE 99
-#define GOLD_ID_NO_RAM 0xC220
-
-#define WR_DATA(addr, data) (*((volatile u32*)(addr)) = (data))
-#define RD_DATA(addr) (*((volatile u32*)(addr)))
-
-BOOLEAN SpicFlashInitRtl8195A(u8 SpicBitMode);
-u32 SpicCalibrationRtl8195A(u8 SpicBitMode, u32 DefRdDummyCycle); // spi-flash calibration
-
-VOID SpicSetFlashStatusRefinedRtl8195A(u32 data, SPIC_INIT_PARA SpicInitPara);
-
-VOID SpicConfigAutoModeRtl8195A(u8 SpicBitMode); // config spi-flash controller to auto mode
-VOID SpicReadIDRtl8195A(VOID);
-
-
-_LONG_CALL_
-extern VOID SpicInitRtl8195A(u8 InitBaudRate, u8 SpicBitMode); // spi-flash controller initialization
-
-_LONG_CALL_
-extern VOID SpicRxCmdRtl8195A(u8); // recieve command
-
-_LONG_CALL_
-extern VOID SpicSetFlashStatusRtl8195A(u32 data, SPIC_INIT_PARA SpicInitPara); // WRSR, write spi-flash status register
-
-_LONG_CALL_
-extern VOID SpicWaitBusyDoneRtl8195A(VOID); // wait sr[0] = 0, wait transmission done
-
-_LONG_CALL_
-extern VOID SpicWaitWipDoneRtl8195A(SPIC_INIT_PARA SpicInitPara); // wait spi-flash status register[0] = 0
-
-_LONG_CALL_
-extern VOID SpicEraseFlashRtl8195A(VOID); // CE, flash chip erase
-
-_LONG_CALL_
-extern u32 SpicCmpDataForCalibrationRtl8195A(void); // compare read_data and golden_data
-#ifdef CONFIG_FPGA
-_LONG_CALL_
-extern VOID SpicProgFlashForCalibrationRtl8195A(SPIC_INIT_PARA SpicInitPara); // program spi-flash
-#endif
-_LONG_CALL_
-extern VOID SpicLoadInitParaFromClockRtl8195A(u8 CpuClkMode, u8 BaudRate, PSPIC_INIT_PARA pSpicInitPara);
-
-_LONG_CALL_
-extern u8 SpicGetFlashStatusRtl8195A(SPIC_INIT_PARA SpicInitPara);
-
-_LONG_CALL_
-extern VOID SpicTxCmdRtl8195A(u8 cmd, SPIC_INIT_PARA SpicInitPara);
-
-struct ava_window {
- u16 baud_rate;
- u16 auto_length;
- u32 dly_line_sp;
- u32 dly_line_ep;
-};
-
-#ifdef CONFIG_FPGA
-HAL_ROM_DATA_SECTION
-SPIC_INIT_PARA FPGASpicInitPara = {1,1,0,0};
-#endif
-
-#if 0
-HAL_FLASH_DATA_
-SECTION SPIC_INIT_PARA SpicInitParaAllClk[CPU_CLK_TYPE_NO] = {{0,0,0,0},
- {0,0,0,0},
- {0,0,0,0},
- {0,0,0,0},
- {0,0,0,0},
- {0,0,0,0},};
-#else
-HAL_FLASH_DATA_SECTION
-SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
-#endif
-
-extern SPIC_INIT_PARA SpicInitCPUCLK[4];
-
-/* Send Flash Instruction with Data Phase */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicTxCmdWithDataRtl8195A
-(
- IN u8 cmd,
- IN u8 DataPhaseLen,
- IN u8* pData,
- IN SPIC_INIT_PARA SpicInitPara
-)
-{
- u8 i;
-
- DBG_SPIF_INFO("%s(0x%x, 0x%x, 0x%x, 0x%x)\n",__func__, cmd, DataPhaseLen, pData, SpicInitPara);
-
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- if (DataPhaseLen > 15) {
- DBG_SPIF_WARN("SpicTxInstRtl8195A: Data Phase Leng too Big(%d)\n",DataPhaseLen);
- DataPhaseLen = 15;
- }
-
- HAL_SPI_WRITE32(REG_SPIC_ADDR_LENGTH, DataPhaseLen);
-
- // set ctrlr0: TX mode
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- (HAL_SPI_READ32(REG_SPIC_CTRLR0)& 0xFFF0FCFF));
-
- // set flash_cmd: wren to fifo
- HAL_SPI_WRITE8(REG_SPIC_DR0, cmd);
-
- //fill addr
- for (i=0;i>4)>= 2)){
-
- SPI_FLASH_PIN_FCTRL(ON);
-
- // Wait for flash busy done
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- while((SpicGetFlashStatusRefinedRtl8195A(SpicInitPara) & 0x02)==0) {
- // Set flash_cmd: WREN to FIFO
- //SpicTxCmdRtl8195A(FLASH_CMD_WREN, SpicInitPara);
- SpicTxCmdWithDataRtl8195A(FLASH_CMD_WREN, 0, 0, SpicInitPara);
- }
-
- DBG_8195A("Deep power down\n");
-
- // Set flash_cmd: Chip_erase to FIFO
- //SpicTxCmdRtl8195A(FLASH_CMD_CE, SpicInitPara);
- SpicTxCmdWithDataRtl8195A(FLASH_CMD_DP, 0, 0, SpicInitPara);
-
- // polling WEL
- do {
- } while((SpicGetFlashStatusRefinedRtl8195A(SpicInitPara) & 0x02)!=0);
- }
-}
-//This funciton is only valid for Micron Flash
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicDieEraseFlashRtl8195A(
- IN u32 Address
-)
-{
- u8 Addr[3];
-
- Addr[0] = (Address >> 16) & 0xFF;
- Addr[1] = (Address >> 8) & 0xFF;
- Addr[2] = Address & 0xFF;
- SpicTxFlashInstRtl8195A(0xC4, 3, Addr);
-}
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicBlockEraseFlashRtl8195A(
- IN u32 Address
-)
-{
- u8 Addr[3];
-
- DBG_8195A("Erase Cmd Set\n");
- // Set flash_cmd: Chip_erase to FIFO
- Addr[0] = (Address >> 16) & 0xFF;
- Addr[1] = (Address >> 8) & 0xFF;
- Addr[2] = Address & 0xFF;
- SpicTxFlashInstRtl8195A(FLASH_CMD_BE, 3, Addr);
-}
-
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicSectorEraseFlashRtl8195A(
- IN u32 Address
-)
-{
- u8 Addr[3];
-
- Addr[0] = (Address >> 16) & 0xFF;
- Addr[1] = (Address >> 8) & 0xFF;
- Addr[2] = Address & 0xFF;
- SpicTxFlashInstRtl8195A(FLASH_CMD_SE, 3, Addr);
-}
-
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicWriteStatusFlashRtl8195A(
- IN u32 Status
-)
-{
- u8 Buf[3];
-
- Buf[0] = Status & 0xFF;
- Buf[1] = (Status >> 8) & 0xFF;
- //1 For MXIC, Status Register is 8-bit width; for Winbond, Status Reguster is 16-bit width
- SpicTxFlashInstRtl8195A(FLASH_CMD_WRSR, 1, Buf);
-}
-
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicWriteProtectFlashRtl8195A(
- IN u32 Protect
-)
-{
- SPIC_INIT_PARA SpicInitPara = DEF_INIT_SPICINITPARA();
- u8 Status;
-
- Status = SpicGetFlashStatusRefinedRtl8195A(SpicInitPara);
- if (Protect) {
- Status |= 0x1c; // protect whole chip
- }
- else {
- Status &= ~0x1c; // Protect none
- }
- SpicWriteStatusFlashRtl8195A(Status);
-}
-
-
-HAL_FLASH_TEXT_SECTION
-BOOLEAN
-SpicFlashInitRtl8195A(
- IN u8 SpicBitMode
-)
-{
- u32 DefRdDummyCycle = 0;
- SPIC_INIT_PARA SpicInitPara = DEF_INIT_SPICINITPARA();
-
-#ifdef CONFIG_FPGA
- SpicInitPara.BaudRate = FPGASpicInitPara.BaudRate;
- SpicInitPara.RdDummyCyle = FPGASpicInitPara.RdDummyCyle;
- SpicInitPara.DelayLine = FPGASpicInitPara.DelayLine;
-#endif
-
- switch (SpicBitMode) {
- case SpicOneBitMode:
-// DBG_8195A("Initial Spic One bit mode\n");
- // wait for flash busy done
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- // set auto mode
- SpicConfigAutoModeRtl8195A(SpicBitMode);
-
- /* MXIC spec */
- DefRdDummyCycle = 0;
- break;
- case SpicDualBitMode:
-// DBG_8195A("Initial Spic Two bit mode\n");
-#ifdef CONFIG_FPGA
- // program golden_data to golden_address and store golden_data in sram
- SpicProgFlashForCalibrationRtl8195A(SpicInitPara);
-#endif
- // set auto mode
- SpicConfigAutoModeRtl8195A(SpicBitMode);
-
- /* MXIC spec */
- #if FLASH_RD_2IO_EN
- DefRdDummyCycle = FLASH_DM_CYCLE_2IO;
- #endif
- #if FLASH_RD_2O_EN
- DefRdDummyCycle = FLASH_DM_CYCLE_2O;
- #endif
-
- break;
- case SpicQuadBitMode:
- DBG_8195A("Initial Spic Four bit mode\n");
-#ifdef CONFIG_FPGA
- // program golden_data to golden_address and store golden_data in sram
- SpicProgFlashForCalibrationRtl8195A(SpicInitPara);
-#endif
- // set auto mode
- SpicConfigAutoModeRtl8195A(SpicBitMode);
-
- // set 4bit-mode
- SpicSetFlashStatusRefinedRtl8195A(0x40, SpicInitPara);
-
- /* MXIC spec */
- #if FLASH_RD_4IO_EN
- DefRdDummyCycle = FLASH_DM_CYCLE_4IO;
- #endif
- #if FLASH_RD_4O_EN
- DefRdDummyCycle = FLASH_DM_CYCLE_4O;
- #endif
- break;
- default:
- DBG_8195A("No Support SPI Mode!!!!!!!!\n");
- break;
-
- }
- SpicReadIDRtl8195A();
-
- if (!SpicCalibrationRtl8195A(SpicBitMode, DefRdDummyCycle)) {
-
- DBG_8195A("SPI calibration fail and recover one bit mode\n");
- SpicLoadInitParaFromClockRtl8195A(0, 0, &SpicInitPara);
-
- SpicInitRefinedRtl8195A(SpicInitPara.BaudRate, SpicOneBitMode);
- SpicConfigAutoModeRtl8195A(SpicOneBitMode);
-
- return _FALSE;
- }
-
- return _TRUE;
-}
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicUserProgramRtl8195A
-(
- //IN flash_t *obj,
- IN u8 *data,
- IN SPIC_INIT_PARA SpicInitPara,
- IN u32 addr,
- IN u32* LengthInfo
-)
-{
-
- u32 Info;
- u32 Length = (u32) *LengthInfo;
- u32 OccuSize;
- u32 writeword;
- u32 lastwriteword;
- u32 ProgramLength;
- u32 instruction;
- u32 PageSize;
- u8 addrbyte[3];
- u8 UnalignOffset;
- u8 lastunalignoffset;
- u8 index;
- u8 *ptr;
- u8 *buff;
-
-
- UnalignOffset = 0;
- lastunalignoffset = 0;
- writeword = 0;
- lastwriteword = 0;
- ProgramLength = 0;
- buff = data;
- PageSize = 256;
-
- OccuSize = addr & 0xFF;
- if(OccuSize){
- if((Length >= PageSize) ||((OccuSize + Length) >= PageSize))
- ProgramLength= PageSize - OccuSize;
- else
- ProgramLength = Length;
- }
- else{//program from the beginning of the page
- if(Length >= PageSize)
- ProgramLength = PageSize;
- else
- ProgramLength = Length;
- }
-
- *LengthInfo -= ProgramLength;
-
- if(addr & 0x03){
- UnalignOffset = (addr & 0x03);
- addr -= UnalignOffset;
- writeword = HAL_READ32(SPI_FLASH_BASE, addr);
- ptr = (u8*) &writeword + UnalignOffset;
- UnalignOffset = 4 - UnalignOffset;
- for(index = 0; index < UnalignOffset ; index++){
- *ptr = *buff;
- buff++;
- ptr++;
- ProgramLength--;
- if(ProgramLength == 0)
- break;
- }
- }
- else{
- if(ProgramLength >= 4){
- writeword = (u32)(*buff) | (u32)((*(buff+1)) << 8)|(u32)((*(buff+2)) <<16)|(u32)((*(buff+3))<<24);
- }
- }
-//address already align
- if(ProgramLength & 0x3){
- lastunalignoffset = ProgramLength & 0x3;
- if(UnalignOffset)
- lastwriteword = HAL_READ32(SPI_FLASH_BASE, (addr + 4) + ProgramLength - lastunalignoffset);
- else
- lastwriteword = HAL_READ32(SPI_FLASH_BASE, addr + ProgramLength - lastunalignoffset);
- buff += (ProgramLength - lastunalignoffset);
- ptr = (u8*) &lastwriteword;
- for(index = 0;index < lastunalignoffset;index++){
- *ptr = *buff;
- buff++;
- ptr++;
- }
- if(UnalignOffset == 0)
- if(ProgramLength < 4){
- writeword = lastwriteword;
- ProgramLength = 0;
- }
- }
-
-
-
- addrbyte[2] = (addr & 0xFF0000) >>16;
- addrbyte[1] = (addr & 0xFF00)>>8;
- addrbyte[0] = addr & 0xFF;
-
- instruction = FLASH_CMD_PP | (addrbyte[2] << 8)|(addrbyte[1] << 16)|(addrbyte[0] << 24);
- Info = HAL_SPI_READ32(REG_SPIC_ADDR_LENGTH);
- //Store current setting of Address length
- // Set flash_cmd: WREN to FIFO
- SpicTxCmdRtl8195A(FLASH_CMD_WREN, SpicInitPara);
-
- // Disable SPI_FLASH
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- // set ctrlr0: TX mode
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- (HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~ BIT_TMOD(3))));
-
- HAL_SPI_WRITE32(REG_SPIC_ADDR_LENGTH, BIT_ADDR_PHASE_LENGTH(1));
-
- HAL_SPI_WRITE32(REG_SPIC_DR0, instruction);
-
- HAL_SPI_WRITE32(REG_SPIC_DR0, writeword);
-
- if(UnalignOffset == 0){
- if(ProgramLength >= 4){
- buff = data + 4;
- ProgramLength-=4;
- }
- }
- else
- buff = data + UnalignOffset;
- //Pre-load data before enabling
- index = 0;
- while(ProgramLength > 4){
- if((u32)buff & 0x03){
- //while(ProgramLength >= 4){
- writeword = (u32)(*buff) | ((u32)(*(buff+1)) << 8) | ((u32)(*(buff+2)) << 16) | ((u32)(*(buff+3)) << 24);
- HAL_SPI_WRITE32(REG_SPIC_DR0, writeword);
- ProgramLength -=4;
- buff+=4;
- //}
- }
- else{
- //while(ProgramLength >= 4){
- HAL_SPI_WRITE32(REG_SPIC_DR0, (u32)*((u32 *)buff));
- ProgramLength -=4;
- buff+=4;
- //}
- }
- index++;
- if(index >= 6)
- break;
- }
-
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
-
- if((u32)buff & 0x03){
- while(ProgramLength >= 4){
- writeword = (u32)(*buff) | ((u32)(*(buff+1)) << 8) | ((u32)(*(buff+2)) << 16) | ((u32)(*(buff+3)) << 24);
- HAL_SPI_WRITE32(REG_SPIC_DR0, writeword);
- ProgramLength -=4;
- buff+=4;
- }
- }
- else{
- while(ProgramLength >= 4){
- HAL_SPI_WRITE32(REG_SPIC_DR0, (u32)*((u32 *)buff));
- ProgramLength -=4;
- buff+=4;
- }
- }
-
- if(ProgramLength > 0){
- HAL_SPI_WRITE32(REG_SPIC_DR0, lastwriteword);
- }
-
-
- // wait spic busy done
- SpicWaitBusyDoneRtl8195A();
- // wait flash busy done (wip=0)
- if(SpicInitPara.flashtype == FLASH_MICRON){
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- }
- else{
- SpicWaitWipDoneRtl8195A(SpicInitPara);
- }
-
-
-
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
- //REG_SPIC_ADDR_LENGTH cannot be programmed if SSIENR is active
- //Here to restore the setting of address length
- HAL_SPI_WRITE32(REG_SPIC_ADDR_LENGTH, Info);
-}
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicReadIDRtl8195A(
- VOID
-)
-{
- u32 RdData;
- u32 RetryNum;
- SPIC_INIT_PARA SpicInitPara = DEF_INIT_SPICINITPARA();// = *PSpicInitPara;
- u8 i,j;
-
- DBG_SPIF_INFO("%s(0x%x)\n", __func__, SpicInitPara);
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- /* Set Ctrlr1; 1 byte data frames */
- HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(3));
-
- /* Send flash RX command and read the data */
- SpicRxCmdRefinedRtl8195A(FLASH_CMD_RDID, SpicInitPara);
- RdData = HAL_SPI_READ32(REG_SPIC_DR0);
-
- SpicInitPara.id[0] = RdData & 0xFF;
- SpicInitPara.id[1] = (RdData>> 8) & 0xFF;
- SpicInitPara.id[2] = (RdData>>16) & 0xFF;
- for(RetryNum =0; RetryNum < 3; RetryNum++){
- if((SpicInitPara.id[0] != 0) && (SpicInitPara.id[0] != 0xFF)){
- if(SpicInitPara.id[0] == 0x20)
- SpicInitPara.flashtype = FLASH_MICRON;
- else if(SpicInitPara.id[0] == 0xC2)
- SpicInitPara.flashtype = FLASH_MXIC;
- else if(SpicInitPara.id[0] == 0xEF)
- SpicInitPara.flashtype = FLASH_WINBOND;
- else
- SpicInitPara.flashtype = FLASH_OTHERS;
- break;
- }
- else{
- if(RetryNum == 2)
- DBG_8195A("Invalid ID\n");
- }
- }
- for(i=0;i<3;i++) {
- for (j=0; j> 4);
-
-#if SPIC_CALIBRATION_IN_NVM
- if (!SpicInitParaAllClk[SpicBitMode][CpuType].Valid) {
- SpicNVMCalLoad(SpicBitMode, CpuType);
- }
-#endif
- if (SpicInitParaAllClk[SpicBitMode][CpuType].Valid) {
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, (SpicInitParaAllClk[SpicBitMode][CpuType].BaudRate & 0x00000FFF));
- rd_data = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- rd_data = (rd_data & 0xFFFF0000) | (SpicInitParaAllClk[SpicBitMode][CpuType].RdDummyCyle & 0x0000FFFF);
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, rd_data);
- rd_data = SpicInitParaAllClk[SpicBitMode][CpuType].DelayLine;
- WR_DATA(SPI_DLY_CTRL_ADDR, ((RD_DATA(SPI_DLY_CTRL_ADDR) & 0xFFFFFF00) | (rd_data & 0x000000FF)));
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
- pass = SpicCmpDataForCalibrationRtl8195A();
- if (pass) {
- // Check the Magic Pattern OK
- return 1;
- }
- }
-
- // calibration
- DBG_8195A("SPI calibration\n");
-
- max_wd.auto_length = 0;
- max_wd.baud_rate = 0;
- max_wd.dly_line_ep = 0;
- max_wd.dly_line_sp = 0;
-
- for(baudr=MIN_BAUDRATE; baudr < (MAX_BAUDRATE+1); baudr++) {
- // Disable SPI_FLASH User Mode
- if(baudr == MIN_BAUDRATE)
- if(SpicBitMode == SpicOneBitMode)
- continue;
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, BIT_SCKDV(baudr));
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
- //DBG_8195A("(0x14)Baudr: 0x%x\n",HAL_SPI_READ32(REG_SPIC_BAUDR));
-
- for(autolen=(DefRdDummyCycle*2*baudr); autolen<(DefRdDummyCycle*2*baudr+MAX_AUTOLEN); autolen++) {
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
- rd_data = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- rd_data = (rd_data & 0xFFFF0000) | (0x0000FFFF & autolen);
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, rd_data);
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
- //DBG_8195A("Auto length: 0x%x\n",autolen);
- //DBG_8195A("(0x11C) Auto address length register: 0x%x\n",HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH));
- tmp_str_pt = MAX_DLYLINE;
- tmp_end_pt = 0;
- last_pass = 0;
-
- for(dly_line=0; dly_line<=MAX_DLYLINE; dly_line++) {
- rd_data = RD_DATA(SPI_DLY_CTRL_ADDR);
- rd_data = (rd_data & 0xFFFFFF00) | (dly_line & 0x000000FF);
- WR_DATA(SPI_DLY_CTRL_ADDR, rd_data);
- //DBG_8195A("SPI_DLY_CTRL_ADDR: 0x%x\n",RD_DATA(SPI_DLY_CTRL_ADDR));
-
- pass = SpicCmpDataForCalibrationRtl8195A();
-
-
- if(pass) { // PASS
- if(last_pass==0) {
- tmp_str_pt = dly_line;
- total_ava_wds++;
- }
-
- if(dly_line==MAX_DLYLINE) {
-
- tmp_end_pt = dly_line;
-
- if(total_ava_wds==1) {
- max_wd.baud_rate = baudr;
- max_wd.auto_length = autolen;
- max_wd.dly_line_sp = tmp_str_pt;
- max_wd.dly_line_ep = tmp_end_pt;
- }
- else {
- if((tmp_end_pt-tmp_str_pt)>(max_wd.dly_line_ep-max_wd.dly_line_sp)) {
- max_wd.baud_rate = baudr;
- max_wd.auto_length = autolen;
- max_wd.dly_line_sp = tmp_str_pt;
- max_wd.dly_line_ep = tmp_end_pt;
- }
- }
- }
- last_pass = 1;
- }
- else { // FAIL
- if(last_pass==1) {
- tmp_end_pt = dly_line;
- if(total_ava_wds == 1) {
- max_wd.baud_rate = baudr;
- max_wd.auto_length = autolen;
- max_wd.dly_line_sp = tmp_str_pt;
- max_wd.dly_line_ep = tmp_end_pt;
- }
- else {
- if((tmp_end_pt-tmp_str_pt)>(max_wd.dly_line_ep-max_wd.dly_line_sp)) {
- max_wd.baud_rate = baudr;
- max_wd.auto_length = autolen;
- max_wd.dly_line_sp = tmp_str_pt;
- max_wd.dly_line_ep = tmp_end_pt;
- }
- }
- }
- last_pass = 0;
- }
- }
- //DBG_8195A("total wds: %d\n",total_ava_wds);
- //DBG_8195A("Baud:%x; auto_length:%x; Delay start:%x; Delay end:%x\n",max_wd.baud_rate, max_wd.auto_length,max_wd.dly_line_sp, max_wd.dly_line_ep);
- }
- if (total_ava_wds) {
- DBG_8195A("Find the avaiable window\n");
- break;
- }
- }
-
-
- if(total_ava_wds==0) {
- return 0;
- }
- else {
- // set baudr, auto_length, and delay_line
- DBG_8195A("Baud:%x; auto_length:%x; Delay start:%x; Delay end:%x\n",max_wd.baud_rate, max_wd.auto_length,max_wd.dly_line_sp, max_wd.dly_line_ep);
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, (max_wd.baud_rate & 0x00000FFF));
- SpicInitParaAllClk[SpicBitMode][CpuType].BaudRate = max_wd.baud_rate;
- rd_data = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- rd_data = (rd_data & 0xFFFF0000) | (max_wd.auto_length & 0x0000FFFF);
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, rd_data);
- SpicInitParaAllClk[SpicBitMode][CpuType].RdDummyCyle = max_wd.auto_length;
- rd_data = ((max_wd.dly_line_sp + max_wd.dly_line_ep) >> 1);
- WR_DATA(SPI_DLY_CTRL_ADDR, ((RD_DATA(SPI_DLY_CTRL_ADDR) & 0xFFFFFF00) | (rd_data & 0x000000FF)));
- SpicInitParaAllClk[SpicBitMode][CpuType].DelayLine = rd_data;
- SpicInitParaAllClk[SpicBitMode][CpuType].Valid = 1;
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-#if SPIC_CALIBRATION_IN_NVM
- SpicNVMCalStore(SpicBitMode, CpuType);
-#endif
- return 1;
- }
-
-}
-
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicConfigAutoModeRtl8195A
-(
- IN u8 SpicBitMode
-)
-{
-
-
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- if (SpicOneBitMode == SpicBitMode) {
-
- // set write cmd (ppiix4: 0x38)
- HAL_SPI_WRITE32(REG_SPIC_WRITE_QUAD_ADDR_DATA, 0x38);
-
- // set read cmd (readiox4: 0xEB)
- HAL_SPI_WRITE32(REG_SPIC_READ_QUAD_ADDR_DATA, 0xEB);
-
- HAL_SPI_WRITE32(REG_SPIC_VALID_CMD,
- (HAL_SPI_READ32(REG_SPIC_VALID_CMD) & (~(
- BIT_WR_QUAD_II |
- BIT_WR_QUAD_I |
- BIT_WR_DUAL_II |
- BIT_WR_DUAL_I |
- BIT_RD_QUAD_IO |
- BIT_RD_QUAD_O |
- BIT_RD_DUAL_IO |
- BIT_RD_DUAL_I))));//Disable all the four and two bit commands.
- }
-
-
- if (SpicDualBitMode == SpicBitMode) {
- #if FLASH_RD_2IO_EN
- HAL_SPI_WRITE32(REG_SPIC_READ_DUAL_ADDR_DATA, FLASH_CMD_2READ);
- #endif
-
- #if FLASH_RD_2O_EN
- HAL_SPI_WRITE32(REG_SPIC_READ_DUAL_DATA, FLASH_CMD_DREAD);
- #endif
-
- HAL_SPI_WRITE32(REG_SPIC_VALID_CMD,
- (HAL_SPI_READ32(REG_SPIC_VALID_CMD)|(FLASH_VLD_DUAL_CMDS)));
-
- }
-
- if (SpicQuadBitMode == SpicBitMode) {
- #if FLASH_WR_4IO_EN
- HAL_SPI_WRITE32(REG_SPIC_WRITE_QUAD_ADDR_DATA, FLASH_CMD_4PP);
- #endif
-
- #if FLASH_RD_4IO_EN
- HAL_SPI_WRITE32(REG_SPIC_READ_QUAD_ADDR_DATA, FLASH_CMD_4READ);
- #endif
-
- #if FLASH_RD_4O_EN
- HAL_SPI_WRITE32(REG_SPIC_READ_QUAD_DATA, FLASH_CMD_QREAD);
- #endif
-
- HAL_SPI_WRITE32(REG_SPIC_VALID_CMD,
- (HAL_SPI_READ32(REG_SPIC_VALID_CMD)|FLASH_VLD_QUAD_CMDS));
- }
-
-
-}
-
-
-/**
- * @brief SpicWaitWipDoneRefinedRtl8195A. Wait for flash ready.
- *
- * @param IN SPIC_INIT_PARA SpicInitPara: spic init parameters with timing setting
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicWaitWipDoneRefinedRtl8195A(
- IN SPIC_INIT_PARA SpicInitPara
-){
- DBG_SPIF_INFO("%s(0x%x)\n", __func__, SpicInitPara);
-
- do {
- } while((SpicGetFlashStatusRefinedRtl8195A(SpicInitPara) & 0x01));
-}
-
-
-#if 1
-HAL_FLASH_TEXT_SECTION
-u8
-SpicGetFlashFlagRtl8195A
-(
- IN SPIC_INIT_PARA SpicInitPara
-)
-{
-
- u32 RdData;
-
- DBG_SPIF_INFO("%s(0x%x)\n", __func__, SpicInitPara);
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- /* Set Ctrlr1; 1 byte data frames */
- HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(1));
-
- /* Send flash RX command and read the data */
- SpicRxCmdRefinedRtl8195A(0x70, SpicInitPara);
- RdData = HAL_SPI_READ8(REG_SPIC_DR0);
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- if(RdData & 0x2){
- DBG_SPIF_WARN("Attempts to Program / Erase Protected Area.\n");
- SpicTxCmdWithDataRtl8195A(0x50, 0, 0, SpicInitPara);//Clear Error Bit & Write Enable of Flag Status Register
- }
-
-return RdData;
-
-}
-
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicWaitOperationDoneRtl8195A
-(
- IN SPIC_INIT_PARA SpicInitPara
-)
-{
- DBG_SPIF_INFO("%s(0x%x)\n", __func__, SpicInitPara);
-
- do {
- } while(!(SpicGetFlashFlagRtl8195A(SpicInitPara) & 0x80));
-}
-
-#endif
-/**
- * @brief SpicRxCmdRefinedRtl8195A. To send flash RX command.
- * Timing store/restore is implemented inside.
- *
- * @param IN u8 cmd: flash RX command
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicRxCmdRefinedRtl8195A(
- IN u8 cmd,
- IN SPIC_INIT_PARA SpicInitPara
-){
- u32 RdDummyCycle;
- u32 BaudRate;
- u32 BaudRate12bit;
- u32 DelayLine;
- u32 DelayLine8bit;
-
- u32 AutoLength = 0;
- u8 CpuClk = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
- PSPIC_INIT_PARA PSpicInitParaLocal = NULL;
- SPIC_INIT_PARA TmpSpicInitPara;
-
-#ifdef CONFIG_FPGA
- PSpicInitParaLocal = &TmpSpicInitPara;
- PSpicInitParaLocal->BaudRate = FPGASpicInitPara.BaudRate;
- PSpicInitParaLocal->RdDummyCyle = FPGASpicInitPara.RdDummyCyle;
- PSpicInitParaLocal->DelayLine = FPGASpicInitPara.DelayLine;
-#else
-
- if (SpicInitParaAllClk[SpicOneBitMode][CpuClk].Valid) {
- PSpicInitParaLocal = &(SpicInitParaAllClk[SpicOneBitMode][CpuClk]);
- }
- else {
- PSpicInitParaLocal = &TmpSpicInitPara;
- SpicLoadInitParaFromClockRtl8195A(CpuClk, 1, PSpicInitParaLocal);
- }
-#endif
-
-#if 0
- DBG_8195A("!cpuclk:%x\n",CpuClk);
- DBG_8195A("!baud:%x\n",PSpicInitParaLocal->BaudRate);
- DBG_8195A("!delay:%x\n",PSpicInitParaLocal->DelayLine);
- DBG_8195A("!dummy:%x\n",PSpicInitParaLocal->RdDummyCyle);
-#endif
-
- DBG_SPIF_INFO("%s(0x%x, 0x%x)\n", __func__, cmd, PSpicInitParaLocal);
-
- /* Store rd_dummy_cycle */
- AutoLength = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- RdDummyCycle = AutoLength & BIT_MASK_RD_DUMMY_LENGTH;
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, ((AutoLength & (~BIT_MASK_RD_DUMMY_LENGTH))|(PSpicInitParaLocal->RdDummyCyle)));
-
- /* Store baud rate */
- BaudRate = HAL_SPI_READ32(REG_SPIC_BAUDR);
- BaudRate12bit = (BaudRate & BIT_MASK_SCKDV);
- HAL_SPI_WRITE32(REG_SPIC_BAUDR,((BaudRate & (~BIT_MASK_SCKDV))|(PSpicInitParaLocal->BaudRate)));
-
- /* Store delay line */
- DelayLine = HAL_READ32(SYSTEM_CTRL_BASE, REG_PESOC_MEM_CTRL);
- DelayLine8bit = (DelayLine & BIT_MASK_PESOC_FLASH_DDL_CTRL);
- HAL_WRITE32(SYSTEM_CTRL_BASE, REG_PESOC_MEM_CTRL, ((DelayLine & (~BIT_MASK_PESOC_FLASH_DDL_CTRL))|(PSpicInitParaLocal->DelayLine)));
- //HAL_WRITE32(SYSTEM_CTRL_BASE, REG_PESOC_MEM_CTRL, ((DelayLine & (~BIT_MASK_PESOC_FLASH_DDL_CTRL))|DelayLine8bit));
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- /* set ctrlr0: RX_mode */
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- ((HAL_SPI_READ32(REG_SPIC_CTRLR0)&0xFFF0FFFF) | BIT_TMOD(3)));
-
- /* set flash_cmd: write cmd to fifo */
- HAL_SPI_WRITE8(REG_SPIC_DR0, cmd);
-
- /* Enable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
-
- /* Wait spic busy done */
- SpicWaitBusyDoneRtl8195A();
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- /* Recover rd_dummy_cycle */
- AutoLength = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- AutoLength = AutoLength & 0xFFFF0000;
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, (AutoLength | RdDummyCycle));
-
- /* Recover baud rate */
- BaudRate = HAL_SPI_READ32(REG_SPIC_BAUDR);
- BaudRate = (BaudRate & (~BIT_MASK_SCKDV));
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, (BaudRate|BaudRate12bit));
-
- /* Recover delay line */
- DelayLine = HAL_READ32(SYSTEM_CTRL_BASE, REG_PESOC_MEM_CTRL);
- DelayLine = (DelayLine & (~BIT_MASK_PESOC_FLASH_DDL_CTRL));
- HAL_WRITE32(SYSTEM_CTRL_BASE, REG_PESOC_MEM_CTRL, (DelayLine|DelayLine8bit));
-}
-
-/**
- * @brief SpicGetFlashStatusRefinedRtl8195A. For the exchange between one- and two-
- * bit mode, the spic timing setting (baud, rd_dummy_cycle (ATUO_LENGTH)
- * and delay line) should be changed according to the mode used.
- *
- * @param IN SPIC_INIT_PARA SpicInitPara: spic init parameters with timing setting
- *
- * @retval u8 flash status register value
- */
-HAL_FLASH_TEXT_SECTION
-u8
-SpicGetFlashStatusRefinedRtl8195A(
- IN SPIC_INIT_PARA SpicInitPara
-){
-
- u32 RdData;
-
- DBG_SPIF_INFO("%s(0x%x)\n", __func__, SpicInitPara);
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- /* Set Ctrlr1; 1 byte data frames */
- HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(1));
-
- /* Send flash RX command and read the data */
- SpicRxCmdRefinedRtl8195A(FLASH_CMD_RDSR, SpicInitPara);
- RdData = HAL_SPI_READ8(REG_SPIC_DR0);
-
- /* Disable SPI_FLASH User Mode */
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- return RdData;
-}
-
-/**
- * @brief SpicInitRefinedRtl8195A.
- *
- * @param IN u8 InitBaudRate,
- * IN u8 SpicBitMode
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicInitRefinedRtl8195A(
- IN u8 InitBaudRate,
- IN u8 SpicBitMode
-){
-
- u32 Value32;
- SPIC_INIT_PARA SpicInitPara;
- PSPIC_INIT_PARA PSpicInitParaLocal;
-
- PSpicInitParaLocal = &SpicInitPara;
-#ifdef CONFIG_FPGA
- PSpicInitParaLocal->BaudRate = FPGASpicInitPara.BaudRate;
- PSpicInitParaLocal->RdDummyCyle = FPGASpicInitPara.RdDummyCyle;
- PSpicInitParaLocal->DelayLine = FPGASpicInitPara.DelayLine;
-#else
- u8 CpuClk;
-
- CpuClk = (((u8)(HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70))) >> 4);
-
- if (SpicInitParaAllClk[SpicBitMode][CpuClk].Valid) {
- PSpicInitParaLocal = &(SpicInitParaAllClk[SpicBitMode][CpuClk]);
- }
- else {
- SpicLoadInitParaFromClockRtl8195A(CpuClk, 1, PSpicInitParaLocal);
- }
-
-#endif
-
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- HAL_SPI_WRITE32(REG_SPIC_BAUDR, BIT_SCKDV(InitBaudRate));
-
- HAL_SPI_WRITE32(REG_SPIC_SER, BIT_SER);
-
- Value32 = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
- HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH,
- ((Value32 & 0xFFFF0000) | BIT_RD_DUMMY_LENGTH(PSpicInitParaLocal->RdDummyCyle)));
-
- HAL_WRITE32(PERI_ON_BASE, REG_PESOC_MEM_CTRL,
- ((HAL_READ32(PERI_ON_BASE, REG_PESOC_MEM_CTRL)&0xFFFFFF00)|
- PSpicInitParaLocal->DelayLine));
-
- HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(4));
-
-
- switch (SpicBitMode) {
- case SpicOneBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- (HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_CMD_CH(3)|BIT_ADDR_CH(3)|BIT_DATA_CH(3)))));
- break;
-
- case SpicDualBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- ((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_CMD_CH(3)|BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
- (BIT_ADDR_CH(1)|BIT_DATA_CH(1))));
-
- break;
-
- case SpicQuadBitMode:
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- ((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_CMD_CH(3)|BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
- (BIT_ADDR_CH(2)|BIT_DATA_CH(2))));
- break;
-
- }
-}
-
-
-/**
- * @brief SpicEraseFlashRefinedRtl8195A.
- *
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicEraseFlashRefinedRtl8195A(VOID)
-{
-
- SPIC_INIT_PARA SpicInitPara = DEF_INIT_SPICINITPARA();
-
- // Wait for flash busy done
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- while((SpicGetFlashStatusRefinedRtl8195A(SpicInitPara) & 0x02)==0) {
- // Set flash_cmd: WREN to FIFO
- //SpicTxCmdRtl8195A(FLASH_CMD_WREN, SpicInitPara);
- SpicTxCmdWithDataRtl8195A(FLASH_CMD_WREN, 0, 0, SpicInitPara);
- }
-
- DBG_8195A("Erase Cmd Set\n");
-
- // Set flash_cmd: Chip_erase to FIFO
- //SpicTxCmdRtl8195A(FLASH_CMD_CE, SpicInitPara);
- SpicTxCmdWithDataRtl8195A(FLASH_CMD_CE, 0, 0, SpicInitPara);
-
- // polling WEL
- do {
- } while((SpicGetFlashStatusRefinedRtl8195A(SpicInitPara) & 0x02)!=0);
-}
-
-/**
- * @brief SpicSetFlashStatusRefinedRtl8195A.
- *
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicSetFlashStatusRefinedRtl8195A
-(
- IN u32 data,
- IN SPIC_INIT_PARA SpicInitPara
-)
-{
- u32 Info;
-
- Info = HAL_SPI_READ32(REG_SPIC_ADDR_LENGTH);
-
- // Set flash_cmd: WREN to FIFO
- //SpicTxCmdRtl8195A(FLASH_CMD_WREN, SpicInitPara);
- SpicTxCmdWithDataRtl8195A(FLASH_CMD_WREN, 0, 0, SpicInitPara);
-
- // Disable SPI_FLASH
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- // set ctrlr0: TX mode
- HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
- (HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~ BIT_TMOD(3))));
-
- HAL_SPI_WRITE32(REG_SPIC_ADDR_LENGTH, BIT_ADDR_PHASE_LENGTH(1));
-
- // Set flash_cmd: WRSR to FIFO
- HAL_SPI_WRITE8(REG_SPIC_DR0, BIT_DR0(FLASH_CMD_WRSR));
-
- // Set data FIFO
- HAL_SPI_WRITE8(REG_SPIC_DR0, BIT_DR0(data));
-
- // Enable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
-
- // wait spic busy done
- SpicWaitBusyDoneRtl8195A();
-
- if((SpicInitParaAllClk[0][0].flashtype) == FLASH_MICRON)
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- else
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- // Disable SPI_FLASH User Mode
- HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
-
- HAL_SPI_WRITE32(REG_SPIC_ADDR_LENGTH, Info);
-
- // wait flash busy done (wip=0)
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
-}
-
-
-/**
- * @brief SpicWaitWipRtl8195A.
- *
- * @param NA
- *
- * @retval NA
- */
-
-HAL_FLASH_TEXT_SECTION
-u32
-SpicWaitWipRtl8195A(
- VOID
-){
-
- SPIC_INIT_PARA SpicInitPara = DEF_INIT_SPICINITPARA();
-
- /* Check for flash ready status */
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- return _TRUE;
-}
-
-
-/**
- * @brief SpicSetFlashStatusRefinedRtl8195A.
- *
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-u32
-SpicOneBitCalibrationRtl8195A(
- IN u8 SysCpuClk
-){
- u32 DefRdDummyCycle = 0;
-
-
- // set auto mode
- SpicConfigAutoModeRtl8195A(SpicOneBitMode);
-
- /* MXIC spec */
- DefRdDummyCycle = 0;
-
- if (!SpicCalibrationRtl8195A(SpicOneBitMode, DefRdDummyCycle)) {
- return _FALSE;
- }
-
-#if 0
- DBG_8195A("@baud:%x\n",SpicInitParaAllClk[0][SysCpuClk].BaudRate);
- DBG_8195A("@delay:%x\n",SpicInitParaAllClk[0][SysCpuClk].DelayLine);
- DBG_8195A("@dummy:%x\n\n",SpicInitParaAllClk[0][SysCpuClk].RdDummyCyle);
-#endif
- return _TRUE;
-}
-
-/**
- * @brief SpicDisableRtl8195A.
- * Disable SPI Flash memory controller.
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION
-VOID
-SpicDisableRtl8195A(VOID)
-{
- SPI_FLASH_PIN_FCTRL(OFF);
-}
-
-#if SPIC_CALIBRATION_IN_NVM
-/**
- * @brief SpicNVMCalLoad.
- * Load the SPI Flash Controller Calibration data from NVM
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION VOID
-SpicNVMCalLoad(u8 BitMode, u8 CpuClk)
-{
- SPIC_INIT_PARA *pspci_para;
- u32 spci_para;
- u32 spci_para_inv;
- u32 flash_offset;
-
-// DBG_SPIF_INFO("SpicNVMCalLoad==> BitMode=%d CpuClk=%d\r\n", BitMode, CpuClk);
-
- /* each Calibration parameters use 8 bytes, first 4-bytes are the calibration data,
- 2nd 4-bytes are the validate data: ~(calibration data) */
- flash_offset = (CpuClk * 8) + (BitMode * CPU_CLK_TYPE_NO * 8);
- spci_para = HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset));
- if (spci_para != 0xFFFFFFFF) {
- spci_para_inv = HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset+4));
- if (0xFFFFFFFF == (spci_para ^ spci_para_inv)) {
- pspci_para = (SPIC_INIT_PARA*)&spci_para;
- SpicInitParaAllClk[BitMode][CpuClk].BaudRate = pspci_para->BaudRate;
- SpicInitParaAllClk[BitMode][CpuClk].RdDummyCyle = pspci_para->RdDummyCyle;
- SpicInitParaAllClk[BitMode][CpuClk].DelayLine = pspci_para->DelayLine;
- SpicInitParaAllClk[BitMode][CpuClk].Valid = pspci_para->Valid;
- DBG_SPIF_INFO("SpicNVMCalLoad: Calibration Loaded(BitMode %d, CPUClk %d): BaudRate=0x%x RdDummyCyle=0x%x DelayLine=0x%x\r\n",
- BitMode, CpuClk,
- SpicInitParaAllClk[BitMode][CpuClk].BaudRate,
- SpicInitParaAllClk[BitMode][CpuClk].RdDummyCyle,
- SpicInitParaAllClk[BitMode][CpuClk].DelayLine);
- }
- else {
- DBG_SPIF_WARN("SpicNVMCalLoad: Data in Flash(@ 0x%x = 0x%x 0x%x) is Invalid\r\n",
- (FLASH_SPIC_PARA_BASE+flash_offset), spci_para, spci_para_inv);
- }
-
- }
- else {
-// DBG_SPIF_INFO("SpicNVMCalLoad: No Data in Flash(@ 0x%x)\r\n", flash_offset);
- }
-}
-
-/**
- * @brief SpicNVMCalLoadAll.
- * Load the SPI Flash Controller Calibration data from NVM
- * @param NA
- *
- * @retval NA
- */
-HAL_FLASH_TEXT_SECTION VOID
-SpicNVMCalLoadAll(void)
-{
- u8 i,j;
-
- for(i=0;i<3;i++) {
- for (j=0; j BitMode=%d CpuClk=%d\r\n", BitMode, CpuClk);
-
- /* each Calibration parameters use 8 bytes, first 4-bytes are the calibration data,
- 2nd 4-bytes are the validate data: ~(calibration data) */
- flash_offset = (CpuClk * 8) + (BitMode * CPU_CLK_TYPE_NO * 8);
- spci_para = HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset));
- if (spci_para == 0xFFFFFFFF) {
-// if (1) {
- pspci_para = (SPIC_INIT_PARA*)&spci_para;
- pspci_para->BaudRate = SpicInitParaAllClk[BitMode][CpuClk].BaudRate;
- pspci_para->RdDummyCyle = SpicInitParaAllClk[BitMode][CpuClk].RdDummyCyle;
- pspci_para->DelayLine = SpicInitParaAllClk[BitMode][CpuClk].DelayLine;
- pspci_para->Valid = SpicInitParaAllClk[BitMode][CpuClk].Valid;
- HAL_WRITE32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset), spci_para);
-
- if((SpicInitParaAllClk[BitMode][CpuClk].flashtype) == FLASH_MICRON)
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- else
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- HAL_WRITE32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset+4), ~spci_para);
-
- if((SpicInitParaAllClk[BitMode][CpuClk].flashtype) == FLASH_MICRON)
- SpicWaitOperationDoneRtl8195A(SpicInitPara);
- else
- SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
-
- DBG_SPIF_INFO("SpicNVMCalStore(BitMode %d, CPUClk %d): Calibration Stored: BaudRate=0x%x RdDummyCyle=0x%x DelayLine=0x%x\r\n",
- BitMode, CpuClk,
- SpicInitParaAllClk[BitMode][CpuClk].BaudRate,
- SpicInitParaAllClk[BitMode][CpuClk].RdDummyCyle,
- SpicInitParaAllClk[BitMode][CpuClk].DelayLine);
- // Read back to check
- if (HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset)) != spci_para) {
- DBG_SPIF_ERR("SpicNVMCalStore Err(Offset=0x%x), Wr=0x%x Rd=0x%x \r\n",
- flash_offset, spci_para, HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset)));
- }
-
- if (HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset+4)) != ~spci_para) {
- DBG_SPIF_ERR("SpicNVMCalStore Err(Offset=0x%x), Wr=0x%x Rd=0x%x \r\n",
- flash_offset+4, ~spci_para, HAL_READ32(SPI_FLASH_BASE, (FLASH_SPIC_PARA_BASE+flash_offset+4)));
- }
- }
- else {
- // There is a parameter on the flash memory already
- DBG_SPIF_ERR("SpicNVMCalStore: The flash memory(@0x%x = 0x%x) is not able to be write, Erase it first!!\r\n",
- (FLASH_SPIC_PARA_BASE+flash_offset), spci_para);
- }
-}
-
-#endif // #if SPIC_CALIBRATION_IN_NVM
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.cspy.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.cspy.bat
deleted file mode 100644
index da0eed1..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.cspy.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@REM This batch file has been generated by the IAR Embedded Workbench
-@REM C-SPY Debugger, as an aid to preparing a command line for running
-@REM the cspybat command line utility using the appropriate settings.
-@REM
-@REM Note that this file is generated every time a new debug session
-@REM is initialized, so you may want to move or rename the file before
-@REM making changes.
-@REM
-@REM You can launch cspybat by typing the name of this batch file followed
-@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
-@REM
-@REM Read about available command line parameters in the C-SPY Debugging
-@REM Guide. Hints about additional command line parameters that may be
-@REM useful in specific cases:
-@REM --download_only Downloads a code image without starting a debug
-@REM session afterwards.
-@REM --silent Omits the sign-on message.
-@REM --timeout Limits the maximum allowed execution time.
-@REM
-
-
-@echo off
-
-if not "%~1" == "" goto debugFile
-
-@echo on
-
-"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
-
-@echo off
-goto end
-
-:debugFile
-
-@echo on
-
-"D:\MCU\IAR Systems\Embedded Workbench 7.3\common\bin\cspybat" -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.general.xcl" "--debug_file=%~1" --backend -f "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\settings\FlashLoader.Debug.driver.xcl"
-
-@echo off
-:end
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.driver.xcl b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.driver.xcl
deleted file mode 100644
index b3c7db6..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.driver.xcl
+++ /dev/null
@@ -1,23 +0,0 @@
-"--endian=little"
-
-"--cpu=Cortex-M3"
-
-"--fpu=None"
-
-"--semihosting=none"
-
-"--drv_communication=USB0"
-
-"--drv_interface_speed=auto"
-
-"--jlink_initial_speed=1000"
-
-"--jlink_reset_strategy=0,0"
-
-"--drv_catch_exceptions=0x000"
-
-"--drv_swo_clock_setup=72000000,0,2000000"
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.general.xcl b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.general.xcl
deleted file mode 100644
index 39c7933..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.Debug.general.xcl
+++ /dev/null
@@ -1,13 +0,0 @@
-"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armproc.dll"
-
-"D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armjlink2.dll"
-
-"E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out"
-
---plugin "D:\MCU\IAR Systems\Embedded Workbench 7.3\arm\bin\armbat.dll"
-
---macro "E:\RTL87xx\git\RTL00_SDKV35a\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\EWARM_bcut\..\FlashRTL8195aMP.mac"
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.crun b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.crun
deleted file mode 100644
index ef39dce..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.crun
+++ /dev/null
@@ -1,16 +0,0 @@
-
-
-
- 1
-
-
- *
- *
- *
- 0
- 1
-
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dbgdt b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dbgdt
deleted file mode 100644
index e068f91..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dbgdt
+++ /dev/null
@@ -1,5 +0,0 @@
-
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dni b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dni
deleted file mode 100644
index 2825cbc..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.dni
+++ /dev/null
@@ -1,22 +0,0 @@
-[SfrWindow]
-Show=1 1
-Sort=4 0
-[Stack]
-FillEnabled=0
-OverflowWarningsEnabled=1
-WarningThreshold=90
-SpWarningsEnabled=1
-WarnLogOnly=1
-UseTrigger=1
-TriggerName=main
-LimitSize=0
-ByteLimit=50
-[JLinkDriver]
-CStepIntDis=_ 0
-[Disassemble mode]
-mode=0
-[Breakpoints2]
-Count=0
-[Aliases]
-Count=0
-SuppressDialog=0
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wsdt b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wsdt
deleted file mode 100644
index 85caa12..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wsdt
+++ /dev/null
@@ -1,155 +0,0 @@
-
-
-
-
-
- FlashLoader/Debug
-
-
-
-
-
-
-
-
- 282272727
-
-
-
- 3
- 0
- 0
-
-
- Select-Ambiguous-Definitions
-
-
-
-
-
-
-
- 20139237192
-
-
- 3
- 0
- 0
-
-
-
- - Check
- - File
- - Line
- - Message
- - Severity
-
-
- - 200
- - 200
- - 100
- - 662
- - 100
-
-
-
-
- 3
- 0
- 0
-
-
-
- - Access
- - Address
- - Name
- - Size
- - Zone
- - _I0
-
-
- - 120
- - 150
- - 150
- - 50
- - 120
- - 20
-
-
-
-
- 3
- 0
- 0
-
-
-
- - File
- - Function
- - Line
-
-
- - 200
- - 700
- - 100
-
-
-
-
- 3
- 0
- 0
-
-
- Build
-
-
-
- 660
- 94
- 1132
-
-
-
-
-
-
-
-
- TabID-6666-21578
- Workspace
- Workspace
-
-
- FlashLoaderFlashLoader/FrameworkFlashLoader/OutputFlashLoader/rtl8195a
-
-
-
- 0
-
-
- TabID-3028-28606
- Build
- Build
-
-
-
-
- 0
-
-
-
-
-
- TextEditor$WS_DIR$\flash_MX25L8008.c00000351101471014700100000010000001
-
-
-
-
-
-
- iaridepm.enu1-2-2768356-2-2200200104712197824187435761622-2-21981912-2-219142001002094197824104712197824
-
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wspos b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wspos
deleted file mode 100644
index ceeff3b..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut/settings/FlashLoader.wspos
+++ /dev/null
@@ -1,2 +0,0 @@
-[MainWindow]
-WindowPlacement=_ 341 233 2261 1294 1
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashLoader.bin b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashLoader.bin
deleted file mode 100644
index 54177a9..0000000
Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashLoader.bin and /dev/null differ
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board
deleted file mode 100644
index a2c0b37..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board
+++ /dev/null
@@ -1,24 +0,0 @@
-
-
-
-
- CODE 0x10000bc0 0x10003FFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --head
-
-
- CODE 0x10004000 0x1006FFFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --cascade
-
-
- CODE 0x30000000 0x301FFFFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --cascade
-
- CODE 0x00000000 0x000FFFFF
- CODE 0x10000000 0x10000bbf
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash
deleted file mode 100644
index a96f962..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out
- 0x00000000
- 8
- 512 0x1000
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.mac
- 1
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac
deleted file mode 100644
index c628625..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac
+++ /dev/null
@@ -1,72 +0,0 @@
-setup()
-{
- __var tmp;
-
- __hwResetWithStrategy(0, 2);
- __hwReset(1);
-
- tmp = __readMemory32(0x40000014,"Memory"); __delay(10);
- __message "0x40000014=",tmp:%x;
-
- __writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
-
- __writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
- __writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
- __writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
- __writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
- __writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
- __writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
-/*
- __writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
- __writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
- __writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
- __delay(3);
-
- // Enable
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- __delay(20);
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
- __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
- __delay(30);
-*/
-}
-
-execUserPreload()
-{
- __var tmp;
- setup();
- tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
-
-execUserSetup()
-{
- //execUserPreload();
- //__loadImage("$TARGET_PATH$ ", 0, 0);
- //__writeMemory32(0x80000000, 0x40000218, "Memory");
-}
-
-execUserFlashInit() // Called by debugger before loading flash loader in RAM.
-{
- __var tmp;
- __message "----- Prepare hardware for Flashloader -----\n";
-
- __writeMemory32(0x1FFFFFF8, 0x10000000, "Memory");
- __writeMemory32(0x101, 0x10000004, "Memory");
- setup();
- tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.out b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.out
deleted file mode 100644
index cd6aa7b..0000000
Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.out and /dev/null differ
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board
deleted file mode 100644
index f5f7ece..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board
+++ /dev/null
@@ -1,17 +0,0 @@
-
-
-
-
- CODE 0x10000bc8 0x10005FFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --head
- --img2_addr
- 0xB000
-
-
- CODE 0x00000000 0x000FFFFF
- CODE 0x10000000 0x10000bc7
- CODE 0x10006000 0x1006FFFF
- CODE 0x30000000 0x301FFFFF
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board
deleted file mode 100644
index d4a9af7..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board
+++ /dev/null
@@ -1,17 +0,0 @@
-
-
-
-
- CODE 0x10000bc0 0x10005FFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --head
- --img2_addr
- 0xB000
-
-
- CODE 0x00000000 0x000FFFFF
- CODE 0x10000000 0x10000bbf
- CODE 0x10006000 0x1006FFFF
- CODE 0x30000000 0x301FFFFF
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board
deleted file mode 100644
index 661c2cb..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board
+++ /dev/null
@@ -1,26 +0,0 @@
-
-
-
-
- CODE 0x10000bc8 0x10005FFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x00000000
- --head
- --img2_addr
- 0xB000
-
-
- CODE 0x10006000 0x1006FFFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0xB000
-
-
- CODE 0x30000000 0x301FFFFF
- $PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash
- 0x0000
- --cascade
-
- CODE 0x00000000 0x000FFFFF
- CODE 0x10000000 0x10000bc7
- CODE 0x1FFF0000 0x1FFFFFFF
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board
deleted file mode 100644
index 2562be5..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board
+++ /dev/null
@@ -1,30 +0,0 @@
-
-
-
-
- CODE 0x200006b4 0x2002FFFF
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.flash
- 0x00000000
-
-
- CODE 0x30000000 0x301FFFFF
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.flash
- 0x00010000
- DATA_Z 0x30000000 0x301FFFFF
-
-
- CODE 0x20080000 0x200BFFFF
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.flash
- 0x00020000
- DATA_Z 0x20080000 0x200BFFFF
-
-
- CODE 0x00000000 0x00000000
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.flash
- 0x00030000
-
- CODE 0x00000001 0x000BFFFF
- CODE 0x20000000 0x200006b3
-
-
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash
deleted file mode 100644
index 8613f80..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.out
- 0x00000000
- 8
- 256 0x1000
- $PROJ_DIR$\flashloader\FlashRTL8195aQA.mac
- 1
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac
deleted file mode 100644
index 4d670e0..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac
+++ /dev/null
@@ -1,60 +0,0 @@
-setup()
-{
- __var tmp;
-
- __hwReset(1);
-
- __writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
- __writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
- __writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
- __writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
- __writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
- __writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
- __writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
-
- __writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
- __writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
- __writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
- __delay(3);
-
- // Enable
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- __delay(20);
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
- __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
- __delay(30);
-}
-
-execUserPreload()
-{
- __message "----- Prepare hardware for Flashloader -----\n";
- setup();
- __writeMemory32(0x80000000, 0x40000218, "Memory");
-}
-
-execUserSetup()
-{
- //execUserPreload();
- //__loadImage("$TARGET_PATH$ ", 0, 0);
- //__writeMemory32(0x80000000, 0x40000218, "Memory");
-}
-
-execUserFlashInit() // Called by debugger before loading flash loader in RAM.
-{
- __message "----- Prepare hardware for Flashloader -----\n";
- setup();
- __writeMemory32(0x80000000, 0x40000218, "Memory");
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.out b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.out
deleted file mode 100644
index c89a959..0000000
Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.out and /dev/null differ
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat
deleted file mode 100644
index c96cffe..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat
+++ /dev/null
@@ -1,53 +0,0 @@
-@set /a tmp = %1-1
-@call :toHex %tmp% end1
-@set /a tmp2 = %2-1
-@call :toHex %tmp2% end2
-@set /a tmp3 = %3-1
-@call :toHex %tmp3% end0
-
-@echo echo image 2 start %1
-@echo echo image 1 end 0x%end1%
-@echo off
-@echo ^ > tmp.board
-@echo. >> tmp.board
-@echo ^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE %3 0x%end1%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0x00000000^ >> tmp.board
-@echo ^--head^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE %1 0x%end2%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0x00000000^ >> tmp.board
-@echo ^--cascade^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE 0x30000000 0x301FFFFF^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0x00000000^ >> tmp.board
-@echo ^--cascade^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE 0x00000000 0x000FFFFF^ >> tmp.board
-@echo ^CODE 0x10000000 0x%end0%^ >> tmp.board
-@echo ^CODE %2 0x1006FFFF^ >> tmp.board
-@echo ^ >> tmp.board >> tmp.board
-
-exit
-
-:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
-@echo off
-SETLOCAL ENABLEDELAYEDEXPANSION
-set /a dec=%~1
-set "hex="
-set "map=0123456789ABCDEF"
-for /L %%N in (1,1,8) do (
- set /a "d=dec&15,dec>>=4"
- for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
-)
-
-( ENDLOCAL & REM RETURN VALUES
- IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
-)
-EXIT /b
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat
deleted file mode 100644
index 976c525..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat
+++ /dev/null
@@ -1,69 +0,0 @@
-@set /a tmp = %1-1
-@call :toHex %tmp% end1
-@set /a tmp2 = %2-1
-@call :toHex %tmp2% end2
-@set /a tmp3 = %3-1
-@call :toHex %tmp3% end3
-
-@set /a tmp4 = %4
-@call :toHex %tmp4% flash_run_start
-@set /a tmp4 = %5-1
-@call :toHex %tmp4% flash_run_end
-
-@echo echo image 2 start %1
-@echo echo image 1 end 0x%end1%
-@echo off
-@echo ^ > tmp.board
-@echo. >> tmp.board
-@echo ^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE 0x10000bc8 0x%end1%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0x00000000^ >> tmp.board
-@echo ^--head >> tmp.board
-@echo --img2_addr >> tmp.board
-@echo 0xB000^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^ >> tmp.board
-@echo ^CODE %1 0x%end2%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0xB000^ >> tmp.board
-@echo ^ >> tmp.board
-if NOT "%3"=="0xFFFFFFFF" (
-@echo ^ >> tmp.board
-@echo ^CODE 0x30000000 0x%end3%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0x0000^ >> tmp.board
-@echo ^--cascade^ >> tmp.board
-@echo ^ >> tmp.board
-)
-if NOT "%4"=="0xFFFFFFFF" (
-@echo ^ >> tmp.board
-@echo ^CODE 0x%flash_run_start% 0x%flash_run_end%^ >> tmp.board
-@echo ^$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^ >> tmp.board
-@echo ^0xA4000^ >> tmp.board
-@echo ^ >> tmp.board
-)
-@echo ^CODE 0x00000000 0x000FFFFF^ >> tmp.board
-@echo ^CODE 0x10000000 0x10000bc7^ >> tmp.board
-@echo ^CODE %2 0x1006FFFF^ >> tmp.board
-@echo ^CODE 0x1FFF0000 0x1FFFFFFF^ >> tmp.board
-@echo ^ >> tmp.board >> tmp.board
-
-exit
-
-:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
-@echo off
-SETLOCAL ENABLEDELAYEDEXPANSION
-set /a dec=%~1
-set "hex="
-set "map=0123456789ABCDEF"
-for /L %%N in (1,1,8) do (
- set /a "d=dec&15,dec>>=4"
- for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
-)
-
-( ENDLOCAL & REM RETURN VALUES
- IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
-)
-EXIT /b
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat
deleted file mode 100644
index 985ccd8..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat
+++ /dev/null
@@ -1,47 +0,0 @@
-cd /D %2
-set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-
-del Debug/Exe/target.map Debug/Exe/target.asm *.bin
-cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
-cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
-::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
-::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
-
-::echo %ram1_start% > tmp.txt
-::echo %ram2_start% >> tmp.txt
-::echo %ram3_start% >> tmp.txt
-::echo %ram1_end% >> tmp.txt
-::echo %ram2_end% >> tmp.txt
-::echo %ram3_end% >> tmp.txt
-
-%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
-%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
-
-%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
-%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
-if defined %ram3_start (
-%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
-)
-
-:: SDRAM case
-if defined %ram3_start (
-copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
-)
-
-:: NO SDRAM case
-if not defined %ram3_start (
-copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
-)
-
-:: board generator
-%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
-
-exit
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs
deleted file mode 100644
index 5652052..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs
+++ /dev/null
@@ -1,5 +0,0 @@
-Dim WshShell
-
-Set WshShell = WScript.CreateObject("WScript.Shell")
-
-WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.bat
deleted file mode 100644
index 5fbc962..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-set alinkdir=%1\..\..\..\component\common\application\alink
-
-::echo %tooldir% > %alinkdir%\test.txt
-::echo %alinkdir% >> %alinkdir%\test.txt
-
-cd /D %tooldir%
-
-::echo "%tooldir%\iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a" >> %alinkdir%\test.txt
-
-echo cmd /c iarchive.exe --create lib_alink.a >out.bat
-cmd /c "iarchive.exe -t %alinkdir%\lib_porting.a" >>out.bat
-cmd /c "iarchive.exe -t %alinkdir%\cloud\lib\libalink.a" >>out.bat
-cmd /c "iarchive.exe -t %alinkdir%\zconfig\lib\libaws.a" >>out.bat
-cmd /c sed ':a;N;$ s/\n/ /g;ba' out.bat > out1.bat
-
-cmd /c "iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a"
-cmd /c "iarchive.exe --extract %alinkdir%\zconfig\lib\libaws.a"
-cmd /c "iarchive.exe --extract %alinkdir%\lib_porting.a"
-
-cmd /c "out1.bat"
-
-del %alinkdir%\lib_porting.a
-cmd /c copy lib_alink.a %alinkdir%
-
-del *.o
-del *.bat
-del *.a
-
-exit
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.vbs b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.vbs
deleted file mode 100644
index 61bab40..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.vbs
+++ /dev/null
@@ -1,5 +0,0 @@
-Dim WshShell
-
-Set WshShell = WScript.CreateObject("WScript.Shell")
-
-WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_alink.bat "+WScript.Arguments.Item(0), 0
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat
deleted file mode 100644
index 81ab821..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-cd /D %2
-set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
-
-del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
-cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
-cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
-
-
-::echo %ram1_start% > tmp.txt
-::echo %ram2_start% >> tmp.txt
-::echo %ram3_start% >> tmp.txt
-::echo %ram1_end% >> tmp.txt
-::echo %ram2_end% >> tmp.txt
-::echo %ram3_end% >> tmp.txt
-
-%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
-::%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/sdram.bin
-
-%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
-%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
-
-:: update ram_1.p.bin, raw file for application
-copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
-copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
-
-:: delete hal_spi_flash_ram.o object after image built
-del Debug\Obj\hal_spi_flash_ram.*
-
-exit
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs
deleted file mode 100644
index a166cbd..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs
+++ /dev/null
@@ -1,5 +0,0 @@
-Dim WshShell
-
-Set WshShell = WScript.CreateObject("WScript.Shell")
-
-WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat
deleted file mode 100644
index f555221..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat
+++ /dev/null
@@ -1,77 +0,0 @@
-cd /D %2
-set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
-set cfgdir=%3
-
-echo config %3
-
-del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
-cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
-cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
-
-::echo %ram1_start% > tmp.txt
-::echo %ram2_start% >> tmp.txt
-::echo %ram3_start% >> tmp.txt
-::echo %ram1_end% >> tmp.txt
-::echo %ram2_end% >> tmp.txt
-::echo %ram3_end% >> tmp.txt
-
-%tooldir%\objcopy -j "A3 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
-if defined %ram3_start (
- %tooldir%\objcopy -j "A5 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
-)
-if defined %flash_run_start (
- %tooldir%\objcopy -j "A7 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
-) else (
- set flash_run_start=0xFFFFFFFF
- set flash_run_end=0xFFFFFFFF
-)
-
-%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
-%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
-if defined %ram3_start (
-%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
-)
-
-:: force update ram_1.p.bin
-del %cfgdir%\Exe\ram_1.p.bin
-
-:: check ram_1.p.bin exist, copy default
-if not exist %cfgdir%\Exe\ram_1.p.bin (
- copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
-)
-
-::if not exist %cfgdir%\Exe\data.p.bin (
-:: copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
-::)
-
-::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
-%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
-
-:: SDRAM case
-if defined %ram3_start (
-copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
-copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
-)
-
-:: NO SDRAM case
-if not defined %ram3_start (
-copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
-copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
-set ram3_end=0xFFFFFFFF
-)
-
-%tooldir%\checksum %cfgdir%\Exe\ota.bin
-
-:: board generator
-%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
-
-exit
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs
deleted file mode 100644
index cca68a1..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs
+++ /dev/null
@@ -1,5 +0,0 @@
-Dim WshShell
-
-Set WshShell = WScript.CreateObject("WScript.Shell")
-
-WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+""" """+WScript.Arguments.Item(2)+"""""", 0
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat
deleted file mode 100644
index f78324b..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat
+++ /dev/null
@@ -1,61 +0,0 @@
-cd /D %2
-set bindir=application/Debug/bin
-set bindirw=application\Debug\bin
-set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
-
-echo %tooldir%
-echo %libdir%
-
-::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
-cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
-cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
-
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
-for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
-
-::echo %ram1_start% > tmp.txt
-echo %ram2_start%
-echo %ram3_start%
-::echo %ram1_end% >> tmp.txt
-echo %ram2_end%
-echo %ram3_end%
-
-
-%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
-if NOT %ram3_start% == %ram3_end% (
- %tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
-)
-
-%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
-if defined %ram3_start (
-%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
-)
-
-:: check ram_1.p.bin exist, copy default
-if not exist %bindirw%\ram_1.p.bin (
- copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
-)
-
-::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
-%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
-
-:: SDRAM case
-if defined %ram3_start (
-copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
-copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
-)
-
-%tooldir%\checksum Debug\Exe\ota.bin
-
-:: NO SDRAM case
-if not defined %ram3_start (
-copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
-copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
-)
-
-exit
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat
deleted file mode 100644
index 1490330..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat
+++ /dev/null
@@ -1,29 +0,0 @@
-cd /D %1
-set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
-set libdir=%1\..\..\..\component\soc\realtek\8195a\misc\bsp
-:: Generate build_info.h
-echo off
-::echo %date:~0,10%-%time:~0,8%
-::echo %USERNAME%
-for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
-::echo %hostname%
-
-echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
-echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
-echo #define RTL8195AFW_COMPILE_DATE "%date:~0,4%%date:~5,2%%date:~8,2%" >> ..\inc\build_info.h
-echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
-echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
-echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
-echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
-
-echo. > main.icf
-
-for /f "delims=" %%i in ('cmd /c "%tooldir%\coan defs -g e ../src/main.c | %tooldir%\grep "#define" | %tooldir%\grep __ICFEDIT_region_BD_RAM_start__ | %tooldir%\gawk '{print $3}'"') do set BD_RAM_start=%%i
-
-if defined %BD_RAM_start (
- echo define symbol __ICFEDIT_region_BD_RAM_start__ = %BD_RAM_start%; >> main.icf
- echo define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006CFFF; >> main.icf
-)
-
-exit
-
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs
deleted file mode 100644
index 5b9a721..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs
+++ /dev/null
@@ -1,15 +0,0 @@
-Option Explicit
-DIM fso
-
-Dim WshShell
-
-Set fso = CreateObject("Scripting.FileSystemObject")
-
-If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat")) Then
- MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat" , vbinformation
- WScript.Quit()
-End If
-
-Set WshShell = WScript.CreateObject("WScript.Shell")
-
-WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat"" """ & WScript.Arguments(0) & """""", 0, true
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.dap.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.dap.mac
deleted file mode 100644
index 613b841..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.dap.mac
+++ /dev/null
@@ -1,372 +0,0 @@
-//DRAM_INFO
-__var DeviceType;
-__var Page;
-__var Bank;
-__var DqWidth;
-
-//DRAM_MODE_REG_INFO
-__var BstLen;
-__var BstType;
-__var Mode0Cas;
-__var Mode0Wr;
-__var Mode1DllEnN;
-__var Mode1AllLat;
-__var Mode2Cwl;
-
-//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
-__var DramTimingTref;
-__var DramRowNum;
-__var Tck;
-
-//DRAM_TIMING_INFO
-__var TrfcPs;
-__var TrefiPs;
-__var WrMaxTck;
-__var TrcdPs;
-__var TrpPs;
-__var TrasPs;
-__var TrrdTck;
-__var TwrPs;
-__var TwtrTck;
-__var TmrdTck;
-__var TrtpTck;
-__var TccdTck;
-__var TrcPs;
-
-//DRAM_DEVICE_INFO
-__var DdrPeriodPs;
-__var DfiRate;
-
-__config_dram_param(){
- __var CsBstLen;
- __var CasWr;
- __var CasRd;
- __var CasRdT;
- __var ClrSrt;
- __var AddLat;
- __var DramEmr2;
- __var DramMr0;
- __var CrTwr;
- __var DramMaxWr;
- __var DramWr;
- __var CrTrtw;
- __var CrTrtwT;
- __var DramPeriod;
- __var DdrType;
- //__var paDqWidth;
- //__var paPage;
- //__var paDfiRate
-
- __var tmp;
-
- // Register dram common.mac
- //__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
- __load_dram_common();
-
- // Load parameter
- __load_dram_param();
-
- DfiRate = 1<> 1);
- if (((Mode0Cas) & 0x1) ) {
- CasRdT = CrlSrt+ 12;
- }else{
- CasRdT = CrlSrt+ 4;
- }
-
- AddLat = 0;
- if (Mode1AllLat == 1) { // CL-1
- AddLat = CasRd -1;
- }
- if (Mode1AllLat == 2){ // CL-2
- AddLat = CasRd -2;
- }
- CasRd = CasRdT + AddLat;
- CasWr = Mode2Cwl + 5 + AddLat;
- DramEmr2 = Mode2Cwl << 3;
-
- DramWr = (DramWr + 1) / 2;
- if (DramWr == 16) {
- DramWr = 0;
- }
- if (DramWr <= 9) { // 5< wr <= 9
- DramWr = DramWr - 4;
- }
- DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
- CrTrtwT = (CasRdT + 6) - CasWr;
- }
- if (DeviceType == 8){
- DdrType = 8;
- if (BstLen == 0) {
- DramMr0 = 2; // bst_4
- CsBstLen = 0; //bst_4
- CasRd = 0x2;
- } else {
- DramMr0 = 3; // bst_8
- CsBstLen = 1; // bst_8
- CasRd = 0x3;
- }
- CasWr = 0;
- DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
- CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
- }
-
- // countting tRTW
- if ((CrTrtwT & 0x1)) {
- CrTrtw = (CrTrtwT+1) /(DfiRate);
- } else {
- CrTrtw = CrTrtwT /(DfiRate);
- }
-
- DqWidth = DqWidth;
- Page = Page +1; // DQ16 -> memory:byte_unit *2
- if (DqWidth == 1) { // paralle dq_16 => Page + 1
- Page = Page +1;
- }
-
- // REG_SDR_MISC
- tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
- __writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
- // REG_SDR_DCR
- tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
- __writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
- // REG_SDR_IOCR
- tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
- __writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
- if(DeviceType != 8){
- tmp =DramEmr2;
- __writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
- tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
- __writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
- }
- tmp =DramMr0;
- __writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
- tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
- __writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
- tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
- __writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
- tmp =(CrTrtw << 20) |
- ((((TwtrTck)/DfiRate)+3) << 17) |
- ((((TccdTck)/DfiRate)+1) << 14) |
- ((((TrcdPs)/DramPeriod)+1) << 10) |
- ((((TrcPs)/DramPeriod)+1) << 4 ) |
- (((TrrdTck/DfiRate)+1) << 0);
- __writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
- tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
- __writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
- // Set Idle
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- // start init
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- // enter memory mode
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
-}
-
-__config_dram_param_fixed(){
- __var tmp;
- // Dram Attribute
- __writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
- __writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
- __writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
- __delay(3);
-
- // Enable
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- __delay(20);
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
- __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
- __delay(30);
-}
-
-__mem_test(){
- __var i;
- __var vaddr;
- __var tmp;
-
- i=0;
- while(i<10){
- vaddr = 0x30000000+((i*23)&0x1FFFFC);
- __writeMemory32(0x55AA55AA, vaddr, "Memory");
- tmp = __readMemory32(vaddr,"Memory");
- if(tmp!=0x55AA55AA)
- return 1;
- i=i+1;
- }
- return 0;
-}
-
-__var ok_pipe_id0;
-__var ok_pipe_id1;
-__var ok_tpc_min0;
-__var ok_tpc_max0;
-__var ok_tpc_min1;
-__var ok_tpc_max1;
-__var tpc0_cnt;
-__var tpc1_cnt;
-
-// calibration result
-__var isCalibrationDone;
-
-__dram_calibration(){
- __var rdp;
- __var tpc;
- __var rdp_reg;
- __var tpc_reg;
- __var err_cnt;
- __var ok_cnt;
-
-
- ok_cnt=0;
- ok_pipe_id0 = 15;
- ok_tpc_min0 = 12;
- ok_tpc_max0 = 0;
-
- rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
- tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
- for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
- err_cnt=0;
- // try pipe
- __writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
- for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
- // try tpc
- __writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
- if(__mem_test()==0){
- if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
- if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
- if(ok_tpc_max0tpc0_cnt){
- __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }else{
- __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }
-}
-
-__setup_system()
-{
- __var tmp;
-
- __hwReset(1);
-
- __writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
- __writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
- __writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
- __writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
- __writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
- __writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
- __writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
-
- __config_dram_param();
-
- if(isCalibrationDone){
- __var rdp_reg;
- __var tpc_reg;
- rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
- tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
- if(tpc1_cnt>tpc0_cnt){
- __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }else{
- __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }
- }else{
- // Calibration
- __dram_calibration();
- isCalibrationDone = 1;
- }
-}
-
-execUserPreload()
-{
- // Register dram common.mac
- __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
-
- __message "User Preload....";
- //isCalibrationDone = 0;
- __setup_system();
-}
-
-execUserSetup()
-{
- __var tmp;
- __message "User Setup....";
- // if use normal reset, please unmark those 2 lines
- //execUserPreload();
- __setup_system();
- //__loadImage("$TARGET_PATH$", 0, 0);
- // DISABLE DRAM init
- tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
\ No newline at end of file
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.mac b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.mac
deleted file mode 100644
index 45d228a..0000000
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/preload.mac
+++ /dev/null
@@ -1,392 +0,0 @@
-//DRAM_INFO
-__var DeviceType;
-__var Page;
-__var Bank;
-__var DqWidth;
-
-//DRAM_MODE_REG_INFO
-__var BstLen;
-__var BstType;
-__var Mode0Cas;
-__var Mode0Wr;
-__var Mode1DllEnN;
-__var Mode1AllLat;
-__var Mode2Cwl;
-
-//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
-__var DramTimingTref;
-__var DramRowNum;
-__var Tck;
-
-//DRAM_TIMING_INFO
-__var TrfcPs;
-__var TrefiPs;
-__var WrMaxTck;
-__var TrcdPs;
-__var TrpPs;
-__var TrasPs;
-__var TrrdTck;
-__var TwrPs;
-__var TwtrTck;
-__var TmrdTck;
-__var TrtpTck;
-__var TccdTck;
-__var TrcPs;
-
-//DRAM_DEVICE_INFO
-__var DdrPeriodPs;
-__var DfiRate;
-
-__config_dram_param(){
- __var CsBstLen;
- __var CasWr;
- __var CasRd;
- __var CasRdT;
- __var ClrSrt;
- __var AddLat;
- __var DramEmr2;
- __var DramMr0;
- __var CrTwr;
- __var DramMaxWr;
- __var DramWr;
- __var CrTrtw;
- __var CrTrtwT;
- __var DramPeriod;
- __var DdrType;
- //__var paDqWidth;
- //__var paPage;
- //__var paDfiRate
-
- __var tmp;
-
- // Load parameter
- __load_dram_param();
-
- DfiRate = 1<> 1);
- if (((Mode0Cas) & 0x1) ) {
- CasRdT = CrlSrt+ 12;
- }else{
- CasRdT = CrlSrt+ 4;
- }
-
- AddLat = 0;
- if (Mode1AllLat == 1) { // CL-1
- AddLat = CasRd -1;
- }
- if (Mode1AllLat == 2){ // CL-2
- AddLat = CasRd -2;
- }
- CasRd = CasRdT + AddLat;
- CasWr = Mode2Cwl + 5 + AddLat;
- DramEmr2 = Mode2Cwl << 3;
-
- DramWr = (DramWr + 1) / 2;
- if (DramWr == 16) {
- DramWr = 0;
- }
- if (DramWr <= 9) { // 5< wr <= 9
- DramWr = DramWr - 4;
- }
- DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
- CrTrtwT = (CasRdT + 6) - CasWr;
- }
- if (DeviceType == 8){
- DdrType = 8;
- if (BstLen == 0) {
- DramMr0 = 2; // bst_4
- CsBstLen = 0; //bst_4
- CasRd = 0x2;
- } else {
- DramMr0 = 3; // bst_8
- CsBstLen = 1; // bst_8
- CasRd = 0x3;
- }
- CasWr = 0;
- DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
- CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
- }
-
- // countting tRTW
- if ((CrTrtwT & 0x1)) {
- CrTrtw = (CrTrtwT+1) /(DfiRate);
- } else {
- CrTrtw = CrTrtwT /(DfiRate);
- }
-
- DqWidth = DqWidth;
- Page = Page +1; // DQ16 -> memory:byte_unit *2
- if (DqWidth == 1) { // paralle dq_16 => Page + 1
- Page = Page +1;
- }
-
- // REG_SDR_MISC
- tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
- __writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
- // REG_SDR_DCR
- tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
- __writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
- // REG_SDR_IOCR
- tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
- __writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
- if(DeviceType != 8){
- tmp =DramEmr2;
- __writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
- tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
- __writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
- }
- tmp =DramMr0;
- __writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
- tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
- __writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
- tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
- __writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
- tmp =(CrTrtw << 20) |
- ((((TwtrTck)/DfiRate)+3) << 17) |
- ((((TccdTck)/DfiRate)+1) << 14) |
- ((((TrcdPs)/DramPeriod)+1) << 10) |
- ((((TrcPs)/DramPeriod)+1) << 4 ) |
- (((TrrdTck/DfiRate)+1) << 0);
- __writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
- tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
- __writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
- // Set Idle
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- // start init
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- // enter memory mode
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
-}
-
-__config_dram_param_fixed(){
- __var tmp;
- // Dram Attribute
- __writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
- __writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
- __writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
- __delay(3);
- __writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
- __delay(3);
-
- // Enable
- __writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
- __delay(20);
- __writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
- __delay(100);
- tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
- __writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
- __delay(30);
-}
-
-__mem_test(){
- __var i;
- __var vaddr;
- __var tmp;
-
- i=0;
- while(i<10){
- vaddr = 0x30000000+((i*23)&0x1FFFFC);
- __writeMemory32(0x55AA55AA, vaddr, "Memory");
- tmp = __readMemory32(vaddr,"Memory");
- if(tmp!=0x55AA55AA)
- return 1;
- i=i+1;
- }
- return 0;
-}
-
-__var ok_pipe_id0;
-__var ok_pipe_id1;
-__var ok_tpc_min0;
-__var ok_tpc_max0;
-__var ok_tpc_min1;
-__var ok_tpc_max1;
-__var tpc0_cnt;
-__var tpc1_cnt;
-
-// calibration result
-__var isCalibrationDone;
-
-__dram_calibration(){
- __var rdp;
- __var tpc;
- __var rdp_reg;
- __var tpc_reg;
- __var err_cnt;
- __var ok_cnt;
-
-
- ok_cnt=0;
- ok_pipe_id0 = 15;
- ok_tpc_min0 = 12;
- ok_tpc_max0 = 0;
-
- rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
- tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
- for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
- err_cnt=0;
- // try pipe
- __writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
- for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
- // try tpc
- __writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
- if(__mem_test()==0){
- if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
- if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
- if(ok_tpc_max0tpc0_cnt){
- __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }else{
- __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }
-}
-
-__setup_system()
-{
- __var tmp;
-
- __hwReset(1);
-
- __writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
- __writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
- __writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
- __writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
- __writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
- __writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
- __writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
- __writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
-
- __config_dram_param();
-
- if(isCalibrationDone){
- __var rdp_reg;
- __var tpc_reg;
- rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
- tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
-
- if(tpc1_cnt>tpc0_cnt){
- __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }else{
- __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
- __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
- }
- }else{
- // Calibration
- __dram_calibration();
- isCalibrationDone = 1;
- }
-}
-
-execUserPreload()
-{
- // Register dram common.mac
- __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
- __load_dram_common();
- isCalibrationDone = 0;
-
- __message "User Preload....";
- if(__driverType("jlink")){
- __message "driver type J-LINK";
- }else if(__driverType("cmsisdap")){
- __message "driver type CMSIS-DAP";
- }else if(__driverType("cmsisdap")){
- __message "driver type I-JET";
- }
- __setup_system();
-}
-
-execUserSetup()
-{
- __var tmp;
- __message "User Setup....";
- // if use normal reset, please unmark those 2 lines
- //execUserPreload();
- __setup_system();
- if(__driverType("jlink")){
- __loadImage("$TARGET_PATH$ ", 0, 0);
- tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
- //tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
- }else if(__driverType("cmsisdap") || __driverType("ijet")){
- tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
- }else{
- __message "Not support drive type";
- }
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
-
-execUserReset()
-{
- __var tmp;
- __message "User Reset....";
- tmp = __readMemory32(0x40000210, "Memory")&(~(1<<27));
- tmp = tmp & (~(1<<21));
- __writeMemory32(tmp, 0x40000210, "Memory");
-}
diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h
index aa29652..5159939 100644
--- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h
+++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_bios_data.h
@@ -54,7 +54,7 @@ extern u32 ConfigDebugErr; // 10000314
/* ROM + hal_timer.h & .. */
extern HAL_TIMER_OP HalTimerOp; // 10000318
-extern u16 GPIOState[11]; // 10000334 // побитно 16 бит Ð´Ð»Ñ ÐºÐ°Ð¶Ð´Ð¾Ð³Ð¾ порта (A..K), бит=номер задейÑтвованного пина в порту на периферию.
+extern u16 GPIOState[11]; // 10000334 ïîáèòíî 16 áèò äëÿ êàæäîãî ïîðòà (A..K), áèò=íîìåð çàäåéñòâîâàííîãî ïèíà â ïîðòó íà ïåðèôåðèþ.
extern u32 gTimerRecord; // 1000034C
/* ROM + hal_ssi.h */
extern u32 SSI_DBG_CONFIG; // 10000350
diff --git a/build/bin/ota.bin b/build/bin/ota.bin
index fb596b3..1357378 100644
Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ
diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin
index e9c0ae5..770546e 100644
Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ
diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin
index 1e26e55..8c30ba8 100644
Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ
diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin
index 667e117..50d72b8 100644
Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ
diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin
index abddec1..f63b35e 100644
Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ
diff --git a/build/obj/build.nmap b/build/obj/build.nmap
index 7362fc9..3fc1214 100644
--- a/build/obj/build.nmap
+++ b/build/obj/build.nmap
@@ -871,1866 +871,1866 @@
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-10028d38 T update_IOT_info
-10028d96 T update_capinfo
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-1002a108 T rtw_xmit
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-1002a43e T rtw_alloc_xmitbuf
-1002a498 T rtw_free_xmitbuf
-1002a50a T rtw_alloc_xmitbuf_ext
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-1002a998 T rtl8195a_free_desc_ring
-1002a9b4 T rtl8195a_reset_desc_ring
-1002aa4a T InitLxDmaRtl8195a
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-1002ad08 T InterruptRecognized8195a
-1002ad98 T InitInterrupt8195a
-1002adb8 T EnableDMA8195a
-1002ade0 T EnableInterrupt8195a
-1002ae20 T DisableDMA8195a
-1002ae2c T DisableInterrupt8195a
-1002ae44 T UpdateInterruptMask8195a
-1002aea6 T CheckRxTgRtl8195a
-1002aee0 T rtl8192ee_check_rxdesc_remain
-1002af10 T rtl8195a_recv_tasklet
-1002b224 T rtl8195a_tx_int_handler
-1002b250 T InterruptHandle8195a
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-1002b4ec T lxbus_set_intf_ops
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-1002b5a8 t check_nic_enough_desc.isra.4
-1002b5f8 T rtl8195ab_init_xmit_priv
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-1002b60e T GetDmaTxbdIdx
-1002b62a T rtl8195a_enqueue_xmitbuf
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-1002b672 T SetTxbdForLxDMARtl8195ab
-1002b6f2 T UpdateTxbdHostIndex
-1002b730 T rtw_dump_xframe
-1002b902 T check_tx_desc_resource
-1002b93c T rtw_dequeue_xframe
-1002b9d0 T rtw_xmitframe_coalesce
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-1002bd7a T rtl8195ab_mgnt_xmit
-1002bdb6 T rtl8195ab_hal_xmit
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-1002bef4 t ResumeTxBeacon
-1002bf38 T UpdateHalRAMask8195A
-1002c0d0 T HalLittleWifiMCUThreadRtl8195a
-1002c124 T HalCheckInReqStateThreadRtl8195a
-1002c170 T HalTDMAChangeStateThreadRtl8195a
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-1002c474 t Hal_EfusePowerSwitch
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-1002c4a2 t StopTxBeacon
-1002c4ec T SetHalODMVar8195A
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-1002c60c T rtl8195a_stop_thread
-1002c630 t Hal_ReadEFuse
-1002c7a0 T GetHalODMVar8195A
-1002c7b4 t rtw_flash_map_update.part.12
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-1002c898 t Hal_EfusePgPacketWrite
-1002cb14 t Hal_EfuseGetCurrentSize
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-1002cdc2 T rtl8195a_InitBeaconParameters
-1002ce32 T _InitBurstPktLen_8195AB
-1002ce3c T rtl8195a_set_hal_ops
-1002cf1c T rtl8195a_init_default_value
-1002cf1e T rtl8195a_InitLLTTable
-1002cf68 T Hal_GetChnlGroup8195A
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-1002d090 T rtw_config_map_write
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-1002d1b2 T Hal_ReadPowerValueFromPROM_8195A
-1002d250 T Hal_EfuseParseTxPowerInfo_8195A
-1002d2e8 T Hal_EfuseParseEEPROMVer_8195A
-1002d2fe T Hal_EfuseParsePackageType_8195A
-1002d368 T Hal_EfuseParseChnlPlan_8195A
-1002d398 T Hal_EfuseParseCustomerID_8195A
-1002d3ae T Hal_EfuseParseXtal_8195A
-1002d3c6 T Hal_EfuseParseThermalMeter_8195A
-1002d3ee T Hal_ReadRFGainOffset
-1002d43e T BWMapping_8195A
-1002d45e T SCMapping_8195A
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-1002d756 T rtl8195a_fill_fake_txdesc
-1002d814 T SetHwReg8195A
-1002e4d4 T GetHwReg8195A
-1002e568 T SetHalDefVar8195A
-1002e648 T GetHalDefVar8195A
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-1002e698 T PHY_SetBBReg_8195A_Safe
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-1002e7e8 T PHY_MACConfig8195A
-1002e802 T PHY_BBConfig8195A
-1002e912 T PHY_RFConfig8195A
-1002e916 T PHY_SetTxPowerIndex_8195A
-1002ea20 T phy_TxPwrAdjInPercentage
-1002ea60 T PHY_GetTxPowerIndex_8195A
-1002eb50 T PHY_SetTxPowerLevel8195A
-1002eb56 T phy_SpurCalibration_8195A
-1002ee0e T phy_SetRegBW_8195A
-1002ee4c T phy_PostSetBwMode8195A
-1002efa8 T phy_SwChnl8195A
-1002f050 T phy_SwChnlAndSetBwMode8195A
-1002f0a0 T PHY_HandleSwChnlAndSetBW8195A
-1002f150 T PHY_SetBWMode8195A
-1002f172 T PHY_SwChnl8195A
-1002f18c T PHY_SetSwChnlBWMode8195A
-1002f1aa t HalTimerEnable
-1002f1bc T InitTDMATimer
-1002f1e4 T ChangeStateByTDMA
-1002f1f4 T GetMinRateInRRSR
-1002f228 T CheckInReqState
-1002f238 T InitCheckStateTimer
-1002f268 T InitGTimer1ms
-1002f2b4 T DeInitGTimer1ms
-1002f2fc T ChangeTransmiteRate
-1002f338 T PowerBitSetting
-1002f3b4 T ChkandChangePS
-1002f418 T IssueRsvdPagePacketSetting
-1002f48c T IssuePSPoll
-1002f4b8 T WaitTxStateMachineOk
-1002f50c T IssueNullData
-1002f59c T PsCloseRF
-1002f5d0 T PsOpenRF
-1002f600 T ChkTxQueueIsEmpty
-1002f618 T InitPS
-1002f688 T ConfigListenBeaconPeriod
-1002f6ac T PS_S2_Condition_Match
-1002f6e0 T PS_S4_Condition_Match
-1002f75c T PS_32K_Condition_Match
-1002f798 T PS_S2ToS3ToS0State
-1002f800 T PS_S2ToS0State
-1002f81c T PS_S3ToS2orS0State
-1002f84c T PS_S0ToS1ToS2State
-1002f8a8 T PS_S1ToS0orS2State
-1002f8d8 T PS_S2ToS4State
-1002f924 T PS_S0ToS6State
-1002f944 T PS_S6ToS0State
-1002f95c T CheckTSFIsStable
-1002f9ac T WaitHWStateReady
-1002f9bc T SysClkDown
-1002fa2c T SysClkUp
-1002fa78 T ResetPSParm
-1002faec T PS_S4ToS2State
-1002fb10 T SleepTo32K
-1002fb70 T Change_PS_State
-1002fd1c T Legacy_PS_Setting
-1002fd90 T PSModeSetting
-1002fe34 T ChangePSStateByRPWM
-1002fe78 T ChangeTDMAState
-1002ff98 T TDMAChangeStateTask
-1002ffc2 T EnterPS
-1002ffe4 T SetSmartPSTimer
-10030020 T GTimer7Handle
-1003007c T SmartPS2InitTimerAndToGetRxPkt
-100300b8 T PS_OnBeacon
-10030168 T PSBcnEarlyProcess
-10030224 T PSMtiBcnEarlyProcess
-100302d0 T PSRxBcnProcess
-10030420 T TxPktInPSOn
-1003045e T PsBcnToProcess
-10030518 T GTimer6Handle
-10030564 T RPWMProcess
-100305a0 T PSSetMode
-10030618 T SpeRPT
-10030738 T ISR_BcnEarly
-100307a4 T ISR_MtiBcnEarly
-100307d8 T ISR_RxBcn
-100307f4 T ISR_RxBCMD1
-10030824 T ISR_RxBCMD0
-10030878 T ISR_RxUCMD1
-100308b6 T ISR_RxUCMD0
-100308f2 T ISR_TxPktIn
-10030904 T ISR_TXCCX
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-10030a30 T CheckInReqStateTask
-10030a76 T HalGetNullTxRpt
-10030a94 T ISR_TBTT
-10030b0c T H2CHDL_BcnIgnoreEDCCA
-10030b1c T PMUInitial
-10030b6c T PMUTask
-10030c78 T PHY_RF6052SetBandwidth8195A
-10030cbc T PHY_RF6052_Config8195A
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-10030daa T rtl8195a_query_rx_desc_status
-10030e5a T rtl8195a_query_rx_phy_status
-10030fb2 T hal_com_get_channel_plan
-10030fe6 T HAL_IsLegalChannel
-10031004 T MRateToHwRate
-10031018 T HwRateToMRate
-1003102c T HalSetBrateCfg
-100310d8 T Hal_MappingOutPipe
-100310f4 T hal_init_macaddr
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-100313a8 T SetHwReg
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-100313f8 T rtw_bb_rf_gain_offset
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-100315d8 T PHY_StoreTxPowerByRateNew
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-100316a4 T PHY_GetTxPowerIndexBase
-10031744 T PHY_GetTxPowerTrackingOffset
-10031770 T PHY_GetRateIndexOfTxPowerByRate
-10031784 T PHY_GetTxPowerByRate
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-1003196c T PHY_TxPowerByRateConfiguration
-1003197e T PHY_SetTxPowerIndexByRateArray
-100319bc T PHY_SetTxPowerIndexByRateSection
-10031a20 T PHY_SetTxPowerLevelByPath
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-10031a82 T PHY_GetTxPowerLimit
-10031bac T PHY_ConvertTxPowerLimitToPowerIndex
-10031cfc T PHY_InitTxPowerLimit
-10031d44 T PHY_SetTxPowerLimit
-10031dc0 T PHY_GetTxPowerIndex
-10031dd0 T rtw_hal_chip_configure
-10031de6 T rtw_hal_read_chip_info
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-10031e12 T rtw_hal_def_value_init
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-10031e3e T rtw_hal_dm_init
-10031e54 T rtw_hal_dm_deinit
-10031e6a T rtw_hal_init
-10031e94 T rtw_hal_deinit
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-10031ebc T rtw_hal_get_hwreg
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-10031eee T rtw_hal_set_odm_var
-10031efc T rtw_hal_get_odm_var
-10031f0a T rtw_hal_enable_interrupt
-10031f2c T rtw_hal_disable_interrupt
-10031f4e T rtw_hal_inirp_init
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-10031fa4 T rtw_hal_init_xmit_priv
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-1003205e T rtw_hal_write_bbreg
-1003208a T rtw_hal_read_rfreg
-1003209c T rtw_hal_write_rfreg
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-100320d0 T rtw_hal_set_chan
-100320de T rtw_hal_set_chnl_bw
-100320f4 T rtw_hal_dm_watchdog
-1003210a T rtw_hal_macid_sleep
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-1003214a T decide_chip_type_by_device_id
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-100322b6 T rtw_os_indicate_connect
-100322ba T rtw_os_indicate_scan_done
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-100323fc T rtw_init_netdev
-1003254c T rtw_drv_if2_init
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-10032c10 T rtw_drv_halt
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-10032c6e t rtw_wx_get_autoreconnect
-10032c7c t rtw_forwarding_set
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-10032d20 t rtw_wx_set_pscan_freq
-10032da2 t rtw_wx_update_custome_ie
-10032e14 t rtw_set_tos_value
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-1003339e T indicate_wx_custom_event
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-10033422 T indicate_wx_scan_complete_event
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-1003349c T rtw_indicate_sta_disassoc
-100334f4 T rtw_indicate_wx_assoc_event
-10033526 T rtw_indicate_wx_disassoc_event
-10033556 T rtw_set_wpa_ie
-1003366c T strtopsk
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-10033724 T rtw_wx_set_ap_essid
-10033814 T mac_reg_dump
-100338c0 T bb_reg_dump
-1003391c T rf_reg_dump
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-100352e4 T rtw_os_recv_resource_alloc
-100352ee T rtw_os_recv_resource_free
-100352f0 T rtw_tkip_countermeasure
-10035390 T rtw_handle_tkip_mic_err
-10035438 T rtw_recv_indicatepkt
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-10035718 T init_skb_data_pool
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-10035870 T kfree_skb
-100358d8 T kfree_skb_chk_key
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-1003591e T dev_alloc_skb
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-1003593e T skb_set_tail_pointer
-10035946 T skb_pull
-1003595e T skb_copy
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-10035992 T _rtw_open_pktfile
-100359a4 T _rtw_pktfile_read
-100359d2 T rtw_set_tx_chksum_offload
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-100359e8 T rtw_os_xmit_complete
-100359fa T rtw_os_xmit_schedule
-10035a36 T rtw_xmit_entry
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-10035a98 T rtw_alloc_etherdev
-10035ac4 T rtw_free_netdev
-10035ae4 T timer_wrapper
-10035b38 T alloc_etherdev
-10035b94 T free_netdev
-10035bae T dev_alloc_name
-10035bb8 T init_timer_wrapper
-10035bd8 T deinit_timer_wrapper
-10035c24 T init_timer
-10035cdc T mod_timer
-10035dbc T cancel_timer_ex
-10035e04 T del_timer_sync
-10035e68 T rtw_init_timer
-10035e70 T rtw_set_timer
-10035e74 T rtw_cancel_timer
-10035e7e T rtw_del_timer
-10035e84 T rltk_get_idx_bydev
-10035e94 T rltk_wlan_init
-10035f1c T rltk_wlan_start
-10035f50 T rltk_wlan_check_isup
-10035f60 T rltk_wlan_tx_inc
-10035f74 T rltk_wlan_tx_dec
-10035f88 T rltk_wlan_get_recv_skb
-10035f98 T rltk_wlan_alloc_skb
-10035fd8 T rltk_wlan_send_skb
-1003600c T rltk_netif_rx
-100360b8 T rltk_wlan_control
-1003614c T rltk_wlan_running
-10036164 T rltk_wlan_handshake_done
-10036198 T rltk_wlan_is_connected_to_ap
-100361dc T Efuse_PowerSwitch
-100361e8 T Efuse_GetCurrentSize
-100361f4 T Efuse_CalculateWordCnts
-10036218 T EFUSE_GetEfuseDefinition
-1003622c T efuse_OneByteRead
-10036260 T efuse_OneByteWrite
-10036294 T Efuse_PgPacketWrite
-100362a8 T efuse_WordEnableDataRead
-100362da T Efuse_WordEnableDataWrite
-100362ee T efuse_GetCurrentSize
-10036316 T rtw_efuse_map_read
-10036378 T rtw_efuse_map_write
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+1004f870 D mlme_sta_tbl
+1004f8e0 d PMKID_KDE_TYPE.17744
+1004f8e8 V nr_xmitbuff
+1004f8ec V nr_xmitframe
+1004f8f0 d P802_1H_OUI
+1004f8f3 D rtw_adaptivity_mode
+1004f8f4 D g_user_ap_sta_num
+1004f8f8 d rtw_private_handler
+1004f93c V max_local_skb_num
+1004f940 V max_skb_buf_num
+1004f944 D rom_e_rtw_msgp_str_
+1004fb20 D ARFB_table
+1004fb5f D TRYING_NECESSARY_idx
+1004fb73 D DROPING_NECESSARY
+1004fb87 D PER_RATE_UP
+1004fb9b D PER_RATE_DOWN
+1004fbb0 V Array_MP_8195A_PHY_REG_PG
+1004fc40 D Array_MP_8195A_AGC_TAB
+1004fe50 D Array_MP_8195A_PHY_REG
+100504c8 D rtl8195A_card_disable_flow
+10050568 D rtl8195A_card_enable_flow
+10050608 D Array_MP_8195A_MAC_REG
+10050910 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_TFBGA96_8195A
+10050930 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_TFBGA96_8195A
+10050950 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN48_8195A
+1005096e D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN56_8195A
+1005098c D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN48_8195A
+100509aa D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN56_8195A
+100509c8 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_TFBGA96_8195A
+100509e8 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN56_8195A
+10050a06 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN48_8195A
+10050a24 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN56_8195A
+10050a44 D Array_MP_8195A_RadioA
+1005100c D gDeltaSwingTableXtal_MP_P_TxXtalTrack_8195A
+1005102a D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_TFBGA96_8195A
+1005104a D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN48_8195A
+10051068 D __ctype_ptr__
+1005106c d impure_data
+100510cc D _impure_ptr
+100510d0 D .ram.bss$$Base
+100510d0 D SpicInitParaAllClk
+100510d0 D __bss_start__
+100510d0 D __data_end__
+100510d0 D __ram_image2_text_end__
+10051160 d skbdata_list
+10051168 V skb_data_pool
+10054568 d ucIdleTaskHeap
+10054680 D HalI2SOpSAL
+100546bc D errno
+100546c0 D SYSAdapte
+100546c4 D PwrAdapter
+10054950 D p_write_reconnect_ptr
+10054954 d sampCntAdd
+10054958 d sampCnt
+1005495c D tskreader_enable
+10054960 D readBuf
+10054964 D tskmad_enable
+10054968 d bufUnderrunCt
+1005496c d oldRate
+10054970 d sampDelCnt
+10054974 d ap
+100549a8 D mp3_serv
+10054a2a d password
+10054a6c D pbuf_fifo
+10054a70 D pi2s
+10054a78 D libc_has_init
+10054a7c d rheap_end
+10054a80 D log_buf
+10054ae4 D __log_init_begin__
+10054ae8 D log_rx_interrupt_sema
+10054aec D __log_init_end__
+10054af0 D log_hash
+10054bf0 D eap_method
+10054bf1 D eap_phase
+10054bf4 D rtw_join_status
+10054bf8 d param.16189
+10054c10 d event_init.15914
+10054c14 d join_user_data
+10054c18 d event_callback_list
+10054d98 D paff_array
+10054e10 D lwip_init_done
+10054e14 D xnetif
+10054e8c d s_hostent_addr.6979
+10054e90 d s_phostent_addr.6980
+10054e98 D h_errno
+10054e9c d s_aliases.6978
+10054ea0 d s_hostent.6977
+10054eb4 d select_cb_list
+10054eb8 d sockets
+10054f78 d select_cb_ctr
+10054f7c d mbox
+10054f80 d tcpip_init_done_arg
+10054f84 d tcpip_init_done
+10054f88 d allsystems
+10054f8c d allrouters
+10054f90 d igmp_group_list
+10054f94 D current_header
+10054f98 d ip_id
+10054f9c D current_iphdr_src
+10054fa0 D current_iphdr_dest
+10054fa4 D current_netif
+10054fa8 d str.6324
+10054fb8 d reassdatagrams
+10054fbc d ip_reass_pbufcount
+10054fbe D dhcp_rx_options_given
+10054fc8 d xid.7384
+10054fcc D dhcp_rx_options_val
+10054ff4 d dns_seqno
+10054ff8 d dns_table
+10055458 d dns_servers
+10055460 d dns_payload_buffer
+10055664 d dns_pcb
+10055668 d dns_payload
+1005566c d tcpip_tcp_timer_active
+10055670 d next_timeout
+10055674 D netif_list
+10055678 D netif_default
+1005567c d netif_num
+1005567d D pbuf_free_ooseq_pending
+10055680 d raw_pcbs
+10055684 D tcp_active_pcbs_changed
+10055688 D tcp_ticks
+1005568c d tcp_timer
+10055690 D tcp_listen_pcbs
+10055694 D tcp_active_pcbs
+10055698 d tcp_timer_ctr
+1005569c D tcp_tw_pcbs
+100556a0 D tcp_tmp_pcb
+100556a4 D tcp_bound_pcbs
+100556a8 d seqno
+100556ac d tcplen
+100556b0 d ackno
+100556b4 d flags
+100556b5 d recv_flags
+100556b8 d tcphdr
+100556bc d recv_data
+100556c0 d inseg
+100556d4 D tcp_input_pcb
+100556d8 D udp_pcbs
+100556dc d etharp_cached_entry
+100556e0 d arp_table
+100557a8 D lwip_tickless_used
+100557ac d s_timeoutlist
+100557dc d s_nextthread
+100557e0 d dhcps_network_id
+100557e4 d dhcps_ip_table_semaphore
+100557e8 d bound_client_ethernet_address
+100557f8 d client_request_ip
+100557fc d dhcps_local_gateway
+10055800 d dhcps_send_broadcast_address
+10055804 d dhcp_message_repository
+10055808 d dhcp_message_total_options_lenth
+1005580c d dhcps_local_mask
+10055810 d dhcps_local_address
+10055814 d dhcp_client_ethernet_address
+10055824 d dhcps_netif
+10055828 d dhcps_addr_pool_set
+1005582c d dhcps_pcb
+10055830 d dhcps_subnet_broadcast
+10055834 d dhcps_addr_pool_start
+10055838 d dhcps_allocated_client_address
+1005583c d ip_table
+1005585c d dhcps_addr_pool_end
+10055860 D ext_upper
+10055864 d xFreeBytesRemaining
+10055868 d ext_free
+1005586c D ext_lower
+10055870 d pxEnd
+10055874 d xStart
+1005587c d xMinimumEverFreeBytesRemaining
+10055880 d xBlockAllocatedBit
+10055884 d ulTimerCountsForOneTick
+10055888 d ulStoppedTimerCompensation
+1005588c d xMaximumPossibleSuppressedTicks
+10055890 d xPendingReadyList
+100558a4 d uxTopReadyPriority
+100558a8 d uxTasksDeleted
+100558ac d xTickCount
+100558b0 d pxReadyTasksLists
+1005598c d pxOverflowDelayedTaskList
+10055990 d xTasksWaitingTermination
+100559a4 d pxDelayedTaskList
+100559a8 d xSchedulerRunning
+100559ac d ulTaskSwitchedInTime
+100559b0 D pxCurrentTCB
+100559b4 d uxPendedTicks
+100559b8 d xSuspendedTaskList
+100559cc d uxCurrentNumberOfTasks
+100559d0 d ulDeltaTotalRunTime
+100559d4 d xDelayedTaskList2
+100559e8 d xDelayedTaskList1
+100559fc d uxTaskNumber
+10055a00 d xYieldPending
+10055a04 d uxSchedulerSuspended
+10055a08 d xNumOfOverflows
+10055a0c d pxCurrentTimerList
+10055a10 d xActiveTimerList1
+10055a24 d xActiveTimerList2
+10055a38 d xLastTime.5284
+10055a3c d xTimerQueue
+10055a40 d pxOverflowTimerList
+10055a44 d xTimerTaskHandle
+10055a48 d device_mutex
+10055a54 d mutex_init
+10055a58 d uxSavedInterruptStatus
+10055a5c D min_free_heap_size
+10055a60 d g_heap_inited
+10055a64 d tcm_lock
+10055a68 D g_tcm_heap
+10055a6c D flashobj
+10055a78 D fspic_isinit
+10055a7c d last_acquire_wakelock_time
+10055afc D post_sleep_callback
+10055b7c D pre_sleep_callback
+10055bfc D reserve_pll
+10055c00 d sys_sleep_time
+10055c04 d hold_wakelock_time
+10055c84 D missing_tick
+10055c88 D Timer2To7HandlerData
+10055ca0 D auto_reconnect_running
+10055ca4 D p_wlan_autoreconnect_hdl
+10055ca8 D mac_monitor_callback
+10055cac D mf_list_head
+10055cb0 d pscan_retry_cnt.21430
+10055cb4 D promisc_callback_all
+10055cb8 D promisc_sema
+10055cbc D promisc_callback
+10055cc0 D psk_essid
+10055d08 D psk_passphrase
+10055d8a D psk_passphrase64
+10055dcb D wpa_global_PSK
+10055e1b d RFC1042_OUI
+10055e20 d rx_ring_pool
+10057f00 d stop_report_count.20629
+10057f01 D bCheckStateTIMER
+10057f04 d WifiMcuCmdBitMap.20974
+10057f08 D p_wlan_init_done_callback
+10057f0c D rtw_power_percentage_idx
+10057f10 D p_wlan_uart_adapter_callback
+10057f14 D rtw_adaptivity_en
+10057f18 D p_wlan_mgmt_filter
+10057f1c D rtw_initmac
+10057f20 D rtw_adaptivity_th_l2h_ini
+10057f24 d drvpriv
+10057f38 D skbbuf_used_num
+10057f3c V skb_pool
+100580f4 D skbdata_used_num
+100580f8 d wrapper_skbbuf_list
+10058100 D max_skbdata_used_num
+10058104 D max_skbbuf_used_num
+10058108 d skb_fail_count
+1005810c D timer_table
+10058114 D rltk_wlan_info
+10058144 d timer_used_num
+10058148 D max_timer_used_num
+1005814c D Noisy_State
+10058150 D pExportWlanIrqSemaphore
+10058154 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A
+10058174 D __malloc_sbrk_start
+10058178 D __malloc_free_list
+1005817c d heap_end.4167
+10058180 B __ram_heap2_start__
+10058180 D .ram.bss$$Limit
+10058180 D __bss_end__
10070000 A __ram_heap2_end__
1fff0000 D __ram_tcm_start__
1fff0000 D ram_heap
diff --git a/project/inc/platform_autoconf.h b/project/inc/platform_autoconf.h
index 0f31ebc..37cf009 100644
--- a/project/inc/platform_autoconf.h
+++ b/project/inc/platform_autoconf.h
@@ -1,8 +1,10 @@
/*
- * Automatically generated by make menuconfig: don't edit
+ *
*/
#define AUTOCONF_INCLUDED
+#define RTL8710AF
+//#define RTL8711AM
/*
* Target Platform Selection
*/
@@ -13,7 +15,6 @@
#undef CONFIG_FPGA
#undef CONFIG_RTL_SIM
#undef CONFIG_POST_SIM
-
/*
* < Mass Production Option
*/
@@ -21,13 +22,15 @@
#undef CONFIG_CP
#undef CONFIG_FT
#define RTL8195A 1
-#define CONFIG_CPU_CLK 1
-#define CONFIG_CPU_166_6MHZ 1 // RUN/IDLE/SLP ~63/21/6.4 mA
-//#define CONFIG_CPU_83_3MHZ 1 // RUN/IDLE/SLP ~55/15/6.4 mA
-//#define CONFIG_CPU_41_6MHZ 1 // RUN/IDLE ~51/11 mA
-//#define CONFIG_CPU_20_8MHZ 1 // RUN/IDLE ~49/9.5 mA
-//#define CONFIG_CPU_10_4MHZ 1
-//#define CONFIG_CPU_4MHZ 1 // IDLE ~8 mA
+/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
+ 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
+#define CONFIG_CPU_CLK 0
+//166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
+//83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA
+//41.6MHZ - RUN/IDLE ~51/11 mA
+//20.8MHZ - RUN/IDLE ~49/9.5 mA
+//4MHZ - IDLE ~8 mA
+#undef CONFIG_FPGA_CLK
#define CONFIG_SDR_CLK 1
#define CONFIG_SDR_100MHZ 1
#undef CONFIG_SDR_50MHZ
@@ -78,7 +81,7 @@
#else
#undef CONFIG_SDIO_DEVICE_EN
#endif
-//#define CONFIG_SDIO_HOST_EN 1
+#define CONFIG_SDIO_HOST_EN 1
//#define CONFIG_USB_EN 1
#undef CONFIG_USB_NORMAL
#define CONFIG_USB_TEST 1
@@ -124,6 +127,7 @@
#define CONFIG_CRYPTO_NORMAL 1
#undef CONFIG_CRYPTO_TEST
#define CONFIG_CRYPTO_MODULE 1
+#define CONFIG_CRYPTO_STARTUP 0
#define CONFIG_MII_EN 1
#define CONFIG_PWM_EN 1
#define CONFIG_PWM_NORMAL 1
@@ -133,7 +137,9 @@
#define CONFIG_EFUSE_NORMAL 1
#undef CONFIG_EFUSE_TEST
#define CONFIG_EFUSE_MODULE 1
-//#define CONFIG_SDR_EN 1
+#ifdef RTL8711AM
+#define CONFIG_SDR_EN 1
+#endif
#define CONFIG_SDR_NORMAL 1
#undef CONFIG_SDR_TEST
#define CONFIG_SDR_MODULE 1
@@ -191,7 +197,6 @@
//#undef CONFIG_DEBUG_WARN_MSG
//#undef CONFIG_DEBUG_INFO_MSG
#endif // CONFIG_DEBUG_LOG
-
/*
* < SDK Option Config
*/
@@ -225,26 +230,17 @@
#undef CONFIG_IMAGE_ALL
#define CONFIG_IMAGE_SEPARATE 1
-#if defined(CONFIG_CPU_166_6MHZ)
-#define CPU_CLOCK_SEL_VALUE 0
-#define PLATFORM_CLOCK (166666666) // (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
-#elif defined(CONFIG_CPU_83_3MHZ)
-#define CPU_CLOCK_SEL_VALUE 1
-#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
-#elif defined(CONFIG_CPU_41_6MHZ)
-#define CPU_CLOCK_SEL_VALUE 2
-#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
-#elif defined(CONFIG_CPU_20_8MHZ)
-#define CPU_CLOCK_SEL_VALUE 3
-#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
-#elif defined(CONFIG_CPU_10_4MHZ)
-#define CPU_CLOCK_SEL_VALUE 4
-#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
-#elif defined(CONFIG_CPU_4MHZ)
-#define CPU_CLOCK_SEL_VALUE 5
-#define PLATFORM_CLOCK (4000000)
+#if CONFIG_CPU_CLK < 6
+#define CPU_CLOCK_SEL_DIV5_3 0
+#define CPU_CLOCK_SEL_VALUE CONFIG_CPU_CLK
#else
-#define CONFIG_CPU_166_6MHZ 1
-#define CPU_CLOCK_SEL_VALUE (0)
-#define PLATFORM_CLOCK (((200000000*5)/3)>>(CPU_CLOCK_SEL_VALUE + 1))
+#define CPU_CLOCK_SEL_DIV5_3 1
+#define CPU_CLOCK_SEL_VALUE (CONFIG_CPU_CLK-6)
#endif
+
+#if CPU__CLK_DIV5_3
+#define PLATFORM_CLOCK (200000000ul>>CPU_CLOCK_SEL_VALUE)
+#else
+#define PLATFORM_CLOCK (((200000000ul*5ul)/3ul)>>CPU_CLOCK_SEL_VALUE)
+#endif
+
diff --git a/project/src/user/main.c b/project/src/user/main.c
index c92feca..82eabb1 100644
--- a/project/src/user/main.c
+++ b/project/src/user/main.c
@@ -121,7 +121,7 @@ static enum mad_flow input(struct mad_stream *stream) {
// We both silence the output as well as wait a while by pushing silent samples into the i2s system.
// This waits for about 200mS
#if DEBUG_MAIN_LEVEL > 1
- DBG_8195A("FIFO: Buffer Underrun\n");
+ // DBG_8195A("FIFO: Buffer Underrun\n");
#endif
for (n = 0; n < 441*2; n++) sampToOut(0);
} else {
@@ -491,33 +491,39 @@ void connect_start(void) {
*/
void main(void) {
-#if DEBUG_MAIN_LEVEL > 2
+#if DEBUG_MAIN_LEVEL > 3
ConfigDebugErr = -1;
- ConfigDebugInfo = -1;
+ ConfigDebugInfo = -1; //~_DBG_SPI_FLASH_;
ConfigDebugWarn = -1;
+ CfgSysDebugErr = -1;
+ CfgSysDebugInfo = -1;
+ CfgSysDebugWarn = -1;
#endif
-/*
- if ( rtl_cryptoEngine_init() != 0 ) DBG_8195A("crypto engine init failed\r\n");
-*/
-#if defined(CONFIG_CPU_CLK)
-#if 1 // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
- HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) & (~(1<<17)));
- HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
-#else // 0 - 200000000 Hz, 1 - 10000000 Hz, 2 - 50000000 Hz, 3 - 25000000 Hz, 4 - 12500000 Hz, 5 - 4000000 Hz
- HalCpuClkConfig(1);
- HAL_SYS_CTRL_WRITE32(REG_SYS_SYSPLL_CTRL1, HAL_SYS_CTRL_READ32(REG_SYS_SYSPLL_CTRL1) | (1<<17));
+ if(HalGetCpuClk() != PLATFORM_CLOCK) {
+#if CPU_CLOCK_SEL_DIV5_3
+ // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz
+ HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
+ *((int *)0x40000074) |= (1<<17); // REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3
+#else
+ // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
+ *((int *)0x40000074) &= ~(1<<17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
+ HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
#endif
HAL_LOG_UART_ADAPTER pUartAdapter;
- pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;
+ pUartAdapter.BaudRate = UART_BAUD_RATE_38400;
HalLogUartSetBaudRate(&pUartAdapter);
SystemCoreClockUpdate();
En32KCalibration();
+ }
+
+#if defined(CONFIG_CRYPTO_STARTUP) && (CONFIG_CRYPTO_STARTUP)
+ if ( rtl_cryptoEngine_init() != 0 ) {
+ DBG_8195A("crypto engine init failed\r\n");
+ }
#endif
-#if DEBUG_MAIN_LEVEL > 1
- DBG_INFO_MSG_ON(_DBG_TCM_HEAP_); // On Debug TCM MEM
-#endif
+
#if DEBUG_MAIN_LEVEL > 0
- vPortFree(pvPortMalloc(4)); // Init RAM heap
+ vPortFree(pvPortMalloc(4)); // Init RAM heap
fATST(NULL); // RAM/TCM/Heaps info
#endif
/* pre-processor of application example */