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fix & update

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This commit is contained in:
pvvx 2017-02-01 14:57:01 +03:00
parent 0557a41f1a
commit 741520fa66
58 changed files with 6620 additions and 6810 deletions
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34
RTL00_SDKV35a/component/common/api/at_cmd/atcmd_ethernet.c
View file

@ -76,10 +76,38 @@ void fATE1(void *arg)
printf("[ATE0]Usage to set wlan as default interface: ATE1=0\n"); printf("[ATE0]Usage to set wlan as default interface: ATE1=0\n");
} }
} }
/*
void fATTT(void *arg){
#if 1
ConfigDebugErr = -1;
ConfigDebugInfo = ~(_DBG_GDMA_ | _DBG_SPI_FLASH_);
ConfigDebugWarn = -1;
CfgSysDebugErr = -1;
CfgSysDebugInfo = -1;
CfgSysDebugWarn = -1;
#endif
printf("ethernet_init = %d\n", ethernet_mii_init()); // ethernet_init()); // HalMiiInit()); //HalMiiInitRtl8195a();
}
void fATT1(void *arg){
#if 1
ConfigDebugErr = -1;
ConfigDebugInfo = ~(_DBG_GDMA_ | _DBG_SPI_FLASH_);
ConfigDebugWarn = -1;
CfgSysDebugErr = -1;
CfgSysDebugInfo = -1;
CfgSysDebugWarn = -1;
#endif
printf("ethernet_write = %d\n", ethernet_write((const char *)0x1000, 1024));
printf("ethernet_send = %d\n", ethernet_send());
}
*/
log_item_t at_ethernet_items[ ] = { log_item_t at_ethernet_items[ ] = {
{"ATE0", fATE0,}, {"ATE0", fATE0},
{"ATE1", fATE1,} // {"ATTT", fATTT}, // Test !
// {"ATT1", fATT1}, // Test !
{"ATE1", fATE1}
}; };
void at_ethernet_init(void) void at_ethernet_init(void)
@ -89,4 +117,4 @@ void at_ethernet_init(void)
log_module_init(at_ethernet_init); log_module_init(at_ethernet_init);
#endif #endif

1060
RTL00_SDKV35a/component/common/api/at_cmd/atcmd_sys.c
View file

File diff suppressed because it is too large Load diff

106
RTL00_SDKV35a/component/common/api/at_cmd/atcmd_wifi.c
View file

@ -2593,57 +2593,6 @@ void print_wlan_help(void *arg){
} }
#endif // end of #if ATCMD_VER == ATVER_1 #endif // end of #if ATCMD_VER == ATVER_1
#endif // end of #if CONFIG_WLAN
#if CONFIG_LWIP_LAYER
#if ATCMD_VER == ATVER_1
void fATWL(void *arg){
#if CONFIG_SSL_CLIENT
int argc;
char *argv[MAX_ARGC] = {0};
printf("[ATWL]: _AT_WLAN_SSL_CLIENT_\n");
argv[0] = "ssl_client";
if(!arg){
printf("ATWL=SSL_SERVER_HOST\n");
return;
}
if((argc = parse_param(arg, argv)) > 1){
if(argc != 2) {
printf("ATWL=SSL_SERVER_HOST\n");
return;
}
cmd_ssl_client(argc, argv);
}
#else
printf("Please set CONFIG_SSL_CLIENT 1 in platform_opts.h to enable ATWL command\n");
#endif
}
void fATWI(void *arg){
int argc;
char *argv[MAX_ARGC] = {0};
printf("[ATWI]: _AT_WLAN_PING_TEST_\n");
if(!arg){
printf("[ATWI] Usage: ATWI=[host],[options]\n");
printf(" -t Ping the specified host until stopped\n");
printf(" -n # Number of echo requests to send (default 4 times)\n");
printf(" -l # Send buffer size (default 32 bytes)\n");
printf(" Example:\n");
printf(" ATWI=192.168.1.2,-n,100,-l,5000\n");
return;
}
argv[0] = "ping";
if((argc = parse_param(arg, argv)) > 1){
cmd_ping(argc, argv);
}
}
void fATWT(void *arg) void fATWT(void *arg)
{ {
#if CONFIG_BSD_TCP #if CONFIG_BSD_TCP
@ -2719,6 +2668,57 @@ void fATWU(void *arg)
printf("Please set CONFIG_BSD_TCP 1 in platform_opts.h to enable ATWU command\n"); printf("Please set CONFIG_BSD_TCP 1 in platform_opts.h to enable ATWU command\n");
#endif #endif
} }
#endif // end of #if CONFIG_WLAN
#if CONFIG_LWIP_LAYER
#if ATCMD_VER == ATVER_1
void fATWL(void *arg){
#if CONFIG_SSL_CLIENT
int argc;
char *argv[MAX_ARGC] = {0};
printf("[ATWL]: _AT_WLAN_SSL_CLIENT_\n");
argv[0] = "ssl_client";
if(!arg){
printf("ATWL=SSL_SERVER_HOST\n");
return;
}
if((argc = parse_param(arg, argv)) > 1){
if(argc != 2) {
printf("ATWL=SSL_SERVER_HOST\n");
return;
}
cmd_ssl_client(argc, argv);
}
#else
printf("Please set CONFIG_SSL_CLIENT 1 in platform_opts.h to enable ATWL command\n");
#endif
}
void fATWI(void *arg){
int argc;
char *argv[MAX_ARGC] = {0};
printf("[ATWI]: _AT_WLAN_PING_TEST_\n");
if(!arg){
printf("[ATWI] Usage: ATWI=[host],[options]\n");
printf(" -t Ping the specified host until stopped\n");
printf(" -n # Number of echo requests to send (default 4 times)\n");
printf(" -l # Send buffer size (default 32 bytes)\n");
printf(" Example:\n");
printf(" ATWI=192.168.1.2,-n,100,-l,5000\n");
return;
}
argv[0] = "ping";
if((argc = parse_param(arg, argv)) > 1){
cmd_ping(argc, argv);
}
}
#elif ATCMD_VER == ATVER_2 // uart at command #elif ATCMD_VER == ATVER_2 // uart at command
//move to atcmd_lwip.c //move to atcmd_lwip.c
#endif #endif
@ -2813,6 +2813,10 @@ log_item_t at_wifi_items[ ] = {
{"ATWL", fATWL,}, //p2p listen {"ATWL", fATWL,}, //p2p listen
{"ATWP", fATWP,}, //p2p peers {"ATWP", fATWP,}, //p2p peers
#endif #endif
#if CONFIG_LWIP_LAYER
{"ATWT", fATWT,},
{"ATWU", fATWU,},
#endif
#ifdef CONFIG_PROMISC #ifdef CONFIG_PROMISC
{"ATWM", fATWM,}, // WIFI promisc Usage: ATWM=DURATION_SECONDS[with_len] {"ATWM", fATWM,}, // WIFI promisc Usage: ATWM=DURATION_SECONDS[with_len]
#endif #endif

1
RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c
View file

@ -23,6 +23,7 @@
extern int inic_start(void); extern int inic_start(void);
extern int inic_stop(void); extern int inic_stop(void);
#endif #endif
#include "wlan_lib.h"
#if CONFIG_DEBUG_LOG > 0 #if CONFIG_DEBUG_LOG > 0
#undef printf #undef printf

2
RTL00_SDKV35a/component/common/api/wifi/wifi_conf.h
View file

@ -683,7 +683,7 @@ enum CUSTOM_IE_TYPE{
typedef struct _cus_ie{ typedef struct _cus_ie{
__u8 *ie; __u8 *ie;
__u8 type; __u8 type;
}cus_ie, *p_cus_ie; } cus_ie, *p_cus_ie;
#endif /* _CUS_IE_ */ #endif /* _CUS_IE_ */
int wifi_add_custom_ie(void *cus_ie, int ie_num); int wifi_add_custom_ie(void *cus_ie, int ie_num);

8
RTL00_SDKV35a/component/common/api/wifi/wifi_ind.c
View file

@ -86,6 +86,10 @@ static rtw_result_t rtw_indicate_event_handle(int event_cmd, char *buf, int buf_
return RTW_SUCCESS; return RTW_SUCCESS;
} }
#endif #endif
#if 0 // test beacon
#include "gpio_api.h" // mbed
extern gpio_t gpio_led;
#endif
void wifi_indication( WIFI_EVENT_INDICATE event, char *buf, int buf_len, int flags) void wifi_indication( WIFI_EVENT_INDICATE event, char *buf, int buf_len, int flags)
{ {
@ -194,6 +198,10 @@ void wifi_indication( WIFI_EVENT_INDICATE event, char *buf, int buf_len, int fla
#if(WIFI_INDICATE_MSG>1) #if(WIFI_INDICATE_MSG>1)
printf("%s(): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__); printf("%s(): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__);
#endif #endif
#if 0 // test beacon
gpio_write(&gpio_led, 1);
gpio_write(&gpio_led, 0);
#endif
break; break;
} }

10
RTL00_SDKV35a/component/common/drivers/ethernet_mii/ethernet_mii.c
View file

@ -160,11 +160,11 @@ void ethernet_demo(void* param){
printf("TRX pre setting done\n"); printf("TRX pre setting done\n");
ethernet_init(); ethernet_init();
#if 0
DBG_INFO_MSG_OFF(_DBG_MII_); DBG_INFO_MSG_OFF(_DBG_MII_);
DBG_WARN_MSG_OFF(_DBG_MII_); DBG_WARN_MSG_OFF(_DBG_MII_);
DBG_ERR_MSG_ON(_DBG_MII_); DBG_ERR_MSG_ON(_DBG_MII_);
#endif
/*get mac*/ /*get mac*/
ethernet_address(mac); ethernet_address(mac);
memcpy((void*)xnetif[NET_IF_NUM - 1].hwaddr,(void*)mac, 6); memcpy((void*)xnetif[NET_IF_NUM - 1].hwaddr,(void*)mac, 6);
@ -172,7 +172,7 @@ void ethernet_demo(void* param){
rtw_init_sema(&mii_rx_sema,0); rtw_init_sema(&mii_rx_sema,0);
rtw_mutex_init(&mii_tx_mutex); rtw_mutex_init(&mii_tx_mutex);
if(xTaskCreate(mii_rx_thread, ((const char*)"mii_rx_thread"), 1024, NULL, tskIDLE_PRIORITY+5, NULL) != pdPASS) if(xTaskCreate(mii_rx_thread, ((const char*)"mii_rx_th"), 1024, NULL, tskIDLE_PRIORITY+5, NULL) != pdPASS)
DBG_8195A("\n\r%s xTaskCreate(mii_rx_thread) failed", __FUNCTION__); DBG_8195A("\n\r%s xTaskCreate(mii_rx_thread) failed", __FUNCTION__);
DBG_8195A("\nEthernet_mii Init done, interface %d",NET_IF_NUM - 1); DBG_8195A("\nEthernet_mii Init done, interface %d",NET_IF_NUM - 1);
@ -191,11 +191,11 @@ void ethernet_mii_init()
ethernet_if_default = 1; ethernet_if_default = 1;
rtw_init_sema(&mii_linkup_sema,0); rtw_init_sema(&mii_linkup_sema,0);
if( xTaskCreate((TaskFunction_t)dhcp_start_mii, "DHCP_START_MII", 1024, NULL, 2, NULL) != pdPASS) { if( xTaskCreate((TaskFunction_t)dhcp_start_mii, "DHCP_MII", 1024, NULL, 2, NULL) != pdPASS) {
DBG_8195A("Cannot create demo task\n\r"); DBG_8195A("Cannot create demo task\n\r");
} }
if( xTaskCreate((TaskFunction_t)ethernet_demo, "ETHERNET DEMO", 1024, NULL, 2, NULL) != pdPASS) { if( xTaskCreate((TaskFunction_t)ethernet_demo, "ETH_DEMO", 1024, NULL, 2, NULL) != pdPASS) {
DBG_8195A("Cannot create demo task\n\r"); DBG_8195A("Cannot create demo task\n\r");
} }

4
RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sd.c
View file

@ -5,6 +5,7 @@
*/ */
#include "rtl8195a.h" #include "rtl8195a.h"
#ifdef CONFIG_SDIO_HOST_EN
#include "sd.h" #include "sd.h"
#include "sdio_host.h" #include "sdio_host.h"
@ -117,7 +118,7 @@ SD_RESULT SD_ReadBlocks(u32 sector, u8 *data, u32 count) {
u32 end_sector = count + sector; u32 end_sector = count + sector;
while (sector < end_sector) { while (sector < end_sector) {
rd_count = sdio_read_blocks(sector, buf, 1); rd_count = sdio_read_blocks(sector, buf, 1);
rtl_printf("rd_counts = %d\n", rd_count); // rtl_printf("rd_counts = %d\n", rd_count);
if (rd_count == 0 && RtlDownSemaWithTimeout(&sdWSema, 1000) != 1) { if (rd_count == 0 && RtlDownSemaWithTimeout(&sdWSema, 1000) != 1) {
DBG_SDIO_ERR("SD_ReadBlocks timeout\n"); DBG_SDIO_ERR("SD_ReadBlocks timeout\n");
return SD_ERROR; return SD_ERROR;
@ -172,3 +173,4 @@ SD_RESULT SD_WriteBlocks(u32 sector, const u8 *data, u32 count) {
return SD_ERROR; return SD_ERROR;
} }
#endif // CONFIG_SDIO_HOST_EN

12
RTL00_SDKV35a/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c
View file

@ -5,6 +5,7 @@
*/ */
#include "rtl8195a.h" #include "rtl8195a.h"
#ifdef CONFIG_SDIO_HOST_EN
#include "sd.h" #include "sd.h"
#include "sdio_host.h" #include "sdio_host.h"
#include "hal_sdio_host.h" #include "hal_sdio_host.h"
@ -45,13 +46,17 @@ void xfer_err_callback(void *param) {
} }
void card_insert_callback(void *param) { void card_insert_callback(void *param) {
#if CONFIG_DEBUG_LOG > 1
rtl_printf("SD card insert\n"); rtl_printf("SD card insert\n");
#endif
if (card_insert_irq_handler) if (card_insert_irq_handler)
card_insert_irq_handler((void *) card_insert_irq_data); card_insert_irq_handler((void *) card_insert_irq_data);
} }
void card_remove_callback(void *param) { void card_remove_callback(void *param) {
#if CONFIG_DEBUG_LOG > 1
rtl_printf("SD card removed\n"); rtl_printf("SD card removed\n");
#endif
sdio_status = SDIO_SD_NONE; sdio_status = SDIO_SD_NONE;
if (card_remove_irq_handler) if (card_remove_irq_handler)
card_remove_irq_handler((void *) card_remove_irq_data); card_remove_irq_handler((void *) card_remove_irq_data);
@ -208,7 +213,7 @@ s8 sdio_write_blocks(uint32_t sector, const uint8_t *buffer, uint32_t count) {
HAL_Status result = HalSdioHostOp.HalSdioHostWriteBlocksDma( HAL_Status result = HalSdioHostOp.HalSdioHostWriteBlocksDma(
&SdioHostAdapter, (unsigned long long) sector * SIZE_BLOCK_ADMA, &SdioHostAdapter, (unsigned long long) sector * SIZE_BLOCK_ADMA,
count); count);
if (result) { if (result != HAL_OK) {
DBG_SDIO_ERR("write fail(0x%02x)\n", result); DBG_SDIO_ERR("write fail(0x%02x)\n", result);
return -1; return -1;
} }
@ -230,7 +235,7 @@ s8 sdio_sd_init(void) {
} }
sdio_status = SDIO_SD_OK; sdio_status = SDIO_SD_OK;
if (HalSdioHostOp.HalSdioHostChangeSdClock(&SdioHostAdapter, if (HalSdioHostOp.HalSdioHostChangeSdClock(&SdioHostAdapter,
SD_CLK_41_6MHZ)) SD_CLK_41_6MHZ) != HAL_OK)
DBG_SDIO_INFO("SD card does not support high speed.\n"); DBG_SDIO_INFO("SD card does not support high speed.\n");
} }
return 0; return 0;
@ -239,7 +244,7 @@ s8 sdio_sd_init(void) {
//----- //-----
void sdio_sd_deinit() { void sdio_sd_deinit() {
if (sdio_status > SDIO_SD_NONE) if (sdio_status > SDIO_SD_NONE)
sdio_status = 1; sdio_status = SDIO_INIT_OK;
sdio_deinit_host(); // add pvvx (fix SD_DeInit()) sdio_deinit_host(); // add pvvx (fix SD_DeInit())
} }
@ -400,3 +405,4 @@ s8 sdio_sd_hook_xfer_err_cb(sdio_sd_irq_handler CallbackFun, void *param) {
return 0; return 0;
} }
#endif // CONFIG_SDIO_HOST_EN

13
RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/wifi_constants.h
View file

@ -326,7 +326,7 @@ typedef enum {
RTW_COUNTRY_MAX RTW_COUNTRY_MAX
}rtw_country_code_t; } rtw_country_code_t;
typedef enum { typedef enum {
RTW_ADAPTIVITY_DISABLE = 0, RTW_ADAPTIVITY_DISABLE = 0,
@ -341,14 +341,15 @@ typedef enum {
RTW_MODE_AP, RTW_MODE_AP,
RTW_MODE_STA_AP, RTW_MODE_STA_AP,
RTW_MODE_PROMISC, RTW_MODE_PROMISC,
RTW_MODE_P2P RTW_MODE_P2P,
}rtw_mode_t; RTW_MODE_MAX
} rtw_mode_t;
typedef enum { typedef enum {
RTW_SCAN_FULL = 0, RTW_SCAN_FULL = 0,
RTW_SCAN_SOCIAL, RTW_SCAN_SOCIAL,
RTW_SCAN_ONE RTW_SCAN_ONE
}rtw_scan_mode_t; } rtw_scan_mode_t;
typedef enum { typedef enum {
RTW_LINK_DISCONNECTED = 0, RTW_LINK_DISCONNECTED = 0,
@ -421,7 +422,7 @@ typedef enum{
RTW_WRONG_PASSWORD = 3 , RTW_WRONG_PASSWORD = 3 ,
RTW_DHCP_FAIL = 4, RTW_DHCP_FAIL = 4,
RTW_UNKNOWN, RTW_UNKNOWN,
}rtw_connect_error_flag_t; } rtw_connect_error_flag_t;
typedef enum { typedef enum {
RTW_TX_PWR_PERCENTAGE_100 = 0, /* 100%, default target output power. */ RTW_TX_PWR_PERCENTAGE_100 = 0, /* 100%, default target output power. */
@ -429,7 +430,7 @@ typedef enum {
RTW_TX_PWR_PERCENTAGE_50 = 2, /* 50% */ RTW_TX_PWR_PERCENTAGE_50 = 2, /* 50% */
RTW_TX_PWR_PERCENTAGE_25 = 3, /* 25% */ RTW_TX_PWR_PERCENTAGE_25 = 3, /* 25% */
RTW_TX_PWR_PERCENTAGE_12_5 = 4, /* 12.5% */ RTW_TX_PWR_PERCENTAGE_12_5 = 4, /* 12.5% */
}rtw_tx_pwr_percentage_t; } rtw_tx_pwr_percentage_t;
typedef enum _WIFI_EVENT_INDICATE{ typedef enum _WIFI_EVENT_INDICATE{
WIFI_EVENT_CONNECT = 0, WIFI_EVENT_CONNECT = 0,

5894
RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/wifi_lib.h
View file

File diff suppressed because it is too large Load diff

2
RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/wifi_structures.h
View file

@ -80,7 +80,7 @@ typedef struct rtw_wifi_setting {
rtw_security_t security_type; rtw_security_t security_type;
unsigned char password[65]; unsigned char password[65];
unsigned char key_idx; unsigned char key_idx;
}rtw_wifi_setting_t; } rtw_wifi_setting_t;
#if defined(__IAR_SYSTEMS_ICC__) #if defined(__IAR_SYSTEMS_ICC__)
#pragma pack() #pragma pack()
#endif #endif

26
RTL00_SDKV35a/component/common/drivers/wlan/realtek/include/wlan_lib.h
View file

@ -38,19 +38,19 @@ extern int rtw_wx_set_freq(struct net_device *dev, struct iw_request_info *info,
extern int rtw_ex_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra); extern int rtw_ex_set(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wdata, char *extra);
extern void wireless_send_event(struct net_device *dev, unsigned int cmd, union iwreq_data *wrqu, char *extra); extern void wireless_send_event(struct net_device *dev, unsigned int cmd, union iwreq_data *wrqu, char *extra);
extern void indicate_wx_custom_event(_adapter *padapter, char *msg); extern void indicate_wx_custom_event(_adapter *padapter, char *msg);
extern void indicate_wx_scan_result_present(__int64 padapter, __int64 a2); extern void indicate_wx_scan_result_present(uint64_t padapter, uint64_t a2);
extern void indicate_wx_scan_complete_event(__int64 padapter, __int64 a2); extern void indicate_wx_scan_complete_event(uint64_t padapter, uint64_t a2);
extern void rtw_indicate_sta_assoc(__int64 padapter, __int64 buf); extern void rtw_indicate_sta_assoc(uint64_t padapter, uint64_t buf);
extern void rtw_indicate_sta_disassoc(_adapter *padapter, uint8_t *addr); extern void rtw_indicate_sta_disassoc(_adapter *padapter, uint8_t *addr);
extern void rtw_indicate_wx_assoc_event(__int64 padapter, __int64 a2); extern void rtw_indicate_wx_assoc_event(uint64_t padapter, uint64_t a2);
extern void rtw_indicate_wx_disassoc_event(__int64 padapter, __int64 a2); extern void rtw_indicate_wx_disassoc_event(uint64_t padapter, uint64_t a2);
extern int rtw_set_wpa_ie(_adapter *padapter, char *pie, int ielen); extern int rtw_set_wpa_ie(_adapter *padapter, char *pie, int ielen);
extern void strtopsk(uint8_t *des, uint8_t *src, int len); extern void strtopsk(uint8_t *des, uint8_t *src, int len);
extern int rtw_wx_get_passphrase(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra); extern int rtw_wx_get_passphrase(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra);
extern int rtw_wx_set_ap_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra); extern int rtw_wx_set_ap_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra);
extern void mac_reg_dump(_adapter *padapter); extern void mac_reg_dump(_adapter *padapter);
extern void bb_reg_dump(_adapter *padapter); extern void bb_reg_dump(_adapter *padapter);
extern void rf_reg_dump(_adapter *padapter, int a2, int a3); extern void rf_reg_dump(_adapter *padapter); // , int a2, int a3);
extern int rtw_dbg_port(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra); extern int rtw_dbg_port(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
extern int rtw_get_auto_channel(struct net_device *dev, u8 *channel_set, int channel_num); extern int rtw_get_auto_channel(struct net_device *dev, u8 *channel_set, int channel_num);
extern int rtw_set_sta_num(int ap_sta_num); extern int rtw_set_sta_num(int ap_sta_num);
@ -277,7 +277,7 @@ extern int max_timer_used_num;
//-------------------------------- //--------------------------------
// rtl8195a_cmd.o // rtl8195a_cmd.o
// Function declarations // Function declarations
extern int32_t FillH2CCmd8195A(PADAPTER padapter, int ElementID, __int64 CmdLen); extern int32_t FillH2CCmd8195A(PADAPTER padapter, int ElementID, uint64_t CmdLen);
extern void rtl8195a_set_FwRsvdPage_cmd(PADAPTER padapter, PH2CParam_RsvdPage pRsvdPage); extern void rtl8195a_set_FwRsvdPage_cmd(PADAPTER padapter, PH2CParam_RsvdPage pRsvdPage);
extern void rtl8195a_set_FwMediaStatusRpt_cmd(PADAPTER padapter, int mstatus, int macid); extern void rtl8195a_set_FwMediaStatusRpt_cmd(PADAPTER padapter, int mstatus, int macid);
extern void rtl8195a_set_FwMacIdConfig_cmd(_adapter *padapter, int mac_id, int raid, int bw, uint8_t sgi, uint32_t mask); extern void rtl8195a_set_FwMacIdConfig_cmd(_adapter *padapter, int mac_id, int raid, int bw, uint8_t sgi, uint32_t mask);
@ -1082,12 +1082,12 @@ extern signed int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame);
extern void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, int blnbc); extern void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, int blnbc);
extern void issue_auth(_adapter *padapter, struct sta_info *psta, int status); extern void issue_auth(_adapter *padapter, struct sta_info *psta, int status);
extern signed int OnAuth(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnAuth(_adapter *padapter, union recv_frame *precv_frame);
extern void issue_asocrsp(_adapter *padapter, unsigned __int16 status, struct sta_info *pstat, int pkt_type); extern void issue_asocrsp(_adapter *padapter, uint16_t status, struct sta_info *pstat, int pkt_type);
extern void issue_assocreq(_adapter *padapter); extern void issue_assocreq(_adapter *padapter);
extern void issue_nulldata(_adapter *padapter, unsigned int power_mode); extern void issue_nulldata(_adapter *padapter, unsigned int power_mode);
extern void issue_qos_nulldata(_adapter *padapter, u8 *da, uint16_t tid); extern void issue_qos_nulldata(_adapter *padapter, u8 *da, uint16_t tid);
extern void issue_deauth(_adapter *padapter, u8 *da, uint32_t reason); extern void issue_deauth(_adapter *padapter, u8 *da, uint32_t reason);
extern void issue_action_BA(_adapter *padapter, u8 *raddr, u8 action, unsigned __int16 status); extern void issue_action_BA(_adapter *padapter, u8 *raddr, u8 action, uint16_t status);
extern signed int OnAction_back(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnAction_back(_adapter *padapter, union recv_frame *precv_frame);
extern signed int send_beacon(_adapter *padapter); extern signed int send_beacon(_adapter *padapter);
extern signed int collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid); extern signed int collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid);
@ -1101,8 +1101,8 @@ extern signed int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame);
extern void report_surveydone_event(_adapter *padapter); extern void report_surveydone_event(_adapter *padapter);
extern void report_join_res(_adapter *padapter, int res); extern void report_join_res(_adapter *padapter, int res);
extern signed int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame);
extern void report_del_sta_event(_adapter *padapter, u8 *MacAddr, unsigned __int16 reason); extern void report_del_sta_event(_adapter *padapter, u8 *MacAddr, uint16_t reason);
extern signed int receive_disconnect(_adapter *padapter, u8 *MacAddr, unsigned __int16 reason); extern signed int receive_disconnect(_adapter *padapter, u8 *MacAddr, uint16_t reason);
extern signed int OnBeacon(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnBeacon(_adapter *padapter, union recv_frame *precv_frame);
extern signed int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame);
extern signed int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame); extern signed int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame);
@ -1240,7 +1240,7 @@ extern void (*promisc_callback)(u8 *, unsigned int, void *);
//-------------------------------- //--------------------------------
// rtw_psk.o // rtw_psk.o
// Function declarations // Function declarations
extern void SetEAPOL_KEYIV(OCTET_STRING ocDst, __int64 a2, OCTET32_INTEGER oc32Counter); extern void SetEAPOL_KEYIV(OCTET_STRING ocDst, uint64_t a2, OCTET32_INTEGER oc32Counter);
extern void ToDrv_SetPTK(_adapter *padapter, struct sta_info *psta); extern void ToDrv_SetPTK(_adapter *padapter, struct sta_info *psta);
extern void Message_ReplayCounter_OC2LI(int a1, LARGE_INTEGER *li); extern void Message_ReplayCounter_OC2LI(int a1, LARGE_INTEGER *li);
extern int Message_SmallerEqualReplayCounter(LARGE_INTEGER li1, int a2); extern int Message_SmallerEqualReplayCounter(LARGE_INTEGER li1, int a2);
@ -1402,7 +1402,7 @@ extern void rtw_txframes_update_attrib_vcs_info(_adapter *padapter, struct xmit_
extern int rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); extern int rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
extern int32_t rtw_put_snap(uint8_t *data, int h_proto); extern int32_t rtw_put_snap(uint8_t *data, int h_proto);
extern void rtw_update_protection(_adapter *padapter, uint8_t *ie, unsigned int ie_len); extern void rtw_update_protection(_adapter *padapter, uint8_t *ie, unsigned int ie_len);
extern void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, __int64 sz); extern void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, uint64_t sz);
extern int32_t rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf, int a3); extern int32_t rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf, int a3);
extern struct list_head *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, _irqL a2); extern struct list_head *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, _irqL a2);
extern int32_t rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); extern int32_t rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);

2
RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/freertos/wrapper.h
View file

@ -412,7 +412,7 @@ typedef struct {
unsigned char mac[6]; unsigned char mac[6];
} Rltk_wlan_t; } Rltk_wlan_t;
#define netdev_priv(dev) dev->priv #define netdev_priv(dev) dev->priv
extern struct net_device *alloc_etherdev(int sizeof_priv); extern struct net_device *alloc_etherdev(int sizeof_priv);
void free_netdev(struct net_device *dev); void free_netdev(struct net_device *dev);

2
RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/wireless.h
View file

@ -412,7 +412,7 @@ typedef long long __i64;
#define IWEVTXDROP 0x8C00 /* Packet dropped to excessive retry */ #define IWEVTXDROP 0x8C00 /* Packet dropped to excessive retry */
#define IWEVQUAL 0x8C01 /* Quality part of statistics (scan) */ #define IWEVQUAL 0x8C01 /* Quality part of statistics (scan) */
#define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */ #define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */
#define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */ #define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */
#define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */ #define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */
#define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..) #define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..)
* (scan results); This includes id and * (scan results); This includes id and

4
RTL00_SDKV35a/component/common/drivers/wlan/realtek/src/osdep/wlan_intf.h
View file

@ -37,6 +37,9 @@ struct sk_buff {
*/ */
/************************************************************/ /************************************************************/
// #include "wrapper.h"
extern struct net_device *rltk_wlan_info;
//----- ------------------------------------------------------------------ //----- ------------------------------------------------------------------
// Wlan Interface opened for upper layer // Wlan Interface opened for upper layer
//----- ------------------------------------------------------------------ //----- ------------------------------------------------------------------
@ -55,7 +58,6 @@ int rltk_wlan_set_wps_phase(unsigned char is_trigger_wps);
int rtw_ps_enable(int enable); int rtw_ps_enable(int enable);
int rltk_wlan_is_connected_to_ap(void); int rltk_wlan_is_connected_to_ap(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

5
RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.c
View file

@ -301,6 +301,11 @@ void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
void uart_at_rx_wakeup() void uart_at_rx_wakeup()
{ {
gpio_irq_t gpio_rx_wake; gpio_irq_t gpio_rx_wake;
#ifdef RTL8711AM
#if (UART_AT_RX_WAKE!=PA_0)||(UART_AT_RX_WAKE!=PE_3)
#error "Set pin rx_wakeup!"
#endif
#endif
gpio_irq_init(&gpio_rx_wake, UART_AT_RX_WAKE, gpio_uart_at_rx_irq_callback, 0); gpio_irq_init(&gpio_rx_wake, UART_AT_RX_WAKE, gpio_uart_at_rx_irq_callback, 0);
gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_rx_wake); gpio_irq_enable(&gpio_rx_wake);

25
RTL00_SDKV35a/component/common/example/uart_atcmd/example_uart_atcmd.h
View file

@ -13,27 +13,34 @@
#include "osdep_api.h" #include "osdep_api.h"
#if 0// defined(RTL8710AF) #if defined(RTL8710AF)
// RTL8710AF // RTL8710AF
#define UART_TX PA_4 // PC_3 #define UART_TX PA_4 // PC_3
#define UART_RX PA_0 // PC_0 #define UART_RX PA_0 // PC_0
#define UART_RTS PA_2 // PC_2 #define UART_RTS PA_2 // PC_2
#define UART_CTS PA_1 // PC_1 #define UART_CTS PA_1 // PC_1
#elif defined(RTL8711AM) #elif 0 // defined(RTL8711AM)
// RTL8711AM // RTL8711AM
#define UART_TX PA_7 #define UART_TX PA_7
#define UART_RX PA_6 #define UART_RX PA_6 // no Interrupt!
#define UART_RTS PA_3 #define UART_RTS PA_3
#define UART_CTS PA_5 #define UART_CTS PA_5
#else #elif 0 // else
// RTL8711AM + RTL8710AF // RTL8711AM + RTL8710AF
#define UART_TX PC_3 #define UART_TX PC_3
#define UART_RX PC_0 #define UART_RX PC_0 // no Interrupt!
#define UART_RTS PC_2 #define UART_RTS PC_2
#define UART_CTS PC_1 #define UART_CTS PC_1
#elif defined(RTL8711AM)
// RTL8711AM + RTL8710AF
#define UART_TX PE_0
#define UART_RX PE_3
#define UART_RTS PE_1
#define UART_CTS PE_2
#endif #endif
#define KEY_ENTER 0xd #define KEY_ENTER 0xd

1
RTL00_SDKV35a/component/common/file_system/fatfs/disk_if/src/sdcard.c
View file

@ -55,7 +55,6 @@ DRESULT SD_disk_read(BYTE *buff, DWORD sector, UINT count){
#if _USE_WRITE == 1 #if _USE_WRITE == 1
DRESULT SD_disk_write(const BYTE *buff, DWORD sector, UINT count){ DRESULT SD_disk_write(const BYTE *buff, DWORD sector, UINT count){
SD_RESULT res; SD_RESULT res;
res = SD_WriteBlocks(sector, buff, count); res = SD_WriteBlocks(sector, buff, count);
return interpret_sd_result(res); return interpret_sd_result(res);

4
RTL00_SDKV35a/component/common/file_system/fatfs/r0.10c/include/ffconf.h
View file

@ -45,7 +45,7 @@
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ /* To enable fast seek feature, set _USE_FASTSEEK to 1. */
#define _USE_LABEL 0 /* 0:Disable or 1:Enable */ #define _USE_LABEL 1 /* 0:Disable or 1:Enable */
/* To enable volume label functions, set _USE_LAVEL to 1 */ /* To enable volume label functions, set _USE_LAVEL to 1 */
@ -57,7 +57,7 @@
/ Locale and Namespace Configurations / Locale and Namespace Configurations
/---------------------------------------------------------------------------*/ /---------------------------------------------------------------------------*/
#define _CODE_PAGE 437 #define _CODE_PAGE 866 // 437
/* The _CODE_PAGE specifies the OEM code page to be used on the target system. /* The _CODE_PAGE specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure. / Incorrect setting of the code page can cause a file open failure.
/ /

6
RTL00_SDKV35a/component/common/file_system/fatfs/r0.10c/src/ff.c
View file

@ -2568,7 +2568,6 @@ FRESULT f_read (
UINT rcnt, cc; UINT rcnt, cc;
BYTE csect, *rbuff = (BYTE*)buff; BYTE csect, *rbuff = (BYTE*)buff;
*br = 0; /* Clear read byte counter */ *br = 0; /* Clear read byte counter */
res = validate(fp); /* Check validity */ res = validate(fp); /* Check validity */
@ -2670,9 +2669,10 @@ FRESULT f_write (
const BYTE *wbuff = (const BYTE*)buff; const BYTE *wbuff = (const BYTE*)buff;
BYTE csect; BYTE csect;
*bw = 0; /* Clear write byte counter */ *bw = 0; /* Clear write byte counter */
// rtl_printf("f_write(%p, %p, %d) = %d\n", fp, buff, btw);
res = validate(fp); /* Check validity */ res = validate(fp); /* Check validity */
if (res != FR_OK) LEAVE_FF(fp->fs, res); if (res != FR_OK) LEAVE_FF(fp->fs, res);
if (fp->err) /* Check error */ if (fp->err) /* Check error */
@ -2773,8 +2773,6 @@ FRESULT f_write (
} }
/*-----------------------------------------------------------------------*/ /*-----------------------------------------------------------------------*/
/* Synchronize the File */ /* Synchronize the File */
/*-----------------------------------------------------------------------*/ /*-----------------------------------------------------------------------*/

26
RTL00_SDKV35a/component/os/freertos/freertos_pmu.c
View file

@ -75,8 +75,6 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
uint32_t tick_after_sleep; uint32_t tick_after_sleep;
uint32_t tick_passed; uint32_t tick_passed;
uint32_t backup_systick_reg; uint32_t backup_systick_reg;
unsigned char IsDramOn = 1;
unsigned char suspend_sdram = 1;
#if (configGENERATE_RUN_TIME_STATS == 1) #if (configGENERATE_RUN_TIME_STATS == 1)
uint32_t kernel_tick_before_sleep; uint32_t kernel_tick_before_sleep;
@ -101,20 +99,6 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
// Store gtimer timestamp before sleep // Store gtimer timestamp before sleep
tick_before_sleep = us_ticker_read(); tick_before_sleep = us_ticker_read();
if ( sys_is_sdram_power_on() == 0 ) {
IsDramOn = 0;
}
if (IsDramOn) {
#if defined(FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM) && (FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM==0)
// sdram is turned on, and we don't want suspend sdram
suspend_sdram = 0;
#endif
} else {
// sdram didn't turned on, we should not suspend it
suspend_sdram = 0;
}
#if (FREERTOS_PMU_DISABLE_LOGUART_IN_TICKLESS) #if (FREERTOS_PMU_DISABLE_LOGUART_IN_TICKLESS)
// config gpio on log uart tx for pull ctrl // config gpio on log uart tx for pull ctrl
HAL_GPIO_PIN gpio_log_uart_tx; HAL_GPIO_PIN gpio_log_uart_tx;
@ -129,8 +113,16 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
backup_systick_reg = portNVIC_SYSTICK_CURRENT_VALUE_REG; backup_systick_reg = portNVIC_SYSTICK_CURRENT_VALUE_REG;
#ifdef CONFIG_SDR_EN
// sleep // sleep
sleep_ex_selective(wakeup_event, stime, reserve_pll, suspend_sdram); #if defined(FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM) && (FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM!=0)
sleep_ex_selective(wakeup_event, stime, reserve_pll, IsSdrPowerOn());
#else
sleep_ex_selective(wakeup_event, stime, reserve_pll, 0);
#endif
#else
sleep_ex_selective(wakeup_event, stime, reserve_pll, 0);
#endif // CONFIG_SDR_EN
portNVIC_SYSTICK_CURRENT_VALUE_REG = backup_systick_reg; portNVIC_SYSTICK_CURRENT_VALUE_REG = backup_systick_reg;

2
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/core_cmFunc.h
View file

@ -309,7 +309,7 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */ /* IAR iccarm specific functions */
#include <cmsis_iar.h> // #include <cmsis_iar.h>
#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/

2
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/core_cmInstr.h
View file

@ -295,7 +295,7 @@ __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(in
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */ /* IAR iccarm specific functions */
#include <cmsis_iar.h> // #include <cmsis_iar.h>
#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/

6
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h
View file

@ -21,14 +21,14 @@
#define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2) #define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2)
#define sscanf(src, format...) //TODO #define sscanf(src, format...) //TODO
#define strtok(str, delim) prvStrTok(str, delim) #define strtok(str, delim) prvStrTok(str, delim)
#define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src) #define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src)
#define atoi(str) prvAtoi(str) #define atoi(str) prvAtoi(str)
#define strstr(str1, str2) prvStrStr(str1, str2) #define strstr(str1, str2) prvStrStr(str1, str2)
// //
// standard i/o // standard i/o
// //
#define snprintf DiagSnPrintf #define snprintf DiagSnPrintf
#define sprintf prvDiagSPrintf #define sprintf prvDiagSPrintf
#define printf prvDiagPrintf #define printf prvDiagPrintf

3
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/strproc.h
View file

@ -79,7 +79,7 @@ extern _LONG_CALL_ROM_ const char * prvStrStr(
IN const char * str2 IN const char * str2
); );
#ifndef __GNUC__
/* /*
* Fast implementation of tolower() for internal usage. Do not use in your * Fast implementation of tolower() for internal usage. Do not use in your
* code. * code.
@ -88,6 +88,7 @@ static inline char _tolower(const char c)
{ {
return c | 0x20; return c | 0x20;
} }
#endif
/* Fast check for octal digit */ /* Fast check for octal digit */
static inline int isodigit(const char c) static inline int isodigit(const char c)

2
RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/system_8195a.c
View file

@ -49,7 +49,7 @@
#define __SYSTEM_CLOCK (200000000UL/6*5) // PLATFORM_CLOCK // #define __SYSTEM_CLOCK (200000000UL/6*5) // PLATFORM_CLOCK //
extern unsigned int rand_x; extern unsigned int rand_x;
extern u32 HalGetCpuClk(VOID); //extern u32 HalGetCpuClk(VOID);
#ifdef CONFIG_CHIP_A_CUT #ifdef CONFIG_CHIP_A_CUT
const u32 SysCpkClkTbl[]= { const u32 SysCpkClkTbl[]= {

20
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_gdma.h
View file

@ -58,17 +58,17 @@ typedef struct _HAL_GDMA_ADAPTER_ {
struct GDMA_CH_LLI *pLlix; struct GDMA_CH_LLI *pLlix;
struct BLOCK_SIZE_LIST *pBlockSizeList; struct BLOCK_SIZE_LIST *pBlockSizeList;
PGDMA_CH_LLI_ELE pLli; PGDMA_CH_LLI_ELE pLli;
u32 NextPlli; u32 NextPlli;
u8 TestItem; u8 TestItem;
u8 ChNum; u8 ChNum;
u8 GdmaIndex; u8 GdmaIndex;
u8 IsrCtrl:1; u8 IsrCtrl:1;
u8 GdmaOnOff:1; u8 GdmaOnOff:1;
u8 Llpctrl:1; u8 Llpctrl:1;
u8 Lli0:1; u8 Lli0:1;
u8 Rsvd4to7:4; u8 Rsvd4to7:4;
u8 GdmaIsrType; u8 GdmaIsrType;
}HAL_GDMA_ADAPTER, *PHAL_GDMA_ADAPTER; }HAL_GDMA_ADAPTER, *PHAL_GDMA_ADAPTER;
typedef struct _HAL_GDMA_CHNL_ { typedef struct _HAL_GDMA_CHNL_ {

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_gpio.h
View file

@ -244,7 +244,7 @@ HAL_GPIO_IP_DeInit(
extern u16 GPIOState[_PORT_MAX-1]; // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на переферию. extern u16 GPIOState[_PORT_MAX-1]; // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию.
#endif // end of "#define _HAL_GPIO_H_" #endif // end of "#define _HAL_GPIO_H_"

7
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_misc.h
View file

@ -31,11 +31,12 @@ enum _HAL_RESET_REASON{
typedef u32 HAL_RESET_REASON; typedef u32 HAL_RESET_REASON;
#ifdef CONFIG_TIMER_MODULE #ifdef CONFIG_TIMER_MODULE
extern _LONG_CALL_ u32 HalDelayUs(u32 us); extern _LONG_CALL_ unsigned int HalDelayUs(unsigned int us);
#endif #endif
extern _LONG_CALL_ u32 HalGetCpuClk(VOID); extern _LONG_CALL_ unsigned int HalGetCpuClk(VOID);
extern _LONG_CALL_ u8 HalGetRomInfo(VOID); extern _LONG_CALL_ unsigned char HalGetRomInfo(VOID);
extern u8 HalGetChipId(void);
extern _LONG_CALL_ROM_ void *_memset( void *s, int c, SIZE_T n ); extern _LONG_CALL_ROM_ void *_memset( void *s, int c, SIZE_T n );
extern _LONG_CALL_ROM_ void *_memcpy( void *s1, const void *s2, SIZE_T n ); extern _LONG_CALL_ROM_ void *_memcpy( void *s1, const void *s2, SIZE_T n );

22
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_sdio_host.h
View file

@ -14,11 +14,9 @@
#include "rtl8195a_sdio_host.h" #include "rtl8195a_sdio_host.h"
#define SDIO_HOST_WAIT_FOREVER 0xFFFFFFFF #define SDIO_HOST_WAIT_FOREVER 0xFFFFFFFF
typedef struct _HAL_SDIO_HOST_OP_ { typedef struct _HAL_SDIO_HOST_OP_ {
HAL_Status (*HalSdioHostInitHost) (VOID *Data); HAL_Status (*HalSdioHostInitHost) (VOID *Data);
HAL_Status (*HalSdioHostInitCard) (VOID *Data); HAL_Status (*HalSdioHostInitCard) (VOID *Data);
@ -48,20 +46,20 @@ typedef enum _SDIO_XFER_TYPE_{
}SDIO_XFER_TYPE; }SDIO_XFER_TYPE;
typedef struct _HAL_SDIO_HOST_ADAPTER_{ typedef struct _HAL_SDIO_HOST_ADAPTER_{
IRQ_HANDLE IrqHandle; // Irq Handler IRQ_HANDLE IrqHandle; //+0..6(u32) Irq Handler
ADMA2_DESC_FMT *AdmaDescTbl; ADMA2_DESC_FMT *AdmaDescTbl; //+7(u32)
u32 Response[4]; u32 Response[4]; //+8..11(u32)
u32 CardOCR; u32 CardOCR; //+12
u32 CardStatus; u32 CardStatus; //+13
u32 IsWriteProtect; u32 IsWriteProtect; //+14
u8 SdStatus[SD_STATUS_LEN]; u8 SdStatus[SD_STATUS_LEN]; //+15..
u8 Csd[CSD_REG_LEN]; u8 Csd[CSD_REG_LEN]; //+31
volatile u8 CmdCompleteFlg; volatile u8 CmdCompleteFlg;
volatile u8 XferCompleteFlg; volatile u8 XferCompleteFlg;
volatile u8 ErrIntFlg; volatile u8 ErrIntFlg;
volatile u8 CardCurState; volatile u8 CardCurState;
u8 IsSdhc; u8 IsSdhc;
u8 CurrSdClk; u8 CurrSdClk; //+133?
u16 RCA; u16 RCA;
u16 SdSpecVer; u16 SdSpecVer;
SDIO_ERR_TYPE errType; SDIO_ERR_TYPE errType;
@ -76,6 +74,7 @@ typedef struct _HAL_SDIO_HOST_ADAPTER_{
VOID *CardRemoveCbPara; VOID *CardRemoveCbPara;
}HAL_SDIO_HOST_ADAPTER, *PHAL_SDIO_HOST_ADAPTER; }HAL_SDIO_HOST_ADAPTER, *PHAL_SDIO_HOST_ADAPTER;
extern HAL_SDIO_HOST_ADAPTER SdioHostAdapter;
extern HAL_Status extern HAL_Status
HalSdioHostInit( HalSdioHostInit(
@ -102,6 +101,5 @@ HalSdioHostOpInit(
IN VOID *Data IN VOID *Data
); );
#endif #endif

36
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_spi_flash.h
View file

@ -55,6 +55,7 @@ enum _SPIC_BIT_MODE_ {
SpicOneBitMode = 0, SpicOneBitMode = 0,
SpicDualBitMode = 1, SpicDualBitMode = 1,
SpicQuadBitMode = 2, SpicQuadBitMode = 2,
SpicMaxMode = 3
}; };
//====================================================== //======================================================
@ -98,20 +99,22 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_CMD_RDP 0xAB //Release from Deep Power-Down #define FLASH_CMD_RDP 0xAB //Release from Deep Power-Down
/*Micron Special command*/ /*Micron Special command*/
#define FLASH_CMD_DE 0xC4 #define FLASH_CMD_DE 0xC4 // DIE ERASE
#define FLASH_CMD_4PP2 0x12 #define FLASH_CMD_4PP2 0x12 // 4-BYTE PAGE PROGRAM
#define FLASH_CMD_RFSR 0x70 #define FLASH_CMD_RFSR 0x70 // READ FLAG STATUS REGISTER
#define FLASH_CMD_CFSR 0x50 #define FLASH_CMD_CFSR 0x50 // CLEAR FLAG STATUS REGISTER
#define FLASH_CMD_RNCR 0xB5 #define FLASH_CMD_RNCR 0xB5 // READ NONVOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_WNCR 0xB1 #define FLASH_CMD_WNCR 0xB1 // WRITE NONVOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_RVCR 0x85 #define FLASH_CMD_RVCR 0x85 // READ VOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_WVCR 0x81 #define FLASH_CMD_WVCR 0x81 // WRITE VOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_REVCR 0x65 #define FLASH_CMD_REVCR 0x65 // READ ENHANCED VOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_WEVCR 0x61 #define FLASH_CMD_WEVCR 0x61 // WRITE ENHANCED VOLATILE CONFIGURATION REGISTER
#define FLASH_CMD_REAR 0xC8 #define FLASH_CMD_REAR 0xC8 // READ EXTENDED ADDRESS REGISTER
#define FLASH_CMD_WEAR 0xC5 #define FLASH_CMD_WEAR 0xC5 // WRITE EXTENDED ADDRESS REGISTER
#define FLASH_CMD_ENQUAD 0x35 #define FLASH_CMD_ENQUAD 0x35 // ENTER QUAD
#define FLASH_CMD_EXQUAD 0xF5 #define FLASH_CMD_EXQUAD 0xF5 // EXIT QUAD
#define FLASH_CMD_ROTPA 0x4B // READ OTP ARRAY
#define FLASH_CMD_POTPA 0x42 // PROGRAM OTP ARRAY
/*MXIC Special command*/ /*MXIC Special command*/
#define FLASH_CMD_RDCR 0x15 //read configurate register #define FLASH_CMD_RDCR 0x15 //read configurate register
@ -120,7 +123,10 @@ enum _SPIC_BIT_MODE_ {
#define FLASH_CMD_ENSO 0xB1 // enter secured OTP #define FLASH_CMD_ENSO 0xB1 // enter secured OTP
#define FLASH_CMD_EXSO 0xC1 // exit secured OTP #define FLASH_CMD_EXSO 0xC1 // exit secured OTP
#define FLASH_CMD_RDSCUR 0x2B // read security register #define FLASH_CMD_RDSCUR 0x2B // read security register
#define FLASH_CMD_WRSCUR 0x2F // write security register #define FLASH_CMD_WRSCUR 0x2F // write security register
/* EON Special command*/
#define FLASH_CMD_EOTPM 0x3A // Enter OTP Mode (3Ah)
//#endif //#endif
#if 0 #if 0

7
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
View file

@ -202,7 +202,6 @@ void __attribute__((section(".hal.ram.text"))) RtlBootToSram(void) {
SpicInitRtl8195A(1, 1); // InitBaudRate 1, SpicBitMode 1 SpicInitRtl8195A(1, 1); // InitBaudRate 1, SpicBitMode 1
SpicFlashInitRtl8195A(1); // SpicBitMode 1 SpicFlashInitRtl8195A(1); // SpicBitMode 1
DBG_8195A("===== Enter Image 1.5 ====\nImg2 Sign: %s, InfaStart @ 0x%08x\n", DBG_8195A("===== Enter Image 1.5 ====\nImg2 Sign: %s, InfaStart @ 0x%08x\n",
&__image2_validate_code__, __image2_entry_func__); &__image2_validate_code__, __image2_entry_func__);
if (strcmp((const char * )&__image2_validate_code__, "RTKWin")) { if (strcmp((const char * )&__image2_validate_code__, "RTKWin")) {
@ -313,7 +312,7 @@ void __attribute__((section(".hal.ram.text"))) PreProcessForVendor(void) {
HalDelayUs(1000); HalDelayUs(1000);
int sdr_enable = 0; int sdr_enable = 0;
#ifdef CONFIG_SDR_EN #ifdef CONFIG_SDR_EN
if ((chip_id + 5) > 2) { if (chip_id > CHIP_ID_8711AF) {
SdrCtrlInit(); SdrCtrlInit();
sdr_enable = 1; sdr_enable = 1;
} }
@ -335,7 +334,9 @@ void __attribute__((section(".hal.ram.text"))) PreProcessForVendor(void) {
SpicReadIDRtl8195A(); SpicReadIDRtl8195A();
SpicFlashInitRtl8195A(SpicDualBitMode); // SpicBitMode 1 SpicFlashInitRtl8195A(SpicDualBitMode); // SpicBitMode 1
} }
// if (sdr_enable) SdrControllerInit(); #ifdef CONFIG_SDR_EN
if (sdr_enable) SdrControllerInit();
#endif
if (flash_enable) { if (flash_enable) {
u32 img1size = (*(u16 *) (SPI_FLASH_BASE + 0x18)) << 10; // size in 1024 bytes u32 img1size = (*(u16 *) (SPI_FLASH_BASE + 0x18)) << 10; // size in 1024 bytes
if (img1size == 0 || img1size >= 0x3FFFC00) if (img1size == 0 || img1size >= 0x3FFFC00)

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sdio.h
View file

@ -945,7 +945,7 @@ enum SDIO_RPWM2_BITS {
RPWM2_PIN_C7_LV_BIT = BIT8, // GPIO C7 wakeup level RPWM2_PIN_C7_LV_BIT = BIT8, // GPIO C7 wakeup level
RPWM2_PIN_D5_LV_BIT = BIT9, // GPIO D5 wakeup level RPWM2_PIN_D5_LV_BIT = BIT9, // GPIO D5 wakeup level
RPWM2_PIN_E3_LV_BIT = BIT10, // GPIO E3 wakeup level RPWM2_PIN_E3_LV_BIT = BIT10, // GPIO E3 wakeup level
RPWM2_CG_BIT = BIT11, // Clock Gated RPWM2_CG_BIT = BIT11, // Clock Gated
RPWM2_ACK_BIT = BIT14, // Acknowledge RPWM2_ACK_BIT = BIT14, // Acknowledge
RPWM2_TOGGLE_BIT = BIT15, // Toggle bit RPWM2_TOGGLE_BIT = BIT15, // Toggle bit
}; };

18
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_sdio_host.h
View file

@ -273,15 +273,15 @@ typedef enum
/* 0x2C */ /* 0x2C */
typedef enum typedef enum
{ {
BASE_CLK = 0x00, BASE_CLK = 0x00, // 41.6 MHz
BASE_CLK_DIVIDED_BY_2 = 0x01, BASE_CLK_DIVIDED_BY_2 = 0x01, // 20.8 MHz
BASE_CLK_DIVIDED_BY_4 = 0x02, BASE_CLK_DIVIDED_BY_4 = 0x02, // 10.4 MHz
BASE_CLK_DIVIDED_BY_8 = 0x04, BASE_CLK_DIVIDED_BY_8 = 0x04, // 5.2 MHZ
BASE_CLK_DIVIDED_BY_16 = 0x08, BASE_CLK_DIVIDED_BY_16 = 0x08, // 2.6 MHz
BASE_CLK_DIVIDED_BY_32 = 0x10, BASE_CLK_DIVIDED_BY_32 = 0x10, // 1.3 MHz
BASE_CLK_DIVIDED_BY_64 = 0x20, BASE_CLK_DIVIDED_BY_64 = 0x20, // 650 kHz
BASE_CLK_DIVIDED_BY_128 = 0x40, BASE_CLK_DIVIDED_BY_128 = 0x40, // 325 kHz
BASE_CLK_DIVIDED_BY_256 = 0x80 BASE_CLK_DIVIDED_BY_256 = 0x80 // 162 kHz
}SD_CLK_DIVISOR; }SD_CLK_DIVISOR;
typedef enum typedef enum

2
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gdma.c
View file

@ -41,7 +41,7 @@ HalGdmaChBlockSetingRtl8195a_Patch(
//4 1) Check chanel is avaliable //4 1) Check chanel is avaliable
if (HAL_GDMAX_READ32(GdmaIndex, REG_GDMA_CH_EN) & ChEn) { if (HAL_GDMAX_READ32(GdmaIndex, REG_GDMA_CH_EN) & ChEn) {
//4 Disable Channel //4 Disable Channel
DBG_GDMA_WARN("Channel had used; Disable Channel!!!!\n"); DBG_GDMA_WARN("Channel had used; Disable Channel!\n");
HalGdmaChDisRtl8195a(Data); HalGdmaChDisRtl8195a(Data);

18
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pcm.c
View file

@ -221,7 +221,7 @@ HalPcmIsrEnAndDisRtl8195a (
IN VOID *Data IN VOID *Data
) )
{ {
/* #ifdef CONFIG_PCM_EN
PHAL_GDMA_ADAPTER pHalGdmaAdapter = (PHAL_GDMA_ADAPTER) Data; PHAL_GDMA_ADAPTER pHalGdmaAdapter = (PHAL_GDMA_ADAPTER) Data;
u32 IsrMask, Addr, IsrCtrl; u32 IsrMask, Addr, IsrCtrl;
u8 IsrTypeIndex = 0; u8 IsrTypeIndex = 0;
@ -243,7 +243,7 @@ HalPcmIsrEnAndDisRtl8195a (
} }
} }
*/ #endif
return _TRUE; return _TRUE;
} }
@ -254,14 +254,14 @@ HalPcmDumpRegRtl8195a (
IN VOID *Data IN VOID *Data
) )
{ {
/* #ifdef CONFIG_PCM_EN
PHAL_GDMA_ADAPTER pHalGdmaAdapter = Data; PHAL_GDMA_ADAPTER pHalGdmaAdapter = Data;
HAL_GDMAX_WRITE32(pHalGdmaAdapter->GdmaIndex, HAL_GDMAX_WRITE32(pHalGdmaAdapter->GdmaIndex,
REG_GDMA_CH_EN, REG_GDMA_CH_EN,
(HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, REG_GDMA_CH_EN)| (HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, REG_GDMA_CH_EN)|
(pHalGdmaAdapter->ChEn)) (pHalGdmaAdapter->ChEn))
); );
*/ #endif
return _TRUE; return _TRUE;
} }
@ -270,16 +270,18 @@ HalPcmRtl8195a (
IN VOID *Data IN VOID *Data
) )
{ {
/* PHAL_GDMA_ADAPTER pHalGdmaAdapter = (PHAL_GDMA_ADAPTER) Data; #ifdef CONFIG_PCM_EN
PHAL_GDMA_ADAPTER pHalGdmaAdapter = (PHAL_GDMA_ADAPTER) Data;
HAL_GDMAX_WRITE32(pHalGdmaAdapter->GdmaIndex, HAL_GDMAX_WRITE32(pHalGdmaAdapter->GdmaIndex,
REG_GDMA_CH_EN, REG_GDMA_CH_EN,
(HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, REG_GDMA_CH_EN)& (HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, REG_GDMA_CH_EN)&
~(pHalGdmaAdapter->ChEn)) ~(pHalGdmaAdapter->ChEn))
); );
*/ #endif
return _TRUE; return _TRUE;
} }
/*
#ifdef CONFIG_PCM_EN
u8 u8
HalGdmaChIsrCleanRtl8195a ( HalGdmaChIsrCleanRtl8195a (
IN VOID *Data IN VOID *Data
@ -354,6 +356,6 @@ HalGdmaChCleanAutoDstRtl8195a (
HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, (REG_GDMA_CH_CFG + pHalGdmaAdapter->ChNum*REG_GDMA_CH_OFF))); HAL_GDMAX_READ32(pHalGdmaAdapter->GdmaIndex, (REG_GDMA_CH_CFG + pHalGdmaAdapter->ChNum*REG_GDMA_CH_OFF)));
} }
*/ #endif // CONFIG_PCM_EN

3821
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host.c
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3
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
View file

@ -14,8 +14,7 @@
extern _LONG_CALL_ extern _LONG_CALL_
HAL_Status HalSsiInitRtl8195a(VOID *Adaptor); HAL_Status HalSsiInitRtl8195a(VOID *Adaptor);
extern _LONG_CALL_ //extern _LONG_CALL_ u32 HalGetCpuClk(VOID);
u32 HalGetCpuClk(VOID);
VOID _SsiReadInterruptRtl8195a(VOID *Adapter) VOID _SsiReadInterruptRtl8195a(VOID *Adapter)

5
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_adc.c
View file

@ -1228,10 +1228,7 @@ RtkADCReceive(
return _EXIT_FAILURE; return _EXIT_FAILURE;
} }
extern u32 //extern u32 HalDelayUs(IN u32 us);
HalDelayUs(
IN u32 us
);
u32 u32
RtkADCReceiveBuf( RtkADCReceiveBuf(

10
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_misc.c
View file

@ -56,4 +56,14 @@ HAL_RESET_REASON HalGetResetCause(void)
return HAL_PERI_ON_READ32(REG_SYS_DSLP_TIM_CTRL); return HAL_PERI_ON_READ32(REG_SYS_DSLP_TIM_CTRL);
} }
u8 HalGetChipId(void) {
u8 chip_id = CHIP_ID_8195AM;
#if CONFIG_DEBUG_LOG > 3
if (HALEFUSEOneByteReadROM(HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_CTRL), 0xF8, &chip_id, L25EOUTVOLTAGE) != 1)
DBG_MISC_INFO("Get Chip ID Failed\r");
#else
HALEFUSEOneByteReadROM(HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_CTRL), 0xF8, &chip_id, L25EOUTVOLTAGE);
#endif
return chip_id;
}

1
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_pcm.c
View file

@ -8,6 +8,7 @@
*/ */
#include "platform_autoconf.h"
#include "hal_pcm.h" #include "hal_pcm.h"
#ifdef CONFIG_PCM_EN #ifdef CONFIG_PCM_EN

3
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_pinmux.c
View file

@ -30,6 +30,7 @@ void HalJtagPinOff(void)
HalPinCtrlRtl8195A(JTAG, 0, 0); HalPinCtrlRtl8195A(JTAG, 0, 0);
} }
#if RTL8710_DEF_PIN_ON #if RTL8710_DEF_PIN_ON
//----- GpioIcFunChk //----- GpioIcFunChk
@ -45,7 +46,7 @@ u8 GpioIcFunChk(IN u32 chip_pin, IN u8 Operation)
if (tst & 0xEF) result = 1; if (tst & 0xEF) result = 1;
else { else {
result = tst & 0x10; result = tst & 0x10;
if(tst & 0x10) { // RTL8710AF ? if(result) { // RTL8710AF ?
if (chip_pin - 1 <= 2) result = 0; // PA_1, PA_2, PA_3 if (chip_pin - 1 <= 2) result = 0; // PA_1, PA_2, PA_3
else { else {
result = chip_pin - PC_5; // PC_5 result = chip_pin - PC_5; // PC_5

20
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdio_host.c
View file

@ -4,12 +4,17 @@
* RTL8710/11 pvvx 12/2016 * RTL8710/11 pvvx 12/2016
*/ */
#include "rtl8195a.h" #include "rtl8195a.h"
#ifdef CONFIG_SDIO_HOST_EN
#include "sd.h" #include "sd.h"
#include "sdio_host.h" #include "sdio_host.h"
#include "hal_sdio_host.h" #include "hal_sdio_host.h"
#include "rtl8195a_sdio_host.h" #include "rtl8195a_sdio_host.h"
#include "hal_pinmux.h" #include "hal_pinmux.h"
//#ifdef RTL8710AF
#include "hal_gpio.h"
#include "PinNames.h"
#include "hal_gpio.h"
//#endif
//------------------------------------------------------------------------- //-------------------------------------------------------------------------
// Function declarations // Function declarations
@ -107,4 +112,17 @@ void HalSdioHostOpInit(void *Data) {
phsha->HalSdioHostErase = &HalSdioHostEraseRtl8195a; phsha->HalSdioHostErase = &HalSdioHostEraseRtl8195a;
phsha->HalSdioHostGetWriteProtect = &HalSdioHostGetWriteProtectRtl8195a; phsha->HalSdioHostGetWriteProtect = &HalSdioHostGetWriteProtectRtl8195a;
phsha->HalSdioHostSetWriteProtect = &HalSdioHostSetWriteProtectRtl8195a; phsha->HalSdioHostSetWriteProtect = &HalSdioHostSetWriteProtectRtl8195a;
//#ifdef RTL8710AF
if(HalGetChipId() != CHIP_ID_8195AM) {
GPIOState[0] &= ~((1 << 8) - 1);
{
for (int i = 0; i <= 6; i++)
HAL_GPIO_PullCtrl(i, PullNone);
HAL_GPIO_PullCtrl(PA_6, PullDown);
HAL_GPIO_PullCtrl(PA_7, PullDown);
}
}
//#endif
} }
#endif // CONFIG_SDIO_HOST_EN

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
View file

@ -1047,7 +1047,7 @@ MemTest(
} // MemTest } // MemTest
#if defined ( __ICCARM__ ) //#if defined ( __ICCARM__ )
u8 IsSdrPowerOn( u8 IsSdrPowerOn(
VOID VOID
) )
@ -1058,7 +1058,7 @@ u8 IsSdrPowerOn(
return 1; return 1;
} }
} }
#endif //#endif
#else // ifndef CONFIG_SDR_EN #else // ifndef CONFIG_SDR_EN

4
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
View file

@ -22,8 +22,8 @@ extern void xPortPendSVHandler( void ) __attribute__ (( naked ));
#endif #endif
extern void xPortSysTickHandler( void ); extern void xPortSysTickHandler( void );
extern void vPortSVCHandler( void ); extern void vPortSVCHandler( void );
extern u32 HalGetCpuClk(VOID); //extern unsigned int HalGetCpuClk(void);
extern _LONG_CALL_ u32 HalDelayUs(u32 us); //extern _LONG_CALL_ u32 HalDelayUs(u32 us);
extern COMMAND_TABLE UartLogRomCmdTable[]; extern COMMAND_TABLE UartLogRomCmdTable[];
extern HAL_TIMER_OP HalTimerOp; extern HAL_TIMER_OP HalTimerOp;

2158
RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c
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RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.a
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1
RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.bat
View file

@ -13,6 +13,7 @@ del hal_log_uart.o
del hal_pinmux.o del hal_pinmux.o
del hal_misc.o del hal_misc.o
del startup.o del startup.o
rem del hal_spi_flash_ram.o
arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o
cd .. cd ..
rd /q /s %libname%.lib rd /q /s %libname%.lib

2
RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v03-img2.ld
View file

@ -27,7 +27,7 @@ SECTIONS
{ {
__rom_bss_start__ = 0x10000300; __rom_bss_start__ = 0x10000300;
__rom_bss_end__ = 0x10000bc8; __rom_bss_end__ = 0x10000bc8;
/* /*
.ram.start.table : .ram.start.table :
{ {

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build/bin/ota.bin
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2
paths.mk
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@ -6,7 +6,7 @@ SDK_PATH = RTL00_SDKV35a/
#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH #OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH
TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/ TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
FLASHER_PATH ?= flasher/ FLASHER_PATH ?= flasher/
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V610a/ JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612f/
#--------------------------- #---------------------------
# Default # Default
#--------------------------- #---------------------------