j3d1/esp-open-rtos
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4 commits

Author SHA1 Message Date
sheinz
a91ec6eb61 sysparam fixes, tests, spi flash refactoring (#299) 
Original work by @ourairquality
* Sysparam threadsafe and SPI access
* Sysparam test cases
* Fix for negative int8
* Sysparam getting bool without memory allocation. Bool tests.
* SPI flash refactoring.
* Extract common spiflash.c into core.
* Use spiflash.c in sysparam.
* Use memcpy in spiflash.c insted of hand-written version.
* Tests for spiflash.c
 2017-03-22 02:18:04 +05:00
sheinz
38cccbd456 SPIFFS: Optimized SPI data read/write. 
Unaligned read/write from/to SPI data registers is rewritten in
assembler to improve performance.
 2016-07-21 16:36:55 +03:00
sheinz
281faa2cac SPIFFS: Wait SPI idle optimization. 2016-07-19 17:38:21 +03:00
sheinz
4b1568cbb9 SPIFFS: flash access refactoring. 2016-07-18 13:12:21 +03:00