Commit graph

24 commits

Author SHA1 Message Date
Angus Gratton
3d7fa49083 NMIExceptionHandler: Clean up, refactor to use excsave3 for stack pointer 2015-09-29 14:37:33 +10:00
Angus Gratton
23ea182e83 Simplify interrupt and RTOS timer tick handlers
RTOS Timer tick handler is now the same as any other ISR.

This causes a few subtle behaviour changes that seem OK but are worth noting:

* RTOS tick handler sdk__xt_timer_int() is now called from one stack
  frame deeper (inside _xt_isr_handler()), whereas before it was called
  from the level above in UserHandleInterrupt. I can't see any way that
  the extra ~40 bytes of stack use here hurt, though.

* sdk__xt_timer_int() was previous called after all other interrupts
  flagged in the handler, now it's called before the TIMER FRC1 & FRC2
  handlers. The tick handler doesn't appear to do anything particularly
  timing intensive, though.

* GPIO interrupt (value 3) is now lower priority than the SPI
  interrupt (value 2), whereas before it would have been called before
  SPI if both interrupts triggered at once.
2015-09-29 13:21:04 +10:00
Alex Stewart
ad7217404b Code reformat/cleanup of exception_vectors.S 2015-09-24 22:43:29 -07:00
Alex Stewart
4ea9382ee6 Fix bad memory access in NMI handler
CallNMIExceptionHandler was saving/restoring registers to the wrong offsets,
causing it to potentially corrupt the first two slots of the
LoadStoreErrorHandler's save area.
2015-09-24 20:12:14 -07:00
Alex Stewart
34bd63c943 More LoadStoreErrorHandler performance improvements 2015-09-23 08:51:36 -07:00
Alex Stewart
bcacfa426a Further optimizations for LoadStoreErrorHandler 2015-09-21 22:13:14 -07:00
Angus Gratton
e4c76b488c Remove the unaligned load handler to its own source file as it was getting quite complex
The downside here is needing to use #include so the 'beq' in the
exception vector can land on it directly, save an instruction.

There might be a better way to do this, but it seems hard to "curate"
the order that symbols appear in each section.
2015-09-15 11:34:21 +10:00
Angus Gratton
c759a2af05 Remove one more branch from l8ui code path
Thanks for @foogod for the heads-up on this.
2015-09-15 11:01:21 +10:00
Angus Gratton
390e007c75 Fix sign extension as suggested by @foogod
Also removes a branch from l8ui path, saves some cycles
2015-09-14 18:30:11 +10:00
Angus Gratton
44f2ba66e5 Exception vectors: Remove no-op syscallhandler 2015-09-14 18:17:45 +10:00
Angus Gratton
d4e5af7f0b NMI exception handler: Fix reserving too much RAM for registers 2015-09-14 17:43:29 +10:00
Angus Gratton
9ae2464258 Exception handlers: remove unused NMIHandlerAddress 2015-09-14 17:22:50 +10:00
Angus Gratton
6650369502 Use GPIO2 for led_debug.S 2015-09-14 17:20:00 +10:00
Angus Gratton
e347f296f3 Exception vectors: Rearrange to use absolute offets instead of .align hacks 2015-09-14 17:20:00 +10:00
Angus Gratton
1a4c829b1f Extended unaligned load support to work from DoubleExceptionVector
Allows handling bad loads that occur inside level 1 exception handlers.
2015-09-14 17:20:00 +10:00
Angus Gratton
7f338e66cb Unaligned load: Remove debugging variables 2015-08-11 16:25:35 +10:00
Angus Gratton
e3b24df043 Unaligned load: Shave a few more instructions off 2015-08-11 16:25:11 +10:00
Angus Gratton
3b3f5ea771 Unaligned loads: Only save working registers, use jump table to load non-working registers 2015-08-11 15:29:53 +10:00
Angus Gratton
8ea4ae27e2 Unaligned loader: Support l16si 2015-08-11 15:03:53 +10:00
Angus Gratton
773a046dc3 Unaligned loader: clean up, reduce number of registers 2015-08-11 14:23:41 +10:00
Angus Gratton
bfd38cd1e2 Experimental support for storing const strings in SPI flash or IRAM
As discussed in #11

Known limitations:
- Only supports l8ui/l16ui
- Unoptimised load routine
- Not called from DoubleExceptionHandler but should be
- Doesn't restore state properly when falling through to fatal exception handler
2015-08-10 12:03:03 +10:00
Angus Gratton
d685581829 Syscall hander: Fix a3 save address
(SDK doesn't use syscall exception so bug probably never hit?)
2015-08-10 11:54:30 +10:00
Angus Gratton
bed6907d22 Exception vector address must be 256 byte aligned
Not actually a problem with the current linker script as the address is
predetermined there at start of IRAM, but might as well be accurate
about it.

As per advice from @foogod on esp8266-re mailing list:
https://groups.google.com/d/msg/esp8266-re/1ljIY3Zttbo/HvzHSWOLCgAJ
2015-08-06 09:54:46 +10:00
Angus Gratton
aed843fc14 exception_vectors: Remove some cruft some the symbol table 2015-07-30 10:10:37 +10:00
Renamed from core/exception_vectors.s (Browse further)