Merge pull request #196 from pfalcon/pfalcon

esp8266 headers: A new interrupt no and a new WDT register

core/include/esp/interrupts.h

@@ -17,6 +17,7 @@
 
 /* Interrupt numbers for level 1 exception handler. */
 typedef enum {
+    INUM_WDEV_FIQ = 0,
     INUM_SLC = 1,
     INUM_SPI = 2,
     INUM_GPIO = 4,

core/include/esp/wdt_regs.h

@@ -25,7 +25,9 @@ struct WDT_REGS {
     uint32_t volatile CTRL;        // 0x00
     uint32_t volatile REG1;        // 0x04
     uint32_t volatile REG2;        // 0x08
-    uint32_t volatile _unused[2];  // 0x0c - 0x10
+    // Current value, decrementing
+    uint32_t volatile VAL;         // 0x0c
+    uint32_t volatile _unused[1];  // 0x10
     uint32_t volatile FEED;        // 0x14
 };