2016-03-03 20:10:06 +00:00
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/*
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* ESP hardware SPI master driver
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*
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* Part of esp-open-rtos
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* Copyright (c) Ruslan V. Uss, 2016
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* BSD Licensed as described in the file LICENSE
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*/
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#include "esp/spi.h"
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#include "esp/iomux.h"
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#include "esp/gpio.h"
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#include <string.h>
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#define _SPI0_SCK_GPIO 6
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#define _SPI0_MISO_GPIO 7
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#define _SPI0_MOSI_GPIO 8
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#define _SPI0_HD_GPIO 9
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#define _SPI0_WP_GPIO 10
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#define _SPI0_CS0_GPIO 11
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#define _SPI1_MISO_GPIO 12
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#define _SPI1_MOSI_GPIO 13
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#define _SPI1_SCK_GPIO 14
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#define _SPI1_CS0_GPIO 15
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2016-08-15 10:58:10 +00:00
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#define _SPI0_FUNC IOMUX_FUNC(1)
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#define _SPI1_FUNC IOMUX_FUNC(2)
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2016-03-03 20:10:06 +00:00
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#define _SPI_BUF_SIZE 64
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2016-11-26 11:19:53 +00:00
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#define __min(a,b) ((a > b) ? (b):(a))
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2016-03-03 20:10:06 +00:00
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2016-03-17 22:27:36 +00:00
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static bool _minimal_pins[2] = {false, false};
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2016-03-03 20:10:06 +00:00
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bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins)
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{
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switch (bus)
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{
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case 0:
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2016-08-15 12:23:45 +00:00
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gpio_set_iomux_function(_SPI0_MISO_GPIO, _SPI0_FUNC);
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gpio_set_iomux_function(_SPI0_MOSI_GPIO, _SPI0_FUNC);
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gpio_set_iomux_function(_SPI0_SCK_GPIO, _SPI0_FUNC);
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2016-03-03 20:10:06 +00:00
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if (!minimal_pins)
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{
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2016-08-15 12:23:45 +00:00
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gpio_set_iomux_function(_SPI0_HD_GPIO, _SPI0_FUNC);
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gpio_set_iomux_function(_SPI0_WP_GPIO, _SPI0_FUNC);
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gpio_set_iomux_function(_SPI0_CS0_GPIO, _SPI0_FUNC);
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2016-03-03 20:10:06 +00:00
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}
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break;
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case 1:
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2016-08-15 12:23:45 +00:00
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gpio_set_iomux_function(_SPI1_MISO_GPIO, _SPI1_FUNC);
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gpio_set_iomux_function(_SPI1_MOSI_GPIO, _SPI1_FUNC);
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gpio_set_iomux_function(_SPI1_SCK_GPIO, _SPI1_FUNC);
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2016-03-03 20:10:06 +00:00
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if (!minimal_pins)
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2016-08-15 12:23:45 +00:00
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gpio_set_iomux_function(_SPI1_CS0_GPIO, _SPI1_FUNC);
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2016-03-03 20:10:06 +00:00
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break;
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default:
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return false;
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}
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2016-03-17 22:27:36 +00:00
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_minimal_pins[bus] = minimal_pins;
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2016-03-03 20:10:06 +00:00
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SPI(bus).USER0 = SPI_USER0_MOSI | SPI_USER0_CLOCK_IN_EDGE | SPI_USER0_DUPLEX |
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(minimal_pins ? 0 : (SPI_USER0_CS_HOLD | SPI_USER0_CS_SETUP));
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spi_set_frequency_div(bus, freq_divider);
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spi_set_mode(bus, mode);
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spi_set_msb(bus, msb);
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spi_set_endianness(bus, endianness);
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return true;
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}
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2016-03-17 22:27:36 +00:00
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void spi_get_settings(uint8_t bus, spi_settings_t *s)
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{
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s->mode = spi_get_mode(bus);
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s->freq_divider = spi_get_frequency_div(bus);
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s->msb = spi_get_msb(bus);
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s->endianness = spi_get_endianness(bus);
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s->minimal_pins = _minimal_pins[bus];
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}
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2016-03-03 20:10:06 +00:00
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void spi_set_mode(uint8_t bus, spi_mode_t mode)
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{
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2016-03-12 20:59:52 +00:00
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bool cpha = (uint8_t)mode & 1;
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bool cpol = (uint8_t)mode & 2;
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if (cpol)
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cpha = !cpha; // CPHA must be inverted when CPOL = 1, I have no idea why
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2016-03-03 20:10:06 +00:00
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// CPHA
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2016-03-12 20:59:52 +00:00
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if (cpha)
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2016-03-03 20:10:06 +00:00
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SPI(bus).USER0 |= SPI_USER0_CLOCK_OUT_EDGE;
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else
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SPI(bus).USER0 &= ~SPI_USER0_CLOCK_OUT_EDGE;
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// CPOL - see http://bbs.espressif.com/viewtopic.php?t=342#p5384
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2016-03-12 20:59:52 +00:00
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if (cpol)
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2016-03-03 20:10:06 +00:00
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SPI(bus).PIN |= SPI_PIN_IDLE_EDGE;
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else
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SPI(bus).PIN &= ~SPI_PIN_IDLE_EDGE;
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}
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2016-03-12 20:59:52 +00:00
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spi_mode_t spi_get_mode(uint8_t bus)
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{
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uint8_t cpha = SPI(bus).USER0 & SPI_USER0_CLOCK_OUT_EDGE ? 1 : 0;
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uint8_t cpol = SPI(bus).PIN & SPI_PIN_IDLE_EDGE ? 2 : 0;
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return (spi_mode_t)(cpol | (cpol ? 1 - cpha : cpha)); // see spi_set_mode
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}
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2016-03-03 20:10:06 +00:00
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void spi_set_msb(uint8_t bus, bool msb)
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{
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if (msb)
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SPI(bus).CTRL0 &= ~(SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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else
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SPI(bus).CTRL0 |= (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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}
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void spi_set_endianness(uint8_t bus, spi_endianness_t endianness)
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{
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if (endianness == SPI_BIG_ENDIAN)
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SPI(bus).USER0 |= (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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else
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SPI(bus).USER0 &= ~(SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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}
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void spi_set_frequency_div(uint8_t bus, uint32_t divider)
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{
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2016-03-12 20:59:52 +00:00
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uint32_t predivider = (divider & 0xffff) - 1;
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uint32_t count = (divider >> 16) - 1;
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if (count || predivider)
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2016-03-03 20:10:06 +00:00
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{
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IOMUX.CONF &= ~(bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK);
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2016-03-12 20:59:52 +00:00
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SPI(bus).CLOCK = VAL2FIELD_M(SPI_CLOCK_DIV_PRE, predivider) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_NUM, count) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_HIGH, count / 2) |
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VAL2FIELD_M(SPI_CLOCK_COUNT_LOW, count);
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2016-03-03 20:10:06 +00:00
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}
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else
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{
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IOMUX.CONF |= bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK;
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SPI(bus).CLOCK = SPI_CLOCK_EQU_SYS_CLOCK;
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}
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}
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inline static void _set_size(uint8_t bus, uint8_t bytes)
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{
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2016-03-12 20:59:52 +00:00
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uint32_t bits = ((uint32_t)bytes << 3) - 1;
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SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MISO_BITLEN, bits);
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SPI(bus).USER1 = SET_FIELD(SPI(bus).USER1, SPI_USER1_MOSI_BITLEN, bits);
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2016-03-03 20:10:06 +00:00
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}
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inline static void _wait(uint8_t bus)
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{
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while (SPI(bus).CMD & SPI_CMD_USR)
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;
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}
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inline static void _start(uint8_t bus)
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{
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SPI(bus).CMD |= SPI_CMD_USR;
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}
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2016-03-12 20:59:52 +00:00
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inline static uint32_t _swap_bytes(uint32_t value)
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2016-03-03 20:10:06 +00:00
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{
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return (value << 24) | ((value << 8) & 0x00ff0000) | ((value >> 8) & 0x0000ff00) | (value >> 24);
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}
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2016-03-12 20:59:52 +00:00
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inline static uint32_t _swap_words(uint32_t value)
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2016-03-03 20:10:06 +00:00
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{
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2016-03-12 20:59:52 +00:00
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return (value << 16) | (value >> 16);
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2016-03-03 20:10:06 +00:00
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}
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2016-03-17 22:27:36 +00:00
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static void _spi_buf_prepare(uint8_t bus, size_t len, spi_endianness_t e, spi_word_size_t word_size)
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2016-03-12 20:59:52 +00:00
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{
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if (e == SPI_LITTLE_ENDIAN || word_size == SPI_32BIT) return;
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2016-03-17 22:27:36 +00:00
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size_t count = word_size == SPI_16BIT ? (len + 1) / 2 : (len + 3) / 4;
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2016-03-23 00:11:18 +00:00
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uint32_t *data = (uint32_t *)SPI(bus).W;
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2016-03-17 22:27:36 +00:00
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for (size_t i = 0; i < count; i ++)
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2016-03-12 20:59:52 +00:00
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{
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data[i] = word_size == SPI_16BIT
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? _swap_words(data[i])
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: _swap_bytes(data[i]);
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}
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}
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static void _spi_buf_transfer(uint8_t bus, const void *out_data, void *in_data,
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size_t len, spi_endianness_t e, spi_word_size_t word_size)
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2016-03-03 20:10:06 +00:00
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{
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_wait(bus);
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2016-03-12 20:59:52 +00:00
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size_t bytes = len * (uint8_t)word_size;
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_set_size(bus, bytes);
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2017-03-22 05:50:54 +00:00
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memcpy((void *)SPI(bus).W, out_data, bytes); // FIXME: It's buggy when bytes = 2 or 3
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// for (uint8_t i = 0; i < bytes; i ++)
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// ((uint8_t *)SPI(bus).W)[i] = ((uint8_t *)out_data)[i];
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2016-03-17 22:27:36 +00:00
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_spi_buf_prepare(bus, len, e, word_size);
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2016-03-03 20:10:06 +00:00
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_start(bus);
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_wait(bus);
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2016-03-07 23:00:11 +00:00
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if (in_data)
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2016-03-12 20:59:52 +00:00
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{
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2016-03-17 22:27:36 +00:00
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_spi_buf_prepare(bus, len, e, word_size);
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2016-03-23 00:11:18 +00:00
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memcpy(in_data, (void *)SPI(bus).W, bytes);
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2016-03-12 20:59:52 +00:00
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}
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2016-03-03 20:10:06 +00:00
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}
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uint8_t spi_transfer_8(uint8_t bus, uint8_t data)
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{
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2016-03-12 20:59:52 +00:00
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uint8_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_8BIT);
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return res;
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2016-03-03 20:10:06 +00:00
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}
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uint16_t spi_transfer_16(uint8_t bus, uint16_t data)
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{
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2016-03-12 20:59:52 +00:00
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uint16_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_16BIT);
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return res;
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2016-03-03 20:10:06 +00:00
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}
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uint32_t spi_transfer_32(uint8_t bus, uint32_t data)
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{
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2016-03-12 20:59:52 +00:00
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uint32_t res;
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_spi_buf_transfer(bus, &data, &res, 1, spi_get_endianness(bus), SPI_32BIT);
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return res;
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2016-03-03 20:10:06 +00:00
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}
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2017-03-15 13:18:32 +00:00
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static void _rearm_extras_bit(uint8_t bus, bool arm)
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{
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if (!_minimal_pins[bus]) return;
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static uint8_t status[2];
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2016-12-05 08:03:02 +00:00
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if (arm)
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{
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2017-03-15 13:18:32 +00:00
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if (status[bus] & 0x01) SPI(bus).USER0 |= (SPI_USER0_ADDR);
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if (status[bus] & 0x02) SPI(bus).USER0 |= (SPI_USER0_COMMAND);
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if (status[bus] & 0x04)
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SPI(bus).USER0 |= (SPI_USER0_DUMMY | SPI_USER0_MISO);
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2016-12-05 11:45:40 +00:00
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status[bus] = 0;
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2016-12-05 08:03:02 +00:00
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}
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else
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{
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2017-03-15 13:18:32 +00:00
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if (SPI(bus).USER0 & SPI_USER0_ADDR)
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{
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SPI(bus).USER0 &= ~(SPI_USER0_ADDR);
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status[bus] |= 0x01;
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}
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if (SPI(bus).USER0 & SPI_USER0_COMMAND)
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{
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SPI(bus).USER0 &= ~(SPI_USER0_COMMAND);
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status[bus] |= 0x02;
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}
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if (SPI(bus).USER0 & SPI_USER0_DUMMY)
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{
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SPI(bus).USER0 &= ~(SPI_USER0_DUMMY | SPI_USER0_MISO);
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status[bus] |= 0x04;
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}
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2016-12-05 08:03:02 +00:00
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}
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}
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2016-03-12 20:59:52 +00:00
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size_t spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len, spi_word_size_t word_size)
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2016-03-03 20:10:06 +00:00
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{
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2016-03-12 20:59:52 +00:00
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if (!out_data || !len) return 0;
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2016-03-03 20:10:06 +00:00
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spi_endianness_t e = spi_get_endianness(bus);
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2016-03-12 20:59:52 +00:00
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uint8_t buf_size = _SPI_BUF_SIZE / (uint8_t)word_size;
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2016-03-03 20:10:06 +00:00
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2016-03-12 20:59:52 +00:00
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size_t blocks = len / buf_size;
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2016-03-07 23:00:11 +00:00
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for (size_t i = 0; i < blocks; i++)
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{
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size_t offset = i * _SPI_BUF_SIZE;
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_spi_buf_transfer(bus, (const uint8_t *)out_data + offset,
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2016-03-12 20:59:52 +00:00
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in_data ? (uint8_t *)in_data + offset : NULL, buf_size, e, word_size);
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2017-03-15 13:18:32 +00:00
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if (blocks) _rearm_extras_bit(bus, false);
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2016-03-07 23:00:11 +00:00
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}
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2016-03-03 20:10:06 +00:00
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2016-03-12 20:59:52 +00:00
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uint8_t tail = len % buf_size;
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2016-03-03 20:10:06 +00:00
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if (tail)
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2016-03-07 23:00:11 +00:00
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{
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_spi_buf_transfer(bus, (const uint8_t *)out_data + blocks * _SPI_BUF_SIZE,
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2016-03-12 20:59:52 +00:00
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in_data ? (uint8_t *)in_data + blocks * _SPI_BUF_SIZE : NULL, tail, e, word_size);
|
2016-03-07 23:00:11 +00:00
|
|
|
}
|
2016-03-03 20:10:06 +00:00
|
|
|
|
2017-03-15 13:18:32 +00:00
|
|
|
if (blocks) _rearm_extras_bit(bus, true);
|
2016-03-12 20:59:52 +00:00
|
|
|
return len;
|
2016-03-03 20:10:06 +00:00
|
|
|
}
|
2016-11-26 11:19:53 +00:00
|
|
|
|
2017-03-15 13:18:32 +00:00
|
|
|
static void _repeat_send(uint8_t bus, uint32_t *dword, int32_t *repeats,
|
|
|
|
spi_word_size_t size)
|
2016-11-26 11:19:53 +00:00
|
|
|
{
|
2017-03-15 13:18:32 +00:00
|
|
|
uint8_t i = 0;
|
|
|
|
while (*repeats > 0)
|
2016-11-26 14:14:40 +00:00
|
|
|
{
|
2017-03-15 13:18:32 +00:00
|
|
|
uint16_t bytes_to_transfer = __min(*repeats * size, _SPI_BUF_SIZE);
|
2016-11-26 14:14:40 +00:00
|
|
|
_wait(bus);
|
2017-03-15 13:18:32 +00:00
|
|
|
if (i) _rearm_extras_bit(bus, false);
|
|
|
|
_set_size(bus, bytes_to_transfer);
|
|
|
|
for (i = 0; i < (bytes_to_transfer + 3) / 4; i++)
|
2016-11-26 14:14:40 +00:00
|
|
|
SPI(bus).W[i] = *dword; //need test with memcpy !
|
|
|
|
_start(bus);
|
2017-03-15 13:18:32 +00:00
|
|
|
*repeats -= (bytes_to_transfer / size);
|
2016-11-26 14:14:40 +00:00
|
|
|
}
|
|
|
|
_wait(bus);
|
2017-03-15 13:18:32 +00:00
|
|
|
_rearm_extras_bit(bus, true);
|
2016-11-26 11:19:53 +00:00
|
|
|
}
|
|
|
|
|
2017-03-15 13:18:32 +00:00
|
|
|
void spi_repeat_send_8(uint8_t bus, uint8_t data, int32_t repeats)
|
2016-11-26 11:19:53 +00:00
|
|
|
{
|
2016-11-26 14:14:40 +00:00
|
|
|
uint32_t dword = data << 24 | data << 16 | data << 8 | data;
|
2017-03-15 13:18:32 +00:00
|
|
|
_repeat_send(bus, &dword, &repeats, SPI_8BIT);
|
2016-11-26 11:19:53 +00:00
|
|
|
}
|
|
|
|
|
2017-03-15 13:18:32 +00:00
|
|
|
void spi_repeat_send_16(uint8_t bus, uint16_t data, int32_t repeats)
|
2016-11-26 11:19:53 +00:00
|
|
|
{
|
2016-11-26 14:14:40 +00:00
|
|
|
uint32_t dword = data << 16 | data;
|
2017-03-15 13:18:32 +00:00
|
|
|
_repeat_send(bus, &dword, &repeats, SPI_16BIT);
|
2016-11-26 11:19:53 +00:00
|
|
|
}
|
|
|
|
|
2017-03-15 13:18:32 +00:00
|
|
|
void spi_repeat_send_32(uint8_t bus, uint32_t data, int32_t repeats)
|
2016-11-26 11:19:53 +00:00
|
|
|
{
|
2017-03-15 13:18:32 +00:00
|
|
|
_repeat_send(bus, &data, &repeats, SPI_32BIT);
|
2016-11-26 11:19:53 +00:00
|
|
|
}
|