2016-03-03 20:10:06 +00:00
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/*
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* ESP hardware SPI master driver
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*
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* Part of esp-open-rtos
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* Copyright (c) Ruslan V. Uss, 2016
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* BSD Licensed as described in the file LICENSE
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*/
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#include "esp/spi.h"
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#include "esp/iomux.h"
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#include "esp/gpio.h"
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#include <string.h>
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#define _SPI0_SCK_GPIO 6
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#define _SPI0_MISO_GPIO 7
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#define _SPI0_MOSI_GPIO 8
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#define _SPI0_HD_GPIO 9
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#define _SPI0_WP_GPIO 10
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#define _SPI0_CS0_GPIO 11
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#define _SPI1_MISO_GPIO 12
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#define _SPI1_MOSI_GPIO 13
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#define _SPI1_SCK_GPIO 14
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#define _SPI1_CS0_GPIO 15
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#define _SPI0_FUNC 1
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#define _SPI1_FUNC 2
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#define _SPI_BUF_SIZE 64
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inline static void _set_pin_function(uint8_t pin, uint32_t function)
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{
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iomux_set_function(gpio_to_iomux(pin), function);
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}
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bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins)
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{
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switch (bus)
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{
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case 0:
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_set_pin_function(_SPI0_MISO_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_MOSI_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_SCK_GPIO, _SPI0_FUNC);
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if (!minimal_pins)
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{
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_set_pin_function(_SPI0_HD_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_WP_GPIO, _SPI0_FUNC);
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_set_pin_function(_SPI0_CS0_GPIO, _SPI0_FUNC);
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}
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break;
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case 1:
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_set_pin_function(_SPI1_MISO_GPIO, _SPI1_FUNC);
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_set_pin_function(_SPI1_MOSI_GPIO, _SPI1_FUNC);
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_set_pin_function(_SPI1_SCK_GPIO, _SPI1_FUNC);
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if (!minimal_pins)
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_set_pin_function(_SPI1_CS0_GPIO, _SPI1_FUNC);
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break;
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default:
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return false;
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}
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SPI(bus).USER0 = SPI_USER0_MOSI | SPI_USER0_CLOCK_IN_EDGE | SPI_USER0_DUPLEX |
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(minimal_pins ? 0 : (SPI_USER0_CS_HOLD | SPI_USER0_CS_SETUP));
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spi_set_frequency_div(bus, freq_divider);
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spi_set_mode(bus, mode);
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spi_set_msb(bus, msb);
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spi_set_endianness(bus, endianness);
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return true;
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}
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void spi_set_mode(uint8_t bus, spi_mode_t mode)
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{
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// CPHA
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if ((uint8_t)mode & 1)
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SPI(bus).USER0 |= SPI_USER0_CLOCK_OUT_EDGE;
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else
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SPI(bus).USER0 &= ~SPI_USER0_CLOCK_OUT_EDGE;
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// CPOL - see http://bbs.espressif.com/viewtopic.php?t=342#p5384
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if ((uint8_t)mode & 2)
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SPI(bus).PIN |= SPI_PIN_IDLE_EDGE;
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else
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SPI(bus).PIN &= ~SPI_PIN_IDLE_EDGE;
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}
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void spi_set_msb(uint8_t bus, bool msb)
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{
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if (msb)
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SPI(bus).CTRL0 &= ~(SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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else
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SPI(bus).CTRL0 |= (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER);
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}
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void spi_set_endianness(uint8_t bus, spi_endianness_t endianness)
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{
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if (endianness == SPI_BIG_ENDIAN)
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SPI(bus).USER0 |= (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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else
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SPI(bus).USER0 &= ~(SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER);
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}
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void spi_set_frequency_div(uint8_t bus, uint32_t divider)
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{
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uint32_t predivider = divider & 0xffff;
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uint32_t count = divider >> 16;
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2016-03-04 22:07:57 +00:00
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if (count > 1 || divider > 1)
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2016-03-03 20:10:06 +00:00
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{
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predivider = predivider > SPI_CLOCK_DIV_PRE_M + 1 ? SPI_CLOCK_DIV_PRE_M + 1 : predivider;
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count = count > SPI_CLOCK_COUNT_NUM_M + 1 ? SPI_CLOCK_COUNT_NUM_M + 1 : count;
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IOMUX.CONF &= ~(bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK);
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SPI(bus).CLOCK = (((predivider - 1) & SPI_CLOCK_DIV_PRE_M) << SPI_CLOCK_DIV_PRE_S) |
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(((count - 1) & SPI_CLOCK_COUNT_NUM_M) << SPI_CLOCK_COUNT_NUM_S) |
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(((count / 2 - 1) & SPI_CLOCK_COUNT_HIGH_M) << SPI_CLOCK_COUNT_HIGH_S) |
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(((count - 1) & SPI_CLOCK_COUNT_LOW_M) << SPI_CLOCK_COUNT_LOW_S);
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}
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else
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{
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IOMUX.CONF |= bus == 0 ? IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK : IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK;
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SPI(bus).CLOCK = SPI_CLOCK_EQU_SYS_CLOCK;
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}
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}
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inline static void _set_size(uint8_t bus, uint8_t bytes)
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{
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uint16_t bits = ((uint16_t)bytes << 3) - 1;
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const uint32_t mask = ~((SPI_USER1_MOSI_BITLEN_M << SPI_USER1_MOSI_BITLEN_S) |
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(SPI_USER1_MISO_BITLEN_M << SPI_USER1_MISO_BITLEN_S));
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SPI(bus).USER1 = (SPI(bus).USER1 & mask) | (bits << SPI_USER1_MOSI_BITLEN_S) |
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(bits << SPI_USER1_MISO_BITLEN_S);
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}
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inline static void _wait(uint8_t bus)
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{
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while (SPI(bus).CMD & SPI_CMD_USR)
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;
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}
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inline static void _start(uint8_t bus)
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{
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SPI(bus).CMD |= SPI_CMD_USR;
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}
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inline static uint32_t _reverse_bytes(uint32_t value)
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{
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return (value << 24) | ((value << 8) & 0x00ff0000) | ((value >> 8) & 0x0000ff00) | (value >> 24);
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}
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static uint32_t _spi_single_transfer (uint8_t bus, uint32_t data, uint8_t len)
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{
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_wait(bus);
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_set_size(bus, len);
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spi_endianness_t e = spi_get_endianness(bus);
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SPI(bus).W0 = e == SPI_BIG_ENDIAN ? _reverse_bytes(data) : data;
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_start(bus);
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_wait(bus);
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return e == SPI_BIG_ENDIAN ? _reverse_bytes(SPI(bus).W0) : SPI(bus).W0;
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}
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// works properly only with little endian byte order
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2016-03-07 23:00:11 +00:00
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static void _spi_buf_transfer (uint8_t bus, const uint8_t *out_data, uint8_t *in_data, size_t len)
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2016-03-03 20:10:06 +00:00
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{
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_wait(bus);
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_set_size(bus, len);
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2016-03-07 23:00:11 +00:00
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memcpy((void *)&SPI(bus).W0, out_data, len);
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2016-03-03 20:10:06 +00:00
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_start(bus);
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_wait(bus);
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2016-03-07 23:00:11 +00:00
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if (in_data)
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memcpy(in_data, (void *)&SPI(bus).W0, len);
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2016-03-03 20:10:06 +00:00
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}
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uint8_t spi_transfer_8(uint8_t bus, uint8_t data)
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{
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return _spi_single_transfer(bus, data, sizeof(data));
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}
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uint16_t spi_transfer_16(uint8_t bus, uint16_t data)
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{
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return _spi_single_transfer(bus, data, sizeof(data));
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}
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uint32_t spi_transfer_32(uint8_t bus, uint32_t data)
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{
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return _spi_single_transfer(bus, data, sizeof(data));
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}
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2016-03-07 23:00:11 +00:00
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void spi_transfer(uint8_t bus, const void *out_data, void *in_data, size_t len)
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2016-03-03 20:10:06 +00:00
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{
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2016-03-07 23:00:11 +00:00
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if (!out_data || !len) return;
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2016-03-03 20:10:06 +00:00
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_wait(bus);
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spi_endianness_t e = spi_get_endianness(bus);
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spi_set_endianness(bus, SPI_LITTLE_ENDIAN);
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2016-03-05 20:24:59 +00:00
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size_t blocks = len / _SPI_BUF_SIZE;
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2016-03-07 23:00:11 +00:00
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for (size_t i = 0; i < blocks; i++)
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{
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size_t offset = i * _SPI_BUF_SIZE;
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_spi_buf_transfer(bus, (const uint8_t *)out_data + offset,
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in_data ? (uint8_t *)in_data + offset : NULL, _SPI_BUF_SIZE);
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}
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2016-03-03 20:10:06 +00:00
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uint8_t tail = len % _SPI_BUF_SIZE;
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if (tail)
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2016-03-07 23:00:11 +00:00
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{
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_spi_buf_transfer(bus, (const uint8_t *)out_data + blocks * _SPI_BUF_SIZE,
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in_data ? (uint8_t *)in_data + blocks * _SPI_BUF_SIZE : NULL, tail);
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}
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2016-03-03 20:10:06 +00:00
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spi_set_endianness(bus, e);
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}
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