update -Wall

USDK/component/common/api/platform/esp_comp.h

@@ -9,22 +9,30 @@
 #define DATA_IRAM_ATTR
 #define ICACHE_RAM_ATTR
 
-#define os_printf(...) rtl_printf(__VA_ARGS__)
-#define os_printf_plus(...) rtl_printf(__VA_ARGS__)
-#define os_sprintf_fd(...) rtl_sprintf(__VA_ARGS__)
-#define ets_sprintf(...) rtl_sprintf(__VA_ARGS__)
-#ifndef os_malloc
-#define os_malloc   pvPortMalloc
-#define os_zalloc   pvPortZalloc
-#define os_calloc   pvPortCalloc
-#define os_realloc  pvPortRealloc
-#endif
-#undef os_free
-#define os_free     vPortFree
-#define system_get_free_heap_size xPortGetFreeHeapSize
-#undef os_realloc
-#define os_realloc  pvPortReAlloc
 
+#define os_printf rtl_printf
+#define os_printf_plus rtl_printf
+#define os_sprintf_fd rtl_sprintf
+#define ets_sprintf rtl_sprintf
+
+//#ifndef os_malloc
+#undef os_malloc
+extern void *pvPortMalloc(size_t xWantedSize);
+#define os_malloc   pvPortMalloc
+#undef os_zalloc
+extern void *pvPortZalloc(size_t xWantedSize);
+#define os_zalloc   pvPortZalloc
+//#undef os_calloc
+//#define os_calloc   pvPortCalloc
+#undef os_realloc
+extern void *pvPortReAlloc(void *pv, size_t xWantedSize);
+#define os_realloc  pvPortReAlloc
+#undef os_free
+extern void vPortFree(void *pv);
+#define os_free     vPortFree
+//#endif
+extern size_t xPortGetFreeHeapSize(void);
+#define system_get_free_heap_size xPortGetFreeHeapSize
 
 #define os_bzero rtl_bzero
 #define os_delay_us wait_us // HalDelayUs
@@ -104,22 +112,28 @@ extern SpiFlashChip * flashchip; // in RAM-BIOS: 0x3fffc714
 #define spi_flash_read(faddr, pbuf, size) flash_stream_read(&flashobj, faddr, size, (uint8_t *)pbuf)
 #define spi_flash_erase_block(blk) flash_erase_block(&flashobj, (blk)<<16);
 
+#ifndef ip4_addr1
 #define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
 #define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
 #define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
 #define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
+#endif
 /* These are cast to u16_t, with the intent that they are often arguments
  * to printf using the U16_F format from cc.h. */
+#ifndef ip4_addr1_16
 #define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
 #define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr))
 #define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr))
 #define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr))
+#endif
 
+#undef IP2STR
 #define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \
     ip4_addr2_16(ipaddr), \
     ip4_addr3_16(ipaddr), \
     ip4_addr4_16(ipaddr)
 
+#undef IPSTR
 #define IPSTR "%d.%d.%d.%d"
 
 #ifndef MAC2STR

USDK/component/common/api/wifi/wifi_conf.c

@@ -157,6 +157,9 @@ extern unsigned char dhcp_mode_sta;
 #include "freertos/wrapper.h"
 #include "skbuff.h"
 
+extern unsigned char is_promisc_enabled(void);
+extern int promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsigned int, void*), unsigned char len_used);
+
 //------------------------------------------------------------------------end-patch//
 static int wifi_connect_local(rtw_network_info_t *pWifi) {
 	int ret = 0;
@@ -278,8 +281,8 @@ static void wifi_disconn_hdl(char* buf, int buf_len, int flags, void* userdata)
 			else if (rtw_join_status == 0)
 				error_flag = RTW_CONNECT_FAIL;
 
-			else if (rtw_join_status == JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
+			else if (rtw_join_status == (JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
-					| JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY)
+					| JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY))
 				error_flag = RTW_WRONG_PASSWORD;
 		}
 
@@ -368,6 +371,7 @@ void restore_wifi_info_to_flash() {
 
 #endif
 
+int wext_set_bssid(const char *ifname, const __u8 *bssid);
 //----------------------------------------------------------------------------//
 int wifi_connect(
 		unsigned char bssid[ETH_ALEN],
@@ -380,7 +384,7 @@ int wifi_connect(
 
 	int ssid_len = 0;
 	int password_len = 0;
-	int bssid_len = 6;
+//	int bssid_len = 6;
 	xSemaphoreHandle join_semaphore;
 	rtw_result_t result = RTW_SUCCESS;
 	u8 wep_hex = 0;
@@ -440,7 +444,7 @@ int wifi_connect(
 
 			if (password_len == 10) {
 
-				u32 g[5] = { 0 };
+				unsigned int g[5] = { 0 };
 				u8 i = 0;
 				sscanf((const char*) password, "%02x%02x%02x%02x%02x", &g[0],
 						&g[1], &g[2], &g[3], &g[4]);
@@ -450,7 +454,7 @@ int wifi_connect(
 				password_len = 5;
 				wep_hex = 1;
 			} else if (password_len == 26) {
-				u32 g[13] = { 0 };
+				unsigned int g[13] = { 0 };
 				u8 i = 0;
 				sscanf((const char*) password, "%02x%02x%02x%02x%02x%02x%02x"
 						"%02x%02x%02x%02x%02x%02x", &g[0], &g[1], &g[2], &g[3],
@@ -731,8 +735,10 @@ int wifi_get_ap_info(rtw_bss_info_t * ap_info, rtw_security_t* security) {
 	return ret;
 }
 
+extern int wext_get_drv_ability(const char *ifname, __u32 *ability);
+
 int wifi_get_drv_ability(uint32_t *ability) {
-	return wext_get_drv_ability(WLAN0_NAME, ability);
+	return wext_get_drv_ability(WLAN0_NAME, (__u32 *)ability);
 }
 
 //----------------------------------------------------------------------------//
@@ -861,6 +867,9 @@ int wifi_on(rtw_mode_t mode) {
 	return ret;
 }
 
+extern void dhcps_deinit(void); //#include "dhcps.h"
+
+
 int wifi_off(void) {
 //	int ret = 0;
 
@@ -948,6 +957,8 @@ int wifi_get_last_error(void) {
 int wpas_wps_init(const char* ifname);
 #endif
 
+extern int set_hidden_ssid(const char *ifname, uint8_t value);
+
 int wifi_start_ap(char *ssid, rtw_security_t security_type, char *password, int channel, char ssid_hidden) {
 	const char *ifname = WLAN0_NAME;
 	int ssid_len = 0;
@@ -1489,6 +1500,8 @@ void wifi_enter_promisc_mode() {
 	}
 }
 
+extern void dhcps_init(struct netif * pnetif);
+
 int wifi_restart_ap(unsigned char *ssid, rtw_security_t security_type,
 		unsigned char *password, int channel) {
 	unsigned char idx = 0;
@@ -1543,10 +1556,8 @@ int wifi_restart_ap(unsigned char *ssid, rtw_security_t security_type,
 		printf("AP: security_type=%d\n", setting.security_type);
 		printf("AP: password=%s\n", (char* )setting.password);
 		printf("AP: key_idx =%d\n", setting.key_idx);
-		ret = wifi_connect((char*) setting.ssid, setting.security_type,
+		ret = wifi_connect(NULL, 0 , (char*) setting.ssid, setting.security_type,
-				(char*) setting.password, strlen((char* )setting.ssid),
+				(char*) setting.password, setting.key_idx,	NULL);
-				strlen((char* )setting.password), setting.key_idx,
-				NULL);
 		if (ret == RTW_SUCCESS) {
 #if CONFIG_DHCP_CLIENT
 			/* Start DHCPClient */
@@ -1723,25 +1734,32 @@ int wifi_disable_packet_filter(unsigned char filter_id) {
 int wifi_remove_packet_filter(unsigned char filter_id) {
 	return promisc_remove_packet_filter(filter_id);
 }
-#endif
+#endif // CONFIG_PROMISC
 
 #ifdef CONFIG_AP_MODE
+
+extern int wext_enable_forwarding(const char *ifname);
 int wifi_enable_forwarding(void) {
 	return wext_enable_forwarding(WLAN0_NAME);
 }
 
+extern int wext_disable_forwarding(const char *ifname);
 int wifi_disable_forwarding(void) {
 	return wext_disable_forwarding(WLAN0_NAME);
 }
-#endif
+
+#endif // CONFIG_AP_MODE
 
 /* API to set flag for concurrent mode wlan1 issue_deauth when channel switched by wlan0
  * usage: wifi_set_ch_deauth(0) -> wlan0 wifi_connect -> wifi_set_ch_deauth(1)
  */
 #ifdef CONFIG_CONCURRENT_MODE
+
+extern int wext_set_ch_deauth(const char *ifname, __u8 enable);
 int wifi_set_ch_deauth(__u8 enable) {
 	return wext_set_ch_deauth(WLAN1_NAME, enable);
 }
+
 #endif
 
 //----------------------------------------------------------------------------//

USDK/component/common/api/wifi/wifi_ind.c

@@ -102,103 +102,103 @@ void wifi_indication(WIFI_EVENT_INDICATE event, unsigned char *buf, int buf_len,
 	//		, and tries not to share the same stack with wlan driver if remaining stack space is 
 	//		not available for the following operations. 
 	//		ex: using semaphore to notice another thread.
-	switch (event) {
+	switch ((u32)event) {
 	case WIFI_EVENT_DISCONNECT:
 #if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): Disconnection indication received\n", __func__, event);
 #endif
 		break;
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_CONNECT:
 		// For WPA/WPA2 mode, indication of connection does not mean data can be
 		// 		correctly transmitted or received. Data can be correctly transmitted or
 		// 		received only when 4-way handshake is done.
 		// Please check WIFI_EVENT_FOURWAY_HANDSHAKE_DONE event
-#if(WIFI_INDICATE_MSG>0)
 		// Sample: return mac address
 		if (buf != NULL && buf_len == 6) {
 			info_printf(
 					"%s(%d): Connect indication received: %02x:%02x:%02x:%02x:%02x:%02x\n",
 					__func__, event, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
 		}
-#endif
 		break;
-	case WIFI_EVENT_FOURWAY_HANDSHAKE_DONE:
+#endif
 #if(WIFI_INDICATE_MSG>0)
+	case WIFI_EVENT_FOURWAY_HANDSHAKE_DONE:
 		if (buf != NULL)
 				info_printf("%s(%d): %s\n", __func__, event, buf);
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_SCAN_RESULT_REPORT:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_SCAN_RESULT_REPORT\n", __func__, event);
-#endif
 		break;
-	case WIFI_EVENT_SCAN_DONE:
+#endif
 #if(WIFI_INDICATE_MSG>0)
+	case WIFI_EVENT_SCAN_DONE:
 		info_printf("%s(%d): WIFI_EVENT_SCAN_DONE\n", __func__, event);
 //#if CONFIG_DEBUG_LOG > 3
 //			debug_printf("Time at start %d ms.\n", xTaskGetTickCount());
 //#endif
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_RECONNECTION_FAIL:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): %s\n", __func__, event, buf);
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_NO_NETWORK:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): %s\n", __func__, event, buf);
-#endif
 		break;
+#endif
 #if CONFIG_ENABLE_P2P
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_SEND_ACTION_DONE:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): %s\n", __func__, event, buf);
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_RX_MGNT:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_RX_MGNT\n", __func__, event);
-#endif
 		break;
+#endif
 #endif //CONFIG_ENABLE_P2P
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_STA_ASSOC:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_STA_ASSOC\n", __func__, event);
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 	case WIFI_EVENT_STA_DISASSOC:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_STA_DISASSOC\n", __func__, event);
-#endif
 		break;
+#endif
 #ifdef CONFIG_WPS
+#if(WIFI_INDICATE_MSG>0)
 		case WIFI_EVENT_STA_WPS_START:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_STA_WPS_START\n", __func__, event);
-#endif
 		break;
+#endif
+#if(WIFI_INDICATE_MSG>0)
 		case WIFI_EVENT_WPS_FINISH:
-#if(WIFI_INDICATE_MSG>0)
 		info_printf("%s(%d): WIFI_EVENT_WPS_FINISH\n", __func__, event);
-#endif
 		break;
-		case WIFI_EVENT_EAPOL_RECVD:
+#endif
 #if(WIFI_INDICATE_MSG>0)
+		case WIFI_EVENT_EAPOL_RECVD:
 		info_printf("%s(%d): WIFI_EVENT_EAPOL_RECVD\n", __func__, event);
-#endif
 		break;
 #endif
-	case WIFI_EVENT_BEACON_AFTER_DHCP:
-#if(WIFI_INDICATE_MSG>1)
-		info_printf("%s(%d): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__, event);
 #endif
+#if(WIFI_INDICATE_MSG>1)
+	case WIFI_EVENT_BEACON_AFTER_DHCP:
+		info_printf("%s(%d): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__, event);
 #if 0 // test beacon
 		gpio_write(&gpio_led, 1);
 		gpio_write(&gpio_led, 0);
 #endif			
 		break;
+#endif
 	}
 
 #if CONFIG_INIC_EN

USDK/component/common/api/wifi/wifi_promisc.c

@@ -55,6 +55,7 @@ int promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsign
 unsigned char is_promisc_enabled(void)
 {
 #ifdef CONFIG_PROMISC
+	extern unsigned char _is_promisc_enabled(void);
 	return _is_promisc_enabled();
 #else
 	return 0;
@@ -64,6 +65,7 @@ unsigned char is_promisc_enabled(void)
 int promisc_get_fixed_channel(void *fixed_bssid, u8 *ssid, int *ssid_length)
 {
 #ifdef CONFIG_PROMISC
+	extern int _promisc_get_fixed_channel(void *fixed_bssid, u8 *ssid, int *ssid_length);
 	return _promisc_get_fixed_channel(fixed_bssid, ssid, ssid_length);
 #else
 	return 0;
@@ -111,7 +113,7 @@ static struct eth_buffer eth_buffer;
 #ifdef CONFIG_PROMISC
 #define MAX_PACKET_FILTER_INFO 5
 #define FILTER_ID_INIT_VALUE 10
-rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]={0, 0, 0, 0, 0};
+rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]; //={0, 0, 0, 0, 0};
 static u8 packet_filter_enable_num = 0;
 
 void promisc_init_packet_filter()

USDK/component/common/api/wifi/wifi_util.c

@@ -321,7 +321,6 @@ int wext_set_tdma_param(const char *ifname, __u8 slot_period,
 	return ret;
 #else
 	struct iwreq iwr;
-	int ret = -1;
 	__u16 pindex = 7;
 	__u8 para[16]; // 7+(1+1+4)
 	int cmd_len = sizeof("pm_set");
@@ -409,7 +408,6 @@ int wext_get_lps_dtim(const char *ifname, __u8 *lps_dtim) {
 
 int wext_set_tos_value(const char *ifname, __u8 *tos_value) {
 	struct iwreq iwr;
-	int ret = -1;
 	__u8 para[sizeof("set_tos_value") + 4];
 	int cmd_len = sizeof("set_tos_value");
 	memset(&iwr, 0, sizeof(iwr));
@@ -753,7 +751,7 @@ int wext_private_command_with_retval(const char *ifname, char *cmd,
 		iwr.u.data.length = buf_size;
 		iwr.u.data.flags = 0;
 		ret = iw_ioctl(ifname, SIOCDEVPRIVATE, &iwr);
-		if (ret >= 0 & ret_buf != NULL) {
+		if (ret >= 0 && ret_buf != NULL) {
 			if (ret_len > iwr.u.data.length)
 				ret_len = iwr.u.data.length;
 			memcpy(ret_buf, (char *) iwr.u.data.pointer, ret_len);
@@ -925,7 +923,6 @@ int wext_set_gen_ie(const char *ifname, char *buf, __u16 buf_len, __u16 flags) {
 int wext_set_autoreconnect(const char *ifname, __u8 mode, __u8 retyr_times,
 		__u16 timeout) {
 	struct iwreq iwr;
-	int ret = 0;
 	__u8 para[sizeof("SetAutoRecnt") + 4];
 	int cmd_len = sizeof("SetAutoRecnt");
 	memset(&iwr, 0, sizeof(iwr));
@@ -1019,7 +1016,7 @@ int wext_update_custom_ie(const char *ifname, void * cus_ie, int ie_index) {
 #endif
 	} else {
 		memset(&iwr, 0, sizeof(iwr));
-		cmd_len = para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
+		para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
 		if (para != NULL) {
 			//Cmd
 			snprintf(para, cmd_len, "UpdateIE");

USDK/component/common/api/wifi_api.c

@@ -74,7 +74,7 @@ WIFI_CONFIG wifi_cfg = {
 SOFTAP_CONFIG wifi_ap_cfg = {
 		.ssid = DEF_AP_SSID,
 		.password = DEF_AP_PASSWORD,
-		.security = DEF_AP_SECURITY, // RTW_SECURITY_WPA2_AES_PSK or RTW_SECURITY_OPEN
+		.security = (unsigned char)DEF_AP_SECURITY, // RTW_SECURITY_WPA2_AES_PSK or RTW_SECURITY_OPEN
 		.beacon_interval = DEF_AP_BEACON,
 		.channel = DEF_AP_CHANNEL,
 		.ssid_hidden = 0,
@@ -91,7 +91,7 @@ STATION_CONFIG wifi_st_cfg = {
 		.ssid = DEF_ST_SSID,
 		.password = DEF_ST_PASSWORD,
 		.bssid = DEF_ST_BSSID,
-		.flg = DEF_ST_BSSID,
+		.flg = DEF_ST_USE_BSSID,
 		.security = DEF_ST_SECURITY,
 		.autoreconnect = DEF_ST_AUTORECONNECT,
 		.reconnect_pause =	DEF_ST_RECONNECT_PAUSE,
@@ -204,8 +204,8 @@ LOCAL int wlan_init_done_callback(void) {
 //char wlan_st_name[] = WLAN0_NAME;
 char wlan_st_name[] = WLAN0_NAME;
 char wlan_ap_name[] = WLAN1_NAME;
-char wlan_st_netifn = 0;
+unsigned char wlan_st_netifn = 0;
-char wlan_ap_netifn = 1;
+unsigned char wlan_ap_netifn = 1;
 
 
 uint32 get_new_ip(void)
@@ -283,7 +283,7 @@ rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_m
 	return ret;
 }
 
-LOCAL int _wext_cmp_ssid(int adapter_num, uint8 *ssid)
+LOCAL int _wext_cmp_ssid(int adapter_num, unsigned char *ssid)
 {
 	_adapter * pad = get_padaptern(adapter_num);
 	int ret = 0;
@@ -362,7 +362,7 @@ LOCAL rtw_result_t wifi_run_ap(void) {
 			int timeout = wifi_test_timeout_ms / wifi_test_timeout_step_ms;
 			while (1) {
 #if 1
-				if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, &wifi_ap_cfg.ssid )) {
+				if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, wifi_ap_cfg.ssid )) {
 #else
 				char essid[33];
 				if ((wext_get_ssid(wlan_ap_name, (unsigned char *) essid) > 0)
@@ -409,7 +409,7 @@ LOCAL rtw_result_t StartStDHCPClient(void)
 	debug_printf("Start DHCPClient...\n");
 	int ret = RTW_SUCCESS;
 	struct netif * pnetif = &xnetif[WLAN_ST_NETIF_NUM];
-	DHCP_CONFIG *p = (dhcp_cfg *)&wifi_st_dhcp;
+	DHCP_CONFIG *p = (DHCP_CONFIG *)&wifi_st_dhcp;
 	unsigned char mode = p->mode;
 	if(mode == 2 && p->ip != IP4ADDR(255,255,255,255) && p->ip != IP4ADDR(0,0,0,0)) { // fixed ip
 		netif_set_addr(pnetif, (ip_addr_t *)&p->ip, (ip_addr_t *)&p->mask, (ip_addr_t *)&p->gw);
@@ -602,8 +602,8 @@ LOCAL void _LwIP_Init(void)
 			xnetif[idx].name[0] = 'r';
 			xnetif[idx].name[1] = '0' + idx;
 		}
-		netif_add(&xnetif[WLAN_ST_NETIF_NUM], (struct netif *)&wifi_st_dhcp.ip, (struct netif *)&wifi_st_dhcp.mask, (struct netif *)&wifi_st_dhcp.gw, NULL, &ethernetif_init, &tcpip_input);
+		netif_add(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *)&wifi_st_dhcp.ip, (ip_addr_t *)&wifi_st_dhcp.mask, (ip_addr_t *)&wifi_st_dhcp.gw, NULL, &ethernetif_init, &tcpip_input);
-		netif_add(&xnetif[WLAN_AP_NETIF_NUM], (struct netif *)&wifi_ap_dhcp.ip, (struct netif *)&wifi_ap_dhcp.mask, (struct netif *)&wifi_ap_dhcp.gw, NULL, &ethernetif_init, &tcpip_input);
+		netif_add(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *)&wifi_ap_dhcp.ip, (ip_addr_t *)&wifi_ap_dhcp.mask, (ip_addr_t *)&wifi_ap_dhcp.gw, NULL, &ethernetif_init, &tcpip_input);
 #if CONFIG_ETHERNET // && NET_IF_NUM > 2
 		{
 				struct ip_addr ipaddr;
@@ -628,6 +628,8 @@ LOCAL void _LwIP_Init(void)
 	}
 }
 
+extern int rltk_set_tx_power_percentage(rtw_tx_pwr_percentage_t power_percentage_idx);
+
 int wifi_run(rtw_mode_t mode) {
 	int ret = 0;
 #if CONFIG_DEBUG_LOG > 4
@@ -668,8 +670,8 @@ int wifi_run(rtw_mode_t mode) {
     		netbios_set_name(WLAN_ST_NETIF_NUM, lwip_host_name[0]);
 #endif
 #endif
-			netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], &wifi_st_dhcp.ip,
+			netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *) &wifi_st_dhcp.ip,
-				&wifi_st_dhcp.mask, &wifi_st_dhcp.gw);
+					(ip_addr_t *) &wifi_st_dhcp.mask, (ip_addr_t *) &wifi_st_dhcp.gw);
 			pnif = &xnetif[WLAN_AP_NETIF_NUM];
 #if LWIP_NETIF_HOSTNAME
 			// @todo ethernetif_init()...
@@ -678,8 +680,8 @@ int wifi_run(rtw_mode_t mode) {
     		netbios_set_name(WLAN_AP_NETIF_NUM, lwip_host_name[1]);
 #endif
 #endif
-			netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], &wifi_ap_dhcp.ip,
+			netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *) &wifi_ap_dhcp.ip,
-				&wifi_ap_dhcp.mask, &wifi_ap_dhcp.gw);
+					(ip_addr_t *) &wifi_ap_dhcp.mask, (ip_addr_t *) &wifi_ap_dhcp.gw);
 
 		}
 		switch(mode) {

USDK/component/common/api/wifi_api.h

@@ -10,10 +10,12 @@
 #include "wifi_constants.h"
 #include "queue.h"
 
+#ifndef ip4_addr1
 #define ip4_addr1(ipaddr) (((uint8_t*)(ipaddr))[0])
 #define ip4_addr2(ipaddr) (((uint8_t*)(ipaddr))[1])
 #define ip4_addr3(ipaddr) (((uint8_t*)(ipaddr))[2])
 #define ip4_addr4(ipaddr) (((uint8_t*)(ipaddr))[3])
+#endif
 
 #define IPSTR "%d.%d.%d.%d"
 
@@ -118,8 +120,8 @@ extern unsigned char wifi_mode; // rtw_mode_t
 extern unsigned char wifi_st_status; // WIFI_STA_ENUM
 extern char wlan_st_name[];
 extern char wlan_ap_name[];
-extern char wlan_st_netifn;
+extern unsigned char wlan_st_netifn;
-extern char wlan_ap_netifn;
+extern unsigned char wlan_ap_netifn;
 
 /* WiFi Station & scan security */
 typedef enum {

USDK/component/common/api/wifi_api_scan.c

@@ -90,7 +90,7 @@ LOCAL void _wifi_scan_done_hdl(char* buf, int buf_len, int flags, void* userdata
 	web_scan_handler_t * pwscn_rec = &web_scan_handler_ptr;
 	if(pscan_rec->gscan_result_handler) {
 		// сторонний вывод
-		(*pscan_rec->gscan_result_handler)(pscan_rec);
+		(*pscan_rec->gscan_result_handler)((rtw_scan_handler_result_t *) pscan_rec);
 	}
 	else {
 		// оставить структуру pscan_rec->pap_details[i] для вывода в web scan на 5 сек
@@ -136,6 +136,7 @@ LOCAL int _wifi_scan_networks(rtw_scan_result_handler_t results_handler) {
 }
 
 /* --------  wext_set_pscan_channels ----------------- */
+extern int iw_ioctl(const char * ifname, unsigned long request, struct iwreq * pwrq);
 
 LOCAL int wext_set_pscan_channels(void) {
 	struct iwreq iwr;
@@ -183,7 +184,7 @@ rtw_result_t api_wifi_scan(api_scan_result_handler_t scan_result_cb)
 //			error_printf("Error xTimerStart\n");
 		} else if(wext_set_pscan_channels() < 0) {
 //			error_printf("ERROR: wifi set partial scan channel fail\n");
-		} else if(_wifi_scan_networks(scan_result_cb) != RTW_SUCCESS) {
+		} else if(_wifi_scan_networks((rtw_scan_result_handler_t) scan_result_cb) != RTW_SUCCESS) {
 //			error_printf("ERROR: wifi scan failed\n");
 		} else if(scan_result_cb) {
 			int i = 300;

USDK/component/common/drivers/wlan/realtek/include/autoconf.h

@@ -208,6 +208,7 @@
   #if defined(CONFIG_HARDWARE_8188F)
   #define NET_IF_NUM 2
   #else
+  #undef NET_IF_NUM
   #define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN) + 1)
   #endif
 #else

USDK/component/common/drivers/wlan/realtek/include/drv_types.h

@@ -56,6 +56,7 @@
 #include <section_config.h>
 //#include "rtl_utility_ram.h"
 #include "platform/platform_stdlib.h"
+
 #else
 #define SRAM_BD_DATA_SECTION
 #define WLAN_ROM_TEXT_SECTION
@@ -114,7 +115,7 @@ enum _NIC_VERSION {
 
 };
 
-typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER;
+typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
 
 #include "wireless.h"
 #include <netdev.h>

USDK/component/common/drivers/wlan/realtek/include/hal_com_reg.h

@@ -39,21 +39,21 @@
 //	0x0000h ~ 0x00FFh	System Configuration
 //
 //-----------------------------------------------------
-#define REG_SYS_ISO_CTRL				0x0000
+#define REG_SYS_ISO_CTRL_				0x0000
-#define REG_SYS_FUNC_EN				0x0002
+#define REG_SYS_FUNC_EN_				0x0002
 #define REG_APS_FSMCO					0x0004
 #define REG_SYS_CLKR					0x0008
 #define REG_9346CR						0x000A
-#define REG_SYS_EEPROM_CTRL			0x000A
+#define REG_SYS_EEPROM_CTRL				0x000A
 #define REG_EE_VPD						0x000C
 #define REG_AFE_MISC					0x0010
 #define REG_SPS0_CTRL					0x0011
 #define REG_SPS0_CTRL_6					0x0016
 #define REG_POWER_OFF_IN_PROCESS 		0x0017
-#define REG_SPS_OCP_CFG				0x0018
+#define REG_SPS_OCP_CFG					0x0018
 #define REG_RSV_CTRL					0x001C
 #define REG_RF_CTRL						0x001F
-#define REG_LDOA15_CTRL				0x0020
+#define REG_LDOA15_CTRL					0x0020
 #define REG_LDOV12D_CTRL				0x0021
 #define REG_LDOHCI12_CTRL				0x0022
 #define REG_LPLDO_CTRL					0x0023
@@ -67,9 +67,9 @@
 #define REG_PWR_DATA					0x0038
 #define REG_CAL_TIMER					0x003C
 #define REG_ACLK_MON					0x003E
-#define REG_GPIO_MUXCFG				0x0040
+#define REG_GPIO_MUXCFG					0x0040
 #define REG_GPIO_IO_SEL					0x0042
-#define REG_MAC_PINMUX_CFG			0x0043
+#define REG_MAC_PINMUX_CFG				0x0043
 #define REG_GPIO_PIN_CTRL				0x0044
 #define REG_GPIO_INTM					0x0048
 #define REG_LEDCFG0						0x004C
@@ -80,18 +80,18 @@
 #define REG_FSISR						0x0054
 #define REG_HSIMR						0x0058
 #define REG_HSISR						0x005c
-#define REG_GPIO_PIN_CTRL_2			0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control.
+#define REG_GPIO_PIN_CTRL_2				0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control.
 #define REG_GPIO_IO_SEL_2				0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select.
-#define REG_MULTI_FUNC_CTRL			0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source.
+#define REG_MULTI_FUNC_CTRL				0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source.
 #define REG_GSSR						0x006c
 #define REG_AFE_XTAL_CTRL_EXT			0x0078 //RTL8188E
 #define REG_XCK_OUT_CTRL				0x007c //RTL8188E
-#define REG_MCUFWDL					0x0080
+#define REG_MCUFWDL						0x0080
 #define REG_WOL_EVENT					0x0081 //RTL8188E
 #define REG_MCUTSTCFG					0x0084
 #define REG_FDHM0						0x0088
 #define REG_HOST_SUSP_CNT				0x00BC	// RTL8192C Host suspend counter on FPGA platform
-#define REG_SYSTEM_ON_CTRL			0x00CC	// For 8723AE Reset after S3
+#define REG_SYSTEM_ON_CTRL				0x00CC	// For 8723AE Reset after S3
 #define REG_EFUSE_ACCESS				0x00CF	// Efuse access protection for RTL8723
 #define REG_BIST_SCAN					0x00D0
 #define REG_BIST_RPT					0x00D4
@@ -101,16 +101,16 @@
 #define REG_PCIE_MIO_INTD				0x00E8
 #define REG_HPON_FSM					0x00EC
 #define REG_SYS_CFG						0x00F0
-#define REG_GPIO_OUTSTS				0x00F4	// For RTL8723 only.
+#define REG_GPIO_OUTSTS					0x00F4	// For RTL8723 only.
 #define REG_TYPE_ID						0x00FC
 
 
-#define REG_WL_CLK_CTRL                 		0x0002 
+#define REG_WL_CLK_CTRL                 0x0002
-#define REG_WL_FUNC_EN                  		0x0004
+#define REG_WL_FUNC_EN                  0x0004
-#define REG_WL_PMC_CTRL                 		0x0020
+#define REG_WL_PMC_CTRL                 0x0020
 #define REG_WL_AFE_CTRL    				0x0050
-#define REG_WL_PMC_IMR                  		0x0080
+#define REG_WL_PMC_IMR                  0x0080
-#define REG_WL_PMC_ISR                  		0x0084
+#define REG_WL_PMC_ISR                  0x0084
 
 
 //-----------------------------------------------------
@@ -121,7 +121,7 @@
 #define REG_CR							0x0100
 #define REG_PBP							0x0104
 #define REG_PKT_BUFF_ACCESS_CTRL		0x0106
-#define REG_TRXDMA_CTRL				0x010C
+#define REG_TRXDMA_CTRL					0x010C
 #define REG_TRXFF_BNDY					0x0114
 #define REG_TRXFF_STATUS				0x0118
 #define REG_RXFF_PTR					0x011C
@@ -134,25 +134,25 @@
 #define REG_FWISR						0x0134
 #define REG_FTIMR						0x0138
 #define REG_FTISR						0x013C //RTL8192C
-#define REG_PKTBUF_DBG_CTRL			0x0140
+#define REG_PKTBUF_DBG_CTRL				0x0140
 #define REG_RXPKTBUF_CTRL				(REG_PKTBUF_DBG_CTRL+2)
 #define REG_PKTBUF_DBG_DATA_L			0x0144
-#define REG_PKTBUF_DBG_DATA_H		0x0148
+#define REG_PKTBUF_DBG_DATA_H			0x0148
 
 #define REG_TC0_CTRL					0x0150
 #define REG_TC1_CTRL					0x0154
 #define REG_TC2_CTRL					0x0158
 #define REG_TC3_CTRL					0x015C
 #define REG_TC4_CTRL					0x0160
-#define REG_TCUNIT_BASE				0x0164
+#define REG_TCUNIT_BASE					0x0164
-#define REG_MBIST_START				0x0174
+#define REG_MBIST_START					0x0174
 #define REG_MBIST_DONE					0x0178
 #define REG_MBIST_FAIL					0x017C
 #define REG_32K_CTRL					0x0194 //RTL8188E
-#define REG_C2HEVT_MSG_NORMAL		0x01A0
+#define REG_C2HEVT_MSG_NORMAL			0x01A0
 #define REG_C2HEVT_CLEAR				0x01AF
 #define REG_MCUTST_1					0x01c0
-#define REG_MCUTST_WOWLAN			0x01C7	// Defined after 8188E series.
+#define REG_MCUTST_WOWLAN				0x01C7	// Defined after 8188E series.
 #define REG_FMETHR						0x01C8
 #define REG_HMETFR						0x01CC
 #define REG_HMEBOX_0					0x01D0
@@ -180,7 +180,7 @@
 //	0x0280h ~ 0x02FFh	RXDMA Configuration
 //
 //-----------------------------------------------------
-#define REG_RXDMA_AGG_PG_TH			0x0280
+#define REG_RXDMA_AGG_PG_TH				0x0280
 #define REG_RXPKT_NUM					0x0284 
 #define REG_RXDMA_STATUS				0x0288
 #define REG_C2H_PKT_8723B				0x0294
@@ -194,7 +194,7 @@
 #define REG_PCIE_CTRL_REG				0x0300
 #define REG_INT_MIG						0x0304	// Interrupt Migration 
 #define REG_BCNQ_DESA					0x0308	// TX Beacon Descriptor Address
-#define REG_HQ_DESA					0x0310	// TX High Queue Descriptor Address
+#define REG_HQ_DESA						0x0310	// TX High Queue Descriptor Address
 #define REG_MGQ_DESA					0x0318	// TX Manage Queue Descriptor Address
 #define REG_VOQ_DESA					0x0320	// TX VO Queue Descriptor Address
 #define REG_VIQ_DESA					0x0328	// TX VI Queue Descriptor Address
@@ -203,9 +203,9 @@
 #define REG_RX_DESA						0x0340	// RX Queue	Descriptor Address
 //sherry added for DBI Read/Write  20091126
 #define REG_DBI_WDATA					0x0348	// Backdoor REG for Access Configuration
-#define REG_DBI_RDATA                         	0x034C	//Backdoor REG for Access Configuration
+#define REG_DBI_RDATA                   0x034C	//Backdoor REG for Access Configuration
-#define REG_DBI_CTRL                      		0x0350	//Backdoor REG for Access Configuration
+#define REG_DBI_CTRL                    0x0350	//Backdoor REG for Access Configuration
-#define REG_DBI_FLAG                      		0x0352	//Backdoor REG for Access Configuration
+#define REG_DBI_FLAG                    0x0352	//Backdoor REG for Access Configuration
 #define REG_MDIO						0x0354	// MDIO for Access PCIE PHY
 #define REG_DBG_SEL						0x0360	// Debug Selection Register
 #define REG_PCIE_HRPWM					0x0361	//PCIe RPWM
@@ -214,88 +214,88 @@
 
 // For new buffer descriptor ring architecture
 
-#define REG_LX_CTRL1                			0x0300  // 4 Bytes
+#define REG_LX_CTRL1                	0x0300  // 4 Bytes
 
-#define REG_BCNQ_TXBD_DESA          		0x0308  // 8 Bytes
+#define REG_BCNQ_TXBD_DESA          	0x0308  // 8 Bytes
-#define REG_MGQ_TXBD_DESA           		0x0310  // 8 Bytes 
+#define REG_MGQ_TXBD_DESA           	0x0310  // 8 Bytes
 #define REG_VOQ_TXBD_DESA          		0x0318  // 8 Bytes
-#define REG_VIQ_TXBD_DESA           		0x0320  // 8 Bytes
+#define REG_VIQ_TXBD_DESA           	0x0320  // 8 Bytes
-#define REG_BEQ_TXBD_DESA           		0x0328  // 8 Bytes
+#define REG_BEQ_TXBD_DESA           	0x0328  // 8 Bytes
-#define REG_BKQ_TXBD_DESA           		0x0330  // 8 Bytes
+#define REG_BKQ_TXBD_DESA           	0x0330  // 8 Bytes
-#define REG_RXQ_RXBD_DESA           		0x0338  // 8 Bytes
+#define REG_RXQ_RXBD_DESA           	0x0338  // 8 Bytes
-#define REG_HI0Q_TXBD_DESA          		0x0340  // 8 Bytes
+#define REG_HI0Q_TXBD_DESA          	0x0340  // 8 Bytes
-#define REG_HI1Q_TXBD_DESA          		0x0348  // 8 Bytes
+#define REG_HI1Q_TXBD_DESA          	0x0348  // 8 Bytes
-#define REG_HI2Q_TXBD_DESA          		0x0350  // 8 Bytes
+#define REG_HI2Q_TXBD_DESA          	0x0350  // 8 Bytes
-#define REG_HI3Q_TXBD_DESA          		0x0358  // 8 Bytes
+#define REG_HI3Q_TXBD_DESA          	0x0358  // 8 Bytes
-#define REG_HI4Q_TXBD_DESA          		0x0360  // 8 Bytes
+#define REG_HI4Q_TXBD_DESA          	0x0360  // 8 Bytes
-#define REG_HI5Q_TXBD_DESA          		0x0368  // 8 Bytes
+#define REG_HI5Q_TXBD_DESA          	0x0368  // 8 Bytes
 #define REG_HI6Q_TXBD_DESA         		0x0370  // 8 Bytes
-#define REG_HI7Q_TXBD_DESA          		0x0378  // 8 Bytes
+#define REG_HI7Q_TXBD_DESA          	0x0378  // 8 Bytes
 
-#define REG_MGQ_TXBD_NUM            		0x0380  // 2 Bytes
+#define REG_MGQ_TXBD_NUM            	0x0380  // 2 Bytes
-#define REG_RX_RXBD_NUM             		0x0382  // 2 Bytes
+#define REG_RX_RXBD_NUM             	0x0382  // 2 Bytes
-#define REG_VOQ_TXBD_NUM            		0x0384  // 2 Bytes
+#define REG_VOQ_TXBD_NUM            	0x0384  // 2 Bytes
-#define REG_VIQ_TXBD_NUM            		0x0386  // 2 Bytes
+#define REG_VIQ_TXBD_NUM            	0x0386  // 2 Bytes
-#define REG_BEQ_TXBD_NUM            		0x0388  // 2 Bytes
+#define REG_BEQ_TXBD_NUM            	0x0388  // 2 Bytes
-#define REG_BKQ_TXBD_NUM            		0x038A  // 2 Bytes
+#define REG_BKQ_TXBD_NUM            	0x038A  // 2 Bytes
-#define REG_HI0Q_TXBD_NUM           		0x038C  // 2 Bytes
+#define REG_HI0Q_TXBD_NUM           	0x038C  // 2 Bytes
-#define REG_HI1Q_TXBD_NUM           		0x038E  // 2 Bytes
+#define REG_HI1Q_TXBD_NUM           	0x038E  // 2 Bytes
-#define REG_HI2Q_TXBD_NUM           		0x0390  // 2 Bytes
+#define REG_HI2Q_TXBD_NUM           	0x0390  // 2 Bytes
-#define REG_HI3Q_TXBD_NUM           		0x0392  // 2 Bytes
+#define REG_HI3Q_TXBD_NUM           	0x0392  // 2 Bytes
-#define REG_HI4Q_TXBD_NUM           		0x0394  // 2 Bytes
+#define REG_HI4Q_TXBD_NUM           	0x0394  // 2 Bytes
-#define REG_HI5Q_TXBD_NUM           		0x0396  // 2 Bytes
+#define REG_HI5Q_TXBD_NUM           	0x0396  // 2 Bytes
-#define REG_HI6Q_TXBD_NUM           		0x0398  // 2 Bytes
+#define REG_HI6Q_TXBD_NUM           	0x0398  // 2 Bytes
-#define REG_HI7Q_TXBD_NUM           		0x039A  // 2 Bytes
+#define REG_HI7Q_TXBD_NUM           	0x039A  // 2 Bytes
 
-#define REG_BD_RWPTR_CLR            		0x039C  // 4 Bytes
+#define REG_BD_RWPTR_CLR            	0x039C  // 4 Bytes
-#define REG_VOQ_TXBD_IDX            		0x03A0  // 4 Bytes
+#define REG_VOQ_TXBD_IDX            	0x03A0  // 4 Bytes
-#define REG_VIQ_TXBD_IDX            		0x03A4  // 4 Bytes
+#define REG_VIQ_TXBD_IDX            	0x03A4  // 4 Bytes
-#define REG_BEQ_TXBD_IDX            		0x03A8  // 4 Bytes
+#define REG_BEQ_TXBD_IDX            	0x03A8  // 4 Bytes
-#define REG_BKQ_TXBD_IDX            		0x03AC  // 4 Bytes
+#define REG_BKQ_TXBD_IDX            	0x03AC  // 4 Bytes
-#define REG_MGQ_TXBD_IDX            		0x03B0  // 4 Bytes
+#define REG_MGQ_TXBD_IDX            	0x03B0  // 4 Bytes
-#define REG_RXQ_RXBD_IDX            		0x03B4  // 4 Bytes
+#define REG_RXQ_RXBD_IDX            	0x03B4  // 4 Bytes
-#define REG_HI0Q_TXBD_IDX           		0x03B8  // 4 Bytes
+#define REG_HI0Q_TXBD_IDX           	0x03B8  // 4 Bytes
-#define REG_HI1Q_TXBD_IDX           		0x03BC  // 4 Bytes
+#define REG_HI1Q_TXBD_IDX           	0x03BC  // 4 Bytes
-#define REG_HI2Q_TXBD_IDX           		0x03C0  // 4 Bytes
+#define REG_HI2Q_TXBD_IDX           	0x03C0  // 4 Bytes
-#define REG_HI3Q_TXBD_IDX           		0x03C4  // 4 Bytes
+#define REG_HI3Q_TXBD_IDX           	0x03C4  // 4 Bytes
-#define REG_HI4Q_TXBD_IDX           		0x03C8  // 4 Bytes
+#define REG_HI4Q_TXBD_IDX           	0x03C8  // 4 Bytes
-#define REG_HI5Q_TXBD_IDX           		0x03CC  // 4 Bytes
+#define REG_HI5Q_TXBD_IDX           	0x03CC  // 4 Bytes
-#define REG_HI6Q_TXBD_IDX           		0x03D0  // 4 Bytes
+#define REG_HI6Q_TXBD_IDX           	0x03D0  // 4 Bytes
-#define REG_HI7Q_TXBD_IDX           		0x03D4  // 4 Bytes
+#define REG_HI7Q_TXBD_IDX           	0x03D4  // 4 Bytes
 
 //CPWM &RPWM
-#define REG_LX_HRPWM_8711B			0x03D9  // 1 Bytes
+#define REG_LX_HRPWM_8711B				0x03D9  // 1 Bytes
-#define REG_LX_HCPWM_8711B			0x03DA  // 1 Bytes //from 0x14c
+#define REG_LX_HCPWM_8711B				0x03DA  // 1 Bytes //from 0x14c
 
-#define REG_LX_CTRL2                			0x03DB  // 1 Bytes
+#define REG_LX_CTRL2                	0x03DB  // 1 Bytes
 
-#define REG_LX_HRPWM2_8711B          		0x03DC  // 2 Bytes //REG_LX_HCPWM1_8711B
+#define REG_LX_HRPWM2_8711B          	0x03DC  // 2 Bytes //REG_LX_HCPWM1_8711B
-#define REG_LX_HCPWM2_8711B          		0x03DE  // 2 Bytes 
+#define REG_LX_HCPWM2_8711B          	0x03DE  // 2 Bytes
 #define REG_LX_H2C_MSG_V1         		0x03E0  // 4 Bytes
 #define REG_LX_C2H_MSG_V1         		0x03E4  // 4 Bytes
 
 
-#define REG_LX_DMA_ISR              			0x03E8  // 4 Bytes
+#define REG_LX_DMA_ISR              	0x03E8  // 4 Bytes
-#define REG_LX_DMA_IMR              			0x03EC  // 4 Bytes
+#define REG_LX_DMA_IMR              	0x03EC  // 4 Bytes
-#define REG_LX_DMA_DBG              			0x03F0  // 4 Bytes
+#define REG_LX_DMA_DBG              	0x03F0  // 4 Bytes
 
-#define REG_BUS_MIX_CFG             			0x03F8  // 4 Bytes#
+#define REG_BUS_MIX_CFG             	0x03F8  // 4 Bytes#
-#define REG_BUS_MIX_CFG1            		0x03FC  // 4 Bytes
+#define REG_BUS_MIX_CFG1            	0x03FC  // 4 Bytes
 
 //-----------------------------------------------------
 //
 //	0x0400h ~ 0x047Fh	Protocol Configuration
 //
 //-----------------------------------------------------
-#define REG_VOQ_INFORMATION			0x0400
+#define REG_VOQ_INFORMATION				0x0400
-#define REG_VIQ_INFORMATION			0x0404
+#define REG_VIQ_INFORMATION				0x0404
-#define REG_BEQ_INFORMATION			0x0408
+#define REG_BEQ_INFORMATION				0x0408
-#define REG_BKQ_INFORMATION			0x040C
+#define REG_BKQ_INFORMATION				0x040C
-#define REG_MGQ_INFORMATION			0x0410
+#define REG_MGQ_INFORMATION				0x0410
-#define REG_HGQ_INFORMATION			0x0414
+#define REG_HGQ_INFORMATION				0x0414
 #define REG_BCNQ_INFORMATION			0x0418
-#define REG_TXPKT_EMPTY				0x041A
+#define REG_TXPKT_EMPTY					0x041A
-#define REG_CPU_MGQ_INFORMATION		0x041C
+#define REG_CPU_MGQ_INFORMATION			0x041C
 #define REG_FWHW_TXQ_CTRL				0x0420
 #define REG_HWSEQ_CTRL					0x0423
 #define REG_BCNQ_BDNY					0x0424
@@ -314,8 +314,8 @@
 #define REG_BCNQ1_BDNY					0x0457
 
 #define REG_AGGLEN_LMT					0x0458
-#define REG_AMPDU_MIN_SPACE			0x045C
+#define REG_AMPDU_MIN_SPACE				0x045C
-#define REG_WMAC_LBK_BF_HD			0x045D
+#define REG_WMAC_LBK_BF_HD				0x045D
 #define REG_FAST_EDCA_CTRL				0x0460
 #define REG_RD_RESP_PKT_TH				0x0463
 
@@ -326,24 +326,24 @@
 
 #define REG_POWER_STAGE1				0x04B4
 #define REG_POWER_STAGE2				0x04B8
-#define REG_PKT_VO_VI_LIFE_TIME		0x04C0
+#define REG_PKT_VO_VI_LIFE_TIME			0x04C0
-#define REG_PKT_BE_BK_LIFE_TIME		0x04C2
+#define REG_PKT_BE_BK_LIFE_TIME			0x04C2
 #define REG_STBC_SETTING				0x04C4
 #define REG_QUEUE_CTRL					0x04C6
 #define REG_SINGLE_AMPDU_CTRL			0x04c7
-#define REG_PROT_MODE_CTRL			0x04C8
+#define REG_PROT_MODE_CTRL				0x04C8
 #define REG_MAX_AGGR_NUM				0x04CA
 #define REG_RTS_MAX_AGGR_NUM			0x04CB
 #define REG_BAR_MODE_CTRL				0x04CC
-#define REG_RA_TRY_RATE_AGG_LMT		0x04CF
+#define REG_RA_TRY_RATE_AGG_LMT			0x04CF
 //#define REG_EARLY_MODE_CONTROL		0x04D0
-#define REG_MACID_SLEEP_2			0x04D0
+#define REG_MACID_SLEEP_2				0x04D0
-#define REG_MACID_SLEEP				0x04D4
+#define REG_MACID_SLEEP					0x04D4
 #define REG_NQOS_SEQ					0x04DC
-#define REG_QOS_SEQ					0x04DE
+#define REG_QOS_SEQ						0x04DE
-#define REG_NEED_CPU_HANDLE			0x04E0
+#define REG_NEED_CPU_HANDLE				0x04E0
 #define REG_PKT_LOSE_RPT				0x04E1
-#define REG_PTCL_ERR_STATUS			0x04E2
+#define REG_PTCL_ERR_STATUS				0x04E2
 #define REG_TX_RPT_CTRL					0x04EC
 #define REG_TX_RPT_TIME					0x04F0	// 2 byte
 #define REG_DUMMY						0x04FC
@@ -358,12 +358,12 @@
 #define REG_EDCA_BE_PARAM				0x0508
 #define REG_EDCA_BK_PARAM				0x050C
 #define REG_BCNTCFG						0x0510
-#define REG_PIFS							0x0512
+#define REG_PIFS						0x0512
 #define REG_RDG_PIFS					0x0513
 #define REG_SIFS_CTX					0x0514
 #define REG_SIFS_TRX					0x0516
 #define REG_TSFTR_SYN_OFFSET			0x0518
-#define REG_AGGR_BREAK_TIME			0x051A
+#define REG_AGGR_BREAK_TIME				0x051A
 #define REG_SLOT						0x051B
 #define REG_TX_PTCL_CTRL				0x0520
 #define REG_TXPAUSE						0x0522
@@ -394,9 +394,9 @@
 #define REG_BCN_INTERVAL				0x0554	// The same as REG_MBSSID_BCN_SPACE
 #define REG_DRVERLYINT					0x0558
 #define REG_BCNDMATIM					0x0559
-#define REG_ATIMWND					0x055A
+#define REG_ATIMWND						0x055A
 #define REG_USTIME_TSF					0x055C
-#define REG_BCN_MAX_ERR				0x055D
+#define REG_BCN_MAX_ERR					0x055D
 #define REG_RXTSF_OFFSET_CCK			0x055E
 #define REG_RXTSF_OFFSET_OFDM			0x055F	
 #define REG_TSFTR						0x0560
@@ -408,17 +408,17 @@
 #define REG_TIMER1						0x0588
 #define REG_ACMHWCTRL					0x05C0
 #define REG_NOA_DESC_SEL				0x05CF
-#define REG_NOA_DESC_DURATION		0x05E0
+#define REG_NOA_DESC_DURATION			0x05E0
 #define REG_NOA_DESC_INTERVAL			0x05E4
-#define REG_NOA_DESC_START			0x05E8
+#define REG_NOA_DESC_START				0x05E8
-#define REG_NOA_DESC_COUNT			0x05EC
+#define REG_NOA_DESC_COUNT				0x05EC
 
 #define REG_DMC							0x05F0	//Dual MAC Co-Existence Register
 #define REG_SCH_TX_CMD					0x05F8
 
-#define REG_FW_RESET_TSF_CNT_1		0x05FC
+#define REG_FW_RESET_TSF_CNT_1			0x05FC
-#define REG_FW_RESET_TSF_CNT_0		0x05FD
+#define REG_FW_RESET_TSF_CNT_0			0x05FD
-#define REG_FW_BCN_DIS_CNT			0x05FE
+#define REG_FW_BCN_DIS_CNT				0x05FE
 
 //-----------------------------------------------------
 //
@@ -430,7 +430,7 @@
 #define REG_TCR							0x0604
 #define REG_RCR							0x0608
 #define REG_RX_PKT_LIMIT				0x060C
-#define REG_RX_DLK_TIME				0x060D
+#define REG_RX_DLK_TIME					0x060D
 #define REG_RX_DRVINFO_SZ				0x060F
 
 #define REG_MACID						0x0610
@@ -438,15 +438,15 @@
 #define REG_MAR							0x0620
 #define REG_MBIDCAMCFG					0x0628
 
-#define REG_USTIME_EDCA				0x0638
+#define REG_USTIME_EDCA					0x0638
 #define REG_MAC_SPEC_SIFS				0x063A
 // 20100719 Joseph: Hardware register definition change. (HW datasheet v54)
 #define REG_RESP_SIFS_CCK				0x063C	// [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK
-#define REG_RESP_SIFS_OFDM                    0x063E	// [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK
+#define REG_RESP_SIFS_OFDM              0x063E	// [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK
 
 #define REG_ACKTO						0x0640
 #define REG_CTS2TO						0x0641
-#define REG_EIFS							0x0642
+#define REG_EIFS						0x0642
 
 #define REG_PORT_CTRL					0x076D
 
@@ -454,19 +454,19 @@
 #define RXERR_TYPE_OFDM_PPDU			0
 #define RXERR_TYPE_OFDM_FALSE_ALARM 	1
 #define RXERR_TYPE_OFDM_MPDU_OK 		2
-#define RXERR_TYPE_OFDM_MPDU_FAIL	3
+#define RXERR_TYPE_OFDM_MPDU_FAIL		3
 #define RXERR_TYPE_CCK_PPDU 			4
-#define RXERR_TYPE_CCK_FALSE_ALARM	5
+#define RXERR_TYPE_CCK_FALSE_ALARM		5
-#define RXERR_TYPE_CCK_MPDU_OK		6
+#define RXERR_TYPE_CCK_MPDU_OK			6
 #define RXERR_TYPE_CCK_MPDU_FAIL		7
 #define RXERR_TYPE_HT_PPDU				8
-#define RXERR_TYPE_HT_FALSE_ALARM	9
+#define RXERR_TYPE_HT_FALSE_ALARM		9
 #define RXERR_TYPE_HT_MPDU_TOTAL		10
 #define RXERR_TYPE_HT_MPDU_OK			11
 #define RXERR_TYPE_HT_MPDU_FAIL 		12
 #define RXERR_TYPE_RX_FULL_DROP 		15
 
-#define RXERR_COUNTER_MASK			0xFFFFF
+#define RXERR_COUNTER_MASK				0xFFFFF
 #define RXERR_RPT_RST					BIT(27)
 #define _RXERR_RPT_SEL(type)			((type) << 28)
 
@@ -493,7 +493,7 @@
 // Security
 #define REG_CAMCMD						0x0670
 #define REG_CAMWRITE					0x0674
-#define REG_CAMREAD					0x0678
+#define REG_CAMREAD						0x0678
 #define REG_CAMDBG						0x067C
 #define REG_SECCFG						0x0680
 
@@ -501,13 +501,13 @@
 #define REG_WOW_CTRL					0x0690
 #define REG_PS_RX_INFO					0x0692
 #define REG_UAPSD_TID					0x0693
-#define REG_WKFMCAM_CMD				0x0698
+#define REG_WKFMCAM_CMD					0x0698
-#define REG_WKFMCAM_NUM				REG_WKFMCAM_CMD
+#define REG_WKFMCAM_NUM					REG_WKFMCAM_CMD
-#define REG_WKFMCAM_RWD				0x069C
+#define REG_WKFMCAM_RWD					0x069C
 #define REG_RXFLTMAP0					0x06A0
 #define REG_RXFLTMAP1					0x06A2
 #define REG_RXFLTMAP2					0x06A4
-#define REG_BCN_PSR_RPT				0x06A8
+#define REG_BCN_PSR_RPT					0x06A8
 #define REG_BT_COEX_TABLE				0x06C0
 
 // Hardware Port 2
@@ -515,7 +515,7 @@
 #define REG_BSSID1						0x0708
 
 /* port0 & port1 enable */
-#define REG_PORT_CTRL					0x76D
+// #define REG_PORT_CTRL					0x76D
 
 //-----------------------------------------------------
 //
@@ -523,8 +523,8 @@
 //
 //-----------------------------------------------------
 #define REG_USB_INFO					0xFE17
-#define REG_USB_SPECIAL_OPTION		0xFE55
+#define REG_USB_SPECIAL_OPTION			0xFE55
-#define REG_USB_DMA_AGG_TO			0xFE5B
+#define REG_USB_DMA_AGG_TO				0xFE5B
 #define REG_USB_AGG_TO					0xFE5C
 #define REG_USB_AGG_TH					0xFE5D
 
@@ -872,7 +872,7 @@ Default: 00b.
 #define IMR_PSTIMEOUT			BIT14		// Power save time out interrupt 
 #define IMR_BcnInt				BIT13		// Beacon DMA Interrupt 0
 #define IMR_RXFOVW				BIT12		// Receive FIFO Overflow
-#define IMR_RDU					BIT11		// Receive Descriptor Unavailable
+#define IMR_RDU_				BIT11		// Receive Descriptor Unavailable
 #define IMR_ATIMEND				BIT10		// For 92C,ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt.
 #define IMR_BDOK				BIT9		// Beacon Queue DMA OK Interrup
 #define IMR_HIGHDOK				BIT8		// High Queue DMA OK Interrupt

USDK/component/common/drivers/wlan/realtek/include/rtw_recv.h

@@ -846,7 +846,7 @@ __inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem)
 
 __inline static union recv_frame *pkt_to_recvframe(_pkt *pkt)
 {
-
+	(void) pkt;
 	u8 * buf_star = NULL;
 	union recv_frame * precv_frame = NULL;
 #ifdef PLATFORM_WINDOWS

USDK/component/common/drivers/wlan/realtek/src/osdep/freertos/wrapper.h

@@ -143,8 +143,8 @@ void list_add(struct list_head *new, struct list_head *head);
 void list_add_tail(struct list_head *new, struct list_head *head);
 #endif
 
-extern void save_and_cli(void);
+//extern void save_and_cli(void);
-extern void restore_flags(void);
+//extern void restore_flags(void);
 //----- ------------------------------------------------------------------
 // SKB Operation
 //----- ------------------------------------------------------------------

USDK/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c

@@ -133,7 +133,7 @@ void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len)
 
 	DBG_TRACE("%s is called", __FUNCTION__);
 	
-    if (!rltk_wlan_check_isup(idx))
+    if (rltk_wlan_check_isup(idx) == 0)
         return;
 	
 	if(idx == -1){

USDK/component/common/mbed/common/wait_api.c

@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+#include "FreeRTOS.h"
+#include "task.h"
 #include "wait_api.h"
 #include "us_ticker_api.h"
 
@@ -79,6 +81,7 @@ typedef struct
 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
 #endif
 
+
 void wait(float s) { // До 1073741 секунд? 298 часов
 //	wait_us((int)(s * 1000000.0f));
 	vTaskDelay((int)(s * 1000.0f));

USDK/component/common/mbed/hal_ext/flash_eep.h

@@ -17,9 +17,9 @@ extern "C" {
 #include <queue.h>
 
 //-----------------------------------------------------------------------------
-#ifndef FLASH_SECTOR_SIZE
+//#ifndef FLASH_SECTOR_SIZE
-	#define FLASH_SECTOR_SIZE 		4096
+//	#define FLASH_SECTOR_SIZE 		4096
-#endif
+//#endif
 #define FLASH_SECTORS 			256	// 1 Mbytes
 #define FLASH_CHIP_SIZE			(FLASH_SECTORS * FLASH_SECTOR_SIZE)
 #define FMEMORY_SCFG_BANK_SIZE	FLASH_SECTOR_SIZE // размер сектора, 4096 bytes

USDK/component/common/mbed/targets/hal/rtl8195a/PinNames.h

@@ -194,7 +194,7 @@ typedef enum {
     PWM_OUT     = PD_4,
 */
     // Not connected
-    NC = (uint32_t)0xFFFFFFFF
+    NC = -1 // (uint32_t)0xFFFFFFFF
 } PinName;
 
 typedef enum {

USDK/component/common/mbed/targets/hal/rtl8195a/analogin_api.c

@@ -124,7 +124,7 @@ float analogin_read(analogin_t *obj){
 		unsigned short 	us[4];
 	} adata;
 	PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
-	RtkADCReceiveBuf(p, &adata.ui);
+	RtkADCReceiveBuf(p, (u32  *) &adata.ui);
     return (float)(adata.us[p->DevNum]) / (float)(0xCE80);
 /*
     uint32_t AnaloginTmp[2]      = {0,0};
@@ -161,7 +161,7 @@ uint16_t analogin_read_u16(analogin_t *obj){
 		unsigned short 	us[4];
 	} adata;
 	PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
-	RtkADCRxManualRotate(p, &adata.ui);
+	RtkADCRxManualRotate(p, (u32  *) &adata.ui);
 	return adata.us[p->DevNum];
 /*
     uint32_t AnaloginTmp[2]      = {0,0};

USDK/component/common/mbed/targets/hal/rtl8195a/flash_api.c

@@ -592,6 +592,8 @@ unsigned int flash_get_size(flash_t *obj) {
 /*
  * Read Flash OTP data
  */
+extern void SpicTxCmdWithDataRtl8195A(u8 cmd, u8 DataPhaseLen, u8* pData, SPIC_INIT_PARA SpicInitPara);
+
 int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length,
 		uint8_t * data) {
 	int ret = 1;

USDK/component/common/mbed/targets/hal/rtl8195a/flash_eep.c

@@ -350,7 +350,7 @@ LOCAL FLASH_EEP_ATTR unsigned int pack_cfg_fmem(fobj_head obj)
 #if 0
 				copy_align4_to_align1((uint8 *)pbuf, rdaddr, len);
 #else
-				SpicUserReadFourByteRtl8195A(len, rdaddr, (unsigned int *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
+				SpicUserReadFourByteRtl8195A(len, rdaddr, (u32 *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
 #endif
 				int i = 0;
 				int size4b = len >> 2;

USDK/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c

@@ -44,6 +44,8 @@ const PinMap PinMap_PWM[] = {
     {NC,    NC,     0}
 };
  
+extern void * rtl_memset(void * m , int c , size_t n);
+
 int pwmout_init(pwmout_t* obj, PinName pin)
 {
     uint32_t peripheral;

USDK/component/common/mbed/targets/hal/rtl8195a/sys_api.c

@@ -26,11 +26,16 @@
 #define OTA_Signature_len		8
 #define OTA_Signature_offset	8
 #define OTA_valid_offset		0x100000
+
+#undef printf
 #define printf					DiagPrintf
 
 #if !defined(__ICCARM__)
+#undef memcmp
 #define memcmp(dst, src, sz)      _memcmp(dst, src, sz)
+#undef memset
 #define memset(dst, val, sz)      _memset(dst, val, sz)
+#undef memcpy
 #define memcpy(dst, src, sz)      _memcpy(dst, src, sz)
 #endif  // #if !defined(__ICCARM__)
 

USDK/component/common/network/dhcp/dhcps.h

@@ -30,8 +30,8 @@
 #define DHCP_MESSAGE_HTYPE 				(1)
 #define DHCP_MESSAGE_HLEN  				(6)
 
-#define DHCP_SERVER_PORT  				(67)
+//#define DHCP_SERVER_PORT  				(67) // in dhcp.h
-#define DHCP_CLIENT_PORT  				(68)
+//#define DHCP_CLIENT_PORT  				(68) // in dhcp.h
 
 #define DHCP_MESSAGE_TYPE_DISCOVER  			(1)
 #define DHCP_MESSAGE_TYPE_OFFER     			(2)

USDK/component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c

@@ -91,9 +91,11 @@ static void arp_timer(void *arg);
 
 #if LWIP_NETIF_HOSTNAME
 char lwip_host_name[NET_IF_NUM][LWIP_NETIF_HOSTNAME_SIZE] = {
-		DEF_HOSTNAME"0",
+		{ DEF_HOSTNAME "0" },
-		DEF_HOSTNAME"1",
+		{ DEF_HOSTNAME "1" }
-		DEF_HOSTNAME"2"
+#if NET_IF_NUM > 2
+		,{ DEF_HOSTNAME "2" }
+#endif
 };
 #endif
 

USDK/component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c

@@ -128,7 +128,9 @@ struct netif *
 ip_route(ip_addr_t *dest)
 {
   struct netif *netif;
+#if CONFIG_ETHERNET
   struct netif *last_netif = NULL;
+#endif
 
 #ifdef LWIP_HOOK_IP4_ROUTE
   netif = LWIP_HOOK_IP4_ROUTE(dest);

USDK/component/common/network/lwip/lwip_v1.4.1/src/include/ipv4/lwip/ip_addr.h

@@ -217,10 +217,12 @@ u8_t ip4_addr_netmask_valid(u32_t netmask);
                       ipaddr != NULL ? ip4_addr4_16(ipaddr) : 0))
 
 /* Get one byte from the 4-byte address */
+#ifndef ip4_addr1
 #define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
 #define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
 #define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
 #define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
+#endif
 /* These are cast to u16_t, with the intent that they are often arguments
  * to printf using the U16_F format from cc.h. */
 #define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))

USDK/component/common/network/netbios/netbios.c

@@ -163,9 +163,9 @@ PACK_STRUCT_END
 #  include "arch/epstruct.h"
 #endif
 
-//#define toupper(CH) \
+//#define toupper(CH) (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
-//  (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
 
+extern int toupper(int ch);
 
 /** NetBIOS decoding name */
 static int8_t NETBIOS_CODE_ATTR NBNS_decode(char *dst, char *src)
@@ -226,7 +226,7 @@ netbios_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p, ip_addr_t *addr,
 		if (current_netif != NULL && current_netif->num < NET_IF_NUM) {
 			uint32 ip = current_netif->ip_addr.addr;
 			char *curbiosname = netbios_name[current_netif->num];
-			if (curbiosname[0] != '\0' && ip != NULL
+			if (curbiosname[0] != '\0' && ip != 0
 			/* we only answer if we got a default interface */
 			&& (((ip ^ addr->addr) & current_netif->netmask.addr) == 0)) { // запрет ответа другой подсети
 #if DEBUGSOO > 3

USDK/component/common/network/sntp/sntp.c

@@ -159,7 +159,7 @@ void sntp_get_lasttime(long *sec, long *usec, unsigned int *tick)
 
 time_t sntp_gen_system_time(int timezone)
 {
-	struct tm current_tm;
+//	struct tm current_tm;
 	unsigned int update_tick;
 	long update_sec, update_usec, current_sec = 0;
 

USDK/component/os/freertos/freertos_service.c

@@ -7,7 +7,8 @@
 #include <osdep_service.h>
 #include <stdio.h>
 #include <freertos_pmu.h>
-//#include <tcm_heap.h>
+#include <tcm_heap.h>
+#include <netdev.h>
 /********************* os depended utilities ********************/
 
 #ifndef USE_MUTEX_FOR_SPINLOCK
@@ -549,7 +550,9 @@ static u32 _freertos_GetFreeHeapSize(void)
 {
 	return (u32)xPortGetFreeHeapSize();
 }
-void *tcm_heap_malloc(int size);
+
+//extern void *tcm_heap_malloc(int size);
+
 static int _freertos_create_task(struct task_struct *ptask, const char *name,
 	u32  stack_size, u32 priority, thread_func_t func, void *thctx)
 {
@@ -576,7 +579,7 @@ static int _freertos_create_task(struct task_struct *ptask, const char *name,
 
 	priority += tskIDLE_PRIORITY + PRIORITIE_OFFSET;
 
-	if(rtw_if_wifi_thread(name) == 0){
+	if(rtw_if_wifi_thread((char *)name) == 0){
 
 #if CONFIG_USE_TCM_HEAP
 		void *stack_addr = tcm_heap_malloc(stack_size*sizeof(int));

USDK/component/os/freertos/freertos_v9.0.0/Source/include/portable.h

@@ -162,7 +162,7 @@ typedef struct HeapRegion
  * terminated by a HeapRegions_t structure that has a size of 0.  The region
  * with the lowest start address must appear first in the array.
  */
-static void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+//static void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
 
 
 /*

USDK/component/os/freertos/freertos_v9.0.0/Source/include/task.h

@@ -376,7 +376,7 @@ BaseType_t xTaskGenericCreate( TaskFunction_t pxTaskCode,
 								TaskHandle_t * const pxCreatedTask,
 								StackType_t * const puxStackBuffer,
 								const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
-#define xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskGenericCreate( ( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( NULL ), ( NULL ) )
+#define xTaskCreate(pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskGenericCreate( (TaskFunction_t)( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( NULL ), ( NULL ) )
 #else
 	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
 							const char * const pcName,

USDK/component/os/freertos/freertos_v9.0.0/Source/portable/GCC/ARM_CM3/port.c

@@ -689,6 +689,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
 #endif /* configASSERT_DEFINED */
 /*-----------------------------------------------------------*/
 #if configUSE_IDLE_HOOK
+extern void WDGRefresh(void);
 void vApplicationIdleHook( void )
 {
 	/* Use the idle task to place the CPU into a low power mode.  Greater power

USDK/component/os/freertos/freertos_v9.0.0/Source/portable/MemMang/heap_5.c

@@ -134,6 +134,7 @@ typedef struct A_BLOCK_LINK {
 	size_t xBlockSize; /*<< The size of the free block. */
 } BlockLink_t;
 
+static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions);
 /*-----------------------------------------------------------*/
 
 /*
@@ -502,7 +503,7 @@ static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions) {
 	uint8 chip_id = HalGetChipId();
 	while (pxHeapRegion->xSizeInBytes > 0) {
 		if (pxHeapRegion->pucStartAddress
-				> 0x20000000 && chip_id >= CHIP_ID_8711AN && chip_id <= CHIP_ID_8711AF) {
+				> (uint8_t *) 0x20000000 && chip_id >= CHIP_ID_8711AN && chip_id <= CHIP_ID_8711AF) {
 //				pxHeapRegion->pucStartAddress = 0;
 //				pxHeapRegion->xSizeInBytes = 0;
 //				DBG_8195A("ChipID: %p !\n", chip_id);
@@ -584,6 +585,8 @@ static void vPortDefineHeapRegions(const HeapRegion_t * const pxHeapRegions) {
 
 }
 
+extern _LONG_CALL_ void * __rtl_memcpy_v1_00(void * __restrict dst0 , const void * __restrict src0 , size_t len0);
+
 void* pvPortReAlloc(void *pv, size_t xWantedSize) {
 	BlockLink_t *pxLink;
 
@@ -612,7 +615,7 @@ void* pvPortReAlloc(void *pv, size_t xWantedSize) {
 
 			int oldSize = (pxLink->xBlockSize & ~xBlockAllocatedBit) - uxHeapStructSize;
 			int copySize = (oldSize < xWantedSize) ? oldSize : xWantedSize;
-			rtl_memcpy(newArea, pv, copySize);
+			__rtl_memcpy_v1_00(newArea, pv, copySize);
 
 			vTaskSuspendAll();
 			{

USDK/component/os/freertos/freertos_v9.0.0/Source/tasks.c

@@ -81,6 +81,7 @@ task.h is included from an application file. */
 #include "FreeRTOS.h"
 #include "task.h"
 #include "timers.h"
+#include "tcm_heap.h"
 #include "StackMacros.h"
 
 /* Lint e961 and e750 are suppressed as a MISRA exception justified because the

USDK/component/os/os_dep/include/osdep_service.h

@@ -1296,7 +1296,7 @@ struct osdep_service_ops {
 	int (*ATOMIC_INC_RETURN)(ATOMIC_T *v);
 	int (*ATOMIC_DEC_RETURN)(ATOMIC_T *v);
 	u64 (*rtw_modular64)(u64 x, u64 y);
-	int (*rtw_get_random_bytes)(void* dst, u32 size);
+	int (*rtw_get_random_bytes)(void* dst, size_t size);
 	u32 (*rtw_getFreeHeapSize)(void);
 	int (*rtw_create_task)(struct task_struct *task, const char *name, u32 stack_size, u32 priority, thread_func_t func, void *thctx);
 	void (*rtw_delete_task)(struct task_struct *task);

USDK/component/os/os_dep/osdep_service.c

@@ -5,6 +5,7 @@
  ******************************************************************************/
 
 #include <osdep_service.h>
+#include "tcm_heap.h"
 #define OSDEP_DBG(x, ...) do {} while(0)
 
 extern struct osdep_service_ops osdep_service;

USDK/component/soc/realtek/8195a/fwlib/hal_dac.h

@@ -287,6 +287,7 @@ RtkDACIdxChk(
     IN  u8  DACIdx
 )
 {
+	(void) DACIdx;
 #if !DAC0_USED
     if (DACIdx == DAC0_SEL)
         return _EXIT_FAILURE;

USDK/component/soc/realtek/8195a/fwlib/hal_diag.h

@@ -72,10 +72,10 @@ typedef struct _LOG_UART_ADAPTER_ {
 }LOG_UART_ADAPTER, *PLOG_UART_ADAPTER;
 
 typedef struct _COMMAND_TABLE_ {
-    const   u8* cmd;
+    const   char * cmd;
     u16     ArgvCnt;
-    u32     (*func)(u16 argc, u8* argv[]);
+    void     (*func)(int argc, char * argv[]);
-    const   u8* msg;
+    const   char * msg;
 }COMMAND_TABLE, *PCOMMAND_TABLE;
 
 //VOID

USDK/component/soc/realtek/8195a/fwlib/hal_gpio.h

@@ -190,11 +190,11 @@ typedef struct _HAL_GPIO_PIN_ {
     u32 pin_name;    // Pin: [7:5]: port number, [4:0]: pin number
 }HAL_GPIO_PIN, *PHAL_GPIO_PIN;
 
-typedef struct _HAL_GPIO_OP_ {
 #if defined(__ICCARM__)
+typedef struct _HAL_GPIO_OP_ {
     void* dummy;
-#endif
 }HAL_GPIO_OP, *PHAL_GPIO_OP;
+#endif
 
 typedef void (*GPIO_IRQ_FUN)(VOID *Data, u32 Id);
 typedef void (*GPIO_USER_IRQ_FUN)(u32 Id);

USDK/component/soc/realtek/8195a/fwlib/hal_i2c.h

@@ -288,7 +288,7 @@ typedef enum _I2C_ERR_TYPE_ {
 // I2C Time Out type
 typedef enum _I2C_TIMEOUT_TYPE_ {
     I2C_TIMEOOUT_DISABLE    =   0x00,           
-    I2C_TIMEOOUT_ENDLESS    =   0xFFFFFFFF,
+    I2C_TIMEOOUT_ENDLESS    =   -1 // 0xFFFFFFFF,
 }I2C_TIMEOUT_TYPE, *PI2C_TIMEOUT_TYPE;
 
 //======================================================

USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c

@@ -116,7 +116,7 @@ HAL_CUT_B_RAM_DATA_SECTION u32 rand_x = 123456789; // 10000be4
     0, \
     "", \
     0, \
-	0x0437DC, \
+	(void *)0x0437DC, \
     0, \
     _NULL, \
     _NULL, \

USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c

@@ -257,7 +257,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION SetSpicBitMode(uint8 BitMode) {
 }
 
 void BOOT_RAM_TEXT_SECTION InitSpicFlashType(struct spic_table_flash_type *ptable_flash) {
-	u8 * ptrb = &ptable_flash->cmd;
+	u8 * ptrb = (u8 *) &ptable_flash->cmd;
 	volatile u32 * ptrreg = (volatile u32 *)(SPI_FLASH_CTRL_BASE + REG_SPIC_READ_FAST_SINGLE);// 0x400060E0
     HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); // Disable SPI_FLASH User Mode
 	do	{
@@ -404,7 +404,7 @@ LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000,
 
 LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
 	uint32 ret = SEG_ID_ERR;
-	uint32 * ptr = &tab_seg_def;
+	uint32 * ptr = (uint32 *) &tab_seg_def;
 	if (size > 0) {
 		do {
 			ret++;
@@ -447,7 +447,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr,
 					segnum, faddr, txt_tab_seg[seg_id], hdr->seg.ldaddr,
 					hdr->seg.size);
 #endif
-			fnextaddr += flashcpy(fnextaddr, hdr->seg.ldaddr, hdr->seg.size);
+			fnextaddr += flashcpy(fnextaddr, (void *)hdr->seg.ldaddr, hdr->seg.size);
 		} else if (seg_id) {
 #if CONFIG_DEBUG_LOG > 2
 			DBG_8195A("Skip Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", segnum,
@@ -476,7 +476,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int imgnum) {
 		faddr = (faddr + FLASH_SECTOR_SIZE - 1) & (~(FLASH_SECTOR_SIZE - 1));
 		uint32 img_id = load_img2_head(faddr, &hdr);
 		if ((img_id >> 8) > 4 || (uint8) img_id != 0) {
-			faddr = load_segs(faddr + 0x10, &hdr.seg, imagenum == imgnum);
+			faddr = load_segs(faddr + 0x10, (PIMG2HEAD) &hdr.seg, imagenum == imgnum);
 			if (imagenum == imgnum) {
 //				DBG_8195A("Image%d: %s\n", imgnum, hdr.name);
 				break;
@@ -535,6 +535,8 @@ LOCAL uint8 BOOT_RAM_TEXT_SECTION IsForceLoadDefaultImg2(void) {
 	return result;
 }
 
+extern _LONG_CALL_ void RtlConsolTaskRom(void *Data);
+
 /* RTL Console ROM */
 LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) {
 //	DiagPrintf("\r\nRTL Console ROM\r\n");
@@ -544,7 +546,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) {
 	pUartLogCtl->pTmpLogBuf->UARTLogBuf[0] = '?';
 	pUartLogCtl->pTmpLogBuf->BufCount = 1;
 	pUartLogCtl->ExecuteCmd = 1;
-	RtlConsolTaskRom(pUartLogCtl);
+	RtlConsolTaskRom((void *) pUartLogCtl);
 }
 
 /* Enter Image 1.5 */

USDK/component/soc/realtek/8195a/fwlib/ram_lib/startup.c

@@ -26,6 +26,15 @@ extern void xPortPendSVHandler(void);
 extern void xPortSysTickHandler(void);
 extern void vPortSVCHandler(void);
 extern void rtl_libc_init(void);
+extern _LONG_CALL_ void HalCpuClkConfig(unsigned char CpuType);
+extern void PSHalInitPlatformLogUart(void);
+extern _LONG_CALL_ void UartLogCmdExecute(PUART_LOG_CTL pUartLogCtlExe);
+extern void HalReInitPlatformTimer(void);
+extern void SystemCoreClockUpdate (void);
+extern void En32KCalibration(void);
+extern void SdrCtrlInit(void);
+extern void InitSoCPM(void);
+extern u32 SdrControllerInit(void);
 //extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID)
 //void HalNMIHandler_Patch(void);
 void SDIO_Device_Off(void);
@@ -97,7 +106,7 @@ __weak int main(void) {
 	DiagPrintf("\r<RTL>");
 	while (1) {
 		while (pUartLogCtl->ExecuteCmd != 1);
-		UartLogCmdExecute(pUartLogCtl);
+		UartLogCmdExecute((PUART_LOG_CTL) pUartLogCtl);
 		DiagPrintf("\r<RTL>");
 		pUartLogCtl->ExecuteCmd = 0;
 	}

USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c

@@ -245,7 +245,7 @@ HAL_Status HalSsiInitRtl8195a_Patch(VOID *Adaptor)
     u32  IRQ_UNKNOWN  = 999;
     u32  Ctrlr0Value  = 0;
     u32  Ctrlr1Value  = 0;
-    u32  SerValue     = 0;
+    u32  SerValue;
     u32  BaudrValue   = 0;
     u32  TxftlrValue  = 0;
     u32  RxftlrValue  = 0;
@@ -617,7 +617,7 @@ HAL_Status HalSsiSetFormatRtl8195a(VOID *Adaptor)
     u32 RxftlrValue = 0;
     u8   Index = pHalSsiAdaptor->Index;
     u8   Role  = pHalSsiAdaptor->Role;
-	u32 Spi_mode = 0;
+	u32 Spi_mode;
 
     if (Index > 2) {
         DBG_SSI_ERR("HalSsiSetFormatRtl8195a: Invalid SSI Idx %d\r\n", Index);
@@ -741,7 +741,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
 {
     PHAL_SSI_ADAPTOR pHalSsiAdapter = (PHAL_SSI_ADAPTOR) Adapter;
     u32 RxFifoThresholdLevel;
-    u8  Index = pHalSsiAdapter->Index;
+//    u8  Index = pHalSsiAdapter->Index;
 
     DBG_SSI_INFO("HalSsiIntReadRtl8195a: Idx=%d, RxData=0x%x, Len=0x%x\r\n", Index, RxData, Length);
 //    if (HalSsiBusyRtl8195a(Adapter)) {

USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c

@@ -12,6 +12,7 @@
 #include "rtl8195a_uart.h"
 #include "hal_uart.h"
 #include "hal_gdma.h"
+#include "strproc.h"
 
 u8
 HalRuartGetChipVerRtl8195a(VOID)

USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c

@@ -1,8 +1,12 @@
 
 #include "bitband_io.h"
+//#include "rtl8195a_gpio.h"
+
+#define BITBAND_ADDR(a,b)	(0x02000000 + (a & 0xF0000000) + (a - (a & 0xF0000000)) * 32 + ((b) * 4))	// Convert address ?
 
 volatile uint8_t * BitBandAddr(void *addr, uint8_t bit) {
-	return (volatile uint8_t *)(BITBAND_ADDR((u32)addr, bit));
+	uint32_t ret = BITBAND_ADDR((u32)addr, bit);
+	return (volatile uint8_t *) ret;
 }
 
 volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
@@ -10,7 +14,7 @@ volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
 }
 
 volatile uint8_t * GetOutPinBitBandAddr(PinName pin) {
-	uint32_t paddr = NULL;
+	volatile uint8_t * paddr = 0;
 	uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
 	if(ippin < 0xff) {
 		// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
@@ -29,6 +33,9 @@ volatile uint8_t * GetInPinBitBandAddr(PinName pin) {
 	return paddr;
 }
 
+extern _LONG_CALL_ u32 GPIO_FuncOn_8195a(VOID);
+extern void wait_us(int us);
+
 volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
 {
 	volatile uint8_t *paddr = NULL;
@@ -39,7 +46,8 @@ volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
 			_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
 		}
 		if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
-		delayMicroseconds(100);
+		wait_us(100);
+		// delayMicroseconds(100);
 		// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
 #if CONFIG_DEBUG_LOG > 3		
 		GpioFunctionChk(ippin, ENABLE);

USDK/component/soc/realtek/8195a/fwlib/src/hal_misc.c

@@ -34,7 +34,7 @@ void HalReInitPlatformTimer(void)
   TimerAdapter.IrqDis = 1;
   TimerAdapter.TimerId = 1;
   HalTimerOpInit_Patch(&HalTimerOp);
-  HAL_TIMER_OP x;
+//  HAL_TIMER_OP x;
   HalTimerOp.HalTimerInit(&TimerAdapter);
   HalTimerOp.HalTimerEn(1);
 }

USDK/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c

@@ -1044,7 +1044,7 @@ Sdr_Rand2(
 }
 
 */
-
+extern __attribute__ ((long_call)) unsigned int Rand(void);
 HAL_SDRC_TEXT_SECTION 
 s32 
 MemTest(

USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c

@@ -541,7 +541,7 @@ VOID SleepPwrGatted(
     u32 Rtemp = 0;
     u32 ScaleTemp = 0;
     u32 PeriodTemp = 0;
-    u32 CalTemp = 0;
+
 
     //Backup CPU CLK
     BackupCPUClk();
@@ -553,7 +553,7 @@ VOID SleepPwrGatted(
     //3 1.1 Set TU timer timescale
     //0x4000_0090[21:16] = 6'h1F
     //0x4000_0090[15] = 1'b0 => Disable timer
-    CalTemp = (CLKCal(ANACK) << 16);
+    u32 CalTemp = (CLKCal(ANACK) << 16);
     Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
     		& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) |  (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
     		| ScaleTemp;
@@ -608,7 +608,6 @@ DStandby(
     u32 Rtemp = 0;
     u32 ScaleTemp = 0;
     u32 PeriodTemp = 0;
-    u32 CalTemp = 0;
 
     //Backup CPU CLK
     BackupCPUClk();
@@ -621,7 +620,7 @@ DStandby(
     //3 1.1 Set TU timer timescale
     //0x4000_0090[21:16] = 6'h1F
     //0x4000_0090[15] = 1'b0 => Disable timer
-    CalTemp = (CLKCal(ANACK) << 16);
+    u32 CalTemp = (CLKCal(ANACK) << 16);
     Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
     		& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) |  (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
     		| ScaleTemp;
@@ -679,7 +678,7 @@ DSleep(
     u32 UTemp = 0;
     u32 MaxTemp = 0;
  
-    u32 Reada335 = 0;
+    u32 Reada335;
 
     //2 Deep Sleep mode:
     //3 2.1 Set TU timer timescale

USDK/component/soc/realtek/8195a/misc/driver/rtl_console_new.c

@@ -44,7 +44,7 @@ IN u8 EchoFlag);
 //_LONG_CALL_ extern void UartLogCmdExecute(IN PUART_LOG_CTL pUartLogCtlExe);
 //======================================================
 extern PCOMMAND_TABLE UartLogRamCmdTable[];
-extern UartLogRamCmdTableSize;
+extern int UartLogRamCmdTableSize;
 //======================================================
 //<Function>:  UartLogIrqHandleRam
 //<Usage   >:  To deal with Uart-Log RX IRQ
@@ -61,7 +61,7 @@ void UartLogIrqHandleRam(void * Data) {
 	if (UartReceiveData == 0) {
 		goto exit;
 	}
-	PUART_LOG_CTL p = pUartLogCtl;
+	PUART_LOG_CTL p = (PUART_LOG_CTL) pUartLogCtl;
 	//KB_ESC chk is for cmd history, it's a special case here.
 	if (UartReceiveData == KB_ASCII_ESC) {
 		// Esc detection is only valid in the first stage of boot sequence (few seconds)
@@ -130,7 +130,7 @@ int GetArgvRam(IN u8 *pstr, u8** argv) {
 	int arvc = 0;
 //	u8** argv = ArgvArray;
 	u8* p = pstr;
-	u8 t, n = ' ';
+	u8 t = 0, n = ' ';
 	int m = 0;
 	while(*p != 0
 		&& *p != '\r'
@@ -200,7 +200,7 @@ int GetArgvRam(IN u8 *pstr, u8** argv) {
 //<Notes   >:
 //======================================================
 MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
-	PUART_LOG_CTL p = pUartLogCtl;
+	PUART_LOG_CTL p = (PUART_LOG_CTL) pUartLogCtl;
 #ifdef USE_ROM_CONSOLE // show Help
 	p->pTmpLogBuf->UARTLogBuf[0] = '?';
 	p->pTmpLogBuf->BufCount = 1;
@@ -225,9 +225,9 @@ MON_RAM_TEXT_SECTION void RtlConsolTaskRam(void *Data) {
 						flg = 0;
 						if(pcmd->ArgvCnt < argc) {
 #ifdef USE_ROM_CONSOLE
-							pcmd->func(argc-1, &ArgvArray[1]);
+							pcmd->func(argc-1, (char **) &ArgvArray[1]);
 #else
-							pcmd->func(argc, &ArgvArray);
+							pcmd->func(argc, (char **) &ArgvArray);
 #endif
 						} else {
 #ifdef USE_ROM_CONSOLE
@@ -291,7 +291,7 @@ MON_RAM_TEXT_SECTION void console_init(void) {
 #endif
 	pUartLogCtl->RevdNo = UART_LOG_HISTORY_LEN;
 	// Create a Semaphone
-	rtw_init_sema(&pUartLogCtl->Sema, 1);
+	rtw_init_sema((_sema *)&pUartLogCtl->Sema, 1);
 	// executing boot sequence
 	pUartLogCtl->ExecuteCmd = _FALSE;
 	pUartLogCtl->ExecuteEsc = _TRUE;		//don't check Esc anymore
@@ -316,7 +316,7 @@ extern char str_rom_57ch3Dch0A[]; // "==========================================
 _WEAK void console_help(int argc, char *argv[]) { 	// Help
 	DiagPrintf("CONSOLE COMMAND SET:\n");
 	DiagPrintf(&str_rom_57ch3Dch0A[25]); //	DiagPrintf("==============================\n");
-	PCOMMAND_TABLE pcmdtab = UartLogRamCmdTable;
+	PCOMMAND_TABLE pcmdtab = (PCOMMAND_TABLE) UartLogRamCmdTable;
 	while(pcmdtab->cmd) {
 #ifdef USE_ROM_CONSOLE
 		DiagPrintf(pcmdtab->msg);

USDK/component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c

@@ -7,6 +7,8 @@
 #include "platform_autoconf.h"
 #include "sys_api.h"
 #include "sleep_ex_api.h"
+#include "us_ticker_api.h"
+#include "cmsis_os.h"
 
 #include "task.h"
 
@@ -64,7 +66,7 @@ unsigned char generate_wakelock_stats = 0;
  *  @param  expected_idle_time : The time that FreeRTOS expect to sleep.
  *                               If we set this value to 0 then FreeRTOS will do nothing in its sleep function.
  **/
-void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
+void freertos_pre_sleep_processing(uint32_t *expected_idle_time) {
 
 #ifdef CONFIG_SOC_PS_MODULE
 
@@ -150,7 +152,7 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
 #endif
 }
 
-void freertos_post_sleep_processing(unsigned int *expected_idle_time) {
+void freertos_post_sleep_processing(uint32_t *expected_idle_time) {
 #ifndef configSYSTICK_CLOCK_HZ
 	*expected_idle_time = 1 + ( portNVIC_SYSTICK_CURRENT_VALUE_REG / ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) );
 #else
@@ -246,6 +248,10 @@ void pmu_enable_wakelock_stats(unsigned char enable) {
 }
 
 #if (configGENERATE_RUN_TIME_STATS == 1)
+
+extern int sprintf(char* str, const char* fmt, ...);
+extern size_t strlen(const char *str);
+//#define sprintf rtl_sprintf
 void pmu_get_wakelock_hold_stats( char *pcWriteBuffer ) {
     uint32_t i;
     uint32_t current_timestamp = osKernelSysTick();

USDK/component/soc/realtek/8195a/misc/os/os_timer.h

@@ -11,6 +11,7 @@
 #include "diag.h"
 #include "os_support.h"
 #include "osdep_service.h"
+#include "timers.h"
 
 
 #define JIFFIES	        xTaskGetTickCount()

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/include/rt_lib_rom.h

@@ -105,6 +105,22 @@ extern _LONG_CALL_ double __rtl_dsub_v1_00(double a, double b);
 extern _LONG_CALL_ double __rtl_dmul_v1_00(double a, double b);
 extern _LONG_CALL_ double __rtl_ddiv_v1_00(double a, double b);
 
+// --- ???
+extern _LONG_CALL_ float __rtl_dtof_v1_00(double d);
+extern _LONG_CALL_ int __rtl_dtoui_v1_00(double d);
+extern _LONG_CALL_ float __rtl_itof_v1_00(int val);
+extern _LONG_CALL_ char *__rtl_ltoa_v1_00(int value, char *string, int radix);
+extern _LONG_CALL_ char *__rtl_ultoa_v1_00(unsigned int value, char *string, int radix);
+extern _LONG_CALL_ int __rtl_ftol_v1_00(float f);
+extern _LONG_CALL_ int __rtl_ftod_v1_00(float f);
+extern _LONG_CALL_ float __rtl_fadd_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fsub_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fmul_v1_00(float a, float b);
+extern _LONG_CALL_ float __rtl_fdiv_v1_00(float a, float b);
+extern _LONG_CALL_ int __rtl_dcmple_v1_00(double a, double b);
+extern _LONG_CALL_ int __rtl_fcmplt_v1_00(float a, float b);
+extern _LONG_CALL_ int __rtl_fcmpgt_v1_00(float a, float b);
+// --- ???
 
 //
 // mprec

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c

@@ -22,7 +22,9 @@
 #define strsep		__rtl_strsep_v1_00
 #define strtok		__rtl_strtok_v1_00
 
-static char toupper(char ch) {
+extern int isdigit (int c);
+
+static int toupper(int ch) {
  	return  ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
 };
 
@@ -1072,6 +1074,8 @@ int c_printf(const char *fmt, ...)
 
 #endif // ENAC_FLOAT
 
+extern _LONG_CALL_ROM_ void HalSerialPutcRtl8195a(char c);
+
 int puts (const char *s)
 {
 	while(*s) {

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c

@@ -170,7 +170,6 @@ int rtl_vprintf(const char *fmt, va_list param) {
 int rtl_vsnprintf(char *str, size_t size, const char *fmt, va_list param) {
 	int result;
 	int w;
-	int v11;
 	FILE f;
 #if CHECK_LIBC_INIT
 	if (!libc_has_init) {

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c

@@ -122,6 +122,6 @@ void init_rom_libgloss_ram_map(void) {
 	rom_libgloss_ram_map.libgloss_open = ram_libgloss_open;
 	rom_libgloss_ram_map.libgloss_read = ram_libgloss_read;
 	rom_libgloss_ram_map.libgloss_write = ram_libgloss_write;
-	rom_libgloss_ram_map.libgloss_sbrk = ram_libgloss_sbrk;
+	rom_libgloss_ram_map.libgloss_sbrk = (void*)ram_libgloss_sbrk;
 }
 

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c

@@ -177,7 +177,6 @@ int vprintf(const char * fmt, __VALIST param) {
 int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) {
 	int result;
 	int w;
-	int v11;
 	FILE f;
 #if CHECK_LIBC_INIT
 	if (!libc_has_init) {
@@ -324,7 +323,7 @@ int sscanf(const char *buf, const char *fmt, ...) {
 	return i;
 }
 
-char toupper(char ch) {
+int toupper(int ch) {
  	return  ((ch >= 'a' && ch <= 'z') ? ch - 'a' + 'A' : ch);
 };
 

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c

@@ -4,6 +4,7 @@
  */
 
 #include "basic_types.h"
+#include "rt_lib_rom.h"
 
 //-------------------------------------------------------------------------
 // Function declarations

USDK/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c

@@ -20,25 +20,28 @@ float rtl_sin_f32(float a);
 // int __rtl_cos_f32_v1_00();
 // int __rtl_sin_f32_v1_00();
 
-
+extern _LONG_CALL_ float __rtl_fabsf_v1_00(float a);
 //----- rtl_fabsf()
 float rtl_fabsf(float a)
 {
   return __rtl_fabsf_v1_00(a);
 }
 
+extern _LONG_CALL_ int __rtl_fabs_v1_00(double a);
 //----- rtl_fabs()
 int rtl_fabs(double a)
 {
   return __rtl_fabs_v1_00(a);
 }
 
+extern _LONG_CALL_ float __rtl_cos_f32_v1_00(float a);
 //----- rtl_cos_f32()
 float rtl_cos_f32(float a)
 {
   return __rtl_cos_f32_v1_00(a);
 }
 
+extern _LONG_CALL_ float __rtl_sin_f32_v1_00(float a);
 //----- rtl_sin_f32()
 float rtl_sin_f32(float a)
 {

USDK/component/soc/realtek/common/bsp/basic_types.h

@@ -439,7 +439,7 @@ typedef	    __kernel_ssize_t	SSIZE_T;
 // Get the N-bytes aligment offset from the current length
 #define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
 
-typedef unsigned char	BOOLEAN,*PBOOLEAN;
+typedef unsigned char	BOOLEAN, *PBOOLEAN;
 
 #define TEST_FLAG(__Flag,__testFlag)		(((__Flag) & (__testFlag)) != 0)
 #define SET_FLAG(__Flag, __setFlag)			((__Flag) |= __setFlag)

USDK/sdkset.mk

@@ -19,9 +19,13 @@
 # FLAGS
 # -------------------------------------------------------------------
 CFLAGS = -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK -DF_CPU=166666666L -DNDEBUG
-CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 -Wall -Werror -Wpedantic -Wextra
+CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 
 CFLAGS += -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -fsigned-char 
-CFLAGS += -w -Wno-pointer-sign  
+CFLAGS += -Wall 
+CFLAGS +=  -Wno-old-style-declaration -Wno-pointer-sign  -Wno-strict-aliasing
+CFLAGS += -Wno-variadic-macros -Wno-empty-body
+#CFLAGS += -Werror -Wpedantic -Wno-char-subscripts -Wno-unused-parameter
+
 ifdef USE_GCC_LIB 
 LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles --specs=nano.specs
 else

project.mk

@@ -2,7 +2,7 @@
 # SDK CONFIG
 #=============================================
 #WEB_INA219_DRV = 1
-WEB_ADC_DRV = 1
+#WEB_ADC_DRV = 1
 #USE_SDCARD = 1
 #USE_AT = 1
 #USE_FATFS = 1
@@ -69,5 +69,3 @@ ADD_SRC_C += project/src/web/web_int_callbacks.c
 ADD_SRC_C += project/src/web/web_int_vars.c
 ADD_SRC_C += project/src/web/web_auth.c
 
-
-

project/inc/FreeRTOSConfig.h

@@ -134,8 +134,8 @@ extern uint32_t SystemCoreClock;
 
 #if (__IASMARM__ != 1)
 
-extern void freertos_pre_sleep_processing(unsigned int *expected_idle_time);
+extern void freertos_pre_sleep_processing(uint32_t *expected_idle_time);
-extern void freertos_post_sleep_processing(unsigned int *expected_idle_time);
+extern void freertos_post_sleep_processing(uint32_t *expected_idle_time);
 extern int  freertos_ready_to_sleep();
 
 /* Enable tickless power saving. */

project/inc/feep_config.h

@@ -8,8 +8,8 @@
 #ifndef _INC_FEEP_CONFIG_H_
 #define _INC_FEEP_CONFIG_H_
 
-#define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect
+//#define FEEP_ID_WIFI_CFG 0x4347 // id:'0W', type: struct wlan_fast_reconnect
-#define FEEP_ID_WIFI_AP_CFG 0x5731 // id:'1W', type: struct rtw_wifi_config_t
+//#define FEEP_ID_WIFI_AP_CFG 0x5041 // id:'1W', type: struct rtw_wifi_config_t
 #define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF
 #define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf
 #define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct _sdhcp_cfg

project/inc/lwipopts.h

@@ -185,6 +185,7 @@ a lot of data that needs to be copied, this should be set high. */
 
 /* Support Multicast */
 #define LWIP_IGMP		1
+extern __attribute__ ((long_call)) unsigned int Rand(void);
 #define LWIP_RAND()		Rand()
 
 /* Support TCP Keepalive */

project/inc/platform_autoconf.h

@@ -31,7 +31,7 @@
 #define RTL8195A 1
 /* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
    6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
-#define CONFIG_CPU_CLK 0
+#define CONFIG_CPU_CLK 1
 //166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
 //83.3MHZ  - RUN/IDLE/SLP ~55/15/6.4 mA
 //41.6MHZ  - RUN/IDLE ~51/11 mA

project/inc/rtl8195a/rtl_libc.h

@@ -5,9 +5,9 @@
 #ifndef _INC_RTL_LIBC_
 #define _INC_RTL_LIBC_
 
-//#undef malloc
+#undef malloc
 #define malloc(size)            pvPortMalloc(size)
-//#undef free
+#undef free
 #define free(pbuf)              vPortFree(pbuf)
 
 #define atoi(str)               prvAtoi(str)

project/inc/tcpsrv/tcp_srv_conn.h

@@ -8,11 +8,12 @@
 #define __TCP_SERV_CONN_H__
 
 #include "user_config.h"
-//#include "os_type.h"
+#include "tcp.h"
 
 #include "lwip/err.h"
 
 #define mMIN(a, b)  ((a < b)? a : b)
+#define mMAX(a, b)  ((a>b)?a:b)
 
 enum srvconn_state {
     SRVCONN_NONE =0,
@@ -178,8 +179,8 @@ err_t tcpsrv_close(TCP_SERV_CFG *p);
 err_t tcpsrv_close_port(uint16 portn);
 err_t tcpsrv_close_all(void);
 
-char * tspsrv_error_msg(err_t err);
+const char * tspsrv_error_msg(err_t err);
-char * tspsrv_tcp_state_msg(enum tcp_state state);
+const char * tspsrv_tcp_state_msg(enum tcp_state state);
-char * tspsrv_srvconn_state_msg(enum srvconn_state state);
+const char * tspsrv_srvconn_state_msg(enum srvconn_state state);
 
 #endif // __TCP_SERV_CONN_H__

project/inc/user_config.h

@@ -1,8 +1,7 @@
 #ifndef _user_config_h_
 #define _user_config_h_
 
-#define SYS_VERSION "1.0.0"
+#define SYS_VERSION "1.0.1"
-//#define SDK_VERSION "3.5.3"
 #include "sdk_ver.h"
 
 #define USE_WEB		80 	// включить в трансялцию порт Web, если =0 - по умолчанию выключен

project/inc/web/web_srv.h

@@ -81,7 +81,7 @@ typedef uint32 (* web_ex_func_cb)(uint32 flg); // внешняя или отло
 typedef struct
 {
 	web_ex_func_cb fnc;
-	void *	param;
+	void * param;
 	uint16	pause_ms;
 } WEB_SRV_QFNK;
 

project/inc/web/web_websocket.h

@@ -12,6 +12,7 @@
 
 err_t websock_tx_close_err(TCP_SERV_CONN *ts_conn, uint32 err);
 bool websock_rx_data(TCP_SERV_CONN *ts_conn);
+err_t websock_tx_frame(TCP_SERV_CONN *ts_conn, uint32 opcode, uint8 *raw_data, uint32 raw_len);
 
 #endif // WEBSOCKET_ENA
 #endif /* _WEB_WEBSOCKET_H_ */

project/inc/wifi_user_set.h

@@ -47,7 +47,7 @@
 //==== Interface 1 - wlan1 = STA ==========
 #define DEF_ST_SSID			"HOMEAP"		// Имя SSID AP (роутера) для присоединения по умолчанию (первый старт)
 #define DEF_ST_PASSWORD		"0123456789"	// Пароль AP (роутера) для присоединения по умолчанию (первый старт)
-#define DEF_ST_SECURITY		RTW_SECURITY_WPA_WPA2_MIXED // Тип Security
+#define DEF_ST_SECURITY		RTW_ENCRYPTION_WPA2_MIXED // Тип Security
 #define DEF_ST_BSSID		{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } // If bssid set is not ff.ff.ff.ff.ff.ff,
 #define DEF_ST_USE_BSSID	0 			// station will connect to the router with both ssid[] and bssid[] matched.
 #define DEF_ST_CHANNEL		1			// 1..14

project/src/adc_ws/adc_ws.c

@@ -24,10 +24,10 @@
 #include "hal_adc.h"
 #include "analogin_api.h"
 #include "timer_api.h"
-//#include "strproc.h"
 
 #include "web_srv.h"
 #include "websock.h"
+#include "web_websocket.h"
 #include "driver/adc_drv.h"
 #include "rtl8195a/rtl_libc.h"
 
@@ -39,8 +39,14 @@
 
 
 #ifndef CONFIG_MBED_ENABLED
+extern void *pvPortZalloc(size_t xWantedSize);
+extern void vPortFree(void *pv);
+extern void *pvPortMalloc(size_t xWantedSize);
+#undef malloc
 #define malloc                  pvPortMalloc
+#undef zalloc
 #define zalloc                  pvPortZalloc
+#undef free
 #define free                    vPortFree
 #endif
 
@@ -65,8 +71,8 @@ typedef struct _adc_drv {
 #endif
 } ADC_DRV, *PADC_DRV;
 
-#define mMIN(a, b)  ((a<b)?a:b)
+//#define mMIN(a, b)  ((a<b)?a:b)
-#define mMAX(a, b)  ((a>b)?a:b)
+//#define mMAX(a, b)  ((a>b)?a:b)
 
 ADC_DRV adc_drv = {
 		.buf_idx = (1460*2 - 80)/(sizeof(ADC_DATA)/2)	// циклический буфер на ~1420 замеров (см. sizeof(ADC_DATA))

project/src/console/atcmd_user.c

@@ -16,6 +16,7 @@
 #include "tcm_heap.h"
 #include "rtl8195a/rtl_libc.h"
 
+#include "flash_api.h"
 #include "sleep_ex_api.h"
 
 #include "lwip/tcp_impl.h"
@@ -36,12 +37,14 @@ void ShowMemInfo(void)
 //------------------------------------------------------------------------------
 // Mem, Tasks info
 //------------------------------------------------------------------------------
-LOCAL void fATST(int argc, char *argv[]) {
+void fATST(int argc, char *argv[]) {
+		(void) argc;
+		(void) argv;
 		ShowMemInfo();
 #if 0 //CONFIG_DEBUG_LOG > 1
 		dump_mem_block_list();
 		tcm_heap_dump();
-#endif;
+#endif
 		printf("\n");
 #if (configGENERATE_RUN_TIME_STATS == 1)
 		char *cBuffer = pvPortMalloc(512);
@@ -127,12 +130,12 @@ extern char str_rom_hex_addr[]; // in *.ld "[Addr]   .0 .1 .2 .3 .4 .5 .6 .7 .8
 void dump_bytes(uint32 addr, int size)
 {
 	uint8 buf[17];
-	u32 symbs_line = sizeof(buf)-1;
+	int symbs_line = sizeof(buf)-1;
 	printf(str_rom_hex_addr);
 	while (size) {
 		if (symbs_line > size) symbs_line = size;
 		printf("%08X ", addr);
-		copy_align4_to_align1(buf, addr, symbs_line);
+		copy_align4_to_align1(buf, (void *) addr, symbs_line);
 		print_hex_dump(buf, symbs_line, ' ');
 		int i;
 		for(i = 0 ; i < symbs_line ; i++) {
@@ -151,6 +154,12 @@ void dump_bytes(uint32 addr, int size)
 //------------------------------------------------------------------------------
 // Dump byte register
 //------------------------------------------------------------------------------
+extern u32 Strtoul(
+    IN  const u8 *nptr,
+    IN  u8 **endptr,
+    IN  u32 base
+);
+
 LOCAL void fATSB(int argc, char *argv[])
 {
 	int size = 16;
@@ -169,7 +178,8 @@ LOCAL void fATSB(int argc, char *argv[])
 		dump_bytes(addr, size);
 	}
 }
-
+extern u32 CmdDumpWord(IN u16 argc, IN u8 *argv[]);
+extern u32 CmdWriteWord(IN u16 argc, IN u8 *argv[]);
 //------------------------------------------------------------------------------
 // Dump dword register
 //------------------------------------------------------------------------------
@@ -280,6 +290,7 @@ void print_tcp_pcb(void)
 *******************************************************************************/
 LOCAL void fATLW(int argc, char *argv[]) 	// Info Lwip
 {
+	(void) argc; (void) argv;
 	print_udp_pcb();
 	print_tcp_pcb();
 }
@@ -289,7 +300,8 @@ LOCAL void fATLW(int argc, char *argv[]) 	// Info Lwip
 //------------------------------------------------------------------------------
 LOCAL void fATGI(int argc, char *argv[])
 {
-    int i;
+	(void) argc; (void) argv;
+	int i;
 	for (i = 0; i < _PORT_MAX; i++)
 		printf("Port %c state: 0x%04x\n", i + 'A', GPIOState[i]);
 }

project/src/console/wifi_console.c

@@ -198,8 +198,10 @@ LOCAL void fATWI(int argc, char *argv[]) {
 }
 
 extern uint8_t rtw_power_percentage_idx;
+extern int rltk_set_tx_power_percentage(rtw_tx_pwr_percentage_t power_percentage_idx);
 
-LOCAL void fATWT(int argc, char *argv[]) {
+void fATWT(int argc, char *argv[]) {
+	(void) argc; (void) argv;
 	if(argc > 1) {
 		int txpwr = atoi(argv[1]);
 		debug_printf("set tx power (%d)...\n", txpwr);
@@ -212,7 +214,10 @@ LOCAL void fATWT(int argc, char *argv[]) {
 
 //-- Test tsf (64-bits counts, 1 us step) ---
 
-#include "hal_com_reg.h"
+//#include "hal_com_reg.h"
+#define WIFI_REG_BASE               0x40080000
+#define REG_TSFTR						0x0560
+#define REG_TSFTR1						0x0568	// HW Port 1 TSF Register
 
 #define ReadTSF_Lo32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR)))
 #define ReadTSF_Hi32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR1)))
@@ -222,13 +227,15 @@ LOCAL uint64_t get_tsf(void)
 	return *((uint64_t *)(WIFI_REG_BASE + REG_TSFTR));
 }
 
-LOCAL void fATSF(int argc, char *argv[])
+void fATSF(int argc, char *argv[])
 {
+	(void) argc; (void) argv;
 	uint64_t tsf = get_tsf();
 	printf("\nTSF: %08x%08x\n", (uint32_t)(tsf>>32), (uint32_t)(tsf));
 }
 
-LOCAL void fATWP(int argc, char *argv[]) {
+void fATWP(int argc, char *argv[]) {
+	(void) argc; (void) argv;
 	int x = 0;
 	if(argc > 1) {
 		x = atoi(argv[1]);
@@ -248,7 +255,7 @@ LOCAL void fATWP(int argc, char *argv[]) {
 	}
 }
 /* --------  WiFi Scan ------------------------------- */
-LOCAL void scan_result_handler(internal_scan_handler_t* ap_scan_result)
+LOCAL rtw_result_t scan_result_handler(internal_scan_handler_t* ap_scan_result)
 {
 	if (ap_scan_result) {
 		if(ap_scan_result->scan_cnt) {
@@ -274,10 +281,13 @@ LOCAL void scan_result_handler(internal_scan_handler_t* ap_scan_result)
 	} else {
 		printf("Scan networks: None!\n");
 	}
+	return RTW_SUCCESS;
 }
 /* --------  WiFi Scan ------------------------------- */
-LOCAL void fATSN(int argc, char *argv[])
+void fATSN(int argc, char *argv[])
 {
+	(void) argc;
+	(void) argv;
 	api_wifi_scan(scan_result_handler);
 }
 

project/src/console/wlan_tst.c

@@ -6,6 +6,8 @@
  */
 #include <platform_opts.h>
 #include "rtl8195a.h"
+#include "FreeRTOS.h"
+#include "task.h"
 #if 1
 #include "drv_types.h" // or #include "wlan_lib.h"
 #else
@@ -18,11 +20,12 @@
 //#include "hal_diag.h"
 #include "rtl8195a/rtl_libc.h"
 
-extern void dump_bytes(uint32 addr, int size);
+void dump_bytes(uint32 addr, int size);
 extern Rltk_wlan_t rltk_wlan_info[2]; // in wrapper.h
 
 LOCAL void tst_wlan_struct(int argc, char *argv[])
 {
+	(void) argc; (void) argv;
 	printf("Test: sizeof(struct _ADAPTER) = %d\n", sizeof(struct _ADAPTER)); //6088
 	printf("mlmeextpriv\t+%d\n", offsetof(struct _ADAPTER, mlmeextpriv)); //+1256
 	printf("TSFValue\t+%d\n", offsetof(struct _ADAPTER, mlmeextpriv.TSFValue)); //+1992

project/src/tcpsrv/tcp_srv_conn.c

@@ -32,9 +32,16 @@
 #define ts_printf(...) rtl_printf(__VA_ARGS__)
 #define system_get_free_heap_size xPortGetFreeHeapSize
 
+extern void *pvPortZalloc(size_t xWantedSize);
+extern void vPortFree(void *pv);
+extern void *pvPortMalloc(size_t xWantedSize);
+#undef os_free
 #define os_free(p) vPortFree(p)
+#undef os_malloc
 #define os_malloc(p) pvPortMalloc(p)
+#undef os_zalloc
 #define os_zalloc(p) pvPortZalloc(p)
+#undef os_realloc
 #define os_realloc(p,s) pvPortReAlloc(p,s)
 /*
 extern __rtl_memsetw_v1_00(void *, uint32, size_t);
@@ -55,16 +62,16 @@ const uint8 txt_tcpsrv_already_initialized[] TCP_SRV_RODATA_ATTR = "tcpsrv: alre
 const uint8 txt_tcpsrv_out_of_mem[] TCP_SRV_RODATA_ATTR = "tcpsrv: out of mem!\n";
 #endif
 
-#define mMIN(a, b)  ((a<b)?a:b)
+//#define mMIN(a, b)  ((a<b)?a:b)
 // пред.описание...
 static void tcpsrv_list_delete(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
 static void tcpsrv_disconnect_successful(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
 static void tcpsrv_server_close(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
 static err_t tcpsrv_poll(void *arg, struct tcp_pcb *pcb) TCP_SRV_CODE_ATTR;
 static void tcpsrv_error(void *arg, err_t err) TCP_SRV_CODE_ATTR;
-static err_t tcpsrv_connected(void *arg, struct tcp_pcb *tpcb, err_t err) TCP_SRV_CODE_ATTR;
+//err_t tcpsrv_connected(void *arg, struct tcp_pcb *tpcb, err_t err) TCP_SRV_CODE_ATTR;
-static err_t tcpsrv_client_connect(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
+//err_t tcpsrv_client_connect(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
-static void tcpsrv_client_reconnect(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
+//void tcpsrv_client_reconnect(TCP_SERV_CONN * ts_conn) TCP_SRV_CODE_ATTR;
 
 #ifndef LWIP_DEBUG
 #include "lwip/init.h"
@@ -90,6 +97,7 @@ static const char *err_strerr[] = {
            "Low-level netif error", /* ERR_IF         -15 */
 };
 #endif
+
 static const char srvContenErrX[] = "?";
 /******************************************************************************
  * FunctionName : tspsrv_error_msg
@@ -97,7 +105,7 @@ static const char srvContenErrX[] = "?";
  * Parameters   : LwIP err
  * Returns      : указатель на строку ошибки
  *******************************************************************************/
-char * tspsrv_error_msg(err_t err)
+const char * tspsrv_error_msg(err_t err)
 {
 	if((err > -16) && (err < 1)) {
 		return lwip_strerr(err);
@@ -112,7 +120,7 @@ extern const char * const tcp_state_str[];
  * Parameters   : LwIP tcp_state
  * Returns      : указатель на строку
  *******************************************************************************/
-char * tspsrv_tcp_state_msg(enum tcp_state state)
+const char * tspsrv_tcp_state_msg(enum tcp_state state)
 {
 	if(state > TIME_WAIT && state < CLOSED) return srvContenErrX;
 	return tcp_state_str[state];
@@ -123,17 +131,18 @@ char * tspsrv_tcp_state_msg(enum tcp_state state)
  * Parameters   : LwIP tcp_state
  * Returns      : указатель на строку
  *******************************************************************************/
-static char *msg_srvconn_state[] = {
+static const char *msg_srvconn_state[] = {
       "NONE",
       "CLOSEWAIT",
       "LISTEN",
       "CONNECT",
       "CLOSED"
 };
-char * tspsrv_srvconn_state_msg(enum srvconn_state state)
+
+const char * tspsrv_srvconn_state_msg(enum srvconn_state state)
 {
-	if(state > SRVCONN_CLOSED && state < SRVCONN_NONE) return srvContenErrX;
+	if(state > SRVCONN_CLOSED && state < SRVCONN_NONE) return (const char *) srvContenErrX;
-	return msg_srvconn_state[state];
+	return (const char *) msg_srvconn_state[state];
 }
 //#endif
 /******************************************************************************

project/src/user/main.c

@@ -11,12 +11,13 @@
 #include "hal_log_uart.h"
 #include "hal_misc.h"
 #include "diag.h"
-//#include "wdt_api.h"
+#include "tcm_heap.h"
-//#include <osdep_service.h>
 #include "hal_platform.h"
 #include "rtl8195a_sys_on.h"
+#include "hal_timer.h"
 
 #ifdef CONFIG_WDG_ON_IDLE
+#include "rtl8195a_wdt.h"
 #include "hal_peri_on.h"
 #include "rtl8195a_peri_on.h"
 #endif
@@ -41,6 +42,7 @@ const unsigned char cus_sig[32] = "WEB Sample";
 #define CONFIG_INTERACTIVE_MODE     1
 #endif
 
+extern VOID WDGStart(VOID);
 extern void user_init_thrd(void);
 
 /* RAM/TCM/Heaps info */
@@ -51,7 +53,7 @@ void ShowMemInfo(void)
 }
 
 /* main */
-void main(void)
+int main(void)
 {
 #if DEBUG_MAIN_LEVEL > 3
 	 ConfigDebugErr  = -1;

project/src/user/user_start.c

@@ -58,6 +58,7 @@ void sys_write_cfg(void)
 	flash_write_cfg(&syscfg, FEEP_ID_SYS_CFG, sizeof(syscfg));
 }
 
+extern void console_init(void);
 
 void user_init_thrd(void) {
 

project/src/web/web_int_callbacks.c

@@ -9,6 +9,7 @@
 #include "FreeRTOS.h"
 #include "task.h"
 #include "diag.h"
+#include "tcm_heap.h"
 #include "lwip/tcp.h"
 #include "flash_eep.h"
 #include "device_lock.h"
@@ -49,9 +50,10 @@
 #include "overlay.h"
 #endif
 
+#undef atoi
 #define atoi rom_atoi
 
-#define mMIN(a, b)  ((a<b)?a:b)
+//#define mMIN(a, b)  ((a<b)?a:b)
 #define ifcmp(a)  if(rom_xstrcmp(cstr, a))
 
 #define OpenFlash() { device_mutex_lock(RT_DEV_LOCK_FLASH); flash_turnon(); }
@@ -127,6 +129,7 @@ void ICACHE_FLASH_ATTR web_test_adc(TCP_SERV_CONN *ts_conn)
 //===============================================================================
 // WiFi Scan XML
 //-------------------------------------------------------------------------------
+extern void wifi_set_timer_scan(int ms);
 LOCAL void ICACHE_FLASH_ATTR web_wscan_xml(TCP_SERV_CONN *ts_conn)
 {
 	WEB_SRV_CONN *web_conn = (WEB_SRV_CONN *) ts_conn->linkd;
@@ -489,7 +492,7 @@ extern int adc_ws(TCP_SERV_CONN *ts_conn, char cmd);
         else ifcmp("wifi_") {
           cstr+=5;
           ifcmp("rdcfg") read_wifi_cfg(-1);
-          else ifcmp("newcfg") webserver_qfn((web_ex_func_cb)wifi_run, (void *)wifi_cfg.mode, 200);
+          else ifcmp("newcfg") webserver_qfn((web_ex_func_cb)wifi_run, (void *)((uint32)wifi_cfg.mode), 200);
           else ifcmp("cmode") tcp_puts("%d", wifi_mode);
           else ifcmp("mode") tcp_puts("%d", wifi_cfg.mode);
           else ifcmp("bgn") tcp_puts("%d", wifi_cfg.bgn);

project/src/web/web_int_vars.c

@@ -17,6 +17,7 @@
 #include "ethernetif.h"
 #include "web_srv_int.h"
 #include "web_utils.h"
+#include "webfs/webfs.h"
 #include "flash_eep.h"
 #include "device_lock.h"
 #include "rtl8195a/rtl_libc.h"
@@ -63,6 +64,7 @@ extern void web_hexdump(TCP_SERV_CONN *ts_conn);
 #define ifcmp(a)  if(rom_xstrcmp(cstr, a))
 
 extern int rom_atoi(const char *);
+#undef atoi
 #define atoi rom_atoi
 
 typedef uint32 (* call_func)(uint32 a, uint32 b, uint32 c);
@@ -119,7 +121,7 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
 			cstr += 4;
 			ifcmp("port") {
 				if(syscfg.web_port != val) {
-					webserver_qfn((web_ex_func_cb)webserver_reinit, (void *)syscfg.web_port, 200);
+					webserver_qfn((web_ex_func_cb)webserver_reinit, (void *)((uint32)syscfg.web_port), 200);
 					syscfg.web_port = val;
 				}
 			}
@@ -189,7 +191,7 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
       cstr+=5;
       ifcmp("scan") api_wifi_scan(NULL);
       else ifcmp("rdcfg") web_conn->udata_stop = read_wifi_cfg(val);
-      else ifcmp("newcfg") webserver_qfn((web_ex_func_cb)wifi_run, (void *)wifi_cfg.mode, 200);
+      else ifcmp("newcfg") webserver_qfn((web_ex_func_cb)wifi_run, (void *)((uint32) wifi_cfg.mode), 200);
       else ifcmp("mode")	wifi_cfg.mode = val;
       else ifcmp("bgn")  	wifi_cfg.bgn = val;
       else ifcmp("lflg") 	wifi_cfg.load_flg = val;
@@ -246,7 +248,7 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
        		  if(wifi_cfg.save_flg & BID_AP_HOSTNAME) {
        			  WEB_SRV_QFNK x;
        			  x.fnc = write_wifi_cfg;
-       			  x.param = BID_AP_HOSTNAME;
+       			  x.param = (void *)BID_AP_HOSTNAME;
        			  xQueueSendToBack(xQueueWebSrv, &x, 0);
        		  }
           }
@@ -303,7 +305,7 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
        		  if(wifi_cfg.save_flg & BID_ST_HOSTNAME) {
        			  WEB_SRV_QFNK x;
        			  x.fnc = write_wifi_cfg;
-       			  x.param = BID_ST_HOSTNAME;
+       			  x.param = (void *)BID_ST_HOSTNAME;
        			  x.pause_ms = 0;
        			  xQueueSendToBack(xQueueWebSrv, &x, 0);
        		  }

project/src/web/web_srv.c

@@ -42,9 +42,9 @@
 
 #define max_len_buf_write_flash 2048 // размер буфера при записи flash. Увеличение/уменньшение размера (до сектора 4096) ускорения не дает (1..2%)
 
-#define mMIN(a, b)  ((a<b)?a:b)
+//#define mMIN(a, b)  ((a<b)?a:b)
-#define mMAX(a, b)  ((a>b)?a:b)
+//#define mMAX(a, b)  ((a>b)?a:b)
-
+#undef atoi
 #define atoi(s) rom_atoi(s)
 
 LOCAL void web_print_headers(HTTP_CONN *CurHTTP, TCP_SERV_CONN *ts_conn) ICACHE_FLASH_ATTR ;
@@ -854,7 +854,7 @@ LOCAL void ICACHE_FLASH_ATTR web_send_fnohanle(TCP_SERV_CONN *ts_conn) {
 	}
 	if(pdata != 0 && size != 0) {
 //		spi_flash_read(pdata & MASK_ADDR_FLASH_ICACHE_DATA, pbuf, size);
-		tcpsrv_int_sent_data(ts_conn, pdata, size);
+		tcpsrv_int_sent_data(ts_conn, (uint8 *) pdata, size);
 	}
 #if DEBUGSOO > 1
 	os_printf("%u ", size);
@@ -864,7 +864,7 @@ LOCAL void ICACHE_FLASH_ATTR web_send_fnohanle(TCP_SERV_CONN *ts_conn) {
 /******************************************************************************
 *******************************************************************************/
 LOCAL int ICACHE_FLASH_ATTR web_find_cbs(uint8 * chrbuf, uint32 len) {
-  int i;
+  uint32 i;
   for(i = 0; i < len; i++)  if(chrbuf[i] == '~')  return i;
   return -1;
 }
@@ -1442,7 +1442,7 @@ LOCAL int ICACHE_FLASH_ATTR upload_boundary(TCP_SERV_CONN *ts_conn) // HTTP_UPLO
 #if DEBUGSOO > 2
 					os_printf("Write flash addr:%p[0x%04x]\n", pupload->faddr, block_size);
 #endif
-					flash_stream_write(&flashobj, pupload->faddr, (block_size + 3)&(~3), (uint32 *)pstr);
+					flash_stream_write(&flashobj, pupload->faddr, (block_size + 3)&(~3), (uint8_t *)pstr);
 
 					device_mutex_unlock(RT_DEV_LOCK_FLASH);
 
@@ -1938,6 +1938,8 @@ void qfnk_task(void)
 	WEB_SRV_QFNK qfn;
 	WEB_SRV_QFNK qfnt;
 	TickType_t timetick;
+	qfnt.fnc = NULL;
+	qfnt.pause_ms = 0;
 	while(1) {
 		if(xQueueReceive(xQueueWebSrv, &qfn, 5) == pdPASS) { // portMAX_DELAY
 			if(qfn.fnc) {
@@ -1948,7 +1950,7 @@ void qfnk_task(void)
 					timetick = xTaskGetTickCount();
 					qfnt = qfn;
 				}
-				else qfn.fnc(qfn.param);
+				else qfn.fnc((uint32) qfn.param);
 			}
 		}
 		else if(qfnt.fnc) {
@@ -1956,7 +1958,7 @@ void qfnk_task(void)
 #if DEBUGSOO > 3
 				os_printf("qfnt: %p(%p),%d\n", qfnt.fnc, qfnt.param, qfnt.pause_ms);
 #endif
-				qfnt.fnc(qfnt.param);
+				qfnt.fnc((uint32) qfnt.param);
 				qfnt.fnc = NULL;
 			}
 		}
@@ -2026,7 +2028,7 @@ err_t ICACHE_FLASH_ATTR webserver_close(uint16 portn)
 #endif
 	if(xQueueWebSrv) {
 		WEB_SRV_QFNK qfn;
-		qfn.fnc = vTaskDelete;
+		qfn.fnc = (web_ex_func_cb) vTaskDelete;
 		qfn.param = NULL;
 		qfn.pause_ms = 0;
 		if(xQueueSendToBack(xQueueWebSrv, &qfn, 1000) == pdPASS) {

project/src/web/web_utils.c

@@ -123,7 +123,7 @@ const uint32 tab_seg_def[] = {
 
 SEG_ID get_seg_id(uint32 addr, int32 size) {
 	SEG_ID ret = SEG_ID_ERR;
-	uint32 * ptr = &tab_seg_def;
+	uint32 * ptr = (uint32 *) &tab_seg_def;
 	if (size > 0) {
 		do {
 			ret++;
@@ -531,6 +531,9 @@ int ICACHE_FLASH_ATTR htmlcode(uint8 *d, uint8 *s, uint16 lend, uint16 lens)
 	return ret;
 }
 //=============================================================================
+extern size_t rtl_strlen(const char *str);
+extern int rtl_strncmp(const char *s1, const char *s2, size_t n);
+
 uint8* ICACHE_FLASH_ATTR
 web_strnstr(const uint8* buffer, const uint8* token, int len)
 {
@@ -563,7 +566,7 @@ bool ICACHE_FLASH_ATTR base64decode(const uint8 *in, int len, uint8_t *out, int
 {
 //	uint8 *map = (uint8 *)UartDev.rcv_buff.pRcvMsgBuff;
 //	ets_memcpy(map, base64map, 128);
-	uint8 *map = base64map;
+	uint8 *map = (uint8 *) base64map;
     int g, t, x, y, z;
     uint8_t c;
     g = 3;

project/src/web/web_websocket.c

@@ -28,7 +28,7 @@
 
 #define copy_s4d1 rtl_memcpy
 
-#define mMIN(a, b)  ((a<b)?a:b)
+//#define mMIN(a, b)  ((a<b)?a:b)
 
 #define MAX_RX_BUF_SIZE 8192
 

project/src/webfs/webfs.c

@@ -464,7 +464,7 @@ uint32 WEBFS_CODE_ATTR WEBFS_curent_size(void)
 {
 	uint32 size = 0;
 	web_mutex_lock();
-	if(numFiles) flash_read_word(&flashobj, disk_base_addr + 8, &size);
+	if(numFiles) flash_read_word(&flashobj, disk_base_addr + 8, (uint32_t *) &size);
 	web_mutex_unlock();
 	return size;
 }

userset.mk

@@ -6,8 +6,8 @@ SDK_PATH = USDK/
 #GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH
 OPENOCD_PATH = D:/MCU/OpenOCD/bin/
 TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
-#FLASHER_TYPE = Jlink
+FLASHER_TYPE = Jlink
-FLASHER_TYPE = cmsis-dap
+#FLASHER_TYPE = cmsis-dap
 FLASHER_SPEED = 3500
 FLASHER_PATH = flasher/
 JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/