mirror of
https://github.com/pvvx/RTL00_WEB.git
synced 2024-11-27 08:40:28 +00:00
250 lines
6 KiB
C
250 lines
6 KiB
C
/*
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* Routines to access hardware
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*
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* Copyright (c) 2013 Realtek Semiconductor Corp.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*/
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#ifndef _HAL_GPIO_H_
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#define _HAL_GPIO_H_
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#define HAL_GPIO_PIN_INT_MODE 0x80
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typedef enum {
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_PORT_A = 0,
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_PORT_B = 1,
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_PORT_C = 2,
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_PORT_D = 3,
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_PORT_E = 4,
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_PORT_F = 5,
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_PORT_G = 6,
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_PORT_H = 7,
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_PORT_I = 8,
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_PORT_J = 9,
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_PORT_K = 10,
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_PORT_MAX
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} HAL_GPIO_PORT_NAME;
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typedef enum {
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_PA_0 = (_PORT_A<<4|0),
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_PA_1 = (_PORT_A<<4|1),
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_PA_2 = (_PORT_A<<4|2),
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_PA_3 = (_PORT_A<<4|3),
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_PA_4 = (_PORT_A<<4|4),
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_PA_5 = (_PORT_A<<4|5),
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_PA_6 = (_PORT_A<<4|6),
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_PA_7 = (_PORT_A<<4|7),
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_PB_0 = (_PORT_B<<4|0),
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_PB_1 = (_PORT_B<<4|1),
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_PB_2 = (_PORT_B<<4|2),
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_PB_3 = (_PORT_B<<4|3),
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_PB_4 = (_PORT_B<<4|4),
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_PB_5 = (_PORT_B<<4|5),
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_PB_6 = (_PORT_B<<4|6),
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_PB_7 = (_PORT_B<<4|7),
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_PC_0 = (_PORT_C<<4|0),
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_PC_1 = (_PORT_C<<4|1),
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_PC_2 = (_PORT_C<<4|2),
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_PC_3 = (_PORT_C<<4|3),
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_PC_4 = (_PORT_C<<4|4),
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_PC_5 = (_PORT_C<<4|5),
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_PC_6 = (_PORT_C<<4|6),
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_PC_7 = (_PORT_C<<4|7),
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_PC_8 = (_PORT_C<<4|8),
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_PC_9 = (_PORT_C<<4|9),
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_PD_0 = (_PORT_D<<4|0),
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_PD_1 = (_PORT_D<<4|1),
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_PD_2 = (_PORT_D<<4|2),
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_PD_3 = (_PORT_D<<4|3),
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_PD_4 = (_PORT_D<<4|4),
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_PD_5 = (_PORT_D<<4|5),
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_PD_6 = (_PORT_D<<4|6),
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_PD_7 = (_PORT_D<<4|7),
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_PD_8 = (_PORT_D<<4|8),
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_PD_9 = (_PORT_D<<4|9),
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_PE_0 = (_PORT_E<<4|0),
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_PE_1 = (_PORT_E<<4|1),
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_PE_2 = (_PORT_E<<4|2),
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_PE_3 = (_PORT_E<<4|3),
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_PE_4 = (_PORT_E<<4|4),
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_PE_5 = (_PORT_E<<4|5),
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_PE_6 = (_PORT_E<<4|6),
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_PE_7 = (_PORT_E<<4|7),
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_PE_8 = (_PORT_E<<4|8),
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_PE_9 = (_PORT_E<<4|9),
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_PE_A = (_PORT_E<<4|10),
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_PF_0 = (_PORT_F<<4|0),
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_PF_1 = (_PORT_F<<4|1),
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_PF_2 = (_PORT_F<<4|2),
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_PF_3 = (_PORT_F<<4|3),
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_PF_4 = (_PORT_F<<4|4),
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_PF_5 = (_PORT_F<<4|5),
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// _PF_6 = (_PORT_F<<4|6),
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// _PF_7 = (_PORT_F<<4|7),
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_PG_0 = (_PORT_G<<4|0),
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_PG_1 = (_PORT_G<<4|1),
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_PG_2 = (_PORT_G<<4|2),
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_PG_3 = (_PORT_G<<4|3),
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_PG_4 = (_PORT_G<<4|4),
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_PG_5 = (_PORT_G<<4|5),
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_PG_6 = (_PORT_G<<4|6),
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_PG_7 = (_PORT_G<<4|7),
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_PH_0 = (_PORT_H<<4|0),
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_PH_1 = (_PORT_H<<4|1),
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_PH_2 = (_PORT_H<<4|2),
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_PH_3 = (_PORT_H<<4|3),
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_PH_4 = (_PORT_H<<4|4),
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_PH_5 = (_PORT_H<<4|5),
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_PH_6 = (_PORT_H<<4|6),
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_PH_7 = (_PORT_H<<4|7),
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_PI_0 = (_PORT_I<<4|0),
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_PI_1 = (_PORT_I<<4|1),
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_PI_2 = (_PORT_I<<4|2),
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_PI_3 = (_PORT_I<<4|3),
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_PI_4 = (_PORT_I<<4|4),
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_PI_5 = (_PORT_I<<4|5),
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_PI_6 = (_PORT_I<<4|6),
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_PI_7 = (_PORT_I<<4|7),
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_PJ_0 = (_PORT_J<<4|0),
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_PJ_1 = (_PORT_J<<4|1),
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_PJ_2 = (_PORT_J<<4|2),
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_PJ_3 = (_PORT_J<<4|3),
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_PJ_4 = (_PORT_J<<4|4),
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_PJ_5 = (_PORT_J<<4|5),
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_PJ_6 = (_PORT_J<<4|6),
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// _PJ_7 = (_PORT_J<<4|7),
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_PK_0 = (_PORT_K<<4|0),
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_PK_1 = (_PORT_K<<4|1),
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_PK_2 = (_PORT_K<<4|2),
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_PK_3 = (_PORT_K<<4|3),
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_PK_4 = (_PORT_K<<4|4),
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_PK_5 = (_PORT_K<<4|5),
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_PK_6 = (_PORT_K<<4|6),
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// _PK_7 = (_PORT_K<<4|7),
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// Not connected
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_PIN_NC = (int)0xFFFFFFFF
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} HAL_PIN_NAME;
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typedef enum
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{
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GPIO_PIN_LOW = 0,
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GPIO_PIN_HIGH = 1,
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GPIO_PIN_ERR = 2 // read Pin error
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} HAL_GPIO_PIN_STATE;
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typedef enum {
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DIN_PULL_NONE = 0, //floating or high impedance ?
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DIN_PULL_LOW = 1,
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DIN_PULL_HIGH = 2,
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DOUT_PUSH_PULL = 3,
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DOUT_OPEN_DRAIN = 4,
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INT_LOW = (5|HAL_GPIO_PIN_INT_MODE), // Interrupt Low level trigger
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INT_HIGH = (6|HAL_GPIO_PIN_INT_MODE), // Interrupt High level trigger
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INT_FALLING = (7|HAL_GPIO_PIN_INT_MODE), // Interrupt Falling edge trigger
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INT_RISING = (8|HAL_GPIO_PIN_INT_MODE) // Interrupt Rising edge trigger
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} HAL_GPIO_PIN_MODE;
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enum {
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GPIO_PORT_A = 0,
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GPIO_PORT_B = 1,
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GPIO_PORT_C = 2,
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GPIO_PORT_D = 3
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};
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typedef enum {
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hal_PullNone = 0,
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hal_PullUp = 1,
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hal_PullDown = 2,
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hal_OpenDrain = 3,
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hal_PullDefault = hal_PullNone
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} HAL_PinMode;
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typedef struct _HAL_GPIO_PORT_ {
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u32 out_data; // to write the GPIO port
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u32 in_data; // to read the GPIO port
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u32 dir; // config each pin direction
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}HAL_GPIO_PORT, *PHAL_GPIO_PORT;
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#define HAL_GPIO_PIN_NAME(port,pin) (((port)<<5)|(pin))
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#define HAL_GPIO_GET_PORT_BY_NAME(x) ((x>>5) & 0x03)
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#define HAL_GPIO_GET_PIN_BY_NAME(x) (x & 0x1f)
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typedef struct _HAL_GPIO_PIN_ {
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HAL_GPIO_PIN_MODE pin_mode;
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u32 pin_name; // Pin: [7:5]: port number, [4:0]: pin number
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}HAL_GPIO_PIN, *PHAL_GPIO_PIN;
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#if defined(__ICCARM__)
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typedef struct _HAL_GPIO_OP_ {
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void* dummy;
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}HAL_GPIO_OP, *PHAL_GPIO_OP;
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#endif
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typedef void (*GPIO_IRQ_FUN)(VOID *Data, u32 Id);
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typedef void (*GPIO_USER_IRQ_FUN)(u32 Id);
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typedef struct _HAL_GPIO_ADAPTER_ {
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IRQ_HANDLE IrqHandle; // GPIO HAL IRQ Handle
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GPIO_USER_IRQ_FUN UserIrqHandler; // GPIO IRQ Handler
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GPIO_IRQ_FUN PortA_IrqHandler[32]; // The interrupt handler triggered by Port A[x]
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VOID *PortA_IrqData[32];
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VOID (*EnterCritical)(void);
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VOID (*ExitCritical)(void);
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u32 Local_Gpio_Dir[3]; // to record direction setting: 0- IN, 1- Out
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u8 Gpio_Func_En; // Is GPIO HW function enabled ?
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u8 Locked;
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}HAL_GPIO_ADAPTER, *PHAL_GPIO_ADAPTER;
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u32
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HAL_GPIO_GetPinName(
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u32 chip_pin
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);
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VOID
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HAL_GPIO_PullCtrl(
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u32 pin,
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u32 mode
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);
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VOID
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HAL_GPIO_Init(
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HAL_GPIO_PIN *GPIO_Pin
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);
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VOID
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HAL_GPIO_DeInit(
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HAL_GPIO_PIN *GPIO_Pin
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);
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VOID
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HAL_GPIO_Irq_Init(
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HAL_GPIO_PIN *GPIO_Pin
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);
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VOID
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HAL_GPIO_IP_DeInit(
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VOID
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);
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extern u16 GPIOState[_PORT_MAX]; // побитно 16 бит для каждого порта (A..K), бит=номер задействованного пина в порту на периферию.
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#endif // end of "#define _HAL_GPIO_H_"
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