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update -Wall

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This commit is contained in:
pvvx 2017-09-06 14:34:28 +03:00
parent af72faa906
commit c98cbe6e00
86 changed files with 523 additions and 352 deletions
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1
USDK/component/soc/realtek/8195a/fwlib/hal_dac.h
View file

@ -287,6 +287,7 @@ RtkDACIdxChk(
IN u8 DACIdx
)
{
(void) DACIdx;
#if !DAC0_USED
if (DACIdx == DAC0_SEL)
return _EXIT_FAILURE;

6
USDK/component/soc/realtek/8195a/fwlib/hal_diag.h
View file

@ -72,10 +72,10 @@ typedef struct _LOG_UART_ADAPTER_ {
}LOG_UART_ADAPTER, *PLOG_UART_ADAPTER;
typedef struct _COMMAND_TABLE_ {
const u8* cmd;
const char * cmd;
u16 ArgvCnt;
u32 (*func)(u16 argc, u8* argv[]);
const u8* msg;
void (*func)(int argc, char * argv[]);
const char * msg;
}COMMAND_TABLE, *PCOMMAND_TABLE;
//VOID

4
USDK/component/soc/realtek/8195a/fwlib/hal_gpio.h
View file

@ -190,11 +190,11 @@ typedef struct _HAL_GPIO_PIN_ {
u32 pin_name; // Pin: [7:5]: port number, [4:0]: pin number
}HAL_GPIO_PIN, *PHAL_GPIO_PIN;
typedef struct _HAL_GPIO_OP_ {
#if defined(__ICCARM__)
typedef struct _HAL_GPIO_OP_ {
void* dummy;
#endif
}HAL_GPIO_OP, *PHAL_GPIO_OP;
#endif
typedef void (*GPIO_IRQ_FUN)(VOID *Data, u32 Id);
typedef void (*GPIO_USER_IRQ_FUN)(u32 Id);

2
USDK/component/soc/realtek/8195a/fwlib/hal_i2c.h
View file

@ -288,7 +288,7 @@ typedef enum _I2C_ERR_TYPE_ {
// I2C Time Out type
typedef enum _I2C_TIMEOUT_TYPE_ {
I2C_TIMEOOUT_DISABLE = 0x00,
I2C_TIMEOOUT_ENDLESS = 0xFFFFFFFF,
I2C_TIMEOOUT_ENDLESS = -1 // 0xFFFFFFFF,
}I2C_TIMEOUT_TYPE, *PI2C_TIMEOUT_TYPE;
//======================================================

2
USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c
View file

@ -116,7 +116,7 @@ HAL_CUT_B_RAM_DATA_SECTION u32 rand_x = 123456789; // 10000be4
0, \
"", \
0, \
0x0437DC, \
(void *)0x0437DC, \
0, \
_NULL, \
_NULL, \

12
USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
View file

@ -257,7 +257,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION SetSpicBitMode(uint8 BitMode) {
}
void BOOT_RAM_TEXT_SECTION InitSpicFlashType(struct spic_table_flash_type *ptable_flash) {
u8 * ptrb = &ptable_flash->cmd;
u8 * ptrb = (u8 *) &ptable_flash->cmd;
volatile u32 * ptrreg = (volatile u32 *)(SPI_FLASH_CTRL_BASE + REG_SPIC_READ_FAST_SINGLE);// 0x400060E0
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); // Disable SPI_FLASH User Mode
do {
@ -404,7 +404,7 @@ LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000,
LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
uint32 ret = SEG_ID_ERR;
uint32 * ptr = &tab_seg_def;
uint32 * ptr = (uint32 *) &tab_seg_def;
if (size > 0) {
do {
ret++;
@ -447,7 +447,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr,
segnum, faddr, txt_tab_seg[seg_id], hdr->seg.ldaddr,
hdr->seg.size);
#endif
fnextaddr += flashcpy(fnextaddr, hdr->seg.ldaddr, hdr->seg.size);
fnextaddr += flashcpy(fnextaddr, (void *)hdr->seg.ldaddr, hdr->seg.size);
} else if (seg_id) {
#if CONFIG_DEBUG_LOG > 2
DBG_8195A("Skip Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", segnum,
@ -476,7 +476,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int imgnum) {
faddr = (faddr + FLASH_SECTOR_SIZE - 1) & (~(FLASH_SECTOR_SIZE - 1));
uint32 img_id = load_img2_head(faddr, &hdr);
if ((img_id >> 8) > 4 || (uint8) img_id != 0) {
faddr = load_segs(faddr + 0x10, &hdr.seg, imagenum == imgnum);
faddr = load_segs(faddr + 0x10, (PIMG2HEAD) &hdr.seg, imagenum == imgnum);
if (imagenum == imgnum) {
// DBG_8195A("Image%d: %s\n", imgnum, hdr.name);
break;
@ -535,6 +535,8 @@ LOCAL uint8 BOOT_RAM_TEXT_SECTION IsForceLoadDefaultImg2(void) {
return result;
}
extern _LONG_CALL_ void RtlConsolTaskRom(void *Data);
/* RTL Console ROM */
LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) {
// DiagPrintf("\r\nRTL Console ROM\r\n");
@ -544,7 +546,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) {
pUartLogCtl->pTmpLogBuf->UARTLogBuf[0] = '?';
pUartLogCtl->pTmpLogBuf->BufCount = 1;
pUartLogCtl->ExecuteCmd = 1;
RtlConsolTaskRom(pUartLogCtl);
RtlConsolTaskRom((void *) pUartLogCtl);
}
/* Enter Image 1.5 */

11
USDK/component/soc/realtek/8195a/fwlib/ram_lib/startup.c
View file

@ -26,6 +26,15 @@ extern void xPortPendSVHandler(void);
extern void xPortSysTickHandler(void);
extern void vPortSVCHandler(void);
extern void rtl_libc_init(void);
extern _LONG_CALL_ void HalCpuClkConfig(unsigned char CpuType);
extern void PSHalInitPlatformLogUart(void);
extern _LONG_CALL_ void UartLogCmdExecute(PUART_LOG_CTL pUartLogCtlExe);
extern void HalReInitPlatformTimer(void);
extern void SystemCoreClockUpdate (void);
extern void En32KCalibration(void);
extern void SdrCtrlInit(void);
extern void InitSoCPM(void);
extern u32 SdrControllerInit(void);
//extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID)
//void HalNMIHandler_Patch(void);
void SDIO_Device_Off(void);
@ -97,7 +106,7 @@ __weak int main(void) {
DiagPrintf("\r<RTL>");
while (1) {
while (pUartLogCtl->ExecuteCmd != 1);
UartLogCmdExecute(pUartLogCtl);
UartLogCmdExecute((PUART_LOG_CTL) pUartLogCtl);
DiagPrintf("\r<RTL>");
pUartLogCtl->ExecuteCmd = 0;
}

6
USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
View file

@ -245,7 +245,7 @@ HAL_Status HalSsiInitRtl8195a_Patch(VOID *Adaptor)
u32 IRQ_UNKNOWN = 999;
u32 Ctrlr0Value = 0;
u32 Ctrlr1Value = 0;
u32 SerValue = 0;
u32 SerValue;
u32 BaudrValue = 0;
u32 TxftlrValue = 0;
u32 RxftlrValue = 0;
@ -617,7 +617,7 @@ HAL_Status HalSsiSetFormatRtl8195a(VOID *Adaptor)
u32 RxftlrValue = 0;
u8 Index = pHalSsiAdaptor->Index;
u8 Role = pHalSsiAdaptor->Role;
u32 Spi_mode = 0;
u32 Spi_mode;
if (Index > 2) {
DBG_SSI_ERR("HalSsiSetFormatRtl8195a: Invalid SSI Idx %d\r\n", Index);
@ -741,7 +741,7 @@ HAL_Status HalSsiIntReadRtl8195a(VOID *Adapter, VOID *RxData, u32 Length)
{
PHAL_SSI_ADAPTOR pHalSsiAdapter = (PHAL_SSI_ADAPTOR) Adapter;
u32 RxFifoThresholdLevel;
u8 Index = pHalSsiAdapter->Index;
// u8 Index = pHalSsiAdapter->Index;
DBG_SSI_INFO("HalSsiIntReadRtl8195a: Idx=%d, RxData=0x%x, Len=0x%x\r\n", Index, RxData, Length);
// if (HalSsiBusyRtl8195a(Adapter)) {

1
USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
View file

@ -12,6 +12,7 @@
#include "rtl8195a_uart.h"
#include "hal_uart.h"
#include "hal_gdma.h"
#include "strproc.h"
u8
HalRuartGetChipVerRtl8195a(VOID)

14
USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c
View file

@ -1,8 +1,12 @@
#include "bitband_io.h"
//#include "rtl8195a_gpio.h"
#define BITBAND_ADDR(a,b) (0x02000000 + (a & 0xF0000000) + (a - (a & 0xF0000000)) * 32 + ((b) * 4)) // Convert address ?
volatile uint8_t * BitBandAddr(void *addr, uint8_t bit) {
return (volatile uint8_t *)(BITBAND_ADDR((u32)addr, bit));
uint32_t ret = BITBAND_ADDR((u32)addr, bit);
return (volatile uint8_t *) ret;
}
volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
@ -10,7 +14,7 @@ volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit) {
}
volatile uint8_t * GetOutPinBitBandAddr(PinName pin) {
uint32_t paddr = NULL;
volatile uint8_t * paddr = 0;
uint32_t ippin = HAL_GPIO_GetIPPinName_8195a(pin);
if(ippin < 0xff) {
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
@ -29,6 +33,9 @@ volatile uint8_t * GetInPinBitBandAddr(PinName pin) {
return paddr;
}
extern _LONG_CALL_ u32 GPIO_FuncOn_8195a(VOID);
extern void wait_us(int us);
volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
{
volatile uint8_t *paddr = NULL;
@ -39,7 +46,8 @@ volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
}
if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
delayMicroseconds(100);
wait_us(100);
// delayMicroseconds(100);
// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
#if CONFIG_DEBUG_LOG > 3
GpioFunctionChk(ippin, ENABLE);

2
USDK/component/soc/realtek/8195a/fwlib/src/hal_misc.c
View file

@ -34,7 +34,7 @@ void HalReInitPlatformTimer(void)
TimerAdapter.IrqDis = 1;
TimerAdapter.TimerId = 1;
HalTimerOpInit_Patch(&HalTimerOp);
HAL_TIMER_OP x;
// HAL_TIMER_OP x;
HalTimerOp.HalTimerInit(&TimerAdapter);
HalTimerOp.HalTimerEn(1);
}

2
USDK/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
View file

@ -1044,7 +1044,7 @@ Sdr_Rand2(
}
*/
extern __attribute__ ((long_call)) unsigned int Rand(void);
HAL_SDRC_TEXT_SECTION
s32
MemTest(

9
USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
View file

@ -541,7 +541,7 @@ VOID SleepPwrGatted(
u32 Rtemp = 0;
u32 ScaleTemp = 0;
u32 PeriodTemp = 0;
u32 CalTemp = 0;
//Backup CPU CLK
BackupCPUClk();
@ -553,7 +553,7 @@ VOID SleepPwrGatted(
//3 1.1 Set TU timer timescale
//0x4000_0090[21:16] = 6'h1F
//0x4000_0090[15] = 1'b0 => Disable timer
CalTemp = (CLKCal(ANACK) << 16);
u32 CalTemp = (CLKCal(ANACK) << 16);
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) | (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
| ScaleTemp;
@ -608,7 +608,6 @@ DStandby(
u32 Rtemp = 0;
u32 ScaleTemp = 0;
u32 PeriodTemp = 0;
u32 CalTemp = 0;
//Backup CPU CLK
BackupCPUClk();
@ -621,7 +620,7 @@ DStandby(
//3 1.1 Set TU timer timescale
//0x4000_0090[21:16] = 6'h1F
//0x4000_0090[15] = 1'b0 => Disable timer
CalTemp = (CLKCal(ANACK) << 16);
u32 CalTemp = (CLKCal(ANACK) << 16);
Rtemp = (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_ANA_TIM_CTRL)
& (~((BIT_MASK_SYS_DSTDY_TIM_SCAL << BIT_SHIFT_SYS_DSTDY_TIM_SCAL) | (BIT_MASK_SYS_ANACK_TU_TIME << BIT_SHIFT_SYS_ANACK_TU_TIME))))
| ScaleTemp;
@ -679,7 +678,7 @@ DSleep(
u32 UTemp = 0;
u32 MaxTemp = 0;
u32 Reada335 = 0;
u32 Reada335;
//2 Deep Sleep mode:
//3 2.1 Set TU timer timescale