j3d1/RTL00_AT
1
0
Fork 0
mirror of https://github.com/pvvx/RTL00_AT.git synced 2024-11-21 17:44:15 +00:00
Code Issues Projects Releases Packages Wiki Activity

update

Browse source
This commit is contained in:
pvvx 2017-02-20 06:29:38 +03:00
parent 3d7b51ccd1
commit 1670c6e420
10 changed files with 2749 additions and 2750 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

BIN
build/bin/ota.bin
View file

Binary file not shown.

BIN
build/bin/ram_2.bin
View file

Binary file not shown.

BIN
build/bin/ram_2.ns.bin
View file

Binary file not shown.

BIN
build/bin/ram_2.p.bin
View file

Binary file not shown.

BIN
build/bin/ram_all.bin
View file

Binary file not shown.

5491
build/obj/build.nmap
View file

File diff suppressed because it is too large Load diff

1
project/inc/feep_config.h
View file

@ -9,6 +9,7 @@
#define _INC_FEEP_CONFIG_H_ #define _INC_FEEP_CONFIG_H_
#define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect #define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect
#define FEEP_ID_WIFI_AP_CFG 0x5731 // id:'1W', type: struct rtw_wifi_config_t
#define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF #define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF
#define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf #define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf
#define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct #define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct

2
project/inc/platform_autoconf.h
View file

@ -187,7 +187,7 @@
=3 errors + warning + info, =3 errors + warning + info,
=4 errors + warning + info + debug, =4 errors + warning + info + debug,
=5 full */ =5 full */
#define CONFIG_DEBUG_LOG 5 #define CONFIG_DEBUG_LOG 2
#if CONFIG_DEBUG_LOG > 0 #if CONFIG_DEBUG_LOG > 0
//#define CONFIG_DEBUG_ERR_MSG 1 //#define CONFIG_DEBUG_ERR_MSG 1
#define CONFIG_DEBUG_LOG_ADC_HAL 1 #define CONFIG_DEBUG_LOG_ADC_HAL 1

3
project/src/user/main.c
View file

@ -66,8 +66,9 @@ void main(void)
DBG_8195A("crypto engine init failed\r\n"); DBG_8195A("crypto engine init failed\r\n");
} }
*/ */
#if 0 // def CONFIG_CPU_CLK #if 1 // def CONFIG_CPU_CLK
if(HalGetCpuClk() != PLATFORM_CLOCK) { if(HalGetCpuClk() != PLATFORM_CLOCK) {
*((int *)0x40000074) &= ~(1<<17);
HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
HAL_LOG_UART_ADAPTER pUartAdapter; HAL_LOG_UART_ADAPTER pUartAdapter;
pUartAdapter.BaudRate = RUART_BAUD_RATE_38400; pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;