mirror of
https://github.com/pvvx/RTL00_AT.git
synced 2025-07-31 12:41:08 +00:00
116 lines
3 KiB
C
116 lines
3 KiB
C
#include "FreeRTOS.h"
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#include "task.h"
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#include "diag.h"
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#include "main.h"
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#include <example_entry.h>
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#include "user/atcmd_user.h"
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#include "rtl8195a.h"
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#ifdef CONFIG_DEBUG_LOG
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#define DEBUG_MAIN_LEVEL CONFIG_DEBUG_LOG
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#else
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#define DEBUG_MAIN_LEVEL 0
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#endif
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#ifdef CONFIG_WLAN_CONNECT_CB
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/*_WEAK*/ void connect_start(void)
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{
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#if CONFIG_DEBUG_LOG
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rtl_printf("Time at start %d ms.\n", xTaskGetTickCount());
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#endif
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}
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/*_WEAK*/ void connect_close(void)
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{
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}
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#endif // CONFIG_WLAN_CONNECT_CB
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/*-------------------------
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* void Init_Rand(void)
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* __low_level_init()
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*------------------------*/
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void Init_Rand(void)
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{
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extern u32 _rand_z1, _rand_z2, _rand_z3, _rand_z4, _rand_first;
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u32 *p = (u32 *)0x1FFFFF00;
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while(p < (u32 *)0x20000000) _rand_z1 ^= *p++;
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_rand_z1 ^= (*((u32 *)0x40002018) << 24) ^ (*((u32 *)0x40002118) << 16) ^ (*((u32 *)0x40002218) << 8) ^ *((u32 *)0x40002318);
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_rand_z2 = ((_rand_z1 & 0x007F00FF) << 7) ^ ((_rand_z1 & 0x0F80FF00) >> 8);
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_rand_z3 = ((_rand_z2 & 0x007F00FF) << 7) ^ ((_rand_z2 & 0x0F80FF00) >> 8);
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_rand_z4 = ((_rand_z3 & 0x007F00FF) << 7) ^ ((_rand_z3 & 0x0F80FF00) >> 8);
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_rand_first = 1;
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#if DEBUG_MAIN_LEVEL > 100
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DBG_8195A("Rand z: %p, %p, %p, %p.\n", _rand_z1, _rand_z2, _rand_z3, _rand_z4);
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DBG_8195A("Rand() %p, %p, %p, %p.\n", Rand(), Rand(), Rand(), Rand());
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#endif
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}
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/**
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* @brief Main program.
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* @param None
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* @retval None
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*/
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void main(void)
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{
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#if DEBUG_MAIN_LEVEL > 3
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ConfigDebugErr = -1;
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ConfigDebugInfo = -1; //~_DBG_SPI_FLASH_;
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ConfigDebugWarn = -1;
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CfgSysDebugErr = -1;
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CfgSysDebugInfo = -1;
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CfgSysDebugWarn = -1;
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#endif
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/*
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if ( rtl_cryptoEngine_init() != 0 ) {
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DBG_8195A("crypto engine init failed\r\n");
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}
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*/
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#if 1 // def CONFIG_CPU_CLK
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if(HalGetCpuClk() != PLATFORM_CLOCK) {
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*((int *)0x40000074) &= ~(1<<17);
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HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
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HAL_LOG_UART_ADAPTER pUartAdapter;
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pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;
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HalLogUartSetBaudRate(&pUartAdapter);
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SystemCoreClockUpdate();
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En32KCalibration();
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}
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#else // 200 MHz
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HalCpuClkConfig(0);
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*((int *)0x40000074) |= (1<<17); // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz
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HAL_LOG_UART_ADAPTER pUartAdapter;
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pUartAdapter.BaudRate = RUART_BAUD_RATE_38400;
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HalLogUartSetBaudRate(&pUartAdapter);
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SystemCoreClockUpdate();
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En32KCalibration();
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#endif
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#if DEBUG_MAIN_LEVEL > 1
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vPortFree(pvPortMalloc(4)); // Init RAM heap
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fATST(NULL); // RAM/TCM/Heaps info
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#endif
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/* Initialize log uart and at command service */
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console_init();
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/* pre-processor of application example */
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pre_example_entry();
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/* wlan intialization */
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#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
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wlan_network();
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#endif
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/* Execute application example */
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example_entry();
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/*Enable Schedule, Start Kernel*/
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#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
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#ifdef PLATFORM_FREERTOS
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vTaskStartScheduler();
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#endif
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#else
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RtlConsolTaskRom(NULL);
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#endif
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}
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