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pvvx 2018-01-22 08:58:17 +03:00
parent 52cdbed72a
commit a60bde21d0
20 changed files with 45 additions and 49 deletions
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2
flasher/RTL00ConsoleROM.JLinkScript
View file

@ -1,6 +1,6 @@
h
loadbin flasher/RTL00Console_ROM.bin 0x10000ba8
r
w4 0x40000210,0x4011117
w4 0x40000210,0x4011113
g
q

2
flasher/RTL_Reset.JLinkScript
View file

@ -4,6 +4,6 @@ r1
trst1
h
r
w4 0x40000210,0x0211157
w4 0x40000210,0x0011113
g
q

1
flasher/cortex.ocd
View file

@ -97,3 +97,4 @@ proc load_ram_binary { local_filename address } {
boot_from_ram
resume
}

12
flasher/gdb_init.jlink
View file

@ -13,17 +13,17 @@ set mem inaccessible-by-default off
#set remote memory-write-packet-size 4096
#set remote memory-write-packet-size fixed
# Boot Flash
monitor long 0x40000210 = 0x211157
monitor long 0x40000210 = 0x00011113
# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
#monitor long 0x40000210 = 0x80011117
#monitor long 0x40000210 = 0x80011113
# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 )
#monitor long 0x40000210 = 0x20011117
#monitor long 0x40000210 = 0x20011113
# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 )
#monitor long 0x40000210 = 0x10011117
#monitor long 0x40000210 = 0x10011113
# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
#monitor long 0x40000210 = 0x8011117
#monitor long 0x40000210 = 0x8011113
# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 )
monitor long 0x40000210 = 0x4011117
monitor long 0x40000210 = 0x4011113
# CPU CLK 166 MHz?
# monitor long 0x40000014 = 0x00000011
# CPU CLK 83 MHz?

15
flasher/gdb_ota.jlink
View file

@ -43,32 +43,32 @@ end
# Boot_Flash
define SetBootFlash
printf "SetBoot = Flash:\n"
monitor long 0x40000210 = 0x211157
monitor long 0x40000210 = 0x011113
end
# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
define SetBootCall0
printf "SetBoot = Call0:\n"
monitor long 0x40000210 = 0x80011117
monitor long 0x40000210 = 0x80011113
end
# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 )
define SetBootCall1
printf "SetBoot = Call1:\n"
monitor long 0x40000210 = 0x20011117
monitor long 0x40000210 = 0x20011113
end
# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 )
define SetBootCall2
printf "SetBoot = Call2:\n"
monitor long 0x40000210 = 0x10011117
monitor long 0x40000210 = 0x10011113
end
# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
define SetBootCall3
printf "SetBoot = Call3:\n"
monitor long 0x40000210 = 0x8011117
monitor long 0x40000210 = 0x8011113
end
# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 )
define SetBootCall4
printf "SetBoot = Call4:\n"
monitor long 0x40000210 = 0x4011117
monitor long 0x40000210 = 0x4011113
end
# CPU CLK 166 MHz?
define SetClk166MHz
@ -89,8 +89,7 @@ monitor long 0x40000304 = 0x1FC00002
monitor long 0x40000250 = 0x400
monitor long 0x40000340 = 0x0
monitor long 0x40000230 = 0xdcc4
monitor long 0x40000210 = 0x11117
monitor long 0x40000210 = 0x11157
monitor long 0x40000210 = 0x11113
monitor long 0x400002c0 = 0x110011
monitor long 0x40000320 = 0xffffffff
end

1
flasher/rtl8710.ocd
View file

@ -353,3 +353,4 @@ proc boot_load_srdam {local_filename loc} {
# echo "# Go"
mww 0x1FFF0000 1
}