diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c index 6329c06..094ec5f 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c @@ -39,11 +39,11 @@ typedef struct _seg_header { uint32 size; uint32 ldaddr; + uint32 sign[2]; } IMGSEGHEAD, *PIMGSEGHEAD; typedef struct _img2_header { IMGSEGHEAD seg; - uint32 sign[2]; void (*startfunc)(void); uint8 rtkwin[7]; uint8 ver[13]; @@ -536,10 +536,10 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) { LOCAL uint32 BOOT_RAM_TEXT_SECTION load_img2_head(uint32 faddr, PIMG2HEAD hdr) { flashcpy(faddr, hdr, sizeof(IMG2HEAD)); uint32 ret = get_seg_id(hdr->seg.ldaddr, hdr->seg.size); - if (hdr->sign[1] == IMG_SIGN2_RUN) { - if (hdr->sign[0] == IMG_SIGN1_RUN) { + if (hdr->seg.sign[1] == IMG_SIGN2_RUN) { + if (hdr->seg.sign[0] == IMG_SIGN1_RUN) { ret |= 1 << 9; // есть сигнатура RUN - } else if (hdr->sign[0] == IMG_SIGN1_SWP) { + } else if (hdr->seg.sign[0] == IMG_SIGN1_SWP) { ret |= 1 << 8; // есть сигнатура SWP }; } @@ -566,7 +566,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr, uint8 } else if (seg_id) { #if CONFIG_DEBUG_LOG > 2 DBG_8195A("Skip Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", segnum, - faddr, txt_tab_seg[seg_id], hdr->seg.ldaddr, hdr->seg.size); + fnextaddr, txt_tab_seg[seg_id], hdr->seg.ldaddr, hdr->seg.size); #endif fnextaddr += hdr->seg.size; } else { @@ -574,7 +574,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr, uint8 fnextaddr -= 8; break; } - fnextaddr += flashcpy(fnextaddr, hdr, sizeof(IMGSEGHEAD)) + 8; + fnextaddr += flashcpy(fnextaddr, hdr, sizeof(IMGSEGHEAD)); segnum++; } return fnextaddr; diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/tools/rtlaimage.exe b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/tools/rtlaimage.exe new file mode 100644 index 0000000..686ba47 Binary files /dev/null and b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/tools/rtlaimage.exe differ diff --git a/RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript b/RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript index 5b85200..2754aa8 100644 --- a/RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript +++ b/RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript @@ -1,6 +1,6 @@ h loadbin flasher/RTL00Console_ROM.bin 0x10000ba8 r -w4 0x40000210,0x4011117 +w4 0x40000210,0x4011113 g q \ No newline at end of file diff --git a/RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript b/RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript index 196d12a..6c89309 100644 --- a/RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript +++ b/RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript @@ -4,6 +4,6 @@ r1 trst1 h r -w4 0x40000210,0x111157 +w4 0x40000210,0x0011113 g q \ No newline at end of file diff --git a/RTL00_SDKV35a/flasher/cortex.ocd b/RTL00_SDKV35a/flasher/cortex.ocd index b0cdf18..44e99ad 100644 --- a/RTL00_SDKV35a/flasher/cortex.ocd +++ b/RTL00_SDKV35a/flasher/cortex.ocd @@ -97,3 +97,4 @@ proc load_ram_binary { local_filename address } { boot_from_ram resume } + diff --git a/RTL00_SDKV35a/flasher/gdb_init.jlink b/RTL00_SDKV35a/flasher/gdb_init.jlink index 0ffc247..7ba6f46 100644 --- a/RTL00_SDKV35a/flasher/gdb_init.jlink +++ b/RTL00_SDKV35a/flasher/gdb_init.jlink @@ -13,17 +13,17 @@ set mem inaccessible-by-default off #set remote memory-write-packet-size 4096 #set remote memory-write-packet-size fixed # Boot Flash -monitor long 0x40000210 = 0x211157 +monitor long 0x40000210 = 0x00011113 # Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) -#monitor long 0x40000210 = 0x80011117 +#monitor long 0x40000210 = 0x80011113 # Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) -#monitor long 0x40000210 = 0x20011117 +#monitor long 0x40000210 = 0x20011113 # Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) -#monitor long 0x40000210 = 0x10011117 +#monitor long 0x40000210 = 0x10011113 # Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) -#monitor long 0x40000210 = 0x8011117 +#monitor long 0x40000210 = 0x8011113 # Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) -monitor long 0x40000210 = 0x4011117 +monitor long 0x40000210 = 0x4011113 # CPU CLK 166 MHz? # monitor long 0x40000014 = 0x00000011 # CPU CLK 83 MHz? diff --git a/RTL00_SDKV35a/flasher/gdb_ota.jlink b/RTL00_SDKV35a/flasher/gdb_ota.jlink index 9ed1306..9a4cf89 100644 --- a/RTL00_SDKV35a/flasher/gdb_ota.jlink +++ b/RTL00_SDKV35a/flasher/gdb_ota.jlink @@ -43,32 +43,32 @@ end # Boot_Flash define SetBootFlash printf "SetBoot = Flash:\n" -monitor long 0x40000210 = 0x211157 +monitor long 0x40000210 = 0x011113 end # Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) define SetBootCall0 printf "SetBoot = Call0:\n" -monitor long 0x40000210 = 0x80011117 +monitor long 0x40000210 = 0x80011113 end # Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) define SetBootCall1 printf "SetBoot = Call1:\n" -monitor long 0x40000210 = 0x20011117 +monitor long 0x40000210 = 0x20011113 end # Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) define SetBootCall2 printf "SetBoot = Call2:\n" -monitor long 0x40000210 = 0x10011117 +monitor long 0x40000210 = 0x10011113 end # Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) define SetBootCall3 printf "SetBoot = Call3:\n" -monitor long 0x40000210 = 0x8011117 +monitor long 0x40000210 = 0x8011113 end # Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) define SetBootCall4 printf "SetBoot = Call4:\n" -monitor long 0x40000210 = 0x4011117 +monitor long 0x40000210 = 0x4011113 end # CPU CLK 166 MHz? define SetClk166MHz @@ -89,8 +89,7 @@ monitor long 0x40000304 = 0x1FC00002 monitor long 0x40000250 = 0x400 monitor long 0x40000340 = 0x0 monitor long 0x40000230 = 0xdcc4 -monitor long 0x40000210 = 0x11117 -monitor long 0x40000210 = 0x11157 +monitor long 0x40000210 = 0x11113 monitor long 0x400002c0 = 0x110011 monitor long 0x40000320 = 0xffffffff end diff --git a/RTL00_SDKV35a/flasher/gdb_rdflash.jlink b/RTL00_SDKV35a/flasher/gdb_rdflash.jlink index 674ce48..949d3e9 100644 --- a/RTL00_SDKV35a/flasher/gdb_rdflash.jlink +++ b/RTL00_SDKV35a/flasher/gdb_rdflash.jlink @@ -4,7 +4,6 @@ source -v flasher/gdb_flasher.jlink InitJlink SystemInit SPI_Init -monitor speed 12000 #FlashInfo # Read FullFlash printf "Read FullFlash:\n" @@ -12,6 +11,6 @@ set $dumpstartaddr = $SPI_FLASH_BASE set $dumpendaddr = $SPI_FLASH_BASE + 0x100000 printf "Start addr of dumping = 0x%08x\n", $dumpstartaddr printf "End addr of dumping = 0x%08x\n", $dumpendaddr -dump binary memory ../fullflash.bin $dumpstartaddr $dumpendaddr +dump binary memory ./build/bin/fullflash.bin $dumpstartaddr $dumpendaddr printf "FullFlash saved in ./build/bin/fullflash.bin - OK.\n" quit diff --git a/RTL00_SDKV35a/flasher/gdb_wrfile.jlink b/RTL00_SDKV35a/flasher/gdb_wrfile.jlink index 0ecee30..b81e8c4 100644 --- a/RTL00_SDKV35a/flasher/gdb_wrfile.jlink +++ b/RTL00_SDKV35a/flasher/gdb_wrfile.jlink @@ -134,12 +134,10 @@ end end ######################################### source -v flasher/gdb_flasher.jlink - source -v flasher/file_info.jlink - InitJlink SystemInit -SetClk166MHz +SetClk83MHz SPI_Init FlasherInit FlasherLoad flasher/rtl8710_flasher.bin @@ -155,8 +153,4 @@ end else printf "Error: Image size is zero!\n" end -FlashImagesInfo -monitor reset -SetBootFlash -monitor go quit diff --git a/RTL00_SDKV35a/flasher/rtl8710.ocd b/RTL00_SDKV35a/flasher/rtl8710.ocd index dffd423..c3d94ec 100644 --- a/RTL00_SDKV35a/flasher/rtl8710.ocd +++ b/RTL00_SDKV35a/flasher/rtl8710.ocd @@ -353,3 +353,4 @@ proc boot_load_srdam {local_filename loc} { # echo "# Go" mww 0x1FFF0000 1 } + diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 7a085ba..d3f2766 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_1.p.bin b/build/bin/ram_1.p.bin index f0c9950..aa70b60 100644 Binary files a/build/bin/ram_1.p.bin and b/build/bin/ram_1.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index 27f9015..58cb310 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/flasher/RTL00ConsoleROM.JLinkScript b/flasher/RTL00ConsoleROM.JLinkScript index 5b85200..2754aa8 100644 --- a/flasher/RTL00ConsoleROM.JLinkScript +++ b/flasher/RTL00ConsoleROM.JLinkScript @@ -1,6 +1,6 @@ h loadbin flasher/RTL00Console_ROM.bin 0x10000ba8 r -w4 0x40000210,0x4011117 +w4 0x40000210,0x4011113 g q \ No newline at end of file diff --git a/flasher/RTL_Reset.JLinkScript b/flasher/RTL_Reset.JLinkScript index 3c0673f..6c89309 100644 --- a/flasher/RTL_Reset.JLinkScript +++ b/flasher/RTL_Reset.JLinkScript @@ -4,6 +4,6 @@ r1 trst1 h r -w4 0x40000210,0x0211157 +w4 0x40000210,0x0011113 g q \ No newline at end of file diff --git a/flasher/cortex.ocd b/flasher/cortex.ocd index b0cdf18..44e99ad 100644 --- a/flasher/cortex.ocd +++ b/flasher/cortex.ocd @@ -97,3 +97,4 @@ proc load_ram_binary { local_filename address } { boot_from_ram resume } + diff --git a/flasher/gdb_init.jlink b/flasher/gdb_init.jlink index 0ffc247..7ba6f46 100644 --- a/flasher/gdb_init.jlink +++ b/flasher/gdb_init.jlink @@ -13,17 +13,17 @@ set mem inaccessible-by-default off #set remote memory-write-packet-size 4096 #set remote memory-write-packet-size fixed # Boot Flash -monitor long 0x40000210 = 0x211157 +monitor long 0x40000210 = 0x00011113 # Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) -#monitor long 0x40000210 = 0x80011117 +#monitor long 0x40000210 = 0x80011113 # Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) -#monitor long 0x40000210 = 0x20011117 +#monitor long 0x40000210 = 0x20011113 # Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) -#monitor long 0x40000210 = 0x10011117 +#monitor long 0x40000210 = 0x10011113 # Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) -#monitor long 0x40000210 = 0x8011117 +#monitor long 0x40000210 = 0x8011113 # Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) -monitor long 0x40000210 = 0x4011117 +monitor long 0x40000210 = 0x4011113 # CPU CLK 166 MHz? # monitor long 0x40000014 = 0x00000011 # CPU CLK 83 MHz? diff --git a/flasher/gdb_ota.jlink b/flasher/gdb_ota.jlink index 9ed1306..9a4cf89 100644 --- a/flasher/gdb_ota.jlink +++ b/flasher/gdb_ota.jlink @@ -43,32 +43,32 @@ end # Boot_Flash define SetBootFlash printf "SetBoot = Flash:\n" -monitor long 0x40000210 = 0x211157 +monitor long 0x40000210 = 0x011113 end # Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) define SetBootCall0 printf "SetBoot = Call0:\n" -monitor long 0x40000210 = 0x80011117 +monitor long 0x40000210 = 0x80011113 end # Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) define SetBootCall1 printf "SetBoot = Call1:\n" -monitor long 0x40000210 = 0x20011117 +monitor long 0x40000210 = 0x20011113 end # Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) define SetBootCall2 printf "SetBoot = Call2:\n" -monitor long 0x40000210 = 0x10011117 +monitor long 0x40000210 = 0x10011113 end # Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) define SetBootCall3 printf "SetBoot = Call3:\n" -monitor long 0x40000210 = 0x8011117 +monitor long 0x40000210 = 0x8011113 end # Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) define SetBootCall4 printf "SetBoot = Call4:\n" -monitor long 0x40000210 = 0x4011117 +monitor long 0x40000210 = 0x4011113 end # CPU CLK 166 MHz? define SetClk166MHz @@ -89,8 +89,7 @@ monitor long 0x40000304 = 0x1FC00002 monitor long 0x40000250 = 0x400 monitor long 0x40000340 = 0x0 monitor long 0x40000230 = 0xdcc4 -monitor long 0x40000210 = 0x11117 -monitor long 0x40000210 = 0x11157 +monitor long 0x40000210 = 0x11113 monitor long 0x400002c0 = 0x110011 monitor long 0x40000320 = 0xffffffff end diff --git a/flasher/rtl8710.ocd b/flasher/rtl8710.ocd index dffd423..c3d94ec 100644 --- a/flasher/rtl8710.ocd +++ b/flasher/rtl8710.ocd @@ -353,3 +353,4 @@ proc boot_load_srdam {local_filename loc} { # echo "# Go" mww 0x1FFF0000 1 } + diff --git a/tools/rtlaimage/rtlaimage.py b/tools/rtlaimage/rtlaimage.py index da81ce5..dec78c8 100644 --- a/tools/rtlaimage/rtlaimage.py +++ b/tools/rtlaimage/rtlaimage.py @@ -10,7 +10,7 @@ import os import struct import sys -__version__ = "20.01.18" +__version__ = "22.01.18" PYTHON2 = sys.version_info[0] < 3 # True if on pre-Python 3 @@ -295,7 +295,7 @@ def elf2image(args): for s in image: if s.hm & HM_IS_OTA: chks = s.save_ota(f, fn, chks) - f.write(struct.pack('