mirror of
https://github.com/jialexd/sdk-ameba-v4.0c_180328.git
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356 lines
12 KiB
C
Executable file
356 lines
12 KiB
C
Executable file
/**
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******************************************************************************
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* @file rtl8711b_i2s.h
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* @author
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* @version V1.0.0
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* @date 2016-05-17
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* @brief This file contains all the functions prototypes for the I2S firmware
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* library.
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******************************************************************************
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* @attention
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*
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* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
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******************************************************************************
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*/
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#ifndef _RTL8710B_I2S_H_
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#define _RTL8710B_I2S_H_
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/** @addtogroup AmebaZ_Periph_Driver
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* @{
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*/
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/** @defgroup I2S
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* @brief I2S driver modules
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* @{
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*/
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/** @addtogroup I2S
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* @verbatim
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*****************************************************************************************
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* Introduction
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*****************************************************************************************
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* I2S:
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* - Base Address: I2S_DEV
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* - Source clk: 22.579MHz or 24.576MHz(default)
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* - Sample rate: 8K, 16K, 24K, 32K, 48K, 96K, 7.35K, 14.7K, 22.05K, 29.4K, 44.1K, 88.2K
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* - Sample bit: 16 bit, 24 bit
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* - Page num & page size: Max page_num=4, Max page_size=16K byte
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* - IRQ: I2S0_PCM0_IRQ
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*
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*****************************************************************************************
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* PINMUX
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*****************************************************************************************
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* I2S:
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* - S0: _PA_18(mck)/_PA_19(tx)/_PA_20(rx)/_PA_21(clk)/_PA_22(ws).
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* - S1: _PB_4(mck)/_PB_5(tx)/_PB_6(ws)/_PA_31(clk)/_PA_24(rx).
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*
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*****************************************************************************************
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* How to use I2S
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*****************************************************************************************
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* To use I2S peripheral, the following steps are mandatory:
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*
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* 1. Enable I2S power:
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* LXBUS_FCTRL(ON).
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*
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* 2. Enable the I2S interface clock using
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* RCC_PeriphClockCmd(APBPeriph_I2S0, APBPeriph_I2S0_CLOCK, ENABLE);
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*
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* 3. I2S pinmux:
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* Pinmux_Config(Pin_Num, PINMUX_FUNCTION_I2S).
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*
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* 4. Fill the I2S_InitStruct with the desired parameters.
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*
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* 5. configure I2S with the corresponding configuration.
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* I2S_Init(I2S_DEV, &I2S_Adapter.I2SInitStruct)
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*
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* 6. Activate the I2S peripheral:
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* I2S_Cmd(I2S_DEV, ENABLE).
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*
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* 7. Configure interrupts:
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* I2S_INTConfig()
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*
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* @note All other functions can be used separately to modify, if needed,
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* a specific feature of the I2S
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*****************************************************************************************
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* @endverbatim
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup I2S_Exported_Types I2S Exported Types
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* @{
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*/
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/**
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* @brief I2S Init structure definition
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*/
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typedef struct {
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u32 I2S_SlaveMode; /*!< Specifies the I2S operating mode
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This parameter can be a value of @ref I2S_device_mode */
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u32 I2S_WordLen; /*!< Specifies the I2S word length
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This parameter can be a value of @ref I2S_word_length */
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u32 I2S_Justify; /*!< Specifies the I2S digital interface format
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This parameter can be a value of @ref I2S_format */
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u32 I2S_EndianSwap; /*!< Specifies the I2S endian mode
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This parameter can be a value of @ref I2S_endian_swap */
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u32 I2S_ChNum; /*!< Specifies the I2S channel number
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This parameter can be a value of @ref I2S_channel_number */
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u32 I2S_PageNum; /*!< Specifies the I2S page number
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This parameter must be set to a value in the 2~4 range */
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u32 I2S_PageSize; /*!< Specifies the I2S page size
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This parameter must be set to a value in the 1~4096 Word range */
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u32 I2S_Rate; /*!< Specifies the I2S sample rate
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This parameter can be a value of @ref I2S_sample_rate */
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u32 I2S_TRxAct; /*!< Specifies the I2S transfer direction
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This parameter can be a value of @ref I2S_direction */
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u32 I2S_InterLoopback;/*!< Specifies the I2S internal/external loopback
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This parameter must be set to a value 0(external) or 1(internal) */
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} I2S_InitTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup I2S_Exported_Constants I2S Exported Constants
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* @{
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*/
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/** @defgroup I2S_device_mode I2S Device Mode
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* @{
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*/
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#define I2S_MASTER_MODE ((u32)0x00000000)
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#define I2S_SLAVE_MODE ((u32)0x00000001)
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#define IS_I2S_MODE(MODE) (((MODE) == I2S_MASTER_MODE) || \
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((MODE) == I2S_SLAVE_MODE))
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/**
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* @}
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*/
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/** @defgroup I2S_word_length I2S Word Length
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* @{
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*/
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#define I2S_WL_16 ((u32)0x00000000)
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#define I2S_WL_24 ((u32)0x00000001)
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#define IS_I2S_WORD_LEN(LEN) (((LEN) == I2S_WL_16) || \
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((LEN) == I2S_WL_24))
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/**
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* @}
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*/
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/** @defgroup I2S_format I2S Interface Format
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* @{
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*/
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#define I2S_JY_I2S ((u32)0x00000000)
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#define I2S_JY_LEFT ((u32)0x00000001)
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#define I2S_JY_RIGHT ((u32)0x00000002)
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#define IS_I2S_JUSTIFY(FORMAT) (((FORMAT) == I2S_JY_I2S) || \
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((FORMAT) == I2S_JY_LEFT) || \
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((FORMAT) == I2S_JY_RIGHT))
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/**
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* @}
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*/
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/** @defgroup I2S_endian_swap I2S Endian Swap
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* @{
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*/
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#define I2S_ES_LITTLE ((u32)0x00000000)
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#define I2S_ES_BIG ((u32)0x00000001)
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#define IS_I2S_ENDIAN_SWAP(SWAP) (((SWAP) == I2S_ES_LITTLE) || \
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((SWAP) == I2S_ES_BIG))
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/**
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* @}
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*/
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/** @defgroup I2S_direction I2S Bus Direction(Transmit/Receive)
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* @{
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*/
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#define I2S_ONLY_RX ((u32)0x00000000)
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#define I2S_ONLY_TX ((u32)0x00000001)
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#define I2S_TXRX ((u32)0x00000002)
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#define IS_I2S_DIR(DIR) (((DIR) == I2S_ONLY_RX) || \
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((DIR) == I2S_ONLY_TX) || \
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((DIR) == I2S_TXRX))
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/**
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* @}
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*/
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/** @defgroup I2S_channel_number I2S Channel Number
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* @{
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*/
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#define I2S_CH_STEREO ((u32)0x00000000)
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#define I2S_CH_RSVD ((u32)0x00000001)
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#define I2S_CH_MONO ((u32)0x00000002)
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#define IS_I2S_CHN_NUM(NUM) (((NUM) == I2S_CH_STEREO) || \
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((NUM) == I2S_CH_MONO))
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/**
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* @}
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*/
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/** @defgroup I2S_sample_rate I2S Sample Rate
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* @{
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*/
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#define I2S_SR_8KHZ ((u32)0x00000000)
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#define I2S_SR_16KHZ ((u32)0x00000001)
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#define I2S_SR_24KHZ ((u32)0x00000002)
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#define I2S_SR_32KHZ ((u32)0x00000003)
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#define I2S_SR_48KHZ ((u32)0x00000005)
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#define I2S_SR_96KHZ ((u32)0x00000006)
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#define I2S_SR_7p35KHZ ((u32)0x00000010)
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#define I2S_SR_14p7KHZ ((u32)0x00000011)
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#define I2S_SR_22p05KHZ ((u32)0x00000012)
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#define I2S_SR_29p4KHZ ((u32)0x00000013)
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#define I2S_SR_44p1KHZ ((u32)0x00000015)
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#define I2S_SR_88p2KHZ ((u32)0x00000016)
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#define IS_I2S_SAMPLE_RATE(RATE) (((RATE) == I2S_SR_8KHZ) || \
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((RATE) == I2S_SR_16KHZ) || \
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((RATE) == I2S_SR_24KHZ) || \
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((RATE) == I2S_SR_32KHZ) || \
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((RATE) == I2S_SR_48KHZ) || \
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((RATE) == I2S_SR_96KHZ) || \
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((RATE) == I2S_SR_7p35KHZ) || \
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((RATE) == I2S_SR_14p7KHZ) || \
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((RATE) == I2S_SR_22p05KHZ) || \
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((RATE) == I2S_SR_29p4KHZ) || \
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((RATE) == I2S_SR_44p1KHZ) || \
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((RATE) == I2S_SR_88p2KHZ))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup I2S_Exported_Functions I2S Exported Functions
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* @{
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*/
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_LONG_CALL_ void I2S_Init(I2S_TypeDef* I2Sx, I2S_InitTypeDef* I2S_InitStruct);
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_LONG_CALL_ void I2S_Cmd(I2S_TypeDef* I2Sx, u8 NewState);
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_LONG_CALL_ void I2S_INTConfig(I2S_TypeDef* I2Sx, u32 I2STxIntrMSK, u32 I2SRxIntrMSK);
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_LONG_CALL_ void I2S_SetRate(I2S_TypeDef* I2Sx, u32 I2S_Rate);
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_LONG_CALL_ void I2S_SetWordLen(I2S_TypeDef* I2Sx, u32 I2S_WordLen);
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_LONG_CALL_ void I2S_SetChNum(I2S_TypeDef* I2Sx, u32 I2S_ChNum);
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_LONG_CALL_ void I2S_SetPageNum(I2S_TypeDef* I2Sx, u32 I2S_PageNum);
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_LONG_CALL_ void I2S_SetPageSize(I2S_TypeDef* I2Sx, u32 I2S_PageSize);
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_LONG_CALL_ void I2S_SetDirection(I2S_TypeDef* I2Sx, u32 I2S_TRxAct);
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_LONG_CALL_ void I2S_INTClear(I2S_TypeDef* I2Sx, u32 I2STxIntrClr, u32 I2SRxIntrClr);
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_LONG_CALL_ void I2S_INTClearAll(I2S_TypeDef* I2Sx);
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_LONG_CALL_ void I2S_ISRGet(I2S_TypeDef* I2Sx, u32* I2STxIsr, u32* I2SRxIsr);
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_LONG_CALL_ void I2S_SetDMABuf(I2S_TypeDef* I2Sx, u8 *I2STxData, u8 *I2SRxData);
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_LONG_CALL_ u32 I2S_GetTxPage(I2S_TypeDef* I2Sx);
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_LONG_CALL_ void I2S_TxPageDMA_EN(I2S_TypeDef* I2Sx, u32 I2STxIdx);
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_LONG_CALL_ void I2S_RxPageDMA_EN(I2S_TypeDef* I2Sx, u32 I2SRxIdx);
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_LONG_CALL_ void I2S_TxDmaCmd(I2S_TypeDef* I2Sx, u32 NewState);
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_LONG_CALL_ void I2S_RxDmaCmd(I2S_TypeDef* I2Sx, u32 NewState);
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/**
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* @}
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*/
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/* Registers Definitions --------------------------------------------------------*/
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/**************************************************************************//**
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* @defgroup I2S_Register_Definitions I2S Register Definitions
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* @{
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*****************************************************************************/
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/**************************************************************************//**
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* @defgroup I2S_CONTROL
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* @{
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*****************************************************************************/
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#define BIT_CTRL_CTLX_I2S_EN ((u32)0x00000001 << 0)
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#define BIT_CTRL_CTLX_I2S_TX_ACT_MASK ((u32)0x00000003 << 1)
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#define BIT_CTRL_CTLX_I2S_CHN_NUM_MASK ((u32)0x00000003 << 3)
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#define BIT_CTRL_CTLX_I2S_WORD_LEN_MASK ((u32)0x00000001 << 6)
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#define BIT_CTRL_CTLX_I2S_INTERNAL ((u32)0x00000001 << 7)
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#define BIT_CTRL_CTLX_I2S_ENDIAN_SWAP ((u32)0x00000001 << 12)
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#define BIT_CTRL_CTLX_I2S_CLK_SRC ((u32)0x00000001 << 30)
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#define BIT_CTRL_CTLX_I2S_SW_RSTN ((u32)0x00000001 << 31)
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/** @} */
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/**************************************************************************//**
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* @defgroup I2S_SETTING
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* @{
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*****************************************************************************/
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#define BIT_SETTING_I2S_PAGE_SIZE_MASK ((u32)0x00000FFF)
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#define BIT_SETTING_I2S_PAGE_NUM_MASK ((u32)0x00000003 << 12)
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#define BIT_SETTING_I2S_RATE_MASK ((u32)0x00000007 << 14)
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/** @} */
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/**************************************************************************//**
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* @defgroup I2S_TX_INT_MASK or STATUS
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* @{
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*****************************************************************************/
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#define I2S_TX_INT_PAGE0_OK ((u32)0x00000001 << 0)
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#define I2S_TX_INT_PAGE1_OK ((u32)0x00000001 << 1)
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#define I2S_TX_INT_PAGE2_OK ((u32)0x00000001 << 2)
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#define I2S_TX_INT_PAGE3_OK ((u32)0x00000001 << 3)
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#define I2S_TX_INT_PAGE0_UNAVA ((u32)0x00000001 << 4)
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#define I2S_TX_INT_PAGE1_UNAVA ((u32)0x00000001 << 5)
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#define I2S_TX_INT_PAGE2_UNAVA ((u32)0x00000001 << 6)
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#define I2S_TX_INT_PAGE3_UNAVA ((u32)0x00000001 << 7)
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#define I2S_TX_INT_EMPTY ((u32)0x00000001 << 8)
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/** @} */
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/**************************************************************************//**
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* @defgroup I2S_RX_INT_MASK or STATUS
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* @{
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*****************************************************************************/
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#define I2S_RX_INT_PAGE0_OK ((u32)0x00000001 << 0)
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#define I2S_RX_INT_PAGE1_OK ((u32)0x00000001 << 1)
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#define I2S_RX_INT_PAGE2_OK ((u32)0x00000001 << 2)
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#define I2S_RX_INT_PAGE3_OK ((u32)0x00000001 << 3)
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#define I2S_RX_INT_PAGE0_UNAVA ((u32)0x00000001 << 4)
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#define I2S_RX_INT_PAGE1_UNAVA ((u32)0x00000001 << 5)
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#define I2S_RX_INT_PAGE2_UNAVA ((u32)0x00000001 << 6)
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#define I2S_RX_INT_PAGE3_UNAVA ((u32)0x00000001 << 7)
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#define I2S_RX_INT_FULL ((u32)0x00000001 << 8)
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/** @} */
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/**************************************************************************//**
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* @defgroup I2S_TX_OWN or RX_PAGE_OWN
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* @{
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*****************************************************************************/
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#define BIT_IS_PAGE_OWN ((u32)0x80000000)
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/** @} */
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/** @} */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* _RTL8710B_I2S_H_ */
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/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
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