mirror of
https://github.com/jialexd/sdk-ameba-v4.0c_180328.git
synced 2024-11-24 23:14:18 +00:00
201 lines
No EOL
6.2 KiB
C
Executable file
201 lines
No EOL
6.2 KiB
C
Executable file
#include <stdio.h>
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#include "PinNames.h"
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#include "basic_types.h"
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#include "diag.h"
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#include <osdep_api.h>
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#include "i2c_api.h"
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#include "pinmap.h"
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//#define I2C_MTR_SDA PC_4//PB_3
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//#define I2C_MTR_SCL PC_5//PB_2
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#if defined(CONFIG_PLATFORM_8195A)
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#define I2C_MTR_SDA PB_3
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#define I2C_MTR_SCL PB_2
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#elif defined(CONFIG_PLATFORM_8711B)
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#define I2C_MTR_SDA PA_30
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#define I2C_MTR_SCL PA_29
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#endif
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#define I2C_BUS_CLK 100000 //hz
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#define I2C_ALC5651_ADDR (0x34/2)
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#define RT5651_PRIV_INDEX 0x6a
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#define RT5651_PRIV_DATA 0x6c
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#if defined (__ICCARM__)
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i2c_t alc5651_i2c;
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#else
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volatile i2c_t alc5651_i2c;
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#define printf DBG_8195A
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#endif
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static void alc5651_delay(void)
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{
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int i;
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i=10000;
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while (i) {
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i--;
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asm volatile ("nop\n\t");
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}
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}
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void alc5651_reg_write(unsigned int reg, unsigned int value)
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{
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char buf[4];
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buf[0] = (char)reg;
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buf[1] = (char)(value>>8);
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buf[2] = (char)(value&0xff);
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i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 3, 1);
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alc5651_delay();
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}
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void alc5651_reg_read(unsigned int reg, unsigned int *value)
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{
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int tmp;
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char *buf = (char*)&tmp;
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buf[0] = (char)reg;
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i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 1, 1);
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alc5651_delay();
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buf[0] = 0xaa;
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buf[1] = 0xaa;
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i2c_read(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 2, 1);
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alc5651_delay();
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*value= ((buf[0]&0xFF)<<8)|(buf[1]&0xFF);
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}
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void alc5651_index_write(unsigned int reg, unsigned int value)
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{
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alc5651_reg_write(RT5651_PRIV_INDEX, reg);
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alc5651_reg_write(RT5651_PRIV_DATA, value);
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}
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void alc5651_index_read(unsigned int reg, unsigned int *value)
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{
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alc5651_reg_write(RT5651_PRIV_INDEX, reg);
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alc5651_reg_read(RT5651_PRIV_DATA, value);
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}
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void alc5651_reg_dump(void)
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{
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int i;
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unsigned int value;
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printf("alc5651 codec reg dump\n\r");
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printf("------------------------\n\r");
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for(i=0;i<=0xff;i++){
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alc5651_reg_read(i, &value);
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printf("%02x : %04x\n\r", i, (unsigned short)value);
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}
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printf("------------------------\n\r");
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}
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void alc5651_index_dump(void)
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{
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int i;
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unsigned int value;
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printf("alc5651 codec index dump\n\r");
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printf("------------------------\n\r");
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for(i=0;i<=0xff;i++){
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alc5651_index_read(i, &value);
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printf("%02x : %04x\n\r", i, (unsigned short)value);
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}
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printf("------------------------\n\r");
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}
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void alc5651_init(void)
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{
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i2c_init(&alc5651_i2c, I2C_MTR_SDA, I2C_MTR_SCL);
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i2c_frequency(&alc5651_i2c, I2C_BUS_CLK);
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}
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void alc5651_set_word_len(int len_idx) // interface2
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{
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// 0: 16 1: 20 2: 24 3: 8
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unsigned int val;
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alc5651_reg_read(0x71,&val);
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val &= (~(0x3<<2));
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val |= (len_idx<<2);
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alc5651_reg_write(0x71,val);
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alc5651_reg_read(0x70,&val);
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val &= (~(0x3<<2));
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val |= (len_idx<<2);
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alc5651_reg_write(0x70,val);
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}
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void alc5651_init_interface1(void)
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{
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alc5651_reg_write(0x00,0x0021);
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alc5651_reg_write(0x63,0xE8FE);
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alc5651_reg_write(0x61,0x5800);
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alc5651_reg_write(0x62,0x0C00);
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alc5651_reg_write(0x73,0x0000);
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alc5651_reg_write(0x2A,0x4242);
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alc5651_reg_write(0x45,0x2000);
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alc5651_reg_write(0x02,0x4848);
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alc5651_reg_write(0x8E,0x0019);
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alc5651_reg_write(0x8F,0x3100);
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alc5651_reg_write(0x91,0x0E00);
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alc5651_index_write(0x3D,0x3E00);
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alc5651_reg_write(0xFA,0x0011);
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alc5651_reg_write(0x83,0x0800);
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alc5651_reg_write(0x84,0xA000);
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alc5651_reg_write(0xFA,0x0C11);
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alc5651_reg_write(0x64,0x4010);
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alc5651_reg_write(0x65,0x0C00);
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alc5651_reg_write(0x61,0x5806);
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alc5651_reg_write(0x62,0xCC00);
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alc5651_reg_write(0x3C,0x004F);
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alc5651_reg_write(0x3E,0x004F);
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alc5651_reg_write(0x27,0x3820);
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alc5651_reg_write(0x77,0x0000);
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}
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void alc5651_init_interface2(void)
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{
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int reg_value=0;
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alc5651_reg_write(0x00,0x0021);//reset all, device id 1
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alc5651_reg_write(0x63,0xE8FE);//Power managerment control 3:
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//VREF1&2 on, both slow VREF, MBIAS on, MBIAS bandcap power on, L & R HP Amp on, improve HP Amp driving enabled
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alc5651_reg_write(0x61,0x5800);//power managerment control 1:
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//I2S2 digital interface on, Analog DACL1 & DACR1 on.
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alc5651_reg_write(0x62,0x0C00);//stereo1 & 2 DAC filter power on
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alc5651_reg_write(0x73,0x0000);//ADC/DAC Clock control 1:
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//I2S Clock Pre-Divider 1 & 2: /1. Stereo DAC Over Sample Rate : 128Fs
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alc5651_reg_write(0x2A,0x4242);//Stereo DAC digital mixer control
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//Un-mute DACL2 to Stereo DAC Left & Right Mixer
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alc5651_reg_write(0x45,0x2000);//HPOMIX: Un-mute DAC1 to HPOMIX
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alc5651_reg_write(0x02,0x4848);//HP Output Control:
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//Unmute HPOL, HPOR
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// alc5651_reg_write(0x0F,0x1F1F);//INL & INR Volume Control
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// alc5651_reg_write(0x0D,0x0800);//IN1/2 Input Control
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// alc5651_reg_write(0x1C,0x7F7F);//Stereo1 ADC Digital Volume Control
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// alc5651_reg_write(0x1E,0xF000);// ADC Digital Boost Gain Control
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alc5651_reg_write(0x8E,0x0019);//HP Amp Control 1
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// Enable HP Output, Charge Pump Power On, HP Amp All Power On
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alc5651_reg_write(0x8F,0x3100);//HP Amp Control 2, HP Depop Mode 2
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alc5651_reg_write(0x91,0x0E00);//HP Amp Control 3, select HP capless power mode
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alc5651_index_write(0x3D,0x3E00);//unknown
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alc5651_reg_write(0xFA,0x0011);//enable input clock
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alc5651_reg_write(0x83,0x0800);//default ASRC control 1
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alc5651_reg_write(0x84,0xA000);//ASRC control 2: I2S1 enable ASRC mode, Sterol1 DAC filter ASRC mode.
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// alc5651_reg_write(0xFA,0x0C11);//? ? ? MX-FAh[15:4]reserved
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alc5651_reg_write(0x64,0x4010);//power managerment control 4:
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//MIC BST2 Power On; MIC2 SE Mode single-end mode or line-input mode
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alc5651_reg_write(0x65,0x0C00);//power managerment control 5: RECMIX L & R power on
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alc5651_reg_write(0x61,0x5806);//power managerment control 1:
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// I2S2 Digital Interface On, Analog DACL1, DACR1 power on; Analog ADCL, ADCR power on
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alc5651_reg_write(0x62,0xCC00);//power managerment control 2: Stereo1&2 ADC/DAC digital filter power on
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alc5651_reg_write(0x3C,0x004F);//RECMIXL
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alc5651_reg_write(0x3E,0x004F);//RECMIXR
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alc5651_reg_write(0x28,0x3030);//stereo2 ADC digital mixer control : Mute Stereo2 ADC L&R channel, ADCR
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alc5651_reg_write(0x2F,0x0080); //Interface DAC/ADC Data control: Select IF2 ADCDAT Data Source IF1_ADC2
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} |