mirror of
https://github.com/jialexd/sdk-ameba-v4.0c_180328.git
synced 2024-11-01 03:44:17 +00:00
157 lines
3.4 KiB
Text
Executable file
157 lines
3.4 KiB
Text
Executable file
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ENTRY(Reset_Handler)
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INCLUDE "export-rom_symbol_v01.txt"
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000 /* ROM: 512k */
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ROMBSS_RAM (rw) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* ROM BSS RAM: 8K */
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BOOTLOADER_RAM (rwx) : ORIGIN = 0x10002000, LENGTH = 0x3000 /* BOOT Loader RAM: 12K */
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BD_RAM (rwx) : ORIGIN = 0x10005000, LENGTH = 0x2B000 /* MAIN RAM: 228 */
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MSP_RAM (wx) : ORIGIN = 0x1003E000, LENGTH = 0x1000 /* MSP RAM: 4k */
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RDP_RAM (wx) : ORIGIN = 0x1003F000, LENGTH = 0xFF0 /* RDP RAM: 4k-0x10 */
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XIPBOOT (rx) : ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20 /* XIPBOOT: 32k, 32 Bytes resvd for header*/
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XIPSYS (r) : ORIGIN = 0x08009000, LENGTH = 0x1000 /* XIPSYS: 4K system data in flash */
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XIPCAL (r) : ORIGIN = 0x0800A000, LENGTH = 0x1000 /* XIPCAL: 4K calibration data in flash */
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XIP1 (rx) : ORIGIN = 0x0800B000+0x20, LENGTH = 0x75000-0x20 /* XIP1: 468k, 32 Bytes resvd for header */
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XIP2 (rx) : ORIGIN = 0x08080000+0x20, LENGTH = 0x75000-0x20 /* XIP2: 468k, 32 Bytes resvd for header */
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}
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SECTIONS
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{
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.rom.text : { } > ROM
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.rom.rodata : { } > ROM
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.hal.rom.bss : { } > ROMBSS_RAM
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/* image1 entry, this section should in RAM and fixed address for ROM */
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.ram_image1.entry :
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{
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__ram_image1_text_start__ = .;
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__ram_start_table_start__ = .;
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KEEP(*(SORT(.image1.entry.data*)))
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__ram_start_table_end__ = .;
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__image1_validate_code__ = .;
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KEEP(*(.image1.validate.rodata*))
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KEEP(*(.image1.export.symb*))
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} > BOOTLOADER_RAM
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/* Add . to assign the start address of the section */
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/* to prevent the change of the start address by ld doing section alignment */
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.ram_image1.text . :
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{
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/* image1 text */
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*(.boot.ram.text*)
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*(.boot.rodata*)
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} > BOOTLOADER_RAM
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.ram_image1.data . :
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{
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__ram_image1_data_start__ = .;
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KEEP(*(.boot.ram.data*))
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__ram_image1_data_end__ = .;
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__ram_image1_text_end__ = .;
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} > BOOTLOADER_RAM
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.ram_image1.bss . :
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{
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__image1_bss_start__ = .;
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KEEP(*(.boot.ram.bss*))
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KEEP(*(.boot.ram.end.bss*))
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__image1_bss_end__ = .;
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} > BOOTLOADER_RAM
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.ram_image2.entry :
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{
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__ram_image2_text_start__ = .;
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__image2_entry_func__ = .;
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KEEP(*(SORT(.image2.entry.data*)))
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__image2_validate_code__ = .;
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KEEP(*(.image2.validate.rodata*))
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} > BD_RAM
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.ram_image2.text :
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{
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KEEP(*(.image2.ram.text*))
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} > BD_RAM
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.ram_image2.data :
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{
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__data_start__ = .;
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*(.data*)
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__data_end__ = .;
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__ram_image2_text_end__ = .;
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. = ALIGN(16);
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} > BD_RAM
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.ram_image2.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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} > BD_RAM
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.ram_image2.skb.bss :
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{
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*(.bdsram.data*)
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__bss_end__ = .;
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} > BD_RAM
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.ram_heap.data :
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{
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*(.bfsram.data*)
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*(.heap.stdlib*)
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} > BD_RAM
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.ram_rdp.text :
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{
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__rom_top_4k_start_ = .;
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__rdp_text_start__ = .;
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KEEP(*(.rdp.ram.text*))
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KEEP(*(.rdp.ram.data*))
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__rdp_text_end__ = .;
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. = ALIGN(16);
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} > RDP_RAM
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.xip_image1.text :
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{
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__flash_boot_text_start__ = .;
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*(.flashboot.text*)
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__flash_boot_text_end__ = .;
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. = ALIGN(16);
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} > XIPBOOT
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.xip_image2.text :
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{
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__flash_text_start__ = .;
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*(.img2_custom_signature*)
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*(.text*)
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*(.rodata*)
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*(.debug_trace*)
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__flash_text_end__ = .;
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. = ALIGN (16);
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} > XIP2
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}
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SECTIONS
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{
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/* Bootloader symbol list */
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boot_export_symbol = 0x10002020;
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}
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