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92 lines
3.1 KiB
C
Executable file
92 lines
3.1 KiB
C
Executable file
/**************************************************************************//**
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* @file system_ARMCM3.h
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* @brief CMSIS Device System Header File for
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* ARMCM3 Device Series
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* @version V1.08
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* @date 23. November 2012
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*
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* @note
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*
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******************************************************************************/
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/* Copyright (c) 2011 - 2012 ARM LIMITED
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of ARM nor the names of its contributors may be used
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to endorse or promote products derived from this software without
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specific prior written permission.
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*
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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#ifndef _SYSTEM_8195A_H
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#define _SYSTEM_8195A_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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extern u32 SystemGetCpuClk(void);
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/**
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* @brief Generate random seed
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* @param none
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* @return value: random seed value
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*/
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u32 Gen_RandomSeed(VOID);
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/**
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* @brief get the state of rdp, enable or disable
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* @retval : This parameter can be one of the following values:
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* @arg TRUE: rdp is enable
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* @arg FALSE: rdp is disable
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*/
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u32 IsRDPenabled(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYSTEM_8195A_H */
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