first add sdk

component/soc/realtek/8195a/misc/driver/console_hs_uart.c

@@ -0,0 +1,247 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
+ *
+ *
+ ******************************************************************************/
+#include <platform_opts.h>
+#include "FreeRTOS.h"
+#include "task.h"
+#include <platform/platform_stdlib.h>
+#include "semphr.h"
+#include "device.h"
+#include "serial_api.h"
+#include "at_cmd/log_service.h"
+#include "osdep_service.h"
+#include "serial_ex_api.h"
+#include "pinmap.h"
+
+char hs_uart_ready = 0; // used to switch between loguart and high speed uart
+						// 0: loguart
+						// 1: highspeed uart
+
+// select uart tx/rx pin with gpio interrupt function
+#define UART_TX    PA_7
+#define UART_RX    PA_6
+
+#define KEY_NL			0xa // '\n'
+#define KEY_ENTER		0xd // '\r'
+#define KEY_BS    		0x8
+#define KEY_ESC    		0x1B
+#define KEY_LBRKT  		0x5B
+#define STR_END_OF_MP_FORMAT	"\r\n\r\r#"
+
+
+#define CMD_HISTORY_LEN	4	// max number of executed command saved
+extern char log_buf[LOG_SERVICE_BUFLEN];
+extern xSemaphoreHandle log_rx_interrupt_sema;
+char cmd_history[CMD_HISTORY_LEN][LOG_SERVICE_BUFLEN];
+static unsigned int cmd_history_count = 0;
+
+serial_t loguart_sobj;
+//_sema at_printf_sema;
+_sema hs_uart_dma_tx_sema;
+
+#define HS_UART_USE_DMA_TX 1
+
+void hs_uart_put_char(u8 c){
+	serial_putc(&loguart_sobj, c);
+}
+
+void hs_uart_send_string(char *str)
+{
+	unsigned int i=0;
+	while (str[i] != '\0') {
+		serial_putc(&loguart_sobj, str[i]);
+		i++;
+	}
+}
+
+#if UART_AT_USE_DMA_TX
+static void hs_uart_send_buf_done(uint32_t id)
+{
+	//serial_t *sobj = (serial_t *)id;
+
+	rtw_up_sema_from_isr(&uart_at_dma_tx_sema);
+}
+#endif
+
+void hs_uart_send_buf(u8 *buf, u32 len)
+{
+	unsigned char *st_p=buf;
+	if(!len || (!buf)){
+		return;
+	}
+#if UART_AT_USE_DMA_TX
+	int ret;
+	while(rtw_down_sema(&uart_at_dma_tx_sema) == _TRUE){
+		ret = serial_send_stream_dma(&loguart_sobj, st_p, len);
+		if(ret != HAL_OK){
+			rtw_up_sema(&uart_at_dma_tx_sema);
+			return;
+		}else{
+			return;
+		}
+	}
+#else
+	while(len){
+		serial_putc(&loguart_sobj, *st_p);
+		st_p++;
+		len--;
+	}
+#endif
+}
+
+void hs_uart_irq(uint32_t id, SerialIrq event)
+{
+	serial_t    *sobj = (serial_t *)id;
+	unsigned char rc=0;
+	static unsigned char temp_buf[LOG_SERVICE_BUFLEN] = "\0";
+	static unsigned char combo_key = 0;
+	static unsigned short buf_count = 0;
+	static unsigned char key_enter = 0;
+	static char cmd_history_index = 0;
+	if(event == RxIrq) {
+		rc = serial_getc(sobj);
+
+		if(key_enter && rc == KEY_NL){
+			//serial_putc(sobj, rc);
+			return;
+		}
+
+		if(rc == KEY_ESC){
+			combo_key = 1;
+		}else if(combo_key == 1){
+			if(rc == KEY_LBRKT)
+				combo_key = 2;
+			else
+				combo_key = 0;
+		}else if(combo_key == 2){
+			if(rc == 'A' || rc == 'B'){ // UP or Down
+				if(rc == 'A'){
+					cmd_history_index--;
+					if(cmd_history_index < 0)
+						cmd_history_index = (cmd_history_count>CMD_HISTORY_LEN)?CMD_HISTORY_LEN-1:(cmd_history_count-1)%CMD_HISTORY_LEN;
+				}else{
+					cmd_history_index++;
+					if(cmd_history_index > (cmd_history_count>CMD_HISTORY_LEN?CMD_HISTORY_LEN-1:(cmd_history_count-1)%CMD_HISTORY_LEN))
+						cmd_history_index = 0;
+				}
+				
+				if(cmd_history_count > 0){
+					buf_count = strlen(temp_buf);
+					rtw_memset(temp_buf,'\0',buf_count);
+					while(--buf_count >= 0){
+						serial_putc(sobj, KEY_BS);
+						serial_putc(sobj, ' ');
+						serial_putc(sobj, KEY_BS);
+					}
+					hs_uart_send_string(cmd_history[cmd_history_index%CMD_HISTORY_LEN]);
+					strcpy(temp_buf, cmd_history[cmd_history_index%CMD_HISTORY_LEN]);
+					buf_count = strlen(temp_buf);
+				}
+			}
+				
+			// exit combo
+			combo_key = 0;
+		}
+		else if(rc == KEY_ENTER){
+			key_enter = 1;
+			if(buf_count>0){
+				serial_putc(sobj, KEY_NL);
+				serial_putc(sobj, KEY_ENTER);
+				rtw_memset(log_buf,'\0',LOG_SERVICE_BUFLEN);
+				strncpy(log_buf,(char *)&temp_buf[0],buf_count);
+				rtw_up_sema_from_isr(&log_rx_interrupt_sema);
+				rtw_memset(temp_buf,'\0',buf_count);
+
+				/* save command */
+				rtw_memset(cmd_history[((cmd_history_count)%CMD_HISTORY_LEN)], '\0', buf_count+1);
+				strcpy(cmd_history[((cmd_history_count++)%CMD_HISTORY_LEN)], log_buf);
+				cmd_history_index = cmd_history_count%CMD_HISTORY_LEN;
+				//cmd_history_count++;
+				buf_count=0;
+			}else{
+				hs_uart_send_string(STR_END_OF_MP_FORMAT);
+			}
+		}
+		else if(rc == KEY_BS){
+			if(buf_count>0){
+				buf_count--;
+				temp_buf[buf_count] = '\0';
+				
+				serial_putc(sobj, rc);
+				serial_putc(sobj, ' ');
+				serial_putc(sobj, rc);
+			}
+		}
+		else{
+			/* cache input characters */
+			if(buf_count < (LOG_SERVICE_BUFLEN - 1)){
+				temp_buf[buf_count] = rc;
+				buf_count++;
+				serial_putc(sobj, rc);
+				key_enter = 0;
+			}
+			else if(buf_count == (LOG_SERVICE_BUFLEN - 1)){
+				temp_buf[buf_count] = '\0';
+				
+				hs_uart_send_string("\r\nERROR:exceed size limit"STR_END_OF_ATCMD_RET);
+			}
+		}
+	}
+}
+
+void console_init_hs_uart(void)
+{
+    serial_init(&loguart_sobj,UART_TX,UART_RX);
+    serial_baud(&loguart_sobj,38400);
+    serial_format(&loguart_sobj, 8, ParityNone, 1);
+
+#if UART_AT_USE_DMA_TX
+	rtw_init_sema(&hs_uart_dma_tx_sema, 1);
+	serial_send_comp_handler(&loguart_sobj, (void*)hs_uart_send_buf_done, (uint32_t)&loguart_sobj);
+#endif
+	
+	serial_irq_handler(&loguart_sobj, hs_uart_irq, (uint32_t)&loguart_sobj);
+	serial_irq_set(&loguart_sobj, RxIrq, 1);
+
+	for(char i=0; i<CMD_HISTORY_LEN; i++)
+		memset(cmd_history[i], '\0', LOG_SERVICE_BUFLEN);
+	
+	/* indicate low level layer that hs uart is ready */
+	hs_uart_ready = 1;
+}
+
+int use_mode;
+
+
+VOID HalSerialPutcRtl8195a( 
+    IN  u8 c
+    )
+{
+	extern char hs_uart_ready;
+	extern void hs_uart_put_char(u8 c);
+	if(hs_uart_ready)
+		hs_uart_put_char(c);
+}
+
+void console_init(void)
+{
+    sys_log_uart_off();
+    console_init_hs_uart();
+
+#if !TASK_SCHEDULER_DISABLED    
+    RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
+#else
+    RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
+#endif
+
+#if BUFFERED_PRINTF
+    rtl_printf_init();
+#endif
+}
+
+
+
+

component/soc/realtek/8195a/misc/driver/console_i2c.c

@@ -0,0 +1,166 @@
+#include <platform_opts.h>
+#include "serial_api.h"
+#include "serial_ex_api.h"
+#include "PinNames.h"
+#include "i2c_api.h"
+#include "pinmap.h"
+#include "ex_api.h"
+
+#define MBED_I2C_MTR_SDA    PB_3 //i2c3
+#define MBED_I2C_MTR_SCL    PB_2
+
+#define UART_BAUDRATE 115200
+
+#define MBED_I2C_SLAVE_ADDR0    0x4D  // 0x9A  //
+#define MBED_I2C_BUS_CLK        500000  //hz *Remind that in baud rate 9600 or 19200, 100000hz is suitable*
+
+static i2c_t   i2cmaster;
+
+#define I2C_DATA_LENGTH         2
+static char	i2cdatardsrc[I2C_DATA_LENGTH];
+static char	i2cdatarddst[I2C_DATA_LENGTH];
+
+const u8 DLL = 921600/UART_BAUDRATE;
+
+char    ctrl_initial_1[2] = {0x03 << 3,0x80};
+char    ctrl_initial_2[2] = {0x00 << 3,921600/UART_BAUDRATE};
+char    ctrl_initial_3[2] = {0x01 << 3,0x00};
+char    ctrl_initial_4[2] = {0x03 << 3,0xbf};
+char    ctrl_initial_5[2] = {0x02 << 3,0x10};
+char    ctrl_initial_6[2] = {0x03 << 3,0x03};
+char    ctrl_initial_7[2] = {0x02 << 3,0x06};
+char    ctrl_initial_8[2] = {0x02 << 3,0x01};
+//end i2c
+
+
+// Master// Tx
+#define CLEAR_MST_TXC_FLAG	(masterTXC = 0)
+#define SET_MST_TXC_FLAG	(masterTXC = 1)
+#define WAIT_MST_TXC		while(masterTXC == 0){;}
+
+volatile int     masterTXC;
+static char i2c_ready = 0;
+
+
+static void i2c_master_rxc_callback(void *userdata)
+{
+
+	int     i2clocalcnt;
+	int     result = 0;
+
+	// verify result
+	result = 1;
+	for (i2clocalcnt = 0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt++) {
+		if (i2cdatarddst[i2clocalcnt] != i2cdatardsrc[i2clocalcnt]) {
+			result = 0;
+			break;
+		}
+	}
+}
+
+static void i2c_master_txc_callback(void *userdata)
+{
+    SET_MST_TXC_FLAG;
+}
+
+static void i2c_master_write(void)
+{
+
+    //DBG_8195A("Mst-W\n");
+    CLEAR_MST_TXC_FLAG;
+
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_1[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_2[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_3[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_4[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_5[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_6[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_7[0], 2, 1);
+        i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &ctrl_initial_8[0], 2, 1);
+
+	WAIT_MST_TXC;
+
+}
+
+static void i2c_master_enable(void)
+{
+	_memset(&i2cmaster, 0x00, sizeof(i2c_t));
+	i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
+        i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
+        i2c_set_user_callback(&i2cmaster, I2C_RX_COMPLETE, i2c_master_rxc_callback);
+        i2c_set_user_callback(&i2cmaster, I2C_TX_COMPLETE, i2c_master_txc_callback);
+        //i2c_set_user_callback(&i2cmaster, I2C_ERR_OCCURRED, i2c_master_err_callback);
+
+}
+
+void i2c_redirect_init(void)
+{
+
+    // prepare for transmission
+
+    _memset(&i2cdatardsrc[0], 0x00, I2C_DATA_LENGTH);
+    _memset(&i2cdatarddst[0], 0x00, I2C_DATA_LENGTH);
+
+    i2c_ready = 1;
+
+    i2c_master_enable();
+    i2c_master_write();
+
+}
+
+static u8    tx_data_i2c[2];
+static u8    rx_data_i2c[2];
+
+void i2c_put_char(u8 c){
+
+     _memset(&tx_data_i2c[0],0x00,2);
+     _memset(&rx_data_i2c[0],0x00,2);
+     tx_data_i2c[0] = 0x00 << 3;
+     tx_data_i2c[1] = c;
+     i2c_write(&i2cmaster, 0x4D, &tx_data_i2c[0], 2, 1);
+     i2c_read (&i2cmaster, 0x4D, &rx_data_i2c[0], 2, 1);
+}
+
+int use_mode;
+
+void console_init(void)
+{      
+    i2c_redirect_init();
+
+    if(HalCheckSDramExist()){
+        //DiagPrintf("It's 8195_AM\n");
+        redirect_rom_init();
+    }
+
+#if !TASK_SCHEDULER_DISABLED    
+    RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
+#else
+    RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
+#endif
+
+#if BUFFERED_PRINTF
+    rtl_printf_init();
+#endif
+}
+
+
+
+VOID HalSerialPutcRtl8195a(IN  u8 c){
+  
+  	u32 CounterIndex = 0;
+    
+    extern char i2c_ready;
+    if(i2c_ready)
+        i2c_put_char(c);
+    
+}
+
+
+
+
+
+
+
+
+
+

component/soc/realtek/8195a/misc/driver/low_level_io.c

@@ -0,0 +1,119 @@
+#include <stdio.h>
+#include "hal_api.h"
+#include "rtl8195a.h"
+#include "platform_opts.h"
+
+#if !defined (__ICCARM__)
+extern u8 RAM_IMG1_VALID_PATTEN[];
+void *tmp = RAM_IMG1_VALID_PATTEN;
+#endif
+
+//for internal test
+#ifdef USE_MODE
+    extern int use_mode;
+    void mode_init(void){use_mode = 1;}
+#endif
+    
+#if defined ( __ICCARM__ )
+size_t __write(int Handle, const unsigned char * Buf, size_t Bufsize)
+{
+ 	int nChars = 0;
+ 	/* Check for stdout and stderr 
+ 	(only necessary if file descriptors are enabled.) */
+ 	if (Handle != 1 && Handle != 2)
+ 	{
+ 		return -1;
+ 	}
+ 	for (/*Empty */; Bufsize > 0; --Bufsize)
+ 	{
+ 		DiagPutChar(*Buf++);
+ 		++nChars;
+ 	}
+ 	return nChars;
+}
+
+size_t __read(int Handle, unsigned char * Buf, size_t Bufsize)
+{
+	int nChars = 0;
+	/* Check for stdin
+	(only necessary if FILE descriptors are enabled) */
+	if (Handle != 0)
+	{
+		return -1;
+	}
+	for (/*Empty*/; Bufsize > 0; --Bufsize)
+	{
+		int c = DiagGetChar(_FALSE);
+		if (c < 0)
+			break;
+		*(Buf++) = c;
+		++nChars;
+	}
+	return nChars;	
+}
+#endif
+
+
+
+int disablePrintf = FALSE;
+
+
+__weak VOID HalSerialPutcRtl8195a(IN  u8 c){
+  
+  	u32 CounterIndex = 0;
+
+	if(disablePrintf == TRUE)	return;
+
+	while(1) {
+                CounterIndex++;
+                if (CounterIndex >=6540)
+				break;
+
+		if (HAL_UART_READ8(UART_LINE_STATUS_REG_OFF) & 0x60)
+			break;	
+	}
+	         HAL_UART_WRITE8(UART_TRAN_HOLD_OFF, c);  
+    if (c == 0x0a) {
+        HAL_UART_WRITE8(UART_TRAN_HOLD_OFF, 0x0d);  
+    } 
+}
+
+
+
+
+#include <diag.h>
+u32 
+DiagPrintf(
+    IN  const char *fmt, ...
+)
+{
+	if(disablePrintf == TRUE)	return _TRUE;
+	
+	(void)VSprintf(0, fmt, ((const int *)&fmt)+1);	
+    return _TRUE;
+}
+
+extern u32 ConfigDebugErr;
+extern u32 ConfigDebugInfo;
+extern u32 ConfigDebugWarn;
+static u32 backupErr;
+static u32 backupInfo;
+static u32 backupWarn;
+void log_uart_enable_printf(void)
+{
+	disablePrintf = FALSE;
+	ConfigDebugErr = backupErr;
+	ConfigDebugInfo = backupInfo;
+	ConfigDebugWarn = backupWarn;
+}
+
+void log_uart_disable_printf(void)
+{
+	disablePrintf = TRUE;
+	backupErr = ConfigDebugErr;
+	backupInfo = ConfigDebugInfo;
+	backupWarn = ConfigDebugWarn;
+	ConfigDebugErr = 0;
+	ConfigDebugInfo = 0;
+	ConfigDebugWarn = 0;
+}

component/soc/realtek/8195a/misc/driver/rtl_consol.c

@@ -0,0 +1,490 @@
+/*
+ *  Routines to access hardware
+ *
+ *  Copyright (c) 2013 Realtek Semiconductor Corp.
+ *
+ *  This module is a confidential and proprietary property of RealTek and
+ *  possession or use of this module requires written permission of RealTek.
+ */
+
+#include "rtl8195a.h"
+//#include <stdarg.h>
+#include "rtl_consol.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include <event_groups.h>
+#include "semphr.h"
+#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
+#include "freertos_pmu.h"
+#endif
+#include "tcm_heap.h"
+
+// Those symbols will be defined in linker script for gcc compiler
+// If not doing this would cause extra memory cost
+#if defined (__GNUC__)
+
+    extern volatile UART_LOG_CTL    UartLogCtl;
+    extern volatile UART_LOG_CTL    *pUartLogCtl;
+    extern u8                       *ArgvArray[MAX_ARGV];
+    extern UART_LOG_BUF             UartLogBuf;
+
+#ifdef CONFIG_UART_LOG_HISTORY
+    extern u8  UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN];
+#endif
+
+#else
+
+MON_RAM_BSS_SECTION 
+    volatile UART_LOG_CTL    UartLogCtl;
+MON_RAM_BSS_SECTION 
+    volatile UART_LOG_CTL    *pUartLogCtl;
+MON_RAM_BSS_SECTION 
+    u8                       *ArgvArray[MAX_ARGV];
+MON_RAM_BSS_SECTION 
+    UART_LOG_BUF             UartLogBuf;
+
+#ifdef CONFIG_UART_LOG_HISTORY
+MON_RAM_BSS_SECTION
+    u8  UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN];
+#endif
+
+#endif
+
+#ifdef CONFIG_KERNEL
+static void (*up_sema_from_isr)(_sema *) = NULL;
+#endif
+
+
+_LONG_CALL_
+extern u8
+UartLogCmdChk(
+    IN  u8  RevData,
+    IN  UART_LOG_CTL    *prvUartLogCtl,
+    IN  u8  EchoFlag
+);
+
+_LONG_CALL_
+extern VOID
+ArrayInitialize(
+    IN  u8  *pArrayToInit,
+    IN  u8  ArrayLen,
+    IN  u8  InitValue
+);
+
+_LONG_CALL_
+extern VOID
+UartLogHistoryCmd(
+    IN  u8  RevData,
+    IN  UART_LOG_CTL    *prvUartLogCtl,
+    IN  u8  EchoFlag
+);
+
+_LONG_CALL_
+extern VOID
+UartLogCmdExecute(
+    IN  PUART_LOG_CTL   pUartLogCtlExe
+);
+
+
+
+//=================================================
+
+
+/* Minimum and maximum values a `signed long int' can hold.
+   (Same as `int').  */
+#ifndef __LONG_MAX__
+#if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) || defined (__sparcv9) || defined (__s390x__)
+#define __LONG_MAX__ 9223372036854775807L
+#else
+#define __LONG_MAX__ 2147483647L
+#endif /* __alpha__ || sparc64 */
+#endif
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX-1)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold.  (Minimum is 0).  */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1)
+
+#ifndef __LONG_LONG_MAX__
+#define __LONG_LONG_MAX__ 9223372036854775807LL
+#endif
+
+
+
+
+//======================================================
+//<Function>:  UartLogIrqHandleRam
+//<Usage   >:  To deal with Uart-Log RX IRQ
+//<Argus    >:  VOID
+//<Return   >:  VOID
+//<Notes    >:  NA
+//======================================================
+//MON_RAM_TEXT_SECTION
+VOID
+UartLogIrqHandleRam
+(
+    VOID * Data
+)
+{
+    u8      UartReceiveData = 0;
+    //For Test
+    BOOL    PullMode = _FALSE;
+
+    u32 IrqEn = DiagGetIsrEnReg();
+
+    DiagSetIsrEnReg(0);
+
+    UartReceiveData = DiagGetChar(PullMode);
+    if (UartReceiveData == 0) {
+        goto exit;
+    }
+
+    //KB_ESC chk is for cmd history, it's a special case here.
+    if (UartReceiveData == KB_ASCII_ESC) {
+        //4 Esc detection is only valid in the first stage of boot sequence (few seconds)
+        if (pUartLogCtl->ExecuteEsc != _TRUE)
+        {
+            pUartLogCtl->ExecuteEsc = _TRUE;
+            (*pUartLogCtl).EscSTS = 0;
+        }
+        else
+        {
+            //4 the input commands are valid only when the task is ready to execute commands
+            if ((pUartLogCtl->BootRdy == 1)
+#ifdef CONFIG_KERNEL
+                ||(pUartLogCtl->TaskRdy == 1)
+#endif
+            )
+            {
+                if ((*pUartLogCtl).EscSTS==0)
+                {
+                    (*pUartLogCtl).EscSTS = 1;
+                }
+            }
+            else
+            {
+                (*pUartLogCtl).EscSTS = 0;
+            }
+        }
+    }
+    else if ((*pUartLogCtl).EscSTS==1){
+        if (UartReceiveData != KB_ASCII_LBRKT){
+            (*pUartLogCtl).EscSTS = 0;
+        }
+        else{
+            (*pUartLogCtl).EscSTS = 2;
+        }
+    }
+
+    else{
+        if ((*pUartLogCtl).EscSTS==2){
+            (*pUartLogCtl).EscSTS = 0;
+#ifdef CONFIG_UART_LOG_HISTORY
+            if ((UartReceiveData=='A')|| UartReceiveData=='B'){
+                UartLogHistoryCmd(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1);
+            }
+#endif
+        }
+        else{
+            if (UartLogCmdChk(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1)==2)
+            {
+                //4 check UartLog buffer to prevent from incorrect access
+                if (pUartLogCtl->pTmpLogBuf != NULL)
+                {
+                    pUartLogCtl->ExecuteCmd = _TRUE;
+#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
+    				if (pUartLogCtl->TaskRdy && up_sema_from_isr != NULL)
+    					//RtlUpSemaFromISR((_Sema *)&pUartLogCtl->Sema);				
+						up_sema_from_isr((_sema *)&pUartLogCtl->Sema);
+#endif
+                }
+                else
+                {
+                    ArrayInitialize((u8 *)pUartLogCtl->pTmpLogBuf->UARTLogBuf, UART_LOG_CMD_BUFLEN, '\0');
+                }
+            }
+        }
+    }
+exit:
+    DiagSetIsrEnReg(IrqEn);
+
+}
+
+
+
+//MON_RAM_TEXT_SECTION
+VOID
+RtlConsolInitRam(
+    IN  u32     Boot,
+    IN  u32     TBLSz,
+    IN  VOID    *pTBL
+)
+{
+    UartLogBuf.BufCount = 0;
+    ArrayInitialize(&UartLogBuf.UARTLogBuf[0],UART_LOG_CMD_BUFLEN,'\0');
+    pUartLogCtl = &UartLogCtl;
+
+    pUartLogCtl->NewIdx = 0;
+    pUartLogCtl->SeeIdx = 0;
+    pUartLogCtl->RevdNo = 0;
+    pUartLogCtl->EscSTS = 0;
+    pUartLogCtl->BootRdy = 0;
+    pUartLogCtl->pTmpLogBuf = &UartLogBuf;
+#ifdef CONFIG_UART_LOG_HISTORY
+    pUartLogCtl->CRSTS = 0;
+    pUartLogCtl->pHistoryBuf = &UartLogHistoryBuf[0];
+#endif
+    pUartLogCtl->pfINPUT = (VOID*)&DiagPrintf;
+    pUartLogCtl->pCmdTbl = (PCOMMAND_TABLE) pTBL;
+    pUartLogCtl->CmdTblSz = TBLSz;
+#ifdef CONFIG_KERNEL
+    pUartLogCtl->TaskRdy = 0;
+#endif
+    //executing boot sequence
+    if (Boot == ROM_STAGE)
+    {
+        pUartLogCtl->ExecuteCmd = _FALSE;
+        pUartLogCtl->ExecuteEsc = _FALSE;
+    }
+    else
+    {
+        pUartLogCtl->ExecuteCmd = _FALSE;
+        pUartLogCtl->ExecuteEsc= _TRUE;//don't check Esc anymore
+#if defined(CONFIG_KERNEL)
+        /* Create a Semaphone */
+        //RtlInitSema((_Sema*)&(pUartLogCtl->Sema), 0);
+        rtw_init_sema((_sema*)&(pUartLogCtl->Sema), 0);
+        pUartLogCtl->TaskRdy = 0;
+#ifdef PLATFORM_FREERTOS
+#define	LOGUART_STACK_SIZE	128 //USE_MIN_STACK_SIZE modify from 512 to 128
+#if CONFIG_USE_TCM_HEAP
+	{
+		int ret = 0;
+		void *stack_addr = tcm_heap_malloc(LOGUART_STACK_SIZE*sizeof(int));
+		//void *stack_addr = rtw_malloc(stack_size*sizeof(int));
+		if(stack_addr == NULL){
+			DiagPrintf("Out of TCM heap in \"LOGUART_TASK\" ");
+		}
+		ret = xTaskGenericCreate(
+				RtlConsolTaskRam,
+				(const char *)"LOGUART_TASK",
+				LOGUART_STACK_SIZE,
+				NULL,
+				tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET,
+				NULL,
+				stack_addr,
+				NULL);
+		if (pdTRUE != ret)
+		{
+			DiagPrintf("Create Log UART Task Err!!\n");
+		}
+	}
+#else
+	if (pdTRUE != xTaskCreate( RtlConsolTaskRam, (const signed char * const)"LOGUART_TASK", LOGUART_STACK_SIZE, NULL, tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET, NULL))
+	{
+		DiagPrintf("Create Log UART Task Err!!\n");
+	}
+#endif
+
+#endif
+
+#endif
+    }
+
+    CONSOLE_8195A();
+}
+
+extern u8** GetArgv(const u8 *string);
+#if SUPPORT_LOG_SERVICE
+extern char log_buf[LOG_SERVICE_BUFLEN];
+extern xSemaphoreHandle	log_rx_interrupt_sema;
+#endif
+//======================================================
+void console_cmd_exec(PUART_LOG_CTL   pUartLogCtlExe)
+{
+    u8  CmdCnt = 0;
+    u8  argc = 0;
+    u8  **argv;
+    //u32  CmdNum;
+    PUART_LOG_BUF   pUartLogBuf = pUartLogCtlExe->pTmpLogBuf;
+#if SUPPORT_LOG_SERVICE
+    strncpy(log_buf, (const u8*)&(*pUartLogBuf).UARTLogBuf[0], LOG_SERVICE_BUFLEN-1);
+#endif
+    argc = GetArgc((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
+    argv = GetArgv((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
+
+	if(argc > 0){
+#if SUPPORT_LOG_SERVICE
+//		if(log_handler(argv[0]) == NULL)
+//			legency_interactive_handler(argc, argv);
+              //RtlUpSema((_Sema *)&log_rx_interrupt_sema);
+		rtw_up_sema((_sema *)&log_rx_interrupt_sema);
+#endif
+              ArrayInitialize(argv[0], sizeof(argv[0]) ,0);
+	}else{
+#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
+		pmu_acquire_wakelock(BIT(PMU_LOGUART_DEVICE));
+#endif
+		CONSOLE_8195A(); // for null command
+	}
+
+    (*pUartLogBuf).BufCount = 0;
+    ArrayInitialize(&(*pUartLogBuf).UARTLogBuf[0], UART_LOG_CMD_BUFLEN, '\0');
+}
+//======================================================
+// overload original RtlConsolTaskRam
+//MON_RAM_TEXT_SECTION
+VOID
+RtlConsolTaskRam(
+    VOID *Data
+)
+{
+#if SUPPORT_LOG_SERVICE
+	log_service_init();
+#endif
+    //4 Set this for UartLog check cmd history
+#ifdef CONFIG_KERNEL
+	pUartLogCtl->TaskRdy = 1;
+	up_sema_from_isr = rtw_up_sema_from_isr;
+#endif
+#ifndef CONFIG_KERNEL
+    pUartLogCtl->BootRdy = 1;
+#endif
+    do{
+#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
+		//RtlDownSema((_Sema *)&pUartLogCtl->Sema);
+		rtw_down_sema((_sema *)&pUartLogCtl->Sema);
+#endif
+        if (pUartLogCtl->ExecuteCmd) {
+			// Add command handler here
+			console_cmd_exec((PUART_LOG_CTL)pUartLogCtl);
+            //UartLogCmdExecute((PUART_LOG_CTL)pUartLogCtl);
+            pUartLogCtl->ExecuteCmd = _FALSE;
+        }
+    }while(1);
+}
+
+//======================================================
+#if BUFFERED_PRINTF
+xTaskHandle print_task = NULL;
+EventGroupHandle_t print_event = NULL;
+char print_buffer[MAX_PRINTF_BUF_LEN];
+int flush_idx = 0;
+int used_length = 0;
+
+int available_space(void)
+{
+    return MAX_PRINTF_BUF_LEN-used_length;
+}
+
+int buffered_printf(const char* fmt, ...)
+{
+    if((print_task==NULL) || (print_event==NULL) )
+        return 0;
+    char tmp_buffer[UART_LOG_CMD_BUFLEN+1];
+    static int print_idx = 0;
+    int cnt;
+    va_list arglist;
+
+    if(xEventGroupGetBits(print_event)!=1)
+            xEventGroupSetBits(print_event, 1);
+
+    memset(tmp_buffer,0,UART_LOG_CMD_BUFLEN+1);
+    va_start(arglist, fmt);
+    rtl_vsnprintf(tmp_buffer, sizeof(tmp_buffer), fmt, arglist);
+    va_end(arglist);
+    cnt = _strlen(tmp_buffer);
+    if(cnt < available_space()){
+        if(print_idx >= flush_idx){
+            if(MAX_PRINTF_BUF_LEN-print_idx >= cnt){
+                memcpy(&print_buffer[print_idx], tmp_buffer, cnt);
+            }else{
+                memcpy(&print_buffer[print_idx], tmp_buffer, MAX_PRINTF_BUF_LEN-print_idx);
+                memcpy(&print_buffer[0], &tmp_buffer[MAX_PRINTF_BUF_LEN-print_idx], cnt-(MAX_PRINTF_BUF_LEN-print_idx));
+            }
+        }else{  // space is flush_idx - print_idx, and available space is enough
+            memcpy(&print_buffer[print_idx], tmp_buffer, cnt);
+        }
+        // protection needed
+        taskENTER_CRITICAL();
+        used_length+=cnt;
+        taskEXIT_CRITICAL();
+        print_idx+=cnt;
+        if(print_idx>=MAX_PRINTF_BUF_LEN)
+            print_idx -= MAX_PRINTF_BUF_LEN;
+    }else{
+        // skip
+        cnt = 0;
+    }
+
+    return cnt;
+}
+
+
+void printing_task(void* arg)
+{
+    while(1){
+        //wait event
+        if(xEventGroupWaitBits(print_event, 1,  pdFALSE, pdFALSE, 100 ) == 1){
+            while(used_length > 0){
+                DiagPutChar(print_buffer[flush_idx]);
+                flush_idx++;
+                if(flush_idx >= MAX_PRINTF_BUF_LEN)
+                    flush_idx-=MAX_PRINTF_BUF_LEN;
+                taskENTER_CRITICAL();
+                used_length--;
+                taskEXIT_CRITICAL();
+            }
+            // clear event
+            xEventGroupClearBits( print_event, 1);
+        }
+    }
+}
+
+void rtl_printf_init()
+{
+    if(print_event==NULL){
+        print_event = xEventGroupCreate();
+        if(print_event == NULL)
+            printf("\n\rprint event init fail!\n");
+    }
+    if(print_task == NULL){
+        if(xTaskCreate(printing_task, (const char *)"print_task", 512, NULL, tskIDLE_PRIORITY + 1, &print_task) != pdPASS)
+            printf("\n\rprint task init fail!\n");
+    }
+}
+#endif
+//======================================================
+
+
+__weak void console_init(void)
+{
+
+	    IRQ_HANDLE          UartIrqHandle;
+	    
+	    //4 Register Log Uart Callback function
+	    UartIrqHandle.Data = NULL;//(u32)&UartAdapter;
+	    UartIrqHandle.IrqNum = UART_LOG_IRQ;
+	    UartIrqHandle.IrqFun = (IRQ_FUN) UartLogIrqHandleRam;
+	    UartIrqHandle.Priority = 6;
+
+	    
+	    //4 Register Isr handle
+	    InterruptUnRegister(&UartIrqHandle); 
+	    InterruptRegister(&UartIrqHandle); 
+        
+
+
+#if !TASK_SCHEDULER_DISABLED    
+    RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
+#else
+    RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
+#endif
+
+#if BUFFERED_PRINTF
+    rtl_printf_init();
+#endif
+}

component/soc/realtek/8195a/misc/driver/rtl_consol.h

@@ -0,0 +1,140 @@
+/*
+ *  Routines to access hardware
+ *
+ *  Copyright (c) 2013 Realtek Semiconductor Corp.
+ *
+ *  This module is a confidential and proprietary property of RealTek and
+ *  possession or use of this module requires written permission of RealTek.
+ */
+
+#ifndef _RTK_CONSOL_H_
+#define _RTK_CONSOL_H_
+/*
+ * Include user defined options first. Anything not defined in these files
+ * will be set to standard values. Override anything you dont like!
+ */
+ #if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
+#include "platform_opts.h"
+#endif
+
+//#include "osdep_api.h"
+#include "osdep_service.h"
+#include "hal_diag.h"
+#include "platform_stdlib.h"
+
+#define CONSOLE_PREFIX	"#"
+
+
+//Log UART
+//UART_LOG_CMD_BUFLEN: only 126 bytes could be used for keeping input
+//                                     cmd, the last byte is for string end ('\0').
+#define UART_LOG_CMD_BUFLEN     127     
+#define MAX_ARGV                10
+
+//print log buffer length, if buffer get full, the extra logs will be discarded.
+#if BUFFERED_PRINTF
+#define MAX_PRINTF_BUF_LEN 1024
+#endif
+
+
+typedef u32 (*ECHOFUNC)(IN u8*,...);    //UART LOG echo-function type.
+
+typedef struct _UART_LOG_BUF_ {
+        u8  BufCount;                           //record the input cmd char number.
+        u8  UARTLogBuf[UART_LOG_CMD_BUFLEN];   //record the input command.
+} UART_LOG_BUF, *PUART_LOG_BUF;
+
+
+
+typedef struct _UART_LOG_CTL_ {
+        u8  NewIdx;
+        u8  SeeIdx;
+        u8  RevdNo;
+        u8  EscSTS;
+        u8  ExecuteCmd;
+        u8  ExecuteEsc;
+        u8  BootRdy;
+        u8  Resvd;
+        PUART_LOG_BUF   pTmpLogBuf;        
+        VOID *pfINPUT;
+        PCOMMAND_TABLE  pCmdTbl;
+        u32 CmdTblSz;
+#ifdef CONFIG_UART_LOG_HISTORY        
+        u32  CRSTS;
+#endif        
+#ifdef CONFIG_UART_LOG_HISTORY
+        u8  (*pHistoryBuf)[UART_LOG_CMD_BUFLEN];
+#endif
+#ifdef CONFIG_KERNEL
+		u32		TaskRdy;
+		//_Sema	Sema;	
+		_sema	Sema;
+#else
+        // Since ROM code will reference this typedef, so keep the typedef same size
+        u32     TaskRdy;
+        void    *Sema;
+#endif
+} UART_LOG_CTL, *PUART_LOG_CTL;
+
+
+#define KB_ASCII_NUL    0x00
+#define KB_ASCII_BS     0x08
+#define KB_ASCII_TAB    0x09
+#define KB_ASCII_LF     0x0A
+#define KB_ASCII_CR     0x0D
+#define KB_ASCII_ESC    0x1B
+#define KB_ASCII_SP     0x20
+#define KB_ASCII_BS_7F  0x7F
+#define KB_ASCII_LBRKT  0x5B         //[
+
+#define KB_SPACENO_TAB  1
+
+#ifdef CONFIG_UART_LOG_HISTORY
+#define UART_LOG_HISTORY_LEN    5
+#endif
+
+#ifdef CONFIG_DEBUG_LOG
+#define _ConsolePrint  DiagPrintf
+#else
+#define _ConsolePrint
+#endif
+
+#ifndef CONSOLE_PREFIX
+#define CONSOLE_PREFIX	"<RTL8195A>"
+#endif
+
+#define CONSOLE_8195A(...)     do {\
+    _ConsolePrint("\r"CONSOLE_PREFIX __VA_ARGS__);\
+}while(0)
+
+
+_LONG_CALL_ VOID
+RtlConsolInit(
+    IN  u32     Boot,
+    IN  u32     TBLSz,
+    IN  VOID    *pTBL    
+);
+
+#if defined(CONFIG_KERNEL)
+_LONG_CALL_ VOID
+RtlConsolTaskRam(
+    VOID *Data
+);
+#endif
+
+_LONG_CALL_ VOID
+RtlConsolTaskRom(
+    VOID *Data
+);
+
+
+_LONG_CALL_ u32 
+Strtoul(
+    IN  const u8 *nptr,
+    IN  u8 **endptr,
+    IN  u32 base
+);
+
+void console_init(void);
+
+#endif //_RTK_CONSOL_H_

component/soc/realtek/8195a/misc/driver/rtl_sec.h

@@ -0,0 +1,12 @@
+#ifndef RTL_SEC_H
+#define RTL_SEC_H
+
+#include <platform_stdlib.h>
+
+#define SEC_PROCESS_OPT_ENC   1
+#define SEC_PROCESS_OPT_DEC   2
+
+#define sec_process_data ProcessSecData
+uint32_t sec_process_data(uint8_t key_idx, uint32_t opt, uint8_t *iv, uint8_t *input_buf, uint32_t buf_len, uint8_t *output_buf);
+
+#endif // RTL_SEC_H

component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf

@@ -0,0 +1,23 @@
+;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; 
+;; Used to define address zones within the ARM address space (Memory). 
+;;
+;;   Name      may be almost anything
+;;   AdrSpace  must be Memory
+;;   StartAdr  start of memory block
+;;   EndAdr    end of memory block
+;;   AccType   type of access, read-only (R), read-write (RW) or SFR (W)
+
+[Memory]
+;;         Name             AdrSpace    StartAdr    EndAdr      AccType   Width
+Memory =  ROM              Memory      0x00000000  0x003FFFFF  RW
+Memory =  SRAM             Memory      0x10000000  0x1FFFFFFF  RW
+Memory =  DRAM             Memory      0x30000000  0x30FFFFFF  RW
+Memory =  SFR              Memory      0x40000000  0x41FFFFFF  RW
+Memory =  SFR_Bitband      Memory      0x42000000  0x43FFFFFF  RW
+Memory =  PPB              Memory      0xE0000000  0xFFFFFFFF  RW  
+
+TrustedRanges = true
+UseSfrFilter = true
+
+[SfrInclude]

component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac

@@ -0,0 +1,41 @@
+__load_dram_param(){
+        //DRAM_INFO
+        DeviceType = 8;         //DRAM_SDR
+        Page = 0;               //DRAM_COLADDR_8B
+        Bank=0;                 //DRAM_BANK_2
+        DqWidth=0;              //DRAM_DQ_1
+
+        //DRAM_MODE_REG_INFO
+        BstLen=0;               //BST_LEN_4
+        BstType=0;              //SENQUENTIAL
+        Mode0Cas=3;
+        Mode0Wr=0;
+        Mode1DllEnN=0;
+        Mode1AllLat=0;
+        Mode2Cwl=0;
+
+        //DRAM_TIMING_INFO
+        DramTimingTref = 64000;
+        DramRowNum = 8192;
+        //SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
+        Tck = 80000;            //SDR 12.5MHZ
+        
+        TrfcPs=60000;
+        TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
+        WrMaxTck=2;
+        TrcdPs=15000; 
+        TrpPs=15000;
+        TrasPs=42000;
+        TrrdTck=2;
+        TwrPs=Tck*2;
+        TwtrTck=0; 
+        TmrdTck=2;
+        TrtpTck=0;
+        TccdTck=1;
+        TrcPs=60000;
+
+        //DRAM_DEVICE_INFO
+        DdrPeriodPs=Tck;
+        DfiRate=0;              //DFI_RATIO_1
+  
+}

component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac

@@ -0,0 +1,4 @@
+
+__load_dram_common(){
+        __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
+}

component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt

@@ -0,0 +1,4 @@
+To Change DRAM setting
+
+1. Create and Fill content like EM6A6165TS_7G.mac
+2. Change load file in common.mac 

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board

@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="iso-8859-1"?> 
+
+<flash_board> 
+  <pass> 
+  	<range>CODE 0x10000bc0 0x10003FFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0x00000000</abs_offset>
+    <args>--head</args>
+  </pass> 
+  <pass> 
+  	<range>CODE 0x10004000 0x1006FFFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>  
+    <abs_offset>0x00000000</abs_offset> 
+    <args>--cascade</args>
+  </pass>  
+  <pass>
+    <range>CODE 0x30000000 0x301FFFFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
+    <abs_offset>0x00000000</abs_offset>
+    <args>--cascade</args>
+  </pass>  
+  <ignore>CODE 0x00000000 0x000FFFFF</ignore> 
+  <ignore>CODE 0x10000000 0x10000bbf</ignore> 
+</flash_board> 

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_device>
+  <exe>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out</exe>
+  <flash_base>0x00000000</flash_base>
+  <page>8</page>
+  <block>512 0x1000</block>
+  <macro>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.mac</macro>
+  <aggregate>1</aggregate>
+</flash_device>

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac

@@ -0,0 +1,77 @@
+setup()
+{
+	__var tmp;
+
+	if(__driverType("jlink")){
+		__hwResetWithStrategy(0, 0);
+		//__hwReset(1);
+	}else{
+		__hwResetWithStrategy(0, 2);
+		__hwReset(1);
+	}
+	
+	tmp = __readMemory32(0x40000014,"Memory");	__delay(10);
+	__message "0x40000014=",tmp:%x;
+
+	__writeMemory32(0x21, 			0x40000014, "Memory");	__delay(10);
+
+	__writeMemory32(0x1FC00002,     0x40000304, "Memory");	__delay(10);
+	__writeMemory32(0x400,          0x40000250, "Memory");	__delay(10);
+	__writeMemory32(0x0,            0x40000340, "Memory");	__delay(10);
+	__writeMemory32(0xc04,			0x40000230, "Memory");	__delay(10);
+	__writeMemory32(0x1157, 		0x40000210, "Memory");	__delay(10);
+	__writeMemory32(0x110011, 		0x400002c0, "Memory");	__delay(10);
+	__writeMemory32(0xffffffff,     0x40000320, "Memory");	__delay(10);
+/*      
+	__writeMemory32(0x1, 		0x40005224, "Memory");	__delay(10);
+	__writeMemory32(0x2c8, 		0x40005004, "Memory");	__delay(10);
+	__writeMemory32(0xffffd000,	0x40005008, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x22, 		0x40005020, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x09032001,	0x40005010, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x2611, 	0x40005014, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x68413, 	0x40005018, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x42, 		0x4000501c, "Memory");	__delay(10);
+	__delay(3);
+        
+        // Enable
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+	__delay(20);
+	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(10);
+	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+	__writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+	__delay(30);  
+*/
+}
+
+execUserPreload()
+{
+		__var tmp;
+		setup();
+		tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
+		__writeMemory32(tmp, 0x40000210, "Memory");
+}
+
+execUserSetup()
+{
+		//execUserPreload();
+		//__loadImage("$TARGET_PATH$ ", 0, 0);
+		//__writeMemory32(0x80000000, 0x40000218, "Memory");
+}
+
+execUserFlashInit()  // Called by debugger before loading flash loader in RAM.
+{
+		__var tmp;
+		__message "----- Prepare hardware for Flashloader -----\n";
+
+		__writeMemory32(0x1FFFFFF8, 0x10000000, "Memory");
+		__writeMemory32(0x101, 0x10000004, "Memory");
+		setup();
+		tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
+		__writeMemory32(tmp, 0x40000210, "Memory");
+}

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board

@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="iso-8859-1"?> 
+
+<flash_board> 
+  <pass> 
+  	<range>CODE 0x10000bc8 0x10005FFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0x00000000</abs_offset>
+    <args>--head
+    --img2_addr
+    0xB000</args>
+  </pass> 
+ 
+  <ignore>CODE 0x00000000 0x000FFFFF</ignore> 
+  <ignore>CODE 0x10000000 0x10000bc7</ignore>
+  <ignore>CODE 0x10006000 0x1006FFFF</ignore> 
+  <ignore>CODE 0x30000000 0x301FFFFF</ignore> 
+</flash_board> 

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board

@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="iso-8859-1"?> 
+
+<flash_board> 
+  <pass> 
+  	<range>CODE 0x10000bc0 0x10005FFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0x00000000</abs_offset>
+    <args>--head
+    --img2_addr
+    0xB000</args>
+  </pass> 
+ 
+  <ignore>CODE 0x00000000 0x000FFFFF</ignore> 
+  <ignore>CODE 0x10000000 0x10000bbf</ignore>
+  <ignore>CODE 0x10006000 0x1006FFFF</ignore> 
+  <ignore>CODE 0x30000000 0x301FFFFF</ignore> 
+</flash_board> 

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board

@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="iso-8859-1"?> 
+
+<flash_board> 
+  <pass>    
+  	<range>CODE 0x10000bc8 0x10005FFF</range>    
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0x00000000</abs_offset>    
+    <args>--head    
+    --img2_addr    
+    0xB000</args>    
+  </pass>  	
+  <pass> 
+  	<range>CODE 0x10006000 0x1006FFFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0xB000</abs_offset> 
+  </pass>  
+  <pass>
+    <range>CODE 0x30000000 0x301FFFFF</range> 
+    <loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>    
+    <abs_offset>0x0000</abs_offset>
+    <args>--cascade</args>
+  </pass>  
+  <ignore>CODE 0x00000000 0x000FFFFF</ignore> 
+  <ignore>CODE 0x10000000 0x10000bc7</ignore> 
+  <ignore>CODE 0x1FFF0000 0x1FFFFFFF</ignore> 
+</flash_board> 

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board

@@ -0,0 +1,30 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_board>
+  <pass>
+  	<range>CODE 0x200006b4 0x2002FFFF</range>
+    <loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>   
+    <abs_offset>0x00000000</abs_offset> 
+  </pass>
+  <pass>
+  	<range>CODE 0x30000000 0x301FFFFF</range>
+    <loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>   
+    <abs_offset>0x00010000</abs_offset> 
+    <ignore>DATA_Z 0x30000000 0x301FFFFF</ignore>
+  </pass>
+  <pass>
+  	<range>CODE 0x20080000 0x200BFFFF</range>
+    <loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>   
+    <abs_offset>0x00020000</abs_offset>
+    <ignore>DATA_Z 0x20080000 0x200BFFFF</ignore>
+  </pass>  
+  <pass>
+  	<range>CODE 0x00000000 0x00000000</range>
+    <loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>   
+    <abs_offset>0x00030000</abs_offset>
+  </pass> 
+  <ignore>CODE 0x00000001 0x000BFFFF</ignore>
+  <ignore>CODE 0x20000000 0x200006b3</ignore>
+</flash_board>
+
+

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<flash_device>
+  <exe>$PROJ_DIR$\flashloader\FlashRTL8195aQA.out</exe>
+  <flash_base>0x00000000</flash_base>
+  <page>8</page>
+  <block>256 0x1000</block>
+  <macro>$PROJ_DIR$\flashloader\FlashRTL8195aQA.mac</macro>
+  <aggregate>1</aggregate>
+</flash_device>

component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac

@@ -0,0 +1,60 @@
+setup()
+{
+	__var tmp;
+
+	__hwReset(1);
+
+	__writeMemory32(0x21, 		0x40000014, "Memory");	__delay(10);
+	__writeMemory32(0x1FC00002,     0x40000304, "Memory");	__delay(10);
+	__writeMemory32(0x400,          0x40000250, "Memory");	__delay(10);
+	__writeMemory32(0x0,            0x40000340, "Memory");	__delay(10);
+	__writeMemory32(0xc04,		0x40000230, "Memory");	__delay(10);
+	__writeMemory32(0x1157, 	0x40000210, "Memory");	__delay(10);
+	__writeMemory32(0x110011, 	0x400002c0, "Memory");	__delay(10);
+	__writeMemory32(0xffffffff,     0x40000320, "Memory");	__delay(10);
+        
+	__writeMemory32(0x1, 		0x40005224, "Memory");	__delay(10);
+	__writeMemory32(0x2c8, 		0x40005004, "Memory");	__delay(10);
+	__writeMemory32(0xffffd000,	0x40005008, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x22, 		0x40005020, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x09032001,	0x40005010, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x2611, 	0x40005014, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x68413, 	0x40005018, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x42, 		0x4000501c, "Memory");	__delay(10);
+	__delay(3);
+        
+        // Enable
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+	__delay(20);
+	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(10);
+	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+	__writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+	__delay(30);  
+}
+
+execUserPreload()
+{
+	__message "----- Prepare hardware for Flashloader -----\n";
+	setup();
+	__writeMemory32(0x80000000, 0x40000218, "Memory");
+}
+
+execUserSetup()
+{
+	//execUserPreload();
+	//__loadImage("$TARGET_PATH$ ", 0, 0);
+	//__writeMemory32(0x80000000, 0x40000218, "Memory");
+}
+
+execUserFlashInit()  // Called by debugger before loading flash loader in RAM.
+{
+	__message "----- Prepare hardware for Flashloader -----\n";
+	setup();
+	__writeMemory32(0x80000000, 0x40000218, "Memory");
+}

component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat

@@ -0,0 +1,53 @@
+@set /a tmp = %1-1 
+@call :toHex %tmp% end1
+@set /a tmp2 = %2-1
+@call :toHex %tmp2% end2
+@set /a tmp3 = %3-1
+@call :toHex %tmp3% end0
+
+@echo echo image 2 start %1
+@echo echo image 1 end 0x%end1%
+@echo off
+@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
+@echo.  >> tmp.board
+@echo ^<flash_board^> >> tmp.board
+@echo   ^<pass^> >> tmp.board
+@echo   	^<range^>CODE %3 0x%end1%^</range^> >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board
+@echo     ^<abs_offset^>0x00000000^</abs_offset^>  >> tmp.board
+@echo     ^<args^>--head^</args^>  >> tmp.board
+@echo   ^</pass^> >> tmp.board
+@echo   ^<pass^> >> tmp.board
+@echo   	^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board
+@echo     ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
+@echo     ^<args^>--cascade^</args^>  >> tmp.board
+@echo   ^</pass^>  >> tmp.board
+@echo   ^<pass^>    >> tmp.board
+@echo   	^<range^>CODE 0x30000000 0x301FFFFF^</range^>    >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board    
+@echo     ^<abs_offset^>0x00000000^</abs_offset^>    >> tmp.board 
+@echo     ^<args^>--cascade^</args^>  >> tmp.board
+@echo   ^</pass^>    >> tmp.board
+@echo   ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board 
+@echo   ^<ignore^>CODE 0x10000000 0x%end0%^</ignore^> >> tmp.board
+@echo   ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
+@echo ^</flash_board^> >> tmp.board    >> tmp.board
+
+exit
+
+:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
+@echo off
+SETLOCAL ENABLEDELAYEDEXPANSION
+set /a dec=%~1
+set "hex="
+set "map=0123456789ABCDEF"
+for /L %%N in (1,1,8) do (
+    set /a "d=dec&15,dec>>=4"
+    for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
+)
+
+( ENDLOCAL & REM RETURN VALUES
+    IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
+)
+EXIT /b

component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat

@@ -0,0 +1,74 @@
+@set /a tmp = %1-1 
+@call :toHex %tmp% end1
+@set /a tmp2 = %2-1
+@call :toHex %tmp2% end2
+@set /a tmp3 = %3-1
+@call :toHex %tmp3% end3
+
+@set /a tmp4 = %4
+@call :toHex %tmp4% flash_run_start
+@set /a tmp4 = %5-1
+@call :toHex %tmp4% flash_run_end
+
+@echo echo image 2 start %1
+@echo echo image 1 end 0x%end1%
+@echo off
+@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
+@echo.  >> tmp.board
+@echo ^<flash_board^> >> tmp.board
+@echo   ^<pass^>    >> tmp.board
+@echo   	^<range^>CODE 0x10000bc8 0x%end1%^</range^>    >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board
+@echo     ^<abs_offset^>0x00000000^</abs_offset^>    >> tmp.board
+@echo     ^<args^>--head    >> tmp.board
+@echo     --img2_addr    >> tmp.board
+@echo     0xB000^</args^>    >> tmp.board
+@echo   ^</pass^>    >> tmp.board
+@echo   ^<pass^> >> tmp.board
+@echo   	^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board
+@echo     ^<abs_offset^>0xB000^</abs_offset^>  >> tmp.board
+if "%3"=="0xFFFFFFFF" (
+@echo     ^<args^>--end^</args^>  >> tmp.board 		
+)
+@echo   ^</pass^> >> tmp.board
+if NOT "%3"=="0xFFFFFFFF" (
+@echo   ^<pass^>    >> tmp.board
+@echo   	^<range^>CODE 0x30000000 0x%end3%^</range^>    >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board  
+@echo     ^<abs_offset^>0x0000^</abs_offset^>  >> tmp.board  
+@echo     ^<args^>--cascade  >> tmp.board
+@echo     --end^</args^>  >> tmp.board  
+@echo   ^</pass^>    >> tmp.board
+)
+if NOT "%4"=="0xFFFFFFFF" (
+@echo   ^<pass^>    >> tmp.board
+@echo   	^<range^>CODE 0x%flash_run_start% 0x%flash_run_end%^</range^>    >> tmp.board
+@echo     ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^>    >> tmp.board  
+@echo     ^<abs_offset^>0xA4000^</abs_offset^>  >> tmp.board  
+@echo   ^</pass^>    >> tmp.board
+)
+@echo   ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board 
+@echo   ^<ignore^>CODE 0x10000000 0x10000bc7^</ignore^> >> tmp.board
+@echo   ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
+@echo   ^<ignore^>CODE 0x1FFF0000 0x1FFFFFFF^</ignore^> >> tmp.board
+@echo   ^<ignore^>CODE %3 0x3FFFFFFF^</ignore^> >> tmp.board
+@echo ^</flash_board^> >> tmp.board    >> tmp.board
+
+exit
+
+:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
+@echo off
+SETLOCAL ENABLEDELAYEDEXPANSION
+set /a dec=%~1
+set "hex="
+set "map=0123456789ABCDEF"
+for /L %%N in (1,1,8) do (
+    set /a "d=dec&15,dec>>=4"
+    for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
+)
+
+( ENDLOCAL & REM RETURN VALUES
+    IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
+)
+EXIT /b

component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat

@@ -0,0 +1,47 @@
+cd /D %2
+set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+
+del Debug/Exe/target.map Debug/Exe/target.asm *.bin
+cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
+cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM  Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
+::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM  Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
+::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
+
+::echo %ram1_start% > tmp.txt
+::echo %ram2_start% >> tmp.txt
+::echo %ram3_start% >> tmp.txt
+::echo %ram1_end% >> tmp.txt
+::echo %ram2_end% >> tmp.txt
+::echo %ram3_end% >> tmp.txt
+
+%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
+%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
+
+%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
+%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
+if defined %ram3_start (
+%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
+)
+
+:: SDRAM case
+if defined %ram3_start (
+copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
+)
+
+:: NO SDRAM case
+if not defined %ram3_start (
+copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
+)
+
+:: board generator
+%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
+
+exit

component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs

@@ -0,0 +1,5 @@
+Dim WshShell
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.bat

@@ -0,0 +1,30 @@
+set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+set alinkdir=%1\..\..\..\component\common\application\alink\alink1.1
+
+::echo %tooldir% > %alinkdir%\test.txt
+::echo %alinkdir% >> %alinkdir%\test.txt
+
+cd /D %tooldir%
+
+::echo "%tooldir%\iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a" >> %alinkdir%\test.txt
+
+echo cmd /c iarchive.exe --create lib_alink.a  >out.bat
+cmd /c "iarchive.exe -t %alinkdir%\lib_porting.a" >>out.bat
+cmd /c "iarchive.exe -t %alinkdir%\cloud\lib\libalink.a" >>out.bat
+cmd /c "iarchive.exe -t %alinkdir%\zconfig\lib\libaws.a" >>out.bat
+cmd /c sed ':a;N;$ s/\n/ /g;ba' out.bat > out1.bat
+
+cmd /c "iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a"
+cmd /c "iarchive.exe --extract %alinkdir%\zconfig\lib\libaws.a"
+cmd /c "iarchive.exe --extract %alinkdir%\lib_porting.a"
+
+cmd /c "out1.bat"
+
+del %alinkdir%\lib_porting.a
+cmd /c copy lib_alink.a %alinkdir%
+
+del *.o
+del *.bat
+del *.a 
+
+exit

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_alink.vbs

@@ -0,0 +1,5 @@
+Dim WshShell
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_alink.bat "+WScript.Arguments.Item(0), 0

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat

@@ -0,0 +1,34 @@
+cd /D %2
+set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
+
+del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
+cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
+cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
+
+
+::echo %ram1_start% > tmp.txt
+::echo %ram2_start% >> tmp.txt
+::echo %ram3_start% >> tmp.txt
+::echo %ram1_end% >> tmp.txt
+::echo %ram2_end% >> tmp.txt
+::echo %ram3_end% >> tmp.txt
+
+for /f %%i in ('cmd /c "%tooldir%\readelf -S Debug/Exe/bootloader.axf | %tooldir%\grep 10000000 | %tooldir%\cut -c 8-10"') do set sectname_img1=%%i
+::echo %sectname_img1% rw > tmp.txt
+%tooldir%\objcopy -j "%sectname_img1% rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
+
+%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
+%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
+
+:: update ram_1.p.bin, raw file for application
+copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
+copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
+
+:: delete hal_spi_flash_ram.o object after image built
+del Debug\Obj\hal_spi_flash_ram.*
+
+exit

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs

@@ -0,0 +1,5 @@
+Dim WshShell
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat

@@ -0,0 +1,88 @@
+cd /D %2
+set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
+set cfgdir=%3
+
+echo config %3
+
+del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
+cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
+cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start_st=%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM  %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN  %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM  %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN  %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
+
+if defined %ram2_start_st (
+	set ram2_start=0x%ram2_start_st%
+)
+
+::echo %ram1_start% > tmp.txt
+::echo %ram2_start% >> tmp.txt
+::echo %ram3_start% >> tmp.txt
+::echo %ram1_end% >> tmp.txt
+::echo %ram2_end% >> tmp.txt
+::echo %ram3_end% >> tmp.txt
+
+for /f %%i in ('cmd /c "%tooldir%\readelf -S %cfgdir%/Exe/application.axf | %tooldir%\grep %ram2_start_st% | %tooldir%\cut -c 8-10"') do set sectname_img2=%%i
+::echo sectname_img2 is %sectname_img2% rw >> tmp.txt
+for /f %%i in ('cmd /c "%tooldir%\readelf -S %cfgdir%/Exe/application.axf | %tooldir%\grep 30000000 | %tooldir%\cut -c 8-10"') do set sectname_sdram=%%i
+::echo %sectname_sdram% rw >> tmp.txt
+for /f %%i in ('cmd /c "%tooldir%\readelf -S %cfgdir%/Exe/application.axf | %tooldir%\grep 98000000 | %tooldir%\cut -c 8-10"') do set sectname_flash=%%i
+::echo %sectname_flash% rw >> tmp.txt
+
+%tooldir%\objcopy -j "%sectname_img2% rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
+if defined %ram3_start (
+	%tooldir%\objcopy -j "%sectname_sdram% rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
+)
+if defined %flash_run_start (
+	%tooldir%\objcopy -j "%sectname_flash% rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
+) else (
+	set flash_run_start=0xFFFFFFFF
+	set flash_run_end=0xFFFFFFFF
+)
+
+%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
+%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
+if defined %ram3_start (
+%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
+)
+
+:: force update ram_1.p.bin
+del %cfgdir%\Exe\ram_1.p.bin
+
+:: check ram_1.p.bin exist, copy default
+if not exist %cfgdir%\Exe\ram_1.p.bin (
+	copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
+)
+
+::if not exist %cfgdir%\Exe\data.p.bin (
+::	copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
+::)
+
+::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
+%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
+
+:: SDRAM case
+if defined %ram3_start (
+copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
+copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
+)
+
+:: NO SDRAM case
+if not defined %ram3_start (
+copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
+copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
+set ram3_end=0xFFFFFFFF
+)
+
+%tooldir%\checksum %cfgdir%\Exe\ota.bin
+
+:: board generator
+%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
+
+exit

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs

@@ -0,0 +1,5 @@
+Dim WshShell
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+""" """+WScript.Arguments.Item(2)+"""""", 0

component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat

@@ -0,0 +1,61 @@
+cd /D %2
+set bindir=application/Debug/bin
+set bindirw=application\Debug\bin
+set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
+
+echo %tooldir%
+echo %libdir%
+
+::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
+cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
+cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
+
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map  | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
+for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map  | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
+
+::echo %ram1_start% > tmp.txt
+echo %ram2_start%
+echo %ram3_start%
+::echo %ram1_end% >> tmp.txt
+echo %ram2_end%
+echo %ram3_end%
+
+
+%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
+if NOT %ram3_start% == %ram3_end% (
+	%tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
+)
+
+%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
+if defined %ram3_start (
+%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
+)
+
+:: check ram_1.p.bin exist, copy default
+if not exist %bindirw%\ram_1.p.bin (
+	copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
+)
+
+::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
+%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
+
+:: SDRAM case
+if defined %ram3_start (
+copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
+copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
+)
+
+%tooldir%\checksum Debug\Exe\ota.bin
+
+:: NO SDRAM case
+if not defined %ram3_start (
+copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
+copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
+)
+
+exit

component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat

@@ -0,0 +1,29 @@
+cd /D %1
+set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
+set libdir=%1\..\..\..\component\soc\realtek\8195a\misc\bsp
+:: Generate build_info.h
+echo off
+::echo %date:~0,10%-%time:~0,8%
+::echo %USERNAME%
+for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
+::echo %hostname%
+
+echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
+echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
+echo #define RTL8195AFW_COMPILE_DATE "%date:~0,10%" >> ..\inc\build_info.h
+echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
+echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
+echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
+echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
+
+echo. > main.icf
+
+for /f "delims=" %%i in ('cmd /c "%tooldir%\coan defs -g e ../src/main.c | %tooldir%\grep "#define" | %tooldir%\grep __ICFEDIT_region_BD_RAM_start__ | %tooldir%\gawk '{print $3}'"') do set BD_RAM_start=%%i
+
+if defined %BD_RAM_start (
+	echo define symbol __ICFEDIT_region_BD_RAM_start__ = %BD_RAM_start%; >> main.icf
+	echo define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006CFFF; >> main.icf
+)
+
+exit
+

component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs

@@ -0,0 +1,15 @@
+Option Explicit
+DIM fso    
+
+Dim WshShell
+
+Set fso = CreateObject("Scripting.FileSystemObject")
+
+If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat")) Then
+  MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat" , vbinformation
+  WScript.Quit()
+End If
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat"" """ & WScript.Arguments(0) & """""", 0, true

component/soc/realtek/8195a/misc/iar_utility/common/prebuild_usb.bat

@@ -0,0 +1,12 @@
+cd /D %1
+
+set objdir=%1\Debug\Obj
+
+echo off
+
+del /q /f %objdir%\dwc*
+del /q /f %objdir%\core_otg*
+del /q /f %objdir%\usb*
+
+exit
+

component/soc/realtek/8195a/misc/iar_utility/common/prebuild_usb.vbs

@@ -0,0 +1,15 @@
+Option Explicit
+DIM fso    
+
+Dim WshShell
+
+Set fso = CreateObject("Scripting.FileSystemObject")
+
+If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild_usb.bat")) Then
+  MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild_usb.bat" , vbinformation
+  WScript.Quit()
+End If
+
+Set WshShell = WScript.CreateObject("WScript.Shell")
+
+WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild_usb.bat"" """ & WScript.Arguments(0) & """""", 0, true

component/soc/realtek/8195a/misc/iar_utility/common/preload.mac

@@ -0,0 +1,399 @@
+//DRAM_INFO
+__var DeviceType;
+__var Page;
+__var Bank;
+__var DqWidth;
+
+//DRAM_MODE_REG_INFO
+__var BstLen;
+__var BstType;
+__var Mode0Cas;
+__var Mode0Wr;
+__var Mode1DllEnN;
+__var Mode1AllLat;
+__var Mode2Cwl;
+
+//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
+__var DramTimingTref;
+__var DramRowNum;
+__var Tck;
+
+//DRAM_TIMING_INFO
+__var TrfcPs;
+__var TrefiPs;
+__var WrMaxTck;
+__var TrcdPs;
+__var TrpPs;
+__var TrasPs;
+__var TrrdTck;
+__var TwrPs;
+__var TwtrTck;
+__var TmrdTck;
+__var TrtpTck;
+__var TccdTck;
+__var TrcPs;
+
+//DRAM_DEVICE_INFO
+__var DdrPeriodPs;
+__var DfiRate;
+
+__config_dram_param(){
+        __var CsBstLen;
+        __var CasWr;
+        __var CasRd;
+        __var CasRdT;
+        __var ClrSrt;
+        __var AddLat;
+        __var DramEmr2;
+        __var DramMr0;
+        __var CrTwr;
+        __var DramMaxWr;
+        __var DramWr;
+        __var CrTrtw;
+        __var CrTrtwT;
+        __var DramPeriod;
+        __var DdrType;
+        //__var paDqWidth;
+        //__var paPage;
+        //__var paDfiRate
+
+        __var tmp;
+
+        // Load parameter
+        __load_dram_param();
+
+        DfiRate = 1<<DfiRate;
+        DramPeriod = DdrPeriodPs*DfiRate;
+        DramMaxWr= (WrMaxTck)/(DfiRate) +1;
+        DramWr = ((TwrPs) / DramPeriod)+1;
+        CrTwr = ((TwrPs) / DramPeriod) + 3;
+
+        if (CrTwr < DramMaxWr) {
+                CrTwr = CrTwr;
+        }else {
+                CrTwr = DramMaxWr;
+        }
+
+        if(DeviceType==2){              // Case DDR2
+                DdrType = 2;
+                if (BstLen == 0){
+                        CsBstLen = 0;
+                        CrTrtwT = 4;
+                        DramMr0 = 2;
+                }else{
+                        CsBstLen = 1;
+                        CrTrtwT = 6;
+                        DramMr0 = 3;
+                }
+                CasRd = Mode0Cas;
+                AddLat = Mode1AllLat;
+                CasWr = CasRd + AddLat -1;
+                DramEmr2 = 0;
+                DramMr0  =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
+        }
+        if(DeviceType==3){        // Case DDR3
+                DdrType = 3;
+                if (BstLen==0){
+                        CsBstLen = 0; //bst_4
+                        DramMr0 = 2;
+                }else{
+                        CsBstLen = 1; // bst_8
+                        DramMr0 = 0;
+                }
+                CrlSrt = (Mode0Cas >> 1);
+                if (((Mode0Cas) & 0x1) ) {
+                        CasRdT = CrlSrt+ 12;
+                }else{
+                        CasRdT = CrlSrt+ 4;
+                }
+
+                AddLat = 0;
+                if (Mode1AllLat == 1) { // CL-1
+                        AddLat = CasRd -1;
+                }
+                if (Mode1AllLat == 2){ // CL-2
+                        AddLat = CasRd -2;
+                }
+                CasRd = CasRdT + AddLat;
+                CasWr = Mode2Cwl + 5 + AddLat;
+                DramEmr2 = Mode2Cwl << 3;
+
+                DramWr = (DramWr + 1) / 2;
+                if (DramWr == 16) {
+                        DramWr = 0;
+                }
+                if (DramWr <= 9) {  // 5< wr <= 9
+                        DramWr = DramWr - 4;
+                }
+                DramMr0  =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
+                CrTrtwT = (CasRdT + 6) - CasWr;
+        }
+        if (DeviceType == 8){
+                DdrType = 8;
+                if (BstLen == 0) {
+                        DramMr0 = 2; // bst_4
+                        CsBstLen = 0; //bst_4
+                        CasRd = 0x2;
+                } else {
+                        DramMr0 = 3; // bst_8
+                        CsBstLen = 1; // bst_8
+                        CasRd  = 0x3;
+                }
+                CasWr = 0;
+                DramMr0  =(CasRd<<4)|(BstType<<3)|DramMr0;
+                CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
+        }
+
+        // countting tRTW
+        if ((CrTrtwT & 0x1)) {
+                CrTrtw = (CrTrtwT+1) /(DfiRate);
+        } else {
+                CrTrtw = CrTrtwT /(DfiRate);
+        }
+
+        DqWidth = DqWidth;
+        Page = Page +1; // DQ16 -> memory:byte_unit *2
+        if (DqWidth == 1) { // paralle dq_16 => Page + 1
+                Page = Page +1;
+        }
+
+        // REG_SDR_MISC
+        tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
+        __writeMemory32(tmp, 		0x40005224, "Memory");	__delay(10);
+        // REG_SDR_DCR
+        tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
+        __writeMemory32(tmp, 		0x40005004, "Memory");	__delay(10);
+        // REG_SDR_IOCR
+        tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
+        __writeMemory32(tmp, 		0x40005008, "Memory");	__delay(10);
+        if(DeviceType != 8){
+                tmp =DramEmr2;
+                __writeMemory32(tmp, 		0x40005028, "Memory");	__delay(10);
+                tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
+                __writeMemory32(tmp, 		0x40005024, "Memory");	__delay(10);
+        }
+        tmp =DramMr0;
+        __writeMemory32(tmp, 		0x40005020, "Memory");	__delay(10);
+        tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
+        __writeMemory32(tmp, 		0x40005010, "Memory");	__delay(10);
+        tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
+        __writeMemory32(tmp, 		0x40005014, "Memory");	__delay(10);
+        tmp =(CrTrtw                    << 20) |
+             ((((TwtrTck)/DfiRate)+3)   << 17) |
+             ((((TccdTck)/DfiRate)+1)   << 14) |
+             ((((TrcdPs)/DramPeriod)+1) << 10) |
+             ((((TrcPs)/DramPeriod)+1)  << 4 ) |
+             (((TrrdTck/DfiRate)+1)     << 0);
+        __writeMemory32(tmp, 		0x40005018, "Memory");	__delay(10);
+        tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
+        __writeMemory32(tmp, 		0x4000501c, "Memory");	__delay(10);
+        // Set Idle
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+        // start init
+ 	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+        // enter memory mode
+        __writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+}
+
+__config_dram_param_fixed(){
+        __var tmp;
+        // Dram Attribute
+	__writeMemory32(0x1, 		0x40005224, "Memory");	__delay(10);
+	__writeMemory32(0x2c8, 		0x40005004, "Memory");	__delay(10);
+	__writeMemory32(0xffffd000,	0x40005008, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x22, 		0x40005020, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x09032001,	0x40005010, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x2611, 	0x40005014, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x68413, 	0x40005018, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x42, 		0x4000501c, "Memory");	__delay(10);
+	__delay(3);
+
+        // Enable
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+	__delay(20);
+	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(10);
+	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+	__writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+        __delay(30);
+}
+
+__mem_test(){
+	__var i;
+        __var vaddr;
+        __var tmp;
+
+        i=0;
+        while(i<10){
+            vaddr = 0x30000000+((i*23)&0x1FFFFC);
+            __writeMemory32(0x55AA55AA,	vaddr, "Memory");
+            tmp = __readMemory32(vaddr,"Memory");
+            if(tmp!=0x55AA55AA)
+                return 1;
+            i=i+1;
+        }
+        return 0;
+}
+
+__var ok_pipe_id0;
+__var ok_pipe_id1;
+__var ok_tpc_min0;
+__var ok_tpc_max0;
+__var ok_tpc_min1;
+__var ok_tpc_max1;
+__var tpc0_cnt;
+__var tpc1_cnt;
+
+// calibration result
+__var isCalibrationDone;
+
+__dram_calibration(){
+      __var rdp;
+      __var tpc;
+      __var rdp_reg;
+      __var tpc_reg;
+      __var err_cnt;
+      __var ok_cnt;
+
+
+      ok_cnt=0;
+      ok_pipe_id0 = 15;
+      ok_tpc_min0 = 12;
+      ok_tpc_max0 = 0;
+
+      rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
+      tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
+      for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
+            err_cnt=0;
+            // try pipe
+            __writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
+            for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
+                // try tpc
+                __writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
+                if(__mem_test()==0){
+                   if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
+                   if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
+                   if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
+                }else{
+                   err_cnt++;
+                }
+            }
+            if(ok_pipe_id0!=15){
+                  ok_pipe_id1 = ok_pipe_id0;
+                  ok_tpc_min1 = ok_tpc_min0;
+                  ok_tpc_max1 = ok_tpc_max0;
+                  ok_pipe_id0 = 15;
+                  ok_tpc_min0 = 12;
+                  ok_tpc_max0 = 0;
+            }
+      }
+      tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
+      if(tpc0_cnt<0) tpc0_cnt = 0;
+      tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
+      if(tpc1_cnt<0) tpc1_cnt = 0;
+
+      if(tpc1_cnt>tpc0_cnt){
+          __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
+          __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+      }else{
+          __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
+          __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+      }
+}
+
+__setup_system()
+{
+      __var tmp;
+
+    if(__driverType("jlink")){
+      __hwResetWithStrategy(0, 0);
+      //__hwReset(1);
+    }else{
+      __hwResetWithStrategy(0, 2);
+      __hwReset(1);
+    }
+
+      __writeMemory32(0x21, 		0x40000014, "Memory");	__delay(10);
+      __writeMemory32(0x1FC00002,   0x40000304, "Memory");	__delay(10);
+      __writeMemory32(0x400,        0x40000250, "Memory");	__delay(10);
+      __writeMemory32(0x0,          0x40000340, "Memory");	__delay(10);
+      __writeMemory32(0xdcc4,		0x40000230, "Memory");	__delay(10);
+      __writeMemory32(0x11117, 		0x40000210, "Memory");	__delay(10);
+      __writeMemory32(0x11157, 		0x40000210, "Memory");	__delay(10);
+      __writeMemory32(0x110011, 	0x400002c0, "Memory");	__delay(10);
+      __writeMemory32(0xffffffff,   0x40000320, "Memory");	__delay(10);
+      __writeMemory32(0xfcc702,   	0x40000040, "Memory");	__delay(10);
+
+      __config_dram_param();
+
+      if(isCalibrationDone){
+            __var rdp_reg;
+            __var tpc_reg;
+            rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
+            tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
+
+            if(tpc1_cnt>tpc0_cnt){
+                __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
+                __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+            }else{
+                __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
+                __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+            }
+      }else{
+          // Calibration
+          __dram_calibration();
+          isCalibrationDone = 1;
+      }
+}
+
+execUserPreload()
+{
+        // Register dram common.mac
+        __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
+        __load_dram_common();
+		isCalibrationDone = 0;
+
+        __message "User Preload....";
+        if(__driverType("jlink")){
+                __message "driver type J-LINK";
+        }else if(__driverType("cmsisdap")){
+                __message "driver type CMSIS-DAP";
+        }else if(__driverType("cmsisdap")){
+                __message "driver type I-JET";
+        }
+        __setup_system();
+}
+
+execUserSetup()
+{
+        __var tmp;
+        __message "User Setup....";
+        // if use normal reset, please unmark those 2 lines
+        //execUserPreload();
+        if(__driverType("jlink")){
+                __loadImage("$TARGET_PATH$ ", 0, 0);
+                tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
+				//tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
+        }else if(__driverType("cmsisdap") || __driverType("ijet")){
+                tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
+		}else{
+                __message "Not support drive type";
+		}
+        __writeMemory32(tmp, 0x40000210, "Memory");
+}
+
+execUserReset()
+{
+                __var tmp;
+                __message "User Reset....";
+                __setup_system();
+                tmp = __readMemory32(0x40000210, "Memory")&(~(1<<27));
+                tmp = tmp & (~(1<<21));
+                __writeMemory32(tmp, 0x40000210, "Memory");
+}

component/soc/realtek/8195a/misc/iar_utility/common/preload_app_of_fwloader .mac

@@ -0,0 +1,408 @@
+//DRAM_INFO
+__var DeviceType;
+__var Page;
+__var Bank;
+__var DqWidth;
+
+//DRAM_MODE_REG_INFO
+__var BstLen;
+__var BstType;
+__var Mode0Cas;
+__var Mode0Wr;
+__var Mode1DllEnN;
+__var Mode1AllLat;
+__var Mode2Cwl;
+
+//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
+__var DramTimingTref;
+__var DramRowNum;
+__var Tck;
+
+//DRAM_TIMING_INFO
+__var TrfcPs;
+__var TrefiPs;
+__var WrMaxTck;
+__var TrcdPs;
+__var TrpPs;
+__var TrasPs;
+__var TrrdTck;
+__var TwrPs;
+__var TwtrTck;
+__var TmrdTck;
+__var TrtpTck;
+__var TccdTck;
+__var TrcPs;
+
+//DRAM_DEVICE_INFO
+__var DdrPeriodPs;
+__var DfiRate;
+
+__config_dram_param(){
+        __var CsBstLen;
+        __var CasWr;
+        __var CasRd;
+        __var CasRdT;
+        __var ClrSrt;
+        __var AddLat;
+        __var DramEmr2;
+        __var DramMr0;
+        __var CrTwr;
+        __var DramMaxWr;
+        __var DramWr;
+        __var CrTrtw;
+        __var CrTrtwT;
+        __var DramPeriod;
+        __var DdrType;
+        //__var paDqWidth;
+        //__var paPage;
+        //__var paDfiRate
+
+        __var tmp;
+
+        // Load parameter
+        __load_dram_param();
+
+        DfiRate = 1<<DfiRate;
+        DramPeriod = DdrPeriodPs*DfiRate;
+        DramMaxWr= (WrMaxTck)/(DfiRate) +1;
+        DramWr = ((TwrPs) / DramPeriod)+1;
+        CrTwr = ((TwrPs) / DramPeriod) + 3;
+
+        if (CrTwr < DramMaxWr) {
+                CrTwr = CrTwr;
+        }else {
+                CrTwr = DramMaxWr;
+        }
+
+        if(DeviceType==2){              // Case DDR2
+                DdrType = 2;
+                if (BstLen == 0){
+                        CsBstLen = 0;
+                        CrTrtwT = 4;
+                        DramMr0 = 2;
+                }else{
+                        CsBstLen = 1;
+                        CrTrtwT = 6;
+                        DramMr0 = 3;
+                }
+                CasRd = Mode0Cas;
+                AddLat = Mode1AllLat;
+                CasWr = CasRd + AddLat -1;
+                DramEmr2 = 0;
+                DramMr0  =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
+        }
+        if(DeviceType==3){        // Case DDR3
+                DdrType = 3;
+                if (BstLen==0){
+                        CsBstLen = 0; //bst_4
+                        DramMr0 = 2;
+                }else{
+                        CsBstLen = 1; // bst_8
+                        DramMr0 = 0;
+                }
+                CrlSrt = (Mode0Cas >> 1);
+                if (((Mode0Cas) & 0x1) ) {
+                        CasRdT = CrlSrt+ 12;
+                }else{
+                        CasRdT = CrlSrt+ 4;
+                }
+
+                AddLat = 0;
+                if (Mode1AllLat == 1) { // CL-1
+                        AddLat = CasRd -1;
+                }
+                if (Mode1AllLat == 2){ // CL-2
+                        AddLat = CasRd -2;
+                }
+                CasRd = CasRdT + AddLat;
+                CasWr = Mode2Cwl + 5 + AddLat;
+                DramEmr2 = Mode2Cwl << 3;
+
+                DramWr = (DramWr + 1) / 2;
+                if (DramWr == 16) {
+                        DramWr = 0;
+                }
+                if (DramWr <= 9) {  // 5< wr <= 9
+                        DramWr = DramWr - 4;
+                }
+                DramMr0  =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
+                CrTrtwT = (CasRdT + 6) - CasWr;
+        }
+        if (DeviceType == 8){
+                DdrType = 8;
+                if (BstLen == 0) {
+                        DramMr0 = 2; // bst_4
+                        CsBstLen = 0; //bst_4
+                        CasRd = 0x2;
+                } else {
+                        DramMr0 = 3; // bst_8
+                        CsBstLen = 1; // bst_8
+                        CasRd  = 0x3;
+                }
+                CasWr = 0;
+                DramMr0  =(CasRd<<4)|(BstType<<3)|DramMr0;
+                CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
+        }
+
+        // countting tRTW
+        if ((CrTrtwT & 0x1)) {
+                CrTrtw = (CrTrtwT+1) /(DfiRate);
+        } else {
+                CrTrtw = CrTrtwT /(DfiRate);
+        }
+
+        DqWidth = DqWidth;
+        Page = Page +1; // DQ16 -> memory:byte_unit *2
+        if (DqWidth == 1) { // paralle dq_16 => Page + 1
+                Page = Page +1;
+        }
+
+        // REG_SDR_MISC
+        tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
+        __writeMemory32(tmp, 		0x40005224, "Memory");	__delay(10);
+        // REG_SDR_DCR
+        tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
+        __writeMemory32(tmp, 		0x40005004, "Memory");	__delay(10);
+        // REG_SDR_IOCR
+        tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
+        __writeMemory32(tmp, 		0x40005008, "Memory");	__delay(10);
+        if(DeviceType != 8){
+                tmp =DramEmr2;
+                __writeMemory32(tmp, 		0x40005028, "Memory");	__delay(10);
+                tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
+                __writeMemory32(tmp, 		0x40005024, "Memory");	__delay(10);
+        }
+        tmp =DramMr0;
+        __writeMemory32(tmp, 		0x40005020, "Memory");	__delay(10);
+        tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
+        __writeMemory32(tmp, 		0x40005010, "Memory");	__delay(10);
+        tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
+        __writeMemory32(tmp, 		0x40005014, "Memory");	__delay(10);
+        tmp =(CrTrtw                    << 20) |
+             ((((TwtrTck)/DfiRate)+3)   << 17) |
+             ((((TccdTck)/DfiRate)+1)   << 14) |
+             ((((TrcdPs)/DramPeriod)+1) << 10) |
+             ((((TrcPs)/DramPeriod)+1)  << 4 ) |
+             (((TrrdTck/DfiRate)+1)     << 0);
+        __writeMemory32(tmp, 		0x40005018, "Memory");	__delay(10);
+        tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
+        __writeMemory32(tmp, 		0x4000501c, "Memory");	__delay(10);
+        // Set Idle
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+        // start init
+ 	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+        // enter memory mode
+        __writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+}
+
+__config_dram_param_fixed(){
+        __var tmp;
+        // Dram Attribute
+	__writeMemory32(0x1, 		0x40005224, "Memory");	__delay(10);
+	__writeMemory32(0x2c8, 		0x40005004, "Memory");	__delay(10);
+	__writeMemory32(0xffffd000,	0x40005008, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x22, 		0x40005020, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x09032001,	0x40005010, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x2611, 	0x40005014, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x68413, 	0x40005018, "Memory");	__delay(10);
+	__delay(3);
+	__writeMemory32(0x42, 		0x4000501c, "Memory");	__delay(10);
+	__delay(3);
+
+        // Enable
+ 	__writeMemory32(0x700, 		0x4000500c, "Memory");	__delay(10);
+	__delay(20);
+	__writeMemory32(0x1, 		0x40005000, "Memory");	__delay(10);
+	__delay(100);
+	tmp = __readMemory32(0x40005000,"Memory");	__delay(10);
+	__writeMemory32(0x600, 		0x4000500c, "Memory");	__delay(10);
+        __delay(30);
+}
+
+__mem_test(){
+	__var i;
+        __var vaddr;
+        __var tmp;
+
+        i=0;
+        while(i<10){
+            vaddr = 0x30000000+((i*23)&0x1FFFFC);
+            __writeMemory32(0x55AA55AA,	vaddr, "Memory");
+            tmp = __readMemory32(vaddr,"Memory");
+            if(tmp!=0x55AA55AA)
+                return 1;
+            i=i+1;
+        }
+        return 0;
+}
+
+__var ok_pipe_id0;
+__var ok_pipe_id1;
+__var ok_tpc_min0;
+__var ok_tpc_max0;
+__var ok_tpc_min1;
+__var ok_tpc_max1;
+__var tpc0_cnt;
+__var tpc1_cnt;
+
+// calibration result
+__var isCalibrationDone;
+
+__dram_calibration(){
+      __var rdp;
+      __var tpc;
+      __var rdp_reg;
+      __var tpc_reg;
+      __var err_cnt;
+      __var ok_cnt;
+
+
+      ok_cnt=0;
+      ok_pipe_id0 = 15;
+      ok_tpc_min0 = 12;
+      ok_tpc_max0 = 0;
+
+      rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
+      tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
+      for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
+            err_cnt=0;
+            // try pipe
+            __writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
+            for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
+                // try tpc
+                __writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
+                if(__mem_test()==0){
+                   if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
+                   if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
+                   if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
+                }else{
+                   err_cnt++;
+                }
+            }
+            if(ok_pipe_id0!=15){
+                  ok_pipe_id1 = ok_pipe_id0;
+                  ok_tpc_min1 = ok_tpc_min0;
+                  ok_tpc_max1 = ok_tpc_max0;
+                  ok_pipe_id0 = 15;
+                  ok_tpc_min0 = 12;
+                  ok_tpc_max0 = 0;
+            }
+      }
+      tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
+      if(tpc0_cnt<0) tpc0_cnt = 0;
+      tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
+      if(tpc1_cnt<0) tpc1_cnt = 0;
+
+      if(tpc1_cnt>tpc0_cnt){
+          __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
+          __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+      }else{
+          __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
+          __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+      }
+}
+
+__setup_system()
+{
+      __var tmp;
+
+    if(__driverType("jlink")){
+      __hwResetWithStrategy(0, 0);
+      //__hwReset(1);
+    }else{
+      __hwResetWithStrategy(0, 2);
+      __hwReset(1);
+    }
+
+      __writeMemory32(0x21, 		0x40000014, "Memory");	__delay(10);
+      __writeMemory32(0x1FC00002,   0x40000304, "Memory");	__delay(10);
+      __writeMemory32(0x400,        0x40000250, "Memory");	__delay(10);
+      __writeMemory32(0x0,          0x40000340, "Memory");	__delay(10);
+      __writeMemory32(0xdcc4,		0x40000230, "Memory");	__delay(10);
+      __writeMemory32(0x11117, 		0x40000210, "Memory");	__delay(10);
+      __writeMemory32(0x11157, 		0x40000210, "Memory");	__delay(10);
+      __writeMemory32(0x110011, 	0x400002c0, "Memory");	__delay(10);
+      __writeMemory32(0xffffffff,   0x40000320, "Memory");	__delay(10);
+	  __writeMemory32(0xfcc702,   	0x40000040, "Memory");	__delay(10);
+
+      __config_dram_param();
+
+      if(isCalibrationDone){
+            __var rdp_reg;
+            __var tpc_reg;
+            rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
+            tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
+
+            if(tpc1_cnt>tpc0_cnt){
+                __writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
+                __writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+            }else{
+                __writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
+                __writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
+            }
+      }else{
+          // Calibration
+          __dram_calibration();
+          isCalibrationDone = 1;
+      }
+}
+
+execUserPreload()
+{
+        // Register dram common.mac
+        __registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
+        __load_dram_common();
+		isCalibrationDone = 0;
+
+        __message "User Preload....";
+        if(__driverType("jlink")){
+                __message "driver type J-LINK";
+        }else if(__driverType("cmsisdap")){
+                __message "driver type CMSIS-DAP";
+        }else if(__driverType("cmsisdap")){
+                __message "driver type I-JET";
+        }
+        __setup_system();
+}
+
+execUserSetup()
+{
+        __var tmp;
+        __message "User Setup....";
+        // if use normal reset, please unmark those 2 lines
+        //execUserPreload();
+        if(__driverType("jlink")){
+                __loadImage("$TARGET_PATH$ ", 0, 0);
+				tmp = __readMemory32(0x1000E000, "Memory");
+				__writeMemory32(tmp, 0x10006000, "Memory");
+				tmp = __readMemory32(0x1000E004, "Memory");
+				__writeMemory32(tmp, 0x10006004, "Memory");
+				tmp = __readMemory32(0x1000E008, "Memory");
+				__writeMemory32(tmp, 0x10006008, "Memory");
+				tmp = __readMemory32(0x1000E00C, "Memory");
+				__writeMemory32(tmp, 0x1000600C, "Memory");
+
+                tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
+				//tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
+        }else if(__driverType("cmsisdap") || __driverType("ijet")){
+                tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
+		}else{
+                __message "Not support drive type";
+		}
+        __writeMemory32(tmp, 0x40000210, "Memory");
+}
+
+execUserReset()
+{
+                __var tmp;
+                __message "User Reset....";
+                __setup_system();
+                tmp = __readMemory32(0x40000210, "Memory")&(~(1<<27));
+                tmp = tmp & (~(1<<21));
+                __writeMemory32(tmp, 0x40000210, "Memory");
+}

component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c

@@ -0,0 +1,307 @@
+#include "FreeRTOS.h"
+
+#include "freertos_pmu.h"
+
+#include <platform_opts.h>
+
+#include "platform_autoconf.h"
+#include "sys_api.h"
+#include "sleep_ex_api.h"
+
+#ifndef portNVIC_SYSTICK_CURRENT_VALUE_REG
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#endif
+
+uint32_t missing_tick = 0;
+
+static uint32_t wakelock     = DEFAULT_WAKELOCK;
+static uint32_t wakeup_event = DEFAULT_WAKEUP_EVENT;
+
+typedef struct {
+    uint32_t     nDeviceId;
+    PSM_HOOK_FUN sleep_hook_fun;
+    void*        sleep_param_ptr;
+    PSM_HOOK_FUN wakeup_hook_fun;
+    void*        wakeup_param_ptr;
+} PSM_DD_HOOK_INFO;
+
+#define MAX_PSM_DD_HOOK_INFO_SIZE 8
+uint32_t psm_dd_hook_info_size = 0;
+PSM_DD_HOOK_INFO psm_dd_hook_infos[MAX_PSM_DD_HOOK_INFO_SIZE];
+
+static uint8_t last_wakelock_state[32] = {
+    DEFAULT_WAKELOCK & 0x01, 0, 0, 0, 0, 0, 0, 0,
+    0, 0, 0, 0, 0, 0, 0, 0,
+    0, 0, 0, 0, 0, 0, 0, 0,
+    0, 0, 0, 0, 0, 0, 0, 0
+};
+static uint32_t last_acquire_wakelock_time[32] = {0};
+static uint32_t hold_wakelock_time[32] = {0};
+static uint32_t base_sys_time = 0;
+
+static uint32_t sys_sleep_time = 0;
+
+unsigned char reserve_pll = 0;
+unsigned char generate_wakelock_stats = 0;
+
+/* ++++++++ FreeRTOS macro implementation ++++++++ */
+
+/*
+ *  It is called in idle task.
+ *
+ *  @return  true  : System is ready to check conditions that if it can enter sleep.
+ *           false : System keep awake.
+ **/
+/*
+ *  It is called when freertos is going to sleep.
+ *  At this moment, all sleep conditons are satisfied. All freertos' sleep pre-processing are done.
+ *
+ *  @param  expected_idle_time : The time that FreeRTOS expect to sleep.
+ *                               If we set this value to 0 then FreeRTOS will do nothing in its sleep function.
+ **/
+void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
+
+#ifdef CONFIG_SOC_PS_MODULE
+
+    uint32_t i;
+    uint32_t stime;
+    uint32_t tick_before_sleep;
+    uint32_t tick_after_sleep;
+    uint32_t tick_passed;
+    uint32_t backup_systick_reg;
+    unsigned char IsDramOn = 1;
+    unsigned char suspend_sdram = 1;
+
+    /* To disable freertos sleep function and use our sleep function, 
+     * we can set original expected idle time to 0. */
+    stime = *expected_idle_time;
+    *expected_idle_time = 0;
+
+    for (i=0; i<psm_dd_hook_info_size; i++) {
+        if ( psm_dd_hook_infos[i].sleep_hook_fun != NULL) {
+            psm_dd_hook_infos[i].sleep_hook_fun( stime, psm_dd_hook_infos[i].sleep_param_ptr );
+        }
+    }
+
+    // Store gtimer timestamp before sleep
+    tick_before_sleep = us_ticker_read();
+
+    if ( sys_is_sdram_power_on() == 0 ) {
+        IsDramOn = 0;
+    }
+
+    if (IsDramOn) {
+#if defined(FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM) && (FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM==0)
+        // sdram is turned on, and we don't want suspend sdram
+        suspend_sdram = 0;
+#endif
+    } else {
+        // sdram didn't turned on, we should not suspend it
+        suspend_sdram = 0;
+    }
+
+    backup_systick_reg = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+    // sleep
+    sleep_ex_selective(wakeup_event, stime, reserve_pll, suspend_sdram);
+
+    portNVIC_SYSTICK_CURRENT_VALUE_REG = backup_systick_reg;
+
+    // update kernel tick by calculating passed tick from gtimer
+    {
+        // get current gtimer timestamp
+        tick_after_sleep = us_ticker_read();
+
+        // calculated passed time
+        if (tick_after_sleep > tick_before_sleep) {
+            tick_passed = tick_after_sleep - tick_before_sleep;
+        } else {
+            // overflow
+            tick_passed = (0xffffffff - tick_before_sleep) + tick_after_sleep;
+        }
+
+        /* If there is a rapid interrupt (<1ms), it makes tick_passed less than 1ms.
+         * The tick_passed would be rounded and make OS can't step tick.
+         * We collect the rounded tick_passed into missing_tick and step tick properly.
+         * */
+        tick_passed += missing_tick;
+        if (tick_passed > stime * 1000) {
+            missing_tick = tick_passed - stime * 1000;
+            tick_passed = stime * 1000;
+        } else {
+            missing_tick = tick_passed % 1000;
+        }
+
+        // update kernel tick
+        vTaskStepTick( tick_passed/1000 );
+    }
+
+	sys_sleep_time += tick_passed/1000;
+
+    for (i=0; i<psm_dd_hook_info_size; i++) {
+        if ( psm_dd_hook_infos[i].wakeup_hook_fun != NULL) {
+            psm_dd_hook_infos[i].wakeup_hook_fun( stime, psm_dd_hook_infos[i].wakeup_param_ptr );
+        }
+    }
+
+#else
+    // If PS is not enabled, then use freertos sleep function
+#endif
+}
+
+void freertos_post_sleep_processing(unsigned int *expected_idle_time) {
+#ifndef configSYSTICK_CLOCK_HZ
+	*expected_idle_time = 1 + ( portNVIC_SYSTICK_CURRENT_VALUE_REG / ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) );
+#else
+	*expected_idle_time = 1 + ( portNVIC_SYSTICK_CURRENT_VALUE_REG / ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) );
+#endif
+}
+/* -------- FreeRTOS macro implementation -------- */
+
+int freertos_ready_to_sleep() {
+    return wakelock == 0;
+}
+
+void pmu_acquire_wakelock(uint32_t lock_id) {
+
+    wakelock |= BIT(lock_id);
+
+    if (generate_wakelock_stats) {
+        uint32_t i;
+        uint32_t current_timestamp = osKernelSysTick();
+        for (i=0; i<32; i++) {
+            if ( (1<<i & BIT(lock_id)) && (last_wakelock_state[i] == 0) ) {
+                last_acquire_wakelock_time[i] = current_timestamp;
+                last_wakelock_state[i] = 1;            
+            }
+        }
+    }
+}
+
+void pmu_release_wakelock(uint32_t lock_id) {
+    wakelock &= ~BIT(lock_id);
+
+    if (generate_wakelock_stats) {
+        uint32_t i;
+        uint32_t current_timestamp = osKernelSysTick();
+        for (i=0; i<32; i++) {
+            if ( (1<<i & BIT(lock_id)) && (last_wakelock_state[i] == 1) ) {
+                hold_wakelock_time[i] += current_timestamp - last_acquire_wakelock_time[i];
+                last_wakelock_state[i] = 0;
+            }
+        }
+    }
+}
+
+uint32_t pmu_get_wakelock_status() {
+    return wakelock;
+}
+
+void pmu_enable_wakelock_stats(unsigned char enable) {
+    generate_wakelock_stats = enable;
+}
+
+void pmu_get_wakelock_hold_stats( char *pcWriteBuffer ) {
+    uint32_t i;
+    uint32_t current_timestamp = osKernelSysTick();
+
+    *pcWriteBuffer = 0x00;
+
+    if (generate_wakelock_stats) {
+        // print header
+        sprintf(pcWriteBuffer, "wakelock_id\tholdtime\r\n");
+        pcWriteBuffer += strlen( pcWriteBuffer );
+
+        for (i=0; i<32; i++) {
+            if (last_wakelock_state[i] == 1) {
+                sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i] + (current_timestamp - last_acquire_wakelock_time[i]));
+            } else {
+                if (hold_wakelock_time[i] > 0) {
+                    sprintf(pcWriteBuffer, "%x\t\t%d\r\n", i, hold_wakelock_time[i]);
+                }
+            }
+            pcWriteBuffer += strlen( pcWriteBuffer );
+        }
+        sprintf(pcWriteBuffer, "time passed: %d ms, system sleep %d ms\r\n", current_timestamp - base_sys_time, sys_sleep_time);
+    }
+}
+
+void pmu_clean_wakelock_stat() {
+    uint32_t i;
+    base_sys_time = osKernelSysTick();
+    for (i=0; i<32; i++) {
+        hold_wakelock_time[i] = 0;
+        if (last_wakelock_state[i] == 1) {
+            last_acquire_wakelock_time[i] = base_sys_time;
+        }
+    }
+	sys_sleep_time = 0;
+}
+
+void pmu_add_wakeup_event(uint32_t event) {
+    wakeup_event |= event;
+}
+
+void pmu_del_wakeup_event(uint32_t event) {
+    wakeup_event &= ~event;
+    // To fulfill tickless design, system timer is required to be wakeup event
+    wakeup_event |= SLEEP_WAKEUP_BY_STIMER;
+}
+
+void pmu_register_sleep_callback(uint32_t nDeviceId, PSM_HOOK_FUN sleep_hook_fun, void* sleep_param_ptr, PSM_HOOK_FUN wakeup_hook_fun, void* wakeup_param_ptr) {
+    uint32_t i;
+    for (i=0; i<psm_dd_hook_info_size; i++) {
+        if (psm_dd_hook_infos[i].nDeviceId == nDeviceId) {
+            psm_dd_hook_infos[i].sleep_hook_fun   = sleep_hook_fun;
+            psm_dd_hook_infos[i].sleep_param_ptr  = sleep_param_ptr;
+            psm_dd_hook_infos[i].wakeup_hook_fun  = wakeup_hook_fun;
+            psm_dd_hook_infos[i].wakeup_param_ptr = wakeup_param_ptr;
+            break;
+        }
+    }
+    if (i == psm_dd_hook_info_size) {
+        psm_dd_hook_infos[psm_dd_hook_info_size].nDeviceId        = nDeviceId;
+        psm_dd_hook_infos[psm_dd_hook_info_size].sleep_hook_fun   = sleep_hook_fun;
+        psm_dd_hook_infos[psm_dd_hook_info_size].sleep_param_ptr  = sleep_param_ptr;
+        psm_dd_hook_infos[psm_dd_hook_info_size].wakeup_hook_fun  = wakeup_hook_fun;
+        psm_dd_hook_infos[psm_dd_hook_info_size].wakeup_param_ptr = wakeup_param_ptr;
+        psm_dd_hook_info_size++;
+    }
+}
+
+void pmu_unregister_sleep_callback(uint32_t nDeviceId) {
+    uint32_t i;
+    for (i=0; i<psm_dd_hook_info_size; i++) {
+        if (psm_dd_hook_infos[i].nDeviceId == nDeviceId) {
+            if (psm_dd_hook_info_size > 1) {
+                // if we have more than 2 items, just swap the last item into current slot
+                psm_dd_hook_infos[i].nDeviceId        = psm_dd_hook_infos[psm_dd_hook_info_size-1].nDeviceId;
+                psm_dd_hook_infos[i].sleep_hook_fun   = psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_hook_fun;
+                psm_dd_hook_infos[i].sleep_param_ptr  = psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_param_ptr;
+                psm_dd_hook_infos[i].wakeup_hook_fun  = psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_hook_fun;
+                psm_dd_hook_infos[i].wakeup_param_ptr = psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_param_ptr;
+
+                // Then erase the last item
+                psm_dd_hook_infos[psm_dd_hook_info_size-1].nDeviceId        = 0;
+                psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_hook_fun   = NULL;
+                psm_dd_hook_infos[psm_dd_hook_info_size-1].sleep_param_ptr  = NULL;
+                psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_hook_fun  = NULL;
+                psm_dd_hook_infos[psm_dd_hook_info_size-1].wakeup_param_ptr = NULL;
+            } else {
+                // we only have one item, just erase it
+                psm_dd_hook_infos[i].nDeviceId = 0;
+                psm_dd_hook_infos[i].sleep_hook_fun   = NULL;
+                psm_dd_hook_infos[i].sleep_param_ptr  = NULL;
+                psm_dd_hook_infos[i].wakeup_hook_fun  = NULL;
+                psm_dd_hook_infos[i].wakeup_param_ptr = NULL;
+            }
+            psm_dd_hook_info_size--;
+            break;
+        }
+    }
+}
+
+void pmu_set_pll_reserved(unsigned char reserve) {
+    reserve_pll = reserve;
+}
+