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<div id="projectbrief">This document shows Ameba SDK 3.5 APIs</div>
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<li class="navelem"><a class="el" href="dir_59865070466a2d887ccae359ce349522.html">sdk-ameba</a></li><li class="navelem"><a class="el" href="dir_bb17c7c1f6b5d4e42018e46e245402cf.html">project</a></li><li class="navelem"><a class="el" href="dir_4d8a5561b87cbdbe66a2580ebcb931d0.html">realtek_8195a_gen_project</a></li><li class="navelem"><a class="el" href="dir_d55a6639c0ef2e769c54f3d73fdcd6ae.html">rtl8195a</a></li><li class="navelem"><a class="el" href="dir_218701c72f38a637f56ccea9eb201b28.html">sw</a></li><li class="navelem"><a class="el" href="dir_467016183711ec67a0924a03f0be9cbd.html">lib</a></li><li class="navelem"><a class="el" href="dir_91cf82b8388ba308ddfe17c7b1476a41.html">sw_lib</a></li><li class="navelem"><a class="el" href="dir_d752387d37b25b2ddfb0bd02d399f93a.html">mbed</a></li><li class="navelem"><a class="el" href="dir_adf298d7cff763ecf28c97eaa1fb8ba3.html">hal_ext</a></li> </ul>
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<div class="title">spi_ex_api.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>This file provides following mbed SPI API.
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<a href="#details">More...</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
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Ameba Common</h2></td></tr>
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<tr class="memitem:gab04a0655cd1e3bcac5e8f48c18df1a57"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab04a0655cd1e3bcac5e8f48c18df1a57"></a>enum  </td><td class="memItemRight" valign="bottom">{ <b>SPI_SCLK_IDLE_LOW</b> =0,
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<b>SPI_SCLK_IDLE_HIGH</b> =2
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}</td></tr>
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<tr class="separator:gab04a0655cd1e3bcac5e8f48c18df1a57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga385c44f6fb256e5716a2302a5b940388"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga385c44f6fb256e5716a2302a5b940388"></a>enum  </td><td class="memItemRight" valign="bottom">{ <b>SPI_CS_TOGGLE_EVERY_FRAME</b> =0,
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<b>SPI_CS_TOGGLE_START_STOP</b> =1
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}</td></tr>
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<tr class="separator:ga385c44f6fb256e5716a2302a5b940388"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabc5c98fcc1211af2b80116dd6e0a035d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gabc5c98fcc1211af2b80116dd6e0a035d"></a>enum  </td><td class="memItemRight" valign="bottom">{ <b>SPI_SCLK_TOGGLE_MIDDLE</b> =0,
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<b>SPI_SCLK_TOGGLE_START</b> =1
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}</td></tr>
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<tr class="separator:gabc5c98fcc1211af2b80116dd6e0a035d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga72ea50c5dc70388ca9f1e7ebdefcd3d3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga72ea50c5dc70388ca9f1e7ebdefcd3d3"></a>enum  </td><td class="memItemRight" valign="bottom"><b>ChipSelect</b> { <br />
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  <b>CS_0</b> = 0,
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<b>CS_1</b> = 1,
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<b>CS_2</b> = 2,
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<b>CS_3</b> = 3,
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<br />
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  <b>CS_4</b> = 4,
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<b>CS_5</b> = 5,
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<b>CS_6</b> = 6,
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<b>CS_7</b> = 7
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<br />
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}</td></tr>
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<tr class="separator:ga72ea50c5dc70388ca9f1e7ebdefcd3d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16cbc562f954b30c69df51a8adee8534"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga16cbc562f954b30c69df51a8adee8534"></a>enum  </td><td class="memItemRight" valign="bottom"><b>SpiIrq</b> { <b>SpiRxIrq</b>,
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<b>SpiTxIrq</b>
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}</td></tr>
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<tr class="separator:ga16cbc562f954b30c69df51a8adee8534"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga26bef3c52a19e67ab560865256694136"><td class="memItemLeft" align="right" valign="top">
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typedef void(* </td><td class="memItemRight" valign="bottom"><b>spi_irq_handler</b>) (uint32_t id, SpiIrq event)</td></tr>
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<tr class="separator:ga26bef3c52a19e67ab560865256694136"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6e9595b7958847037dac25bbf21763da"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga6e9595b7958847037dac25bbf21763da">spi_irq_hook</a> (spi_t *obj, spi_irq_handler handler, uint32_t id)</td></tr>
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<tr class="memdesc:ga6e9595b7958847037dac25bbf21763da"><td class="mdescLeft"> </td><td class="mdescRight">Set SPI interrupt handler if needed. <a href="group__spi__ex.html#ga6e9595b7958847037dac25bbf21763da">More...</a><br /></td></tr>
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<tr class="separator:ga6e9595b7958847037dac25bbf21763da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga58c120ca975e75b9922eff12078d911f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga58c120ca975e75b9922eff12078d911f">spi_bus_tx_done_irq_hook</a> (spi_t *obj, spi_irq_handler handler, uint32_t id)</td></tr>
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<tr class="memdesc:ga58c120ca975e75b9922eff12078d911f"><td class="mdescLeft"> </td><td class="mdescRight">Set SPI interrupt bus tx done handler if needed. <a href="group__spi__ex.html#ga58c120ca975e75b9922eff12078d911f">More...</a><br /></td></tr>
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<tr class="separator:ga58c120ca975e75b9922eff12078d911f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga249e20a01a8af9b5a19e672f66dabf6a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga249e20a01a8af9b5a19e672f66dabf6a">spi_slave_flush_fifo</a> (spi_t *obj)</td></tr>
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<tr class="memdesc:ga249e20a01a8af9b5a19e672f66dabf6a"><td class="mdescLeft"> </td><td class="mdescRight">Slave device to flush tx fifo. <a href="group__spi__ex.html#ga249e20a01a8af9b5a19e672f66dabf6a">More...</a><br /></td></tr>
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<tr class="separator:ga249e20a01a8af9b5a19e672f66dabf6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaba7c845992387eeb5fb215bd1cb7e690"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gaba7c845992387eeb5fb215bd1cb7e690">spi_slave_read_stream</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gaba7c845992387eeb5fb215bd1cb7e690"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use interrupt mode. <a href="group__spi__ex.html#gaba7c845992387eeb5fb215bd1cb7e690">More...</a><br /></td></tr>
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<tr class="separator:gaba7c845992387eeb5fb215bd1cb7e690"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga678b03ba73fb3758e5b201417fddca9d"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga678b03ba73fb3758e5b201417fddca9d">spi_slave_write_stream</a> (spi_t *obj, char *tx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:ga678b03ba73fb3758e5b201417fddca9d"><td class="mdescLeft"> </td><td class="mdescRight">slave send target length data use interrupt mode. <a href="group__spi__ex.html#ga678b03ba73fb3758e5b201417fddca9d">More...</a><br /></td></tr>
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<tr class="separator:ga678b03ba73fb3758e5b201417fddca9d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga366686e2250422fbb876eda6ab5121b8"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga366686e2250422fbb876eda6ab5121b8">spi_master_read_stream</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:ga366686e2250422fbb876eda6ab5121b8"><td class="mdescLeft"> </td><td class="mdescRight">master recv target length data use interrupt mode. <a href="group__spi__ex.html#ga366686e2250422fbb876eda6ab5121b8">More...</a><br /></td></tr>
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<tr class="separator:ga366686e2250422fbb876eda6ab5121b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaaa8f8fdf9dabf959074f3ae8b5b989c2"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gaaa8f8fdf9dabf959074f3ae8b5b989c2">spi_master_write_stream</a> (spi_t *obj, char *tx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gaaa8f8fdf9dabf959074f3ae8b5b989c2"><td class="mdescLeft"> </td><td class="mdescRight">master send target length data use interrupt mode. <a href="group__spi__ex.html#gaaa8f8fdf9dabf959074f3ae8b5b989c2">More...</a><br /></td></tr>
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<tr class="separator:gaaa8f8fdf9dabf959074f3ae8b5b989c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga9056b0cb0dfab24ba0cfc1ce3367e625"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga9056b0cb0dfab24ba0cfc1ce3367e625">spi_master_write_read_stream</a> (spi_t *obj, char *tx_buffer, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:ga9056b0cb0dfab24ba0cfc1ce3367e625"><td class="mdescLeft"> </td><td class="mdescRight">master send & recv target length data use interrupt mode. <a href="group__spi__ex.html#ga9056b0cb0dfab24ba0cfc1ce3367e625">More...</a><br /></td></tr>
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<tr class="separator:ga9056b0cb0dfab24ba0cfc1ce3367e625"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae906eba39b6ecc4746a2bf06bac1c882"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gae906eba39b6ecc4746a2bf06bac1c882">spi_slave_read_stream_timeout</a> (spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms)</td></tr>
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<tr class="memdesc:gae906eba39b6ecc4746a2bf06bac1c882"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use interrupt mode and timeout mechanism. <a href="group__spi__ex.html#gae906eba39b6ecc4746a2bf06bac1c882">More...</a><br /></td></tr>
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<tr class="separator:gae906eba39b6ecc4746a2bf06bac1c882"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad7fea472a2340511b69840d41a6ec89f"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gad7fea472a2340511b69840d41a6ec89f">spi_slave_read_stream_terminate</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gad7fea472a2340511b69840d41a6ec89f"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use interrupt mode and stop if the spi bus is idle. <a href="group__spi__ex.html#gad7fea472a2340511b69840d41a6ec89f">More...</a><br /></td></tr>
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<tr class="separator:gad7fea472a2340511b69840d41a6ec89f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga914a3e32ac9fdd6c160d1b948a897c31"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga914a3e32ac9fdd6c160d1b948a897c31">spi_slave_read_stream_dma</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:ga914a3e32ac9fdd6c160d1b948a897c31"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use DMA mode. <a href="group__spi__ex.html#ga914a3e32ac9fdd6c160d1b948a897c31">More...</a><br /></td></tr>
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<tr class="separator:ga914a3e32ac9fdd6c160d1b948a897c31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee7e542d8e71a6ed4b2552256f55ac54"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gaee7e542d8e71a6ed4b2552256f55ac54">spi_slave_write_stream_dma</a> (spi_t *obj, char *tx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gaee7e542d8e71a6ed4b2552256f55ac54"><td class="mdescLeft"> </td><td class="mdescRight">slave send target length data use DMA mode. <a href="group__spi__ex.html#gaee7e542d8e71a6ed4b2552256f55ac54">More...</a><br /></td></tr>
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<tr class="separator:gaee7e542d8e71a6ed4b2552256f55ac54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3fba6e84103f5d3cfd5884c4a15366c"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gae3fba6e84103f5d3cfd5884c4a15366c">spi_master_write_read_stream_dma</a> (spi_t *obj, char *tx_buffer, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gae3fba6e84103f5d3cfd5884c4a15366c"><td class="mdescLeft"> </td><td class="mdescRight">master send & recv target length data use DMA mode. <a href="group__spi__ex.html#gae3fba6e84103f5d3cfd5884c4a15366c">More...</a><br /></td></tr>
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<tr class="separator:gae3fba6e84103f5d3cfd5884c4a15366c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab600e2403b6b4e8a924dc68f45c0ab31"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gab600e2403b6b4e8a924dc68f45c0ab31">spi_master_read_stream_dma</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gab600e2403b6b4e8a924dc68f45c0ab31"><td class="mdescLeft"> </td><td class="mdescRight">master recv target length data use DMA mode. <a href="group__spi__ex.html#gab600e2403b6b4e8a924dc68f45c0ab31">More...</a><br /></td></tr>
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<tr class="separator:gab600e2403b6b4e8a924dc68f45c0ab31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac73da5724fc8abb20728382d5eed7f25"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gac73da5724fc8abb20728382d5eed7f25">spi_master_write_stream_dma</a> (spi_t *obj, char *tx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:gac73da5724fc8abb20728382d5eed7f25"><td class="mdescLeft"> </td><td class="mdescRight">master send target length data use DMA mode. <a href="group__spi__ex.html#gac73da5724fc8abb20728382d5eed7f25">More...</a><br /></td></tr>
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<tr class="separator:gac73da5724fc8abb20728382d5eed7f25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf64e666ba72cd21b3a7905018212cdd3"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#gaf64e666ba72cd21b3a7905018212cdd3">spi_slave_read_stream_dma_timeout</a> (spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms)</td></tr>
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<tr class="memdesc:gaf64e666ba72cd21b3a7905018212cdd3"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use DMA mode and timeout mechanism. <a href="group__spi__ex.html#gaf64e666ba72cd21b3a7905018212cdd3">More...</a><br /></td></tr>
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<tr class="separator:gaf64e666ba72cd21b3a7905018212cdd3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6842485cab5cc26d4a86d01f4d2288fd"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__ex.html#ga6842485cab5cc26d4a86d01f4d2288fd">spi_slave_read_stream_dma_terminate</a> (spi_t *obj, char *rx_buffer, uint32_t length)</td></tr>
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<tr class="memdesc:ga6842485cab5cc26d4a86d01f4d2288fd"><td class="mdescLeft"> </td><td class="mdescRight">slave recv target length data use DMA mode and stop if the spi bus is idle. <a href="group__spi__ex.html#ga6842485cab5cc26d4a86d01f4d2288fd">More...</a><br /></td></tr>
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<tr class="separator:ga6842485cab5cc26d4a86d01f4d2288fd"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>This file provides following mbed SPI API. </p>
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<p>mbed Microcontroller Library</p>
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<dl class="section author"><dt>Author</dt><dd></dd></dl>
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<dl class="section version"><dt>Version</dt><dd>V1.0.0 </dd></dl>
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<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
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<p>Copyright (c) 2006-2013 ARM Limited</p>
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<p>Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at </p><pre class="fragment">http://www.apache.org/licenses/LICENSE-2.0
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</pre><p>Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. </p>
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</a> 1.8.11
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