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https://github.com/cwyark/sdk-ameba-v4.0b_without_nda_gcc.git
synced 2025-07-31 20:31:07 +00:00
Initial commit
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14
component/common/mbed/targets/cmsis/rtl8195a
Normal file
14
component/common/mbed/targets/cmsis/rtl8195a
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|||
/* mbed Microcontroller Library - CMSIS
|
||||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
|
||||
*
|
||||
* A generic CMSIS include header, pulling in RTL8195A specifics
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_H
|
||||
#define MBED_CMSIS_H
|
||||
|
||||
#include <platform/platform_stdlib.h>
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#include <hal_platform.h>
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||||
|
||||
#endif
|
||||
|
||||
14
component/common/mbed/targets/cmsis/rtl8711b
Normal file
14
component/common/mbed/targets/cmsis/rtl8711b
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
/* mbed Microcontroller Library - CMSIS
|
||||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
|
||||
*
|
||||
* A generic CMSIS include header, pulling in RTL8195A specifics
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_H
|
||||
#define MBED_CMSIS_H
|
||||
|
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#include <platform/platform_stdlib.h>
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#include <hal_platform.h>
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|
||||
#endif
|
||||
|
||||
100
component/common/mbed/targets/hal/rtl8195a/PeripheralNames.h
Normal file
100
component/common/mbed/targets/hal/rtl8195a/PeripheralNames.h
Normal file
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|
@ -0,0 +1,100 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PERIPHERALNAMES_H
|
||||
#define MBED_PERIPHERALNAMES_H
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
typedef enum {
|
||||
UART_1 = (int)USART1_BASE,
|
||||
UART_2 = (int)USART2_BASE,
|
||||
UART_3 = (int)USART3_BASE,
|
||||
UART_4 = (int)UART4_BASE,
|
||||
UART_5 = (int)UART5_BASE,
|
||||
UART_6 = (int)USART6_BASE
|
||||
} UARTName;
|
||||
|
||||
typedef enum {
|
||||
ADC0_0 = 0,
|
||||
ADC0_1,
|
||||
ADC0_2,
|
||||
ADC0_3,
|
||||
ADC0_4,
|
||||
ADC0_5,
|
||||
ADC0_6,
|
||||
ADC0_7,
|
||||
ADC0_8,
|
||||
ADC0_9,
|
||||
ADC0_10,
|
||||
ADC0_11,
|
||||
ADC0_12,
|
||||
ADC0_13,
|
||||
ADC0_14,
|
||||
ADC0_15
|
||||
} ADCName;
|
||||
|
||||
typedef enum {
|
||||
DAC_0 = 0,
|
||||
DAC_1
|
||||
} DACName;
|
||||
|
||||
typedef enum {
|
||||
SPI_1 = (int)SPI1_BASE,
|
||||
SPI_2 = (int)SPI2_BASE,
|
||||
SPI_3 = (int)SPI3_BASE,
|
||||
} SPIName;
|
||||
|
||||
typedef enum {
|
||||
I2C_1 = (int)I2C1_BASE,
|
||||
I2C_2 = (int)I2C2_BASE,
|
||||
I2C_3 = (int)I2C3_BASE
|
||||
} I2CName;
|
||||
|
||||
typedef enum {
|
||||
PWM_1 = 1,
|
||||
PWM_2,
|
||||
PWM_3,
|
||||
PWM_4,
|
||||
PWM_5,
|
||||
PWM_6
|
||||
} PWMName;
|
||||
|
||||
typedef enum {
|
||||
CAN_1 = (int)CAN1_BASE,
|
||||
CAN_2 = (int)CAN2_BASE
|
||||
} CANName;
|
||||
#endif
|
||||
|
||||
#define STDIO_UART_TX PA_6
|
||||
#define STDIO_UART_RX PA_7
|
||||
#define STDIO_UART UART0
|
||||
|
||||
typedef enum {
|
||||
DAC_0 = 0,
|
||||
DAC_1
|
||||
} DACName;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
215
component/common/mbed/targets/hal/rtl8195a/PinNames.h
Normal file
215
component/common/mbed/targets/hal/rtl8195a/PinNames.h
Normal file
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|
@ -0,0 +1,215 @@
|
|||
|
||||
#ifndef _PINNAMES_H_
|
||||
#define _PINNAMES_H_
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
PORT_A = 0,
|
||||
PORT_B = 1,
|
||||
PORT_C = 2,
|
||||
PORT_D = 3,
|
||||
PORT_E = 4,
|
||||
PORT_F = 5,
|
||||
PORT_G = 6,
|
||||
PORT_H = 7,
|
||||
PORT_I = 8,
|
||||
PORT_J = 9,
|
||||
PORT_K = 10,
|
||||
|
||||
PORT_V = 11,
|
||||
PORT_U = 12,
|
||||
PORT_MAX
|
||||
} GPIO_PORT;
|
||||
|
||||
#define RTL_PIN_PERI(FUN, IDX, SEL) ((int)(((FUN) << 8) | ((IDX)<<4) | (SEL)))
|
||||
#define RTL_PIN_FUNC(FUN, SEL) ((int)(((FUN) << 7) | (SEL)))
|
||||
#define RTL_GET_PERI_SEL(peri) ((int)((peri)&0x0F))
|
||||
#define RTL_GET_PERI_IDX(peri) ((int)(((peri) >> 4)&0x0F))
|
||||
|
||||
typedef enum {
|
||||
PIN_INPUT=0,
|
||||
PIN_OUTPUT
|
||||
} PinDirection;
|
||||
|
||||
typedef enum {
|
||||
PA_0 = (PORT_A<<4|0),
|
||||
PA_1 = (PORT_A<<4|1),
|
||||
PA_2 = (PORT_A<<4|2),
|
||||
PA_3 = (PORT_A<<4|3),
|
||||
PA_4 = (PORT_A<<4|4),
|
||||
PA_5 = (PORT_A<<4|5),
|
||||
PA_6 = (PORT_A<<4|6),
|
||||
PA_7 = (PORT_A<<4|7),
|
||||
|
||||
PB_0 = (PORT_B<<4|0),
|
||||
PB_1 = (PORT_B<<4|1),
|
||||
PB_2 = (PORT_B<<4|2),
|
||||
PB_3 = (PORT_B<<4|3),
|
||||
PB_4 = (PORT_B<<4|4),
|
||||
PB_5 = (PORT_B<<4|5),
|
||||
PB_6 = (PORT_B<<4|6),
|
||||
PB_7 = (PORT_B<<4|7),
|
||||
|
||||
PC_0 = (PORT_C<<4|0),
|
||||
PC_1 = (PORT_C<<4|1),
|
||||
PC_2 = (PORT_C<<4|2),
|
||||
PC_3 = (PORT_C<<4|3),
|
||||
PC_4 = (PORT_C<<4|4),
|
||||
PC_5 = (PORT_C<<4|5),
|
||||
PC_6 = (PORT_C<<4|6),
|
||||
PC_7 = (PORT_C<<4|7),
|
||||
PC_8 = (PORT_C<<4|8),
|
||||
PC_9 = (PORT_C<<4|9),
|
||||
|
||||
PD_0 = (PORT_D<<4|0),
|
||||
PD_1 = (PORT_D<<4|1),
|
||||
PD_2 = (PORT_D<<4|2),
|
||||
PD_3 = (PORT_D<<4|3),
|
||||
PD_4 = (PORT_D<<4|4),
|
||||
PD_5 = (PORT_D<<4|5),
|
||||
PD_6 = (PORT_D<<4|6),
|
||||
PD_7 = (PORT_D<<4|7),
|
||||
PD_8 = (PORT_D<<4|8),
|
||||
PD_9 = (PORT_D<<4|9),
|
||||
|
||||
PE_0 = (PORT_E<<4|0),
|
||||
PE_1 = (PORT_E<<4|1),
|
||||
PE_2 = (PORT_E<<4|2),
|
||||
PE_3 = (PORT_E<<4|3),
|
||||
PE_4 = (PORT_E<<4|4),
|
||||
PE_5 = (PORT_E<<4|5),
|
||||
PE_6 = (PORT_E<<4|6),
|
||||
PE_7 = (PORT_E<<4|7),
|
||||
PE_8 = (PORT_E<<4|8),
|
||||
PE_9 = (PORT_E<<4|9),
|
||||
PE_A = (PORT_E<<4|10),
|
||||
|
||||
PF_0 = (PORT_F<<4|0),
|
||||
PF_1 = (PORT_F<<4|1),
|
||||
PF_2 = (PORT_F<<4|2),
|
||||
PF_3 = (PORT_F<<4|3),
|
||||
PF_4 = (PORT_F<<4|4),
|
||||
PF_5 = (PORT_F<<4|5),
|
||||
// PF_6 = (PORT_F<<4|6),
|
||||
// PF_7 = (PORT_F<<4|7),
|
||||
|
||||
PG_0 = (PORT_G<<4|0),
|
||||
PG_1 = (PORT_G<<4|1),
|
||||
PG_2 = (PORT_G<<4|2),
|
||||
PG_3 = (PORT_G<<4|3),
|
||||
PG_4 = (PORT_G<<4|4),
|
||||
PG_5 = (PORT_G<<4|5),
|
||||
PG_6 = (PORT_G<<4|6),
|
||||
PG_7 = (PORT_G<<4|7),
|
||||
|
||||
PH_0 = (PORT_H<<4|0),
|
||||
PH_1 = (PORT_H<<4|1),
|
||||
PH_2 = (PORT_H<<4|2),
|
||||
PH_3 = (PORT_H<<4|3),
|
||||
PH_4 = (PORT_H<<4|4),
|
||||
PH_5 = (PORT_H<<4|5),
|
||||
PH_6 = (PORT_H<<4|6),
|
||||
PH_7 = (PORT_H<<4|7),
|
||||
|
||||
PI_0 = (PORT_I<<4|0),
|
||||
PI_1 = (PORT_I<<4|1),
|
||||
PI_2 = (PORT_I<<4|2),
|
||||
PI_3 = (PORT_I<<4|3),
|
||||
PI_4 = (PORT_I<<4|4),
|
||||
PI_5 = (PORT_I<<4|5),
|
||||
PI_6 = (PORT_I<<4|6),
|
||||
PI_7 = (PORT_I<<4|7),
|
||||
|
||||
PJ_0 = (PORT_J<<4|0),
|
||||
PJ_1 = (PORT_J<<4|1),
|
||||
PJ_2 = (PORT_J<<4|2),
|
||||
PJ_3 = (PORT_J<<4|3),
|
||||
PJ_4 = (PORT_J<<4|4),
|
||||
PJ_5 = (PORT_J<<4|5),
|
||||
PJ_6 = (PORT_J<<4|6),
|
||||
// PJ_7 = (PORT_J<<4|7),
|
||||
|
||||
PK_0 = (PORT_K<<4|0),
|
||||
PK_1 = (PORT_K<<4|1),
|
||||
PK_2 = (PORT_K<<4|2),
|
||||
PK_3 = (PORT_K<<4|3),
|
||||
PK_4 = (PORT_K<<4|4),
|
||||
PK_5 = (PORT_K<<4|5),
|
||||
PK_6 = (PORT_K<<4|6),
|
||||
// PK_7 = (PORT_K<<4|7),
|
||||
|
||||
AD_1 = (PORT_V<<4|1),
|
||||
AD_2 = (PORT_V<<4|2),
|
||||
AD_3 = (PORT_V<<4|3),
|
||||
|
||||
DA_0 = (PORT_U<<4|0),
|
||||
DA_1 = (PORT_U<<4|1),
|
||||
// Arduino connector namings
|
||||
/*
|
||||
A0 = PA_0,
|
||||
A1 = PA_1,
|
||||
A2 = PA_4,
|
||||
A3 = PB_0,
|
||||
A4 = PC_1,
|
||||
A5 = PC_0,
|
||||
D0 = PA_3,
|
||||
D1 = PA_2,
|
||||
D2 = PA_10,
|
||||
D3 = PB_3,
|
||||
D4 = PB_5,
|
||||
D5 = PB_4,
|
||||
D6 = PB_10,
|
||||
D7 = PA_8,
|
||||
D8 = PA_9,
|
||||
D9 = PC_7,
|
||||
D10 = PB_6,
|
||||
D11 = PA_7,
|
||||
D12 = PA_6,
|
||||
D13 = PA_5,
|
||||
D14 = PB_9,
|
||||
D15 = PB_8,
|
||||
*/
|
||||
|
||||
// Generic signals namings
|
||||
LED1 = PB_4,
|
||||
LED2 = PB_5,
|
||||
LED3 = PB_6,
|
||||
LED4 = PB_7,
|
||||
USER_BUTTON = PA_3,
|
||||
SERIAL_TX = PA_7,
|
||||
SERIAL_RX = PA_6,
|
||||
USBTX = PA_7,
|
||||
USBRX = PA_6,
|
||||
I2C_SCL = PC_5,
|
||||
I2C_SDA = PC_4,
|
||||
SPI_MOSI = PC_2,
|
||||
SPI_MISO = PC_3,
|
||||
SPI_SCK = PC_1,
|
||||
SPI_CS = PC_0,
|
||||
PWM_OUT = PD_4,
|
||||
|
||||
// Not connected
|
||||
NC = (uint32_t)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
typedef enum {
|
||||
PullNone = 0,
|
||||
PullUp = 1,
|
||||
PullDown = 2,
|
||||
OpenDrain = 3,
|
||||
PullDefault = PullNone
|
||||
} PinMode;
|
||||
|
||||
#define PORT_NUM(pin) (((uint32_t)(pin) >> 4) & 0xF)
|
||||
#define PIN_NUM(pin) ((uint32_t)(pin) & 0xF)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
38
component/common/mbed/targets/hal/rtl8195a/PortNames.h
Normal file
38
component/common/mbed/targets/hal/rtl8195a/PortNames.h
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PORTNAMES_H
|
||||
#define MBED_PORTNAMES_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
PortA = 0,
|
||||
PortB = 1,
|
||||
PortC = 2,
|
||||
PortD = 3,
|
||||
PortE = 4,
|
||||
PortF = 5,
|
||||
PortG = 6,
|
||||
PortH = 7,
|
||||
PortI = 8
|
||||
} PortName;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
303
component/common/mbed/targets/hal/rtl8195a/analogin_api.c
Normal file
303
component/common/mbed/targets/hal/rtl8195a/analogin_api.c
Normal file
|
|
@ -0,0 +1,303 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
#include "hal_adc.h"
|
||||
#include "analogin_api.h"
|
||||
#include "analogin_ex_api.h"
|
||||
|
||||
|
||||
|
||||
#if CONFIG_ADC_EN
|
||||
//#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
|
||||
extern u32 ConfigDebugErr;
|
||||
extern u32 ConfigDebuginfo;
|
||||
static SAL_ADC_TRANSFER_BUF adcrxtranbuf;
|
||||
|
||||
void analogin_internal_dma_callback(void *data) {
|
||||
analogin_t *obj = (analogin_t *)data;
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
uint8_t AnaloginIdx = 0;
|
||||
uint8_t AnaloginSec;
|
||||
uint32_t AnaloginCnt;
|
||||
uint32_t AnaloginUsserDatCnt;
|
||||
uint32_t AnaloginDatTmp;
|
||||
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
AnaloginIdx = pSalADCHND->DevNum;
|
||||
AnaloginSec = pSalADCHND->DevNum>>1;
|
||||
|
||||
DBG_ADC_INFO("%s\n", __func__);
|
||||
|
||||
for (AnaloginCnt = 0; AnaloginCnt < 16; AnaloginCnt+=2) {
|
||||
DBG_ADC_INFO("[%04x]: %08x %08x \n", AnaloginCnt, *(pSalADCHND->pRXBuf->pDataBuf + AnaloginCnt),
|
||||
*(pSalADCHND->pRXBuf->pDataBuf+AnaloginCnt+1));
|
||||
}
|
||||
|
||||
for(AnaloginCnt = 0, AnaloginUsserDatCnt = 0; AnaloginCnt < pSalADCHND->pRXBuf->DataLen; AnaloginCnt++) {
|
||||
if ((AnaloginCnt & BIT0) == AnaloginSec) {
|
||||
AnaloginDatTmp = *(pSalADCHND->pRXBuf->pDataBuf + AnaloginCnt);
|
||||
AnaloginDatTmp = AnaloginDatTmp & (0xFFFF << ((AnaloginIdx & BIT0)*16));
|
||||
AnaloginDatTmp = AnaloginDatTmp >> ((AnaloginIdx & BIT0)*16);
|
||||
*(pSalADCHND->pRXBuf->pUserDataBuf + AnaloginUsserDatCnt) = (u16)AnaloginDatTmp;
|
||||
AnaloginUsserDatCnt++;
|
||||
}
|
||||
}
|
||||
|
||||
RtlMfree(pSalADCHND->pRXBuf->pDataBuf, pSalADCHND->pRXBuf->DataLen*sizeof(uint32_t));
|
||||
|
||||
if (pSalADCHND->pUserCB->pDMARXCCB->USERCB != NULL) {
|
||||
pSalADCHND->pUserCB->pDMARXCCB->USERCB((VOID*) pSalADCHND->pUserCB->pDMARXCCB->USERData);
|
||||
}
|
||||
}
|
||||
|
||||
void analogin_init (analogin_t *obj, PinName pin){
|
||||
|
||||
uint32_t adc_idx;
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_USERCB_ADPT pSalADCUserCBAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
|
||||
HAL_ADC_INIT_DAT HalADCInitDataTmp;
|
||||
PHAL_ADC_INIT_DAT pHalADCInitDataTmp = &HalADCInitDataTmp;
|
||||
|
||||
/* To backup user config first */
|
||||
_memcpy(pHalADCInitDataTmp, &(obj->HalADCInitData), sizeof(HAL_ADC_INIT_DAT));
|
||||
|
||||
_memset(obj, 0x00, sizeof(analogin_t));
|
||||
|
||||
ConfigDebugErr &= (~(_DBG_ADC_|_DBG_GDMA_));
|
||||
ConfigDebugInfo&= (~(_DBG_ADC_|_DBG_GDMA_));
|
||||
|
||||
adc_idx = pin & 0x0F;
|
||||
|
||||
/* Get I2C device handler */
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCUserCBAdpt = (PSAL_ADC_USERCB_ADPT)&(obj->SalADCUserCBAdpt);
|
||||
|
||||
/*To assign the rest pointers*/
|
||||
pSalADCMngtAdpt->pSalHndPriv = &(obj->SalADCHndPriv);
|
||||
pSalADCMngtAdpt->pSalHndPriv->ppSalADCHnd = (void**)&(pSalADCMngtAdpt->pSalHndPriv);
|
||||
|
||||
/* To assign the default (ROM) HAL OP initialization function */
|
||||
pSalADCMngtAdpt->pHalOpInit = &HalADCOpInit;
|
||||
|
||||
/* To assign the default (ROM) HAL GDMA OP initialization function */
|
||||
pSalADCMngtAdpt->pHalGdmaOpInit = &HalGdmaOpInit;
|
||||
|
||||
/* To assign the default (ROM) SAL interrupt function */
|
||||
pSalADCMngtAdpt->pSalIrqFunc = &ADCISRHandle;
|
||||
|
||||
/* To assign the default (ROM) SAL DMA TX interrupt function */
|
||||
pSalADCMngtAdpt->pSalDMAIrqFunc = &ADCGDMAISRHandle;
|
||||
|
||||
/* To backup user config first */
|
||||
//_memcpy(pHalADCInitDataTmp, &(obj->HalADCInitData), sizeof(HAL_ADC_INIT_DAT));
|
||||
|
||||
|
||||
pSalADCMngtAdpt->pHalInitDat = &(obj->HalADCInitData);
|
||||
pSalADCMngtAdpt->pHalOp = &(obj->HalADCOp);
|
||||
pSalADCMngtAdpt->pIrqHnd = &(obj->ADCIrqHandleDat);
|
||||
pSalADCMngtAdpt->pHalGdmaAdp = &(obj->HalADCGdmaAdpt);
|
||||
pSalADCMngtAdpt->pHalGdmaOp = &(obj->HalADCGdmaOp);
|
||||
pSalADCMngtAdpt->pIrqGdmaHnd = &(obj->ADCGdmaIrqHandleDat);
|
||||
pSalADCMngtAdpt->pUserCB = &(obj->SalADCUserCB);
|
||||
|
||||
/* Assign the private SAL handle to public SAL handle */
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
/* Assign the internal HAL initial data pointer to the SAL handle */
|
||||
pSalADCHND->pInitDat = pSalADCMngtAdpt->pHalInitDat;
|
||||
|
||||
/* Assign the internal user callback pointer to the SAL handle */
|
||||
pSalADCHND->pUserCB = pSalADCMngtAdpt->pUserCB;
|
||||
|
||||
/*To assign user callback pointers*/
|
||||
pSalADCMngtAdpt->pUserCB->pRXCB = pSalADCUserCBAdpt;
|
||||
pSalADCMngtAdpt->pUserCB->pRXCCB = (pSalADCUserCBAdpt+1);
|
||||
pSalADCMngtAdpt->pUserCB->pERRCB = (pSalADCUserCBAdpt+2);
|
||||
pSalADCMngtAdpt->pUserCB->pIDMARXCCB= (pSalADCUserCBAdpt+3);
|
||||
pSalADCMngtAdpt->pUserCB->pDMARXCB = (pSalADCUserCBAdpt+4);
|
||||
pSalADCMngtAdpt->pUserCB->pDMARXCCB = (pSalADCUserCBAdpt+5);
|
||||
/*
|
||||
pSalADCMngtAdpt->pUserCB->pTXCB = pSalADCUserCBAdpt;
|
||||
pSalADCMngtAdpt->pUserCB->pTXCCB = (pSalADCUserCBAdpt+1);
|
||||
pSalADCMngtAdpt->pUserCB->pRXCB = (pSalADCUserCBAdpt+2);
|
||||
pSalADCMngtAdpt->pUserCB->pRXCCB = (pSalADCUserCBAdpt+3);
|
||||
pSalADCMngtAdpt->pUserCB->pRDREQCB = (pSalADCUserCBAdpt+4);
|
||||
pSalADCMngtAdpt->pUserCB->pERRCB = (pSalADCUserCBAdpt+5);
|
||||
pSalADCMngtAdpt->pUserCB->pDMATXCB = (pSalADCUserCBAdpt+6);
|
||||
pSalADCMngtAdpt->pUserCB->pDMATXCCB = (pSalADCUserCBAdpt+7);
|
||||
pSalADCMngtAdpt->pUserCB->pDMARXCB = (pSalADCUserCBAdpt+8);
|
||||
pSalADCMngtAdpt->pUserCB->pDMARXCCB = (pSalADCUserCBAdpt+9);
|
||||
*/
|
||||
/* Set ADC Device Number */
|
||||
pSalADCHND->DevNum = adc_idx;
|
||||
|
||||
/* Load ADC default value */
|
||||
RtkADCLoadDefault(pSalADCHND);
|
||||
|
||||
/* Assign ADC Pin Mux */
|
||||
pSalADCHND->PinMux = 0;
|
||||
pSalADCHND->OpType = ADC_RDREG_TYPE;
|
||||
|
||||
/* Load user setting */
|
||||
if ((pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_LITTLE) || (pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_BIG)) {
|
||||
pSalADCHND->pInitDat->ADCEndian = pHalADCInitDataTmp->ADCEndian;
|
||||
}
|
||||
|
||||
if ((pHalADCInitDataTmp->ADCAudioEn != ADC_FEATURE_DISABLED) && (pHalADCInitDataTmp->ADCAudioEn < 2)) {
|
||||
pSalADCHND->pInitDat->ADCAudioEn = pHalADCInitDataTmp->ADCAudioEn;
|
||||
}
|
||||
|
||||
/* Init ADC now */
|
||||
pSalADCHND->pInitDat->ADCBurstSz = 8;
|
||||
pSalADCHND->pInitDat->ADCOneShotTD = 8;
|
||||
RtkADCInit(pSalADCHND);
|
||||
}
|
||||
|
||||
float analogin_read(analogin_t *obj){
|
||||
float value;
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
uint32_t AnaloginDatMsk = 0xFFFF;
|
||||
uint8_t AnaloginIdx = 0;
|
||||
uint32_t AnalogDat = 0;
|
||||
|
||||
uint32_t AnalogDatFull = 0;
|
||||
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
AnaloginIdx = pSalADCHND->DevNum;
|
||||
RtkADCReceiveBuf(pSalADCHND,&AnaloginTmp[0]);
|
||||
|
||||
AnaloginDatMsk = (u32)(AnaloginDatMsk<<((u32)(16*(AnaloginIdx&0x01))));
|
||||
AnalogDat = AnaloginTmp[(AnaloginIdx/2)];
|
||||
AnalogDat = (AnalogDat & AnaloginDatMsk);
|
||||
AnalogDat = (AnalogDat>>((u32)(16*(AnaloginIdx&0x01))));
|
||||
|
||||
AnalogDatFull = 0xCE80;
|
||||
|
||||
value = (float)(AnalogDat) / (float)(AnalogDatFull);
|
||||
|
||||
return (float)value;
|
||||
}
|
||||
|
||||
uint16_t analogin_read_u16(analogin_t *obj){
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
uint32_t AnaloginDatMsk = 0xFFFF;
|
||||
uint8_t AnaloginIdx = 0;
|
||||
uint32_t AnalogDat = 0;
|
||||
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
AnaloginIdx = pSalADCHND->DevNum;
|
||||
RtkADCRxManualRotate(pSalADCHND,&AnaloginTmp[0]);
|
||||
|
||||
|
||||
//DBG_8195A("[0]:%08x, %08x\n", AnaloginTmp[0], AnaloginTmp[1] );
|
||||
AnaloginDatMsk = (u32)(AnaloginDatMsk<<((u32)(16*(AnaloginIdx&0x01))));
|
||||
AnalogDat = AnaloginTmp[(AnaloginIdx/2)];
|
||||
AnalogDat = (AnalogDat & AnaloginDatMsk);
|
||||
AnalogDat = (AnalogDat>>((u32)(16*(AnaloginIdx&0x01))));
|
||||
|
||||
return (uint16_t)AnalogDat;
|
||||
|
||||
}
|
||||
|
||||
|
||||
void analogin_deinit(analogin_t *obj){
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
/* To deinit analogin */
|
||||
RtkADCDeInit(pSalADCHND);
|
||||
}
|
||||
|
||||
void analogin_set_user_callback (analogin_t * obj, AnalogInCallback analogin_cb, void(* analogin_callback)(void *)){
|
||||
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
switch (analogin_cb) {
|
||||
case ANALOGIN_RX_DMA_COMPLETE:
|
||||
pSalADCHND->pUserCB->pDMARXCCB->USERCB = analogin_callback;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void analogin_clear_user_callback (analogin_t * obj, AnalogInCallback analogin_cb){
|
||||
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
switch (analogin_cb) {
|
||||
case ANALOGIN_RX_DMA_COMPLETE:
|
||||
pSalADCHND->pUserCB->pDMARXCB = NULL;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
uint8_t analogin_read_u16_dma (analogin_t * obj, uint16_t *buf, uint16_t length) {
|
||||
PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL;
|
||||
PSAL_ADC_HND pSalADCHND = NULL;
|
||||
uint8_t AnaloginIdx = 0;
|
||||
|
||||
pSalADCMngtAdpt = &(obj->SalADCMngtAdpt);
|
||||
pSalADCHND = &(pSalADCMngtAdpt->pSalHndPriv->SalADCHndPriv);
|
||||
|
||||
if (length > (uint16_t)(MAX_DMA_BLOCK_SIZE/2)) {
|
||||
DBG_ADC_ERR("Data length is more than supported size.\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
_memset(&adcrxtranbuf, 0x0000, sizeof(adcrxtranbuf));
|
||||
AnaloginIdx = pSalADCHND->DevNum;
|
||||
pSalADCHND->pRXBuf = &adcrxtranbuf;
|
||||
pSalADCHND->OpType = ADC_DMA_TYPE;
|
||||
DBG_ADC_INFO("ch%d, DMA len: %d, ptr: %x\n", AnaloginIdx, length, buf);
|
||||
|
||||
pSalADCHND->pUserCB->pIDMARXCCB->USERCB = analogin_internal_dma_callback;
|
||||
pSalADCHND->pUserCB->pIDMARXCCB->USERData = (u32)obj;
|
||||
pSalADCHND->pRXBuf->pDataBuf = (u32 *)RtlZmalloc(sizeof(uint32_t)*length*2);
|
||||
pSalADCHND->pRXBuf->pUserDataBuf = (u16 *)buf;
|
||||
pSalADCHND->pRXBuf->DataLen = length*2;
|
||||
|
||||
RtkADCReceiveDMA(pSalADCHND, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
48
component/common/mbed/targets/hal/rtl8195a/device.h
Normal file
48
component/common/mbed/targets/hal/rtl8195a/device.h
Normal file
|
|
@ -0,0 +1,48 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_DEVICE_H
|
||||
#define MBED_DEVICE_H
|
||||
|
||||
#define DEVICE_PORTIN 1
|
||||
#define DEVICE_PORTOUT 1
|
||||
#define DEVICE_PORTINOUT 1
|
||||
|
||||
#define DEVICE_INTERRUPTIN 1
|
||||
|
||||
#define DEVICE_ANALOGIN 1
|
||||
#define DEVICE_ANALOGOUT 1
|
||||
|
||||
#define DEVICE_SERIAL 1
|
||||
|
||||
#define DEVICE_I2C 1
|
||||
#define DEVICE_I2CSLAVE 1
|
||||
|
||||
#define DEVICE_SPI 1
|
||||
#define DEVICE_SPISLAVE 1
|
||||
|
||||
#define DEVICE_CAN 0
|
||||
|
||||
#define DEVICE_RTC 1
|
||||
|
||||
#define DEVICE_ETHERNET 1
|
||||
|
||||
#define DEVICE_PWMOUT 1
|
||||
|
||||
#define DEVICE_SLEEP 1
|
||||
|
||||
#include "objects.h"
|
||||
|
||||
#endif
|
||||
89
component/common/mbed/targets/hal/rtl8195a/dma_api.c
Normal file
89
component/common/mbed/targets/hal/rtl8195a/dma_api.c
Normal file
|
|
@ -0,0 +1,89 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek
|
||||
* All rights reserved.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "dma_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
extern BOOL HalGdmaMemCpyInit(PHAL_GDMA_OBJ pHalGdmaObj);
|
||||
extern VOID HalGdmaMemCpyDeInit(PHAL_GDMA_OBJ pHalGdmaObj);
|
||||
extern VOID* HalGdmaMemCpy(PHAL_GDMA_OBJ pHalGdmaObj, void* pDest, void* pSrc, u32 len);
|
||||
extern VOID HalGdmaMemAggr(PHAL_GDMA_OBJ pHalGdmaObj, PHAL_GDMA_BLOCK pHalGdmaBlock);
|
||||
extern BOOL HalGdmaMemCpyAggrInit(PHAL_GDMA_OBJ pHalGdmaObj);
|
||||
|
||||
/**
|
||||
* @brief Initial the GDMA
|
||||
*
|
||||
* @param dma_obj: the GDMA object
|
||||
* handler: the callback function for a DMA transfer complete.
|
||||
* id: the argument of the callback function.
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy_aggr_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id)
|
||||
{
|
||||
dma_obj->gdma_obj.GdmaIrqHandle.IrqFun = (IRQ_FUN)handler;
|
||||
dma_obj->gdma_obj.GdmaIrqHandle.Data = (u32)id;
|
||||
dma_obj->gdma_allocated = HalGdmaMemCpyAggrInit(&(dma_obj->gdma_obj));
|
||||
}
|
||||
|
||||
|
||||
void dma_memcpy_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id)
|
||||
{
|
||||
dma_obj->gdma_obj.GdmaIrqHandle.IrqFun = (IRQ_FUN)handler;
|
||||
dma_obj->gdma_obj.GdmaIrqHandle.Data = (u32)id;
|
||||
dma_obj->gdma_allocated = HalGdmaMemCpyInit(&(dma_obj->gdma_obj));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initial the GDMA
|
||||
*
|
||||
* @param dma_obj: the GDMA object
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy_deinit(gdma_t *dma_obj)
|
||||
{
|
||||
if (dma_obj->gdma_allocated) {
|
||||
HalGdmaMemCpyDeInit(&(dma_obj->gdma_obj));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To do a memory copy by DMA
|
||||
*
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy(gdma_t *dma_obj, void *dst, void* src, uint32_t len)
|
||||
{
|
||||
#if 0
|
||||
if (!dma_obj->gdma_allocated) {
|
||||
dma_irq_handler handler;
|
||||
|
||||
_memcpy(dst, src, len);
|
||||
handler = dma_obj->GdmaIrqHandle.IrqFun;
|
||||
handler(dma_obj->GdmaIrqHandle.Data);
|
||||
}
|
||||
#endif
|
||||
HalGdmaMemCpy(&(dma_obj->gdma_obj), dst, src, len);
|
||||
}
|
||||
|
||||
void dma_memcpy_aggr(gdma_t *dma_obj, PHAL_GDMA_BLOCK block_info)
|
||||
{
|
||||
HalGdmaMemAggr(&(dma_obj->gdma_obj), block_info);
|
||||
}
|
||||
222
component/common/mbed/targets/hal/rtl8195a/efuse_api.c
Normal file
222
component/common/mbed/targets/hal/rtl8195a/efuse_api.c
Normal file
|
|
@ -0,0 +1,222 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rtl8195a.h"
|
||||
|
||||
#ifdef CONFIG_EFUSE_EN
|
||||
|
||||
extern VOID ReadEfuseContant1(OUT u8 *pContant);
|
||||
extern u8 WriteEfuseContant1(IN u8 CodeWordNum, IN u8 WordEnable, IN u8 *pContant);
|
||||
extern VOID ReadEOTPContant(OUT u8 *pContant);
|
||||
extern u32 WriteEOTPContant(IN u8 *pContant);
|
||||
extern u32 EOTPChkContant(IN u8 * pContant);
|
||||
extern u32 WriteKEY1(IN u8 *pContant);
|
||||
extern u32 WriteKEY2(IN u8 *pContant);
|
||||
extern u8 GetRemainingEfuseLength(void);
|
||||
extern VOID HALJtagOff(VOID);
|
||||
|
||||
/**
|
||||
* @brief get remaining efuse length
|
||||
* @retval remaining efuse length
|
||||
*/
|
||||
int efuse_get_remaining_length(void)
|
||||
{
|
||||
return GetRemainingEfuseLength();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read efuse contant of specified user
|
||||
* @param data: Specified the address to save the readback data.
|
||||
*/
|
||||
void efuse_mtp_read(uint8_t * data)
|
||||
{
|
||||
ReadEfuseContant1(data);
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write user's contant to efuse
|
||||
* @param *data: Specified the data to be programmed.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @retval status: Success:0~32 or Failure: -1.
|
||||
*/
|
||||
int efuse_mtp_write(uint8_t *data, uint8_t len)
|
||||
{
|
||||
|
||||
u8 len_low, len_high, word_enable = 0;
|
||||
|
||||
if( (len & 0x01) == 1)
|
||||
len += 1;
|
||||
|
||||
if(len > 32){
|
||||
return -1;
|
||||
}
|
||||
if(len == 0){
|
||||
return 0;
|
||||
}
|
||||
|
||||
len_low = len & 0x07;
|
||||
len_high = (len >> 3) & 0x07;
|
||||
|
||||
if(len_low == 0)
|
||||
word_enable = 0;
|
||||
else if(len_low == 2)
|
||||
word_enable = 1;
|
||||
else if(len_low == 4)
|
||||
word_enable = 3;
|
||||
else if(len_low == 6)
|
||||
word_enable = 7;
|
||||
|
||||
switch (len_high){
|
||||
case 0:
|
||||
WriteEfuseContant1(0, word_enable, data);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
WriteEfuseContant1(0, 0xf, data);
|
||||
WriteEfuseContant1(1, word_enable, data+8);
|
||||
break;
|
||||
|
||||
case 2:
|
||||
WriteEfuseContant1(0, 0xf, data);
|
||||
WriteEfuseContant1(1, 0xf, data+8);
|
||||
WriteEfuseContant1(2, word_enable, data+8);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
WriteEfuseContant1(0, 0xf, data);
|
||||
WriteEfuseContant1(1, 0xf, data+8);
|
||||
WriteEfuseContant1(2, 0xf, data+16);
|
||||
WriteEfuseContant1(3, word_enable, data+24);
|
||||
break;
|
||||
|
||||
case 4:
|
||||
WriteEfuseContant1(0, 0xf, data);
|
||||
WriteEfuseContant1(1, 0xf, data+8);
|
||||
WriteEfuseContant1(2, 0xf, data+16);
|
||||
WriteEfuseContant1(3, 0xf, data+24);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read efuse OTP contant
|
||||
* @param address: Specifies the offset of the OTP.
|
||||
* @param len: Specifies the length of readback data.
|
||||
* @param buf: Specified the address to save the readback data.
|
||||
*/
|
||||
int efuse_otp_read(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
|
||||
if((address+len) > 32)
|
||||
return -1;
|
||||
ReadEOTPContant(content);
|
||||
_memcpy(buf, content+address, len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Write user's contant to OTP efuse
|
||||
* @param address: Specifies the offset of the programmed OTP.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @param *buf: Specified the data to be programmed.
|
||||
* @retval status: Success:0 or Failure: -1.
|
||||
*/
|
||||
int efuse_otp_write(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
u32 result;
|
||||
|
||||
if((address+len) > 32)
|
||||
return -1;
|
||||
_memset(content, 0xFF, 32);
|
||||
_memcpy(content+address, buf, len);
|
||||
result = WriteEOTPContant(content);
|
||||
|
||||
return (result? 0 : -1);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief ckeck user's contant to OTP efuse
|
||||
* @param *buf: Specified the data to be programmed.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @retval status: Success:0 or Failure: -1.
|
||||
*/
|
||||
int efuse_otp_chk(u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
u32 result;
|
||||
|
||||
_memset(content, 0xFF, 32);
|
||||
_memcpy(content, buf, len);
|
||||
result = EOTPChkContant(content);
|
||||
|
||||
return (result? 0 : -1);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Write key1 to efuse
|
||||
* @param address: Specifies the offset of the programmed efuse.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @param *buf: Specified the data to be programmed.
|
||||
* @retval status: Success:0 or Failure: -1.
|
||||
*/
|
||||
int efuse_key1_write(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[16]; // the key max length is 16
|
||||
u32 result;
|
||||
|
||||
if((address+len) > 16)
|
||||
return -1;
|
||||
_memset(content, 0xFF, 16);
|
||||
_memcpy(content+address, buf, len);
|
||||
result = WriteKEY1(content);
|
||||
|
||||
return (result? 0 : -1);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Write key2 to efuse
|
||||
* @param address: Specifies the offset of the programmed efuse.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @param *buf: Specified the data to be programmed.
|
||||
* @retval status: Success:0 or Failure: -1.
|
||||
*/
|
||||
int efuse_key2_write(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[16]; // the key max length is 16
|
||||
u32 result;
|
||||
|
||||
if((address+len) > 16)
|
||||
return -1;
|
||||
_memset(content, 0xFF, 16);
|
||||
_memcpy(content+address, buf, len);
|
||||
result = WriteKEY2(content);
|
||||
|
||||
return (result? 0 : -1);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Disable jtag
|
||||
*/
|
||||
int efuse_disable_jtag(void)
|
||||
{
|
||||
HALJtagOff();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
105
component/common/mbed/targets/hal/rtl8195a/ethernet_api.c
Normal file
105
component/common/mbed/targets/hal/rtl8195a/ethernet_api.c
Normal file
|
|
@ -0,0 +1,105 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "ethernet_api.h"
|
||||
#include "ethernet_ex_api.h"
|
||||
#include "hal_mii.h"
|
||||
|
||||
#if DEVICE_ETHERNET
|
||||
|
||||
#if CONFIG_MII_EN
|
||||
|
||||
extern HAL_ETHER_ADAPTER HalEtherAdp;
|
||||
|
||||
|
||||
|
||||
void ethernet_irq_hook(ethernet_callback callback)
|
||||
{
|
||||
HalEtherAdp.CallBack = callback;
|
||||
}
|
||||
|
||||
|
||||
void ethernet_set_descnum(uint8_t txdescCnt, uint8_t rxdescCnt)
|
||||
{
|
||||
HalEtherAdp.tx_desc_num = txdescCnt;
|
||||
HalEtherAdp.rx_desc_num = rxdescCnt;
|
||||
}
|
||||
|
||||
|
||||
void ethernet_trx_pre_setting(uint8_t *TxDescAddr, uint8_t *RxDescAddr, uint8_t *pTxPktBuf, uint8_t *pRxPktBuf)
|
||||
{
|
||||
HalEtherAdp.TxDescAddr = TxDescAddr;
|
||||
HalEtherAdp.RxDescAddr = RxDescAddr;
|
||||
HalEtherAdp.pTxPktBuf = pTxPktBuf;
|
||||
HalEtherAdp.pRxPktBuf = pRxPktBuf;
|
||||
}
|
||||
|
||||
|
||||
int ethernet_init(void)
|
||||
{
|
||||
return HalMiiInit();
|
||||
}
|
||||
|
||||
|
||||
void ethernet_free(void)
|
||||
{
|
||||
HalMiiDeInit();
|
||||
}
|
||||
|
||||
|
||||
int ethernet_write(const char *data, int size)
|
||||
{
|
||||
return HalMiiWriteData(data, size);
|
||||
}
|
||||
|
||||
|
||||
int ethernet_send(void)
|
||||
{
|
||||
return HalMiiSendPacket();
|
||||
}
|
||||
|
||||
|
||||
int ethernet_receive(void)
|
||||
{
|
||||
return HalMiiReceivePacket();
|
||||
}
|
||||
|
||||
|
||||
int ethernet_read(char *data, int size)
|
||||
{
|
||||
return HalMiiReadData((u8*)data, size);
|
||||
}
|
||||
|
||||
|
||||
void ethernet_address(char *mac)
|
||||
{
|
||||
HalMiiGetMacAddress((u8*)mac);
|
||||
}
|
||||
|
||||
|
||||
int ethernet_link(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
||||
ret = HalMiiGetLinkStatus();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
void ethernet_set_link(int speed, int duplex)
|
||||
{
|
||||
HalMiiForceLink(speed, duplex);
|
||||
}
|
||||
|
||||
#endif // #if CONFIG_MII_EN
|
||||
#endif // #if DEVICE_ETHERNET
|
||||
|
||||
649
component/common/mbed/targets/hal/rtl8195a/flash_api.c
Normal file
649
component/common/mbed/targets/hal/rtl8195a/flash_api.c
Normal file
|
|
@ -0,0 +1,649 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
|
||||
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "rtl8195a.h"
|
||||
#include "hal_spi_flash.h"
|
||||
#include "hal_platform.h"
|
||||
#include "rtl8195a_spi_flash.h"
|
||||
#include "hal_api.h"
|
||||
#include "flash_api.h"
|
||||
|
||||
extern u32 ConfigDebugInfo;
|
||||
extern SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
|
||||
|
||||
_LONG_CALL_
|
||||
extern VOID SpicWaitBusyDoneRtl8195A(VOID);
|
||||
|
||||
static int isinit = 0;
|
||||
static flash_t flashobj;
|
||||
|
||||
static void flash_init(flash_t * obj);
|
||||
static void flash_turnon();
|
||||
/**
|
||||
* global data structure
|
||||
*/
|
||||
//flash_t flash;
|
||||
|
||||
/**
|
||||
* @brief Control the flash chip write protect enable/disable
|
||||
* @param protect: 1/0: protect/unprotect
|
||||
* @retval none
|
||||
*/
|
||||
void flash_write_protect(flash_t *obj, uint32_t protect)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
SpicWriteProtectFlashRtl8195A(protect);
|
||||
SpicDisableRtl8195A();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Init Flash
|
||||
* @param obj: address of the flash object
|
||||
* @retval none
|
||||
*/
|
||||
void flash_init(flash_t *obj)
|
||||
{
|
||||
//SPIC_INIT_PARA spic_init_para;
|
||||
|
||||
// Init SPI Flash Controller
|
||||
// DBG_8195A("Initial Spi Flash Controller\n");
|
||||
//SPI_FLASH_PIN_FCTRL(ON);
|
||||
|
||||
if (!SpicFlashInitRtl8195A(SpicOneBitMode)){
|
||||
|
||||
DBG_8195A("SPI Init Fail!!!!!!\n");
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3, HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3)|0xf);
|
||||
}
|
||||
else {
|
||||
isinit = 1;
|
||||
}
|
||||
flashobj.SpicInitPara.flashtype = SpicInitParaAllClk[0][0].flashtype;
|
||||
|
||||
//DBG_8195A("Flash ID is = %x %x %x \n",SpicInitParaAllClk[0][0].id[0],SpicInitParaAllClk[0][0].id[1],SpicInitParaAllClk[0][0].id[2]);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get flash ID (command: 0x9F).
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param buf: Pointer to a byte array to save the readback ID.
|
||||
* @param len: Specifies the length of the buf. It should be 3.
|
||||
* @retval -1: Fail.
|
||||
*/
|
||||
int flash_read_id(flash_t *obj, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
int index = 0;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
if (len < 3) {
|
||||
DBG_8195A("ID length should be >= 3\n");
|
||||
return -1;
|
||||
}
|
||||
SpicReadIDRtl8195A();
|
||||
|
||||
for (index = 0; index < 3; index++) {
|
||||
buf[index] = SpicInitParaAllClk[0][0].id[index];
|
||||
}
|
||||
|
||||
if ((buf[0] == 0x0) || (buf[0] == 0xFF)) {
|
||||
DBG_8195A("Invalid ID\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
len = 3;
|
||||
return len;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is only for Winbond flash to get unique ID (command: 0x4B).
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param buf: Pointer to a byte array to save the readback unique ID.
|
||||
* @param len: Specifies the length of the buf. It should be 8.
|
||||
* @retval -1: Fail.
|
||||
*/
|
||||
int flash_read_unique_id(flash_t *obj, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
int index = 0;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
if (len < 8) {
|
||||
DBG_8195A("Unique ID length should be >= 8.\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (FLASH_WINBOND != flashobj.SpicInitPara.flashtype) {
|
||||
DBG_8195A("Only Winbond flash supports this function.\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
SpicReadUniqueIDRtl8195A(buf, len);
|
||||
|
||||
//for (index = 0; index < len; index++) {
|
||||
//DBG_8195A("buf[%d] = %x\n",index,buf[index]);
|
||||
//}
|
||||
|
||||
len = 8;
|
||||
return len;
|
||||
|
||||
}
|
||||
|
||||
void flash_turnon()
|
||||
{
|
||||
SPI_FLASH_PIN_FCTRL(ON);
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erase flash sector
|
||||
* @param address: Specifies the starting address to be erased.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_erase_sector(flash_t *obj, uint32_t address)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
SpicSectorEraseFlashRtl8195A(SPI_FLASH_BASE + address);
|
||||
SpicDisableRtl8195A();
|
||||
}
|
||||
|
||||
void flash_erase_block(flash_t *obj, uint32_t address)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
SpicBlockEraseFlashRtl8195A(SPI_FLASH_BASE + address);
|
||||
SpicDisableRtl8195A();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read a word from specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be read.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_read_word(flash_t *obj, uint32_t address, uint32_t * data)
|
||||
{
|
||||
|
||||
flash_turnon();
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
// Wait flash busy done (wip=0)
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
* data = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
SpicDisableRtl8195A();
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a word to specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be programmed.
|
||||
* @param data: Specified the data to be programmed.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_write_word(flash_t *obj, uint32_t address, uint32_t data)
|
||||
{
|
||||
u8 flashtype = 0;
|
||||
|
||||
flash_turnon();
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
|
||||
flashtype = flashobj.SpicInitPara.flashtype;
|
||||
|
||||
//Write word
|
||||
HAL_WRITE32(SPI_FLASH_BASE, address, data);
|
||||
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read a stream of data from specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be read.
|
||||
* @param len: Specifies the length of the data to read.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_stream_read(flash_t *obj, uint32_t address, uint32_t len, uint8_t * data)
|
||||
{
|
||||
u32 offset_to_align;
|
||||
u32 i;
|
||||
u32 read_word;
|
||||
uint8_t *ptr;
|
||||
uint8_t *pbuf;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
|
||||
// Wait flash busy done (wip=0)
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
offset_to_align = address & 0x03;
|
||||
pbuf = data;
|
||||
if (offset_to_align != 0) {
|
||||
// the start address is not 4-bytes aligned
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, (address - offset_to_align));
|
||||
ptr = (uint8_t*)&read_word + offset_to_align;
|
||||
offset_to_align = 4 - offset_to_align;
|
||||
for (i=0;i<offset_to_align;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
len--;
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
address = (((address-1) >> 2) + 1) << 2; // address = next 4-bytes aligned
|
||||
|
||||
ptr = (uint8_t*)&read_word;
|
||||
if ((u32)pbuf & 0x03) {
|
||||
while (len >= 4) {
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
for (i=0;i<4;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
}
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
}
|
||||
else {
|
||||
while (len >= 4) {
|
||||
*((u32 *)pbuf) = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
pbuf += 4;
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
}
|
||||
|
||||
if (len > 0) {
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
for (i=0;i<len;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
}
|
||||
}
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a stream of data to specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be read.
|
||||
* @param len: Specifies the length of the data to write.
|
||||
* @param data: Specified the pointer of the data to be written.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * data)
|
||||
{
|
||||
u32 offset_to_align;
|
||||
u32 align_addr;
|
||||
u32 i;
|
||||
u32 write_word;
|
||||
uint8_t *ptr;
|
||||
uint8_t *pbuf;
|
||||
u8 flashtype = 0;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
flashtype = flashobj.SpicInitPara.flashtype;
|
||||
offset_to_align = address & 0x03;
|
||||
pbuf = data;
|
||||
if (offset_to_align != 0) {
|
||||
// the start address is not 4-bytes aligned
|
||||
align_addr = (address - offset_to_align);
|
||||
write_word = HAL_READ32(SPI_FLASH_BASE, align_addr);
|
||||
ptr = (uint8_t*)&write_word + offset_to_align;
|
||||
offset_to_align = 4 - offset_to_align;
|
||||
for (i=0;i<offset_to_align;i++) {
|
||||
*(ptr+i) = *pbuf;
|
||||
pbuf++;
|
||||
len--;
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
//Write word
|
||||
HAL_WRITE32(SPI_FLASH_BASE, align_addr, write_word);
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
|
||||
}
|
||||
|
||||
address = (((address-1) >> 2) + 1) << 2; // address = next 4-bytes aligned
|
||||
|
||||
if ((u32)pbuf & 0x03) {
|
||||
while (len >= 4) {
|
||||
write_word = (u32)(*pbuf) | ((u32)(*(pbuf+1)) << 8) | ((u32)(*(pbuf+2)) << 16) | ((u32)(*(pbuf+3)) << 24);
|
||||
//Write word
|
||||
HAL_WRITE32(SPI_FLASH_BASE, address, write_word);
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
pbuf += 4;
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
}
|
||||
else {
|
||||
while (len >= 4) {
|
||||
//Write word
|
||||
HAL_WRITE32(SPI_FLASH_BASE, address, (u32)*((u32 *)pbuf));
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
pbuf += 4;
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
}
|
||||
|
||||
if (len > 0) {
|
||||
write_word = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
ptr = (uint8_t*)&write_word;
|
||||
for (i=0;i<len;i++) {
|
||||
*(ptr+i) = *pbuf;
|
||||
pbuf++;
|
||||
}
|
||||
//Write word
|
||||
HAL_WRITE32(SPI_FLASH_BASE, address, write_word);
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
}
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Function Description:
|
||||
This function performans the same functionality as the function flash_stream_write.
|
||||
It enhances write performance by reducing overheads.
|
||||
Users can use either of functions depending on their needs.
|
||||
|
||||
* @brief Write a stream of data to specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be read.
|
||||
* @param Length: Specifies the length of the data to write.
|
||||
* @param data: Specified the pointer of the data to be written.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
|
||||
*/
|
||||
|
||||
int flash_burst_write(flash_t *obj, uint32_t address ,uint32_t Length, uint8_t * data)
|
||||
{
|
||||
|
||||
u32 OccuSize;
|
||||
u32 ProgramSize;
|
||||
u32 PageSize;
|
||||
u8 flashtype = 0;
|
||||
|
||||
PageSize = 256;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
flashtype = flashobj.SpicInitPara.flashtype;
|
||||
|
||||
OccuSize = address & 0xFF;
|
||||
if((Length >= PageSize) ||((Length + OccuSize) >= PageSize))
|
||||
ProgramSize = PageSize - OccuSize;
|
||||
else
|
||||
ProgramSize = Length;
|
||||
|
||||
flashobj.Length = Length;
|
||||
while(Length > 0){
|
||||
if(OccuSize){
|
||||
SpicUserProgramRtl8195A(data, flashobj.SpicInitPara, address, &(flashobj.Length));
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
address += ProgramSize;
|
||||
data+= ProgramSize;
|
||||
Length -= ProgramSize;
|
||||
OccuSize = 0;
|
||||
}
|
||||
else{
|
||||
while((flashobj.Length) >= PageSize){
|
||||
SpicUserProgramRtl8195A(data, flashobj.SpicInitPara, address, &(flashobj.Length));
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
address += PageSize;
|
||||
data+=PageSize;
|
||||
Length -= PageSize;
|
||||
}
|
||||
flashobj.Length = Length;
|
||||
if((flashobj.Length) > 0){
|
||||
SpicUserProgramRtl8195A(data, flashobj.SpicInitPara, address, &(flashobj.Length));
|
||||
// Wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// Wait flash busy done (wip=0)
|
||||
if(flashtype == FLASH_MICRON){
|
||||
SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara);
|
||||
}
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
flashobj.Length = Length;
|
||||
}
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief Read a stream of data from specified address
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param address: Specifies the address to be read.
|
||||
* @param len: Specifies the length of the data to read.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
|
||||
int flash_burst_read(flash_t *obj, uint32_t address, uint32_t Length, uint8_t * data)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
// Wait flash busy done (wip=0)
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
SpicUserReadRtl8195A(Length, address, data,SpicOneBitMode);
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
int flash_get_status(flash_t *obj)
|
||||
{
|
||||
u8 Status = 0;
|
||||
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
Status = SpicGetFlashStatusRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return Status;
|
||||
}
|
||||
|
||||
/*
|
||||
Function Description:
|
||||
Please refer to the datatsheet of flash for more details of the content of status register.
|
||||
The block protected area and the corresponding control bits are provided in the flash datasheet.
|
||||
|
||||
* @brief Set Status register to enable desired operation
|
||||
* @param obj: Specifies the parameter of flash object.
|
||||
* @param data: Specifies which bit users like to set
|
||||
ex: if users want to set the third bit, data = 0x8.
|
||||
|
||||
*/
|
||||
int flash_set_status(flash_t *obj, uint32_t data)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
SpicSetFlashStatusRefinedRtl8195A(data, flashobj.SpicInitPara);
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
DBG_8195A("Status Register After Setting= %x\n", flash_get_status(&flashobj));
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
Function Description:
|
||||
This function aims to reset the status register, please make sure the operation is appropriate.
|
||||
*/
|
||||
void flash_reset_status(flash_t *obj)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
SpicSetFlashStatusRefinedRtl8195A(0, flashobj.SpicInitPara);
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
SpicDisableRtl8195A();
|
||||
}
|
||||
/*
|
||||
Function Description:
|
||||
This function is only for Micron 512Mbit flash to access beyond 128Mbit by switching between four 128 Mbit area.
|
||||
Please refer to flash datasheet for more information about memory mapping.
|
||||
*/
|
||||
|
||||
int flash_set_extend_addr(flash_t *obj, uint32_t data)
|
||||
{
|
||||
flash_turnon();
|
||||
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
|
||||
SpicSetExtendAddrRtl8195A(data, flashobj.SpicInitPara);
|
||||
SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara);
|
||||
DBG_8195A("Extended Address Register After Setting= %x\n", flash_get_extend_addr(&flashobj));
|
||||
SpicDisableRtl8195A();
|
||||
return 1;
|
||||
}
|
||||
|
||||
int flash_get_extend_addr(flash_t *obj)
|
||||
{
|
||||
u8 Status = 0;
|
||||
|
||||
flash_turnon();
|
||||
if(isinit == 0)
|
||||
flash_init(&flashobj);
|
||||
Status = SpicGetExtendAddrRtl8195A(flashobj.SpicInitPara);
|
||||
|
||||
SpicDisableRtl8195A();
|
||||
return Status;
|
||||
|
||||
}
|
||||
|
||||
|
||||
241
component/common/mbed/targets/hal/rtl8195a/gpio_api.c
Normal file
241
component/common/mbed/targets/hal/rtl8195a/gpio_api.c
Normal file
|
|
@ -0,0 +1,241 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#if CONFIG_GPIO_EN
|
||||
|
||||
#include "gpio_api.h"
|
||||
|
||||
// convert Mbed pin mode to HAL Pin Mode
|
||||
const u8 GPIO_InPinMode[] = {
|
||||
DIN_PULL_NONE, // PullNone
|
||||
DIN_PULL_HIGH, // PullUp
|
||||
DIN_PULL_LOW, // PullDown
|
||||
DIN_PULL_NONE // OpenDrain
|
||||
};
|
||||
|
||||
const u8 GPIO_SWPORT_DR_TBL[] = {
|
||||
GPIO_PORTA_DR,
|
||||
GPIO_PORTB_DR,
|
||||
GPIO_PORTC_DR
|
||||
};
|
||||
|
||||
const u8 GPIO_EXT_PORT_TBL[] = {
|
||||
GPIO_EXT_PORTA,
|
||||
GPIO_EXT_PORTB,
|
||||
GPIO_EXT_PORTC
|
||||
};
|
||||
|
||||
const u8 GPIO_SWPORT_DDR_TBL[] = {
|
||||
GPIO_PORTA_DDR,
|
||||
GPIO_PORTB_DDR,
|
||||
GPIO_PORTC_DDR
|
||||
};
|
||||
|
||||
#if 0
|
||||
void gpio_set_hal_pin_mode(gpio_t *obj)
|
||||
{
|
||||
if (obj->direction == PIN_OUTPUT) {
|
||||
switch (obj->mode) {
|
||||
case PullNone:
|
||||
case PullDown:
|
||||
case PullUp:
|
||||
obj->hal_pin.pin_mode = DOUT_PUSH_PULL;
|
||||
break;
|
||||
|
||||
case OpenDrain:
|
||||
obj->hal_pin.pin_mode = DOUT_OPEN_DRAIN;
|
||||
break;
|
||||
|
||||
default:
|
||||
obj->hal_pin.pin_mode = DOUT_PUSH_PULL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else {
|
||||
switch (obj->mode) {
|
||||
case PullNone:
|
||||
case OpenDrain:
|
||||
obj->hal_pin.pin_mode = DIN_PULL_NONE;
|
||||
break;
|
||||
|
||||
case PullDown:
|
||||
obj->hal_pin.pin_mode = DIN_PULL_LOW;
|
||||
break;
|
||||
|
||||
case PullUp:
|
||||
obj->hal_pin.pin_mode = DIN_PULL_HIGH;
|
||||
break;
|
||||
|
||||
default:
|
||||
obj->hal_pin.pin_mode = DIN_PULL_NONE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
void gpio_set_hal_pin_mode(gpio_t *obj)
|
||||
{
|
||||
uint32_t mode;
|
||||
|
||||
mode = obj->mode;
|
||||
if (obj->direction == PIN_OUTPUT) {
|
||||
if (mode == OpenDrain) {
|
||||
obj->hal_pin.pin_mode = DOUT_OPEN_DRAIN;
|
||||
} else {
|
||||
obj->hal_pin.pin_mode = DOUT_PUSH_PULL;
|
||||
}
|
||||
} else {
|
||||
if (mode < 4) {
|
||||
obj->hal_pin.pin_mode = GPIO_InPinMode[mode];
|
||||
} else {
|
||||
obj->hal_pin.pin_mode = DIN_PULL_NONE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t gpio_set(PinName pin)
|
||||
{
|
||||
u32 ip_pin;
|
||||
|
||||
//MBED_ASSERT(pin != (PinName)NC);
|
||||
DBG_ASSERT(pin != (PinName)NC);
|
||||
pin_function(pin, 0);
|
||||
ip_pin = HAL_GPIO_GetPinName((u32)pin);
|
||||
|
||||
return ip_pin;
|
||||
}
|
||||
|
||||
void gpio_init(gpio_t *obj, PinName pin)
|
||||
{
|
||||
uint32_t pin_name;
|
||||
|
||||
if (pin == (PinName)NC)
|
||||
return;
|
||||
|
||||
obj->pin = pin;
|
||||
obj->mode = PullNone;
|
||||
obj->direction = PIN_INPUT;
|
||||
pin_name = gpio_set(pin); // get the IP pin name
|
||||
obj->hal_pin.pin_name = pin_name;
|
||||
obj->hal_pin.pin_mode = DIN_PULL_NONE;
|
||||
obj->hal_port_num = HAL_GPIO_GET_PORT_BY_NAME(pin_name);
|
||||
obj->hal_pin_num = HAL_GPIO_GET_PIN_BY_NAME(pin_name);
|
||||
HAL_GPIO_Init(&obj->hal_pin);
|
||||
}
|
||||
|
||||
void gpio_mode(gpio_t *obj, PinMode mode)
|
||||
{
|
||||
obj->mode = mode;
|
||||
gpio_set_hal_pin_mode(obj);
|
||||
HAL_GPIO_Init(&obj->hal_pin);
|
||||
}
|
||||
|
||||
// Initial the Pin direction
|
||||
void gpio_dir(gpio_t *obj, PinDirection direction) {
|
||||
// DBG_ASSERT(obj->pin != (PinName)NC);
|
||||
obj->direction = direction;
|
||||
gpio_set_hal_pin_mode(obj);
|
||||
HAL_GPIO_Init(&obj->hal_pin);
|
||||
}
|
||||
|
||||
// Change the pin direction directly
|
||||
void gpio_change_dir(gpio_t *obj, PinDirection direction) {
|
||||
uint32_t reg_value;
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
|
||||
obj->direction = direction;
|
||||
gpio_set_hal_pin_mode(obj);
|
||||
port_num = obj->hal_port_num;
|
||||
pin_num = obj->hal_pin_num;
|
||||
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_SWPORT_DDR_TBL[port_num]);
|
||||
if (direction) {
|
||||
// Out
|
||||
reg_value |= (1 << pin_num);
|
||||
} else {
|
||||
// In
|
||||
reg_value &= ~(1 << pin_num);
|
||||
}
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_SWPORT_DDR_TBL[port_num], reg_value);
|
||||
}
|
||||
|
||||
void gpio_write(gpio_t *obj, int value)
|
||||
{
|
||||
HAL_GPIO_PIN *hal_pin=&obj->hal_pin;
|
||||
volatile uint32_t reg_value;
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
|
||||
if (hal_pin->pin_mode != DOUT_OPEN_DRAIN) {
|
||||
port_num = obj->hal_port_num;
|
||||
pin_num = obj->hal_pin_num;
|
||||
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[port_num]);
|
||||
reg_value &= ~(1 << pin_num);
|
||||
reg_value |= ((value&0x01)<< pin_num);
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[port_num], reg_value);
|
||||
} else {
|
||||
HAL_GPIO_WritePin(&obj->hal_pin, value);
|
||||
}
|
||||
}
|
||||
|
||||
int gpio_read(gpio_t *obj) {
|
||||
volatile uint32_t reg_value;
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
// HAL_GPIO_PIN_STATE pin_status;
|
||||
HAL_GPIO_PIN_MODE pin_mode;
|
||||
|
||||
port_num = obj->hal_port_num;
|
||||
pin_num = obj->hal_pin_num;
|
||||
pin_mode = obj->hal_pin.pin_mode;
|
||||
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_EXT_PORT_TBL[port_num]);
|
||||
if (pin_mode != DOUT_OPEN_DRAIN) {
|
||||
return ((reg_value >> pin_num) & 0x01);
|
||||
} else {
|
||||
return (!((reg_value >> pin_num) & 0x01));
|
||||
}
|
||||
|
||||
// return pin_status;
|
||||
}
|
||||
|
||||
// This API only works for non-Open-Drain pin
|
||||
void gpio_direct_write(gpio_t *obj, BOOL value)
|
||||
{
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
uint32_t reg_value;
|
||||
|
||||
port_num = obj->hal_port_num;
|
||||
pin_num = obj->hal_pin_num;
|
||||
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[port_num]);
|
||||
reg_value &= ~(1 << pin_num);
|
||||
reg_value |= (value<< pin_num);
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[port_num], reg_value);
|
||||
}
|
||||
|
||||
void gpio_pull_ctrl(gpio_t *obj, PinMode pull_type)
|
||||
{
|
||||
// obj->mode = pull_type;
|
||||
// gpio_set_hal_pin_mode(obj);
|
||||
HAL_GPIO_PullCtrl((u32) obj->pin, (u32)pull_type);
|
||||
}
|
||||
|
||||
|
||||
void gpio_deinit(gpio_t *obj) {
|
||||
HAL_GPIO_DeInit(&obj->hal_pin);
|
||||
}
|
||||
|
||||
#endif
|
||||
145
component/common/mbed/targets/hal/rtl8195a/gpio_irq_api.c
Normal file
145
component/common/mbed/targets/hal/rtl8195a/gpio_irq_api.c
Normal file
|
|
@ -0,0 +1,145 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
//static uint32_t channel_ids[32] = {0};
|
||||
|
||||
//static gpio_irq_handler irq_handler;
|
||||
|
||||
#if CONFIG_GPIO_EN
|
||||
#include "gpio_irq_api.h"
|
||||
#include "gpio_irq_ex_api.h"
|
||||
|
||||
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
|
||||
{
|
||||
uint32_t pin_name;
|
||||
|
||||
if (pin == NC) return -1;
|
||||
|
||||
obj->pin = pin;
|
||||
pin_name = HAL_GPIO_GetPinName((u32)pin);; // get the IP pin name
|
||||
obj->hal_pin.pin_name = pin_name;
|
||||
obj->hal_pin.pin_mode = INT_FALLING; // default use Falling trigger
|
||||
obj->hal_port_num = HAL_GPIO_GET_PORT_BY_NAME(pin_name);
|
||||
obj->hal_pin_num = HAL_GPIO_GET_PIN_BY_NAME(pin_name);
|
||||
HAL_GPIO_Irq_Init(&obj->hal_pin);
|
||||
HAL_GPIO_UserRegIrq(&obj->hal_pin, (VOID*) handler, (VOID*) id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void gpio_irq_free(gpio_irq_t *obj)
|
||||
{
|
||||
HAL_GPIO_UserUnRegIrq(&obj->hal_pin);
|
||||
HAL_GPIO_DeInit(&obj->hal_pin);
|
||||
}
|
||||
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
||||
{
|
||||
switch((uint32_t)event) {
|
||||
case IRQ_RISE:
|
||||
obj->hal_pin.pin_mode = INT_RISING;
|
||||
break;
|
||||
|
||||
case IRQ_FALL:
|
||||
obj->hal_pin.pin_mode = INT_FALLING;
|
||||
break;
|
||||
|
||||
case IRQ_LOW:
|
||||
obj->hal_pin.pin_mode = INT_LOW;
|
||||
break;
|
||||
|
||||
case IRQ_HIGH:
|
||||
obj->hal_pin.pin_mode = INT_HIGH;
|
||||
break;
|
||||
|
||||
case IRQ_NONE:
|
||||
// ?
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
// HAL_GPIO_Irq_Init(&obj->hal_pin);
|
||||
HAL_GPIO_Init_8195a(&obj->hal_pin);
|
||||
|
||||
HAL_GPIO_IntCtrl(&obj->hal_pin, enable);
|
||||
}
|
||||
|
||||
void gpio_irq_enable(gpio_irq_t *obj)
|
||||
{
|
||||
HAL_GPIO_UnMaskIrq(&obj->hal_pin);
|
||||
}
|
||||
|
||||
void gpio_irq_disable(gpio_irq_t *obj)
|
||||
{
|
||||
HAL_GPIO_MaskIrq(&obj->hal_pin);
|
||||
}
|
||||
|
||||
void gpio_irq_deinit(gpio_irq_t *obj)
|
||||
{
|
||||
HAL_GPIO_DeInit(&obj->hal_pin);
|
||||
}
|
||||
|
||||
void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type)
|
||||
{
|
||||
HAL_GPIO_PullCtrl((u32) obj->pin, (u32)pull_type);
|
||||
}
|
||||
|
||||
void gpio_irq_set_event(gpio_irq_t *obj, gpio_irq_event event)
|
||||
{
|
||||
uint32_t reg_value;
|
||||
uint32_t level_edge;
|
||||
uint32_t polarity;
|
||||
uint8_t pin_num;
|
||||
|
||||
pin_num = obj->hal_pin_num & 0x1f; // Max 31
|
||||
|
||||
switch (event) {
|
||||
case IRQ_LOW:
|
||||
level_edge = 0; // level trigger
|
||||
polarity = 0; // active low
|
||||
break;
|
||||
|
||||
case IRQ_HIGH:
|
||||
level_edge = 0; // level trigger
|
||||
polarity = 1; // active high
|
||||
break;
|
||||
|
||||
case IRQ_FALL:
|
||||
level_edge = 1; // edge trigger
|
||||
polarity = 0; // active low
|
||||
break;
|
||||
|
||||
case IRQ_RISE:
|
||||
level_edge = 1; // edge trigger
|
||||
polarity = 1; // active high
|
||||
break;
|
||||
|
||||
default:
|
||||
DBG_GPIO_ERR("Unknow Interrupt Trigger Type(%d)\n", event);
|
||||
return;
|
||||
}
|
||||
|
||||
// Config Level or Edge trigger
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_TYPE);
|
||||
reg_value &= ~(1 << pin_num);
|
||||
reg_value |= (level_edge << pin_num);
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_TYPE, reg_value);
|
||||
|
||||
// Config Low active or Gigh active
|
||||
reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_POLARITY);
|
||||
reg_value &= ~(1 << pin_num);
|
||||
reg_value |= (polarity << pin_num);
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_POLARITY, reg_value);
|
||||
}
|
||||
|
||||
#endif
|
||||
39
component/common/mbed/targets/hal/rtl8195a/gpio_object.h
Normal file
39
component/common/mbed/targets/hal/rtl8195a/gpio_object.h
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_GPIO_OBJECT_H
|
||||
#define MBED_GPIO_OBJECT_H
|
||||
|
||||
#include "mbed_assert.h"
|
||||
|
||||
#include "basic_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
PinName pin;
|
||||
uint32_t mask;
|
||||
|
||||
uint32_t reg_out_offset;
|
||||
uint32_t reg_dir_offset;
|
||||
} gpio_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
816
component/common/mbed/targets/hal/rtl8195a/i2c_api.c
Normal file
816
component/common/mbed/targets/hal/rtl8195a/i2c_api.c
Normal file
|
|
@ -0,0 +1,816 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
//#include "mbed_assert.h"
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
//#include <osdep_api.h>
|
||||
#include "hal_i2c.h"
|
||||
#include "i2c_api.h"
|
||||
#include "ex_api.h"
|
||||
|
||||
|
||||
#if CONFIG_I2C_EN
|
||||
|
||||
//#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
|
||||
static const PinMap PinMap_I2C_SDA[] = {
|
||||
{PD_4, RTL_PIN_PERI(I2C0, 0, S0), RTL_PIN_FUNC(I2C0, S0)},
|
||||
{PH_1, RTL_PIN_PERI(I2C0, 0, S1), RTL_PIN_FUNC(I2C0, S1)},
|
||||
{PC_8, RTL_PIN_PERI(I2C0, 0, S2), RTL_PIN_FUNC(I2C0, S2)},
|
||||
{PE_7, RTL_PIN_PERI(I2C0, 0, S3), RTL_PIN_FUNC(I2C0, S3)},
|
||||
|
||||
{PC_4, RTL_PIN_PERI(I2C1, 1, S0), RTL_PIN_FUNC(I2C1, S0)},
|
||||
{PH_3, RTL_PIN_PERI(I2C1, 1, S1), RTL_PIN_FUNC(I2C1, S1)},
|
||||
{PD_7, RTL_PIN_PERI(I2C1, 1, S2), RTL_PIN_FUNC(I2C1, S2)},
|
||||
|
||||
{PB_7, RTL_PIN_PERI(I2C2, 2, S0), RTL_PIN_FUNC(I2C2, S0)},
|
||||
{PE_1, RTL_PIN_PERI(I2C2, 2, S1), RTL_PIN_FUNC(I2C2, S1)},
|
||||
{PC_7, RTL_PIN_PERI(I2C2, 2, S2), RTL_PIN_FUNC(I2C2, S2)},
|
||||
|
||||
{PB_3, RTL_PIN_PERI(I2C3, 3, S0), RTL_PIN_FUNC(I2C3, S0)},
|
||||
{PE_3, RTL_PIN_PERI(I2C3, 3, S1), RTL_PIN_FUNC(I2C3, S1)},
|
||||
{PE_5, RTL_PIN_PERI(I2C3, 3, S2), RTL_PIN_FUNC(I2C3, S2)},
|
||||
{PD_9, RTL_PIN_PERI(I2C3, 3, S3), RTL_PIN_FUNC(I2C3, S3)},
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2C_SCL[] = {
|
||||
{PD_5, RTL_PIN_PERI(I2C0, 0, S0), RTL_PIN_FUNC(I2C0, S0)},
|
||||
{PH_0, RTL_PIN_PERI(I2C0, 0, S1), RTL_PIN_FUNC(I2C0, S1)},
|
||||
{PC_9, RTL_PIN_PERI(I2C0, 0, S2), RTL_PIN_FUNC(I2C0, S2)},
|
||||
{PE_6, RTL_PIN_PERI(I2C0, 0, S3), RTL_PIN_FUNC(I2C0, S3)},
|
||||
|
||||
{PC_5, RTL_PIN_PERI(I2C1, 1, S0), RTL_PIN_FUNC(I2C1, S0)},
|
||||
{PH_2, RTL_PIN_PERI(I2C1, 1, S1), RTL_PIN_FUNC(I2C1, S1)},
|
||||
{PD_6, RTL_PIN_PERI(I2C1, 1, S2), RTL_PIN_FUNC(I2C1, S2)},
|
||||
|
||||
{PB_6, RTL_PIN_PERI(I2C2, 2, S0), RTL_PIN_FUNC(I2C2, S0)},
|
||||
{PE_0, RTL_PIN_PERI(I2C2, 2, S1), RTL_PIN_FUNC(I2C2, S1)},
|
||||
{PC_6, RTL_PIN_PERI(I2C2, 2, S2), RTL_PIN_FUNC(I2C2, S2)},
|
||||
|
||||
{PB_2, RTL_PIN_PERI(I2C3, 3, S0), RTL_PIN_FUNC(I2C3, S0)},
|
||||
{PE_2, RTL_PIN_PERI(I2C3, 3, S1), RTL_PIN_FUNC(I2C3, S1)},
|
||||
{PE_4, RTL_PIN_PERI(I2C3, 3, S2), RTL_PIN_FUNC(I2C3, S2)},
|
||||
{PD_8, RTL_PIN_PERI(I2C3, 3, S3), RTL_PIN_FUNC(I2C3, S3)},
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static uint16_t i2c_target_addr[4];
|
||||
static SAL_I2C_TRANSFER_BUF i2ctxtranbuf[4];
|
||||
static SAL_I2C_TRANSFER_BUF i2crxtranbuf[4];
|
||||
extern u32 ConfigDebugErr;
|
||||
extern u32 ConfigDebuginfo;
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||
|
||||
uint32_t i2c_sel;
|
||||
uint32_t i2c_idx;
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_USERCB_ADPT pSalI2CUserCBAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
|
||||
// Determine the I2C to use
|
||||
uint32_t i2c_sda = (uint32_t)pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
uint32_t i2c_scl = (uint32_t)pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||
ConfigDebugErr &= (~(_DBG_I2C_|_DBG_GDMA_));
|
||||
ConfigDebugInfo&= (~(_DBG_I2C_|_DBG_GDMA_));
|
||||
i2c_sel = (uint32_t)pinmap_merge(i2c_sda, i2c_scl);
|
||||
i2c_idx = RTL_GET_PERI_IDX(i2c_sel);
|
||||
if (unlikely(i2c_idx == NC)) {
|
||||
DBG_8195A("%s: Cannot find matched UART\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
//DBG_8195A("i2c_sel:%x\n",i2c_sel);
|
||||
//DBG_8195A("i2c_idx:%x\n",i2c_idx);
|
||||
|
||||
/* Get I2C device handler */
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CUserCBAdpt = (PSAL_I2C_USERCB_ADPT)&(obj->SalI2CUserCBAdpt);
|
||||
|
||||
|
||||
|
||||
/*To assign the rest pointers*/
|
||||
pSalI2CMngtAdpt->MstRDCmdCnt = 0;
|
||||
pSalI2CMngtAdpt->InnerTimeOut = 2000; // inner time-out count, 2000 ms
|
||||
pSalI2CMngtAdpt->pSalHndPriv = &(obj->SalI2CHndPriv);
|
||||
pSalI2CMngtAdpt->pSalHndPriv->ppSalI2CHnd = (void**)&(pSalI2CMngtAdpt->pSalHndPriv);
|
||||
|
||||
/* To assign the default (ROM) HAL OP initialization function */
|
||||
#if defined(CONFIG_CHIP_A_CUT) || defined(CONFIG_CHIP_B_CUT) || defined(CONFIG_CHIP_C_CUT)
|
||||
pSalI2CMngtAdpt->pHalOpInit = HalI2COpInit_Patch;
|
||||
#elif defined(CONFIG_CHIP_E_CUT)
|
||||
pSalI2CMngtAdpt->pHalOpInit = HalI2COpInit_V04;
|
||||
#endif
|
||||
/* To assign the default (ROM) HAL GDMA OP initialization function */
|
||||
pSalI2CMngtAdpt->pHalGdmaOpInit = HalGdmaOpInit;
|
||||
|
||||
/* To assign the default (ROM) SAL interrupt function */
|
||||
#if defined(CONFIG_CHIP_A_CUT) || defined(CONFIG_CHIP_B_CUT) || defined(CONFIG_CHIP_C_CUT)
|
||||
pSalI2CMngtAdpt->pSalIrqFunc = I2CISRHandle_Patch;
|
||||
#elif defined(CONFIG_CHIP_E_CUT)
|
||||
pSalI2CMngtAdpt->pSalIrqFunc = I2CISRHandle_V04;
|
||||
#endif
|
||||
|
||||
/* To assign the default (ROM) SAL DMA TX interrupt function */
|
||||
pSalI2CMngtAdpt->pSalDMATxIrqFunc = I2CTXGDMAISRHandle;
|
||||
|
||||
/* To assign the default (ROM) SAL DMA RX interrupt function */
|
||||
pSalI2CMngtAdpt->pSalDMARxIrqFunc = I2CRXGDMAISRHandle;
|
||||
|
||||
pSalI2CMngtAdpt->pHalInitDat = &(obj->HalI2CInitData);
|
||||
pSalI2CMngtAdpt->pHalOp = &(obj->HalI2COp);
|
||||
pSalI2CMngtAdpt->pIrqHnd = &(obj->I2CIrqHandleDat);
|
||||
pSalI2CMngtAdpt->pHalTxGdmaAdp = &(obj->HalI2CTxGdmaAdpt);
|
||||
pSalI2CMngtAdpt->pHalRxGdmaAdp = &(obj->HalI2CRxGdmaAdpt);
|
||||
pSalI2CMngtAdpt->pHalGdmaOp = &(obj->HalI2CGdmaOp);
|
||||
pSalI2CMngtAdpt->pIrqTxGdmaHnd = &(obj->I2CTxGdmaIrqHandleDat);
|
||||
pSalI2CMngtAdpt->pIrqRxGdmaHnd = &(obj->I2CRxGdmaIrqHandleDat);
|
||||
pSalI2CMngtAdpt->pUserCB = &(obj->SalI2CUserCB);
|
||||
pSalI2CMngtAdpt->pDMAConf = &(obj->SalI2CDmaUserDef);
|
||||
|
||||
/* Assign the private SAL handle to public SAL handle */
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
/* Assign the internal HAL initial data pointer to the SAL handle */
|
||||
pSalI2CHND->pInitDat = pSalI2CMngtAdpt->pHalInitDat;
|
||||
|
||||
/* Assign the internal user callback pointer to the SAL handle */
|
||||
pSalI2CHND->pUserCB = pSalI2CMngtAdpt->pUserCB;
|
||||
|
||||
/* Assign the internal user define DMA configuration to the SAL handle */
|
||||
pSalI2CHND->pDMAConf = pSalI2CMngtAdpt->pDMAConf;
|
||||
|
||||
/*To assign user callback pointers*/
|
||||
pSalI2CMngtAdpt->pUserCB->pTXCB = pSalI2CUserCBAdpt;
|
||||
pSalI2CMngtAdpt->pUserCB->pTXCCB = (pSalI2CUserCBAdpt+1);
|
||||
pSalI2CMngtAdpt->pUserCB->pRXCB = (pSalI2CUserCBAdpt+2);
|
||||
pSalI2CMngtAdpt->pUserCB->pRXCCB = (pSalI2CUserCBAdpt+3);
|
||||
pSalI2CMngtAdpt->pUserCB->pRDREQCB = (pSalI2CUserCBAdpt+4);
|
||||
pSalI2CMngtAdpt->pUserCB->pERRCB = (pSalI2CUserCBAdpt+5);
|
||||
pSalI2CMngtAdpt->pUserCB->pDMATXCB = (pSalI2CUserCBAdpt+6);
|
||||
pSalI2CMngtAdpt->pUserCB->pDMATXCCB = (pSalI2CUserCBAdpt+7);
|
||||
pSalI2CMngtAdpt->pUserCB->pDMARXCB = (pSalI2CUserCBAdpt+8);
|
||||
pSalI2CMngtAdpt->pUserCB->pDMARXCCB = (pSalI2CUserCBAdpt+9);
|
||||
pSalI2CMngtAdpt->pUserCB->pGENCALLCB= (pSalI2CUserCBAdpt+10);
|
||||
|
||||
/* Set I2C Device Number */
|
||||
pSalI2CHND->DevNum = i2c_idx;
|
||||
|
||||
/* Load I2C default value */
|
||||
RtkI2CLoadDefault(pSalI2CHND);
|
||||
|
||||
/* Assign I2C Pin Mux */
|
||||
pSalI2CHND->PinMux = RTL_GET_PERI_SEL(i2c_sel);
|
||||
pSalI2CHND->OpType = I2C_INTR_TYPE;
|
||||
pSalI2CHND->I2CMaster = I2C_MASTER_MODE;
|
||||
pSalI2CHND->I2CSpdMod = I2C_SS_MODE;
|
||||
pSalI2CHND->I2CClk = 100;
|
||||
pSalI2CHND->I2CAckAddr = 0;
|
||||
pSalI2CHND->TimeOut = 300;
|
||||
pSalI2CHND->AddRtyTimeOut = 3000;
|
||||
//pSalI2CHND->I2CExd |= (I2C_EXD_MTR_ADDR_RTY);
|
||||
|
||||
pSalI2CMngtAdpt->InnerTimeOut = pSalI2CHND->TimeOut;
|
||||
|
||||
/* for 10-bit mode */
|
||||
//pSalI2CHND->I2CAddrMod = I2C_ADDR_10BIT;
|
||||
|
||||
/* Deinit I2C first */
|
||||
//i2c_reset(obj);
|
||||
|
||||
/* Init I2C now */
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = i2c_target_addr[pSalI2CHND->DevNum];
|
||||
HalI2CSetTarRtl8195a(pSalI2CHND->pInitDat);
|
||||
HalI2CSetSarRtl8195a(pSalI2CHND->pInitDat);
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
}
|
||||
|
||||
void i2c_frequency(i2c_t *obj, int hz) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
uint16_t i2c_default_clk = (uint16_t) pSalI2CHND->I2CClk;
|
||||
uint16_t i2c_user_clk = (uint16_t) (hz/1000);
|
||||
|
||||
|
||||
|
||||
if (i2c_default_clk != i2c_user_clk) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
if (i2c_user_clk <= 100) {
|
||||
pSalI2CHND->I2CSpdMod = I2C_SS_MODE;
|
||||
}
|
||||
else if ((i2c_user_clk > 100) && (i2c_user_clk <= 400)) {
|
||||
pSalI2CHND->I2CSpdMod = I2C_FS_MODE;
|
||||
}
|
||||
else if (i2c_user_clk > 400) {
|
||||
pSalI2CHND->I2CSpdMod = I2C_HS_MODE;
|
||||
}
|
||||
else {
|
||||
pSalI2CHND->I2CSpdMod = I2C_SS_MODE;
|
||||
}
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
pSalI2CHND->I2CClk = i2c_user_clk;
|
||||
|
||||
/* Init I2C now */
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = i2c_target_addr[pSalI2CHND->DevNum];
|
||||
HalI2CSetTarRtl8195a(pSalI2CHND->pInitDat);
|
||||
HalI2CSetSarRtl8195a(pSalI2CHND->pInitDat);
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
}
|
||||
}
|
||||
|
||||
inline int i2c_start(i2c_t *obj) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
inline int i2c_stop(i2c_t *obj) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern u32
|
||||
HalDelayUs(
|
||||
IN u32 us
|
||||
);
|
||||
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
u32 I2CInTOTcnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
u32 InStartCount = 0;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
if (i2c_target_addr[pSalI2CHND->DevNum] != address) {
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = address;
|
||||
i2c_target_addr[pSalI2CHND->DevNum] = address;
|
||||
HalI2CSetTarRtl8195a(pSalI2CHND->pInitDat);
|
||||
#if 0
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[pSalI2CHND->DevNum] = address;
|
||||
pSalI2CHND->I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Check if the it's the last byte or not */
|
||||
pSalI2CHND->I2CExd &= (~I2C_EXD_MTR_HOLD_BUS);
|
||||
if (!stop) {
|
||||
pSalI2CHND->I2CExd |= I2C_EXD_MTR_HOLD_BUS;
|
||||
}
|
||||
|
||||
pSalI2CHND->pRXBuf = &i2crxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pRXBuf->DataLen = length;
|
||||
pSalI2CHND->pRXBuf->TargetAddr= address;//pSalI2CHND->I2CAckAddr;
|
||||
pSalI2CHND->pRXBuf->RegAddr = 0;
|
||||
pSalI2CHND->pRXBuf->pDataBuf = (u8 *)data;
|
||||
|
||||
if (RtkI2CReceive(pSalI2CHND) != HAL_OK) {
|
||||
length = length - pSalI2CHND->pRXBuf->DataLen;
|
||||
return ((int)length);
|
||||
}
|
||||
else {
|
||||
//DBG_8195A(">\n");
|
||||
/* Calculate user time out parameters */
|
||||
I2CInTOTcnt = 300;
|
||||
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
|
||||
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
|
||||
InStartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
}
|
||||
while((pSalI2CHND->DevSts != I2C_STS_IDLE) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_ERROR) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_TIMEOUT)) {
|
||||
/* Time-Out check */
|
||||
if (InTimeoutCount > 0) {
|
||||
if (HAL_TIMEOUT == I2CIsTimeout(InStartCount, InTimeoutCount)) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO;
|
||||
|
||||
/* DeInit I2C, Init I2C */
|
||||
//RtkI2CDeInit(pSalI2CHND);
|
||||
//HalDelayUs(1000);
|
||||
//RtkI2CInit(pSalI2CHND);
|
||||
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (I2CInTOTcnt == 0) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO;
|
||||
/* DeInit I2C, Init I2C */
|
||||
//RtkI2CDeInit(pSalI2CHND);
|
||||
|
||||
//RtkI2CInit(pSalI2CHND);
|
||||
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
}
|
||||
//DBG_8195A("<\n");
|
||||
if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT)
|
||||
return ((int)(length - pSalI2CHND->pRXBuf->DataLen));
|
||||
else
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
u32 I2CInTOTcnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
u32 InStartCount = 0;
|
||||
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
if (i2c_target_addr[pSalI2CHND->DevNum] != address) {
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = address;
|
||||
i2c_target_addr[pSalI2CHND->DevNum] = address;
|
||||
HalI2CSetTarRtl8195a(pSalI2CHND->pInitDat);
|
||||
#if 0
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[pSalI2CHND->DevNum] = address;
|
||||
pSalI2CHND->I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Check if the it's the last byte or not */
|
||||
pSalI2CHND->I2CExd &= (~I2C_EXD_MTR_HOLD_BUS);
|
||||
if (!stop) {
|
||||
pSalI2CHND->I2CExd |= I2C_EXD_MTR_HOLD_BUS;
|
||||
}
|
||||
|
||||
pSalI2CHND->pTXBuf = &i2ctxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pTXBuf->DataLen = length;
|
||||
pSalI2CHND->pTXBuf->TargetAddr= address;//pSalI2CHND->I2CAckAddr;
|
||||
pSalI2CHND->pTXBuf->RegAddr = 0;
|
||||
pSalI2CHND->pTXBuf->pDataBuf = (u8 *)data;
|
||||
|
||||
if (RtkI2CSend(pSalI2CHND) != HAL_OK) {
|
||||
length = length - pSalI2CHND->pTXBuf->DataLen;
|
||||
return ((int)length);
|
||||
}
|
||||
else {
|
||||
//DBG_8195A("(\n");
|
||||
/* Calculate user time out parameters */
|
||||
I2CInTOTcnt = 300;
|
||||
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
|
||||
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
|
||||
InStartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
}
|
||||
while((pSalI2CHND->DevSts != I2C_STS_IDLE) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_ERROR) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_TIMEOUT)) {
|
||||
/* Time-Out check */
|
||||
if (InTimeoutCount > 0) {
|
||||
if (HAL_TIMEOUT == I2CIsTimeout(InStartCount, InTimeoutCount)) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_TX_ADD_TO;
|
||||
/* DeInit I2C, Init I2C */
|
||||
//RtkI2CDeInit(pSalI2CHND);
|
||||
|
||||
//RtkI2CInit(pSalI2CHND);
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (I2CInTOTcnt == 0) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_TX_ADD_TO;
|
||||
/* DeInit I2C, Init I2C */
|
||||
//RtkI2CDeInit(pSalI2CHND);
|
||||
|
||||
//RtkI2CInit(pSalI2CHND);
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT)
|
||||
return ((int)(length - pSalI2CHND->pTXBuf->DataLen));
|
||||
else
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_byte_read(i2c_t *obj, int last) {
|
||||
uint8_t i2cdatlocal;
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
/* Check if the it's the last byte or not */
|
||||
pSalI2CHND->I2CExd &= (~I2C_EXD_MTR_HOLD_BUS);
|
||||
if (!last) {
|
||||
pSalI2CHND->I2CExd |= I2C_EXD_MTR_HOLD_BUS;
|
||||
}
|
||||
|
||||
pSalI2CHND->pRXBuf = &i2crxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pRXBuf->DataLen = 1;
|
||||
pSalI2CHND->pRXBuf->TargetAddr= i2c_target_addr[pSalI2CHND->DevNum];//pSalI2CHND->I2CAckAddr;
|
||||
pSalI2CHND->pRXBuf->RegAddr = 0;
|
||||
pSalI2CHND->pRXBuf->pDataBuf = &i2cdatlocal;
|
||||
RtkI2CReceive(pSalI2CHND);
|
||||
|
||||
return (int)i2cdatlocal;
|
||||
}
|
||||
|
||||
int i2c_byte_write(i2c_t *obj, int data) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
pSalI2CHND->I2CExd &= (~I2C_EXD_MTR_HOLD_BUS);
|
||||
pSalI2CHND->I2CExd |= I2C_EXD_MTR_HOLD_BUS;
|
||||
|
||||
pSalI2CHND->pTXBuf = &i2ctxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pTXBuf->DataLen = 1;
|
||||
pSalI2CHND->pTXBuf->TargetAddr= i2c_target_addr[pSalI2CHND->DevNum];//pSalI2CHND->I2CAckAddr;
|
||||
pSalI2CHND->pTXBuf->RegAddr = 0;
|
||||
pSalI2CHND->pTXBuf->pDataBuf = (unsigned char*)&data;
|
||||
|
||||
if (RtkI2CSend(pSalI2CHND) != HAL_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void i2c_reset(i2c_t *obj) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
/* Deinit I2C directly */
|
||||
RtkI2CDeInitForPS(pSalI2CHND);
|
||||
}
|
||||
|
||||
void i2c_restart_enable(i2c_t *obj) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
uint32_t i2clocaltmp;
|
||||
uint8_t i2cen;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
i2cen = pSalI2CHND->pInitDat->I2CEn;
|
||||
|
||||
if (i2cen == I2C_ENABLE) {
|
||||
pSalI2CHND->pInitDat->I2CEn = I2C_DISABLE;
|
||||
pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat);
|
||||
}
|
||||
|
||||
i2clocaltmp = HalI2CRead32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON);
|
||||
i2clocaltmp |= BIT_IC_CON_IC_RESTART_EN;
|
||||
HalI2CWrite32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON, i2clocaltmp);
|
||||
|
||||
if (i2cen == I2C_ENABLE) {
|
||||
pSalI2CHND->pInitDat->I2CEn = I2C_ENABLE;
|
||||
pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat);
|
||||
}
|
||||
|
||||
pSalI2CHND->pInitDat->I2CReSTR = I2C_ENABLE;
|
||||
|
||||
}
|
||||
|
||||
void i2c_restart_disable(i2c_t *obj) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
uint32_t i2clocaltmp;
|
||||
uint8_t i2cen;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
i2cen = pSalI2CHND->pInitDat->I2CEn;
|
||||
|
||||
if (i2cen == I2C_ENABLE) {
|
||||
pSalI2CHND->pInitDat->I2CEn = I2C_DISABLE;
|
||||
pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat);
|
||||
}
|
||||
|
||||
i2clocaltmp = HalI2CRead32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON);
|
||||
i2clocaltmp &= (~BIT_IC_CON_IC_RESTART_EN);
|
||||
HalI2CWrite32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON, i2clocaltmp);
|
||||
|
||||
if (i2cen == I2C_ENABLE) {
|
||||
pSalI2CHND->pInitDat->I2CEn = I2C_ENABLE;
|
||||
pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat);
|
||||
}
|
||||
|
||||
pSalI2CHND->pInitDat->I2CReSTR = I2C_DISABLE;
|
||||
|
||||
}
|
||||
|
||||
void i2c_set_user_callback(i2c_t *obj, I2CCallback i2ccb, void(*i2c_callback)(void *)) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
if ((i2ccb >= I2C_TX_COMPLETE) && (i2ccb <= I2C_ERR_OCCURRED)) {
|
||||
switch (i2ccb) {
|
||||
case I2C_TX_COMPLETE:
|
||||
pSalI2CHND->pUserCB->pTXCCB->USERCB = i2c_callback;
|
||||
break;
|
||||
case I2C_RX_COMPLETE:
|
||||
pSalI2CHND->pUserCB->pRXCCB->USERCB = i2c_callback;
|
||||
break;
|
||||
case I2C_RD_REQ_COMMAND:
|
||||
pSalI2CHND->pUserCB->pRDREQCB->USERCB = i2c_callback;
|
||||
break;
|
||||
case I2C_ERR_OCCURRED:
|
||||
pSalI2CHND->pUserCB->pERRCB->USERCB = i2c_callback;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void i2c_clear_user_callback(i2c_t *obj, I2CCallback i2ccb) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
if ((i2ccb >= I2C_TX_COMPLETE) && (i2ccb <= I2C_ERR_OCCURRED)) {
|
||||
switch (i2ccb) {
|
||||
case I2C_TX_COMPLETE:
|
||||
pSalI2CHND->pUserCB->pTXCCB = NULL;
|
||||
break;
|
||||
case I2C_RX_COMPLETE:
|
||||
pSalI2CHND->pUserCB->pRXCCB = NULL;
|
||||
break;
|
||||
case I2C_ERR_OCCURRED:
|
||||
pSalI2CHND->pUserCB->pERRCB = NULL;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_enable_control(i2c_t *obj, int enable) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
pSalI2CHND->pInitDat->I2CEn = enable;
|
||||
|
||||
if(pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat) != HAL_OK)
|
||||
return 0; // error
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
#if DEVICE_I2CSLAVE
|
||||
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
uint16_t i2c_default_addr = (uint16_t) pSalI2CHND->I2CAckAddr;
|
||||
uint16_t i2c_user_addr = (uint16_t) address;
|
||||
|
||||
if (i2c_target_addr[pSalI2CHND->DevNum] != i2c_user_addr) {
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = address;
|
||||
i2c_target_addr[pSalI2CHND->DevNum] = address;
|
||||
HalI2CSetSarRtl8195a(pSalI2CHND->pInitDat);
|
||||
#if 0
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
pSalI2CHND->I2CAckAddr = i2c_user_addr;
|
||||
|
||||
/* Init I2C now */
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
pSalI2CHND->I2CMaster = I2C_MASTER_MODE;
|
||||
if (enable_slave)
|
||||
pSalI2CHND->I2CMaster = I2C_SLAVE_MODE;
|
||||
|
||||
/* Init I2C now */
|
||||
RtkI2CInitForPS(pSalI2CHND);
|
||||
|
||||
pSalI2CHND->pInitDat->I2CAckAddr = i2c_target_addr[pSalI2CHND->DevNum];
|
||||
HalI2CSetSarRtl8195a(pSalI2CHND->pInitDat);
|
||||
}
|
||||
|
||||
// See I2CSlave.h
|
||||
#define NoData 0 // the slave has not been addressed
|
||||
#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
|
||||
#define WriteGeneral 2 // the master is writing to all slave
|
||||
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
||||
|
||||
int i2c_slave_receive(i2c_t *obj) {
|
||||
|
||||
int i2cslvrevsts = NoData;
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
i2cslvrevsts = RtkSalI2CSts(pSalI2CHND);
|
||||
return i2cslvrevsts;
|
||||
}
|
||||
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
||||
|
||||
u32 I2CInTOTcnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
u32 InStartCount = 0;
|
||||
|
||||
//uint8_t i2cdatlocal;
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
pSalI2CHND->pRXBuf = &i2crxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pRXBuf->DataLen = length;
|
||||
pSalI2CHND->pRXBuf->pDataBuf = (u8 *)data;
|
||||
|
||||
if (RtkI2CReceive(pSalI2CHND) != HAL_OK) {
|
||||
return 0; //error
|
||||
}
|
||||
else {
|
||||
/* Calculate user time out parameters */
|
||||
I2CInTOTcnt = 300;
|
||||
if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) {
|
||||
InTimeoutCount = (I2CInTOTcnt*1000/TIMER_TICK_US);
|
||||
InStartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
}
|
||||
while((pSalI2CHND->DevSts != I2C_STS_IDLE) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_ERROR) &&
|
||||
(pSalI2CHND->DevSts != I2C_STS_TIMEOUT)) {
|
||||
/* Time-Out check */
|
||||
if (InTimeoutCount > 0) {
|
||||
if (HAL_TIMEOUT == I2CIsTimeout(InStartCount, InTimeoutCount)) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO;
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (I2CInTOTcnt == 0) {
|
||||
pSalI2CHND->DevSts = I2C_STS_TIMEOUT;
|
||||
pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO;
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT)
|
||||
return ((int)(length - pSalI2CHND->pTXBuf->DataLen));
|
||||
else
|
||||
return ((int)(length));
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
|
||||
pSalI2CHND->pTXBuf = &i2ctxtranbuf[pSalI2CHND->DevNum];
|
||||
pSalI2CHND->pTXBuf->DataLen = length;
|
||||
//obj->i2c->pTXBuf->TargetAddr= obj->i2c->I2CAckAddr;
|
||||
//obj->i2c->pTXBuf->RegAddr = 0;
|
||||
pSalI2CHND->pTXBuf->pDataBuf = (u8 *)data;
|
||||
|
||||
if (RtkI2CSend(pSalI2CHND) != HAL_OK) {
|
||||
return 0; //error
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/** \brief Description of i2c_slave_set_for_rd_req
|
||||
*
|
||||
* i2c_slave_set_for_rd_req is used to set/clear i2c slave RD_REQ interrupt mask.
|
||||
* If RD_REQ interrupt is set, slave could invoke read request callback when it gets
|
||||
* a read command from other i2c master.
|
||||
*
|
||||
* \param i2c_t *obj : i2c object
|
||||
* \param int set : set or clear for read request. Once it's set, i2c would invoke read request callback when a
|
||||
* read command is sent to it.
|
||||
* \return result
|
||||
*/
|
||||
int i2c_slave_set_for_rd_req(i2c_t *obj, int set) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
PHAL_I2C_INIT_DAT pHalI2CInitDat = NULL;
|
||||
PHAL_I2C_OP pHalI2COP = NULL;
|
||||
u32 I2CLocalTemp;
|
||||
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
pHalI2CInitDat = pSalI2CMngtAdpt->pHalInitDat;
|
||||
pHalI2COP = pSalI2CMngtAdpt->pHalOp;
|
||||
|
||||
I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_INTR_MASK);
|
||||
|
||||
if (set) {
|
||||
I2CLocalTemp |= BIT_IC_INTR_MASK_M_RD_REQ;
|
||||
} else {
|
||||
I2CLocalTemp &= (~BIT_IC_INTR_MASK_M_RD_REQ);
|
||||
}
|
||||
|
||||
pHalI2CInitDat->I2CIntrMSK = I2CLocalTemp;
|
||||
pHalI2COP->HalI2CIntrCtrl(pHalI2CInitDat);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/** \brief Description of i2c_slave_set_for_data_nak
|
||||
*
|
||||
* i2c_slave_set_for_data_nak is used to set/clear i2c slave NAK or ACK data part in transfer.
|
||||
*
|
||||
* \param i2c_t *obj : i2c object
|
||||
* \param int set : set or clear for data NAK.
|
||||
* \return result
|
||||
*/
|
||||
int i2c_slave_set_for_data_nak(i2c_t *obj, int set_nak) {
|
||||
PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL;
|
||||
PSAL_I2C_HND pSalI2CHND = NULL;
|
||||
PHAL_I2C_INIT_DAT pHalI2CInitDat = NULL;
|
||||
PHAL_I2C_OP pHalI2COP = NULL;
|
||||
u32 I2CLocalTemp;
|
||||
|
||||
pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt);
|
||||
pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv);
|
||||
pHalI2CInitDat = pSalI2CMngtAdpt->pHalInitDat;
|
||||
pHalI2COP = pSalI2CMngtAdpt->pHalOp;
|
||||
I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_STATUS);
|
||||
|
||||
//if (set_nak) {
|
||||
while (BIT_IC_STATUS_SLV_ACTIVITY & I2CLocalTemp) {
|
||||
I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_STATUS);
|
||||
}
|
||||
//}
|
||||
|
||||
HAL_I2C_WRITE32(pSalI2CHND->DevNum, REG_DW_I2C_IC_SLV_DATA_NACK_ONLY, set_nak);
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif // CONFIG_I2C_SLAVE_EN
|
||||
|
||||
#endif // CONFIG_I2C_EN
|
||||
|
||||
246
component/common/mbed/targets/hal/rtl8195a/i2s_api.c
Normal file
246
component/common/mbed/targets/hal/rtl8195a/i2s_api.c
Normal file
|
|
@ -0,0 +1,246 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2015, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "i2s_api.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#if CONFIG_I2S_EN
|
||||
static const PinMap PinMap_I2S_TX[] = {
|
||||
{PE_2, RTL_PIN_PERI(I2S0, 0, S0), RTL_PIN_FUNC(I2S0, S0)},
|
||||
{PH_2, RTL_PIN_PERI(I2S0, 0, S1), RTL_PIN_FUNC(I2S0, S1)},
|
||||
{PD_2, RTL_PIN_PERI(I2S0, 0, S2), RTL_PIN_FUNC(I2S0, S2)},
|
||||
{PC_7, RTL_PIN_PERI(I2S0, 0, S3), RTL_PIN_FUNC(I2S0, S3)},
|
||||
{PC_2, RTL_PIN_PERI(I2S1, 1, S0), RTL_PIN_FUNC(I2S1, S0)},
|
||||
{PD_6, RTL_PIN_PERI(I2S1, 1, S1), RTL_PIN_FUNC(I2S1, S1)},
|
||||
{PE_6, RTL_PIN_PERI(I2S1, 1, S2), RTL_PIN_FUNC(I2S1, S2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2S_RX[] = {
|
||||
{PH_5, RTL_PIN_PERI(I2S0, 0, S1), RTL_PIN_FUNC(I2S0, S1)},
|
||||
{PC_5, RTL_PIN_PERI(I2S0, 0, S3), RTL_PIN_FUNC(I2S0, S3)},
|
||||
{PC_4, RTL_PIN_PERI(I2S1, 1, S0), RTL_PIN_FUNC(I2S1, S0)},
|
||||
{PD_3, RTL_PIN_PERI(I2S1, 1, S1), RTL_PIN_FUNC(I2S1, S1)},
|
||||
{PE_8, RTL_PIN_PERI(I2S1, 1, S2), RTL_PIN_FUNC(I2S1, S1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2S_CLK[] = {
|
||||
{PE_1, RTL_PIN_PERI(I2S0, 0, S0), RTL_PIN_FUNC(I2S0, S0)},
|
||||
{PH_1, RTL_PIN_PERI(I2S0, 0, S1), RTL_PIN_FUNC(I2S0, S1)},
|
||||
{PD_1, RTL_PIN_PERI(I2S0, 0, S2), RTL_PIN_FUNC(I2S0, S2)},
|
||||
{PC_8, RTL_PIN_PERI(I2S0, 0, S3), RTL_PIN_FUNC(I2S0, S3)},
|
||||
{PC_1, RTL_PIN_PERI(I2S1, 1, S0), RTL_PIN_FUNC(I2S1, S0)},
|
||||
{PD_5, RTL_PIN_PERI(I2S1, 1, S1), RTL_PIN_FUNC(I2S1, S1)},
|
||||
{PE_5, RTL_PIN_PERI(I2S1, 1, S2), RTL_PIN_FUNC(I2S1, S2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2S_WS[] = {
|
||||
{PE_0, RTL_PIN_PERI(I2S0, 0, S0), RTL_PIN_FUNC(I2S0, S0)},
|
||||
{PH_0, RTL_PIN_PERI(I2S0, 0, S1), RTL_PIN_FUNC(I2S0, S1)},
|
||||
{PD_0, RTL_PIN_PERI(I2S0, 0, S2), RTL_PIN_FUNC(I2S0, S2)},
|
||||
{PC_9, RTL_PIN_PERI(I2S0, 0, S3), RTL_PIN_FUNC(I2S0, S3)},
|
||||
{PC_0, RTL_PIN_PERI(I2S1, 1, S0), RTL_PIN_FUNC(I2S1, S0)},
|
||||
{PD_4, RTL_PIN_PERI(I2S1, 1, S1), RTL_PIN_FUNC(I2S1, S1)},
|
||||
{PE_4, RTL_PIN_PERI(I2S1, 1, S2), RTL_PIN_FUNC(I2S1, S2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const HAL_I2S_DEF_SETTING I2SDefaultSetting = {
|
||||
.I2SMaster = I2S_MASTER_MODE, // I2S Function Mode
|
||||
.DevSts = I2S_STS_UNINITIAL, //I2S device status
|
||||
.I2SChNum = I2S_CH_STEREO, //I2S Channel number mono or stereo
|
||||
.I2SPageNum = I2S_4PAGE, //I2S Page number 2~4
|
||||
.I2STRxAct = I2S_TXRX, //I2S tx rx act, tx only or rx only or tx+rx
|
||||
.I2SWordLen = I2S_WL_16, //I2S Word length 16bit or 24bit
|
||||
.I2SPageSize = (768/4)-1, //I2S Page size 1~4096 word
|
||||
.I2SRate = I2S_SR_48KHZ, //I2S sample rate 8k ~ 96khz
|
||||
|
||||
.I2STxIntrMSK = I2S_TX_INT_PAGE0_OK|I2S_TX_INT_PAGE1_OK| \
|
||||
I2S_TX_INT_PAGE2_OK|I2S_TX_INT_PAGE3_OK, /*I2S Tx Interrupt Mask*/
|
||||
.I2SRxIntrMSK = I2S_RX_INT_PAGE0_OK|I2S_RX_INT_PAGE1_OK| \
|
||||
I2S_RX_INT_PAGE2_OK|I2S_RX_INT_PAGE3_OK /*I2S Rx Interrupt Mask*/
|
||||
};
|
||||
|
||||
void i2s_init(i2s_t *obj, PinName sck, PinName ws, PinName sd)
|
||||
{
|
||||
uint32_t i2s_sck, i2s_ws, i2s_tx, i2s_rx;
|
||||
uint32_t i2s_sel;;
|
||||
uint8_t i2s_idx;
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
HAL_Status ret;
|
||||
|
||||
// Determine the UART to use (UART0, UART1, or UART3)
|
||||
i2s_sck = pinmap_peripheral(sck, PinMap_I2S_CLK);
|
||||
i2s_ws = pinmap_peripheral(ws, PinMap_I2S_WS);
|
||||
i2s_tx = pinmap_find_peripheral(sd, PinMap_I2S_TX);
|
||||
i2s_rx = pinmap_find_peripheral(sd, PinMap_I2S_RX);
|
||||
|
||||
i2s_sel = pinmap_merge(i2s_sck, i2s_ws);
|
||||
if (unlikely(i2s_sel == NC)) {
|
||||
DBG_I2S_ERR("%s: Cannot find matched I2S for given pin\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
if( (i2s_sel != i2s_tx) && (i2s_sel != i2s_rx)){
|
||||
DBG_I2S_ERR("%s: Cannot find matched I2S for given pin\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
i2s_idx = RTL_GET_PERI_IDX(i2s_sel);
|
||||
|
||||
pI2SAdapter->DevNum = i2s_idx;
|
||||
pI2SAdapter->PinMux = RTL_GET_PERI_SEL(i2s_sel);;
|
||||
DBG_I2S_INFO("%s: Use I2S%d Sel%d\r\n", __FUNCTION__, pI2SAdapter->DevNum, pI2SAdapter->PinMux);
|
||||
|
||||
pI2SAdapter->pInitDat = &obj->InitDat;
|
||||
RtkI2SLoadDefault(pI2SAdapter, (VOID*)&I2SDefaultSetting);
|
||||
|
||||
// Load user defined parameters
|
||||
pI2SAdapter->pInitDat->I2SChNum = obj->channel_num;
|
||||
pI2SAdapter->pInitDat->I2SRate = obj->sampling_rate;
|
||||
pI2SAdapter->pInitDat->I2SWordLen = obj->word_length;
|
||||
pI2SAdapter->pInitDat->I2STRxAct = obj->direction;
|
||||
|
||||
//RtkI2SInit(pI2SAdapter);
|
||||
ret = HalI2SInit(pI2SAdapter);
|
||||
|
||||
if(ret != HAL_OK){
|
||||
DBG_I2S_ERR("%s: HalI2SInit is failure\n", __FUNCTION__);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void i2s_set_dma_buffer(i2s_t *obj, char *tx_buf, char *rx_buf,
|
||||
uint32_t page_num, uint32_t page_size)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
u32 i;
|
||||
|
||||
if ((page_num < 2) || (page_num > 4) || (page_size < 8)) {
|
||||
DBG_I2S_INFO("%s: PageNum(%d) valid value is 2~4; PageSize(%d must > 8)\r\n", \
|
||||
__FUNCTION__, page_num, page_size);
|
||||
return;
|
||||
}
|
||||
|
||||
pI2SAdapter->pInitDat->I2SPageNum = page_num - 1;
|
||||
pI2SAdapter->pInitDat->I2SPageSize = page_size/4 - 1; // unit is 4-bytes
|
||||
pI2SAdapter->pInitDat->I2STxData = (u8*)tx_buf;
|
||||
pI2SAdapter->pInitDat->I2SRxData = (u8*)rx_buf;
|
||||
HalI2SSetDMABuf(pI2SAdapter->pInitDat);
|
||||
|
||||
for (i=0;i<page_num;i++) {
|
||||
pI2SAdapter->TxPageList[i] = (uint32_t*)(tx_buf + ((page_size) * i));
|
||||
pI2SAdapter->RxPageList[i] = (uint32_t*)(rx_buf + ((page_size) * i));
|
||||
}
|
||||
}
|
||||
|
||||
void i2s_tx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
pI2SAdapter->UserCB.TxCCB = handler;
|
||||
pI2SAdapter->UserCB.TxCBId = id;
|
||||
}
|
||||
|
||||
void i2s_rx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
pI2SAdapter->UserCB.RxCCB = handler;
|
||||
pI2SAdapter->UserCB.RxCBId = id;
|
||||
}
|
||||
|
||||
void i2s_set_direction(i2s_t *obj, int trx_type)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
obj->direction = trx_type;
|
||||
pI2SAdapter->pInitDat->I2STRxAct = trx_type;
|
||||
HalI2SSetDirection(pI2SAdapter->pInitDat);
|
||||
}
|
||||
|
||||
void i2s_set_param(i2s_t *obj, int channel_num, int rate, int word_len)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
obj->channel_num = channel_num;
|
||||
obj->sampling_rate = rate;
|
||||
obj->word_length = word_len;
|
||||
pI2SAdapter->pInitDat->I2SChNum = channel_num;
|
||||
pI2SAdapter->pInitDat->I2SRate = rate;
|
||||
pI2SAdapter->pInitDat->I2SWordLen = word_len;
|
||||
HalI2SSetChNum(pI2SAdapter->pInitDat);
|
||||
HalI2SSetRate(pI2SAdapter->pInitDat);
|
||||
HalI2SSetWordLen(pI2SAdapter->pInitDat);
|
||||
}
|
||||
|
||||
void i2s_deinit(i2s_t *obj)
|
||||
{
|
||||
//RtkI2SDeInit((VOID*)&obj->I2SAdapter);
|
||||
HalI2SDeInit((VOID*)&obj->I2SAdapter);
|
||||
}
|
||||
|
||||
int* i2s_get_tx_page(i2s_t *obj)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
u8 page_idx;
|
||||
|
||||
page_idx = HalI2SGetTxPage((VOID*)pI2SAdapter->pInitDat);
|
||||
if (page_idx <= pI2SAdapter->pInitDat->I2SPageNum) {
|
||||
return ((int*)pI2SAdapter->TxPageList[page_idx]);
|
||||
} else {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void i2s_send_page(i2s_t *obj, uint32_t *pbuf)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
u32 page_num, i;
|
||||
|
||||
page_num = pI2SAdapter->pInitDat->I2SPageNum + 1;
|
||||
for (i=0;i<page_num;i++) {
|
||||
if (pI2SAdapter->TxPageList[i] == pbuf) {
|
||||
HalI2SPageSend(pI2SAdapter->pInitDat, i);
|
||||
break; // break the for loop
|
||||
}
|
||||
}
|
||||
|
||||
if (i == page_num) {
|
||||
DBG_I2S_ERR("i2s_send_page: the pbuf(0x%x) is not a DMA buffer\r\n", pbuf);
|
||||
}
|
||||
}
|
||||
|
||||
void i2s_recv_page(i2s_t *obj)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
HalI2SPageRecv(pI2SAdapter->pInitDat);
|
||||
}
|
||||
|
||||
void i2s_enable(i2s_t *obj)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
//RtkI2SEnable(pI2SAdapter);
|
||||
HalI2SEnable(pI2SAdapter);
|
||||
}
|
||||
|
||||
void i2s_disable(i2s_t *obj)
|
||||
{
|
||||
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) &obj->I2SAdapter;
|
||||
|
||||
//RtkI2SDisable(pI2SAdapter);
|
||||
HalI2SDisable(pI2SAdapter);
|
||||
}
|
||||
|
||||
#endif // end of "#if CONFIG_I2S_EN"
|
||||
510
component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
Normal file
510
component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
Normal file
|
|
@ -0,0 +1,510 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "log_uart_api.h"
|
||||
|
||||
|
||||
#include <string.h>
|
||||
|
||||
const u32 log_uart_support_rate[] = {
|
||||
UART_BAUD_RATE_2400, UART_BAUD_RATE_4800, UART_BAUD_RATE_9600,
|
||||
UART_BAUD_RATE_19200, UART_BAUD_RATE_38400, UART_BAUD_RATE_57600,
|
||||
UART_BAUD_RATE_115200, UART_BAUD_RATE_921600, UART_BAUD_RATE_1152000,
|
||||
|
||||
0xFFFFFFFF
|
||||
};
|
||||
|
||||
extern HAL_TIMER_OP HalTimerOp;
|
||||
|
||||
extern u32 ConfigDebugErr;
|
||||
extern u32 ConfigDebugWarn;
|
||||
extern u32 ConfigDebugInfo;
|
||||
extern u32 CfgSysDebugErr;
|
||||
extern u32 CfgSysDebugInfo;
|
||||
extern u32 CfgSysDebugWarn;
|
||||
|
||||
extern HAL_Status RuartIsTimeout (u32 StartCount, u32 TimeoutCnt);
|
||||
extern u32 HalLogUartInitSetting(HAL_LOG_UART_ADAPTER *pUartAdapter);
|
||||
extern VOID HalLogUartSetBaudRate(HAL_LOG_UART_ADAPTER *pUartAdapter);
|
||||
extern VOID HalLogUartSetLineCtrl(HAL_LOG_UART_ADAPTER *pUartAdapter);
|
||||
extern VOID HalLogUartIrqHandle(VOID * Data);
|
||||
|
||||
int32_t log_uart_init (log_uart_t *obj, int baudrate, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter;
|
||||
int i;
|
||||
|
||||
_memset((void*)obj, 0, sizeof(log_uart_t));
|
||||
pUartAdapter = &obj->log_hal_uart;
|
||||
// Check Baud rate
|
||||
for (i=0; log_uart_support_rate[i]!=0xFFFFFF; i++) {
|
||||
if (log_uart_support_rate[i] == baudrate) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (log_uart_support_rate[i]== 0xFFFFFF) {
|
||||
DBG_UART_ERR("log_uart_init: Not support Baud Rate %d\n", baudrate);
|
||||
return -1;
|
||||
}
|
||||
|
||||
// check word width
|
||||
if ((data_bits < 5) || (data_bits > 8)) {
|
||||
DBG_UART_ERR("log_uart_init: Not support Word Width %d\n", data_bits);
|
||||
return -1;
|
||||
}
|
||||
|
||||
//4 Inital Log uart
|
||||
pUartAdapter->BaudRate = baudrate;
|
||||
pUartAdapter->DataLength = data_bits-5;
|
||||
pUartAdapter->FIFOControl = FCR_FIFO_EN | FCR_TX_TRIG_HF | FCR_RX_TRIG_HF;
|
||||
// only enable Rx linstatus at initial,
|
||||
// Tx & Rx interrupt will be enabled @ transfer start time
|
||||
pUartAdapter->IntEnReg = IER_ELSI;
|
||||
switch (parity) {
|
||||
case ParityNone:
|
||||
pUartAdapter->Parity = LCR_PARITY_NONE;
|
||||
break;
|
||||
|
||||
case ParityOdd:
|
||||
pUartAdapter->Parity = LCR_PARITY_ODD;
|
||||
break;
|
||||
|
||||
case ParityEven:
|
||||
pUartAdapter->Parity = LCR_PARITY_EVEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
DBG_UART_ERR("log_uart_init: Not support parity type %d\n", parity);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (stop_bits > 1) {
|
||||
// if width is 5 bits, stop bit will be 1.5 bit
|
||||
pUartAdapter->Stop = LCR_STOP_2B;
|
||||
} else {
|
||||
pUartAdapter->Stop = LCR_STOP_1B;
|
||||
}
|
||||
|
||||
//4 Initial Log Uart
|
||||
HalLogUartInitSetting(pUartAdapter);
|
||||
|
||||
// disable all debug message
|
||||
ConfigDebugErr = 0;
|
||||
ConfigDebugWarn = 0;
|
||||
ConfigDebugInfo = 0;
|
||||
CfgSysDebugErr = 0;
|
||||
CfgSysDebugInfo = 0;
|
||||
CfgSysDebugWarn = 0;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void log_uart_free(log_uart_t *obj)
|
||||
{
|
||||
LOG_UART_ADAPTER UartAdapter;
|
||||
|
||||
// Recover the Log UART for debug message printing
|
||||
//4 Release log uart reset and clock
|
||||
LOC_UART_FCTRL(OFF);
|
||||
LOC_UART_FCTRL(ON);
|
||||
ACTCK_LOG_UART_CCTRL(ON);
|
||||
|
||||
//4 Inital Log uart
|
||||
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
|
||||
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
|
||||
UartAdapter.FIFOControl = 0xC1;
|
||||
UartAdapter.IntEnReg = 0x00;
|
||||
UartAdapter.Parity = UART_PARITY_DISABLE;
|
||||
UartAdapter.Stop = UART_STOP_1BIT;
|
||||
|
||||
// un_register current IRQ first
|
||||
InterruptUnRegister(&(obj->log_hal_uart.IrqHandle));
|
||||
|
||||
//4 Initial Log Uart
|
||||
HalLogUartInit(UartAdapter);
|
||||
}
|
||||
|
||||
void log_uart_baud(log_uart_t *obj, int baudrate)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter;
|
||||
int i;
|
||||
|
||||
pUartAdapter = &obj->log_hal_uart;
|
||||
// Check Baud rate
|
||||
for (i=0; log_uart_support_rate[i]!=0xFFFFFFFF; i++) {
|
||||
if (log_uart_support_rate[i] == baudrate) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (log_uart_support_rate[i]== 0xFFFFFF) {
|
||||
DBG_UART_ERR("log_uart_baud: Not support Baud Rate %d\n", baudrate);
|
||||
return;
|
||||
}
|
||||
|
||||
pUartAdapter->BaudRate = baudrate;
|
||||
HalLogUartSetBaudRate(pUartAdapter);
|
||||
}
|
||||
|
||||
void log_uart_format(log_uart_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter;
|
||||
|
||||
pUartAdapter = &obj->log_hal_uart;
|
||||
|
||||
// check word width
|
||||
if ((data_bits < 5) || (data_bits > 8)) {
|
||||
DBG_UART_ERR("log_uart_format: Not support Word Width %d\n", data_bits);
|
||||
return;
|
||||
}
|
||||
|
||||
//4 Inital Log uart
|
||||
pUartAdapter->DataLength = data_bits - 5;
|
||||
switch (parity) {
|
||||
case ParityNone:
|
||||
pUartAdapter->Parity = LCR_PARITY_NONE;
|
||||
break;
|
||||
|
||||
case ParityOdd:
|
||||
pUartAdapter->Parity = LCR_PARITY_ODD;
|
||||
break;
|
||||
|
||||
case ParityEven:
|
||||
pUartAdapter->Parity = LCR_PARITY_EVEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
DBG_UART_ERR("log_uart_format: Not support parity type %d\n", parity);
|
||||
return;
|
||||
}
|
||||
|
||||
if (stop_bits > 1) {
|
||||
// if width is 5 bits, stop bit will be 1.5 bit
|
||||
pUartAdapter->Stop = LCR_STOP_2B;
|
||||
} else {
|
||||
pUartAdapter->Stop = LCR_STOP_1B;
|
||||
}
|
||||
|
||||
HalLogUartSetLineCtrl(pUartAdapter);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
void log_uart_irq_handler(log_uart_t *obj, loguart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter;
|
||||
|
||||
pUartAdapter = &(obj->log_hal_uart);
|
||||
pUartAdapter->api_irq_handler = handler;
|
||||
pUartAdapter->api_irq_id = id;
|
||||
}
|
||||
|
||||
void log_uart_irq_set(log_uart_t *obj, LOG_UART_INT_ID irq, uint32_t enable)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter;
|
||||
u8 int_en=0;
|
||||
|
||||
pUartAdapter = &(obj->log_hal_uart);
|
||||
|
||||
switch (irq) {
|
||||
case IIR_RX_RDY:
|
||||
int_en = IER_ERBFI;
|
||||
break;
|
||||
|
||||
case IIR_THR_EMPTY:
|
||||
int_en = IER_ETBEI;
|
||||
break;
|
||||
|
||||
case IIR_RX_LINE_STATUS:
|
||||
int_en = IER_ELSI;
|
||||
break;
|
||||
|
||||
case IIR_MODEM_STATUS:
|
||||
int_en = IER_EDSSI;
|
||||
break;
|
||||
|
||||
default:
|
||||
DBG_UART_WARN("log_uart_irq_set: Unknown Irq Id\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
pUartAdapter->IntEnReg |= int_en;
|
||||
} else {
|
||||
// disable
|
||||
pUartAdapter->IntEnReg &= (~int_en);
|
||||
}
|
||||
HalLogUartSetIntEn(pUartAdapter);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* READ/WRITE
|
||||
******************************************************************************/
|
||||
|
||||
char log_uart_getc(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
while (!log_uart_readable(obj));
|
||||
return (char)(HAL_UART_READ32(UART_REV_BUF_OFF) & 0xFF);
|
||||
}
|
||||
|
||||
void log_uart_putc(log_uart_t *obj, char c)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
while (!log_uart_writable(obj));
|
||||
HAL_UART_WRITE8(UART_TRAN_HOLD_OFF, c);
|
||||
}
|
||||
|
||||
int log_uart_readable(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
volatile u8 line_status;
|
||||
|
||||
line_status = HAL_UART_READ8(UART_LINE_STATUS_REG_OFF);
|
||||
|
||||
if (line_status & LSR_DR) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int log_uart_writable(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
volatile u8 line_status;
|
||||
|
||||
line_status = HAL_UART_READ8(UART_LINE_STATUS_REG_OFF);
|
||||
if (line_status & LSR_THRE) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void log_uart_clear(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
HalLogUartRstFIFO(pUartAdapter, (LOG_UART_RST_TX_FIFO|LOG_UART_RST_TX_FIFO));
|
||||
pUartAdapter->TxCount = 0;
|
||||
pUartAdapter->RxCount = 0;
|
||||
}
|
||||
|
||||
void log_uart_clear_tx(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
HalLogUartRstFIFO(pUartAdapter, LOG_UART_RST_TX_FIFO);
|
||||
pUartAdapter->TxCount = 0;
|
||||
}
|
||||
|
||||
void log_uart_clear_rx(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
HalLogUartRstFIFO(pUartAdapter, LOG_UART_RST_RX_FIFO);
|
||||
pUartAdapter->RxCount = 0;
|
||||
}
|
||||
|
||||
void log_uart_break_set(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
u32 RegValue;
|
||||
|
||||
RegValue = HAL_UART_READ32(UART_LINE_CTL_REG_OFF);
|
||||
RegValue |= LCR_BC;
|
||||
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, RegValue);
|
||||
}
|
||||
|
||||
void log_uart_break_clear(log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
u32 RegValue;
|
||||
|
||||
RegValue = HAL_UART_READ32(UART_LINE_CTL_REG_OFF);
|
||||
RegValue &= ~LCR_BC;
|
||||
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, RegValue);
|
||||
}
|
||||
|
||||
void log_uart_tx_comp_handler(log_uart_t *obj, void *handler, uint32_t id)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=(PHAL_LOG_UART_ADAPTER)&(obj->log_hal_uart);
|
||||
|
||||
pUartAdapter->TxCompCallback = (void(*)(void*))handler;
|
||||
pUartAdapter->TxCompCbPara = (void*)id;
|
||||
}
|
||||
|
||||
void log_uart_rx_comp_handler(log_uart_t *obj, void *handler, uint32_t id)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
|
||||
pUartAdapter->RxCompCallback = (void(*)(void*))handler;
|
||||
pUartAdapter->RxCompCbPara = (void*)id;
|
||||
}
|
||||
|
||||
void log_uart_line_status_handler(log_uart_t *obj, void *handler, uint32_t id)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
|
||||
pUartAdapter->LineStatusCallback = (void(*)(void*, u8))handler;
|
||||
pUartAdapter->LineStatusCbPara = (void*)id;
|
||||
}
|
||||
|
||||
// Blocked(busy wait) receive, return received bytes count
|
||||
int32_t log_uart_recv (log_uart_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
ret = (int)HalLogUartRecv(pUartAdapter, prxbuf, len, timeout_ms);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Blocked(busy wait) send, return transmitted bytes count
|
||||
int32_t log_uart_send (log_uart_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
ret = (int)HalLogUartSend(pUartAdapter, ptxbuf, len, timeout_ms);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Interrupt mode(no wait) receive, return HAL function result
|
||||
int32_t log_uart_recv_stream (log_uart_t *obj, char *prxbuf, uint32_t len)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
ret = (int)HalLogUartIntRecv(pUartAdapter, (u8*)prxbuf, len);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Interrupt Mode(no wait) send, return HAL function result
|
||||
int32_t log_uart_send_stream (log_uart_t *obj, char *ptxbuf, uint32_t len)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
ret = (int)HalLogUartIntSend(pUartAdapter, (u8*)ptxbuf, len);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Interrupt mode(no wait) receive with timeout
|
||||
// return the byte count received before timeout, or error(<0)
|
||||
int32_t log_uart_recv_stream_timeout (log_uart_t *obj, char *prxbuf, uint32_t len,
|
||||
uint32_t timeout_ms, void *force_cs)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
uint32_t TimeoutCount=0, StartCount;
|
||||
int ret;
|
||||
void (*task_yield)(void);
|
||||
|
||||
task_yield = NULL;
|
||||
ret = (int)HalLogUartIntRecv(pUartAdapter, (u8*)prxbuf, len);
|
||||
|
||||
if ((ret == HAL_OK) && (timeout_ms > 0)) {
|
||||
TimeoutCount = (timeout_ms*1000/TIMER_TICK_US);
|
||||
StartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
task_yield = (void (*)(void))force_cs;
|
||||
while (pUartAdapter->RxCount > 0) {
|
||||
if (HAL_TIMEOUT == RuartIsTimeout(StartCount, TimeoutCount)) {
|
||||
HalLogUartAbortIntRecv(pUartAdapter);
|
||||
break;
|
||||
}
|
||||
if (NULL != task_yield) {
|
||||
task_yield();
|
||||
}
|
||||
}
|
||||
return (len - pUartAdapter->RxCount);
|
||||
} else {
|
||||
return (-ret);
|
||||
}
|
||||
}
|
||||
|
||||
// Abort Interrupt Mode TX and return how many bytes data has been sent
|
||||
int32_t log_uart_send_stream_abort (log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
HalLogUartAbortIntSend(pUartAdapter);
|
||||
|
||||
ret = (u32)pUartAdapter->pTxBuf - (u32)pUartAdapter->pTxStartAddr;
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Abort Interrupt Mode RX and return how many bytes data has been received
|
||||
int32_t log_uart_recv_stream_abort (log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
int ret;
|
||||
|
||||
HalLogUartAbortIntRecv(pUartAdapter);
|
||||
|
||||
ret = (u32)pUartAdapter->pRxBuf - (u32)pUartAdapter->pRxStartAddr;
|
||||
return (ret);
|
||||
}
|
||||
|
||||
void log_uart_disable (log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
|
||||
HalLogUartDisable(pUartAdapter);
|
||||
}
|
||||
|
||||
void log_uart_enable (log_uart_t *obj)
|
||||
{
|
||||
HAL_LOG_UART_ADAPTER *pUartAdapter=&(obj->log_hal_uart);
|
||||
|
||||
HalLogUartEnable(pUartAdapter);
|
||||
}
|
||||
|
||||
// to read Line-Status register
|
||||
// Bit 0: RX Data Ready
|
||||
// Bit 1: Overrun Error
|
||||
// Bit 2: Parity Error
|
||||
// Bit 3: Framing Error
|
||||
// Bit 4: Break Interrupt (received data input is held in 0 state for a longer than a full word tx time)
|
||||
// Bit 5: TX FIFO empty (THR empty)
|
||||
// Bit 6: TX FIFO empty (THR & TSR both empty)
|
||||
// Bit 7: Receiver FIFO Error (parity error, framing error or break indication)
|
||||
uint8_t log_uart_raed_lsr(log_uart_t *obj)
|
||||
{
|
||||
uint8_t LineStatus;
|
||||
|
||||
LineStatus = HAL_UART_READ8(UART_LINE_STATUS_REG_OFF);
|
||||
|
||||
return LineStatus;
|
||||
}
|
||||
|
||||
// to read Modem-Status register
|
||||
// Bit 0: DCTS, The CTS line has changed its state
|
||||
// Bit 1: DDSR, The DSR line has changed its state
|
||||
// Bit 2: TERI, RI line has changed its state from low to high state
|
||||
// Bit 3: DDCD, DCD line has changed its state
|
||||
// Bit 4: Complement of the CTS input
|
||||
// Bit 5: Complement of the DSR input
|
||||
// Bit 6: Complement of the RI input
|
||||
// Bit 7: Complement of the DCD input
|
||||
uint8_t log_uart_raed_msr(log_uart_t *obj)
|
||||
{
|
||||
uint8_t RegValue;
|
||||
|
||||
RegValue = HAL_UART_READ8(UART_MODEM_STATUS_REG_OFF);
|
||||
return RegValue;
|
||||
}
|
||||
|
||||
243
component/common/mbed/targets/hal/rtl8195a/nfc_api.c
Normal file
243
component/common/mbed/targets/hal/rtl8195a/nfc_api.c
Normal file
|
|
@ -0,0 +1,243 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#if CONFIG_NFC_NORMAL
|
||||
|
||||
#include "nfc_api.h"
|
||||
|
||||
/**
|
||||
* @brief The NFC tag write callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_tagwrite_callback(PNFC_ADAPTER pNFCAdp, uint32_t page, uint32_t wr_data)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_write_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_write_cb)obj->nfc_wr_cb;
|
||||
if (NULL != handler) {
|
||||
handler(obj->wr_cb_arg, page, wr_data);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief The NFC tag read callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_event_callback(PNFC_ADAPTER pNFCAdp, uint32_t event)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_event_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_event_cb)obj->nfc_ev_cb;
|
||||
if (NULL != handler) {
|
||||
if (obj->event_mask & event) {
|
||||
handler(obj->ev_cb_arg, event);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief The NFC tag read callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_tagread_callback(PNFC_ADAPTER pNFCAdp, uint32_t page)
|
||||
{
|
||||
// notify upper layer when read tag page 0 only
|
||||
if (0 == page) {
|
||||
nfc_event_callback(pNFCAdp, NFC_EV_READ);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief The NFC cache read done callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_cache_read_callback(PNFC_ADAPTER pNFCAdp, uint32_t start_pg, uint32_t *pbuf)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_write_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_write_cb)obj->nfc_cache_rd_cb;
|
||||
if (NULL != handler) {
|
||||
handler(obj->cache_read_cb_arg, start_pg, (uint32_t)pbuf);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To initial NFC tag hardware and resource
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_init(nfctag_t *obj, uint32_t *pg_init_val)
|
||||
{
|
||||
_memset((void *)obj, 0, sizeof(nfctag_t));
|
||||
HalNFCDmemInit(pg_init_val, NFCTAGLENGTH);
|
||||
HalNFCInit(&(obj->NFCAdapter));
|
||||
HalNFCFwDownload();
|
||||
obj->NFCAdapter.nfc_obj = obj;
|
||||
obj->pwr_status = NFC_PWR_RUNNING;
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To free NFC tag hardware and resource
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_free(nfctag_t *obj)
|
||||
{
|
||||
HalNFCDeinit(&(obj->NFCAdapter));
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC read occurred
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_read(nfctag_t *obj, nfc_read_cb handler, void *arg)
|
||||
{
|
||||
obj->nfc_rd_cb = (void *)handler;
|
||||
obj->rd_cb_arg = arg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC write occurred
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_write(nfctag_t *obj, nfc_write_cb handler, void *arg)
|
||||
{
|
||||
obj->nfc_wr_cb = (void *)handler;
|
||||
obj->wr_cb_arg = arg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC events occurred
|
||||
* and the event mask
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_event(nfctag_t *obj, nfc_event_cb handler, void *arg, unsigned int event_mask)
|
||||
{
|
||||
obj->nfc_ev_cb = (void *)handler;
|
||||
obj->ev_cb_arg = arg;
|
||||
obj->event_mask = event_mask;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To set a new power mode to the NFC device
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_power(nfctag_t *obj, int pwr_mode, int wake_event)
|
||||
{
|
||||
// TODO:
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief to update the NFC read cache. The data in the NFC read cache
|
||||
* buffer will be transmitted out when NFC read occurred
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_cache_write(nfctag_t *obj, uint32_t *tbuf, unsigned int spage, unsigned int pg_num)
|
||||
{
|
||||
u8 remain_pg;
|
||||
u8 pg_offset=0;
|
||||
u8 i;
|
||||
|
||||
if ((spage+pg_num) > NFC_MAX_CACHE_PAGE_NUM) {
|
||||
return NFC_ERROR;
|
||||
}
|
||||
|
||||
remain_pg = pg_num;
|
||||
while (remain_pg > 0) {
|
||||
if (remain_pg >= 4) {
|
||||
A2NWriteCatch (&obj->NFCAdapter, (spage+pg_offset), 4, (u32*)(&tbuf[pg_offset]));
|
||||
remain_pg -= 4;
|
||||
pg_offset += 4;
|
||||
}
|
||||
else {
|
||||
for(i=0;i<remain_pg;i++) {
|
||||
A2NWriteCatch (&obj->NFCAdapter, (spage+pg_offset), 1, (u32*)(&tbuf[pg_offset]));
|
||||
pg_offset++;
|
||||
}
|
||||
remain_pg = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To get current NFC status
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_cache_raed(nfctag_t *obj, nfc_cache_read_cb handler,
|
||||
void *arg, unsigned int start_pg)
|
||||
{
|
||||
if (start_pg > NFC_MAX_CACHE_PAGE_NUM) {
|
||||
return NFC_ERROR;
|
||||
}
|
||||
|
||||
obj->nfc_cache_rd_cb = (void *)handler;
|
||||
obj->cache_read_cb_arg = arg;
|
||||
|
||||
A2NReadCatch(&(obj->NFCAdapter), (u8)start_pg);
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief to read back the NFC read cache.
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_status(nfctag_t *obj)
|
||||
{
|
||||
// TODO:
|
||||
|
||||
return (obj->pwr_status);
|
||||
}
|
||||
|
||||
#endif
|
||||
210
component/common/mbed/targets/hal/rtl8195a/objects.h
Normal file
210
component/common/mbed/targets/hal/rtl8195a/objects.h
Normal file
|
|
@ -0,0 +1,210 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_OBJECTS_H
|
||||
#define MBED_OBJECTS_H
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "PortNames.h"
|
||||
#include "PeripheralNames.h"
|
||||
#include "PinNames.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_GPIO_EN
|
||||
struct gpio_irq_s {
|
||||
PinName pin;
|
||||
uint32_t event;
|
||||
HAL_GPIO_PIN hal_pin;
|
||||
uint8_t hal_port_num;
|
||||
uint8_t hal_pin_num;
|
||||
};
|
||||
|
||||
typedef struct gpio_irq_s gpio_irq_t;
|
||||
|
||||
struct gpio_s {
|
||||
PinName pin;
|
||||
PinMode mode;
|
||||
PinDirection direction;
|
||||
HAL_GPIO_PIN hal_pin;
|
||||
uint8_t hal_port_num;
|
||||
uint8_t hal_pin_num;
|
||||
};
|
||||
|
||||
typedef struct gpio_s gpio_t;
|
||||
|
||||
struct port_s {
|
||||
PortName port;
|
||||
uint32_t mask;
|
||||
PinDirection direction;
|
||||
uint8_t *pin_def;
|
||||
};
|
||||
#endif // end of "#ifdef CONFIG_GPIO_EN"
|
||||
|
||||
#ifdef CONFIG_UART_EN
|
||||
struct serial_s {
|
||||
HAL_RUART_OP hal_uart_op;
|
||||
HAL_RUART_ADAPTER hal_uart_adp;
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
UART_DMA_CONFIG uart_gdma_cfg;
|
||||
HAL_GDMA_ADAPTER uart_gdma_adp_tx;
|
||||
HAL_GDMA_ADAPTER uart_gdma_adp_rx;
|
||||
UART_DMA_MULTIBLK gdma_multiblk_list_tx;
|
||||
UART_DMA_MULTIBLK gdma_multiblk_list_rx;
|
||||
#endif
|
||||
uint32_t tx_len;
|
||||
uint32_t rx_len;
|
||||
};
|
||||
#endif // end of "#ifdef CONFIG_UART_EN"
|
||||
|
||||
struct log_uart_s {
|
||||
HAL_LOG_UART_ADAPTER log_hal_uart;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SPI_COM_EN
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PWM_EN
|
||||
struct pwmout_s {
|
||||
uint8_t pwm_idx;
|
||||
uint8_t pin_sel;
|
||||
uint32_t period;
|
||||
uint32_t pulse;
|
||||
HAL_PWM_ADAPTER pwm_hal_adp;
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C_EN
|
||||
struct i2c_s {
|
||||
SAL_I2C_MNGT_ADPT SalI2CMngtAdpt;
|
||||
SAL_I2C_HND_PRIV SalI2CHndPriv;
|
||||
HAL_I2C_INIT_DAT HalI2CInitData;
|
||||
HAL_I2C_OP HalI2COp;
|
||||
IRQ_HANDLE I2CIrqHandleDat;
|
||||
HAL_GDMA_ADAPTER HalI2CTxGdmaAdpt;
|
||||
HAL_GDMA_ADAPTER HalI2CRxGdmaAdpt;
|
||||
HAL_GDMA_OP HalI2CGdmaOp;
|
||||
IRQ_HANDLE I2CTxGdmaIrqHandleDat;
|
||||
IRQ_HANDLE I2CRxGdmaIrqHandleDat;
|
||||
SAL_I2C_USER_CB SalI2CUserCB;
|
||||
SAL_I2C_USERCB_ADPT SalI2CUserCBAdpt[SAL_USER_CB_NUM];
|
||||
SAL_I2C_DMA_USER_DEF SalI2CDmaUserDef;
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
struct flash_s
|
||||
{
|
||||
SPIC_INIT_PARA SpicInitPara;
|
||||
u32 Length;
|
||||
};
|
||||
|
||||
|
||||
|
||||
#ifdef CONFIG_ADC_EN
|
||||
struct analogin_s {
|
||||
SAL_ADC_MNGT_ADPT SalADCMngtAdpt;
|
||||
SAL_ADC_HND_PRIV SalADCHndPriv;
|
||||
HAL_ADC_INIT_DAT HalADCInitData;
|
||||
HAL_ADC_OP HalADCOp;
|
||||
IRQ_HANDLE ADCIrqHandleDat;
|
||||
HAL_GDMA_ADAPTER HalADCGdmaAdpt;
|
||||
HAL_GDMA_OP HalADCGdmaOp;
|
||||
IRQ_HANDLE ADCGdmaIrqHandleDat;
|
||||
SAL_ADC_USER_CB SalADCUserCB;
|
||||
SAL_ADC_USERCB_ADPT SalADCUserCBAdpt[SAL_ADC_USER_CB_NUM];
|
||||
};
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
struct i2c_s {
|
||||
I2C_Type *i2c;
|
||||
};
|
||||
|
||||
struct spi_s {
|
||||
SPI_Type *spi;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NFC_EN
|
||||
struct nfctag_s {
|
||||
NFC_ADAPTER NFCAdapter;
|
||||
void *nfc_rd_cb; // read callback function
|
||||
void *rd_cb_arg;
|
||||
void *nfc_wr_cb; // write callback function
|
||||
void *wr_cb_arg;
|
||||
void *nfc_ev_cb; // event callback function
|
||||
void *ev_cb_arg;
|
||||
void *nfc_cache_rd_cb; // cache read callback function
|
||||
void *cache_read_cb_arg;
|
||||
unsigned int event_mask;
|
||||
int pwr_status;
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIMER_EN
|
||||
struct gtimer_s {
|
||||
TIMER_ADAPTER hal_gtimer_adp;
|
||||
void *handler;
|
||||
u32 hid;
|
||||
u8 timer_id;
|
||||
u8 is_periodcal;
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2S_EN
|
||||
struct i2s_s {
|
||||
HAL_I2S_ADAPTER I2SAdapter;
|
||||
HAL_I2S_INIT_DAT InitDat;
|
||||
u8 sampling_rate;
|
||||
u8 channel_num;
|
||||
u8 word_length;
|
||||
u8 direction;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DAC_EN
|
||||
/** \file objects.h
|
||||
* \brief A Documented file.
|
||||
*
|
||||
* A documented file.
|
||||
*/
|
||||
|
||||
/** \struct dac_s objects.h "rtl8195a/objects.h"
|
||||
* \brief This is a dac_s structure.
|
||||
*
|
||||
* For analogout APIs, a pointer to dac_s is used as an input paras.
|
||||
* A DAC initial data structure is the major element of dac_s.
|
||||
*/
|
||||
struct dac_s {
|
||||
HAL_DAC_INIT_DAT DACpara;
|
||||
};
|
||||
#endif
|
||||
|
||||
struct gdma_s {
|
||||
HAL_GDMA_OBJ gdma_obj;
|
||||
uint8_t gdma_allocated;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
34
component/common/mbed/targets/hal/rtl8195a/pinmap.c
Normal file
34
component/common/mbed/targets/hal/rtl8195a/pinmap.c
Normal file
|
|
@ -0,0 +1,34 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
//#include "mbed_assert.h"
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
//#include "error.h"
|
||||
|
||||
/**
|
||||
* Configure pin enable and function
|
||||
*/
|
||||
void pin_function(PinName pin, int function)
|
||||
{
|
||||
// MBED_ASSERT(pin != (PinName)NC);
|
||||
//1 Our HAL API cannot support to configure the pin function by this way
|
||||
/* the pin function (pin mux) is depends on each IP On/Off and priority, so we cannot
|
||||
set the pin function directly */
|
||||
}
|
||||
|
||||
/**
|
||||
* Configure pin pull-up/pull-down
|
||||
*/
|
||||
void pin_mode(PinName pin, PinMode mode)
|
||||
{
|
||||
// MBED_ASSERT(pin != (PinName)NC);
|
||||
HAL_GPIO_PullCtrl((u32)pin, (u32)mode);
|
||||
|
||||
}
|
||||
73
component/common/mbed/targets/hal/rtl8195a/pinmap_common.c
Normal file
73
component/common/mbed/targets/hal/rtl8195a/pinmap_common.c
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "basic_types.h"
|
||||
#include "diag.h"
|
||||
#include "pinmap.h"
|
||||
//#include "error.h"
|
||||
|
||||
__weak void pinmap_pinout(PinName pin, const PinMap *map) {
|
||||
#if 0
|
||||
if (pin == NC)
|
||||
return;
|
||||
|
||||
while (map->pin != NC) {
|
||||
if (map->pin == pin) {
|
||||
pin_function(pin, map->function);
|
||||
|
||||
pin_mode(pin, PullNone);
|
||||
return;
|
||||
}
|
||||
map++;
|
||||
}
|
||||
DBG_GPIO_ERR("%s: could not pinout\n", __FUNCTION__);
|
||||
#endif
|
||||
}
|
||||
|
||||
__weak uint32_t pinmap_merge(uint32_t a, uint32_t b) {
|
||||
// both are the same (inc both NC)
|
||||
if (a == b)
|
||||
return a;
|
||||
|
||||
// one (or both) is not connected
|
||||
if (a == (uint32_t)NC)
|
||||
return b;
|
||||
if (b == (uint32_t)NC)
|
||||
return a;
|
||||
|
||||
// mis-match error case
|
||||
DBG_GPIO_ERR("%s: pinmap mis-match\n", __FUNCTION__);
|
||||
return (uint32_t)NC;
|
||||
}
|
||||
|
||||
__weak uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map) {
|
||||
while (map->pin != NC) {
|
||||
if (map->pin == pin)
|
||||
return map->peripheral;
|
||||
map++;
|
||||
}
|
||||
return (uint32_t)NC;
|
||||
}
|
||||
|
||||
__weak uint32_t pinmap_peripheral(PinName pin, const PinMap* map) {
|
||||
uint32_t peripheral = (uint32_t)NC;
|
||||
|
||||
if (pin == (PinName)NC)
|
||||
return (uint32_t)NC;
|
||||
peripheral = pinmap_find_peripheral(pin, map);
|
||||
if ((uint32_t)NC == peripheral) // no mapping available
|
||||
DBG_GPIO_ERR("%s: pinmap not found for peripheral\n", __FUNCTION__);
|
||||
return peripheral;
|
||||
}
|
||||
212
component/common/mbed/targets/hal/rtl8195a/port_api.c
Normal file
212
component/common/mbed/targets/hal/rtl8195a/port_api.c
Normal file
|
|
@ -0,0 +1,212 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "port_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "gpio_api.h"
|
||||
#include "PinNames.h"
|
||||
//#include "mbed_error.h"
|
||||
|
||||
#if CONFIG_GPIO_EN
|
||||
|
||||
#if DEVICE_PORTIN || DEVICE_PORTOUT
|
||||
|
||||
#define GPIO_PORT_NUM 3
|
||||
#define GPIO_PORT_WIDTH 32
|
||||
#define GPIO_PORT_WIDTH_MAX 32
|
||||
|
||||
const u8 Default_Port_PinDef[GPIO_PORT_NUM][GPIO_PORT_WIDTH+1] = {
|
||||
// Port 0 has these pin:
|
||||
{PA_0, PA_1, PB_3, PB_4,
|
||||
PB_6, PB_7, PC_1, PC_3,
|
||||
PC_4, PC_5, PC_6, PC_7,
|
||||
PC_8, PC_9, PD_1, PD_3,
|
||||
PD_4, PD_5, PD_6, PD_7,
|
||||
PD_9, PE_1, PE_2, PE_3,
|
||||
PE_5, PE_6, PE_7, PE_8,
|
||||
PG_3, PH_1, PH_3, PH_5,
|
||||
0xFF},
|
||||
|
||||
// Port 1
|
||||
{PA_2, PA_3, PA_4, PA_5,
|
||||
PA_6, PA_7, PB_0, PB_1,
|
||||
PB_2, PB_5, PC_0, PC_2,
|
||||
PD_0, PD_2, PD_8, PE_0,
|
||||
PE_4, PE_9, PE_A, PF_0,
|
||||
PF_1, PF_2, PF_3, PF_4,
|
||||
PF_5, PG_0, PG_1, PG_2,
|
||||
PG_4, PG_5, PG_6, PG_7,
|
||||
0xFF},
|
||||
|
||||
// Port 2
|
||||
{PH_0, PH_2, PH_4, PH_6,
|
||||
PH_7, PI_0, PI_1, PI_2,
|
||||
PI_3, PI_4, PI_5, PI_6,
|
||||
PI_7, PJ_0, PJ_1, PJ_2,
|
||||
PJ_3, PJ_4, PJ_5, PJ_6,
|
||||
PK_0, PK_1, PK_2, PK_3,
|
||||
PK_4, PK_5, PK_6,
|
||||
0xFF}
|
||||
|
||||
};
|
||||
|
||||
extern const u8 GPIO_SWPORT_DR_TBL[];
|
||||
extern const u8 GPIO_EXT_PORT_TBL[];
|
||||
|
||||
extern VOID HAL_GPIO_Init(HAL_GPIO_PIN *GPIO_Pin);
|
||||
extern u32 HAL_GPIO_GetPinName(u32 chip_pin);
|
||||
|
||||
// high nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
|
||||
// low nibble = pin number
|
||||
PinName port_pin(PortName port, int pin_n) {
|
||||
return (PinName)(pin_n + (port << 4));
|
||||
}
|
||||
|
||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
if (port >= GPIO_PORT_NUM) {
|
||||
DBG_GPIO_ERR("port_init: Invalid port num(%d), max port num is %d\r\n", \
|
||||
port, (GPIO_PORT_NUM-1));
|
||||
}
|
||||
|
||||
// Fill PORT object structure for future use
|
||||
obj->port = port;
|
||||
obj->mask = mask;
|
||||
obj->direction = dir;
|
||||
|
||||
if (obj->pin_def == NULL) {
|
||||
DBG_GPIO_ERR("Port Define Table isn't assigned\n");
|
||||
obj->pin_def = (uint8_t*)&Default_Port_PinDef[port][0];
|
||||
}
|
||||
|
||||
i=0;
|
||||
while (obj->pin_def[i] != 0xff) {
|
||||
i++;
|
||||
if (i == GPIO_PORT_WIDTH_MAX) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
obj->mask &= ((1<<i) - 1);
|
||||
port_dir(obj, dir);
|
||||
}
|
||||
|
||||
void port_dir(port_t *obj, PinDirection dir)
|
||||
{
|
||||
uint32_t i;
|
||||
HAL_GPIO_PIN GPIO_Pin;
|
||||
|
||||
obj->direction = dir;
|
||||
for (i = 0; i < GPIO_PORT_WIDTH_MAX; i++) { // Process all pins
|
||||
if (obj->pin_def[i] == 0xff) {
|
||||
// end of table
|
||||
break;
|
||||
}
|
||||
if (obj->mask & (1 << i)) { // If the pin is used
|
||||
|
||||
GPIO_Pin.pin_name = HAL_GPIO_GetPinName(obj->pin_def[i]); // get the IP pin name
|
||||
|
||||
if (dir == PIN_OUTPUT) {
|
||||
GPIO_Pin.pin_mode = DOUT_PUSH_PULL;
|
||||
} else { // PIN_INPUT
|
||||
GPIO_Pin.pin_mode = DIN_PULL_NONE;
|
||||
}
|
||||
HAL_GPIO_Init(&GPIO_Pin);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void port_mode(port_t *obj, PinMode mode)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < GPIO_PORT_WIDTH_MAX; i++) { // Process all pins
|
||||
if (obj->pin_def[i] == 0xff) {
|
||||
// end of table
|
||||
break;
|
||||
}
|
||||
if (obj->mask & (1 << i)) { // If the pin is used
|
||||
pin_mode(obj->pin_def[i], mode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void port_write(port_t *obj, int value)
|
||||
{
|
||||
uint32_t i;
|
||||
uint32_t pin_name;
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
uint32_t hal_port[3];
|
||||
uint8_t port_changed[3];
|
||||
|
||||
for (i=0;i<3;i++) {
|
||||
hal_port[i] = HAL_READ32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[i]);
|
||||
port_changed[i] = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < GPIO_PORT_WIDTH_MAX; i++) { // Process all pins
|
||||
if (obj->pin_def[i] == 0xff) {
|
||||
// end of table
|
||||
break;
|
||||
}
|
||||
if (obj->mask & (1 << i)) { // If the pin is used
|
||||
pin_name = HAL_GPIO_GetPinName(obj->pin_def[i]); // get the IP pin name
|
||||
port_num = HAL_GPIO_GET_PORT_BY_NAME(pin_name);
|
||||
pin_num = HAL_GPIO_GET_PIN_BY_NAME(pin_name);
|
||||
hal_port[port_num] &= ~(1 << pin_num);
|
||||
hal_port[port_num] |= (((value>>i) & 0x01)<< pin_num);
|
||||
port_changed[port_num] = 1;
|
||||
}
|
||||
}
|
||||
|
||||
for (i=0;i<3;i++) {
|
||||
if (port_changed[i]) {
|
||||
HAL_WRITE32(GPIO_REG_BASE, GPIO_SWPORT_DR_TBL[i], hal_port[i]);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
int port_read(port_t *obj)
|
||||
{
|
||||
int value=0;
|
||||
u32 i;
|
||||
uint32_t pin_name;
|
||||
uint8_t port_num;
|
||||
uint8_t pin_num;
|
||||
uint32_t hal_port[3];
|
||||
|
||||
for (i=0;i<3;i++) {
|
||||
hal_port[i] = HAL_READ32(GPIO_REG_BASE, GPIO_EXT_PORT_TBL[i]);
|
||||
}
|
||||
|
||||
for (i = 0; i < GPIO_PORT_WIDTH_MAX; i++) { // Process all pins
|
||||
if (obj->pin_def[i] == 0xff) {
|
||||
// end of table
|
||||
break;
|
||||
}
|
||||
if (obj->mask & (1 << i)) { // If the pin is used
|
||||
pin_name = HAL_GPIO_GetPinName(obj->pin_def[i]); // get the IP pin name
|
||||
port_num = HAL_GPIO_GET_PORT_BY_NAME(pin_name);
|
||||
pin_num = HAL_GPIO_GET_PIN_BY_NAME(pin_name);
|
||||
if (hal_port[port_num] & (1<<pin_num)) {
|
||||
value |= (1<<i);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
140
component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
Normal file
140
component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
Normal file
|
|
@ -0,0 +1,140 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "device.h"
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
//#include <rtl_lib.h>
|
||||
|
||||
#if DEVICE_PWMOUT
|
||||
|
||||
#ifdef CONFIG_PWM_EN
|
||||
#include "pwmout_api.h"
|
||||
|
||||
static const PinMap PinMap_PWM[] = {
|
||||
{PB_4, RTL_PIN_PERI(PWM0, 0, S0), RTL_PIN_FUNC(PWM0, S0)},
|
||||
{PB_5, RTL_PIN_PERI(PWM1, 1, S0), RTL_PIN_FUNC(PWM1, S0)},
|
||||
{PB_6, RTL_PIN_PERI(PWM2, 2, S0), RTL_PIN_FUNC(PWM2, S0)},
|
||||
{PB_7, RTL_PIN_PERI(PWM3, 3, S0), RTL_PIN_FUNC(PWM3, S0)},
|
||||
|
||||
{PC_0, RTL_PIN_PERI(PWM0, 0, S1), RTL_PIN_FUNC(PWM0, S1)},
|
||||
{PC_1, RTL_PIN_PERI(PWM1, 1, S1), RTL_PIN_FUNC(PWM1, S1)},
|
||||
{PC_2, RTL_PIN_PERI(PWM2, 2, S1), RTL_PIN_FUNC(PWM2, S1)},
|
||||
{PC_3, RTL_PIN_PERI(PWM3, 3, S1), RTL_PIN_FUNC(PWM3, S1)},
|
||||
|
||||
{PD_3, RTL_PIN_PERI(PWM0, 0, S2), RTL_PIN_FUNC(PWM0, S2)},
|
||||
{PD_4, RTL_PIN_PERI(PWM1, 1, S2), RTL_PIN_FUNC(PWM1, S2)},
|
||||
{PD_5, RTL_PIN_PERI(PWM2, 2, S2), RTL_PIN_FUNC(PWM2, S2)},
|
||||
{PD_6, RTL_PIN_PERI(PWM3, 3, S2), RTL_PIN_FUNC(PWM3, S2)},
|
||||
|
||||
{PE_0, RTL_PIN_PERI(PWM0, 0, S3), RTL_PIN_FUNC(PWM0, S3)},
|
||||
{PE_1, RTL_PIN_PERI(PWM1, 1, S3), RTL_PIN_FUNC(PWM1, S3)},
|
||||
{PE_2, RTL_PIN_PERI(PWM2, 2, S3), RTL_PIN_FUNC(PWM2, S3)},
|
||||
{PE_3, RTL_PIN_PERI(PWM3, 3, S3), RTL_PIN_FUNC(PWM3, S3)},
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
uint32_t peripheral;
|
||||
u32 pwm_idx;
|
||||
u32 pin_sel;
|
||||
|
||||
DBG_PWM_INFO("%s: Init PWM for pin(0x%x)\n", __FUNCTION__, pin);
|
||||
|
||||
// Get the peripheral name from the pin and assign it to the object
|
||||
peripheral = pinmap_peripheral(pin, PinMap_PWM);
|
||||
|
||||
if (unlikely(peripheral == NC)) {
|
||||
DBG_PWM_ERR("%s: Cannot find matched pwm for this pin(0x%x)\n", __FUNCTION__, pin);
|
||||
return;
|
||||
}
|
||||
|
||||
pwm_idx = RTL_GET_PERI_IDX(peripheral);
|
||||
pin_sel = RTL_GET_PERI_SEL(peripheral);
|
||||
|
||||
obj->pwm_idx = pwm_idx;
|
||||
obj->pin_sel = pin_sel;
|
||||
obj->period = 0;
|
||||
obj->pulse = 0;
|
||||
_memset((void *)&obj->pwm_hal_adp, 0, sizeof(HAL_PWM_ADAPTER));
|
||||
if (HAL_OK != HAL_Pwm_Init(&obj->pwm_hal_adp, pwm_idx, pin_sel)) {
|
||||
DBG_PWM_ERR("pwmout_init Err!\n");
|
||||
return;
|
||||
}
|
||||
pwmout_period_us(obj, 20000); // 20 ms per default
|
||||
HAL_Pwm_Enable(&obj->pwm_hal_adp);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
HAL_Pwm_Disable(&obj->pwm_hal_adp);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float percent)
|
||||
{
|
||||
if (percent < (float)0.0) {
|
||||
percent = 0.0;
|
||||
}
|
||||
else if (percent > (float)1.0) {
|
||||
percent = 1.0;
|
||||
}
|
||||
|
||||
obj->pulse = (uint32_t)((float)obj->period * percent);
|
||||
HAL_Pwm_SetDuty(&obj->pwm_hal_adp, obj->period, obj->pulse);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
float value = 0;
|
||||
if (obj->period > 0) {
|
||||
value = (float)(obj->pulse) / (float)(obj->period);
|
||||
}
|
||||
return ((value > (float)1.0) ? (float)(1.0) : (value));
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, (int)(seconds * 1000000.0f));
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, (int)(ms * 1000));
|
||||
}
|
||||
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
obj->period = us;
|
||||
// Set duty cycle again
|
||||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, (int)(seconds * 1000000.0f));
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
float value = (float)us / (float)obj->period;
|
||||
pwmout_write(obj, value);
|
||||
}
|
||||
|
||||
#endif // #ifdef CONFIG_PWM_EN
|
||||
#endif
|
||||
120
component/common/mbed/targets/hal/rtl8195a/rtc_api.c
Normal file
120
component/common/mbed/targets/hal/rtl8195a/rtc_api.c
Normal file
|
|
@ -0,0 +1,120 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2015, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************/
|
||||
#include "rtc_api.h"
|
||||
|
||||
#if DEVICE_RTC
|
||||
#include <time.h>
|
||||
#include "timer_api.h" // software-RTC: use a g-timer for the tick of the RTC
|
||||
|
||||
#define SW_RTC_TIMER_ID TIMER4
|
||||
|
||||
static gtimer_t sw_rtc;
|
||||
static struct tm rtc_timeinfo;
|
||||
static int sw_rtc_en=0;
|
||||
|
||||
const static u8 dim[14] = {
|
||||
31, 0, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, 31, 28 };
|
||||
|
||||
static inline bool is_leap_year(unsigned int year)
|
||||
{
|
||||
return (!(year % 4) && (year % 100)) || !(year % 400);
|
||||
}
|
||||
|
||||
|
||||
static u8 days_in_month (u8 month, u8 year)
|
||||
{
|
||||
u8 ret = dim [ month - 1 ];
|
||||
if (ret == 0)
|
||||
ret = is_leap_year (year) ? 29 : 28;
|
||||
return ret;
|
||||
}
|
||||
|
||||
void sw_rtc_tick_handler(uint32_t id)
|
||||
{
|
||||
if(++rtc_timeinfo.tm_sec > 59) { // Increment seconds, check for overflow
|
||||
rtc_timeinfo.tm_sec = 0; // Reset seconds
|
||||
if(++rtc_timeinfo.tm_min > 59) { // Increment minutes, check for overflow
|
||||
rtc_timeinfo.tm_min = 0; // Reset minutes
|
||||
if(++rtc_timeinfo.tm_hour > 23) { // Increment hours, check for overflow
|
||||
rtc_timeinfo.tm_hour = 0; // Reset hours
|
||||
++rtc_timeinfo.tm_yday; // Increment day of year
|
||||
if(++rtc_timeinfo.tm_wday > 6) // Increment day of week, check for overflow
|
||||
rtc_timeinfo.tm_wday = 0; // Reset day of week
|
||||
// Increment day of month, check for overflow
|
||||
if(++rtc_timeinfo.tm_mday >
|
||||
days_in_month(rtc_timeinfo.tm_mon, rtc_timeinfo.tm_year + 1900)) {
|
||||
rtc_timeinfo.tm_mday = 1; // Reset day of month
|
||||
if(++rtc_timeinfo.tm_mon > 11) { // Increment month, check for overflow
|
||||
rtc_timeinfo.tm_mon = 0; // Reset month
|
||||
rtc_timeinfo.tm_yday = 0; // Reset day of year
|
||||
++rtc_timeinfo.tm_year; // Increment year
|
||||
} // - year
|
||||
} // - month
|
||||
} // - day
|
||||
} // - hour
|
||||
}
|
||||
}
|
||||
|
||||
void rtc_init(void)
|
||||
{
|
||||
// Initial a periodical timer
|
||||
gtimer_init(&sw_rtc, SW_RTC_TIMER_ID);
|
||||
// Tick every 1 sec
|
||||
gtimer_start_periodical(&sw_rtc, 1000000, (void*)sw_rtc_tick_handler, (uint32_t)&sw_rtc);
|
||||
sw_rtc_en = 1;
|
||||
}
|
||||
|
||||
void rtc_free(void)
|
||||
{
|
||||
sw_rtc_en = 0;
|
||||
gtimer_stop(&sw_rtc);
|
||||
gtimer_deinit(&sw_rtc);
|
||||
}
|
||||
|
||||
int rtc_isenabled(void)
|
||||
{
|
||||
return(sw_rtc_en);
|
||||
}
|
||||
|
||||
time_t rtc_read(void)
|
||||
{
|
||||
time_t t;
|
||||
|
||||
// Convert to timestamp
|
||||
t = mktime(&rtc_timeinfo);
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
void rtc_write(time_t t)
|
||||
{
|
||||
// Convert the time in to a tm
|
||||
struct tm *timeinfo = localtime(&t);
|
||||
|
||||
if (timeinfo == NULL) {
|
||||
// Error
|
||||
return;
|
||||
}
|
||||
|
||||
gtimer_stop(&sw_rtc);
|
||||
|
||||
// Set the RTC
|
||||
rtc_timeinfo.tm_sec = timeinfo->tm_sec;
|
||||
rtc_timeinfo.tm_min = timeinfo->tm_min;
|
||||
rtc_timeinfo.tm_hour = timeinfo->tm_hour;
|
||||
rtc_timeinfo.tm_mday = timeinfo->tm_mday;
|
||||
rtc_timeinfo.tm_wday = timeinfo->tm_wday;
|
||||
rtc_timeinfo.tm_yday = timeinfo->tm_yday;
|
||||
rtc_timeinfo.tm_mon = timeinfo->tm_mon;
|
||||
rtc_timeinfo.tm_year = timeinfo->tm_year;
|
||||
|
||||
gtimer_start(&sw_rtc);
|
||||
}
|
||||
|
||||
#endif // endof "#if DEVICE_RTC"
|
||||
810
component/common/mbed/targets/hal/rtl8195a/serial_api.c
Normal file
810
component/common/mbed/targets/hal/rtl8195a/serial_api.c
Normal file
|
|
@ -0,0 +1,810 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
//#include "mbed_assert.h"
|
||||
#include "serial_api.h"
|
||||
#include "serial_ex_api.h"
|
||||
|
||||
#if CONFIG_UART_EN
|
||||
|
||||
//#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include <string.h>
|
||||
|
||||
static const PinMap PinMap_UART_TX[] = {
|
||||
{PC_3, RTL_PIN_PERI(UART0, 0, S0), RTL_PIN_FUNC(UART0, S0)},
|
||||
{PE_0, RTL_PIN_PERI(UART0, 0, S1), RTL_PIN_FUNC(UART0, S1)},
|
||||
{PA_7, RTL_PIN_PERI(UART0, 0, S2), RTL_PIN_FUNC(UART0, S2)},
|
||||
{PD_3, RTL_PIN_PERI(UART1, 1, S0), RTL_PIN_FUNC(UART1, S0)},
|
||||
{PE_4, RTL_PIN_PERI(UART1, 1, S1), RTL_PIN_FUNC(UART1, S1)},
|
||||
{PB_5, RTL_PIN_PERI(UART1, 1, S2), RTL_PIN_FUNC(UART1, S2)},
|
||||
{PA_4, RTL_PIN_PERI(UART2, 2, S0), RTL_PIN_FUNC(UART2, S0)},
|
||||
{PC_9, RTL_PIN_PERI(UART2, 2, S1), RTL_PIN_FUNC(UART2, S1)},
|
||||
{PD_7, RTL_PIN_PERI(UART2, 2, S2), RTL_PIN_FUNC(UART2, S2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_UART_RX[] = {
|
||||
{PC_0, RTL_PIN_PERI(UART0, 0, S0), RTL_PIN_FUNC(UART0, S0)},
|
||||
{PE_3, RTL_PIN_PERI(UART0, 0, S1), RTL_PIN_FUNC(UART0, S1)},
|
||||
{PA_6, RTL_PIN_PERI(UART0, 0, S2), RTL_PIN_FUNC(UART0, S2)},
|
||||
{PD_0, RTL_PIN_PERI(UART1, 1, S0), RTL_PIN_FUNC(UART1, S0)},
|
||||
{PE_7, RTL_PIN_PERI(UART1, 1, S1), RTL_PIN_FUNC(UART1, S1)},
|
||||
{PB_4, RTL_PIN_PERI(UART1, 1, S2), RTL_PIN_FUNC(UART1, S2)},
|
||||
{PA_0, RTL_PIN_PERI(UART2, 2, S0), RTL_PIN_FUNC(UART2, S0)},
|
||||
{PC_6, RTL_PIN_PERI(UART2, 2, S1), RTL_PIN_FUNC(UART2, S1)},
|
||||
{PD_4, RTL_PIN_PERI(UART2, 2, S2), RTL_PIN_FUNC(UART2, S2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
#define UART_NUM (3)
|
||||
#define SERIAL_TX_IRQ_EN 0x01
|
||||
#define SERIAL_RX_IRQ_EN 0x02
|
||||
#define SERIAL_TX_DMA_EN 0x01
|
||||
#define SERIAL_RX_DMA_EN 0x02
|
||||
|
||||
static uint32_t serial_irq_ids[UART_NUM] = {0, 0, 0};
|
||||
|
||||
static uart_irq_handler irq_handler[UART_NUM];
|
||||
static uint32_t serial_irq_en[UART_NUM]={0, 0, 0};
|
||||
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
static uint32_t serial_dma_en[UART_NUM] = {0, 0, 0};
|
||||
static HAL_GDMA_OP UartGdmaOp;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MBED_ENABLED
|
||||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
#endif
|
||||
|
||||
static void SerialTxDoneCallBack(VOID *pAdapter);
|
||||
static void SerialRxDoneCallBack(VOID *pAdapter);
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx, uart_rx;
|
||||
uint32_t uart_sel;
|
||||
uint8_t uart_idx;
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
PUART_DMA_CONFIG pHalRuartDmaCfg;
|
||||
PHAL_GDMA_OP pHalGdmaOp=&UartGdmaOp;
|
||||
#endif
|
||||
|
||||
// Determine the UART to use (UART0, UART1, or UART3)
|
||||
uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
|
||||
uart_sel = pinmap_merge(uart_tx, uart_rx);
|
||||
uart_idx = RTL_GET_PERI_IDX(uart_sel);
|
||||
if (unlikely(uart_idx == (uint8_t)NC)) {
|
||||
DBG_UART_ERR("%s: Cannot find matched UART\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
|
||||
if ((NULL == pHalRuartOp) || (NULL == pHalRuartAdapter)) {
|
||||
DBG_UART_ERR("%s: Allocate Adapter Failed\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
HalRuartOpInit((VOID*)pHalRuartOp);
|
||||
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
HalGdmaOpInit((VOID*)pHalGdmaOp);
|
||||
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
|
||||
pHalRuartDmaCfg->pHalGdmaOp = pHalGdmaOp;
|
||||
pHalRuartDmaCfg->pTxHalGdmaAdapter = &obj->uart_gdma_adp_tx;
|
||||
pHalRuartDmaCfg->pRxHalGdmaAdapter = &obj->uart_gdma_adp_rx;
|
||||
pHalRuartDmaCfg->pTxDmaBlkList = &obj->gdma_multiblk_list_tx;
|
||||
pHalRuartDmaCfg->pRxDmaBlkList = &obj->gdma_multiblk_list_rx;
|
||||
_memset((void*)(pHalRuartDmaCfg->pTxHalGdmaAdapter), 0, sizeof(HAL_GDMA_ADAPTER));
|
||||
_memset((void*)(pHalRuartDmaCfg->pRxHalGdmaAdapter), 0, sizeof(HAL_GDMA_ADAPTER));
|
||||
_memset((void*)(pHalRuartDmaCfg->pTxDmaBlkList), 0, sizeof(UART_DMA_MULTIBLK));
|
||||
_memset((void*)(pHalRuartDmaCfg->pRxDmaBlkList), 0, sizeof(UART_DMA_MULTIBLK));
|
||||
#endif
|
||||
|
||||
pHalRuartOp->HalRuartAdapterLoadDef(pHalRuartAdapter, uart_idx);
|
||||
pHalRuartAdapter->PinmuxSelect = RTL_GET_PERI_SEL(uart_sel);
|
||||
pHalRuartAdapter->BaudRate = 9600;
|
||||
pHalRuartAdapter->IrqHandle.Priority = 6;
|
||||
|
||||
// Configure the UART pins
|
||||
// TODO:
|
||||
// pinmap_pinout(tx, PinMap_UART_TX);
|
||||
// pinmap_pinout(rx, PinMap_UART_RX);
|
||||
// pin_mode(tx, PullUp);
|
||||
// pin_mode(rx, PullUp);
|
||||
|
||||
if (HalRuartInit(pHalRuartAdapter) != HAL_OK) {
|
||||
DBG_UART_ERR("serial_init Err!\n");
|
||||
return;
|
||||
}
|
||||
pHalRuartOp->HalRuartRegIrq(pHalRuartAdapter);
|
||||
pHalRuartOp->HalRuartIntEnable(pHalRuartAdapter);
|
||||
|
||||
#ifdef CONFIG_MBED_ENABLED
|
||||
// For stdio management
|
||||
if (uart_idx == STDIO_UART) {
|
||||
stdio_uart_inited = 1;
|
||||
memcpy(&stdio_uart, obj, sizeof(serial_t));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
u8 uart_idx;
|
||||
PUART_DMA_CONFIG pHalRuartDmaCfg;
|
||||
#endif
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
|
||||
HalRuartDeInit(pHalRuartAdapter);
|
||||
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
uart_idx = pHalRuartAdapter->UartIndex;
|
||||
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
|
||||
if (serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN) {
|
||||
HalRuartRxGdmaDeInit(pHalRuartDmaCfg);
|
||||
serial_dma_en[uart_idx] &= ~SERIAL_RX_DMA_EN;
|
||||
}
|
||||
|
||||
if (serial_dma_en[uart_idx] & SERIAL_TX_DMA_EN) {
|
||||
HalRuartTxGdmaDeInit(pHalRuartDmaCfg);
|
||||
serial_dma_en[uart_idx] &= ~SERIAL_TX_DMA_EN;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
//PHAL_RUART_OP pHalRuartOp;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
//pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
pHalRuartAdapter->BaudRate = baudrate;
|
||||
// HalRuartInit(pHalRuartAdapter);
|
||||
HalRuartSetBaudRate((VOID*)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
//PHAL_RUART_OP pHalRuartOp;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
//pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
if (data_bits == 8) {
|
||||
pHalRuartAdapter->WordLen = RUART_WLS_8BITS;
|
||||
} else {
|
||||
pHalRuartAdapter->WordLen = RUART_WLS_7BITS;
|
||||
}
|
||||
|
||||
|
||||
switch (parity) {
|
||||
case ParityOdd:
|
||||
case ParityForced0:
|
||||
pHalRuartAdapter->Parity = RUART_PARITY_ENABLE;
|
||||
pHalRuartAdapter->ParityType = RUART_ODD_PARITY;
|
||||
break;
|
||||
case ParityEven:
|
||||
case ParityForced1:
|
||||
pHalRuartAdapter->Parity = RUART_PARITY_ENABLE;
|
||||
pHalRuartAdapter->ParityType = RUART_EVEN_PARITY;
|
||||
break;
|
||||
default: // ParityNone
|
||||
pHalRuartAdapter->Parity = RUART_PARITY_DISABLE;
|
||||
break;
|
||||
}
|
||||
|
||||
if (stop_bits == 2) {
|
||||
pHalRuartAdapter->StopBit = RUART_STOP_BIT_2;
|
||||
} else {
|
||||
pHalRuartAdapter->StopBit = RUART_STOP_BIT_1;
|
||||
}
|
||||
|
||||
HalRuartInit(pHalRuartAdapter);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
|
||||
static void SerialTxDoneCallBack(VOID *pAdapter)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter = pAdapter;
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
// Mask UART TX FIFO empty
|
||||
pHalRuartAdapter->Interrupts &= ~RUART_IER_ETBEI;
|
||||
HalRuartSetIMRRtl8195a (pHalRuartAdapter);
|
||||
|
||||
if (irq_handler[uart_idx] != NULL) {
|
||||
irq_handler[uart_idx](serial_irq_ids[uart_idx], TxIrq);
|
||||
}
|
||||
}
|
||||
|
||||
static void SerialRxDoneCallBack(VOID *pAdapter)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter = pAdapter;
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
if (irq_handler[uart_idx] != NULL) {
|
||||
irq_handler[uart_idx](serial_irq_ids[uart_idx], RxIrq);
|
||||
}
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
// PHAL_RUART_OP pHalRuartOp;
|
||||
u8 uart_idx;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
// pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
irq_handler[uart_idx] = handler;
|
||||
serial_irq_ids[uart_idx] = id;
|
||||
|
||||
pHalRuartAdapter->TxTDCallback = SerialTxDoneCallBack;
|
||||
pHalRuartAdapter->TxTDCbPara = (void*)pHalRuartAdapter;
|
||||
pHalRuartAdapter->RxDRCallback = SerialRxDoneCallBack;
|
||||
pHalRuartAdapter->RxDRCbPara = (void*)pHalRuartAdapter;
|
||||
|
||||
// pHalRuartOp->HalRuartRegIrq(pHalRuartAdapter);
|
||||
// pHalRuartOp->HalRuartIntEnable(pHalRuartAdapter);
|
||||
}
|
||||
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
u8 uart_idx;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
if (enable) {
|
||||
if (irq == RxIrq) {
|
||||
pHalRuartAdapter->Interrupts |= RUART_IER_ERBI | RUART_IER_ELSI;
|
||||
serial_irq_en[uart_idx] |= SERIAL_RX_IRQ_EN;
|
||||
HalRuartSetIMRRtl8195a (pHalRuartAdapter);
|
||||
}
|
||||
else {
|
||||
serial_irq_en[uart_idx] |= SERIAL_TX_IRQ_EN;
|
||||
}
|
||||
pHalRuartOp->HalRuartRegIrq(pHalRuartAdapter);
|
||||
pHalRuartOp->HalRuartIntEnable(pHalRuartAdapter);
|
||||
}
|
||||
else { // disable
|
||||
if (irq == RxIrq) {
|
||||
pHalRuartAdapter->Interrupts &= ~(RUART_IER_ERBI | RUART_IER_ELSI);
|
||||
serial_irq_en[uart_idx] &= ~SERIAL_RX_IRQ_EN;
|
||||
}
|
||||
else {
|
||||
pHalRuartAdapter->Interrupts &= ~RUART_IER_ETBEI;
|
||||
serial_irq_en[uart_idx] &= ~SERIAL_TX_IRQ_EN;
|
||||
}
|
||||
HalRuartSetIMRRtl8195a (pHalRuartAdapter);
|
||||
if (pHalRuartAdapter->Interrupts == 0) {
|
||||
InterruptUnRegister(&pHalRuartAdapter->IrqHandle);
|
||||
InterruptDis(&pHalRuartAdapter->IrqHandle);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* READ/WRITE
|
||||
******************************************************************************/
|
||||
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
while (!serial_readable(obj));
|
||||
return (int)((HAL_RUART_READ32(uart_idx, RUART_REV_BUF_REG_OFF)) & 0xFF);
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
while (!serial_writable(obj));
|
||||
HAL_RUART_WRITE32(uart_idx, RUART_TRAN_HOLD_REG_OFF, (c & 0xFF));
|
||||
|
||||
if (serial_irq_en[uart_idx] & SERIAL_TX_IRQ_EN) {
|
||||
// UnMask TX FIFO empty IRQ
|
||||
pHalRuartAdapter->Interrupts |= RUART_IER_ETBEI;
|
||||
HalRuartSetIMRRtl8195a (pHalRuartAdapter);
|
||||
}
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
if ((HAL_RUART_READ32(uart_idx, RUART_LINE_STATUS_REG_OFF)) & RUART_LINE_STATUS_REG_DR) {
|
||||
return 1;
|
||||
}
|
||||
else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
|
||||
if (HAL_RUART_READ32(uart_idx, RUART_LINE_STATUS_REG_OFF) &
|
||||
(RUART_LINE_STATUS_REG_THRE)) {
|
||||
return 1;
|
||||
}
|
||||
else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
HalRuartResetTRxFifo((VOID *)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_clear_tx(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
HalRuartResetTxFifo((VOID *)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_clear_rx(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
HalRuartResetRxFifo((VOID *)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
u32 RegValue;
|
||||
|
||||
RegValue = HAL_RUART_READ32(uart_idx, RUART_LINE_CTL_REG_OFF);
|
||||
RegValue |= BIT_UART_LCR_BREAK_CTRL;
|
||||
HAL_RUART_WRITE32(uart_idx, RUART_LINE_CTL_REG_OFF, RegValue);
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
u32 RegValue;
|
||||
|
||||
RegValue = HAL_RUART_READ32(uart_idx, RUART_LINE_CTL_REG_OFF);
|
||||
RegValue &= ~(BIT_UART_LCR_BREAK_CTRL);
|
||||
HAL_RUART_WRITE32(uart_idx, RUART_LINE_CTL_REG_OFF, RegValue);
|
||||
}
|
||||
|
||||
void serial_send_comp_handler(serial_t *obj, void *handler, uint32_t id)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
pHalRuartAdapter->TxCompCallback = (void(*)(void*))handler;
|
||||
pHalRuartAdapter->TxCompCbPara = (void*)id;
|
||||
}
|
||||
|
||||
void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
pHalRuartAdapter->RxCompCallback = (void(*)(void*))handler;
|
||||
pHalRuartAdapter->RxCompCbPara = (void*)id;
|
||||
}
|
||||
|
||||
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
// Our UART cannot specify the RTS/CTS pin seprately, so the ignore the rxflow, txflow pin
|
||||
// We just use the hardware auto flow control, so cannot do flow-control single direction only
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
|
||||
// RTS low active
|
||||
// RTS_pin = autoflow_en ? (~rts | (RX_FIFO_Level_Trigger)) : ~rts
|
||||
switch(type) {
|
||||
case FlowControlRTSCTS:
|
||||
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
|
||||
pHalRuartAdapter->RTSCtrl = 1;
|
||||
break;
|
||||
|
||||
case FlowControlRTS: // to indicate peer that it's ready for RX
|
||||
// It seems cannot only enable RTS
|
||||
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
|
||||
pHalRuartAdapter->RTSCtrl = 1;
|
||||
break;
|
||||
|
||||
case FlowControlCTS: // to check is the peer ready for RX: if can start TX ?
|
||||
// need to check CTS before TX
|
||||
pHalRuartAdapter->FlowControl = AUTOFLOW_ENABLE;
|
||||
pHalRuartAdapter->RTSCtrl = 1;
|
||||
break;
|
||||
|
||||
case FlowControlNone:
|
||||
default:
|
||||
pHalRuartAdapter->FlowControl = AUTOFLOW_DISABLE;
|
||||
pHalRuartAdapter->RTSCtrl = 1; // RTS pin allways Low, peer can send data
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
HalRuartFlowCtrl((VOID *)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_rts_control(serial_t *obj, BOOLEAN rts_state)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
pHalRuartAdapter->RTSCtrl = !rts_state;
|
||||
// RTS_Pin = AFE ? (~rts | RX_FIFO_Level_Over) : ~rts;
|
||||
HalRuartRTSCtrlRtl8195a(pHalRuartAdapter, pHalRuartAdapter->RTSCtrl);
|
||||
}
|
||||
|
||||
// Blocked(busy wait) receive, return received bytes count
|
||||
int32_t serial_recv_blocked (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
obj->rx_len = len;
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartRecv(pHalRuartAdapter, (u8*)prxbuf, len, timeout_ms);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
// Blocked(busy wait) send, return transmitted bytes count
|
||||
int32_t serial_send_blocked (serial_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
obj->tx_len = len;
|
||||
ret = pHalRuartOp->HalRuartSend(pHalRuartAdapter, (u8*)ptxbuf, len, timeout_ms);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
int32_t serial_recv_stream (serial_t *obj, char *prxbuf, uint32_t len)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
obj->rx_len = len;
|
||||
ret = pHalRuartOp->HalRuartIntRecv(pHalRuartAdapter, (u8*)prxbuf, len);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
int32_t serial_send_stream (serial_t *obj, char *ptxbuf, uint32_t len)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
obj->tx_len = len;
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartIntSend(pHalRuartAdapter, (u8*)ptxbuf, len);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_GDMA_EN
|
||||
|
||||
int32_t serial_recv_stream_dma (serial_t *obj, char *prxbuf, uint32_t len)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
int32_t ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
if ((serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN)==0) {
|
||||
PUART_DMA_CONFIG pHalRuartDmaCfg;
|
||||
|
||||
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
|
||||
if (HAL_OK == HalRuartRxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
|
||||
serial_dma_en[uart_idx] |= SERIAL_RX_DMA_EN;
|
||||
}
|
||||
else {
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
obj->rx_len = len;
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = HalRuartDmaRecv(pHalRuartAdapter, (u8*)prxbuf, len);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
int32_t serial_send_stream_dma (serial_t *obj, char *ptxbuf, uint32_t len)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
int32_t ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
if ((serial_dma_en[uart_idx] & SERIAL_TX_DMA_EN)==0) {
|
||||
PUART_DMA_CONFIG pHalRuartDmaCfg;
|
||||
|
||||
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
|
||||
if (HAL_OK == HalRuartTxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
|
||||
serial_dma_en[uart_idx] |= SERIAL_TX_DMA_EN;
|
||||
}
|
||||
else {
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
obj->tx_len = len;
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = HalRuartDmaSend(pHalRuartAdapter, (u8*)ptxbuf, len);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
int32_t serial_recv_stream_dma_timeout (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
u8 uart_idx = pHalRuartAdapter->UartIndex;
|
||||
uint32_t TimeoutCount=0, StartCount;
|
||||
int ret;
|
||||
void (*task_yield)(void);
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
if ((serial_dma_en[uart_idx] & SERIAL_RX_DMA_EN)==0) {
|
||||
PUART_DMA_CONFIG pHalRuartDmaCfg;
|
||||
|
||||
pHalRuartDmaCfg = &obj->uart_gdma_cfg;
|
||||
if (HAL_OK == HalRuartRxGdmaInit(pHalRuartAdapter, pHalRuartDmaCfg, 0)) {
|
||||
serial_dma_en[uart_idx] |= SERIAL_RX_DMA_EN;
|
||||
}
|
||||
else {
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = HalRuartDmaRecv(pHalRuartAdapter, (u8*)prxbuf, len);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
|
||||
if ((ret == HAL_OK) && (timeout_ms > 0)) {
|
||||
TimeoutCount = (timeout_ms*1000/TIMER_TICK_US);
|
||||
StartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
task_yield = (void (*)(void))force_cs;
|
||||
pHalRuartAdapter->Status = HAL_UART_STATUS_OK;
|
||||
while (pHalRuartAdapter->State & HAL_UART_STATE_BUSY_RX) {
|
||||
if (HAL_TIMEOUT == RuartIsTimeout(StartCount, TimeoutCount)) {
|
||||
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartResetRxFifo((VOID*)pHalRuartAdapter);
|
||||
pHalRuartAdapter->Status = HAL_UART_STATUS_TIMEOUT;
|
||||
break;
|
||||
}
|
||||
if (NULL != task_yield) {
|
||||
task_yield();
|
||||
}
|
||||
}
|
||||
if (pHalRuartAdapter->Status == HAL_UART_STATUS_TIMEOUT) {
|
||||
return (len - pHalRuartAdapter->RxCount);
|
||||
} else {
|
||||
return len;
|
||||
}
|
||||
} else {
|
||||
return (-ret);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#endif // end of "#ifdef CONFIG_GDMA_EN"
|
||||
|
||||
int32_t serial_send_stream_abort (serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartStopSend((VOID*)pHalRuartAdapter);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
if (HAL_OK != ret) {
|
||||
return -ret;
|
||||
}
|
||||
HalRuartResetTxFifo((VOID*)pHalRuartAdapter);
|
||||
|
||||
ret = obj->tx_len - pHalRuartAdapter->TxCount;
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
int32_t serial_recv_stream_abort (serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
int ret;
|
||||
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
if (HAL_OK != ret) {
|
||||
return -ret;
|
||||
}
|
||||
|
||||
// pHalRuartOp->HalRuartResetRxFifo((VOID*)pHalRuartAdapter);
|
||||
|
||||
ret = obj->rx_len - pHalRuartAdapter->RxCount;
|
||||
return (ret);
|
||||
}
|
||||
|
||||
void serial_disable (serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
|
||||
HalRuartDisable((VOID*)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
void serial_enable (serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
|
||||
HalRuartEnable((VOID*)pHalRuartAdapter);
|
||||
}
|
||||
|
||||
// return the byte count received before timeout, or error(<0)
|
||||
int32_t serial_recv_stream_timeout (serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs)
|
||||
{
|
||||
PHAL_RUART_OP pHalRuartOp;
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp);
|
||||
uint32_t TimeoutCount=0, StartCount;
|
||||
int ret;
|
||||
void (*task_yield)(void);
|
||||
|
||||
task_yield = NULL;
|
||||
pHalRuartOp = &(obj->hal_uart_op);
|
||||
HalRuartEnterCritical(pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartIntRecv(pHalRuartAdapter, (u8*)prxbuf, len);
|
||||
HalRuartExitCritical(pHalRuartAdapter);
|
||||
if ((ret == HAL_OK) && (timeout_ms > 0)) {
|
||||
TimeoutCount = (timeout_ms*1000/TIMER_TICK_US);
|
||||
StartCount = HalTimerOp.HalTimerReadCount(1);
|
||||
task_yield = (void (*)(void))force_cs;
|
||||
while (pHalRuartAdapter->State & HAL_UART_STATE_BUSY_RX) {
|
||||
if (HAL_TIMEOUT == RuartIsTimeout(StartCount, TimeoutCount)) {
|
||||
ret = pHalRuartOp->HalRuartStopRecv((VOID*)pHalRuartAdapter);
|
||||
ret = pHalRuartOp->HalRuartResetRxFifo((VOID*)pHalRuartAdapter);
|
||||
pHalRuartAdapter->Status = HAL_UART_STATUS_TIMEOUT;
|
||||
break;
|
||||
}
|
||||
if (NULL != task_yield) {
|
||||
task_yield();
|
||||
}
|
||||
}
|
||||
return (len - pHalRuartAdapter->RxCount);
|
||||
} else {
|
||||
return (-ret);
|
||||
}
|
||||
}
|
||||
|
||||
// to hook lock/unlock function for multiple-thread application
|
||||
void serial_hook_lock(serial_t *obj, void *lock, void *unlock, uint32_t id)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
pHalRuartAdapter->EnterCritical = (void (*)(void))lock;
|
||||
pHalRuartAdapter->ExitCritical = (void (*)(void))unlock;
|
||||
}
|
||||
|
||||
// to read Line-Status register
|
||||
// Bit 0: RX Data Ready
|
||||
// Bit 1: Overrun Error
|
||||
// Bit 2: Parity Error
|
||||
// Bit 3: Framing Error
|
||||
// Bit 4: Break Interrupt (received data input is held in 0 state for a longer than a full word tx time)
|
||||
// Bit 5: TX FIFO empty (THR empty)
|
||||
// Bit 6: TX FIFO empty (THR & TSR both empty)
|
||||
// Bit 7: RX Error (parity error, framing error or break indication)
|
||||
uint8_t serial_raed_lsr(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
uint8_t RegValue;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
RegValue = HAL_RUART_READ8(pHalRuartAdapter->UartIndex, RUART_LINE_STATUS_REG_OFF);
|
||||
return RegValue;
|
||||
}
|
||||
|
||||
// to read Modem-Status register
|
||||
// Bit 0: DCTS, The CTS line has changed its state
|
||||
// Bit 1: DDSR, The DSR line has changed its state
|
||||
// Bit 2: TERI, RI line has changed its state from low to high state
|
||||
// Bit 3: DDCD, DCD line has changed its state
|
||||
// Bit 4: Complement of the CTS input
|
||||
// Bit 5: Complement of the DSR input
|
||||
// Bit 6: Complement of the RI input
|
||||
// Bit 7: Complement of the DCD input
|
||||
uint8_t serial_read_msr(serial_t *obj)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
uint8_t RegValue;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
RegValue = HAL_RUART_READ8(pHalRuartAdapter->UartIndex, RUART_MODEM_STATUS_REG_OFF);
|
||||
return RegValue;
|
||||
}
|
||||
|
||||
// to set the RX FIFO level to trigger RX interrupt/RTS de-assert
|
||||
// FifoLv:
|
||||
// 0: 1-Byte
|
||||
// 1: 4-Byte
|
||||
// 2: 8-Byte
|
||||
// 3: 14-Byte
|
||||
void serial_rx_fifo_level(serial_t *obj, SerialFifoLevel FifoLv)
|
||||
{
|
||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||
uint8_t RegValue;
|
||||
|
||||
pHalRuartAdapter = &(obj->hal_uart_adp);
|
||||
RegValue = (RUART_FIFO_CTL_REG_DMA_ENABLE | RUART_FIFO_CTL_REG_FIFO_ENABLE) | (((uint8_t)FifoLv&0x03) << 6);
|
||||
HAL_RUART_WRITE8(pHalRuartAdapter->UartIndex, RUART_FIFO_CTL_REG_OFF, RegValue);
|
||||
}
|
||||
|
||||
#endif
|
||||
290
component/common/mbed/targets/hal/rtl8195a/sleep.c
Normal file
290
component/common/mbed/targets/hal/rtl8195a/sleep.c
Normal file
|
|
@ -0,0 +1,290 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "sleep_ex_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
extern VOID SleepCG(u8 Option, u32 SDuration, u8 ClkSourceEn, u8 SDREn);
|
||||
extern VOID DeepStandby(u8 Option, u32 SDuration, u8 GpioOption);
|
||||
extern VOID DeepSleep(u8 Option, u32 SDuration);
|
||||
|
||||
SLEEP_WAKEUP_EVENT DStandbyWakeupEvent={0};
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Clock Gated power saving.
|
||||
* This function just make the system to enter the clock gated
|
||||
* power saving mode and pending on wake up event waitting.
|
||||
* The user application need to configure the peripheral to
|
||||
* generate system wake up event, like GPIO interrupt
|
||||
* , G-Timer timeout, etc. befor entering power saving mode.
|
||||
*
|
||||
* @param wakeup_event: A bit map of wake up event. Available event:
|
||||
* SLEEP_WAKEUP_BY_STIMER
|
||||
* SLEEP_WAKEUP_BY_GTIMER
|
||||
* SLEEP_WAKEUP_BY_GPIO_INT
|
||||
* SLEEP_WAKEUP_BY_WLAN
|
||||
* SLEEP_WAKEUP_BY_NFC
|
||||
* SLEEP_WAKEUP_BY_SDIO
|
||||
* SLEEP_WAKEUP_BY_USB
|
||||
* sleep_duration: the system sleep duration in ms, only valid
|
||||
* for SLEEP_WAKEUP_BY_STIMER wake up event.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
void sleep_ex(uint32_t wakeup_event, uint32_t sleep_duration)
|
||||
{
|
||||
u8 wake_ev=0;
|
||||
|
||||
wake_ev = wakeup_event & 0xff;
|
||||
|
||||
if (sleep_duration == 0) {
|
||||
wake_ev &= ~SLP_STIMER;
|
||||
}
|
||||
|
||||
if (wake_ev == 0) {
|
||||
// error: No wakeup event, skip the entering sleep mode
|
||||
return;
|
||||
}
|
||||
SleepCG(wake_ev, sleep_duration, 0, 0); // same as old configuration: SCLK off & SDR no power off
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Clock Gated power saving.
|
||||
* This function just make the system to enter the clock gated
|
||||
* power saving mode and pending on wake up event waitting.
|
||||
* The user application need to configure the peripheral to
|
||||
* generate system wake up event, like GPIO interrupt
|
||||
* , G-Timer timeout, etc. befor entering power saving mode.
|
||||
*
|
||||
* @param wakeup_event: A bit map of wake up event. Available event:
|
||||
* SLEEP_WAKEUP_BY_STIMER
|
||||
* SLEEP_WAKEUP_BY_GTIMER
|
||||
* SLEEP_WAKEUP_BY_GPIO_INT
|
||||
* SLEEP_WAKEUP_BY_WLAN
|
||||
* SLEEP_WAKEUP_BY_NFC
|
||||
* SLEEP_WAKEUP_BY_SDIO
|
||||
* SLEEP_WAKEUP_BY_USB
|
||||
* sleep_duration: the system sleep duration in ms, only valid
|
||||
* for SLEEP_WAKEUP_BY_STIMER wake up event.
|
||||
* clk_sourec_enable: the option for SCLK on(1)/off(0)
|
||||
* sdr_enable: the option for turn off the SDR controller (1:off, 0:on)
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
void sleep_ex_selective(uint32_t wakeup_event, uint32_t sleep_duration, uint32_t clk_sourec_enable, uint32_t sdr_enable)
|
||||
{
|
||||
u8 wake_ev=0;
|
||||
u8 sdr_en=0;
|
||||
u8 clk_source_en=0;
|
||||
|
||||
wake_ev = wakeup_event & 0xff;
|
||||
sdr_en = sdr_enable & 0xff;
|
||||
clk_source_en = clk_sourec_enable & 0xff;
|
||||
|
||||
if (sleep_duration == 0) {
|
||||
wake_ev &= ~SLP_STIMER;
|
||||
}
|
||||
|
||||
if (wake_ev == 0) {
|
||||
// error: No wakeup event, skip the entering sleep mode
|
||||
return;
|
||||
}
|
||||
SleepCG(wake_ev, sleep_duration, clk_source_en, sdr_en);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief To add a wake up event to wake up the system from the
|
||||
* deep standby power saving mode.
|
||||
*
|
||||
* @param wakeup_event: A bit map of wake up event. Available event:
|
||||
* STANDBY_WAKEUP_BY_STIMER
|
||||
* STANDBY_WAKEUP_BY_NFC
|
||||
* STANDBY_WAKEUP_BY_PA5 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PC7 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PD5 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PE3 (GPIO)
|
||||
* sleep_duration_ms: the system sleep duration in ms, only valid
|
||||
* for STANDBY_WAKEUP_BY_STIMER wake up event.
|
||||
* gpio_active: for a GPIO pin to wake up the system by
|
||||
* goes high(1) or low(0)
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
void standby_wakeup_event_add(uint32_t wakeup_event, uint32_t sleep_duration_ms, uint32_t gpio_active)
|
||||
{
|
||||
u32 i;
|
||||
u8 gpio_event;
|
||||
u8 gpio_en;
|
||||
u8 gpio_act;
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_STIMER) {
|
||||
DStandbyWakeupEvent.wakeup_event |= DSTBY_STIMER;
|
||||
DStandbyWakeupEvent.timer_duration = sleep_duration_ms;
|
||||
}
|
||||
|
||||
#if 0
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_DS_TIMER) {
|
||||
DStandbyWakeupEvent.wakeup_event |= DSTBY_TIMER33;
|
||||
// TODO: Sleep Duration ?
|
||||
}
|
||||
#endif
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_NFC) {
|
||||
DStandbyWakeupEvent.wakeup_event |= DSTBY_NFC;
|
||||
}
|
||||
|
||||
gpio_event = STANDBY_WAKEUP_BY_PA5;
|
||||
gpio_en = BIT0;
|
||||
gpio_act = BIT4;
|
||||
// Loop 4 to check 4 GPIO wake up event
|
||||
for (i=0;i<4;i++) {
|
||||
if (wakeup_event & gpio_event) {
|
||||
DStandbyWakeupEvent.wakeup_event |= DSTBY_GPIO;
|
||||
DStandbyWakeupEvent.gpio_option |= gpio_en;
|
||||
if (gpio_active) {
|
||||
// Active High
|
||||
DStandbyWakeupEvent.gpio_option |= gpio_act;
|
||||
}
|
||||
else {
|
||||
// Active Low
|
||||
DStandbyWakeupEvent.gpio_option &= ~gpio_act;
|
||||
}
|
||||
}
|
||||
gpio_event = gpio_event << 1;
|
||||
gpio_en = gpio_en << 1;
|
||||
gpio_act = gpio_act << 1;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To delete a wake up event for wakeing up the system from the
|
||||
* deep standby power saving mode.
|
||||
*
|
||||
* @param wakeup_event: A bit map of wake up event. Available event:
|
||||
* STANDBY_WAKEUP_BY_STIMER
|
||||
* STANDBY_WAKEUP_BY_NFC
|
||||
* STANDBY_WAKEUP_BY_PA5 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PC7 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PD5 (GPIO)
|
||||
* STANDBY_WAKEUP_BY_PE3 (GPIO)
|
||||
* @retval None
|
||||
*/
|
||||
void standby_wakeup_event_del(uint32_t wakeup_event)
|
||||
{
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_STIMER) {
|
||||
DStandbyWakeupEvent.wakeup_event &= ~DSTBY_STIMER;
|
||||
}
|
||||
|
||||
#if 0
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_DS_TIMER) {
|
||||
DStandbyWakeupEvent.wakeup_event &= ~DSTBY_TIMER33;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_NFC) {
|
||||
DStandbyWakeupEvent.wakeup_event &= ~DSTBY_NFC;
|
||||
}
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_PA5) {
|
||||
DStandbyWakeupEvent.gpio_option &= ~BIT0;
|
||||
}
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_PC7) {
|
||||
DStandbyWakeupEvent.gpio_option &= ~BIT1;
|
||||
}
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_PD5) {
|
||||
DStandbyWakeupEvent.gpio_option &= ~BIT2;
|
||||
}
|
||||
|
||||
if (wakeup_event & STANDBY_WAKEUP_BY_PE3) {
|
||||
DStandbyWakeupEvent.gpio_option &= ~BIT3;
|
||||
}
|
||||
|
||||
if ((DStandbyWakeupEvent.gpio_option & 0x0f) == 0) {
|
||||
// All GPIO wake up pin are disabled
|
||||
DStandbyWakeupEvent.wakeup_event &= ~DSTBY_GPIO;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Deep Standby power saving.
|
||||
* The CPU, memory and part fo peripheral power is off when
|
||||
* entering deep standby power saving mode. The program needs
|
||||
* to be reload from the flash at system resume.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
void deepstandby_ex(void)
|
||||
{
|
||||
if ((DStandbyWakeupEvent.wakeup_event & (DSTBY_STIMER|DSTBY_NFC|DSTBY_GPIO)) == 0) {
|
||||
// error: no wakeup event was added, so skip the entering standby power saving
|
||||
return;
|
||||
}
|
||||
|
||||
DeepStandby(DStandbyWakeupEvent.wakeup_event,
|
||||
DStandbyWakeupEvent.timer_duration, DStandbyWakeupEvent.gpio_option);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Deep Sleep power saving mode.
|
||||
* The CPU, memory and peripheral power is off when entering
|
||||
* deep sleep power saving mode. The program needs to be reload
|
||||
* and all peripheral needs be re-configure when system resume.
|
||||
*
|
||||
* @param wakeup_event: A bit map of wake up event. Available event:
|
||||
* DSLEEP_WAKEUP_BY_TIMER
|
||||
* DSLEEP_WAKEUP_BY_GPIO
|
||||
* sleep_duration: the system sleep duration in ms, only valid
|
||||
* for DSLEEP_WAKEUP_BY_TIMER wake up event.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
void deepsleep_ex(uint32_t wakeup_event, uint32_t sleep_duration)
|
||||
{
|
||||
u8 wake_ev=0;
|
||||
|
||||
if ((wakeup_event & DSLEEP_WAKEUP_BY_TIMER) && (sleep_duration > 0)) {
|
||||
// wake up by timeout
|
||||
wake_ev |= DS_TIMER33;
|
||||
}
|
||||
|
||||
if (wakeup_event & DSLEEP_WAKEUP_BY_GPIO) {
|
||||
// wake up by GPIO pin goes high
|
||||
wake_ev |= DS_GPIO;
|
||||
}
|
||||
|
||||
if (wake_ev == 0) {
|
||||
// error: No wake up event, skip entering deep sleep mode
|
||||
return;
|
||||
}
|
||||
DeepSleep (wake_ev, sleep_duration);
|
||||
}
|
||||
66
component/common/mbed/targets/hal/rtl8195a/spdio_api.c
Normal file
66
component/common/mbed/targets/hal/rtl8195a/spdio_api.c
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
#include <spdio_api.h>
|
||||
|
||||
struct spdio_t *g_spdio_priv = NULL;
|
||||
|
||||
s8 spdio_rx_done_cb(void *padapter, u8 *data, u16 offset, u16 pktsize, u8 type){
|
||||
struct spdio_buf_t *buf = (struct spdio_buf_t *)data;
|
||||
struct spdio_t *obj = (struct spdio_t *)padapter;
|
||||
|
||||
if(obj)
|
||||
return obj->rx_done_cb(obj, buf, (u8 *)(buf->buf_addr+offset), pktsize, type);
|
||||
else
|
||||
SPDIO_API_PRINTK("spdio rx done callback function is null!");
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
s8 spdio_tx_done_cb(void *padapter, u8 *data, u16 offset, u16 pktsize, u8 type){
|
||||
struct spdio_t *obj = (struct spdio_t *)padapter;
|
||||
struct spdio_buf_t *buf = (struct spdio_buf_t *)data;
|
||||
if(obj)
|
||||
return obj->tx_done_cb(obj, buf);
|
||||
else
|
||||
SPDIO_API_PRINTK("spdio tx done callback function is null!");
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
s8 spdio_tx(struct spdio_t *obj, struct spdio_buf_t *pbuf){
|
||||
return HalSdioRxCallback((u8 *)pbuf, 0, pbuf->buf_size, pbuf->type);
|
||||
}
|
||||
|
||||
void spdio_structinit(struct spdio_t *obj){
|
||||
obj->rx_bd_bufsz = SPDIO_RX_BUFSZ_ALIGN(2048+24); //extra 24 bytes for sdio header
|
||||
obj->rx_bd_num = 24;
|
||||
obj->tx_bd_num = 24;
|
||||
obj->priv = NULL;
|
||||
obj->rx_buf = NULL;
|
||||
obj->rx_done_cb = NULL;
|
||||
obj->tx_done_cb = NULL;
|
||||
}
|
||||
|
||||
void spdio_init(struct spdio_t *obj)
|
||||
{
|
||||
if(obj == NULL){
|
||||
SPDIO_API_PRINTK("spdio obj is NULL, spdio init failed!");
|
||||
return;
|
||||
}
|
||||
if((obj->rx_bd_num == 0) ||(obj->rx_bd_bufsz == 0) || (obj->rx_bd_bufsz%64)
|
||||
||(obj->tx_bd_num == 0) ||(obj->tx_bd_num%2)||(obj->rx_buf == NULL))
|
||||
{
|
||||
SPDIO_API_PRINTK("spdio obj resource isn't correctly inited, spdio init failed!");
|
||||
return;
|
||||
}
|
||||
g_spdio_priv = obj;
|
||||
HalSdioInit();
|
||||
HalSdioRegisterTxCallback(spdio_rx_done_cb, (void *)obj);
|
||||
HalSdioRegisterRxDoneCallback(spdio_tx_done_cb, (void *)obj);
|
||||
}
|
||||
|
||||
void spdio_deinit(struct spdio_t *obj)
|
||||
{
|
||||
if(obj == NULL){
|
||||
SPDIO_API_PRINTK("spdio obj is NULL, spdio deinit failed");
|
||||
return;
|
||||
}
|
||||
HalSdioDeInit();
|
||||
g_spdio_priv = NULL;
|
||||
}
|
||||
1105
component/common/mbed/targets/hal/rtl8195a/spi_api.c
Normal file
1105
component/common/mbed/targets/hal/rtl8195a/spi_api.c
Normal file
File diff suppressed because it is too large
Load diff
226
component/common/mbed/targets/hal/rtl8195a/sys_api.c
Normal file
226
component/common/mbed/targets/hal/rtl8195a/sys_api.c
Normal file
|
|
@ -0,0 +1,226 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek
|
||||
* All rights reserved.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "cmsis.h"
|
||||
#include "sys_api.h"
|
||||
#include "flash_api.h"
|
||||
#include "osdep_api.h"
|
||||
#include "device_lock.h"
|
||||
|
||||
#define OTA_Signature "81958711"
|
||||
#define OTA_Clear "00000000"
|
||||
#define OTA_Signature_len 8
|
||||
#define OTA_Signature_offset 8
|
||||
#define OTA_valid_offset 0x100000
|
||||
#undef printf
|
||||
#define printf DiagPrintf
|
||||
|
||||
#if !defined(__ICCARM__)
|
||||
#define memcmp(dst, src, sz) _memcmp(dst, src, sz)
|
||||
#define memset(dst, val, sz) _memset(dst, val, sz)
|
||||
#define memcpy(dst, src, sz) _memcpy(dst, src, sz)
|
||||
#endif // #if !defined(__ICCARM__)
|
||||
|
||||
extern VOID HalJtagPinOff(VOID);
|
||||
|
||||
extern void HalInitLogUart(void);
|
||||
extern void HalDeinitLogUart(void);
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
extern u8 IsSdrPowerOn();
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Turn off the JTAG function
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void sys_jtag_off(void)
|
||||
{
|
||||
HalJtagPinOff();
|
||||
}
|
||||
|
||||
void sys_clear_ota_signature(void)
|
||||
{
|
||||
flash_t flash;
|
||||
u32 ota_offset=0xFFFFFFFF, part1_offset, part2_offset;
|
||||
u8 signature[OTA_Signature_len+1];
|
||||
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, 0x18, 4, (u8*)&part1_offset);
|
||||
part1_offset = (part1_offset&0xFFFF) * 1024;
|
||||
flash_stream_read(&flash, part1_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
if(!memcmp((char const*)signature, OTA_Signature, OTA_Signature_len)){
|
||||
ota_offset = part1_offset;
|
||||
}
|
||||
|
||||
flash_stream_read(&flash, FLASH_SYSTEM_DATA_ADDR, 4, (u8*)&part2_offset);
|
||||
flash_stream_read(&flash, part2_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
if(!memcmp((char const*)signature, OTA_Signature, OTA_Signature_len)){
|
||||
ota_offset = part2_offset;
|
||||
}
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
printf("\n\rOTA offset = 0x%08X", ota_offset);
|
||||
|
||||
if(ota_offset < OTA_valid_offset){
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, ota_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
signature[OTA_Signature_len] = '\0';
|
||||
printf("\n\rSignature = %s", signature);
|
||||
if(!memcmp((char const*)signature, OTA_Signature, OTA_Signature_len)){
|
||||
memcpy((char*)signature, OTA_Clear, OTA_Signature_len);
|
||||
flash_stream_write(&flash, ota_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
flash_stream_read(&flash, ota_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
signature[OTA_Signature_len] = '\0';
|
||||
printf("\n\rSignature = %s", signature);
|
||||
printf("\n\rClear OTA signature success.");
|
||||
}
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void sys_recover_ota_signature(void)
|
||||
{
|
||||
flash_t flash;
|
||||
u32 ota_offset=0xFFFFFFFF, part1_offset, part2_offset;
|
||||
u8 signature[OTA_Signature_len+1];
|
||||
u8* pbuf;
|
||||
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, 0x18, 4, (u8*)&part1_offset);
|
||||
part1_offset = (part1_offset&0xFFFF) * 1024;
|
||||
flash_stream_read(&flash, part1_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
if(!memcmp((char const*)signature, OTA_Clear, OTA_Signature_len)){
|
||||
ota_offset = part1_offset;
|
||||
}
|
||||
|
||||
flash_stream_read(&flash, FLASH_SYSTEM_DATA_ADDR, 4, (u8*)&part2_offset);
|
||||
flash_stream_read(&flash, part2_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
if(!memcmp((char const*)signature, OTA_Clear, OTA_Signature_len)){
|
||||
ota_offset = part2_offset;
|
||||
}
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
printf("\n\rOTA offset = 0x%08X", ota_offset);
|
||||
|
||||
if(ota_offset < OTA_valid_offset){
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, ota_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
signature[OTA_Signature_len] = '\0';
|
||||
printf("\n\rSignature = %s", signature);
|
||||
if(!memcmp((char const*)signature, OTA_Clear, OTA_Signature_len)){
|
||||
// backup
|
||||
pbuf = RtlMalloc(FLASH_SECTOR_SIZE);
|
||||
if(!pbuf) return;
|
||||
flash_stream_read(&flash, ota_offset, FLASH_SECTOR_SIZE, pbuf);
|
||||
memcpy((char*)pbuf+OTA_Signature_offset, OTA_Signature, OTA_Signature_len);
|
||||
flash_erase_sector(&flash, FLASH_RESERVED_DATA_BASE);
|
||||
flash_stream_write(&flash, FLASH_RESERVED_DATA_BASE, FLASH_SECTOR_SIZE, pbuf);
|
||||
// Write
|
||||
flash_stream_read(&flash, FLASH_RESERVED_DATA_BASE, FLASH_SECTOR_SIZE, pbuf);
|
||||
flash_erase_sector(&flash, ota_offset);
|
||||
flash_stream_write(&flash, ota_offset, FLASH_SECTOR_SIZE, pbuf);
|
||||
flash_stream_read(&flash, ota_offset+OTA_Signature_offset, OTA_Signature_len, signature);
|
||||
signature[OTA_Signature_len] = '\0';
|
||||
printf("\n\rSignature = %s", signature);
|
||||
RtlMfree(pbuf, FLASH_SECTOR_SIZE);
|
||||
printf("\n\rRecover OTA signature success.");
|
||||
}
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void sys_log_uart_on(void)
|
||||
{
|
||||
HalInitLogUart();
|
||||
}
|
||||
|
||||
void sys_log_uart_off(void)
|
||||
{
|
||||
HalDeinitLogUart();
|
||||
}
|
||||
|
||||
void sys_adc_calibration(u8 write, u16 *offset, u16 *gain)
|
||||
{
|
||||
flash_t flash;
|
||||
u8* pbuf;
|
||||
|
||||
if(write){
|
||||
// backup
|
||||
pbuf = RtlMalloc(FLASH_SECTOR_SIZE);
|
||||
if(!pbuf) return;
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, FLASH_SYSTEM_DATA_ADDR, FLASH_SECTOR_SIZE, pbuf);
|
||||
memcpy((char*)pbuf+FLASH_ADC_PARA_OFFSET, offset, 2);
|
||||
memcpy((char*)pbuf+FLASH_ADC_PARA_OFFSET+2, gain, 2);
|
||||
flash_erase_sector(&flash, FLASH_RESERVED_DATA_BASE);
|
||||
flash_stream_write(&flash, FLASH_RESERVED_DATA_BASE, FLASH_SECTOR_SIZE, pbuf);
|
||||
// Write
|
||||
flash_stream_read(&flash, FLASH_RESERVED_DATA_BASE, FLASH_SECTOR_SIZE, pbuf);
|
||||
flash_erase_sector(&flash, FLASH_SYSTEM_DATA_ADDR);
|
||||
flash_stream_write(&flash, FLASH_SYSTEM_DATA_ADDR, FLASH_SECTOR_SIZE, pbuf);
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
RtlMfree(pbuf, FLASH_SECTOR_SIZE);
|
||||
printf("\n\rStore ADC calibration success.");
|
||||
}
|
||||
device_mutex_lock(RT_DEV_LOCK_FLASH);
|
||||
flash_stream_read(&flash, FLASH_ADC_PARA_BASE, 2, (u8*)offset);
|
||||
flash_stream_read(&flash, FLASH_ADC_PARA_BASE+2, 2, (u8*)gain);
|
||||
device_mutex_unlock(RT_DEV_LOCK_FLASH);
|
||||
|
||||
printf("\n\rADC offset = 0x%04X, gain = 0x%04X.\n\r", *offset, *gain);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief system software reset
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void sys_reset(void)
|
||||
{
|
||||
// Set processor clock to default before system reset
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, 0x14, 0x00000021);
|
||||
HalDelayUs(100*1000);
|
||||
|
||||
// Cortex-M3 SCB->AIRCR
|
||||
HAL_WRITE32(0xE000ED00, 0x0C, (0x5FA << 16) | // VECTKEY
|
||||
(HAL_READ32(0xE000ED00, 0x0C) & (7 << 8)) | // PRIGROUP
|
||||
(1 << 2)); // SYSRESETREQ
|
||||
}
|
||||
|
||||
u8 sys_is_sdram_power_on(void)
|
||||
{
|
||||
u8 ison = 0;
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
ison = IsSdrPowerOn();
|
||||
#endif
|
||||
|
||||
return ison;
|
||||
}
|
||||
|
||||
void sys_sdram_off(void)
|
||||
{
|
||||
#if defined ( __ICCARM__ )
|
||||
if (sys_is_sdram_power_on()) {
|
||||
SdrPowerOff();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
156
component/common/mbed/targets/hal/rtl8195a/timer_api.c
Normal file
156
component/common/mbed/targets/hal/rtl8195a/timer_api.c
Normal file
|
|
@ -0,0 +1,156 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
//#include <stddef.h>
|
||||
#include "timer_api.h"
|
||||
//#include "PeripheralNames.h"
|
||||
|
||||
#if CONFIG_TIMER_EN
|
||||
|
||||
extern HAL_TIMER_OP HalTimerOp;
|
||||
|
||||
extern HAL_Status HalTimerInitRtl8195a_Patch(
|
||||
IN VOID *Data
|
||||
);
|
||||
|
||||
static void gtimer_timeout_handler (uint32_t tid)
|
||||
{
|
||||
gtimer_t *obj = (gtimer_t *)tid;
|
||||
gtimer_irq_handler handler;
|
||||
u8 timer_id = obj->hal_gtimer_adp.TimerId;
|
||||
|
||||
if (obj->handler != NULL) {
|
||||
handler = (gtimer_irq_handler)obj->handler;
|
||||
handler(obj->hid);
|
||||
}
|
||||
|
||||
if (!obj->is_periodcal) {
|
||||
gtimer_stop(obj);
|
||||
}
|
||||
|
||||
if(timer_id < 2) {
|
||||
// Timer0 | Timer1: clear ISR here
|
||||
// Timer 2~7 ISR will be cleared in HAL
|
||||
HalTimerClearIsr(timer_id);
|
||||
}
|
||||
}
|
||||
|
||||
void gtimer_init (gtimer_t *obj, uint32_t tid)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &(obj->hal_gtimer_adp);
|
||||
|
||||
if ((tid == 1) || (tid == 6) || (tid == 7)) {
|
||||
DBG_TIMER_ERR("gtimer_init: This timer is reserved for HAL driver\r\n", tid);
|
||||
return;
|
||||
}
|
||||
|
||||
if (tid > GTIMER_MAX) {
|
||||
DBG_TIMER_ERR("gtimer_init: Invalid TimerId=%d\r\n", tid);
|
||||
return;
|
||||
}
|
||||
|
||||
pTimerAdapter->IrqDis = 0; // Enable Irq @ initial
|
||||
pTimerAdapter->IrqHandle.IrqFun = (IRQ_FUN) gtimer_timeout_handler;
|
||||
if(tid == 0) {
|
||||
pTimerAdapter->IrqHandle.IrqNum = TIMER0_IRQ;
|
||||
} else if(tid == 1) {
|
||||
pTimerAdapter->IrqHandle.IrqNum = TIMER1_IRQ;
|
||||
} else {
|
||||
pTimerAdapter->IrqHandle.IrqNum = TIMER2_7_IRQ;
|
||||
}
|
||||
pTimerAdapter->IrqHandle.Priority = 0;
|
||||
pTimerAdapter->IrqHandle.Data = (u32)obj;
|
||||
pTimerAdapter->TimerId = (u8)tid;
|
||||
pTimerAdapter->TimerIrqPriority = 0;
|
||||
pTimerAdapter->TimerLoadValueUs = 0xFFFFFFFF; // Just a whatever value
|
||||
pTimerAdapter->TimerMode = USER_DEFINED;
|
||||
|
||||
HalTimerInit ((VOID*) pTimerAdapter);
|
||||
// gtimer_stop(obj); // HAL Initial will let the timer started, just stop it after initial
|
||||
}
|
||||
|
||||
void gtimer_deinit (gtimer_t *obj)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &(obj->hal_gtimer_adp);
|
||||
|
||||
HalTimerDeInit((void*)pTimerAdapter);
|
||||
}
|
||||
|
||||
uint32_t gtimer_read_tick (gtimer_t *obj)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &obj->hal_gtimer_adp;
|
||||
|
||||
return (HalTimerOp.HalTimerReadCount(pTimerAdapter->TimerId));
|
||||
}
|
||||
|
||||
uint64_t gtimer_read_us (gtimer_t *obj)
|
||||
{
|
||||
uint64_t time_us;
|
||||
|
||||
time_us = gtimer_read_tick(obj)*1000000/32768;
|
||||
|
||||
return (time_us);
|
||||
}
|
||||
|
||||
void gtimer_reload (gtimer_t *obj, uint32_t duration_us)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &obj->hal_gtimer_adp;
|
||||
|
||||
HalTimerReLoad(pTimerAdapter->TimerId, duration_us);
|
||||
}
|
||||
|
||||
|
||||
void gtimer_start (gtimer_t *obj)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &obj->hal_gtimer_adp;
|
||||
u8 TimerId = pTimerAdapter->TimerId;
|
||||
|
||||
HalTimerEnable(TimerId);
|
||||
#if 0
|
||||
HalTimerOp.HalTimerEn(pTimerAdapter->TimerId);
|
||||
|
||||
HAL_TIMER_WRITE32((TIMER_INTERVAL*TimerId + TIMER_CTL_REG_OFF),
|
||||
HAL_TIMER_READ32(TIMER_INTERVAL*TimerId + TIMER_CTL_REG_OFF) | (BIT0));
|
||||
#endif
|
||||
}
|
||||
|
||||
void gtimer_start_one_shout (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid)
|
||||
{
|
||||
obj->is_periodcal = _FALSE;
|
||||
obj->handler = handler;
|
||||
obj->hid = hid;
|
||||
gtimer_reload(obj, duration_us);
|
||||
gtimer_start(obj);
|
||||
}
|
||||
|
||||
void gtimer_start_periodical (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid)
|
||||
{
|
||||
obj->is_periodcal = _TRUE;
|
||||
obj->handler = handler;
|
||||
obj->hid = hid;
|
||||
if (duration_us > GTIMER_TICK_US) {
|
||||
// reload will takes extra 1 tick
|
||||
duration_us -= GTIMER_TICK_US;
|
||||
}
|
||||
gtimer_reload(obj, duration_us);
|
||||
gtimer_start(obj);
|
||||
}
|
||||
|
||||
void gtimer_stop (gtimer_t *obj)
|
||||
{
|
||||
PTIMER_ADAPTER pTimerAdapter = &obj->hal_gtimer_adp;
|
||||
|
||||
// obj->handler = NULL;
|
||||
// HalTimerOp.HalTimerDis(pTimerAdapter->TimerId);
|
||||
HalTimerDisable(pTimerAdapter->TimerId);
|
||||
}
|
||||
|
||||
#endif // end of "#if CONFIG_TIMER_EN"
|
||||
37
component/common/mbed/targets/hal/rtl8195a/timer_api.h
Normal file
37
component/common/mbed/targets/hal/rtl8195a/timer_api.h
Normal file
|
|
@ -0,0 +1,37 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************/
|
||||
#ifndef MBED_EXT_TIMER_API_EXT_H
|
||||
#define MBED_EXT_TIMER_API_EXT_H
|
||||
|
||||
#include "device.h"
|
||||
//#include "rtl8195a.h"
|
||||
|
||||
typedef void (*gtimer_irq_handler)(uint32_t id);
|
||||
|
||||
typedef struct gtimer_s gtimer_t;
|
||||
enum {
|
||||
TIMER0 = 2, // GTimer 2, share with PWM_3
|
||||
TIMER1 = 3, // GTimer 3, share with PWM_0
|
||||
TIMER2 = 4, // GTimer 4, share with PWM_1
|
||||
TIMER3 = 5, // GTimer 5, share with PWM_2
|
||||
TIMER4 = 0, // GTimer 0, share with software-RTC functions
|
||||
|
||||
GTIMER_MAX = 5
|
||||
};
|
||||
|
||||
void gtimer_init (gtimer_t *obj, uint32_t tid);
|
||||
void gtimer_deinit (gtimer_t *obj);
|
||||
uint32_t gtimer_read_tick (gtimer_t *obj);
|
||||
uint64_t gtimer_read_us (gtimer_t *obj);
|
||||
void gtimer_reload (gtimer_t *obj, uint32_t duration_us);
|
||||
void gtimer_start (gtimer_t *obj);
|
||||
void gtimer_start_one_shout (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
|
||||
void gtimer_start_periodical (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
|
||||
void gtimer_stop (gtimer_t *obj);
|
||||
|
||||
#endif
|
||||
136
component/common/mbed/targets/hal/rtl8195a/us_ticker.c
Normal file
136
component/common/mbed/targets/hal/rtl8195a/us_ticker.c
Normal file
|
|
@ -0,0 +1,136 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include <stddef.h>
|
||||
#include "us_ticker_api.h"
|
||||
#include "PeripheralNames.h"
|
||||
|
||||
#define TICK_READ_FROM_CPU 0 // 1: read tick from CPU, 0: read tick from G-Timer
|
||||
#define SYS_TIM_ID 1 // the G-Timer ID for System
|
||||
#define APP_TIM_ID 6 // the G-Timer ID for Application
|
||||
|
||||
static int us_ticker_inited = 0;
|
||||
static TIMER_ADAPTER TimerAdapter;
|
||||
|
||||
extern HAL_TIMER_OP HalTimerOp;
|
||||
|
||||
VOID _us_ticker_irq_handler(IN VOID *Data)
|
||||
{
|
||||
us_ticker_irq_handler();
|
||||
}
|
||||
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
|
||||
if (us_ticker_inited) return;
|
||||
us_ticker_inited = 1;
|
||||
|
||||
// Initial a G-Timer
|
||||
TimerAdapter.IrqDis = 1; // Disable Irq
|
||||
TimerAdapter.IrqHandle.IrqFun = (IRQ_FUN) _us_ticker_irq_handler;
|
||||
TimerAdapter.IrqHandle.IrqNum = TIMER2_7_IRQ;
|
||||
TimerAdapter.IrqHandle.Priority = 10;
|
||||
TimerAdapter.IrqHandle.Data = (u32)NULL;
|
||||
TimerAdapter.TimerId = APP_TIM_ID;
|
||||
TimerAdapter.TimerIrqPriority = 0;
|
||||
TimerAdapter.TimerLoadValueUs = 1;
|
||||
TimerAdapter.TimerMode = FREE_RUN_MODE; // Countdown Free Run
|
||||
|
||||
HalTimerOp.HalTimerInit((VOID*) &TimerAdapter);
|
||||
|
||||
DBG_TIMER_INFO("%s: Timer_Id=%d\n", __FUNCTION__, APP_TIM_ID);
|
||||
}
|
||||
|
||||
#if (!TICK_READ_FROM_CPU) || !defined(PLATFORM_FREERTOS)
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
uint32_t tick_cnt;
|
||||
uint32_t ticks_125ms;
|
||||
uint32_t ticks_remain;
|
||||
uint64_t us_tick;
|
||||
|
||||
//1 Our G-timer resolution is ~31 us (1/32K), and is a countdown timer
|
||||
// if (!us_ticker_inited) {
|
||||
// us_ticker_init();
|
||||
// }
|
||||
tick_cnt = HalTimerOp.HalTimerReadCount(SYS_TIM_ID);
|
||||
tick_cnt = 0xffffffff - tick_cnt; // it's a down counter
|
||||
ticks_125ms = tick_cnt/(GTIMER_CLK_HZ/8);
|
||||
ticks_remain = tick_cnt - (ticks_125ms*(GTIMER_CLK_HZ/8));
|
||||
us_tick = ticks_125ms * 125000;
|
||||
us_tick += (ticks_remain * 1000000)/GTIMER_CLK_HZ;
|
||||
return ((uint32_t)us_tick);
|
||||
}
|
||||
#else
|
||||
// if the system tick didn't be initialed, call delay function may got system hang
|
||||
#define OS_CLOCK (200000000UL/6*5) // CPU clock = 166.66 MHz
|
||||
#define OS_TICK 1000 // OS ticks 1000/sec
|
||||
#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
|
||||
#define NVIC_ST_CTRL (*((volatile uint32_t *)0xE000E010))
|
||||
#define NVIC_ST_RELOAD (*((volatile uint32_t *)0xE000E014))
|
||||
#define NVIC_ST_CURRENT (*((volatile uint32_t *)0xE000E018))
|
||||
|
||||
extern uint32_t xTaskGetTickCount( void );
|
||||
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
uint32_t tick_cnt;
|
||||
uint32_t us_tick, ms;
|
||||
static uint32_t last_us_tick=0;
|
||||
|
||||
ms = xTaskGetTickCount();
|
||||
us_tick = (uint32_t)(ms*1000);
|
||||
|
||||
tick_cnt = OS_TRV - NVIC_ST_CURRENT;
|
||||
us_tick += (uint32_t)((tick_cnt*1000)/(OS_TRV+1) );
|
||||
|
||||
if ( (last_us_tick > us_tick) && (last_us_tick < 0xFFFFFC00) ) {
|
||||
us_tick += 1000;
|
||||
}
|
||||
last_us_tick = us_tick;
|
||||
return us_tick;
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
uint32_t cur_time_us;
|
||||
uint32_t time_def;
|
||||
|
||||
cur_time_us = us_ticker_read();
|
||||
if ((uint32_t)timestamp >= cur_time_us) {
|
||||
time_def = (uint32_t)timestamp - cur_time_us;
|
||||
}
|
||||
else {
|
||||
time_def = 0xffffffff - cur_time_us + (uint32_t)timestamp;
|
||||
}
|
||||
|
||||
if (time_def < TIMER_TICK_US) {
|
||||
time_def = TIMER_TICK_US; // at least 1 tick
|
||||
}
|
||||
HalTimerDeInit (&TimerAdapter);
|
||||
TimerAdapter.IrqDis = 0; // Enable Irq
|
||||
TimerAdapter.TimerLoadValueUs = time_def;
|
||||
TimerAdapter.TimerMode = USER_DEFINED; // Countdown Free Run
|
||||
|
||||
HalTimerOp.HalTimerInit((VOID*) &TimerAdapter);
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
HalTimerOp.HalTimerIrqClear((u32)TimerAdapter.TimerId);
|
||||
}
|
||||
94
component/common/mbed/targets/hal/rtl8195a/wdt_api.c
Normal file
94
component/common/mbed/targets/hal/rtl8195a/wdt_api.c
Normal file
|
|
@ -0,0 +1,94 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek
|
||||
* All rights reserved.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "wdt_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
extern VOID WDGInitial(u32 Period);
|
||||
extern VOID WDGStart(VOID);
|
||||
extern VOID WDGStop(VOID);
|
||||
extern VOID WDGRefresh(VOID);
|
||||
extern VOID WDGIrqInitial(VOID);
|
||||
extern VOID WDGIrqCallBackReg(VOID *CallBack, u32 Id);
|
||||
|
||||
/**
|
||||
* @brief Initial the watch dog time setting
|
||||
*
|
||||
* @param timeout_ms: the watch-dog timer timeout value, in ms.
|
||||
* default action of timeout is to reset the whole system.
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void watchdog_init(uint32_t timeout_ms)
|
||||
{
|
||||
WDGInitial(timeout_ms);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the watchdog counting
|
||||
*
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void watchdog_start(void)
|
||||
{
|
||||
WDGStart();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop the watchdog counting
|
||||
*
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void watchdog_stop(void)
|
||||
{
|
||||
WDGStop();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Refresh the watchdog counting to prevent WDT timeout
|
||||
*
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void watchdog_refresh(void)
|
||||
{
|
||||
WDGRefresh();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Switch the watchdog timer to interrupt mode and
|
||||
* register a watchdog timer timeout interrupt handler.
|
||||
* The interrupt handler will be called when the watch-dog
|
||||
* timer is timeout.
|
||||
*
|
||||
* @param handler: the callback function for WDT timeout interrupt.
|
||||
* id: the parameter for the callback function
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void watchdog_irq_init(wdt_irq_handler handler, uint32_t id)
|
||||
{
|
||||
WDGIrqCallBackReg((VOID*)handler, (u32)id);
|
||||
WDGIrqInitial();
|
||||
}
|
||||
|
||||
|
||||
61
component/common/mbed/targets/hal/rtl8711b/PeripheralNames.h
Normal file
61
component/common/mbed/targets/hal/rtl8711b/PeripheralNames.h
Normal file
|
|
@ -0,0 +1,61 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PERIPHERALNAMES_H
|
||||
#define MBED_PERIPHERALNAMES_H
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
UART_0 = (int)UART0_DEV,
|
||||
UART_1 = (int)UART1_DEV,
|
||||
UART_2 = (int)UART2_DEV,
|
||||
} UARTName;
|
||||
|
||||
typedef enum {
|
||||
ADC0_0 = 0,
|
||||
ADC0_1,
|
||||
ADC0_2,
|
||||
ADC0_3
|
||||
} ADCName;
|
||||
|
||||
typedef enum {
|
||||
SPI_0 = (int)SPI0_DEV,
|
||||
SPI_1 = (int)SPI1_DEV,
|
||||
} SPIName;
|
||||
|
||||
typedef enum {
|
||||
I2C_0 = (int)I2C0_DEV,
|
||||
I2C_1 = (int)I2C1_DEV,
|
||||
} I2CName;
|
||||
|
||||
typedef enum {
|
||||
PWM_0 = 1,
|
||||
PWM_1,
|
||||
PWM_2,
|
||||
PWM_3,
|
||||
PWM_4,
|
||||
PWM_5
|
||||
} PWMName;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
93
component/common/mbed/targets/hal/rtl8711b/PinNames.h
Normal file
93
component/common/mbed/targets/hal/rtl8711b/PinNames.h
Normal file
|
|
@ -0,0 +1,93 @@
|
|||
|
||||
#ifndef _PINNAMES_H_
|
||||
#define _PINNAMES_H_
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define PIN_DATA(PUPD, FUNC) (((PUPD) << 6) | (FUNC))
|
||||
#define PIN_PIN_PUPD(X) ((X) & 0x03) /* PullNone/PullUp/PullDown */
|
||||
#define PIN_FUNC(X) ((X) & 0x0F) /* PINMUX_FUNCTION_XXXX */
|
||||
|
||||
typedef enum {
|
||||
PORT_A = 0,
|
||||
PORT_B = 1,
|
||||
} GPIO_PORT;
|
||||
|
||||
typedef enum {
|
||||
PIN_INPUT=0,
|
||||
PIN_OUTPUT
|
||||
} PinDirection;
|
||||
|
||||
/* (((port)<<5)|(pin)) */
|
||||
typedef enum {
|
||||
PA_0 = (PORT_A<<5|0),
|
||||
PA_1 = (PORT_A<<5|1),
|
||||
PA_2 = (PORT_A<<5|2),
|
||||
PA_3 = (PORT_A<<5|3),
|
||||
PA_4 = (PORT_A<<5|4),
|
||||
PA_5 = (PORT_A<<5|5),
|
||||
PA_6 = (PORT_A<<5|6),
|
||||
PA_7 = (PORT_A<<5|7),
|
||||
PA_8 = (PORT_A<<5|8),
|
||||
PA_9 = (PORT_A<<5|9),
|
||||
PA_10 = (PORT_A<<5|10),
|
||||
PA_11 = (PORT_A<<5|11),
|
||||
PA_12 = (PORT_A<<5|12),
|
||||
PA_13 = (PORT_A<<5|13),
|
||||
PA_14 = (PORT_A<<5|14),
|
||||
PA_15 = (PORT_A<<5|15),
|
||||
PA_16 = (PORT_A<<5|16),
|
||||
PA_17 = (PORT_A<<5|17),
|
||||
PA_18 = (PORT_A<<5|18),
|
||||
PA_19 = (PORT_A<<5|19),
|
||||
PA_20 = (PORT_A<<5|20),
|
||||
PA_21 = (PORT_A<<5|21),
|
||||
PA_22 = (PORT_A<<5|22),
|
||||
PA_23 = (PORT_A<<5|23),
|
||||
PA_24 = (PORT_A<<5|24),
|
||||
PA_25 = (PORT_A<<5|25),
|
||||
PA_26 = (PORT_A<<5|26),
|
||||
PA_27 = (PORT_A<<5|27),
|
||||
PA_28 = (PORT_A<<5|28),
|
||||
PA_29 = (PORT_A<<5|29),
|
||||
PA_30 = (PORT_A<<5|30),
|
||||
PA_31 = (PORT_A<<5|31),
|
||||
|
||||
PB_0 = (PORT_B<<5|0),
|
||||
PB_1 = (PORT_B<<5|1),
|
||||
PB_2 = (PORT_B<<5|2),
|
||||
PB_3 = (PORT_B<<5|3),
|
||||
PB_4 = (PORT_B<<5|4),
|
||||
PB_5 = (PORT_B<<5|5),
|
||||
PB_6 = (PORT_B<<5|6),
|
||||
PB_7 = (PORT_B<<5|7),
|
||||
PB_8 = (PORT_B<<5|8),
|
||||
|
||||
VBAT_MEAS = (0x7<<5|2),
|
||||
AD_1 = PA_19, //CH1
|
||||
AD_2 = VBAT_MEAS, //CH2
|
||||
AD_3 = PA_20, //CH3
|
||||
|
||||
// Not connected
|
||||
NC = (uint32_t)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
typedef enum {
|
||||
PullNone = 0, //IN HIGHZ
|
||||
PullUp = 1,
|
||||
PullDown = 2,
|
||||
OpenDrain = 3, //OUT OpenDrain
|
||||
PullDefault = PullNone
|
||||
} PinMode;
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
31
component/common/mbed/targets/hal/rtl8711b/PortNames.h
Normal file
31
component/common/mbed/targets/hal/rtl8711b/PortNames.h
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PORTNAMES_H
|
||||
#define MBED_PORTNAMES_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
PortA = 0,
|
||||
PortB = 1,
|
||||
} PortName;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
197
component/common/mbed/targets/hal/rtl8711b/analogin_api.c
Normal file
197
component/common/mbed/targets/hal/rtl8711b/analogin_api.c
Normal file
|
|
@ -0,0 +1,197 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file analogin_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for ADC.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
#include "analogin_api.h"
|
||||
|
||||
#include "pinmap.h"
|
||||
|
||||
static ADC_InitTypeDef AdcInitStruct;
|
||||
|
||||
extern u32 ConfigDebugErr;
|
||||
extern u32 ConfigDebuginfo;
|
||||
|
||||
typedef enum {
|
||||
ADC_CH0 = 0,
|
||||
ADC_CH1 = 1,
|
||||
ADC_CH2 = 2,
|
||||
ADC_CH3 = 3,
|
||||
} ADC_CH;
|
||||
|
||||
static const PinMap PinMap_ADC[] = {
|
||||
{PA_19, ADC_CH1, 0},
|
||||
{VBAT_MEAS, ADC_CH2, 0},
|
||||
{PA_20, ADC_CH3, 0},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Read 8 bytes data from ADC.
|
||||
* @param pBuf: 8 bytes buffer for data read.
|
||||
* @note poll mode will be used in this function.
|
||||
* @retval None
|
||||
*/
|
||||
void ADC_ReceiveBuf_ACUT(u32 *pBuf)
|
||||
{
|
||||
u32 isr = ADC_GetISR();
|
||||
ADC_TypeDef *adc = ADC;
|
||||
u32 AdcTempDat;
|
||||
|
||||
/* Clear ADC Status */
|
||||
ADC_INTClear();
|
||||
ADC_INTConfig(BIT_ADC_FIFO_FULL_EN|BIT_ADC_FIFO_RD_REQ_EN, ENABLE);
|
||||
|
||||
ADC_Cmd(ENABLE);
|
||||
|
||||
/* B CUT ADD patch for reset fail */
|
||||
AdcTempDat = adc->ANAPAR_AD1;
|
||||
AdcTempDat |= BIT(0);
|
||||
adc->ANAPAR_AD1 = AdcTempDat;
|
||||
|
||||
while (1) {
|
||||
isr = ADC_GetISR();
|
||||
if (isr & (BIT_ADC_FIFO_FULL | BIT_ADC_FIFO_RD_REQ)) {
|
||||
*pBuf = (u32)ADC_Read();
|
||||
*(pBuf+1)= (u32)ADC_Read();
|
||||
|
||||
ADC_INTClear();
|
||||
ADC_INTConfig(BIT_ADC_FIFO_FULL_EN|BIT_ADC_FIFO_RD_REQ_EN, DISABLE);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* B CUT ADD patch for reset fail */
|
||||
AdcTempDat = adc->ANAPAR_AD1;
|
||||
AdcTempDat &= ~BIT(0);
|
||||
adc->ANAPAR_AD1 = AdcTempDat;
|
||||
|
||||
ADC_Cmd(DISABLE);
|
||||
|
||||
/* Clear ADC Status */
|
||||
ADC_INTClear();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the ADC device, include clock/function/ADC registers.
|
||||
* @param obj: adc object define in application software.
|
||||
* @param pin: adc PinName according to pinmux spec.
|
||||
* @retval none
|
||||
*/
|
||||
void analogin_init(analogin_t *obj, PinName pin)
|
||||
{
|
||||
uint32_t adc_idx;
|
||||
|
||||
ConfigDebugErr &= (~(_DBG_ADC_|_DBG_GDMA_));
|
||||
ConfigDebugInfo&= (~(_DBG_ADC_|_DBG_GDMA_));
|
||||
|
||||
adc_idx = pinmap_peripheral(pin, PinMap_ADC);
|
||||
DBG_8195A("analogin_init [%x:%x ]\n", pin, adc_idx);
|
||||
assert_param(adc_idx != NC);
|
||||
|
||||
/* Set ADC Device Number */
|
||||
obj->adc_idx = adc_idx;
|
||||
|
||||
/* Load ADC default value */
|
||||
ADC_InitStruct(&AdcInitStruct);
|
||||
ADC_AnaparAd[1] = 0x81004;
|
||||
|
||||
/* Init ADC now */
|
||||
/* ADC Interrupt disable, poll mode will be used */
|
||||
InterruptDis(ADC_IRQ);
|
||||
|
||||
/* To release ADC delta sigma clock gating */
|
||||
PLL2_Set(BIT_SYS_SYSPLL_CK_ADC_EN, ENABLE);
|
||||
|
||||
/* Turn on ADC active clock */
|
||||
RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, ENABLE);
|
||||
|
||||
ADC_Init(&AdcInitStruct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads data from the specified adc channel fifo.
|
||||
* @param obj: adc object define in application software.
|
||||
* @retval adc channel data(float)
|
||||
*/
|
||||
float analogin_read(analogin_t *obj)
|
||||
{
|
||||
float value;
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
uint32_t AnaloginDatMsk = 0xFFFF;
|
||||
uint8_t AnaloginIdx = obj->adc_idx;
|
||||
uint32_t AnalogDat = 0;
|
||||
uint32_t AnalogDatFull = 0;
|
||||
|
||||
ADC_ReceiveBuf_ACUT(&AnaloginTmp[0]);
|
||||
|
||||
AnaloginDatMsk = (u32)(AnaloginDatMsk<<((u32)(16*(AnaloginIdx&0x01))));
|
||||
AnalogDat = AnaloginTmp[(AnaloginIdx/2)];
|
||||
AnalogDat = (AnalogDat & AnaloginDatMsk);
|
||||
AnalogDat = (AnalogDat>>((u32)(16*(AnaloginIdx&0x01))));
|
||||
|
||||
AnalogDatFull = 0xCE80;
|
||||
|
||||
value = (float)(AnalogDat) / (float)(AnalogDatFull);
|
||||
|
||||
return (float)value;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads data from the specified adc channel fifo.
|
||||
* @param obj: adc object define in application software.
|
||||
* @retval 16bit adc channel data(int)
|
||||
*/
|
||||
uint16_t analogin_read_u16(analogin_t *obj)
|
||||
{
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
uint32_t AnaloginDatMsk = 0xFFFF;
|
||||
uint8_t AnaloginIdx = obj->adc_idx;
|
||||
uint32_t AnalogDat = 0;
|
||||
|
||||
ADC_ReceiveBuf_ACUT(&AnaloginTmp[0]);
|
||||
|
||||
//DBG_8195A("[0]:%08x, %08x\n", AnaloginTmp[0], AnaloginTmp[1] );
|
||||
AnaloginDatMsk = (u32)(AnaloginDatMsk<<((u32)(16*(AnaloginIdx&0x01))));
|
||||
AnalogDat = AnaloginTmp[(AnaloginIdx/2)];
|
||||
AnalogDat = (AnalogDat & AnaloginDatMsk);
|
||||
AnalogDat = (AnalogDat>>((u32)(16*(AnaloginIdx&0x01))));
|
||||
|
||||
return (uint16_t)AnalogDat;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the ADC device, include clock/function/ADC registers.
|
||||
* @param obj: adc object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void analogin_deinit(analogin_t *obj)
|
||||
{
|
||||
/* Clear ADC Status */
|
||||
ADC_INTClear();
|
||||
|
||||
/* Disable ADC */
|
||||
ADC_Cmd(DISABLE);
|
||||
|
||||
/* To release ADC delta sigma clock gating */
|
||||
PLL2_Set(BIT_SYS_SYSPLL_CK_ADC_EN, DISABLE);
|
||||
|
||||
/* Turn on ADC active clock */
|
||||
RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, DISABLE);
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
48
component/common/mbed/targets/hal/rtl8711b/device.h
Normal file
48
component/common/mbed/targets/hal/rtl8711b/device.h
Normal file
|
|
@ -0,0 +1,48 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_DEVICE_H
|
||||
#define MBED_DEVICE_H
|
||||
|
||||
#define DEVICE_PORTIN 1
|
||||
#define DEVICE_PORTOUT 1
|
||||
#define DEVICE_PORTINOUT 1
|
||||
|
||||
#define DEVICE_INTERRUPTIN 1
|
||||
|
||||
#define DEVICE_ANALOGIN 1
|
||||
#define DEVICE_ANALOGOUT 0
|
||||
|
||||
#define DEVICE_SERIAL 1
|
||||
|
||||
#define DEVICE_I2C 1
|
||||
#define DEVICE_I2CSLAVE 1
|
||||
|
||||
#define DEVICE_SPI 1
|
||||
#define DEVICE_SPISLAVE 1
|
||||
|
||||
#define DEVICE_CAN 0
|
||||
|
||||
#define DEVICE_RTC 1
|
||||
|
||||
#define DEVICE_ETHERNET 0
|
||||
|
||||
#define DEVICE_PWMOUT 1
|
||||
|
||||
#define DEVICE_SLEEP 1
|
||||
|
||||
#include "objects.h"
|
||||
|
||||
#endif
|
||||
111
component/common/mbed/targets/hal/rtl8711b/dma_api.c
Normal file
111
component/common/mbed/targets/hal/rtl8711b/dma_api.c
Normal file
|
|
@ -0,0 +1,111 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file sys_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed GDMA API for memcopy
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "dma_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
static void dma_memcpy_int(void *pData)
|
||||
{
|
||||
gdma_t *dma_obj = (gdma_t *)pData;
|
||||
|
||||
/* Clean Auto Reload Bit */
|
||||
GDMA_ChCleanAutoReload(dma_obj->index, dma_obj->ch_num, CLEAN_RELOAD_DST);
|
||||
|
||||
/* Clear Pending ISR */
|
||||
GDMA_ClearINT(dma_obj->index, dma_obj->ch_num);
|
||||
|
||||
GDMA_Cmd(dma_obj->index, dma_obj->ch_num, DISABLE);
|
||||
|
||||
if (dma_obj->user_cb != NULL) {
|
||||
dma_obj->user_cb((VOID*)dma_obj->user_cb_data);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initial the GDMA
|
||||
* @param dma_obj: the GDMA object
|
||||
* @param handler: the callback function for a DMA transfer complete.
|
||||
* @param id: the argument of the callback function.
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id)
|
||||
{
|
||||
u8 ch_num;
|
||||
|
||||
dma_obj->index = 1;
|
||||
ch_num = GDMA_ChnlAlloc(dma_obj->index, (IRQ_FUN) dma_memcpy_int, (u32)dma_obj, 10);
|
||||
if (0xFF == ch_num) {
|
||||
DBG_8195A("%s: Cannot allocate a GDMA Channel\n", __FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
dma_obj->user_cb = (IRQ_FUN)handler;
|
||||
dma_obj->user_cb_data = id;
|
||||
dma_obj->ch_num = ch_num;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initial the GDMA
|
||||
* @param dma_obj: the GDMA object
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy_deinit(gdma_t *dma_obj)
|
||||
{
|
||||
GDMA_ChnlFree(dma_obj->index, dma_obj->ch_num);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To do a memory copy by DMA
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void dma_memcpy(gdma_t *dma_obj, void *dst, void* src, uint32_t len)
|
||||
{
|
||||
GDMA_InitTypeDef GDMA_InitStruct;
|
||||
|
||||
_memset((void *)&GDMA_InitStruct, 0, sizeof(GDMA_InitTypeDef));
|
||||
|
||||
GDMA_InitStruct.GDMA_ChNum = dma_obj->ch_num;
|
||||
GDMA_InitStruct.GDMA_Index = dma_obj->index;
|
||||
GDMA_InitStruct.GDMA_IsrType = (TransferType|ErrType);
|
||||
|
||||
DBG_PRINTF(MODULE_GDMA, LEVEL_INFO, "%s: ==> Src=0x%x Dst=0x%x Len=%d\r\n", __FUNCTION__, src, dst, len);
|
||||
|
||||
if ((((u32)src & 0x03)==0) && (((u32)dst & 0x03)==0) && ((len & 0x03)== 0)) {
|
||||
/* 4-bytes aligned, move 4 bytes each transfer */
|
||||
GDMA_InitStruct.GDMA_SrcMsize = MsizeEight;
|
||||
GDMA_InitStruct.GDMA_SrcDataWidth = TrWidthFourBytes;
|
||||
GDMA_InitStruct.GDMA_DstMsize = MsizeEight;
|
||||
GDMA_InitStruct.GDMA_DstDataWidth = TrWidthFourBytes;
|
||||
GDMA_InitStruct.GDMA_BlockSize = len >> 2;
|
||||
} else {
|
||||
GDMA_InitStruct.GDMA_SrcMsize = MsizeEight;
|
||||
GDMA_InitStruct.GDMA_SrcDataWidth = TrWidthOneByte;
|
||||
GDMA_InitStruct.GDMA_DstMsize = MsizeEight;
|
||||
GDMA_InitStruct.GDMA_DstDataWidth = TrWidthOneByte;
|
||||
GDMA_InitStruct.GDMA_BlockSize = len;
|
||||
}
|
||||
|
||||
GDMA_InitStruct.GDMA_SrcAddr = (u32)src;
|
||||
GDMA_InitStruct.GDMA_DstAddr = (u32)dst;
|
||||
|
||||
GDMA_Init(dma_obj->index, dma_obj->ch_num, &GDMA_InitStruct);
|
||||
GDMA_Cmd(dma_obj->index, dma_obj->ch_num, ENABLE);
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
299
component/common/mbed/targets/hal/rtl8711b/efuse_api.c
Normal file
299
component/common/mbed/targets/hal/rtl8711b/efuse_api.c
Normal file
|
|
@ -0,0 +1,299 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file efuse_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for EFUSE.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "ameba_soc.h"
|
||||
|
||||
//#ifdef CONFIG_EFUSE_EN
|
||||
|
||||
static u32 EFUSE_OTP_Check(u16 Addr, u8 Data)
|
||||
{
|
||||
u8 L25OutVoltage = L25EOUTVOLTAGE;
|
||||
u32 CtrlSetting = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_CTRL);
|
||||
u32 bResult = _SUCCESS;
|
||||
u8 temp = 0xFF;
|
||||
|
||||
EFUSE_WRITE_Check_ACUT(ENABLE);
|
||||
if ((Addr >= (OTP_SECTION)) && (Addr < (OTP_SECTION + OTP_SECTION_LEN))){
|
||||
|
||||
EFUSE_OneByteRead_ACUT(CtrlSetting, Addr, &temp, L25OutVoltage);
|
||||
|
||||
if (temp == 0xff) {
|
||||
bResult = EFUSE_OneByteWriteROM(CtrlSetting, Addr, Data, L25OutVoltage);
|
||||
if (bResult == _SUCCESS){
|
||||
EFUSE_OneByteRead_ACUT(CtrlSetting, Addr, &temp, L25OutVoltage);
|
||||
if (temp != Data){
|
||||
EFUSE_OneByteWriteROM(CtrlSetting, Addr, Data, L25OutVoltage);
|
||||
EFUSE_OneByteRead_ACUT(CtrlSetting, Addr, &temp, L25OutVoltage);
|
||||
if (temp != Data){
|
||||
bResult = _FAIL;
|
||||
}
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (temp != Data){
|
||||
EFUSE_OneByteWriteROM(CtrlSetting, Addr, Data, L25OutVoltage);
|
||||
EFUSE_OneByteRead_ACUT(CtrlSetting, Addr, &temp, L25OutVoltage);
|
||||
if (temp != Data){
|
||||
bResult = _FAIL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
EFUSE_WRITE_Check_ACUT(DISABLE);
|
||||
|
||||
return bResult;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get remaining efuse length
|
||||
* @retval remaining efuse length
|
||||
*/
|
||||
int efuse_get_remaining_length(void)
|
||||
{
|
||||
return EFUSE_RemainLength();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read efuse contant of specified user
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval none
|
||||
*/
|
||||
void efuse_mtp_read(uint8_t * data)
|
||||
{
|
||||
EFUSE_USER1_Read(data);
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write user's contant to efuse
|
||||
* @param data: Specified the data to be programmed.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @retval status value:
|
||||
* - 0~32: Success
|
||||
* - -1: Failure
|
||||
*/
|
||||
int efuse_mtp_write(uint8_t *data, uint8_t len)
|
||||
{
|
||||
|
||||
u8 len_low, section_num, word_enable = 0;
|
||||
u8 ret = 0;
|
||||
|
||||
if( (len & 0x01) == 1)
|
||||
len += 1;
|
||||
|
||||
if(len > 32){
|
||||
return -1;
|
||||
}
|
||||
if(len == 0){
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8bytes one section */
|
||||
len_low = len & 0x07;
|
||||
section_num = (len >> 3) & 0x07;
|
||||
|
||||
if(len_low == 0)
|
||||
word_enable = 0; /* 0 word write enable */
|
||||
else if(len_low == 2)
|
||||
word_enable = 1; /* 1 word write enable */
|
||||
else if(len_low == 4)
|
||||
word_enable = 3; /* 2 word write enable */
|
||||
else if(len_low == 6)
|
||||
word_enable = 7; /* 3 word write enable */
|
||||
|
||||
switch (section_num){
|
||||
case 0:
|
||||
ret = EFUSE_USER1_Write_ROM(0, word_enable, data); if (ret == _FAIL) return -1;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
ret = EFUSE_USER1_Write_ROM(0, 0xf, data); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(1, word_enable, data+8); if (ret == _FAIL) return -1;
|
||||
break;
|
||||
|
||||
case 2:
|
||||
ret = EFUSE_USER1_Write_ROM(0, 0xf, data); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(1, 0xf, data+8); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(2, word_enable, data+8); if (ret == _FAIL) return -1;
|
||||
break;
|
||||
|
||||
case 3:
|
||||
ret = EFUSE_USER1_Write_ROM(0, 0xf, data); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(1, 0xf, data+8); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(2, 0xf, data+16); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(3, word_enable, data+24); if (ret == _FAIL) return -1;
|
||||
break;
|
||||
|
||||
case 4:
|
||||
ret = EFUSE_USER1_Write_ROM(0, 0xf, data); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(1, 0xf, data+8); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(2, 0xf, data+16); if (ret == _FAIL) return -1;
|
||||
ret = EFUSE_USER1_Write_ROM(3, 0xf, data+24); if (ret == _FAIL) return -1;
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read efuse OTP contant
|
||||
* @param address: Specifies the offset of the OTP.
|
||||
* @param len: Specifies the length of readback data.
|
||||
* @param buf: Specified the address to save the readback data.
|
||||
* @retval status value:
|
||||
* - 0: Success
|
||||
* - -1: Failure
|
||||
*/
|
||||
int efuse_otp_read(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
|
||||
if((address+len) > 32) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
EFUSE_OTP_Read32B(content);
|
||||
_memcpy(buf, content+address, len);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Write user's contant to OTP efuse
|
||||
* @param address: Specifies the offset of the programmed OTP.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @param buf: Specified the data to be programmed.
|
||||
* @retval status value:
|
||||
* - 0: Success
|
||||
* - -1: Failure
|
||||
*/
|
||||
int efuse_otp_write(u8 address, u8 len, u8 *buf)
|
||||
{
|
||||
u32 ret = 0;
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
|
||||
if((address+len) > 32) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
_memset(content, 0xFF, 32);
|
||||
_memcpy(content+address, buf, len);
|
||||
|
||||
ret = EFUSE_OTP_Write32B_ROM(content);
|
||||
|
||||
if (ret == _SUCCESS) {
|
||||
return 0;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief check user's contant to OTP efuse
|
||||
* @param *buf: Specified the data to be programmed.
|
||||
* @param len: Specifies the data length of programmed data.
|
||||
* @retval status: Success:0 or Failure: -1.
|
||||
*/
|
||||
int efuse_otp_chk(u8 len, u8 *buf)
|
||||
{
|
||||
u8 content[32]; // the OTP max length is 32
|
||||
u8 Idx = 0;
|
||||
u32 bResult = _SUCCESS;
|
||||
|
||||
_memset(content, 0xFF, 32);
|
||||
_memcpy(content, buf, len);
|
||||
|
||||
for (Idx = 0; Idx < OTP_SECTION_LEN; Idx++){
|
||||
bResult = EFUSE_OTP_Check((OTP_SECTION+Idx), (*(content+Idx)));
|
||||
if (bResult != _SUCCESS){
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return (bResult? 0 : -1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable jtag
|
||||
* @retval status: Success:0.
|
||||
*/
|
||||
int efuse_disable_jtag(void)
|
||||
{
|
||||
u32 ret = 0;
|
||||
|
||||
ret = EFUSE_JTAG_OFF_ROM();
|
||||
|
||||
if (ret == _SUCCESS) {
|
||||
return 0;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set RDP Enable.
|
||||
* @param none
|
||||
* @note can not change or read back after write.
|
||||
*/
|
||||
void efuse_rdp_enable(void)
|
||||
{
|
||||
EFUSE_RDP_EN();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set 16B RDP key into EFUSE.
|
||||
* @param rdp_key: 16B EFUSE KEY
|
||||
* @note can not change or read back after write.
|
||||
*/
|
||||
void efuse_rdp_keyset(u8 *rdp_key)
|
||||
{
|
||||
EFUSE_RDP_KEY(rdp_key);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable/Disable OTF function.
|
||||
* @param newStatus: can be ENABLE/DISABLE
|
||||
*/
|
||||
void efuse_otf_cmd(u32 NewState)
|
||||
{
|
||||
u32 value = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6);
|
||||
u8 ret = _SUCCESS;
|
||||
|
||||
if(NewState != DISABLE){
|
||||
value |= BIT_SYS_FLASH_ENCRYPT_EN;
|
||||
}else{
|
||||
value &= ~BIT_SYS_FLASH_ENCRYPT_EN;
|
||||
}
|
||||
|
||||
ret = EFUSE_LMAP_WRITE(0x18, 2, (u8*)&value);
|
||||
if (ret == _FAIL) {
|
||||
DBG_8195A("Set OTF control bit fail \n");
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set 16B OTF key into EFUSE.
|
||||
* @param OtfKey: 16B EFUSE KEY
|
||||
* @note can not change or read back after write.
|
||||
*/
|
||||
void efuse_otf_keyset(u8 *otf_key)
|
||||
{
|
||||
EFUSE_OTF_KEY(otf_key);
|
||||
}
|
||||
|
||||
//#endif
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
503
component/common/mbed/targets/hal/rtl8711b/flash_api.c
Normal file
503
component/common/mbed/targets/hal/rtl8711b/flash_api.c
Normal file
|
|
@ -0,0 +1,503 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file flash_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for flash.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
|
||||
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "ameba_soc.h"
|
||||
#include "rtl8711b_flash.h"
|
||||
#include "flash_api.h"
|
||||
|
||||
extern u32 ConfigDebugInfo;
|
||||
|
||||
/**
|
||||
* global data structure
|
||||
*/
|
||||
u32 ISER[8] = {0};
|
||||
u32 systick_ctrl;
|
||||
|
||||
/**
|
||||
* @brief Disable interrupt and systick exception before write to flash when XIP.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void flash_write_lock()
|
||||
{
|
||||
u8 i = 0;
|
||||
for(; i < 8; i++){
|
||||
ISER[i] = NVIC->ISER[i];
|
||||
NVIC->ICER[i] = 0xffffffff; //disable interrupt
|
||||
NVIC->ICPR[i] = 0xffffffff; //clear pending interrupt
|
||||
}
|
||||
|
||||
systick_ctrl = SysTick->CTRL; //disable systick exception
|
||||
SysTick->CTRL = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Restore interrupt and systick exception after write to flash when XIP.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
static void flash_write_unlock()
|
||||
{
|
||||
u8 i = 0;
|
||||
for(;i < 8; i++){
|
||||
NVIC->ISER[i] = ISER[i];//restore interrupt
|
||||
}
|
||||
|
||||
SysTick->CTRL = systick_ctrl;//restore systick exception
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Control the flash chip write protect enable/disable.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param protect: This parameter can be 1 or 0.
|
||||
* @arg 1: Protect the whole chip from being programmed/erased.
|
||||
* @arg 0: Unprotect the whole chip from being programmed/erased.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_write_protect(flash_t *obj, u32 protect)
|
||||
{
|
||||
flash_write_lock();
|
||||
FLASH_SetStatusBits(0x1c, protect);
|
||||
flash_write_unlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the value of status register1.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param data: The value of status register1 to be set.
|
||||
* @retval none
|
||||
*/
|
||||
int flash_set_status(flash_t *obj, u32 data)
|
||||
{
|
||||
u8 status[2];
|
||||
u8 StatusLen = 1;
|
||||
|
||||
status[0] = (u8)data;
|
||||
flash_write_lock();
|
||||
|
||||
/* check if status2 */
|
||||
if (flash_init_para.FLASH_Status2_exist) {
|
||||
StatusLen = 2;
|
||||
FLASH_RxCmd(flash_init_para.FLASH_cmd_rd_status2, 1, &status[1]);
|
||||
}
|
||||
|
||||
if(!flash_init_para.FLASH_cmd_wr_status2){
|
||||
FLASH_SetStatus(flash_init_para.FLASH_cmd_wr_status, StatusLen, status);
|
||||
} else {
|
||||
FLASH_SetStatus(flash_init_para.FLASH_cmd_wr_status, 1, &status[0]);
|
||||
FLASH_SetStatus(flash_init_para.FLASH_cmd_wr_status2, 1, &status[1]);
|
||||
}
|
||||
flash_write_unlock();
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Retset the value of status register1 to 0.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_reset_status(flash_t *obj)
|
||||
{
|
||||
flash_set_status(obj, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Get the value of status register1
|
||||
* @param obj: Flash object define in application software.
|
||||
* @retval The value of status register1.
|
||||
*/
|
||||
int flash_get_status(flash_t *obj)
|
||||
{
|
||||
int data;
|
||||
|
||||
flash_write_lock();
|
||||
FLASH_RxCmd(flash_init_para.FLASH_cmd_rd_status, 1, (u8*)&data);
|
||||
flash_write_unlock();
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erase flash sector(4KB)
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to be erased. LSB 12bits will be masked.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_erase_sector(flash_t *obj, u32 address)
|
||||
{
|
||||
flash_write_lock();
|
||||
FLASH_Erase(EraseSector, address);
|
||||
Cache_Flush();
|
||||
flash_write_unlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erase flash block(64KB)
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to be erased.LSB 16bits will be masked.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_erase_block(flash_t *obj, u32 address)
|
||||
{
|
||||
flash_write_lock();
|
||||
FLASH_Erase(EraseBlock, address);
|
||||
Cache_Flush();
|
||||
flash_write_unlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erase the whole flash chip
|
||||
* @param obj: Flash object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void flash_erase_chip(flash_t *obj)
|
||||
{
|
||||
flash_write_lock();
|
||||
FLASH_Erase(EraseChip, 0);
|
||||
Cache_Flush();
|
||||
flash_write_unlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a word from specified address
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the address to read from.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
* @note auto mode read is ok, because we have flash cache
|
||||
*/
|
||||
int flash_read_word(flash_t *obj, u32 address, u32 * data)
|
||||
{
|
||||
// FLASH_RxData(0, address, 4, data);
|
||||
assert_param(data != NULL);
|
||||
|
||||
u32 offset_to_align = address & 0x03;
|
||||
u32 read_data;
|
||||
u32 temp;
|
||||
u32 i = 4 - offset_to_align;
|
||||
|
||||
if(offset_to_align){
|
||||
address -= offset_to_align;
|
||||
temp = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
read_data= temp >> (offset_to_align * 8);
|
||||
|
||||
address += 4;
|
||||
temp = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
read_data |= (temp << (i * 8));
|
||||
|
||||
*data = read_data;
|
||||
}else{
|
||||
* data = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a word to specified address
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the address to be programmed to.
|
||||
* @param data: Specified the data to be programmed.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
* @note user mode write used
|
||||
*/
|
||||
int flash_write_word(flash_t *obj, u32 address, u32 data)
|
||||
{
|
||||
// Disable write protection
|
||||
// flash_unlock();
|
||||
|
||||
u32 write_word = data;
|
||||
u32 offset_to_align = address & 0x03;
|
||||
u32 temp;
|
||||
u32 i = 4 - offset_to_align;
|
||||
|
||||
flash_write_lock();
|
||||
if(offset_to_align){
|
||||
address -= offset_to_align;
|
||||
temp = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
temp = (temp << (i * 8))>>(8*i) | write_word << (8 * offset_to_align);
|
||||
FLASH_TxData12B(address, 4, (u8*)&temp);
|
||||
|
||||
address += 4;
|
||||
temp = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
temp = (temp >> (offset_to_align * 8)) << (offset_to_align * 8) | write_word >>(8*i);
|
||||
FLASH_TxData12B(address, 4, (u8*)&temp);
|
||||
}else{
|
||||
FLASH_TxData12B(address, 4, (u8*)&write_word);
|
||||
}
|
||||
|
||||
Cache_Flush();
|
||||
flash_write_unlock();
|
||||
|
||||
// Enable write protection
|
||||
// flash_lock();
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Read a stream of data from specified address
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to read from.
|
||||
* @param len: Specifies the length of the data to read.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
* @note auto mode is ok, because we have flash cache
|
||||
*/
|
||||
int flash_stream_read(flash_t *obj, u32 address, u32 len, u8 * data)
|
||||
{
|
||||
assert_param(data != NULL);
|
||||
|
||||
u32 offset_to_align;
|
||||
u32 i;
|
||||
u32 read_word;
|
||||
u8 *ptr;
|
||||
u8 *pbuf;
|
||||
|
||||
offset_to_align = address & 0x03;
|
||||
pbuf = data;
|
||||
if (offset_to_align != 0) {
|
||||
/* the start address is not 4-bytes aligned */
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, (address - offset_to_align));
|
||||
ptr = (u8*)&read_word + offset_to_align;
|
||||
offset_to_align = 4 - offset_to_align;
|
||||
for (i=0;i<offset_to_align;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
len--;
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* address = next 4-bytes aligned */
|
||||
address = (((address-1) >> 2) + 1) << 2;
|
||||
|
||||
ptr = (u8*)&read_word;
|
||||
if ((u32)pbuf & 0x03) {
|
||||
while (len >= 4) {
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
for (i=0;i<4;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
}
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
} else {
|
||||
while (len >= 4) {
|
||||
*((u32 *)pbuf) = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
pbuf += 4;
|
||||
address += 4;
|
||||
len -= 4;
|
||||
}
|
||||
}
|
||||
|
||||
if (len > 0) {
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, address);
|
||||
for (i=0;i<len;i++) {
|
||||
*pbuf = *(ptr+i);
|
||||
pbuf++;
|
||||
}
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a stream of data to specified address
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to write to.
|
||||
* @param len: Specifies the length of the data to write.
|
||||
* @param data: Pointer to a byte array that is to be written.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_stream_write(flash_t *obj, u32 address, u32 len, u8 * data)
|
||||
{
|
||||
// Check address: 4byte aligned & page(256bytes) aligned
|
||||
u32 page_begin = address & (~0xff);
|
||||
u32 page_end = (address + len) & (~0xff);
|
||||
u32 page_cnt = ((page_end - page_begin) >> 8) + 1;
|
||||
|
||||
u32 addr_begin = address;
|
||||
u32 addr_end = (page_cnt == 1) ? (address + len) : (page_begin + 0x100);
|
||||
u32 size = addr_end - addr_begin;
|
||||
u8 *buffer = data;
|
||||
u8 write_data[12];
|
||||
|
||||
u32 offset_to_align;
|
||||
u32 read_word;
|
||||
u32 i;
|
||||
|
||||
flash_write_lock();
|
||||
while(page_cnt){
|
||||
offset_to_align = addr_begin & 0x3;
|
||||
|
||||
if(offset_to_align != 0){
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, addr_begin - offset_to_align);
|
||||
for(i = offset_to_align;i < 4;i++){
|
||||
read_word = (read_word & (~(0xff << (8*i)))) |( (*buffer) <<(8*i));
|
||||
size--;
|
||||
buffer++;
|
||||
if(size == 0)
|
||||
break;
|
||||
}
|
||||
FLASH_TxData12B(addr_begin - offset_to_align, 4, (u8*)&read_word);
|
||||
#ifdef MICRON_N25Q00AA
|
||||
FLASH_ReadFlagStatusReg();
|
||||
#endif
|
||||
}
|
||||
|
||||
addr_begin = (((addr_begin-1) >> 2) + 1) << 2;
|
||||
for(;size >= 12 ;size -= 12){
|
||||
_memcpy(write_data, buffer, 12);
|
||||
FLASH_TxData12B(addr_begin, 12, write_data);
|
||||
#ifdef MICRON_N25Q00AA
|
||||
FLASH_ReadFlagStatusReg();
|
||||
#endif
|
||||
buffer += 12;
|
||||
addr_begin += 12;
|
||||
}
|
||||
|
||||
for(;size >= 4; size -=4){
|
||||
_memcpy(write_data, buffer, 4);
|
||||
FLASH_TxData12B(addr_begin, 4, write_data);
|
||||
#ifdef MICRON_N25Q00AA
|
||||
FLASH_ReadFlagStatusReg();
|
||||
#endif
|
||||
buffer += 4;
|
||||
addr_begin += 4;
|
||||
}
|
||||
|
||||
if(size > 0){
|
||||
read_word = HAL_READ32(SPI_FLASH_BASE, addr_begin);
|
||||
for( i = 0;i < size;i++){
|
||||
read_word = (read_word & (~(0xff << (8*i)))) | ((*buffer) <<(8*i));
|
||||
buffer++;
|
||||
}
|
||||
FLASH_TxData12B(addr_begin, 4, (u8*)&read_word);
|
||||
#ifdef MICRON_N25Q00AA
|
||||
FLASH_ReadFlagStatusReg();
|
||||
#endif
|
||||
}
|
||||
|
||||
page_cnt--;
|
||||
addr_begin = addr_end;
|
||||
addr_end = (page_cnt == 1) ? (address + len) : (((addr_begin>>8) + 1)<<8);
|
||||
size = addr_end - addr_begin;
|
||||
}
|
||||
|
||||
Cache_Flush();
|
||||
flash_write_unlock();
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief It is the same with flash_stream_write function which is used to write a stream of data to specified address.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to write to.
|
||||
* @param len: Specifies the length of the data to write.
|
||||
* @param data: Pointer to a byte array that is to be written.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_burst_write(flash_t *obj, u32 address ,u32 Length, u8 * data)
|
||||
{
|
||||
flash_stream_write(obj, address, Length, data);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief It is the same with flash_stream_read function which is used to read a stream of data from specified address
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param address: Specifies the starting address to read from.
|
||||
* @param len: Specifies the length of the data to read.
|
||||
* @param data: Specified the address to save the readback data.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_burst_read(flash_t *obj, u32 address, u32 Length, u8 * data)
|
||||
{
|
||||
flash_stream_read(obj, address, Length, data);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function is only for Micron 128MB flash to access beyond 16MB by switching between eight 16MB-area(segment).
|
||||
* Please refer to flash datasheet for more information about memory mapping.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param data: Specified which segment to choose.
|
||||
* @retval status: Success:1 or Failure: Others.
|
||||
*/
|
||||
int flash_set_extend_addr(flash_t *obj, u32 data)
|
||||
{
|
||||
/*Write Extended Address Register to select operating segment*/
|
||||
u8 segnum = (u8)(data & 0x07);
|
||||
|
||||
flash_write_lock();
|
||||
FLASH_SetStatus(0xC5, 1, &segnum);
|
||||
flash_write_unlock();
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is only for Micron 128MB flash to read from Extended Address Register, which shows the current segment.
|
||||
* Please refer to flash datasheet for more information about memory mapping.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @retval value: The value of current Extended Address Register.
|
||||
*/
|
||||
int flash_get_extend_addr(flash_t *obj)
|
||||
{
|
||||
u8 temp = 0;
|
||||
|
||||
flash_write_lock();
|
||||
FLASH_RxCmd(0xC8, 1, &temp);
|
||||
flash_write_unlock();
|
||||
return temp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is to read flash id.
|
||||
* @param obj: Flash object define in application software.
|
||||
* @param buf: Specified the address to save the readback data.
|
||||
* @param len: Specifies the length of the flash id to read.
|
||||
* @retval : The length of the flash id.
|
||||
*/
|
||||
int flash_read_id(flash_t *obj, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
assert_param(buf != NULL);
|
||||
assert_param(len >= 3);
|
||||
|
||||
flash_write_lock();
|
||||
FLASH_RxCmd(flash_init_para.FLASH_cmd_rd_id, len, buf);
|
||||
flash_write_unlock();
|
||||
|
||||
return len;
|
||||
}
|
||||
227
component/common/mbed/targets/hal/rtl8711b/gpio_api.c
Normal file
227
component/common/mbed/targets/hal/rtl8711b/gpio_api.c
Normal file
|
|
@ -0,0 +1,227 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file gpio_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for GPIO.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "gpio_api.h"
|
||||
|
||||
/**
|
||||
* @brief Set the given pin as GPIO.
|
||||
* @param pin: PinName according to pinmux spec.
|
||||
* @retval The given pin with GPIO function
|
||||
*/
|
||||
uint32_t gpio_set(PinName pin)
|
||||
{
|
||||
u32 ip_pin;
|
||||
|
||||
assert_param(pin != (PinName)NC);
|
||||
pin_function(pin, 0);
|
||||
|
||||
ip_pin = pin;
|
||||
|
||||
return ip_pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIO device, include mode/direction/pull control registers.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param pin: PinName according to pinmux spec.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_init(gpio_t *obj, PinName pin)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
if (pin == (PinName)NC)
|
||||
return;
|
||||
|
||||
obj->pin = pin;
|
||||
|
||||
GPIO_InitStruct.GPIO_Pin = obj->pin;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
|
||||
GPIO_Init(&GPIO_InitStruct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set GPIO mode.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param mode: this parameter can be one of the following values:
|
||||
* @arg PullNone: HighZ, user can input high or low use this pin
|
||||
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
|
||||
* @arg PullDown: pull down
|
||||
* @arg PullUp: pull up
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_mode(gpio_t *obj, PinMode mode)
|
||||
{
|
||||
u32 GPIO_PuPd;
|
||||
|
||||
switch (mode) {
|
||||
case PullNone:/* No driver -> Input & High Impendance */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
//GPIO_Direction(obj->pin, GPIO_Mode_IN);
|
||||
break;
|
||||
|
||||
case OpenDrain:/* No driver -> Output Low */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Direction(obj->pin, GPIO_Mode_OUT);
|
||||
GPIO_WriteBit(obj->pin, GPIO_PIN_LOW);
|
||||
break;
|
||||
|
||||
case PullDown:
|
||||
GPIO_PuPd = GPIO_PuPd_DOWN;
|
||||
break;
|
||||
|
||||
case PullUp:
|
||||
GPIO_PuPd = GPIO_PuPd_UP;
|
||||
break;
|
||||
|
||||
default:
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
}
|
||||
|
||||
PAD_PullCtrl(obj->pin, GPIO_PuPd);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set GPIO direction.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param direction: this parameter can be one of the following values:
|
||||
* @arg PIN_INPUT: this pin is input
|
||||
* @arg PIN_OUTPUT: this pin is output
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_dir(gpio_t *obj, PinDirection direction)
|
||||
{
|
||||
assert_param(obj->pin != (PinName)NC);
|
||||
|
||||
if (direction == PIN_OUTPUT) {
|
||||
GPIO_Direction(obj->pin, GPIO_Mode_OUT);
|
||||
} else {
|
||||
GPIO_Direction(obj->pin, GPIO_Mode_IN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set GPIO direction.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param direction: this parameter can be one of the following values:
|
||||
* @arg PIN_INPUT: this pin is input
|
||||
* @arg PIN_OUTPUT: this pin is output
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_change_dir(gpio_t *obj, PinDirection direction)
|
||||
{
|
||||
gpio_dir(obj, direction);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets value to the selected output port pin.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param value: specifies the value to be written to the selected pin
|
||||
* This parameter can be one of the following values:
|
||||
* @arg 0: Pin state set to low
|
||||
* @arg 1: Pin state set to high
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_write(gpio_t *obj, int value)
|
||||
{
|
||||
assert_param(obj->pin != (PinName)NC);
|
||||
|
||||
GPIO_WriteBit(obj->pin, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets value to the selected output port pin.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param value: specifies the value to be written to the selected pin
|
||||
* This parameter can be one of the following values:
|
||||
* @arg 0: Pin state set to low
|
||||
* @arg 1: Pin state set to high
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_direct_write(gpio_t *obj, BOOL value)
|
||||
{
|
||||
gpio_write(obj, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified gpio port pin.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @retval state of the specified gpio port pin
|
||||
* - 1: pin state is high
|
||||
* - 0: pin state is low
|
||||
*/
|
||||
int gpio_read(gpio_t *obj)
|
||||
{
|
||||
assert_param(obj->pin != (PinName)NC);
|
||||
|
||||
return GPIO_ReadDataBit(obj->pin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets pull type to the selected pin.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @param pull_type: this parameter can be one of the following values:
|
||||
* @arg PullNone: HighZ, user can input high or low use this pin
|
||||
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
|
||||
* @arg PullDown: pull down
|
||||
* @arg PullUp: pull up
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_pull_ctrl(gpio_t *obj, PinMode pull_type)
|
||||
{
|
||||
u32 GPIO_PuPd;
|
||||
|
||||
switch (pull_type) {
|
||||
case PullNone:/* No driver -> Input & High Impendance */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
|
||||
case OpenDrain:/* No driver -> Output Low */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
|
||||
case PullDown:
|
||||
GPIO_PuPd = GPIO_PuPd_DOWN;
|
||||
break;
|
||||
|
||||
case PullUp:
|
||||
GPIO_PuPd = GPIO_PuPd_UP;
|
||||
break;
|
||||
|
||||
default:
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
}
|
||||
|
||||
PAD_PullCtrl(obj->pin, GPIO_PuPd);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIO device, include mode/direction/pull control registers.
|
||||
* @param obj: gpio object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_deinit(gpio_t *obj)
|
||||
{
|
||||
GPIO_DeInit(obj->pin);
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
206
component/common/mbed/targets/hal/rtl8711b/gpio_irq_api.c
Normal file
206
component/common/mbed/targets/hal/rtl8711b/gpio_irq_api.c
Normal file
|
|
@ -0,0 +1,206 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file gpio_irq_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for GPIO IRQ.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "gpio_irq_api.h"
|
||||
#include "gpio_irq_ex_api.h"
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @param pin: PinName according to pinmux spec.
|
||||
* @note this API only works for Port A pins
|
||||
* @param handler: Interrupt handler to be assigned to the specified pin.
|
||||
* @param id: handler id.
|
||||
* @retval none
|
||||
*/
|
||||
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
if (pin == NC) return -1;
|
||||
|
||||
obj->pin = pin;
|
||||
|
||||
GPIO_InitStruct.GPIO_Pin = obj->pin;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_INT;
|
||||
GPIO_InitStruct.GPIO_ITTrigger = GPIO_INT_Trigger_EDGE;
|
||||
GPIO_InitStruct.GPIO_ITPolarity = GPIO_INT_POLARITY_ACTIVE_LOW;
|
||||
|
||||
InterruptRegister(GPIO_INTHandler, GPIO_IRQ, NULL, 10);
|
||||
InterruptEn(GPIO_IRQ, 10);
|
||||
|
||||
GPIO_Init(&GPIO_InitStruct);
|
||||
GPIO_UserRegIrq(GPIO_InitStruct.GPIO_Pin, (VOID*) handler, (VOID*) id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @note this API only works for Port A pins
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_free(gpio_irq_t *obj)
|
||||
{
|
||||
GPIO_DeInit(obj->pin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable/Disable gpio interrupt.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @param event: gpio interrupt event, this parameter can be one of the following values:
|
||||
* @arg IRQ_RISE: rising edge interrupt event
|
||||
* @arg IRQ_FALL: falling edge interrupt event
|
||||
* @arg IRQ_LOW: low level interrupt event
|
||||
* @arg IRQ_HIGH: high level interrupt event
|
||||
* @arg IRQ_NONE: no interrupt event
|
||||
* @param enable: this parameter can be one of the following values:
|
||||
* @arg 0 disable gpio interrupt
|
||||
* @arg 1 enable gpio interrupt
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
||||
{
|
||||
u32 GPIO_ITTrigger;
|
||||
u32 GPIO_ITPolarity;
|
||||
u32 GPIO_ITDebounce;
|
||||
|
||||
switch(event) {
|
||||
case IRQ_RISE:
|
||||
GPIO_ITTrigger = GPIO_INT_Trigger_EDGE;
|
||||
GPIO_ITPolarity = GPIO_INT_POLARITY_ACTIVE_HIGH;
|
||||
break;
|
||||
|
||||
case IRQ_FALL:
|
||||
GPIO_ITTrigger = GPIO_INT_Trigger_EDGE;
|
||||
GPIO_ITPolarity = GPIO_INT_POLARITY_ACTIVE_LOW;
|
||||
break;
|
||||
|
||||
case IRQ_LOW:
|
||||
GPIO_ITTrigger = GPIO_INT_Trigger_LEVEL;
|
||||
GPIO_ITPolarity = GPIO_INT_POLARITY_ACTIVE_LOW;
|
||||
break;
|
||||
|
||||
case IRQ_HIGH:
|
||||
GPIO_ITTrigger = GPIO_INT_Trigger_LEVEL;
|
||||
GPIO_ITPolarity = GPIO_INT_POLARITY_ACTIVE_HIGH;
|
||||
break;
|
||||
|
||||
case IRQ_NONE:
|
||||
// ?
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
GPIO_INTMode(obj->pin, ENABLE, GPIO_ITTrigger, GPIO_ITPolarity, GPIO_INT_DEBOUNCE_ENABLE);
|
||||
} else {
|
||||
GPIO_INTMode(obj->pin, DISABLE, 0, 0, 0);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable gpio interrupt.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_enable(gpio_irq_t *obj)
|
||||
{
|
||||
GPIO_INTConfig(obj->pin, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable gpio interrupt.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_disable(gpio_irq_t *obj)
|
||||
{
|
||||
GPIO_INTConfig(obj->pin, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_deinit(gpio_irq_t *obj)
|
||||
{
|
||||
GPIO_DeInit(obj->pin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets pull type to the selected interrupt pin.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @param pull_type: this parameter can be one of the following values:
|
||||
* @arg PullNone: HighZ, user can input high or low use this pin
|
||||
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
|
||||
* @arg PullDown: pull down
|
||||
* @arg PullUp: pull up
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type)
|
||||
{
|
||||
u32 GPIO_PuPd;
|
||||
|
||||
switch (pull_type) {
|
||||
case PullNone:/* No driver -> Input & High Impendance */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
|
||||
case OpenDrain:/* No driver -> Output Low */
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
|
||||
case PullDown:
|
||||
GPIO_PuPd = GPIO_PuPd_DOWN;
|
||||
break;
|
||||
|
||||
case PullUp:
|
||||
GPIO_PuPd = GPIO_PuPd_UP;
|
||||
break;
|
||||
|
||||
default:
|
||||
GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
}
|
||||
|
||||
PAD_PullCtrl(obj->pin, GPIO_PuPd);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the specified gpio interrupt event.
|
||||
* @param obj: gpio irq object define in application software.
|
||||
* @param event: gpio interrupt event, this parameter can be one of the following values:
|
||||
* @arg IRQ_RISE: rising edge interrupt event
|
||||
* @arg IRQ_FALL: falling edge interrupt event
|
||||
* @arg IRQ_LOW: low level interrupt event
|
||||
* @arg IRQ_HIGH: high level interrupt event
|
||||
* @arg IRQ_NONE: no interrupt event
|
||||
* @retval none
|
||||
*/
|
||||
void gpio_irq_set_event(gpio_irq_t *obj, gpio_irq_event event)
|
||||
{
|
||||
gpio_irq_set(obj, event, ENABLE);
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
32
component/common/mbed/targets/hal/rtl8711b/gpio_object.h
Normal file
32
component/common/mbed/targets/hal/rtl8711b/gpio_object.h
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_GPIO_OBJECT_H
|
||||
#define MBED_GPIO_OBJECT_H
|
||||
|
||||
#include "mbed_assert.h"
|
||||
|
||||
#include "basic_types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
854
component/common/mbed/targets/hal/rtl8711b/i2c_api.c
Normal file
854
component/common/mbed/targets/hal/rtl8711b/i2c_api.c
Normal file
|
|
@ -0,0 +1,854 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file i2c_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for I2C.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "PinNames.h"
|
||||
#include "i2c_api.h"
|
||||
|
||||
#include "pinmap.h"
|
||||
|
||||
// See I2CSlave.h
|
||||
#define NoData 0 // the slave has not been addressed
|
||||
#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
|
||||
#define WriteGeneral 2 // the master is writing to all slave
|
||||
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
||||
|
||||
static uint16_t i2c_target_addr[2];
|
||||
extern u32 ConfigDebugErr;
|
||||
extern u32 ConfigDebuginfo;
|
||||
I2C_InitTypeDef I2CInitDat[2];
|
||||
static u32 restart_enable = 0;
|
||||
static u32 master_addr_retry = 1;
|
||||
|
||||
void i2c_send_restart(I2C_TypeDef *I2Cx, u8* pBuf, u8 len, u8 restart);
|
||||
|
||||
/**
|
||||
* @brief Read data with special length in master mode through the I2Cx peripheral under in-house IP.
|
||||
* @param I2Cx: where I2Cx can be I2C0_DEV or I2C1_DEV.
|
||||
* @param pBuf: point to the buffer to hold the received data.
|
||||
* @param len: the length of data that to be received.
|
||||
* @note deal with condition that master send address while slave no ack
|
||||
* @retval the length of data read.
|
||||
*/
|
||||
u8 I2C_MasterRead_Patch(I2C_TypeDef *I2Cx, u8* pBuf, u8 len)
|
||||
{
|
||||
u8 cnt = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
/* read in the DR register the data to be received */
|
||||
for(cnt = 0; cnt < len; cnt++) {
|
||||
if(cnt >= len - 1) {
|
||||
/* generate stop singal */
|
||||
I2Cx->IC_DATA_CMD = 0x0003 << 8;
|
||||
} else {
|
||||
I2Cx->IC_DATA_CMD = 0x0001 << 8;
|
||||
}
|
||||
/* wait for I2C_FLAG_RFNE flag */
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_RFNE)) == 0) {
|
||||
if(I2C_GetRawINT(I2Cx) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
DBG_8195A(" TX_ABRT\n");
|
||||
I2C_ClearAllINT(I2Cx);
|
||||
return cnt;
|
||||
}
|
||||
}
|
||||
*pBuf++ = (u8)I2Cx->IC_DATA_CMD;
|
||||
}
|
||||
return cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write data with special length in master mode through the I2Cx peripheral under in-house IP.
|
||||
* @param I2Cx: where I2Cx can be I2C0_DEV or I2C1_DEV.
|
||||
* @param pBuf: point to the data to be transmitted.
|
||||
* @param len: the length of data that send.
|
||||
* @note deal with condition that master send address while slave no ack
|
||||
* @retval the length of data send.
|
||||
*/
|
||||
u8 I2C_MasterWrite_Patch(I2C_TypeDef *I2Cx, u8* pBuf, u8 len)
|
||||
{
|
||||
u8 cnt = 0;
|
||||
u8 temp = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
for(cnt = 0; cnt < len; cnt++)
|
||||
{
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFNF)) == 0);
|
||||
|
||||
if(cnt >= len - 1)
|
||||
{
|
||||
/*generate stop signal*/
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++) | (1 << 9);
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++);
|
||||
}
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFE)) == 0) {
|
||||
if(I2C_GetRawINT(I2Cx) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
DBG_8195A(" TX_ABRT\n");
|
||||
I2C_ClearAllINT(I2Cx);
|
||||
return cnt;
|
||||
}
|
||||
}
|
||||
}
|
||||
return cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read data with special length in master mode through the I2Cx peripheral under in-house IP.
|
||||
* @param I2Cx: where I2Cx can be I2C0_DEV or I2C1_DEV.
|
||||
* @param pBuf: point to the buffer to hold the received data.
|
||||
* @param len: the length of data that to be received.
|
||||
* @param timeout_ms: specifies timeout time, unit is ms.
|
||||
* @retval the length of data read.
|
||||
*/
|
||||
int I2C_MasterRead_TimeOut(I2C_TypeDef *I2Cx, u8* pBuf, u8 len, u32 timeout_ms)
|
||||
{
|
||||
int cnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
/* read in the DR register the data to be received */
|
||||
for(cnt = 0; cnt < len; cnt++) {
|
||||
InTimeoutCount = timeout_ms*500;
|
||||
|
||||
if(cnt >= len - 1) {
|
||||
/* generate stop singal */
|
||||
I2Cx->IC_DATA_CMD = 0x0003 << 8;
|
||||
} else {
|
||||
I2Cx->IC_DATA_CMD = 0x0001 << 8;
|
||||
}
|
||||
|
||||
/* wait for I2C_FLAG_RFNE flag */
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_RFNE)) == 0) {
|
||||
if(I2C_GetRawINT(I2Cx) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
DBG_8195A(" TX_ABRT\n");
|
||||
I2C_ClearAllINT(I2Cx);
|
||||
return cnt;
|
||||
}
|
||||
|
||||
DelayUs(2);
|
||||
|
||||
if (InTimeoutCount == 0) {
|
||||
DBG_8195A("MasterRead_TimeOut\n");
|
||||
return cnt;
|
||||
}
|
||||
InTimeoutCount--;
|
||||
}
|
||||
|
||||
*pBuf++ = (u8)I2Cx->IC_DATA_CMD;
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write data with special length in master mode through the I2Cx peripheral under in-house IP.
|
||||
* @param I2Cx: where I2Cx can be I2C0_DEV or I2C1_DEV.
|
||||
* @param pBuf: point to the data to be transmitted.
|
||||
* @param len: the length of data that to be received.
|
||||
* @param timeout_ms: specifies timeout time, unit is ms.
|
||||
* @retval the length of data send.
|
||||
*/
|
||||
int I2C_MasterWrite_TimeOut(I2C_TypeDef *I2Cx, u8* pBuf, u8 len, u32 timeout_ms)
|
||||
{
|
||||
int cnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
for(cnt = 0; cnt < len; cnt++)
|
||||
{
|
||||
InTimeoutCount = timeout_ms*500;
|
||||
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFNF)) == 0);
|
||||
|
||||
if(cnt >= len - 1)
|
||||
{
|
||||
/*generate stop signal*/
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++) | (1 << 9);
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++);
|
||||
}
|
||||
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFE)) == 0) {
|
||||
if(I2C_GetRawINT(I2Cx) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
DBG_8195A(" TX_ABRT\n");
|
||||
I2C_ClearAllINT(I2Cx);
|
||||
return cnt;
|
||||
}
|
||||
|
||||
DelayUs(2);
|
||||
|
||||
if (InTimeoutCount == 0) {
|
||||
DBG_8195A("MasterWrite_TimeOut\n");
|
||||
return cnt;
|
||||
}
|
||||
InTimeoutCount--;
|
||||
}
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Master sends single byte through the I2Cx peripheral to detect slave device.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: the address of slave that to be detected.
|
||||
* @param timeout_ms: specifies timeout time, unit is ms.
|
||||
* @retval Slave ack condition:
|
||||
* - 0: Slave available
|
||||
* - -1: Slave not available
|
||||
*/
|
||||
int I2C_MasterSendNullData_TimeOut(I2C_TypeDef *I2Cx, int address, u32 timeout_ms)
|
||||
{
|
||||
u8 I2CTemp = (u8)(address<<1);
|
||||
I2C_MasterSendNullData(I2Cx, &I2CTemp, 0, 1, 0);
|
||||
|
||||
DelayMs(timeout_ms);
|
||||
|
||||
if(I2C_GetRawINT(I2Cx) & BIT_IC_RAW_INTR_STAT_TX_ABRT) {
|
||||
I2C_ClearAllINT(I2Cx);
|
||||
|
||||
/* Wait for i2c enter trap state from trap_stop state*/
|
||||
DelayUs(100);
|
||||
I2C_Cmd(I2Cx, DISABLE);
|
||||
I2C_Cmd(I2Cx, ENABLE);
|
||||
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
/**
|
||||
* @brief Get i2c index according to the SDA PinName.
|
||||
* @param sda: SDA PinName according to pinmux spec.
|
||||
* @retval i2c index:
|
||||
* - 0: I2C0 Device
|
||||
* - 1: I2C1 Device
|
||||
*/
|
||||
static uint32_t
|
||||
i2c_index_get(PinName sda)
|
||||
{
|
||||
if ((sda == _PA_4) || (sda == _PA_19)|| (sda == _PA_30)) {
|
||||
return 0;
|
||||
} else if ((sda == _PA_2) || (sda == _PA_23)|| (sda == _PA_27)) {
|
||||
return 1;
|
||||
} else {
|
||||
assert_param(0);
|
||||
}
|
||||
return 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the I2C device, include clock/function/I2C registers.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param sda: SDA PinName according to pinmux spec.
|
||||
* @param scl: SCL PinName according to pinmux spec.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
|
||||
{
|
||||
uint32_t i2c_idx = i2c_index_get(sda);
|
||||
|
||||
ConfigDebugErr &= (~(_DBG_I2C_|_DBG_GDMA_));
|
||||
ConfigDebugInfo&= (~(_DBG_I2C_|_DBG_GDMA_));
|
||||
|
||||
DBG_8195A("i2c_idx:%x\n",i2c_idx);
|
||||
|
||||
obj->i2c_idx = i2c_idx;
|
||||
obj->I2Cx = I2C_DEV_TABLE[i2c_idx].I2Cx;
|
||||
|
||||
/* Set I2C Device Number */
|
||||
I2CInitDat[obj->i2c_idx].I2CIdx = i2c_idx;
|
||||
|
||||
/* Load I2C default value */
|
||||
I2C_StructInit(&I2CInitDat[obj->i2c_idx]);
|
||||
|
||||
/* Assign I2C Pin Mux */
|
||||
I2CInitDat[obj->i2c_idx].I2CMaster = I2C_MASTER_MODE;
|
||||
I2CInitDat[obj->i2c_idx].I2CSpdMod = I2C_SS_MODE;
|
||||
I2CInitDat[obj->i2c_idx].I2CClk = 100;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = 0;
|
||||
|
||||
/* Init I2C now */
|
||||
if(I2CInitDat[obj->i2c_idx].I2CIdx == 0) {
|
||||
//RCC_PeriphClockCmd(APBPeriph_I2C0, APBPeriph_I2C0_CLOCK, DISABLE);
|
||||
RCC_PeriphClockCmd(APBPeriph_I2C0, APBPeriph_I2C0_CLOCK, ENABLE);
|
||||
} else {
|
||||
//RCC_PeriphClockCmd(APBPeriph_I2C1, APBPeriph_I2C1_CLOCK, DISABLE);
|
||||
RCC_PeriphClockCmd(APBPeriph_I2C1, APBPeriph_I2C1_CLOCK, ENABLE);
|
||||
}
|
||||
/* I2C Pin Mux Initialization */
|
||||
Pinmux_Config(sda, PINMUX_FUNCTION_I2C);
|
||||
Pinmux_Config(scl, PINMUX_FUNCTION_I2C);
|
||||
|
||||
PAD_PullCtrl(sda, GPIO_PuPd_UP);
|
||||
PAD_PullCtrl(scl, GPIO_PuPd_UP);
|
||||
/* I2C HAL Initialization */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
|
||||
/* I2C Enable Module */
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set i2c frequency.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param hz: i2c clock(unit is Hz).
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_frequency(i2c_t *obj, int hz)
|
||||
{
|
||||
uint16_t i2c_default_clk = (uint16_t) I2CInitDat[obj->i2c_idx].I2CClk;
|
||||
uint16_t i2c_user_clk = (uint16_t) (hz/1000);
|
||||
|
||||
if (i2c_default_clk != i2c_user_clk) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
if (i2c_user_clk <= 100) {
|
||||
I2CInitDat[obj->i2c_idx].I2CSpdMod = I2C_SS_MODE;
|
||||
}
|
||||
else if ((i2c_user_clk > 100) && (i2c_user_clk <= 400)) {
|
||||
I2CInitDat[obj->i2c_idx].I2CSpdMod = I2C_FS_MODE;
|
||||
}
|
||||
else if (i2c_user_clk > 400) {
|
||||
I2CInitDat[obj->i2c_idx].I2CSpdMod = I2C_HS_MODE;
|
||||
}
|
||||
else {
|
||||
I2CInitDat[obj->i2c_idx].I2CSpdMod = I2C_SS_MODE;
|
||||
}
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
I2CInitDat[obj->i2c_idx].I2CClk = i2c_user_clk;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start i2c device.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval 0
|
||||
*/
|
||||
inline int i2c_start(i2c_t *obj)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop i2c device.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval 0
|
||||
*/
|
||||
inline int i2c_stop(i2c_t *obj)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master read in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: slave address which will be transmitted.
|
||||
* @param data: point to the buffer to hold the received data.
|
||||
* @param length: the length of data that to be received.
|
||||
* @param stop: specifies whether a STOP is issued after all the bytes are received.
|
||||
* @param timeout_ms: specifies timeout time, unit is ms.
|
||||
* @retval the length of data received. If the retval less than the data length that want to be received, this transfer is not success.
|
||||
*/
|
||||
int i2c_read_timeout(i2c_t *obj, int address, char *data, int length, int stop, int timeout_ms)
|
||||
{
|
||||
if (i2c_target_addr[obj->i2c_idx] != address) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
return (I2C_MasterRead_TimeOut(obj->I2Cx, (unsigned char*)data, length,timeout_ms));
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master wite in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: slave address which will be transmitted.
|
||||
* @param data: point to the buffer to hold the received data.
|
||||
* @param length: the length of data that to be received.
|
||||
* @param stop: specifies whether a STOP is issued after all the bytes are written.
|
||||
* @param timeout_ms: specifies timeout time, unit is ms.
|
||||
* @note If the length equal to zero, will call I2C_MasterSendNullData_TimeOut()
|
||||
* @retval the length of data written. If the retval less than the data length that want to be sent, this transfer is not success.
|
||||
*/
|
||||
int i2c_write_timeout(i2c_t *obj, int address, char *data, int length, int stop, int timeout_ms)
|
||||
{
|
||||
if (i2c_target_addr[obj->i2c_idx] != address) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
if(!length) {
|
||||
return (I2C_MasterSendNullData_TimeOut(obj->I2Cx, address, timeout_ms));
|
||||
}
|
||||
|
||||
return (I2C_MasterWrite_TimeOut(obj->I2Cx, (unsigned char*)data, length,timeout_ms));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master read in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: slave address which will be transmitted.
|
||||
* @param data: point to the buffer to hold the received data.
|
||||
* @param length: the length of data that to be received.
|
||||
* @param stop: specifies whether a STOP is issued after all the bytes are received.
|
||||
* @retval the length of data received.
|
||||
*/
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
|
||||
{
|
||||
u32 I2CInTOTcnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
u32 InStartCount = 0;
|
||||
|
||||
if (i2c_target_addr[obj->i2c_idx] != address) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
if (!master_addr_retry) {
|
||||
I2C_MasterRead(obj->I2Cx, (unsigned char*)data, length);
|
||||
} else {
|
||||
while (0 == I2C_MasterRead_Patch(obj->I2Cx, (unsigned char*)data, length)) {
|
||||
/* Wait for i2c enter trap state from trap_stop state*/
|
||||
DelayUs(100);
|
||||
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master write in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: slave address which will be transmitted.
|
||||
* @param data: point to the data to be sent.
|
||||
* @param length: the length of data that to be sent.
|
||||
* @param stop: specifies whether a STOP is issued after all the bytes are sent.
|
||||
* @retval the length of data send.
|
||||
*/
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
|
||||
{
|
||||
u32 I2CInTOTcnt = 0;
|
||||
u32 InTimeoutCount = 0;
|
||||
u32 InStartCount = 0;
|
||||
|
||||
if (i2c_target_addr[obj->i2c_idx] != address) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
if ((!restart_enable) |(1==stop)) {
|
||||
return (I2C_MasterWrite_Patch(obj->I2Cx, (unsigned char*)data, length));
|
||||
} else {
|
||||
i2c_send_restart(obj->I2Cx, (unsigned char*)data, length, 1);
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master send data and read data in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param address: slave address which will be transmitted.
|
||||
* @param pWriteBuf: point to the data to be sent.
|
||||
* @param Writelen: the length of data that to be sent.
|
||||
* @param pReadBuf: point to the buffer to hold the received data.
|
||||
* @param Readlen: the length of data that to be received.
|
||||
* @retval the length of data received.
|
||||
*/
|
||||
int i2c_repeatread(i2c_t *obj, int address, uint8_t *pWriteBuf, int Writelen, uint8_t *pReadBuf, int Readlen)
|
||||
{
|
||||
u8 cnt = 0;
|
||||
|
||||
if (i2c_target_addr[obj->i2c_idx] != address) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C target slave address */
|
||||
i2c_target_addr[obj->i2c_idx] = address;
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = address;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
/* write in the DR register the data to be sent */
|
||||
for(cnt = 0; cnt < Writelen; cnt++)
|
||||
{
|
||||
while((I2C_CheckFlagState(obj->I2Cx, BIT_IC_STATUS_TFNF)) == 0);
|
||||
|
||||
if(cnt >= Writelen - 1)
|
||||
{
|
||||
/*generate stop signal*/
|
||||
obj->I2Cx->IC_DATA_CMD = (*pWriteBuf++) | (1 << 10);
|
||||
}
|
||||
else
|
||||
{
|
||||
obj->I2Cx->IC_DATA_CMD = (*pWriteBuf++);
|
||||
}
|
||||
}
|
||||
/*Wait I2C TX FIFO not full*/
|
||||
while((I2C_CheckFlagState(obj->I2Cx, BIT_IC_STATUS_TFNF)) == 0);
|
||||
|
||||
I2C_MasterRead(obj->I2Cx, pReadBuf, Readlen);
|
||||
|
||||
return Readlen;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master restart after all bytes are sent.
|
||||
* @param I2Cx: where I2Cx can be I2C0_DEV or I2C1_DEV to select the I2C peripheral.
|
||||
* @param pBuf: point to the data to be sent.
|
||||
* @param len: the length of data that to be sent.
|
||||
* @param restart: specifies whether a RESTART is issued after all the bytes are sent.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_send_restart(I2C_TypeDef *I2Cx, u8* pBuf, u8 len, u8 restart)
|
||||
{
|
||||
u8 cnt = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
for(cnt = 0; cnt < len; cnt++)
|
||||
{
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFNF)) == 0);
|
||||
|
||||
if(cnt >= len - 1)
|
||||
{
|
||||
/*generate restart signal*/
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++) | (restart << 10);
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx->IC_DATA_CMD = (*pBuf++);
|
||||
}
|
||||
}
|
||||
|
||||
while((I2C_CheckFlagState(I2Cx, BIT_IC_STATUS_TFE)) == 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master receive single byte.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param last: hold the received data.
|
||||
* @retval the data that received.
|
||||
*/
|
||||
int i2c_byte_read(i2c_t *obj, int last)
|
||||
{
|
||||
uint8_t i2cdatlocal;
|
||||
|
||||
I2C_MasterRead(obj->I2Cx, &i2cdatlocal, 1);
|
||||
|
||||
return (int)i2cdatlocal;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C master send single byte.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param data: the data to be sent.
|
||||
* @retval result.
|
||||
*/
|
||||
int i2c_byte_write(i2c_t *obj, int data)
|
||||
{
|
||||
uint8_t i2cdatlocal = data;
|
||||
|
||||
I2C_MasterWrite(obj->I2Cx, &i2cdatlocal, 1);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the I2C device
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_reset(i2c_t *obj)
|
||||
{
|
||||
/* Deinit I2C directly */
|
||||
/* I2C HAL DeInitialization */
|
||||
I2C_Cmd(obj->I2Cx, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable i2c master RESTART function
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_restart_enable(i2c_t *obj)
|
||||
{
|
||||
uint32_t i2cen;
|
||||
|
||||
if (obj->I2Cx->IC_ENABLE & BIT_CTRL_IC_ENABLE) {
|
||||
I2C_Cmd(obj->I2Cx, DISABLE);
|
||||
i2cen = 1;
|
||||
}
|
||||
|
||||
obj->I2Cx->IC_CON |= BIT_CTRL_IC_CON_IC_RESTART_EN;
|
||||
|
||||
if (i2cen) {
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
restart_enable = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable i2c Master RESTART function
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_restart_disable(i2c_t *obj)
|
||||
{
|
||||
uint32_t i2cen;
|
||||
|
||||
if (obj->I2Cx->IC_ENABLE & BIT_CTRL_IC_ENABLE) {
|
||||
I2C_Cmd(obj->I2Cx, DISABLE);
|
||||
i2cen = 1;
|
||||
}
|
||||
|
||||
obj->I2Cx->IC_CON &= ~BIT_CTRL_IC_CON_IC_RESTART_EN;
|
||||
|
||||
if (i2cen) {
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
restart_enable = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable/Disable i2c Device
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param enable: this parameter can be one of the following values:
|
||||
* @arg 0 disable
|
||||
* @arg 1 enable
|
||||
* @retval result
|
||||
*/
|
||||
int i2c_enable_control(i2c_t *obj, int enable)
|
||||
{
|
||||
if (enable) {
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
} else {
|
||||
I2C_Cmd(obj->I2Cx, DISABLE);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//#if DEVICE_I2CSLAVE
|
||||
/**
|
||||
* @brief Set i2c slave address.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param idx: i2c index, this parameter can be one of the following values:
|
||||
* @arg 0 I2C0 Device
|
||||
* @arg 1 I2C1 Device
|
||||
* @param address: slave address.
|
||||
* @param mask: the mask of address
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
|
||||
{
|
||||
uint16_t i2c_default_addr = (uint16_t) I2CInitDat[obj->i2c_idx].I2CAckAddr;
|
||||
uint16_t i2c_user_addr = (uint16_t) address;
|
||||
|
||||
if (i2c_default_addr != i2c_user_addr) {
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
I2CInitDat[obj->i2c_idx].I2CAckAddr = i2c_user_addr;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set i2c device to be slave.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param enable_slave: enable slave function, this parameter can be one of the following values:
|
||||
* @arg 0 disable
|
||||
* @arg 1 enable
|
||||
* @retval none
|
||||
*/
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave)
|
||||
{
|
||||
/* Deinit I2C first */
|
||||
i2c_reset(obj);
|
||||
|
||||
/* Load the user defined I2C clock */
|
||||
I2CInitDat[obj->i2c_idx].I2CMaster = I2C_MASTER_MODE;
|
||||
if (enable_slave)
|
||||
I2CInitDat[obj->i2c_idx].I2CMaster = I2C_SLAVE_MODE;
|
||||
|
||||
/* Init I2C now */
|
||||
I2C_Init(obj->I2Cx, &I2CInitDat[obj->i2c_idx]);
|
||||
I2C_Cmd(obj->I2Cx, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get i2c slave state.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @retval the state of i2c slave.
|
||||
*/
|
||||
int i2c_slave_receive(i2c_t *obj)
|
||||
{
|
||||
u32 I2CLocalTemp = I2C_GetRawINT(obj->I2Cx);
|
||||
|
||||
if (I2CLocalTemp & BIT_IC_RAW_INTR_STAT_GEN_CALL) {
|
||||
return WriteGeneral;
|
||||
}
|
||||
else if (I2CLocalTemp & BIT_IC_RAW_INTR_STAT_RD_REQ) {
|
||||
return ReadAddressed;
|
||||
}
|
||||
|
||||
if (I2C_CheckFlagState(obj->I2Cx, BIT_IC_STATUS_RFNE)) {
|
||||
return WriteAddressed;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C slave read in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param data: point to the buffer to hold the received data.
|
||||
* @param length: the length of data that to be received.
|
||||
* @retval the length of data received.
|
||||
*/
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length)
|
||||
{
|
||||
I2C_SlaveRead(obj->I2Cx, (unsigned char*)data, length);
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C slave write in poll mode.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param data: point to the data to be sent.
|
||||
* @param length: the length of data that to be sent.
|
||||
* @retval result.
|
||||
*/
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length)
|
||||
{
|
||||
I2C_SlaveWrite(obj->I2Cx, (unsigned char*)data, length);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set/clear i2c slave RD_REQ interrupt mask.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param set: set or clear for read request.
|
||||
* @retval result.
|
||||
*/
|
||||
int i2c_slave_set_for_rd_req(i2c_t *obj, int set)
|
||||
{
|
||||
if (set) {
|
||||
I2C_INTConfig(obj->I2Cx, BIT_IC_INTR_MASK_M_RD_REQ, ENABLE);
|
||||
} else {
|
||||
I2C_INTConfig(obj->I2Cx, BIT_IC_INTR_MASK_M_RD_REQ, DISABLE);
|
||||
}
|
||||
|
||||
return _TRUE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set/clear i2c slave NAK or ACK data part in transfer.
|
||||
* @param obj: i2c object define in application software.
|
||||
* @param set_nak: set or clear for data NAK.
|
||||
* @retval result.
|
||||
*/
|
||||
int i2c_slave_set_for_data_nak(i2c_t *obj, int set_nak)
|
||||
{
|
||||
I2C_TypeDef * I2Cx = obj->I2Cx;
|
||||
u32 temp;
|
||||
|
||||
while (1) {
|
||||
temp = I2Cx->IC_STATUS;
|
||||
|
||||
if ((BIT_IC_STATUS_SLV_ACTIVITY & temp) == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
I2Cx->IC_SLV_DATA_NACK_ONLY = set_nak;
|
||||
return 0;
|
||||
}
|
||||
|
||||
//#endif // CONFIG_I2C_SLAVE_EN
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
361
component/common/mbed/targets/hal/rtl8711b/i2s_api.c
Normal file
361
component/common/mbed/targets/hal/rtl8711b/i2s_api.c
Normal file
|
|
@ -0,0 +1,361 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file i2s_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for I2S.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "i2s_api.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
typedef struct {
|
||||
VOID (*TxCCB)(uint32_t id, char *pbuf);
|
||||
u32 TxCBId;
|
||||
VOID (*RxCCB)(uint32_t id, char *pbuf);
|
||||
u32 RxCBId;
|
||||
} I2S_USER_CB;
|
||||
|
||||
static I2S_InitTypeDef I2SInitStruct;
|
||||
static I2S_USER_CB I2SUserCB; //Pointer to I2S User Callback
|
||||
static u32 next_tx_complete = 0;
|
||||
extern u32 i2s_cur_tx_page;
|
||||
extern u32 i2s_cur_rx_page;
|
||||
|
||||
static void i2s_sw_reset(void)
|
||||
{
|
||||
i2s_cur_tx_page = 0;
|
||||
i2s_cur_rx_page = 0;
|
||||
next_tx_complete = 0;
|
||||
}
|
||||
|
||||
static void i2s_isr(void *Data)
|
||||
{
|
||||
u32 I2STxIsr, I2SRxIsr;
|
||||
u8 I2SPageNum = I2SInitStruct.I2S_PageNum;
|
||||
u32 i;
|
||||
u32 pbuf;
|
||||
u32 cur_tx_page = 0;
|
||||
u32 cur_rx_page = 0;
|
||||
|
||||
I2S_ISRGet(I2S_DEV, &I2STxIsr, &I2SRxIsr);
|
||||
I2S_INTClear(I2S_DEV, I2STxIsr, I2SRxIsr);
|
||||
|
||||
for (i=0 ; i<I2SPageNum; i++) { // page 0, 1, 2, 3
|
||||
cur_rx_page = I2S_GetRxPage(I2S_DEV);
|
||||
if (I2SRxIsr & (1<<cur_rx_page)) {
|
||||
pbuf = I2S_GetRxPageAddr(cur_rx_page);
|
||||
I2SRxIsr &= ~(1<<cur_rx_page);
|
||||
|
||||
I2SUserCB.RxCCB(I2SUserCB.RxCBId, (char*)pbuf);
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for (i=0 ; i<I2SPageNum; i++) { // page 0, 1, 2, 3
|
||||
if (I2STxIsr & (1<<next_tx_complete)) {
|
||||
pbuf = I2S_GetTxPageAddr(next_tx_complete);
|
||||
I2STxIsr &= ~(1<<next_tx_complete);
|
||||
|
||||
next_tx_complete++;
|
||||
next_tx_complete &= 0x03;
|
||||
|
||||
I2SUserCB.TxCCB(I2SUserCB.TxCBId, (char*)pbuf);
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the I2S device, include clock/function/interrupt/I2S registers.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param sck: Serial clock PinName according to pinmux spec.
|
||||
* @param ws: Word select PinName according to pinmux spec.
|
||||
* @param sd_tx: Tx PinName according to pinmux spec.
|
||||
* @param sd_rx: Rx PinName according to pinmux spec.
|
||||
* @param mck: Master clock PinName according to pinmux spec.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_init(i2s_t *obj, PinName sck, PinName ws, PinName sd_tx, PinName sd_rx, PinName mck)
|
||||
{
|
||||
obj->i2s_idx = 0;
|
||||
|
||||
DBG_PRINTF(MODULE_I2S, LEVEL_INFO, "%s: Use I2S%d \n", __func__, obj->i2s_idx);
|
||||
|
||||
// Load user defined parameters
|
||||
I2S_StructInit(&I2SInitStruct);
|
||||
|
||||
/*I2S Interrupt Initialization*/
|
||||
InterruptRegister((IRQ_FUN) i2s_isr, I2S0_PCM0_IRQ, NULL, 3);
|
||||
InterruptEn(I2S0_PCM0_IRQ, 3);
|
||||
|
||||
/* enable system pll */
|
||||
PLL1_Set(BIT_SYS_SYSPLL_CK22P5792_EN | BIT_SYS_SYSPLL_CK24P576_EN, ENABLE);
|
||||
|
||||
/* enable lx bus for i2s */
|
||||
LXBUS_FCTRL(ON);
|
||||
|
||||
/*I2S Pin Mux Initialization*/
|
||||
RCC_PeriphClockCmd(APBPeriph_I2S0, APBPeriph_I2S0_CLOCK, ENABLE);
|
||||
Pinmux_Config(sck, PINMUX_FUNCTION_I2S);
|
||||
Pinmux_Config(ws, PINMUX_FUNCTION_I2S);
|
||||
Pinmux_Config(sd_tx, PINMUX_FUNCTION_I2S);
|
||||
Pinmux_Config(sd_rx, PINMUX_FUNCTION_I2S);
|
||||
Pinmux_Config(mck, PINMUX_FUNCTION_I2S);
|
||||
|
||||
next_tx_complete = 0;
|
||||
I2SInitStruct.I2S_TRxAct = obj->direction;
|
||||
I2SInitStruct.I2S_ChNum = obj->channel_num;
|
||||
I2SInitStruct.I2S_Rate = obj->sampling_rate;
|
||||
I2SInitStruct.I2S_WordLen = obj->word_length;
|
||||
/*I2S HAL Initialization*/
|
||||
I2S_Init(I2S_DEV, &I2SInitStruct);
|
||||
|
||||
/*I2S Enable Module*/
|
||||
I2S_Cmd(I2S_DEV, ENABLE);
|
||||
I2S_INTConfig(I2S_DEV, (I2S_TX_INT_PAGE0_OK|I2S_TX_INT_PAGE1_OK| I2S_TX_INT_PAGE2_OK|I2S_TX_INT_PAGE3_OK),
|
||||
(I2S_RX_INT_PAGE0_OK|I2S_RX_INT_PAGE1_OK | I2S_RX_INT_PAGE2_OK|I2S_RX_INT_PAGE3_OK));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets page number, page size, page address.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param tx_buf: pointer to the start address of Tx page.
|
||||
* @param rx_buf: pointer to the start address of Rx page.
|
||||
* @param page_num: page number. This parameter must be set to a value in the 2~4 range
|
||||
* @param page_size: page size. This parameter must be set to a value in the 4~16384 bytes range
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_set_dma_buffer(i2s_t *obj, char *tx_buf, char *rx_buf,
|
||||
uint32_t page_num, uint32_t page_size)
|
||||
{
|
||||
u32 i;
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
|
||||
if ((page_num < 2) || (page_num > 4) || (page_size < 8)) {
|
||||
DBG_PRINTF(MODULE_I2S, LEVEL_INFO, "%s: PageNum(%d) valid value is 2~4; PageSize(%d must > 8)\r\n", \
|
||||
__FUNCTION__, page_num, page_size);
|
||||
return;
|
||||
}
|
||||
|
||||
I2SInitStruct.I2S_PageNum = page_num;
|
||||
I2SInitStruct.I2S_PageSize = page_size/4; // unit is 4-bytes
|
||||
I2S_SetPageSize(I2S_DEV, (page_size/4));
|
||||
I2S_SetPageNum(I2S_DEV, (page_num));
|
||||
I2S_SetDMABuf(I2S_DEV, (u8*)tx_buf, (u8*)rx_buf);
|
||||
|
||||
for (i=0;i<page_num;i++) {
|
||||
I2S_SetTxPageAddr(i, (uint32_t)(tx_buf + ((page_size) * i)));
|
||||
I2S_SetRxPageAddr(i, (uint32_t)(rx_buf + ((page_size) * i)));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets TX interrupt handler.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param handler: TX interrupt callback function.
|
||||
* @param id: TX interrupt callback function parameter.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_tx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
|
||||
I2SUserCB.TxCCB = handler;
|
||||
I2SUserCB.TxCBId = id;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets RX interrupt handler.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param handler: RX interrupt callback function.
|
||||
* @param id: RX interrupt callback function parameter.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_rx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
|
||||
I2SUserCB.RxCCB = handler;
|
||||
I2SUserCB.RxCBId = id;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets i2s data transfer direction.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param trx_type: transfer direction.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_DIR_RX: Rx receive direction
|
||||
* @arg I2S_DIR_TX: Tx transmission direction
|
||||
* @arg I2S_DIR_TXRX: Tx & Rx bi-direction
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_set_direction(i2s_t *obj, int trx_type)
|
||||
{
|
||||
obj->direction = trx_type;
|
||||
|
||||
I2SInitStruct.I2S_TRxAct = trx_type;
|
||||
I2S_SetDirection(I2S_DEV, trx_type);
|
||||
|
||||
if (trx_type == I2S_DIR_TX) {
|
||||
I2S_RxDmaCmd(I2S_DEV, DISABLE);
|
||||
} else if ((trx_type == I2S_DIR_TXRX) ||(trx_type == I2S_DIR_RX) ) {
|
||||
I2S_RxDmaCmd(I2S_DEV, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets i2s channel number, sample rate, word length.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param channel_num: this parameter can be one of the following values:
|
||||
* @arg CH_STEREO: stereo channel
|
||||
* @arg CH_MONO: mono channel
|
||||
* @param rate: this parameter can be one of the following values:
|
||||
* @arg SR_8KHZ: sample rate is 8kHz
|
||||
* @arg SR_16KHZ: sample rate is 16kHz
|
||||
* @arg SR_24KHZ: sample rate is 24kHz
|
||||
* @arg SR_32KHZ: sample rate is 32kHz
|
||||
* @arg SR_48KHZ: sample rate is 48kHz
|
||||
* @arg SR_96KHZ: sample rate is 96kHz
|
||||
* @arg SR_7p35KHZ: sample rate is 7.35kHz
|
||||
* @arg SR_14p7KHZ: sample rate is 14.7kHz
|
||||
* @arg SR_22p05KHZ: sample rate is 22.05kHz
|
||||
* @arg SR_29p4KHZ: sample rate is 29.4kHz
|
||||
* @arg SR_44p1KHZ: sample rate is 44.1kHz
|
||||
* @arg SR_88p2KHZ: sample rate is 88.2kHz
|
||||
* @param word_len: this parameter can be one of the following values:
|
||||
* @arg WL_16b: sample bit is 16 bit
|
||||
* @arg WL_24b: sample bit is 24 bit
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_set_param(i2s_t *obj, int channel_num, int rate, int word_len)
|
||||
{
|
||||
obj->channel_num = channel_num;
|
||||
obj->sampling_rate = rate;
|
||||
obj->word_length = word_len;
|
||||
|
||||
I2SInitStruct.I2S_ChNum = channel_num;
|
||||
I2SInitStruct.I2S_Rate = rate;
|
||||
I2SInitStruct.I2S_WordLen = word_len;
|
||||
I2S_SetChNum(I2S_DEV, I2SInitStruct.I2S_ChNum);
|
||||
I2S_SetRate(I2S_DEV, rate);
|
||||
I2S_SetWordLen(I2S_DEV, I2SInitStruct.I2S_WordLen);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the I2S device, include function/interrupt/I2S registers.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_deinit(i2s_t *obj)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
IRQn_Type IrqNum = I2S0_PCM0_IRQ;
|
||||
|
||||
/*I2S Interrupt DeInitialization*/
|
||||
InterruptDis(IrqNum);
|
||||
InterruptUnRegister(IrqNum);
|
||||
|
||||
/*I2S Disable Module*/
|
||||
I2S_INTConfig(I2S_DEV, 0, 0);
|
||||
I2S_Cmd(I2S_DEV, DISABLE);
|
||||
|
||||
i2s_sw_reset();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets current tx page address.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @retval address of current tx page or NULL
|
||||
* @note current page own by cpu, return address of current tx page
|
||||
* @note current page own by i2s, return NULL
|
||||
*/
|
||||
int* i2s_get_tx_page(i2s_t *obj)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
u8 cur_tx_page;
|
||||
|
||||
cur_tx_page = I2S_GetTxPage(I2S_DEV);
|
||||
if (!I2S_TxPageBusy(I2S_DEV, cur_tx_page)) {
|
||||
return ((int*)I2S_GetTxPageAddr(cur_tx_page));
|
||||
} else {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets current tx page own by i2s.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @param pbuf: tx buffer adderss.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_send_page(i2s_t *obj, uint32_t *pbuf)
|
||||
{
|
||||
u32 cur_tx_page;
|
||||
|
||||
cur_tx_page = I2S_GetTxPage(I2S_DEV);
|
||||
|
||||
if (I2S_GetTxPageAddr(cur_tx_page) != (uint32_t)pbuf)
|
||||
DBG_8195A("%s: tx buffer not match cur_tx_page \n", __func__);
|
||||
|
||||
I2S_TxPageDMA_EN(I2S_DEV, cur_tx_page);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets current rx page own by i2s.
|
||||
* @param obj: i2s object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_recv_page(i2s_t *obj)
|
||||
{
|
||||
u32 cur_rx_page;
|
||||
|
||||
cur_rx_page = I2S_GetRxPage(I2S_DEV);
|
||||
|
||||
if ((I2S_DEV->IS_RX_PAGE_OWN[cur_rx_page] & BIT(31)) == 0) {
|
||||
I2S_RxPageDMA_EN(I2S_DEV,cur_rx_page);
|
||||
} else {
|
||||
//DBG_8195A("i2s_recv_page: re-enable\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable i2s interrupt and function.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_enable(i2s_t *obj)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
|
||||
I2S_Cmd(I2S_DEV, ENABLE);
|
||||
I2S_INTConfig(I2S_DEV, (I2S_TX_INT_PAGE0_OK|I2S_TX_INT_PAGE1_OK| I2S_TX_INT_PAGE2_OK|I2S_TX_INT_PAGE3_OK),
|
||||
(I2S_RX_INT_PAGE0_OK|I2S_RX_INT_PAGE1_OK | I2S_RX_INT_PAGE2_OK|I2S_RX_INT_PAGE3_OK));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable i2s interrupt and function.
|
||||
* @retval none
|
||||
*/
|
||||
void i2s_disable(i2s_t *obj)
|
||||
{
|
||||
//uint8_t i2s_idx = obj->i2s_idx;
|
||||
I2S_INTConfig(I2S_DEV, 0, 0);
|
||||
|
||||
I2S_Cmd(I2S_DEV, DISABLE);
|
||||
|
||||
i2s_sw_reset();
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
243
component/common/mbed/targets/hal/rtl8711b/nfc_api.c
Normal file
243
component/common/mbed/targets/hal/rtl8711b/nfc_api.c
Normal file
|
|
@ -0,0 +1,243 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#if CONFIG_NFC_NORMAL
|
||||
|
||||
#include "nfc_api.h"
|
||||
|
||||
/**
|
||||
* @brief The NFC tag write callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_tagwrite_callback(PNFC_ADAPTER pNFCAdp, uint32_t page, uint32_t wr_data)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_write_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_write_cb)obj->nfc_wr_cb;
|
||||
if (NULL != handler) {
|
||||
handler(obj->wr_cb_arg, page, wr_data);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief The NFC tag read callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_event_callback(PNFC_ADAPTER pNFCAdp, uint32_t event)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_event_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_event_cb)obj->nfc_ev_cb;
|
||||
if (NULL != handler) {
|
||||
if (obj->event_mask & event) {
|
||||
handler(obj->ev_cb_arg, event);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief The NFC tag read callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_tagread_callback(PNFC_ADAPTER pNFCAdp, uint32_t page)
|
||||
{
|
||||
// notify upper layer when read tag page 0 only
|
||||
if (0 == page) {
|
||||
nfc_event_callback(pNFCAdp, NFC_EV_READ);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief The NFC cache read done callback function wrapper
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_cache_read_callback(PNFC_ADAPTER pNFCAdp, uint32_t start_pg, uint32_t *pbuf)
|
||||
{
|
||||
nfctag_t *obj;
|
||||
nfc_write_cb handler;
|
||||
|
||||
obj = pNFCAdp->nfc_obj;
|
||||
|
||||
handler = (nfc_write_cb)obj->nfc_cache_rd_cb;
|
||||
if (NULL != handler) {
|
||||
handler(obj->cache_read_cb_arg, start_pg, (uint32_t)pbuf);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To initial NFC tag hardware and resource
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_init(nfctag_t *obj, uint32_t *pg_init_val)
|
||||
{
|
||||
_memset((void *)obj, 0, sizeof(nfctag_t));
|
||||
HalNFCDmemInit(pg_init_val, NFCTAGLENGTH);
|
||||
HalNFCInit(&(obj->NFCAdapter));
|
||||
HalNFCFwDownload();
|
||||
obj->NFCAdapter.nfc_obj = obj;
|
||||
obj->pwr_status = NFC_PWR_RUNNING;
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To free NFC tag hardware and resource
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_free(nfctag_t *obj)
|
||||
{
|
||||
HalNFCDeinit(&(obj->NFCAdapter));
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC read occurred
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_read(nfctag_t *obj, nfc_read_cb handler, void *arg)
|
||||
{
|
||||
obj->nfc_rd_cb = (void *)handler;
|
||||
obj->rd_cb_arg = arg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC write occurred
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_write(nfctag_t *obj, nfc_write_cb handler, void *arg)
|
||||
{
|
||||
obj->nfc_wr_cb = (void *)handler;
|
||||
obj->wr_cb_arg = arg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To register the callback function for NFC events occurred
|
||||
* and the event mask
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
*/
|
||||
void nfc_event(nfctag_t *obj, nfc_event_cb handler, void *arg, unsigned int event_mask)
|
||||
{
|
||||
obj->nfc_ev_cb = (void *)handler;
|
||||
obj->ev_cb_arg = arg;
|
||||
obj->event_mask = event_mask;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To set a new power mode to the NFC device
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_power(nfctag_t *obj, int pwr_mode, int wake_event)
|
||||
{
|
||||
// TODO:
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief to update the NFC read cache. The data in the NFC read cache
|
||||
* buffer will be transmitted out when NFC read occurred
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_cache_write(nfctag_t *obj, uint32_t *tbuf, unsigned int spage, unsigned int pg_num)
|
||||
{
|
||||
u8 remain_pg;
|
||||
u8 pg_offset=0;
|
||||
u8 i;
|
||||
|
||||
if ((spage+pg_num) > NFC_MAX_CACHE_PAGE_NUM) {
|
||||
return NFC_ERROR;
|
||||
}
|
||||
|
||||
remain_pg = pg_num;
|
||||
while (remain_pg > 0) {
|
||||
if (remain_pg >= 4) {
|
||||
A2NWriteCatch (&obj->NFCAdapter, (spage+pg_offset), 4, (u32*)(&tbuf[pg_offset]));
|
||||
remain_pg -= 4;
|
||||
pg_offset += 4;
|
||||
}
|
||||
else {
|
||||
for(i=0;i<remain_pg;i++) {
|
||||
A2NWriteCatch (&obj->NFCAdapter, (spage+pg_offset), 1, (u32*)(&tbuf[pg_offset]));
|
||||
pg_offset++;
|
||||
}
|
||||
remain_pg = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To get current NFC status
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_cache_raed(nfctag_t *obj, nfc_cache_read_cb handler,
|
||||
void *arg, unsigned int start_pg)
|
||||
{
|
||||
if (start_pg > NFC_MAX_CACHE_PAGE_NUM) {
|
||||
return NFC_ERROR;
|
||||
}
|
||||
|
||||
obj->nfc_cache_rd_cb = (void *)handler;
|
||||
obj->cache_read_cb_arg = arg;
|
||||
|
||||
A2NReadCatch(&(obj->NFCAdapter), (u8)start_pg);
|
||||
|
||||
return NFC_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief to read back the NFC read cache.
|
||||
*
|
||||
* @return The result
|
||||
*
|
||||
*/
|
||||
int nfc_status(nfctag_t *obj)
|
||||
{
|
||||
// TODO:
|
||||
|
||||
return (obj->pwr_status);
|
||||
}
|
||||
|
||||
#endif
|
||||
106
component/common/mbed/targets/hal/rtl8711b/objects.h
Normal file
106
component/common/mbed/targets/hal/rtl8711b/objects.h
Normal file
|
|
@ -0,0 +1,106 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_OBJECTS_H
|
||||
#define MBED_OBJECTS_H
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "PortNames.h"
|
||||
#include "PeripheralNames.h"
|
||||
#include "PinNames.h"
|
||||
#include "rtl8710b.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct gpio_irq_s {
|
||||
PinName pin;
|
||||
} gpio_irq_t;
|
||||
|
||||
typedef struct gpio_s {
|
||||
PinName pin;
|
||||
} gpio_t;
|
||||
|
||||
struct port_s {
|
||||
PortName port;
|
||||
uint32_t mask;
|
||||
};
|
||||
|
||||
struct serial_s {
|
||||
uint8_t uart_idx;
|
||||
uint32_t tx_len;
|
||||
uint32_t rx_len;
|
||||
};
|
||||
|
||||
struct spi_s {
|
||||
/* user variables */
|
||||
uint32_t spi_idx;
|
||||
|
||||
/* internal variables */
|
||||
uint32_t irq_handler;
|
||||
uint32_t irq_id;
|
||||
uint32_t state;
|
||||
uint8_t sclk;
|
||||
uint32_t bus_tx_done_handler;
|
||||
uint32_t bus_tx_done_irq_id;
|
||||
};
|
||||
|
||||
struct pwmout_s {
|
||||
uint8_t pwm_idx;
|
||||
uint32_t period;//in us
|
||||
float pulse;//in us
|
||||
};
|
||||
|
||||
struct i2c_s {
|
||||
uint32_t i2c_idx;
|
||||
I2C_TypeDef * I2Cx;
|
||||
};
|
||||
|
||||
struct flash_s {
|
||||
FLASH_InitTypeDef SpicInitPara;
|
||||
};
|
||||
|
||||
struct analogin_s {
|
||||
uint8_t adc_idx;
|
||||
};
|
||||
|
||||
struct gtimer_s {
|
||||
void *handler;
|
||||
uint32_t hid;
|
||||
uint8_t timer_id;
|
||||
uint8_t is_periodcal;
|
||||
};
|
||||
|
||||
struct i2s_s {
|
||||
uint8_t i2s_idx;
|
||||
uint8_t sampling_rate;
|
||||
uint8_t channel_num;
|
||||
uint8_t word_length;
|
||||
uint8_t direction;
|
||||
};
|
||||
|
||||
struct gdma_s {
|
||||
u8 index;
|
||||
u8 ch_num;
|
||||
IRQ_FUN user_cb;
|
||||
u32 user_cb_data;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
76
component/common/mbed/targets/hal/rtl8711b/pinmap.c
Normal file
76
component/common/mbed/targets/hal/rtl8711b/pinmap.c
Normal file
|
|
@ -0,0 +1,76 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
/**
|
||||
* Configure pin enable and function
|
||||
*/
|
||||
void pin_function(PinName pin, int function)
|
||||
{
|
||||
u8 dword_index = 0;
|
||||
u8 shift_bits = 0;
|
||||
u32 Temp = 0;
|
||||
|
||||
assert_param(pin != NC);
|
||||
|
||||
/* 16bit per one pad */
|
||||
/* get PADCTR dword inedex*/
|
||||
dword_index = pin >> 1;
|
||||
|
||||
/* get shift_bits in PADCTR dword */
|
||||
shift_bits = (pin % 2) * 16;
|
||||
|
||||
/* get PADCTR */
|
||||
Temp = PINMUX->PADCTR[dword_index];
|
||||
|
||||
/* clear Pin_Num PADCTR */
|
||||
if(shift_bits){
|
||||
Temp &= 0x0000FFFF;
|
||||
}else{
|
||||
Temp &= 0xFFFF0000;
|
||||
}
|
||||
|
||||
/* set needs function */
|
||||
Temp |= ((function & 0xFF) | BIT(8)) << shift_bits; /* bit8 is close pad power down */
|
||||
|
||||
/* set PADCTR register */
|
||||
PINMUX->PADCTR[dword_index] = Temp;
|
||||
}
|
||||
|
||||
/**
|
||||
* Configure pin pull-up/pull-down
|
||||
*/
|
||||
void pin_mode(PinName pin, PinMode mode)
|
||||
{
|
||||
u8 pull_type;
|
||||
|
||||
switch (mode) {
|
||||
case PullNone:
|
||||
pull_type = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
|
||||
case PullDown:
|
||||
pull_type = GPIO_PuPd_DOWN;
|
||||
break;
|
||||
|
||||
case PullUp:
|
||||
pull_type = GPIO_PuPd_UP;
|
||||
break;
|
||||
|
||||
case OpenDrain:
|
||||
default:
|
||||
pull_type = GPIO_PuPd_NOPULL;
|
||||
break;
|
||||
}
|
||||
|
||||
PAD_PullCtrl((u32)pin, (u32)pull_type);
|
||||
|
||||
}
|
||||
78
component/common/mbed/targets/hal/rtl8711b/pinmap_common.c
Normal file
78
component/common/mbed/targets/hal/rtl8711b/pinmap_common.c
Normal file
|
|
@ -0,0 +1,78 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "basic_types.h"
|
||||
#include "diag.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
void pinmap_pinout(PinName pin, const PinMap *map)
|
||||
{
|
||||
if (pin == NC)
|
||||
return;
|
||||
|
||||
while (map->pin != NC) {
|
||||
if (map->pin == pin) {
|
||||
pin_mode(pin, PullNone);
|
||||
pin_function(pin, map->function);
|
||||
return;
|
||||
}
|
||||
map++;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t pinmap_merge(uint32_t a, uint32_t b)
|
||||
{
|
||||
/* both are the same (inc both NC) */
|
||||
if (a == b)
|
||||
return a;
|
||||
|
||||
/* one (or both) is not connected */
|
||||
if (a == (uint32_t)NC)
|
||||
return b;
|
||||
if (b == (uint32_t)NC)
|
||||
return a;
|
||||
|
||||
/* mis-match error case */
|
||||
DBG_8195A("%s: pinmap mis-match\n", __FUNCTION__);
|
||||
|
||||
return (uint32_t)NC;
|
||||
}
|
||||
|
||||
uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map)
|
||||
{
|
||||
while (map->pin != NC) {
|
||||
if (map->pin == pin) {
|
||||
return map->peripheral;
|
||||
}
|
||||
map++;
|
||||
}
|
||||
return (uint32_t)NC;
|
||||
}
|
||||
|
||||
uint32_t pinmap_peripheral(PinName pin, const PinMap* map)
|
||||
{
|
||||
uint32_t peripheral = (uint32_t)NC;
|
||||
|
||||
if (pin == (PinName)NC)
|
||||
return (uint32_t)NC;
|
||||
|
||||
peripheral = pinmap_find_peripheral(pin, map);
|
||||
|
||||
if ((uint32_t)NC == peripheral) {// no mapping available
|
||||
DBG_8195A("%s: pinmap not found for peripheral\n", __FUNCTION__);
|
||||
}
|
||||
|
||||
return peripheral;
|
||||
}
|
||||
137
component/common/mbed/targets/hal/rtl8711b/port_api.c
Normal file
137
component/common/mbed/targets/hal/rtl8711b/port_api.c
Normal file
|
|
@ -0,0 +1,137 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file port_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for GPIO PORT.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "port_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "gpio_api.h"
|
||||
#include "PinNames.h"
|
||||
//#include "mbed_error.h"
|
||||
|
||||
#define GPIO_PORT_NUM 2
|
||||
|
||||
/**
|
||||
* @brief Get GPIO port pin name
|
||||
* @param port: PortName according to pinmux spec, this parameter can be one of the following values:
|
||||
* @arg PortA: port number is A, has 32 pins
|
||||
* @arg PortB: port number is B, has 7 pins
|
||||
* @param pin_n: pin number.
|
||||
* @note pin_n must be set to a value in the 0~31 range when PortA
|
||||
* @note pin_n must be set to a value in the 0~6 range when PortB
|
||||
* @retval none
|
||||
*/
|
||||
PinName port_pin(PortName port, int pin_n)
|
||||
{
|
||||
return (PinName)(port << 5 | pin_n);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIO device port, include data direction registers.
|
||||
* @param obj: gpio port object define in application software.
|
||||
* @param port: PortName according to pinmux spec, this parameter can be one of the following values:
|
||||
* @arg PortA: port A, has 32 pins
|
||||
* @arg PortB: port B, has 7 pins
|
||||
* @param mask: One bit one gpio pin, select one or multiple pins of the specified port.
|
||||
* @param dir: gpio port direction, this parameter can be one of the following values:
|
||||
* @arg PIN_INPUT: port pins are input
|
||||
* @arg PIN_OUTPUT: port pins are output
|
||||
* @retval none
|
||||
*/
|
||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
|
||||
{
|
||||
u32 i;
|
||||
RCC_PeriphClockCmd(APBPeriph_GPIO, APBPeriph_GPIO_CLOCK, ENABLE);
|
||||
|
||||
assert_param(port < GPIO_PORT_NUM);
|
||||
|
||||
obj->port = port;
|
||||
obj->mask = mask;
|
||||
|
||||
port_dir(obj, dir);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set GPIO port pins data direction.
|
||||
* @param obj: gpio port object define in application software.
|
||||
* @param dir: this parameter can be one of the following values:
|
||||
* @arg PIN_INPUT: port pins are input
|
||||
* @arg PIN_OUTPUT: port pins are output
|
||||
* @retval none
|
||||
*/
|
||||
void port_dir(port_t *obj, PinDirection dir)
|
||||
{
|
||||
if (dir == PIN_OUTPUT) {
|
||||
GPIO_PortDirection(obj->port, obj->mask, GPIO_Mode_OUT);
|
||||
} else {
|
||||
GPIO_PortDirection(obj->port, obj->mask, GPIO_Mode_IN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO port pins pull up/pull down.
|
||||
* @param obj: gpio port object define in application software.
|
||||
* @param mode: this parameter can be one of the following values:
|
||||
* @arg PullNone: HighZ
|
||||
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
|
||||
* @arg PullDown: pull down
|
||||
* @arg PullUp: pull up
|
||||
* @retval none
|
||||
*/
|
||||
void port_mode(port_t *obj, PinMode mode)
|
||||
{
|
||||
uint32_t pin_idx;
|
||||
uint32_t max_num = 0;
|
||||
|
||||
if (obj->port == PORT_A) {
|
||||
max_num = 32;
|
||||
} else {
|
||||
max_num = 7;
|
||||
}
|
||||
|
||||
for (pin_idx = 0; pin_idx < max_num; pin_idx++) {
|
||||
if (obj->mask & BIT(pin_idx)) {
|
||||
/* PinName = (obj->port << 5 | pin_idx) */
|
||||
pin_mode((obj->port << 5 | pin_idx), mode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets value to the selected port pins.
|
||||
* @param obj: gpio port object define in application software.
|
||||
* @param value: One bit one gpio pin, set value to one or multiple pins of the specified port.
|
||||
* @note corresponding bit is 1, pin state set to high; corresponding bit is 0, pin state set to low
|
||||
* @retval none
|
||||
*/
|
||||
void port_write(port_t *obj, int value)
|
||||
{
|
||||
GPIO_PortWrite(obj->port, obj->mask, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified gpio port pins.
|
||||
* @param obj: gpio port object define in application software.
|
||||
* @retval state of the specified gpio port pins
|
||||
* @note corresponding bit is 1, pin state is high; corresponding bit is 0, pin state is low
|
||||
*/
|
||||
int port_read(port_t *obj)
|
||||
{
|
||||
u32 value = GPIO_PortRead(obj->port, obj->mask);
|
||||
|
||||
return value;
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
274
component/common/mbed/targets/hal/rtl8711b/pwmout_api.c
Normal file
274
component/common/mbed/targets/hal/rtl8711b/pwmout_api.c
Normal file
|
|
@ -0,0 +1,274 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file pwmout_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for PWM.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#include "device.h"
|
||||
#include "objects.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "pwmout_api.h"
|
||||
|
||||
#define PWM_TIMER 5
|
||||
u32 pin2chan[13][2] = {
|
||||
{PA_23, 0},
|
||||
{PA_15, 1},
|
||||
{PA_0 , 2},
|
||||
{PA_30, 3},
|
||||
{PA_13, 4},
|
||||
{PA_22, 5},
|
||||
{PA_14, 0},
|
||||
{PA_16, 1},
|
||||
{PA_17, 2},
|
||||
{PA_12, 3},
|
||||
{PA_5 , 4},
|
||||
{PA_21, 3},
|
||||
{PA_29, 4}
|
||||
};
|
||||
|
||||
u8 timer5_start = 0;
|
||||
u8 ch_start[6] = {0};
|
||||
u8 prescaler = 0;
|
||||
|
||||
/**
|
||||
* @brief Return PWM channel number according to pin name.
|
||||
* @param pin: The pin to be told.
|
||||
* @retval value: PWM channel number corresponding to the pin.
|
||||
*/
|
||||
u32 pwmout_pin2chan(PinName pin)
|
||||
{
|
||||
int i = 0;
|
||||
for(;i < 13;i++){
|
||||
if(pin2chan[i][0] == pin){
|
||||
return pin2chan[i][1];
|
||||
}
|
||||
}
|
||||
return NC;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the TIM5 device, include TIM5 registers and function.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_timer5_init(pwmout_t* obj)
|
||||
{
|
||||
RTIM_TimeBaseInitTypeDef TIM_InitStruct;
|
||||
RTIM_TimeBaseStructInit(&TIM_InitStruct);
|
||||
TIM_InitStruct.TIM_Idx = PWM_TIMER;
|
||||
|
||||
RTIM_TimeBaseInit(TIM5, &TIM_InitStruct, TIMER5_IRQ, NULL, (u32)&TIM_InitStruct);
|
||||
RTIM_Cmd(TIM5, ENABLE);
|
||||
|
||||
timer5_start = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the PWM function/registers of the specified pin with default parameters.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param pin: the pinname of specified channel to be set.
|
||||
* @retval none
|
||||
* @note
|
||||
* - default period: 1638us
|
||||
* - default pulse width: 102us
|
||||
* - default duty cycle: 6.227%
|
||||
*/
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
u32 pwm_chan;
|
||||
TIM_CCInitTypeDef TIM_CCInitStruct;
|
||||
|
||||
pwm_chan = pwmout_pin2chan(pin);
|
||||
if(pwm_chan == NC)
|
||||
DBG_8195A("PinName error: pwm channel of PinName doesn't exist!\n");
|
||||
|
||||
if(!timer5_start)
|
||||
pwmout_timer5_init(obj);
|
||||
|
||||
RTIM_CCStructInit(&TIM_CCInitStruct);
|
||||
RTIM_CCxInit(TIM5, &TIM_CCInitStruct, pwm_chan);
|
||||
RTIM_CCxCmd(TIM5, pwm_chan, TIM_CCx_Enable);
|
||||
|
||||
/* loguart may close here */
|
||||
Pinmux_Config(pin, PINMUX_FUNCTION_PWM);
|
||||
|
||||
ch_start[pwm_chan] = 1;
|
||||
obj->pwm_idx = pwm_chan;
|
||||
obj->period = 0x10000 * (prescaler + 1) / 40;
|
||||
obj->pulse = 0x1000 * (prescaler + 1) / 40;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the PWM device of the specified channel.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @retval none
|
||||
* @note If all channels are released, TIM5 will also be disabled.
|
||||
*/
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
/* disable pwm channel */
|
||||
int i = obj->pwm_idx;
|
||||
|
||||
if(ch_start[i]){
|
||||
ch_start[i] = 0;
|
||||
RTIM_CCxCmd(TIM5, obj->pwm_idx, TIM_CCx_Disable);
|
||||
}
|
||||
|
||||
/* stop timer5 if no pwm channels starts */
|
||||
for(i = 0;i < 6;i++){
|
||||
if(ch_start[i]){
|
||||
return;
|
||||
}
|
||||
}
|
||||
RTIM_Cmd(TIM5, DISABLE);
|
||||
timer5_start = 0;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the duty cycle of the specified channel.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param value: The duty cycle value to be set.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_write(pwmout_t* obj, float percent) //write duty-cycle
|
||||
{
|
||||
u32 ccrx;
|
||||
|
||||
if (percent < (float)0.0) {
|
||||
percent = 0.0;
|
||||
}
|
||||
else if (percent > (float)1.0) {
|
||||
percent = 1.0;
|
||||
}
|
||||
|
||||
obj->pulse = (percent * obj->period);
|
||||
|
||||
ccrx = (u32)(obj->pulse * 40 / (prescaler + 1)) & 0x0000ffff;
|
||||
|
||||
RTIM_CCRxSet(TIM5, ccrx, obj->pwm_idx);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the duty cycle value of the specified channel.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @retval value: the duty cycle value of the specified channel.
|
||||
*/
|
||||
float pwmout_read(pwmout_t* obj) //read duty-cycle
|
||||
{
|
||||
float value = 0;
|
||||
if (obj->period > 0) {
|
||||
value = (float)obj->pulse / (float)obj->period;
|
||||
}
|
||||
return ((value > 1.0) ? (1.0) : (value));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the period of the specified channel in seconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param seconds: The period value to be set in seconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, (int)(seconds * 1000000.0f));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the period of the specified channel in millseconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param ms: The period value to be set in millseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, (int)(ms * 1000));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the period of the specified channel in microseconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param us: The period value to be set in microseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
u32 arr;
|
||||
float dc = pwmout_read(obj);
|
||||
u32 tmp = us * 40 / (prescaler + 1);
|
||||
|
||||
if(tmp > 0x10000){
|
||||
prescaler = us * 40 / 0x10000;
|
||||
RTIM_PrescalerConfig(TIM5, prescaler, TIM_PSCReloadMode_Update);
|
||||
}
|
||||
|
||||
obj->period = us;
|
||||
arr = us * 40 / (prescaler + 1) - 1;
|
||||
|
||||
RTIM_ChangePeriod(TIM5, arr);
|
||||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the pulse width of the specified channel in seconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param seconds: The pulse width value to be set in seconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, (int)(seconds * 1000000.0f));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the pulse width of the specified channel in milliseconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param ms: The pulse width value to be set in milliseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the pulse width of the specified channel in microseconds.
|
||||
* @param obj: PWM object define in application software.
|
||||
* @param us: The pulse width value to be set in microseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
u32 ccrx;
|
||||
|
||||
obj->pulse = (float)us;
|
||||
ccrx = (u32)(obj->pulse * 40 / (prescaler + 1)) & 0x0000ffff;
|
||||
RTIM_CCRxSet(TIM5, ccrx, obj->pwm_idx);
|
||||
}
|
||||
|
||||
void pwmout_start(pwmout_t* obj)
|
||||
{
|
||||
RTIM_CCxCmd(TIM5, obj->pwm_idx, TIM_CCx_Enable);
|
||||
}
|
||||
|
||||
void pwmout_stop(pwmout_t* obj)
|
||||
{
|
||||
RTIM_CCxCmd(TIM5, obj->pwm_idx, TIM_CCx_Disable);
|
||||
}
|
||||
|
||||
357
component/common/mbed/targets/hal/rtl8711b/rtc_api.c
Normal file
357
component/common/mbed/targets/hal/rtl8711b/rtc_api.c
Normal file
|
|
@ -0,0 +1,357 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file rtc_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for RTC.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "rtc_api.h"
|
||||
|
||||
#include <time.h>
|
||||
#include "timer_api.h"
|
||||
|
||||
static struct tm rtc_timeinfo;
|
||||
static int rtc_en = 0;
|
||||
static alarm_irq_handler rtc_alarm_handler;
|
||||
|
||||
const static u8 dim[12] = {
|
||||
31, 0, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
|
||||
|
||||
/**
|
||||
* @brief This function is used to tell a year is a leap year or not.
|
||||
* @param year: The year need to be told.
|
||||
* @retval value:
|
||||
* - 1: This year is leap year.
|
||||
* - 0: This year is not leap year.
|
||||
*/
|
||||
static inline bool is_leap_year(unsigned int year)
|
||||
{
|
||||
u32 full_year = year + 1900;
|
||||
return (!(full_year % 4) && (full_year % 100)) || !(full_year % 400);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function tells how many days in a month of a year.
|
||||
* @param year: Specified year
|
||||
* @param month: Specified month
|
||||
* @retval value: Number of days in the month.
|
||||
*/
|
||||
static u8 days_in_month (u8 month, u8 year)
|
||||
{
|
||||
u8 ret = dim[month];
|
||||
if (ret == 0)
|
||||
ret = is_leap_year (year) ? 29 : 28;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is used to calculate month and day of month according to year and day of the year.
|
||||
* @param year: years since 1900.
|
||||
* @param yday: day of the year.
|
||||
* @param mon: pointer to the variable which stores month, the value can be 0-11
|
||||
* @param mday: pointer to the variable which stores day of month, the value can be 1-31
|
||||
* @retval value: none
|
||||
*/
|
||||
static void rtc_calculate_mday(int year, int yday, int* mon, int* mday)
|
||||
{
|
||||
int t_mon = -1, t_yday = yday + 1;
|
||||
|
||||
while(t_yday > 0){
|
||||
t_mon ++;
|
||||
t_yday -= days_in_month(t_mon, year);
|
||||
}
|
||||
|
||||
*mon = t_mon;
|
||||
*mday = t_yday + days_in_month(t_mon, year);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is used to calculate day of week according to date.
|
||||
* @param year: years since 1900.
|
||||
* @param mon: which month of the year
|
||||
* @param mday: pointer to the variable which store day of month
|
||||
* @param wday: pointer to the variable which store day of week, the value can be 0-6, and 0 means Sunday
|
||||
* @retval value: none
|
||||
*/
|
||||
static void rtc_calculate_wday(int year, int mon, int mday, int* wday)
|
||||
{
|
||||
int t_year = year + 1900, t_mon = mon + 1;
|
||||
|
||||
if(t_mon == 1 || t_mon == 2){
|
||||
t_year --;
|
||||
t_mon += 12;
|
||||
}
|
||||
|
||||
int c = t_year / 100;
|
||||
int y = t_year % 100;
|
||||
int week = (c / 4) - 2 * c + (y + y / 4) + (26 * (t_mon + 1) / 10) + mday -1;
|
||||
|
||||
while(week < 0){
|
||||
week += 7;
|
||||
}
|
||||
week %= 7;
|
||||
|
||||
*wday = week;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is used to restore rtc_timeinfo global variable whose value is lost after system reset.
|
||||
* @param none
|
||||
* @retval value: none
|
||||
*/
|
||||
static void rtc_restore_timeinfo(void)
|
||||
{
|
||||
u32 value, days_in_year;
|
||||
|
||||
RTC_TimeTypeDef RTC_TimeStruct;
|
||||
RTC_GetTime(RTC_Format_BIN, &RTC_TimeStruct);
|
||||
rtc_timeinfo.tm_sec = RTC_TimeStruct.RTC_Seconds;
|
||||
rtc_timeinfo.tm_min = RTC_TimeStruct.RTC_Minutes;
|
||||
rtc_timeinfo.tm_hour = RTC_TimeStruct.RTC_Hours;
|
||||
rtc_timeinfo.tm_yday = RTC_TimeStruct.RTC_Days;
|
||||
|
||||
value = BKUP_Read(0);
|
||||
rtc_timeinfo.tm_year = (value & BIT_RTC_BACKUP) >> 8;
|
||||
|
||||
days_in_year = (is_leap_year(rtc_timeinfo.tm_year) ? 366 : 365);
|
||||
if(rtc_timeinfo.tm_yday > days_in_year - 1){
|
||||
rtc_timeinfo.tm_year ++;
|
||||
rtc_timeinfo.tm_yday -= days_in_year;
|
||||
|
||||
/* over one year, update days in RTC_TR */
|
||||
RTC_TimeStruct.RTC_Days = rtc_timeinfo.tm_yday;
|
||||
RTC_SetTime(RTC_Format_BIN, &RTC_TimeStruct);
|
||||
}
|
||||
|
||||
rtc_calculate_mday(rtc_timeinfo.tm_year, rtc_timeinfo.tm_yday, &rtc_timeinfo.tm_mon, &rtc_timeinfo.tm_mday);
|
||||
rtc_calculate_wday(rtc_timeinfo.tm_year, rtc_timeinfo.tm_mon, rtc_timeinfo.tm_mday, &rtc_timeinfo.tm_wday);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is used to backup tm_year parameter in rtc_timeinfo global variable before system reset.
|
||||
* @param none
|
||||
* @retval value: none
|
||||
*/
|
||||
void rtc_backup_timeinfo(void)
|
||||
{
|
||||
u32 value = BKUP_Read(0);
|
||||
value = (value & ~BIT_RTC_BACKUP) | (rtc_timeinfo.tm_year << 8);
|
||||
|
||||
BKUP_Write(0, value);
|
||||
|
||||
BKUP_Set(0, BIT_RTC_RESTORE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the RTC device, include clock, RTC registers and function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void rtc_init(void)
|
||||
{
|
||||
RTC_InitTypeDef RTC_InitStruct;
|
||||
|
||||
RTC_ClokSource(0);
|
||||
|
||||
RTC_StructInit(&RTC_InitStruct);
|
||||
RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24;
|
||||
|
||||
RTC_Init(&RTC_InitStruct);
|
||||
|
||||
/* 32760 need add need add 15 cycles (256Hz) every 4 min*/
|
||||
//RTC_SmoothCalibConfig(RTC_CalibSign_Positive, 15,
|
||||
// RTC_CalibPeriod_4MIN, RTC_Calib_Enable);
|
||||
|
||||
rtc_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the RTC device.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void rtc_free(void)
|
||||
{
|
||||
rtc_en = 0;
|
||||
rtc_alarm_handler = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function tells whether RTC is enabled or not.
|
||||
* @param none
|
||||
* @retval status:
|
||||
* - 1: RTC is enable.
|
||||
* - 0: RTC is disable.
|
||||
*/
|
||||
int rtc_isenabled(void)
|
||||
{
|
||||
return rtc_en;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the specified timestamp in seconds to RTC.
|
||||
* @param t: Seconds from 1970.1.1 00:00:00 to specified data and time
|
||||
* which is to be set.
|
||||
* @retval none
|
||||
*/
|
||||
void rtc_write(time_t t)
|
||||
{
|
||||
/* Convert the time in to a tm*/
|
||||
struct tm *timeinfo = localtime(&t);
|
||||
|
||||
RTC_TimeTypeDef RTC_TimeStruct;
|
||||
|
||||
/*set time in RTC */
|
||||
RTC_TimeStruct.RTC_H12_PMAM = RTC_H12_AM;
|
||||
RTC_TimeStruct.RTC_Days = timeinfo->tm_yday;
|
||||
RTC_TimeStruct.RTC_Hours = timeinfo->tm_hour;
|
||||
RTC_TimeStruct.RTC_Minutes = timeinfo->tm_min;
|
||||
RTC_TimeStruct.RTC_Seconds = timeinfo->tm_sec;
|
||||
RTC_SetTime(RTC_Format_BIN, &RTC_TimeStruct);
|
||||
|
||||
/* Set rtc_timeinfo*/
|
||||
_memcpy((void*)&rtc_timeinfo, (void*)timeinfo, sizeof(struct tm));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get current timestamp in seconds from RTC.
|
||||
* @param none
|
||||
* @retval value: The current timestamp in seconds which is calculated from
|
||||
* 1970.1.1 00:00:00.
|
||||
*/
|
||||
time_t rtc_read(void)
|
||||
{
|
||||
time_t t;
|
||||
struct tm tm_temp;
|
||||
RTC_TimeTypeDef RTC_TimeStruct;
|
||||
u32 delta_days = 0;
|
||||
|
||||
if(BKUP_Read(0) & BIT_RTC_RESTORE){
|
||||
rtc_restore_timeinfo();
|
||||
BKUP_Clear(0, BIT_RTC_RESTORE);
|
||||
}
|
||||
|
||||
_memcpy((void*)&tm_temp, (void*)&rtc_timeinfo, sizeof(struct tm));
|
||||
|
||||
/*hour, min, sec get from RTC*/
|
||||
RTC_GetTime(RTC_Format_BIN, &RTC_TimeStruct);
|
||||
tm_temp.tm_sec = RTC_TimeStruct.RTC_Seconds;
|
||||
tm_temp.tm_min = RTC_TimeStruct.RTC_Minutes;
|
||||
tm_temp.tm_hour = RTC_TimeStruct.RTC_Hours;
|
||||
|
||||
/* calculate how many days later from last time update rtc_timeinfo */
|
||||
delta_days = RTC_TimeStruct.RTC_Days - tm_temp.tm_yday;
|
||||
|
||||
/* calculate wday, mday, yday, mon, year*/
|
||||
tm_temp.tm_wday += delta_days;
|
||||
if(tm_temp.tm_wday >= 7){
|
||||
tm_temp.tm_wday = tm_temp.tm_wday % 7;
|
||||
}
|
||||
|
||||
tm_temp.tm_yday += delta_days;
|
||||
tm_temp.tm_mday += delta_days;
|
||||
|
||||
while(tm_temp.tm_mday > days_in_month(tm_temp.tm_mon, tm_temp.tm_year)){
|
||||
tm_temp.tm_mday -= days_in_month(tm_temp.tm_mon, tm_temp.tm_year);
|
||||
tm_temp.tm_mon++;
|
||||
|
||||
if(tm_temp.tm_mon >= 12){
|
||||
tm_temp.tm_mon -= 12;
|
||||
tm_temp.tm_yday -= is_leap_year(tm_temp.tm_year) ? 366 : 365;
|
||||
tm_temp.tm_year ++;
|
||||
|
||||
/* over one year, update days in RTC_TR */
|
||||
RTC_TimeStruct.RTC_Days = tm_temp.tm_yday;
|
||||
RTC_SetTime(RTC_Format_BIN, &RTC_TimeStruct);
|
||||
|
||||
/* update rtc_timeinfo */
|
||||
_memcpy((void*)&rtc_timeinfo, (void*)&tm_temp, sizeof(struct tm));
|
||||
}
|
||||
}
|
||||
|
||||
/* Convert to timestamp(seconds from 1970.1.1 00:00:00)*/
|
||||
t = mktime(&tm_temp);
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC alarm interrupt handler function.
|
||||
* @param data: RTC IRQ callback data
|
||||
* @retval none
|
||||
*/
|
||||
void rtc_alarm_intr_handler(u32 data)
|
||||
{
|
||||
alarm_irq_handler hdl;
|
||||
|
||||
/*clear alarm flag*/
|
||||
RTC_AlarmClear();
|
||||
|
||||
/* execute user handler*/
|
||||
if(rtc_alarm_handler != NULL){
|
||||
hdl = (alarm_irq_handler)rtc_alarm_handler;
|
||||
hdl();
|
||||
}
|
||||
|
||||
/*disable alarm*/
|
||||
rtc_disable_alarm();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the specified RTC Alarm and interrupt.
|
||||
* @param alarm: alarm object define in application software.
|
||||
* @param alarmHandler: alarm interrupt callback function.
|
||||
* @retval status:
|
||||
* - 1: success
|
||||
* - Others: failure
|
||||
*/
|
||||
u32 rtc_set_alarm(alarm_t *alrm, alarm_irq_handler alarmHandler)
|
||||
{
|
||||
RTC_AlarmTypeDef RTC_AlarmStruct_temp;
|
||||
|
||||
rtc_alarm_handler = alarmHandler;
|
||||
|
||||
/* set alarm */
|
||||
RTC_AlarmStructInit(&RTC_AlarmStruct_temp);
|
||||
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_H12_PMAM = RTC_H12_AM;
|
||||
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Days = alrm->yday;
|
||||
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Hours = alrm->hour;
|
||||
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Minutes = alrm->min;
|
||||
RTC_AlarmStruct_temp.RTC_AlarmTime.RTC_Seconds = alrm->sec;
|
||||
|
||||
RTC_AlarmStruct_temp.RTC_AlarmMask = RTC_AlarmMask_None;
|
||||
RTC_AlarmStruct_temp.RTC_Alarm2Mask = RTC_Alarm2Mask_None;
|
||||
|
||||
RTC_SetAlarm(RTC_Format_BIN, &RTC_AlarmStruct_temp);
|
||||
|
||||
RTC_AlarmCmd(ENABLE);
|
||||
InterruptRegister((IRQ_FUN)rtc_alarm_intr_handler, RTC_IRQ, (u32)alrm, 4);
|
||||
InterruptEn(RTC_IRQ, 4);
|
||||
|
||||
return _TRUE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable RTC Alarm and function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void rtc_disable_alarm(void)
|
||||
{
|
||||
InterruptDis(RTC_IRQ);
|
||||
InterruptUnRegister(RTC_IRQ);
|
||||
RTC_AlarmCmd(DISABLE);
|
||||
|
||||
rtc_alarm_handler = NULL;
|
||||
}
|
||||
1501
component/common/mbed/targets/hal/rtl8711b/serial_api.c
Normal file
1501
component/common/mbed/targets/hal/rtl8711b/serial_api.c
Normal file
File diff suppressed because it is too large
Load diff
211
component/common/mbed/targets/hal/rtl8711b/sleep.c
Normal file
211
component/common/mbed/targets/hal/rtl8711b/sleep.c
Normal file
|
|
@ -0,0 +1,211 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file sleep.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for SLEEP.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "sleep_ex_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
SLEEP_WAKEUP_EVENT DStandbyWakeupEvent={0};
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Clock Gated power saving.
|
||||
* This function just make the system to enter the clock gated
|
||||
* power saving mode and pending on wake up event waitting.
|
||||
* The user application need to configure the peripheral to
|
||||
* generate system wake up event, like GPIO interrupt,
|
||||
* G-Timer timeout, etc. befor entering power saving mode.
|
||||
* @param wakeup_event: A bit map of wake up event.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SLEEP_WAKEUP_BY_STIMER
|
||||
* @arg SLEEP_WAKEUP_BY_GPIO_INT
|
||||
* @arg SLEEP_WAKEUP_BY_WLAN
|
||||
* @arg SLEEP_WAKEUP_BY_SDIO
|
||||
* @arg SLEEP_WAKEUP_BY_USB
|
||||
* @arg SLEEP_WAKEUP_BY_GPIO
|
||||
* @arg SLEEP_WAKEUP_BY_UART
|
||||
* @arg SLEEP_WAKEUP_BY_I2C
|
||||
* @arg SLEEP_WAKEUP_BY_RTC
|
||||
* @param sleep_duration: the system sleep duration in ms, only valid
|
||||
* for SLEEP_WAKEUP_BY_STIMER wake up event.
|
||||
* @retval None
|
||||
*/
|
||||
void sleep_ex(uint32_t wakeup_event, uint32_t sleep_duration)
|
||||
{
|
||||
__asm volatile( "cpsid i" );
|
||||
|
||||
SOCPS_SleepInit();
|
||||
|
||||
/* user setting have high priority */
|
||||
SOCPS_SetWakeEvent(wakeup_event, ENABLE);
|
||||
if (sleep_duration > 0) {
|
||||
SOCPS_SET_REGUTIMER(sleep_duration, 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
SOCPS_SleepPG();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Clock Gated power saving.
|
||||
* This function just make the system to enter the clock gated
|
||||
* power saving mode and pending on wake up event waitting.
|
||||
* The user application need to configure the peripheral to
|
||||
* generate system wake up event, like GPIO interrupt
|
||||
* , G-Timer timeout, etc. befor entering power saving mode.
|
||||
* @param wakeup_event: A bit map of wake up event.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SLEEP_WAKEUP_BY_STIMER
|
||||
* @arg SLEEP_WAKEUP_BY_GPIO_INT
|
||||
* @arg SLEEP_WAKEUP_BY_WLAN
|
||||
* @arg SLEEP_WAKEUP_BY_SDIO
|
||||
* @arg SLEEP_WAKEUP_BY_USB
|
||||
* @arg SLEEP_WAKEUP_BY_GPIO
|
||||
* @arg SLEEP_WAKEUP_BY_UART
|
||||
* @arg SLEEP_WAKEUP_BY_I2C
|
||||
* @arg SLEEP_WAKEUP_BY_RTC
|
||||
* @param sleep_duration: the system sleep duration in ms, only valid
|
||||
* for SLEEP_WAKEUP_BY_STIMER wake up event.
|
||||
* @param clk_sourec_enable: the option for SCLK on(1)/off(0)
|
||||
* @param sdr_enable: the option for turn off the SDR controller (1:off, 0:on)
|
||||
* @retval None
|
||||
*/
|
||||
void sleep_ex_selective(uint32_t wakeup_event, uint32_t sleep_duration, uint32_t clk_sourec_enable, uint32_t sdr_enable)
|
||||
{
|
||||
sleep_ex(wakeup_event, sleep_duration);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief To add a wake up event to wake up the system from the
|
||||
* deep standby power saving mode.
|
||||
* @param wakeup_event: A bit map of wake up event.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg STANDBY_WAKEUP_BY_STIMER
|
||||
* @arg STANDBY_WAKEUP_BY_GPIO
|
||||
* @arg STANDBY_WAKEUP_BY_RTC
|
||||
* @param sleep_duration_ms: the system sleep duration in ms, only valid
|
||||
* for STANDBY_WAKEUP_BY_STIMER wake up event.
|
||||
* @param gpio_active: for a GPIO pin to wake up the system by goes high or low
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg WAKEUP_BY_GPIO_NONE
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP0_LOW
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP0_HIG
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP1_LOW
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP1_HIG
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP2_LOW
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP2_HIG
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP3_LOW
|
||||
* @arg WAKEUP_BY_GPIO_WAKEUP3_HIG
|
||||
* @retval None
|
||||
*/
|
||||
void standby_wakeup_event_add(uint32_t wakeup_event, u32 gpio_active)
|
||||
{
|
||||
DStandbyWakeupEvent.wakeup_event |= wakeup_event;
|
||||
|
||||
if (gpio_active != 0) {
|
||||
DStandbyWakeupEvent.gpio_option |= gpio_active;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To delete a wake up event for wakeing up the system from the
|
||||
* deep standby power saving mode.
|
||||
* @param wakeup_event: A bit map of wake up event.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg STANDBY_WAKEUP_BY_STIMER
|
||||
* @arg STANDBY_WAKEUP_BY_GPIO
|
||||
* @arg STANDBY_WAKEUP_BY_RTC
|
||||
* @retval None
|
||||
*/
|
||||
void standby_wakeup_event_del(uint32_t wakeup_event)
|
||||
{
|
||||
DStandbyWakeupEvent.wakeup_event &= ~wakeup_event;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Deep Standby power saving.
|
||||
* The CPU, memory and part fo peripheral power is off when
|
||||
* entering deep standby power saving mode. The program needs
|
||||
* to be reload from the flash at system resume.
|
||||
* @retval None
|
||||
*/
|
||||
void deepstandby_ex(uint32_t sleep_duration_ms)
|
||||
{
|
||||
__asm volatile( "cpsid i" );
|
||||
|
||||
/* Clear event */
|
||||
SOCPS_ClearWakeEvent();
|
||||
|
||||
/* power mode option: */
|
||||
SOCPS_DstandbyInit();
|
||||
|
||||
if (DStandbyWakeupEvent.wakeup_event & STANDBY_WAKEUP_BY_STIMER) {
|
||||
DStandbyWakeupEvent.timer_duration = sleep_duration_ms;
|
||||
}
|
||||
|
||||
/* user setting have high priority */
|
||||
if (DStandbyWakeupEvent.wakeup_event != 0) {
|
||||
SOCPS_SetWakeEvent(DStandbyWakeupEvent.wakeup_event, ENABLE);
|
||||
}
|
||||
if (DStandbyWakeupEvent.gpio_option != WAKEUP_BY_GPIO_NONE) {
|
||||
SOCPS_WakePinsCtrl(DStandbyWakeupEvent.gpio_option);
|
||||
}
|
||||
if (DStandbyWakeupEvent.timer_duration > 0) {
|
||||
SOCPS_SET_REGUTIMER(DStandbyWakeupEvent.timer_duration, 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
SOCPS_DeepStandby_RAM();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief To make the system entering the Deep Sleep power saving mode.
|
||||
* The CPU, memory and peripheral power is off when entering
|
||||
* deep sleep power saving mode. The program needs to be reload
|
||||
* and all peripheral needs be re-configure when system resume.
|
||||
* @param wakeup_event: A bit map of wake up event.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DSLEEP_WAKEUP_BY_TIMER
|
||||
* @arg DSLEEP_WAKEUP_BY_GPIO
|
||||
* @param sleep_duration: the system sleep duration in ms, only valid
|
||||
* for DSLEEP_WAKEUP_BY_TIMER wake up event.
|
||||
* @retval None
|
||||
*/
|
||||
void deepsleep_ex(uint32_t wakeup_event, uint32_t sleep_duration)
|
||||
{
|
||||
__asm volatile( "cpsid i" );
|
||||
SOCPS_DsleepInit();
|
||||
|
||||
if (sleep_duration > 0) {
|
||||
SOCPS_SET_REGUTIMER(sleep_duration, 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
SOCPS_DeepSleep_RAM();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief get deep sleep wakeup reason.
|
||||
* @retval BIT(0): Timer, BIT(2): GPIO
|
||||
*/
|
||||
int deepsleep_get_bootup_reason()
|
||||
{
|
||||
int Reason = SOCPS_DsleepWakeReason();
|
||||
|
||||
if (Reason & BIT_SYSON_DSLP_WTIMER33)
|
||||
return DSLEEP_WAKEUP_BY_TIMER;
|
||||
else if (Reason & BIT_SYSON_DSLP_GPIO)
|
||||
return DSLEEP_WAKEUP_BY_GPIO;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
703
component/common/mbed/targets/hal/rtl8711b/spdio_api.c
Normal file
703
component/common/mbed/targets/hal/rtl8711b/spdio_api.c
Normal file
|
|
@ -0,0 +1,703 @@
|
|||
|
||||
#include "FreeRTOS.h"
|
||||
#include "ameba_soc.h"
|
||||
//#include "rtl8710b_sdio.h"
|
||||
//#include "rtl8711b_tim.h"
|
||||
#include "spdio_api.h"
|
||||
#include "rtl8710b_inic.h"
|
||||
#include "rtl8710b_sdio.h"
|
||||
|
||||
#define SPDIO_IRQ_PRIORITY 10
|
||||
#define SPDIO_TX_BUF_SZ_UNIT 64
|
||||
#define RX_BD_FREE_TH 5
|
||||
#define MIN_RX_BD_SEND_PKT 2
|
||||
#define MAX_RX_BD_BUF_SIZE 16380 // the Maximum size for a RX_BD point to, make it 4-bytes aligned
|
||||
|
||||
typedef struct {
|
||||
u32 Address; /* The TX buffer physical address, it must be 4-bytes aligned */
|
||||
}SPDIO_TX_BD;
|
||||
|
||||
/* The RX Buffer Descriptor format */
|
||||
typedef struct {
|
||||
u32 BuffSize:14; /* bit[13:0], RX Buffer Size, Maximum 16384-1 */
|
||||
u32 LS:1; /* bit[14], is the Last Segment ? */
|
||||
u32 FS:1; /* bit[15], is the First Segment ? */
|
||||
u32 Seq:16; /* bit[31:16], The sequence number, it's no use for now */
|
||||
u32 PhyAddr; /* The RX buffer physical address, it must be 4-bytes aligned */
|
||||
} SPDIO_RX_BD;
|
||||
|
||||
/* the data structer to bind a TX_BD with a TX Packet */
|
||||
typedef struct {
|
||||
SPDIO_TX_BD *pTXBD; // Point to the TX_BD buffer
|
||||
VOID *priv;
|
||||
u8 isPktEnd; // For a packet over 1 BD , this flag to indicate is this BD contains a packet end
|
||||
u8 isFree; // is this TX BD free
|
||||
} SPDIO_TX_BD_HANDLE;
|
||||
|
||||
/* the data structer to bind a RX_BD with a RX Packet */
|
||||
typedef struct {
|
||||
VOID *priv;
|
||||
SPDIO_RX_BD *pRXBD; // Point to the RX_BD buffer
|
||||
INIC_RX_DESC *pRXDESC; // point to the Rx Packet
|
||||
u8 isPktEnd; // For a packet over 1 BD , this flag to indicate is this BD contains a packet end
|
||||
u8 isFree; // is this RX BD free (DMA done and its RX packet has been freed)
|
||||
} SPDIO_RX_BD_HANDLE;
|
||||
|
||||
typedef struct {
|
||||
VOID *spdio_priv; /*Data from User*/
|
||||
u8 *pTXBDAddr; /* The TX_BD start address */
|
||||
SPDIO_TX_BD *pTXBDAddrAligned; /* The TX_BD start address, it must be 4-bytes aligned */
|
||||
|
||||
SPDIO_TX_BD_HANDLE* pTXBDHdl; /* point to the allocated memory for TX_BD Handle array */
|
||||
u16 TXBDWPtr; /* The SDIO TX(Host->Device) BD local write index, different with HW maintained write Index. */
|
||||
u16 TXBDRPtr; /* The SDIO TX(Host->Device) BD read index */
|
||||
u16 TXBDRPtrReg; /* The SDIO TX(Host->Device) BD read index has been write to HW register */
|
||||
u8 TxOverFlow;
|
||||
|
||||
u8 *pRXBDAddr; /* The RX_BD start address */
|
||||
SPDIO_RX_BD *pRXBDAddrAligned; /* The RX_BD start address, it must be 8-bytes aligned */
|
||||
|
||||
u8 *pRXDESCAddr;
|
||||
INIC_RX_DESC *pRXDESCAddrAligned;
|
||||
SPDIO_RX_BD_HANDLE* pRXBDHdl; /* point to the allocated memory for RX_BD Handle array */
|
||||
u16 RXBDWPtr; /* The SDIO RX(Device->Host) BD write index */
|
||||
u16 RXBDRPtr; /* The SDIO RX(Device->Host) BD local read index, different with HW maintained Read Index. */
|
||||
|
||||
_sema IrqSema; /* Semaphore for SDIO RX, use to wakeup the SDIO RX task */
|
||||
xTaskHandle xSDIOIrqTaskHandle; /* The handle of the SDIO Task speical for RX, can be used to delte the task */
|
||||
} HAL_SPDIO_ADAPTER, *PHAL_SPDIO_ADAPTER;
|
||||
|
||||
struct spdio_t *g_spdio_priv = NULL;
|
||||
HAL_SPDIO_ADAPTER gSPDIODev;
|
||||
PHAL_SPDIO_ADAPTER pgSPDIODev = NULL;
|
||||
|
||||
s8 spdio_rx_done_cb(void *padapter, void *data, u16 offset, u16 pktsize, u8 type)
|
||||
{
|
||||
struct spdio_buf_t *buf = (struct spdio_buf_t *)data;
|
||||
struct spdio_t *obj = (struct spdio_t *)padapter;
|
||||
if(obj)
|
||||
return obj->rx_done_cb(obj, buf, (u8 *)(buf->buf_addr+offset), pktsize, type);
|
||||
else
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "spdio rx done callback function is null!");
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
s8 spdio_tx_done_cb(void *padapter, IN u8 *data)
|
||||
{
|
||||
struct spdio_t *obj = (struct spdio_t *)padapter;
|
||||
struct spdio_buf_t *buf = (struct spdio_buf_t *)data;
|
||||
if(obj)
|
||||
return obj->tx_done_cb(obj, buf);
|
||||
else
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "spdio tx done callback function is null!");
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
s8 spdio_tx(struct spdio_t *obj, struct spdio_buf_t *pbuf)
|
||||
{
|
||||
PHAL_SPDIO_ADAPTER pgSDIODev = obj->priv;
|
||||
INIC_RX_DESC *pRxDesc;
|
||||
SPDIO_RX_BD_HANDLE *pRxBdHdl;
|
||||
SPDIO_RX_BD *pRXBD;
|
||||
u32 Offset=0;
|
||||
u16 RxBdWrite=0; // to count how much RX_BD used in a Transaction
|
||||
u16 RxBdRdPtr= pgSDIODev->RXBDRPtr; // RX_BD read pointer
|
||||
u32 pkt_size;
|
||||
#if SDIO_RX_PKT_SIZE_OVER_16K
|
||||
u8 needed_rxbd_num;
|
||||
#endif
|
||||
/* check if RX_BD available */
|
||||
#if SDIO_RX_PKT_SIZE_OVER_16K
|
||||
needed_rxbd_num = ((pbuf->buf_size - 1)/MAX_RX_BD_BUF_SIZE) + MIN_RX_BD_SEND_PKT;
|
||||
#endif
|
||||
if (RxBdRdPtr != pgSDIODev->RXBDWPtr) {
|
||||
if (pgSDIODev->RXBDWPtr > RxBdRdPtr) {
|
||||
#if SDIO_RX_PKT_SIZE_OVER_16K
|
||||
if ((pgSDIODev->RXBDWPtr - RxBdRdPtr) >= (obj->tx_bd_num - needed_rxbd_num))
|
||||
#else
|
||||
if ((pgSDIODev->RXBDWPtr - RxBdRdPtr) >= (obj->tx_bd_num - MIN_RX_BD_SEND_PKT))
|
||||
#endif
|
||||
{
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO_Return_Rx_Data: No Available RX_BD, ReadPtr=%d WritePtr=%d\n", \
|
||||
RxBdRdPtr, pgSDIODev->RXBDWPtr);
|
||||
return _FALSE;
|
||||
}
|
||||
} else {
|
||||
#if SDIO_RX_PKT_SIZE_OVER_16K
|
||||
if ((RxBdRdPtr - pgSDIODev->RXBDWPtr) <= needed_rxbd_num)
|
||||
#else
|
||||
if ((RxBdRdPtr - pgSDIODev->RXBDWPtr) <= MIN_RX_BD_SEND_PKT)
|
||||
#endif
|
||||
{
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO_Return_Rx_Data: No Available RX_BD, ReadPtr=%d WritePtr=%d\n", RxBdRdPtr, pgSDIODev->RXBDWPtr);
|
||||
return _FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: Add RX_DESC before the packet
|
||||
|
||||
/* a SDIO RX packet will use at least 2 RX_BD, the 1st one is for RX_Desc,
|
||||
other RX_BDs are for packet payload */
|
||||
/* Use a RX_BD to transmit RX_Desc */
|
||||
pRXBD = pgSDIODev->pRXBDAddrAligned + pgSDIODev->RXBDWPtr; // get the RX_BD head
|
||||
pRxBdHdl = pgSDIODev->pRXBDHdl + pgSDIODev->RXBDWPtr;
|
||||
|
||||
pRxDesc = pRxBdHdl->pRXDESC;
|
||||
pRxDesc->type = pbuf->type;
|
||||
pRxDesc->pkt_len = pbuf->buf_size;
|
||||
pRxDesc->offset = sizeof(INIC_RX_DESC);
|
||||
|
||||
if (!pRxBdHdl->isFree) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Return_Rx_Data: Allocated a non-free RX_BD\n");
|
||||
}
|
||||
pRxBdHdl->isFree = 0;
|
||||
pRXBD->FS = 1;
|
||||
pRXBD->LS = 0;
|
||||
pRXBD->PhyAddr = (u32)((u8 *)pRxBdHdl->pRXDESC);
|
||||
pRXBD->BuffSize = sizeof(INIC_RX_DESC);
|
||||
pRxBdHdl->isPktEnd = 0;
|
||||
|
||||
pgSDIODev->RXBDWPtr += 1;
|
||||
if (pgSDIODev->RXBDWPtr >= obj->tx_bd_num) {
|
||||
pgSDIODev->RXBDWPtr -= obj->tx_bd_num;
|
||||
}
|
||||
|
||||
RxBdWrite++;
|
||||
|
||||
/* Take RX_BD to transmit packet payload */
|
||||
pkt_size = pbuf->buf_size;
|
||||
Offset = 0;
|
||||
do {
|
||||
pRXBD = pgSDIODev->pRXBDAddrAligned + pgSDIODev->RXBDWPtr; // get the RX_BD head
|
||||
pRxBdHdl = pgSDIODev->pRXBDHdl + pgSDIODev->RXBDWPtr;
|
||||
pRxBdHdl->isFree = 0;
|
||||
pRXBD->FS = 0;
|
||||
pRXBD->PhyAddr = (u32)((u8 *)pbuf->buf_addr + Offset);
|
||||
#if SDIO_RX_PKT_SIZE_OVER_16K
|
||||
if ((pkt_size - Offset) <= MAX_RX_BD_BUF_SIZE) {
|
||||
pRXBD->BuffSize = pkt_size - Offset;
|
||||
pRxBdHdl->isPktEnd = 1;
|
||||
}else {
|
||||
pRXBD->BuffSize = MAX_RX_BD_BUF_SIZE;
|
||||
pRxBdHdl->isPktEnd = 0;
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO_Return_Rx_Data: Split RX_BD, Offset=%d PktSize=%d\n", \
|
||||
Offset, pkt_size);
|
||||
}
|
||||
#else
|
||||
if (pkt_size > MAX_RX_BD_BUF_SIZE) {
|
||||
// if come to here, please enable "SDIO_RX_PKT_SIZE_OVER_16K"
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Return_Rx_Data: The Packet Size bigger than 16K\n");
|
||||
pkt_size = MAX_RX_BD_BUF_SIZE;
|
||||
}
|
||||
pRXBD->BuffSize = pkt_size;
|
||||
pRxBdHdl->priv = (void*)pbuf;
|
||||
pRxBdHdl->isPktEnd = 1;
|
||||
#endif
|
||||
Offset += pRXBD->BuffSize;
|
||||
// Move the RX_BD Write pointer forward
|
||||
RxBdWrite++;
|
||||
pgSDIODev->RXBDWPtr += 1;
|
||||
if (pgSDIODev->RXBDWPtr >= obj->tx_bd_num) {
|
||||
pgSDIODev->RXBDWPtr -= obj->tx_bd_num;
|
||||
}
|
||||
|
||||
if (Offset >= pkt_size) {
|
||||
pRXBD->LS = 1;
|
||||
}
|
||||
} while (Offset < pkt_size);
|
||||
|
||||
|
||||
if (RxBdWrite > 0) {
|
||||
SDIO_RXBD_WPTR_Set(pgSDIODev->RXBDWPtr);
|
||||
HAL_SDIO_WRITE8(REG_SPDIO_HCI_RX_REQ, BIT_HCI_RX_REQ);
|
||||
}
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO_Return_Rx_Data(%d)<==\n", RxBdWrite);
|
||||
return _TRUE;
|
||||
}
|
||||
|
||||
void spdio_structinit(struct spdio_t *obj){
|
||||
obj->rx_bd_bufsz = SPDIO_RX_BUFSZ_ALIGN(2048+24); //extra 24 bytes for sdio header
|
||||
obj->rx_bd_num = 24;
|
||||
obj->tx_bd_num = 24;
|
||||
obj->priv = NULL;
|
||||
obj->rx_buf = NULL;
|
||||
obj->rx_done_cb = NULL;
|
||||
obj->tx_done_cb = NULL;
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function: SDIO_TX_FIFO_DataReady
|
||||
* Desc: Handle the SDIO FIFO data ready interrupt.
|
||||
* 1. Send those data to the target driver via callback fun., like WLan.
|
||||
* 2. Allocate a buffer for the TX BD
|
||||
*
|
||||
* Para:
|
||||
* pSDIODev: The SDIO device data structor.
|
||||
******************************************************************************/
|
||||
VOID SPDIO_TX_FIFO_DataReady(IN PHAL_SPDIO_ADAPTER pSPDIODev)
|
||||
{
|
||||
SPDIO_TX_BD_HANDLE* pTxBdHdl;
|
||||
PINIC_TX_DESC pTxDesc;
|
||||
volatile u16 TxBDWPtr=0;
|
||||
u8 isForceBreak=0;
|
||||
s8 ret=FAIL;
|
||||
u32 reg;
|
||||
SPDIO_TX_BD *pTXBD = NULL;
|
||||
struct spdio_t *obj = (struct spdio_t *)pSPDIODev->spdio_priv;
|
||||
|
||||
TxBDWPtr = SDIO_TXBD_WPTR_Get();
|
||||
if (TxBDWPtr == pSPDIODev->TXBDRPtr) {
|
||||
if (unlikely(pSPDIODev->TxOverFlow != 0)) {
|
||||
pSPDIODev->TxOverFlow = 0;
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO TX Data Read False Triggered!!, TXBDWPtr=0x%x\n", TxBDWPtr);
|
||||
} else {
|
||||
reg = HAL_SDIO_READ32(REG_SPDIO_AHB_DMA_CTRL);
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO TX Overflow Case: Reg DMA_CTRL==0x%x %x %x %x\n", (reg>> 24)&0xff , (reg>>16)&0xff, (reg>>8)&0xff, (reg)&0xff);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
do {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO_TX_DataReady: TxBDWPtr=%d TxBDRPtr=%d\n", TxBDWPtr, pSPDIODev->TXBDRPtr);
|
||||
pTXBD= (SPDIO_TX_BD*)(pSPDIODev->pTXBDAddrAligned + pSPDIODev->TXBDRPtr);
|
||||
pTxBdHdl = pSPDIODev->pTXBDHdl + pSPDIODev->TXBDRPtr;
|
||||
pTxDesc = (PINIC_TX_DESC)(pTXBD->Address);
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO_TX_DataReady: PktSz=%d Offset=%d\n", pTxDesc->txpktsize, pTxDesc->offset);
|
||||
|
||||
if ((pTxDesc->txpktsize + pTxDesc->offset) <= obj->rx_bd_bufsz) {
|
||||
// use the callback function to fordward this packet to target(WLan) driver
|
||||
ret = spdio_rx_done_cb(obj, (u8*)pTxBdHdl->priv, pTxDesc->offset, pTxDesc->txpktsize, pTxDesc->type);
|
||||
if(ret == FAIL)
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO TX_Callback is Null!\n");
|
||||
pTXBD->Address = obj->rx_buf[pSPDIODev->TXBDRPtr].buf_addr;
|
||||
} else {
|
||||
// Invalid packet, Just drop it
|
||||
ret = SUCCESS; // pretend we call the TX callback OK
|
||||
}
|
||||
|
||||
if (SUCCESS != ret) {
|
||||
// may be is caused by TX queue is full, so we skip it and try again later
|
||||
isForceBreak = 1;
|
||||
break; // break the while loop
|
||||
} else {
|
||||
pSPDIODev->TXBDRPtr++;
|
||||
if (pSPDIODev->TXBDRPtr >= obj->rx_bd_num) {
|
||||
pSPDIODev->TXBDRPtr = 0;
|
||||
}
|
||||
pSPDIODev->TXBDRPtrReg = pSPDIODev->TXBDRPtr;
|
||||
SDIO_TXBD_RPTR_Set(pSPDIODev->TXBDRPtrReg);
|
||||
}
|
||||
|
||||
TxBDWPtr = SDIO_TXBD_WPTR_Get();
|
||||
if (isForceBreak) {
|
||||
break; // break the TX FIFO DMA Done processing
|
||||
}
|
||||
} while (pSPDIODev->TXBDRPtr != TxBDWPtr);
|
||||
|
||||
// if not all TX data were processed, set an event to trigger SDIO_Task to process them later
|
||||
if (isForceBreak) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO_TX Force Break: TXBDWP=0x%x TXBDRP=0x%x\n", TxBDWPtr, pSPDIODev->TXBDRPtr);
|
||||
}
|
||||
}
|
||||
|
||||
VOID SPDIO_Recycle_Rx_BD (IN PHAL_SPDIO_ADAPTER pgSPDIODev)
|
||||
{
|
||||
SPDIO_RX_BD_HANDLE *pRxBdHdl;
|
||||
SPDIO_RX_BD *pRXBD;
|
||||
u32 PktSize;
|
||||
u32 FreeCnt=0; // for debugging
|
||||
struct spdio_t *obj = (struct spdio_t *)pgSPDIODev->spdio_priv;
|
||||
|
||||
SDIO_INTConfig(BIT_C2H_DMA_OK, DISABLE);
|
||||
while (SDIO_RXBD_RPTR_Get() != pgSPDIODev->RXBDRPtr) {
|
||||
pRxBdHdl = pgSPDIODev->pRXBDHdl + pgSPDIODev->RXBDRPtr;
|
||||
pRXBD = pRxBdHdl->pRXBD;
|
||||
if (!pRxBdHdl->isFree) {
|
||||
if(pRxBdHdl->isPktEnd){
|
||||
spdio_tx_done_cb(obj, (u8*)(pRxBdHdl->priv));
|
||||
|
||||
}
|
||||
pRxBdHdl->isPktEnd = 0;
|
||||
_memset((void *)(pRxBdHdl->pRXDESC), 0, sizeof(INIC_RX_DESC));
|
||||
_memset((void *)pRXBD , 0, sizeof(SPDIO_RX_BD)); // clean this RX_BD
|
||||
pRxBdHdl->isFree = 1;
|
||||
}
|
||||
else {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_WARN, "SDIO_Recycle_Rx_BD: Warring, Recycle a Free RX_BD,RXBDRPtr=%d\n",pgSPDIODev->RXBDRPtr);
|
||||
}
|
||||
pgSPDIODev->RXBDRPtr++;
|
||||
|
||||
if (pgSPDIODev->RXBDRPtr >= obj->tx_bd_num) {
|
||||
pgSPDIODev->RXBDRPtr -= obj->tx_bd_num;
|
||||
}
|
||||
}
|
||||
SDIO_INTConfig(BIT_C2H_DMA_OK, ENABLE);
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "<==SDIO_Recycle_Rx_BD(%d)\n", FreeCnt);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function: SPDIO_IRQ_Handler
|
||||
* Desc: SPDIO device interrupt service routine
|
||||
* 1. Read & clean the interrupt status
|
||||
* 2. Wake up the SDIO task to handle the IRQ event
|
||||
*
|
||||
* Para:
|
||||
* pSDIODev: The SDIO device data structor.
|
||||
******************************************************************************/
|
||||
VOID SPDIO_IRQ_Handler(VOID *pData)
|
||||
{
|
||||
PHAL_SPDIO_ADAPTER pSPDIODev = pData;
|
||||
InterruptDis(SDIO_DEVICE_IRQ);
|
||||
rtw_up_sema_from_isr(&pSPDIODev->IrqSema);
|
||||
}
|
||||
|
||||
VOID SPDIO_IRQ_Handler_BH(VOID *pData)
|
||||
{
|
||||
PHAL_SPDIO_ADAPTER pgSPDIODev = pData;
|
||||
u16 IntStatus;
|
||||
|
||||
for (;;)
|
||||
{
|
||||
/* Task blocked and wait the semaphore(events) here */
|
||||
rtw_down_sema(&pgSPDIODev->IrqSema);
|
||||
IntStatus = HAL_SDIO_READ16(REG_SPDIO_CPU_INT_STAS);
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "%s:ISRStatus=0x%x\n", __FUNCTION__, IntStatus);
|
||||
HAL_SDIO_WRITE16(REG_SPDIO_CPU_INT_STAS, IntStatus); // clean the ISR
|
||||
InterruptEn(SDIO_DEVICE_IRQ, SPDIO_IRQ_PRIORITY);
|
||||
if (IntStatus & BIT_C2H_DMA_OK) {
|
||||
SPDIO_Recycle_Rx_BD(pgSPDIODev);
|
||||
}
|
||||
|
||||
if (IntStatus & BIT_H2C_MSG_INT) {
|
||||
HAL_SDIO_READ32(REG_SPDIO_CPU_H2C_MSG);
|
||||
}
|
||||
|
||||
if (IntStatus & BIT_H2C_DMA_OK) {
|
||||
SDIO_INTConfig(BIT_H2C_DMA_OK, DISABLE);
|
||||
SPDIO_TX_FIFO_DataReady(pgSPDIODev);
|
||||
SDIO_INTConfig(BIT_H2C_DMA_OK, ENABLE);
|
||||
}
|
||||
if (IntStatus & BIT_TXFIFO_H2C_OVF) {
|
||||
pgSPDIODev->TxOverFlow = 1;
|
||||
}
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "%s @2 IntStatus=0x%x\n", __FUNCTION__, IntStatus);
|
||||
}
|
||||
|
||||
SDIO_SetEvent(pgSPDIODev, (u32)SDIO_EVENT_IRQ_STOPPED);
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO irq Task Stopped!\n");
|
||||
#if ( INCLUDE_vTaskDelete == 1 )
|
||||
vTaskDelete(NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function: SPDIO_Device_Init
|
||||
* Desc: SDIO mbed device driver initialization.
|
||||
* 1. Allocate SDIO TX BD and RX BD adn RX Desc.
|
||||
* 2. Allocate SDIO RX Buffer Descriptor and RX Buffer. Initial RX related
|
||||
* register.
|
||||
* 3. Register the Interrupt function.
|
||||
*
|
||||
******************************************************************************/
|
||||
BOOL SPDIO_Device_Init(struct spdio_t * obj)
|
||||
{
|
||||
int i;
|
||||
SPDIO_TX_BD_HANDLE *pTxBdHdl;
|
||||
SPDIO_RX_BD_HANDLE *pRxBdHdl;
|
||||
int ret;
|
||||
SPDIO_TX_BD *pTXBD = NULL;
|
||||
SDIO_InitTypeDef SDIO_InitStruct;
|
||||
|
||||
if(obj == NULL){
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "struct spdio_t must be inited\n");
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "SDIO_Device_Init==>\n");
|
||||
|
||||
pgSPDIODev = &gSPDIODev;
|
||||
pgSPDIODev->spdio_priv = (void*)obj;
|
||||
obj->priv = (void *)pgSPDIODev;
|
||||
|
||||
// initial TX BD and RX BD
|
||||
pgSPDIODev->pTXBDAddr = _rtw_malloc((obj->rx_bd_num* sizeof(SPDIO_TX_BD))+3);
|
||||
if (NULL == pgSPDIODev->pTXBDAddr) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc for TX_BD Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
pgSPDIODev->pTXBDAddrAligned = (SPDIO_TX_BD*)(((((u32)pgSPDIODev->pTXBDAddr - 1) >> 2) + 1) << 2); // Make it 4-bytes aligned
|
||||
|
||||
pgSPDIODev->pRXBDAddr = _rtw_malloc((obj->tx_bd_num * sizeof(SPDIO_RX_BD))+7);
|
||||
if (NULL == pgSPDIODev->pRXBDAddr) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc for RX_BD Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
pgSPDIODev->pRXBDAddrAligned = (SPDIO_RX_BD*)(((((u32)pgSPDIODev->pRXBDAddr - 1) >> 3) + 1) << 3); // Make it 8-bytes aligned
|
||||
|
||||
pgSPDIODev->pRXDESCAddr = _rtw_zmalloc((obj->tx_bd_num * sizeof(INIC_RX_DESC)) + 3);
|
||||
if (NULL == pgSPDIODev->pRXDESCAddr) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc for RX_DESC Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
pgSPDIODev->pRXDESCAddrAligned = (INIC_RX_DESC*)(((((u32)pgSPDIODev->pRXDESCAddr - 1) >> 2) + 1) << 2); //Make it 4-bytes aligned
|
||||
|
||||
// Clean boot from wakeup bit
|
||||
SOCPS_BootFromPS(DISABLE);
|
||||
|
||||
/* SDIO Function & CLock Enable */
|
||||
RCC_PeriphClockCmd(APBPeriph_SDIOD_ON, APBPeriph_SDIOD_CLOCK, ENABLE);
|
||||
RCC_PeriphClockCmd(APBPeriph_SDIOD_OFF, APBPeriph_SDIOD_CLOCK, ENABLE);
|
||||
|
||||
// SDIO_SCLK / SPI_CLK pin pull-low
|
||||
//PAD_PullCtrl(_PA_3, GPIO_PuPd_DOWN);
|
||||
|
||||
SDIO_StructInit(&SDIO_InitStruct);
|
||||
SDIO_InitStruct.TXBD_BAR = (u32)pgSPDIODev->pTXBDAddrAligned;
|
||||
SDIO_InitStruct.TXBD_RING_SIZE = obj->rx_bd_num; //SDIO_TX_BD_NUM;
|
||||
SDIO_InitStruct.TX_BUFFER_SIZE = ((((obj->rx_bd_bufsz-1)/SPDIO_TX_BUF_SZ_UNIT)+1)&0xff);
|
||||
SDIO_InitStruct.RXBD_BAR = (u32)pgSPDIODev->pRXBDAddrAligned;
|
||||
SDIO_InitStruct.RXBD_RING_SIZE = obj->tx_bd_num;
|
||||
SDIO_InitStruct.RXBD_FREE_TH = RX_BD_FREE_TH;
|
||||
|
||||
SDIO_Init((&SDIO_InitStruct));
|
||||
|
||||
pgSPDIODev->TXBDWPtr = SDIO_TXBD_WPTR_Get();
|
||||
pgSPDIODev->TXBDRPtr = pgSPDIODev->TXBDWPtr;
|
||||
pgSPDIODev->TXBDRPtrReg = pgSPDIODev->TXBDWPtr;
|
||||
|
||||
pgSPDIODev->RXBDWPtr = pgSPDIODev->RXBDRPtr = SDIO_RXBD_RPTR_Get();
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "TXBDWPtr=0x%x TXBDRPtr=0x%x\n", pgSPDIODev->TXBDWPtr, pgSPDIODev->TXBDRPtr);
|
||||
|
||||
pgSPDIODev->pTXBDHdl = (SPDIO_TX_BD_HANDLE*)_rtw_zmalloc(obj->rx_bd_num * sizeof(SPDIO_TX_BD_HANDLE));
|
||||
if (NULL == pgSPDIODev->pTXBDHdl) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc for TX_BD Handle Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
|
||||
for(i=0;i<obj->rx_bd_num;i++){
|
||||
pTxBdHdl = pgSPDIODev->pTXBDHdl + i;
|
||||
pTxBdHdl->pTXBD= pgSPDIODev->pTXBDAddrAligned + i;
|
||||
// Pre-allocate buffer by User
|
||||
pTxBdHdl->priv = (void *)&obj->rx_buf[i];
|
||||
pTxBdHdl->pTXBD->Address = (u32)obj->rx_buf[i].buf_addr;
|
||||
if(pTxBdHdl->pTXBD->Address%4){
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "buffer address must be aligned to 4!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
|
||||
if (NULL == (u32*)(pTxBdHdl->pTXBD->Address)) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc buffer for TX_BD Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
pTxBdHdl->isFree = 1;
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "TX_BD%d @ 0x%x 0x%x\n", i, pTxBdHdl, pTxBdHdl->pTXBD);
|
||||
}
|
||||
|
||||
pgSPDIODev->pRXBDHdl = (SPDIO_RX_BD_HANDLE*)_rtw_zmalloc(obj->tx_bd_num * sizeof(SPDIO_RX_BD_HANDLE));
|
||||
if (NULL == pgSPDIODev->pRXBDHdl) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Malloc for RX_BD Handle Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
|
||||
for (i=0; i<obj->tx_bd_num; i++) {
|
||||
pRxBdHdl = pgSPDIODev->pRXBDHdl + i;
|
||||
pRxBdHdl->pRXBD = pgSPDIODev->pRXBDAddrAligned + i;
|
||||
pRxBdHdl->pRXDESC = pgSPDIODev->pRXDESCAddrAligned + i;
|
||||
pRxBdHdl->isFree = 1;
|
||||
}
|
||||
|
||||
rtw_init_sema(&(pgSPDIODev->IrqSema), 0);
|
||||
if (NULL == pgSPDIODev->IrqSema){
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init Create IRQ Semaphore Err!!\n");
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
|
||||
ret = xTaskCreate( SPDIO_IRQ_Handler_BH, "SPDIO_IRQ_TASK", ((1024*1)/sizeof(portBASE_TYPE)), (void *)pgSPDIODev, 1 + PRIORITIE_OFFSET, &pgSPDIODev->xSDIOIrqTaskHandle);
|
||||
if (pdTRUE != ret )
|
||||
{
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "SDIO_Device_Init: Create IRQ Task Err(%d)!!\n", ret);
|
||||
goto SDIO_INIT_ERR;
|
||||
}
|
||||
|
||||
//pgSPDIODev->CRPWM = SDIO_RPWM1_Get();
|
||||
//pgSPDIODev->CRPWM2 = SDIO_RPWM2_Get();
|
||||
|
||||
// Indicate Host this is a iNIC FW
|
||||
//SDIO_CPWM2_Set(CPWM2_INIC_FW_RDY_BIT, ENABLE);
|
||||
|
||||
/* enable the interrupt */
|
||||
InterruptRegister((IRQ_FUN) SPDIO_IRQ_Handler, SDIO_DEVICE_IRQ, (u32) pgSPDIODev, SPDIO_IRQ_PRIORITY);
|
||||
InterruptEn(SDIO_DEVICE_IRQ, SPDIO_IRQ_PRIORITY);
|
||||
HAL_SDIO_WRITE16(REG_SPDIO_CPU_INT_STAS, SDIO_INIT_INT_MASK); // Clean pending interrupt first
|
||||
HAL_SDIO_WRITE16(REG_SPDIO_CPU_INT_MASK, SDIO_INIT_INT_MASK);
|
||||
|
||||
// Update the power state indication
|
||||
SDIO_CPWM2_Set(CPWM2_ACT_BIT, ENABLE);
|
||||
|
||||
/* Indicate the Host system that the TX/RX is ready */
|
||||
HAL_SDIO_WRITE8(REG_SPDIO_CPU_IND, \
|
||||
HAL_SDIO_READ8(REG_SPDIO_CPU_IND)|BIT_SYSTEM_TRX_RDY_IND);
|
||||
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_INFO, "<==SDIO_Device_Init\n");
|
||||
|
||||
return SUCCESS;
|
||||
|
||||
SDIO_INIT_ERR:
|
||||
|
||||
if (pgSPDIODev->pRXBDHdl) {
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pRXBDHdl, obj->tx_bd_num * sizeof(SPDIO_RX_BD_HANDLE));
|
||||
pgSPDIODev->pRXBDHdl = NULL;
|
||||
}
|
||||
|
||||
if ((pgSPDIODev->pTXBDHdl)) {
|
||||
for (i=0;i<obj->rx_bd_num;i++){
|
||||
pTxBdHdl = pgSPDIODev->pTXBDHdl + i;
|
||||
if (pTxBdHdl->pTXBD->Address) {
|
||||
pTxBdHdl->pTXBD->Address = (u32)NULL;
|
||||
}
|
||||
}
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pTXBDHdl, (obj->rx_bd_num * sizeof(SPDIO_TX_BD_HANDLE)));
|
||||
pgSPDIODev->pTXBDHdl = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pRXBDAddr) {
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pRXBDAddr, (obj->tx_bd_num * sizeof(SPDIO_RX_BD))+7);
|
||||
pgSPDIODev->pRXBDAddr = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pTXBDAddr) {
|
||||
_rtw_mfree(pgSPDIODev->pTXBDAddr, ((obj->rx_bd_num * sizeof(SPDIO_TX_BD))+3));
|
||||
pgSPDIODev->pTXBDAddr = NULL;
|
||||
pgSPDIODev->pTXBDAddrAligned = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pRXDESCAddr) {
|
||||
_rtw_mfree(pgSPDIODev->pRXDESCAddr, (((obj->rx_bd_num)* sizeof(INIC_RX_DESC)) + 3));
|
||||
pgSPDIODev->pRXDESCAddr = NULL;
|
||||
pgSPDIODev->pRXDESCAddrAligned = NULL;
|
||||
}
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function: SPDIO_Device_DeInit
|
||||
* Desc: SDIO device driver free resource. This function should be called in
|
||||
* a task.
|
||||
* 1. Free TX FIFO buffer
|
||||
*
|
||||
* Para:
|
||||
* pSDIODev: The SDIO device data structor.
|
||||
******************************************************************************/
|
||||
//TODO: Call this function in a task
|
||||
VOID SPDIO_Device_DeInit(VOID)
|
||||
{
|
||||
int i=0;
|
||||
SPDIO_TX_BD_HANDLE *pTxBdHdl;
|
||||
SPDIO_TX_BD *pTXBD = NULL;
|
||||
struct spdio_t * obj;
|
||||
|
||||
if (NULL == pgSPDIODev)
|
||||
return;
|
||||
|
||||
obj = pgSPDIODev->spdio_priv;
|
||||
// Indicate the Host that Ameba is InActived
|
||||
SDIO_CPWM2_Set(CPWM2_ACT_BIT, DISABLE);
|
||||
|
||||
if (pgSPDIODev->pRXBDHdl) {
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pRXBDHdl, obj->tx_bd_num * sizeof(SPDIO_RX_BD_HANDLE));
|
||||
pgSPDIODev->pRXBDHdl = NULL;
|
||||
}
|
||||
|
||||
/* Free TX FIFO Buffer */
|
||||
for (i=0;i<obj->rx_bd_num;i++)
|
||||
{
|
||||
pTXBD = (SPDIO_TX_BD*)(pgSPDIODev->pTXBDAddrAligned + i);
|
||||
pTxBdHdl = pgSPDIODev->pTXBDHdl + i;
|
||||
if (pTXBD->Address) {
|
||||
pTXBD->Address = (u32)NULL;
|
||||
}
|
||||
}
|
||||
|
||||
if ((pgSPDIODev->pTXBDHdl)) {
|
||||
for (i=0;i<obj->rx_bd_num;i++){
|
||||
pTxBdHdl = pgSPDIODev->pTXBDHdl + i;
|
||||
if (pTxBdHdl->pTXBD->Address) {
|
||||
pTxBdHdl->pTXBD->Address = (u32)NULL;
|
||||
}
|
||||
}
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pTXBDHdl, (obj->rx_bd_num * sizeof(SPDIO_TX_BD_HANDLE)));
|
||||
pgSPDIODev->pTXBDHdl = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pRXBDAddr) {
|
||||
_rtw_mfree((u8 *)pgSPDIODev->pRXBDAddr, (obj->tx_bd_num * sizeof(SPDIO_RX_BD))+7);
|
||||
pgSPDIODev->pRXBDAddr = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pTXBDAddr) {
|
||||
_rtw_mfree(pgSPDIODev->pTXBDAddr, ((obj->rx_bd_num * sizeof(SPDIO_TX_BD))+3));
|
||||
pgSPDIODev->pTXBDAddr = NULL;
|
||||
pgSPDIODev->pTXBDAddrAligned = NULL;
|
||||
}
|
||||
|
||||
if (pgSPDIODev->pRXDESCAddr) {
|
||||
_rtw_mfree(pgSPDIODev->pRXDESCAddr, (((obj->rx_bd_num)* sizeof(INIC_RX_DESC)) + 3));
|
||||
pgSPDIODev->pRXDESCAddr = NULL;
|
||||
pgSPDIODev->pRXDESCAddrAligned = NULL;
|
||||
}
|
||||
|
||||
SDIO_INTConfig(0xffff, DISABLE);
|
||||
HAL_SDIO_WRITE16(REG_SPDIO_CPU_INT_STAS, 0xffff); // Clean pending interrupt first
|
||||
InterruptDis(SDIO_DEVICE_IRQ);
|
||||
InterruptUnRegister(SDIO_DEVICE_IRQ);
|
||||
|
||||
if (pgSPDIODev->IrqSema) {
|
||||
rtw_free_sema(&pgSPDIODev->IrqSema);
|
||||
pgSPDIODev->IrqSema = NULL;
|
||||
}
|
||||
|
||||
// Reset SDIO DMA
|
||||
SDIO_DMA_Reset();
|
||||
|
||||
/* SDIO_OFF Disable, SDIO will lost if SDIO_ON OFF */
|
||||
SDIOD_OFF_FCTRL(OFF);
|
||||
}
|
||||
|
||||
void spdio_init(struct spdio_t *obj)
|
||||
{
|
||||
if(obj == NULL){
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "spdio obj is NULL, spdio init failed!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if((obj->rx_bd_num == 0) ||(obj->rx_bd_bufsz == 0) || (obj->rx_bd_bufsz%64)
|
||||
||(obj->tx_bd_num == 0) ||(obj->tx_bd_num%2)||(obj->rx_buf == NULL)) {
|
||||
DBG_PRINTF(MODULE_SDIO, LEVEL_ERROR, "spdio obj resource isn't correctly inited, spdio init failed!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
g_spdio_priv = obj;
|
||||
SPDIO_Device_Init(obj);
|
||||
}
|
||||
|
||||
void spdio_deinit(struct spdio_t *obj)
|
||||
{
|
||||
if(obj == NULL){
|
||||
SPDIO_API_PRINTK("spdio obj is NULL, spdio deinit failed");
|
||||
return;
|
||||
}
|
||||
SPDIO_Device_DeInit();
|
||||
g_spdio_priv = NULL;
|
||||
}
|
||||
|
||||
1306
component/common/mbed/targets/hal/rtl8711b/spi_api.c
Normal file
1306
component/common/mbed/targets/hal/rtl8711b/spi_api.c
Normal file
File diff suppressed because it is too large
Load diff
238
component/common/mbed/targets/hal/rtl8711b/sys_api.c
Normal file
238
component/common/mbed/targets/hal/rtl8711b/sys_api.c
Normal file
|
|
@ -0,0 +1,238 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file sys_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides following mbed system API:
|
||||
* -JTAG OFF
|
||||
* -LOGUART ON/OFF
|
||||
* -OTA image switch
|
||||
* -System Reset
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "sys_api.h"
|
||||
#include "flash_api.h"
|
||||
#include "device_lock.h"
|
||||
|
||||
void rtc_backup_timeinfo(void);
|
||||
|
||||
#define OTA_Signature "81958711"
|
||||
#define OTA_Signature_len 8
|
||||
#define OTA_valid_offset 0x100000
|
||||
#define printf DiagPrintf
|
||||
|
||||
/**
|
||||
* @brief Turn off the JTAG function
|
||||
* @retval none
|
||||
*/
|
||||
void sys_jtag_off(void)
|
||||
{
|
||||
boot_export_symbol.swd_off();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief switch OTA image if the othe OTA image is valid
|
||||
* @retval none
|
||||
* @note for AmebaZ, sys_clear_ota_signature is the same with sys_recover_ota_signature
|
||||
*/
|
||||
void sys_clear_ota_signature(void)
|
||||
{
|
||||
flash_t flash;
|
||||
u32 part1_offset = 0;
|
||||
u32 part2_offset = 0;
|
||||
u32 ota1_valid = 0;
|
||||
u32 ota2_valid = 0;
|
||||
u8 signature[OTA_Signature_len+1] = {0};
|
||||
|
||||
part1_offset = (FLASH_OTA1_CODE_ADDR - 0x20);
|
||||
flash_stream_read(&flash, part1_offset, OTA_Signature_len, signature);
|
||||
if(!_memcmp((char const*)signature, OTA_Signature, OTA_Signature_len)){
|
||||
ota1_valid = 1;
|
||||
}
|
||||
|
||||
printf("\n\rOTA ota1_signature = %s \n", signature);
|
||||
|
||||
flash_stream_read(&flash, FLASH_SYSTEM_DATA_ADDR, 4, (u8*)&part2_offset);
|
||||
flash_stream_read(&flash, (part2_offset -SPI_FLASH_BASE) , OTA_Signature_len, signature);
|
||||
if(!_memcmp((char const*)signature, OTA_Signature, OTA_Signature_len)){
|
||||
ota2_valid = 1;
|
||||
}
|
||||
|
||||
printf("\n\rOTA ota2_signature = %s \n", signature);
|
||||
|
||||
printf("\n\rOTA ota1_valid = 0x%08X ota2_valid = 0x%08X \n", ota1_valid, ota2_valid);
|
||||
|
||||
if ((ota1_valid == 1) && (ota2_valid == 1)) {
|
||||
u32 ValidIMG2 = HAL_READ32(SPI_FLASH_BASE, FLASH_SYSTEM_DATA_ADDR + 4);
|
||||
u32 BitIdx = 0;
|
||||
|
||||
if (ValidIMG2 == 0x00000000) {
|
||||
FLASH_EreaseDwordsXIP((FLASH_SYSTEM_DATA_ADDR + 4), 1);
|
||||
ValidIMG2 = 0xFFFFFFFF;
|
||||
}
|
||||
|
||||
for (BitIdx = 0; BitIdx <= 31; BitIdx++) {
|
||||
if ((ValidIMG2 & BIT(BitIdx)) != 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* switch OAT image */
|
||||
ValidIMG2 &= ~BIT(BitIdx);
|
||||
|
||||
/* write flash */
|
||||
FLASH_TxData12BXIP((FLASH_SYSTEM_DATA_ADDR + 4), 4, (u8*)&ValidIMG2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief switch OTA image if the othe OTA image is valid
|
||||
* @retval none
|
||||
* @note for AmebaZ, sys_clear_ota_signature is the same with sys_recover_ota_signature
|
||||
*/
|
||||
void sys_recover_ota_signature(void)
|
||||
{
|
||||
sys_clear_ota_signature();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief open log uart
|
||||
* @retval none
|
||||
*/
|
||||
void sys_log_uart_on(void)
|
||||
{
|
||||
/* 0: S1 PA29 & PA30, 1: S0 PA16 & PA17 */
|
||||
/* EFUSE default 0: S1 */
|
||||
if (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6) & BIT_SYS_UART2_DEFAULT_GPIO) {
|
||||
PinCtrl(PERIPHERAL_LOG_UART, S0, ON);
|
||||
} else {
|
||||
PinCtrl(PERIPHERAL_LOG_UART, S1, ON);
|
||||
}
|
||||
|
||||
UART_INTConfig(UART2_DEV, RUART_IER_ERBI | RUART_IER_ELSI, ENABLE);
|
||||
UART_RxCmd(UART2_DEV, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief close log uart
|
||||
* @retval none
|
||||
*/
|
||||
void sys_log_uart_off(void)
|
||||
{
|
||||
UART_INTConfig(UART2_DEV, RUART_IER_ERBI | RUART_IER_ELSI, DISABLE);
|
||||
UART_RxCmd(UART2_DEV, DISABLE);
|
||||
|
||||
/* 0: S1 PA29 & PA30, 1: S0 PA16 & PA17 */
|
||||
/* EFUSE default 0: S1 */
|
||||
if (HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6) & BIT_SYS_UART2_DEFAULT_GPIO) {
|
||||
PinCtrl(PERIPHERAL_LOG_UART, S0, OFF);
|
||||
} else {
|
||||
PinCtrl(PERIPHERAL_LOG_UART, S1, OFF);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief store or load adc calibration parameter
|
||||
* @param write: this parameter can be one of the following values:
|
||||
* @arg 0: load adc calibration parameter offset & gain from flash system data region
|
||||
* @arg 1: store adc calibration parameter offset & gain to flash system data region
|
||||
* @param offset: pointer to adc parameter offset
|
||||
* @param gain: pointer to adc parameter gain
|
||||
* @retval none
|
||||
*/
|
||||
void sys_adc_calibration(u8 write, u16 *offset, u16 *gain)
|
||||
{
|
||||
flash_t flash;
|
||||
u32 flash_data = 0;
|
||||
|
||||
flash_data = (u32)*offset;
|
||||
flash_data |= (u32)((*gain) << 16);
|
||||
|
||||
if(write){
|
||||
FLASH_EreaseDwordsXIP((FLASH_SYSTEM_DATA_ADDR + FLASH_ADC_PARA_OFFSET), 1);
|
||||
FLASH_TxData12BXIP((FLASH_SYSTEM_DATA_ADDR + FLASH_ADC_PARA_OFFSET), 4, (u8*)&flash_data);
|
||||
|
||||
printf("\n\rStore ADC calibration success.");
|
||||
}
|
||||
|
||||
flash_stream_read(&flash, (FLASH_SYSTEM_DATA_ADDR + FLASH_ADC_PARA_OFFSET), 4, (u8*)&flash_data);
|
||||
|
||||
printf("\n\rADC offset = 0x%04X, gain = 0x%04X.\n\r", (flash_data & 0xFFFF), (flash_data & 0xFFFF0000) >> 16);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief system software reset
|
||||
* @retval none
|
||||
*/
|
||||
void sys_reset(void)
|
||||
{
|
||||
rtc_backup_timeinfo();
|
||||
|
||||
/* Set processor clock to default(2: 31.25MHz) before system reset */
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1, 0x00000021);
|
||||
DelayUs(100*1000);
|
||||
|
||||
/* Cortex-M3 SCB->AIRCR */
|
||||
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | // VECTKEY
|
||||
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | // PRIGROUP
|
||||
SCB_AIRCR_SYSRESETREQ_Msk); // SYSRESETREQ
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief vector reset
|
||||
* @retval none
|
||||
*/
|
||||
void sys_cpu_reset(void)
|
||||
{
|
||||
u32 reg_value;
|
||||
|
||||
rtc_backup_timeinfo();
|
||||
|
||||
reg_value = HAL_READ32(PERI_ON_BASE, REG_SOC_FUNC_EN);
|
||||
reg_value |= BIT_SOC_PATCH_FUNC1;
|
||||
HAL_WRITE32(PERI_ON_BASE, REG_SOC_FUNC_EN, reg_value);
|
||||
|
||||
/* Ensure all outstanding memory accesses included */
|
||||
/* buffered write are completed before reset */
|
||||
__DSB();
|
||||
|
||||
/* CPU reset */
|
||||
/* Keep priority group unchanged */
|
||||
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
|
||||
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
|
||||
SCB_AIRCR_VECTRESET_Pos | SCB_AIRCR_VECTCLRACTIVE_Pos);
|
||||
|
||||
/* Ensure completion of memory access */
|
||||
__DSB();
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief get rdp status
|
||||
* @retval :RDP valid status
|
||||
* This parameter can be one of the following values:
|
||||
* @arg 0: rdp valid
|
||||
* @arg 1: system.bin not load to flash
|
||||
* @arg 2: rdp.bin not load to flash
|
||||
* @arg 3: Key request timeout
|
||||
* @arg 4: RDP not enable in efuse
|
||||
* @arg 5: Check sum error
|
||||
*/
|
||||
u32 sys_get_rdp_valid(void)
|
||||
{
|
||||
return boot_export_symbol.rdp_valid();
|
||||
}
|
||||
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
|
||||
201
component/common/mbed/targets/hal/rtl8711b/timer_api.c
Normal file
201
component/common/mbed/targets/hal/rtl8711b/timer_api.c
Normal file
|
|
@ -0,0 +1,201 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file timer_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for gtimer.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "timer_api.h"
|
||||
|
||||
/**
|
||||
* @brief gtimer interrupt handler function.
|
||||
* @param data: timer IRQ callback parameter
|
||||
* @retval none
|
||||
*/
|
||||
static void gtimer_timeout_handler (uint32_t data)
|
||||
{
|
||||
gtimer_t *obj = (gtimer_t *)data;
|
||||
uint32_t tid = obj->timer_id;
|
||||
gtimer_irq_handler handler;
|
||||
|
||||
RTIM_INTClear(TIMx[tid]);
|
||||
|
||||
if (obj->handler != NULL) {
|
||||
handler = (gtimer_irq_handler)obj->handler;
|
||||
handler(obj->hid);
|
||||
}
|
||||
|
||||
if (!obj->is_periodcal) {
|
||||
gtimer_stop(obj);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the timer device, include timer registers and interrupt.
|
||||
* @param obj: timer object define in application software.
|
||||
* @param tid: general timer ID, which can be one of the following parameters:
|
||||
* @arg TIMER0
|
||||
* @arg TIMER1
|
||||
* @arg TIMER2
|
||||
* @arg TIMER3
|
||||
* @note TIMER0 is reserved, TIMER1/2/3 are recommended.
|
||||
* @retval none
|
||||
*/
|
||||
void gtimer_init (gtimer_t *obj, uint32_t tid)
|
||||
{
|
||||
RTIM_TimeBaseInitTypeDef TIM_InitStruct;
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
obj->timer_id = tid;
|
||||
|
||||
RTIM_TimeBaseStructInit(&TIM_InitStruct);
|
||||
TIM_InitStruct.TIM_Idx = (u8)tid;
|
||||
|
||||
TIM_InitStruct.TIM_UpdateEvent = ENABLE; /* UEV enable */
|
||||
TIM_InitStruct.TIM_UpdateSource = TIM_UpdateSource_Overflow;
|
||||
TIM_InitStruct.TIM_ARRProtection = ENABLE;
|
||||
|
||||
RTIM_TimeBaseInit(TIMx[tid], &TIM_InitStruct, TIMx_irq[tid], (IRQ_FUN) gtimer_timeout_handler, (u32)obj);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the timer device, include timer function and interrupt.
|
||||
* @param obj: timer object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gtimer_deinit (gtimer_t *obj)
|
||||
{
|
||||
uint32_t tid = obj->timer_id;
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
RTIM_DeInit(TIMx[tid]);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get counter value of the specified timer.
|
||||
* @param obj: timer object define in application software.
|
||||
* @retval value: counter value
|
||||
*/
|
||||
uint32_t gtimer_read_tick (gtimer_t *obj)
|
||||
{
|
||||
uint32_t tid = obj->timer_id;
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
return (RTIM_GetCount(TIMx[tid]));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get count value in microseconds of the specified timer.
|
||||
* @param obj: timer object define in application software.
|
||||
* @retval value: count value in microseconds.
|
||||
*/
|
||||
uint64_t gtimer_read_us (gtimer_t *obj) //need to be test in IAR(64bit computing)
|
||||
{
|
||||
assert_param((obj->timer_id < GTIMER_MAX) && (obj->timer_id > TIMER0));
|
||||
|
||||
uint64_t time_us;
|
||||
time_us = gtimer_read_tick(obj) *1000000 /32768;
|
||||
|
||||
return (time_us);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Change period of the specified timer.
|
||||
* @param obj: timer object define in application software.
|
||||
* @param duration_us: the new period to be set in microseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void gtimer_reload (gtimer_t *obj, uint32_t duration_us)
|
||||
{
|
||||
uint32_t tid = obj->timer_id;
|
||||
uint32_t temp = (uint32_t)((float)duration_us / 1000000 *32768);
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
RTIM_ChangePeriod(TIMx[tid], temp);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the specified timer and enable update interrupt.
|
||||
* @param obj: timer object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gtimer_start (gtimer_t *obj)
|
||||
{
|
||||
uint32_t tid = obj->timer_id;
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
RTIM_INTConfig(TIMx[tid], TIM_IT_Update, ENABLE);
|
||||
RTIM_Cmd(TIMx[tid], ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the specified timer in one-shot mode with specified period and interrupt handler.
|
||||
* @param obj: timer object define in application software.
|
||||
* @param duration_us: the new period to be set in microseconds.
|
||||
* @param handler: user defined IRQ callback function
|
||||
* @param hid: user defined IRQ callback parameter
|
||||
* @retval none
|
||||
* @note This function set the timer into one-shot mode which stops after the first time the counter overflows.
|
||||
*/
|
||||
void gtimer_start_one_shout (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid)
|
||||
{
|
||||
assert_param((obj->timer_id < GTIMER_MAX) && (obj->timer_id > TIMER0));
|
||||
|
||||
obj->is_periodcal = _FALSE;
|
||||
obj->handler = handler;
|
||||
obj->hid = hid;
|
||||
|
||||
gtimer_reload(obj, duration_us);
|
||||
gtimer_start(obj);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the specified timer in periodical mode with specified period and interrupt handler.
|
||||
* @param obj: timer object define in application software.
|
||||
* @param duration_us: the new period to be set in microseconds.
|
||||
* @param handler: user defined IRQ callback function
|
||||
* @param hid: user defined IRQ callback parameter
|
||||
* @retval none
|
||||
* @note This functon set the timer into periodical mode which will restart to count from 0 each time the counter overflows.
|
||||
*/
|
||||
void gtimer_start_periodical (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid)
|
||||
{
|
||||
assert_param((obj->timer_id < GTIMER_MAX) && (obj->timer_id > TIMER0));
|
||||
|
||||
obj->is_periodcal = _TRUE;
|
||||
obj->handler = handler;
|
||||
obj->hid = hid;
|
||||
|
||||
gtimer_reload(obj, duration_us);
|
||||
gtimer_start(obj);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable the specified timer peripheral.
|
||||
* @param obj: timer object define in application software.
|
||||
* @retval none
|
||||
*/
|
||||
void gtimer_stop (gtimer_t *obj)
|
||||
{
|
||||
uint32_t tid = obj->timer_id;
|
||||
|
||||
assert_param((tid < GTIMER_MAX) && (tid > TIMER0));
|
||||
|
||||
RTIM_Cmd(TIMx[tid], DISABLE);
|
||||
}
|
||||
69
component/common/mbed/targets/hal/rtl8711b/timer_api.h
Normal file
69
component/common/mbed/targets/hal/rtl8711b/timer_api.h
Normal file
|
|
@ -0,0 +1,69 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file timer_api.h
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed timer API
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
******************************************************************************
|
||||
*/
|
||||
#ifndef MBED_EXT_TIMER_API_EXT_H
|
||||
#define MBED_EXT_TIMER_API_EXT_H
|
||||
|
||||
#include "device.h"
|
||||
|
||||
typedef void (*gtimer_irq_handler)(uint32_t id);
|
||||
|
||||
typedef struct gtimer_s gtimer_t;
|
||||
enum {
|
||||
TIMER0 = 0, /*!< GTimer 0, 32k timer, share with us_tick(wait_ms()) functions. This timer is reserved and users are not recommended to use it */
|
||||
TIMER1 = 1, /*!< GTimer 1, 32k timer, share with APP_TIM_ID */
|
||||
TIMER2 = 2, /*!< GTimer 2, 32k timer, users can use it */
|
||||
TIMER3 = 3, /*!< GTimer 3, 32k timer, users can use it */
|
||||
|
||||
GTIMER_MAX = 4
|
||||
};
|
||||
|
||||
/** @defgroup AmebaZ_Mbed_API
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MBED_TIMER
|
||||
* @brief MBED_TIMER driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MBED_TIMER_Standard_Functions MBED_TIMER standard Functions
|
||||
* @{
|
||||
*/
|
||||
void gtimer_init (gtimer_t *obj, uint32_t tid);
|
||||
void gtimer_deinit (gtimer_t *obj);
|
||||
uint32_t gtimer_read_tick (gtimer_t *obj);
|
||||
uint64_t gtimer_read_us (gtimer_t *obj);
|
||||
void gtimer_reload (gtimer_t *obj, uint32_t duration_us);
|
||||
void gtimer_start (gtimer_t *obj);
|
||||
void gtimer_start_one_shout (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
|
||||
void gtimer_start_periodical (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
|
||||
void gtimer_stop (gtimer_t *obj);
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
128
component/common/mbed/targets/hal/rtl8711b/us_ticker.c
Normal file
128
component/common/mbed/targets/hal/rtl8711b/us_ticker.c
Normal file
|
|
@ -0,0 +1,128 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, Realtek Semiconductor Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "objects.h"
|
||||
#include <stddef.h>
|
||||
#include "us_ticker_api.h"
|
||||
#include "PeripheralNames.h"
|
||||
|
||||
#define TICK_READ_FROM_CPU 0 //1: read tick from CPU, 0: read tick from G-Timer
|
||||
#define GTIMER_CLK_HZ (32768)
|
||||
#define GTIMER_TICK_US (1000000/GTIMER_CLK_HZ)
|
||||
|
||||
#define SYS_TIM_ID 0 // the G-Timer ID for System
|
||||
#define APP_TIM_ID 1 // the G-Timer ID for Application
|
||||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
VOID _us_ticker_irq_handler(void *Data)
|
||||
{
|
||||
us_ticker_irq_handler();
|
||||
}
|
||||
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
RTIM_TimeBaseInitTypeDef TIM_InitStruct;
|
||||
|
||||
if (us_ticker_inited)
|
||||
return;
|
||||
us_ticker_inited = 1;
|
||||
|
||||
RTIM_TimeBaseStructInit(&TIM_InitStruct);
|
||||
|
||||
TIM_InitStruct.TIM_Idx = APP_TIM_ID;
|
||||
TIM_InitStruct.TIM_Prescaler = 0;
|
||||
TIM_InitStruct.TIM_Period = 0xFFFFFFFF;
|
||||
|
||||
TIM_InitStruct.TIM_UpdateEvent = ENABLE; /* UEV enable */
|
||||
TIM_InitStruct.TIM_UpdateSource = TIM_UpdateSource_Overflow;
|
||||
TIM_InitStruct.TIM_ARRProtection = ENABLE;
|
||||
|
||||
RTIM_TimeBaseInit(TIM1, &TIM_InitStruct, 0, (IRQ_FUN) _us_ticker_irq_handler, (u32)NULL);
|
||||
RTIM_Cmd(TIM0, ENABLE);
|
||||
|
||||
DBG_PRINTF(MODULE_TIMER, LEVEL_INFO, "%s: Timer_Id=%d\n", __FUNCTION__, APP_TIM_ID);
|
||||
}
|
||||
|
||||
#if (!TICK_READ_FROM_CPU) || !defined(PLATFORM_FREERTOS)
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
uint32_t tick_cnt;
|
||||
uint32_t ticks_125ms;
|
||||
uint32_t ticks_remain;
|
||||
uint64_t us_tick;
|
||||
|
||||
tick_cnt = SYSTIMER_TickGet(); //up counter
|
||||
us_tick = tick_cnt * (1000000/32768);
|
||||
|
||||
return ((uint32_t)us_tick);
|
||||
}
|
||||
#else
|
||||
// if the system tick didn't be initialed, call delay function may got system hang
|
||||
#define OS_CLOCK (200000000UL/6*5) // CPU clock = 166.66 MHz
|
||||
#define OS_TICK 1000 // OS ticks 1000/sec
|
||||
#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
|
||||
#define NVIC_ST_CTRL (*((volatile uint32_t *)0xE000E010))
|
||||
#define NVIC_ST_RELOAD (*((volatile uint32_t *)0xE000E014))
|
||||
#define NVIC_ST_CURRENT (*((volatile uint32_t *)0xE000E018))
|
||||
|
||||
extern uint32_t xTaskGetTickCount( void );
|
||||
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
uint32_t tick_cnt;
|
||||
uint32_t us_tick, ms;
|
||||
static uint32_t last_us_tick=0;
|
||||
|
||||
ms = xTaskGetTickCount();
|
||||
us_tick = (uint32_t)(ms*1000);
|
||||
|
||||
tick_cnt = OS_TRV - NVIC_ST_CURRENT;
|
||||
us_tick += (uint32_t)((tick_cnt*1000)/(OS_TRV+1) );
|
||||
|
||||
if ( (last_us_tick > us_tick) && (last_us_tick < 0xFFFFFC00) ) {
|
||||
us_tick += 1000;
|
||||
}
|
||||
last_us_tick = us_tick;
|
||||
|
||||
return us_tick;
|
||||
}
|
||||
#endif
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
uint32_t cur_time_us;
|
||||
uint32_t duration_us;
|
||||
uint32_t timer_tick = 0;
|
||||
|
||||
cur_time_us = us_ticker_read();
|
||||
if ((uint32_t)timestamp >= cur_time_us) {
|
||||
duration_us = (uint32_t)timestamp - cur_time_us;
|
||||
}
|
||||
else {
|
||||
duration_us = 0xffffffff - cur_time_us + (uint32_t)timestamp;
|
||||
}
|
||||
|
||||
if (duration_us < TIMER_TICK_US) {
|
||||
duration_us = TIMER_TICK_US; // at least 1 tick
|
||||
}
|
||||
|
||||
timer_tick = (uint32_t)((float)duration_us / 1000000 *32000);
|
||||
RTIM_ChangePeriod(TIMx[APP_TIM_ID], timer_tick);
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
RTIM_Cmd(TIMx[APP_TIM_ID], DISABLE);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
RTIM_INTClear(TIMx[APP_TIM_ID]);
|
||||
}
|
||||
119
component/common/mbed/targets/hal/rtl8711b/us_ticker_api.c
Normal file
119
component/common/mbed/targets/hal/rtl8711b/us_ticker_api.c
Normal file
|
|
@ -0,0 +1,119 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stddef.h>
|
||||
#include "us_ticker_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
static ticker_event_handler event_handler;
|
||||
static ticker_event_t *head = NULL;
|
||||
|
||||
void us_ticker_set_handler(ticker_event_handler handler)
|
||||
{
|
||||
us_ticker_init();
|
||||
|
||||
event_handler = handler;
|
||||
}
|
||||
|
||||
void us_ticker_irq_handler(void)
|
||||
{
|
||||
us_ticker_clear_interrupt();
|
||||
|
||||
/* Go through all the pending TimerEvents */
|
||||
while (1) {
|
||||
if (head == NULL) {
|
||||
/* There are no more TimerEvents left, so disable matches. */
|
||||
us_ticker_disable_interrupt();
|
||||
return;
|
||||
}
|
||||
|
||||
if ((int)(head->timestamp - us_ticker_read()) <= 0) {
|
||||
/* This event was in the past: point to the following one and execute its handler */
|
||||
ticker_event_t *p = head;
|
||||
head = head->next;
|
||||
if (event_handler != NULL) {
|
||||
event_handler(p->id); // NOTE: the handler can set new events
|
||||
}
|
||||
/* Note: We continue back to examining the head because calling the */
|
||||
/* event handler may have altered the chain of pending events. */
|
||||
} else {
|
||||
/* This event and the following ones in the list are in the future: set it as next interrupt and return */
|
||||
us_ticker_set_interrupt(head->timestamp);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void us_ticker_insert_event(ticker_event_t *obj, timestamp_t timestamp, uint32_t id)
|
||||
{
|
||||
/* disable interrupts for the duration of the function */
|
||||
__disable_irq();
|
||||
|
||||
/* initialise our data */
|
||||
obj->timestamp = timestamp;
|
||||
obj->id = id;
|
||||
|
||||
/* Go through the list until we either reach the end, or find */
|
||||
/* an element this should come before (which is possibly the head). */
|
||||
ticker_event_t *prev = NULL, *p = head;
|
||||
while (p != NULL) {
|
||||
/* check if we come before p */
|
||||
if ((int)(timestamp - p->timestamp) <= 0) {
|
||||
break;
|
||||
}
|
||||
/* go to the next element */
|
||||
prev = p;
|
||||
p = p->next;
|
||||
}
|
||||
/* if prev is NULL we're at the head */
|
||||
if (prev == NULL) {
|
||||
head = obj;
|
||||
us_ticker_set_interrupt(timestamp);
|
||||
} else {
|
||||
prev->next = obj;
|
||||
}
|
||||
/* if we're at the end p will be NULL, which is correct */
|
||||
obj->next = p;
|
||||
|
||||
__enable_irq();
|
||||
}
|
||||
|
||||
void us_ticker_remove_event(ticker_event_t *obj)
|
||||
{
|
||||
__disable_irq();
|
||||
|
||||
/* remove this object from the list */
|
||||
if (head == obj) {
|
||||
/* first in the list, so just drop me */
|
||||
head = obj->next;
|
||||
if (head == NULL) {
|
||||
us_ticker_disable_interrupt();
|
||||
} else {
|
||||
us_ticker_set_interrupt(head->timestamp);
|
||||
}
|
||||
} else {
|
||||
/* find the object before me, then drop me */
|
||||
ticker_event_t* p = head;
|
||||
while (p != NULL) {
|
||||
if (p->next == obj) {
|
||||
p->next = obj->next;
|
||||
break;
|
||||
}
|
||||
p = p->next;
|
||||
}
|
||||
}
|
||||
|
||||
__enable_irq();
|
||||
}
|
||||
32
component/common/mbed/targets/hal/rtl8711b/wait_api.c
Normal file
32
component/common/mbed/targets/hal/rtl8711b/wait_api.c
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "wait_api.h"
|
||||
#include "us_ticker_api.h"
|
||||
|
||||
void wait(float s)
|
||||
{
|
||||
DelayUs((int)(s * 1000000.0f));
|
||||
}
|
||||
|
||||
void wait_ms(int ms)
|
||||
{
|
||||
DelayUs(ms * 1000);
|
||||
}
|
||||
|
||||
void wait_us(int us)
|
||||
{
|
||||
DelayUs(us);
|
||||
}
|
||||
87
component/common/mbed/targets/hal/rtl8711b/wdt_api.c
Normal file
87
component/common/mbed/targets/hal/rtl8711b/wdt_api.c
Normal file
|
|
@ -0,0 +1,87 @@
|
|||
/** mbed Microcontroller Library
|
||||
******************************************************************************
|
||||
* @file wdt_api.c
|
||||
* @author
|
||||
* @version V1.0.0
|
||||
* @date 2016-08-01
|
||||
* @brief This file provides mbed API for WDG.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*
|
||||
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "objects.h"
|
||||
#include "ameba_soc.h"
|
||||
#include "wdt_api.h"
|
||||
#include "cmsis.h"
|
||||
|
||||
/**
|
||||
* @brief Initializes the watch dog, include time setting, mode register
|
||||
* @param timeout_ms: the watch-dog timer timeout value, in ms.
|
||||
* default action of timeout is to reset the whole system.
|
||||
* @retval none
|
||||
*/
|
||||
void watchdog_init(uint32_t timeout_ms)
|
||||
{
|
||||
WDG_InitTypeDef WDG_InitStruct;
|
||||
u32 CountProcess;
|
||||
u32 DivFacProcess;
|
||||
|
||||
WDG_Scalar(timeout_ms, &CountProcess, &DivFacProcess);
|
||||
|
||||
WDG_InitStruct.CountProcess = CountProcess;
|
||||
WDG_InitStruct.DivFacProcess = DivFacProcess;
|
||||
|
||||
WDG_Init(&WDG_InitStruct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start the watchdog counting
|
||||
* @param None
|
||||
* @retval none
|
||||
*/
|
||||
void watchdog_start(void)
|
||||
{
|
||||
WDG_Cmd(ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop the watchdog counting
|
||||
* @param None
|
||||
* @retval none
|
||||
*/
|
||||
void watchdog_stop(void)
|
||||
{
|
||||
WDG_Cmd(DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Refresh the watchdog counting to prevent WDT timeout
|
||||
* @param None
|
||||
* @retval none
|
||||
*/
|
||||
void watchdog_refresh(void)
|
||||
{
|
||||
WDG_Refresh();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Switch the watchdog timer to interrupt mode and
|
||||
* register a watchdog timer timeout interrupt handler.
|
||||
* The interrupt handler will be called when the watch-dog
|
||||
* timer is timeout.
|
||||
* @param handler: the callback function for WDT timeout interrupt.
|
||||
* @param id: the parameter for the callback function
|
||||
* @retval none
|
||||
*/
|
||||
void watchdog_irq_init(wdt_irq_handler handler, uint32_t id)
|
||||
{
|
||||
WDG_IrqInit((VOID*)handler, (u32)id);
|
||||
}
|
||||
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue