initial commit

This commit is contained in:
Tautvydas Belgeras 2018-06-05 16:16:17 +03:00
commit 60a7afcc83
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.PHONY: all copy clean
#*****************************************************************************#
# Source FILE LIST #
#*****************************************************************************#
CSRC = src inc
#*****************************************************************************#
# RULES TO GENERATE TARGETS #
#*****************************************************************************#
# Define the Rules to build the core targets
all: copy
copy:
for cpf in $(CSRC); do \
cp -rf $$cpf ../..; \
done

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Example Description
This example describes how to use adc one shot mode wakeup.
Requirement Components:
The following modules in rtl8710b_sleepcfg.c need to be set to ON before compile:
(1) BIT_SYSON_PMOPT_SNZ_XTAL_EN and BIT_SYSON_PMOPT_SNZ_SYSPLL_EN of sleep_pwrmgt_config(global variable)
(2) BIT_SYSON_WEVT_ADC_MSK of sleep_wevent_config(global variable)
Operating process:
- Boot up device, and wait around 1 second, device will enter sleep mode, and the registered suspend function will called automatically.
- ADC scan each channel every 200ms.When adc fifo data size is more than 8, adc wakes up CPU and the registered resume function will be called automatically.
- Then system will enter sleep again until next one shot mode interrupt occurs.

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include $(MAKE_INCLUDE_GEN)
#include ./Makefile.inc
.PHONY: all clean
CHIP = rtl8195a
HALINCDIR = realtek/v3_0/include
MODULE_IFLAGS += -I$(shell pwd -L)/../inc
MODULE_IFLAGS += -I$(SWLIBDIR)/api
MODULE_IFLAGS += -I$(SWLIBDIR)/api/mbed/hal/
MODULE_IFLAGS += -I$(SWLIBDIR)/api/mbed/api/
MODULE_IFLAGS += -I$(SWLIBDIR)/drivers/targets/cmsis/rtl8195a/
MODULE_IFLAGS += -I$(SWLIBDIR)/drivers/targets/hal/rtl8195a/
GLOBAL_CFLAGS += -DCONFIG_PLATFORM_8195A
#*****************************************************************************#
# Source FILE LIST #
#*****************************************************************************#
CSRC += main.c
#*****************************************************************************#
# Object FILE LIST #
#*****************************************************************************#
OBJS = $(CSRC:.c=.o)
#*****************************************************************************#
# Object FILE LIST #
#*****************************************************************************#
#OBJS = monitor.o rtl_consol.o
#*****************************************************************************#
# RULES TO GENERATE TARGETS #
#*****************************************************************************#
# Define the Rules to build the core targets
all: CORE_TARGETS COPY_RAM_OBJS
#*****************************************************************************#
# GENERATE OBJECT FILE
#*****************************************************************************#
CORE_TARGETS: $(OBJS)
#*****************************************************************************#
# GENERATE OBJECT FILE
#*****************************************************************************#
clean:
rm -f $(CSRC:.c=.o) $(CSRC:.c=.d) $(CSRC:.c=.i) $(CSRC:.c=.s)

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "analogin_api.h"
#include <sys_api.h>
u32 adc_buf[8];
void adc_isr(void *Data)
{
u32 isr = 0;
u32 i = 0;
isr = ADC_GetISR();
if (isr & BIT_ADC_FIFO_THRESHOLD) {
for(i = 0; i < 8; i++) {
adc_buf[i] = (u32)ADC_Read();
}
}
ADC_INTClear();
}
static u32 adc_suspend(u32 expected_idle_time )
{
ADC_INTClear();
ADC_Cmd(ENABLE);
return TRUE;
}
static u32 adc_resume(u32 expected_idle_time)
{
u32 i = 0;
ADC_Cmd(DISABLE);
for (i = 0; i < 8; i += 2) {
DBG_8195A("%08x, %08x\n", adc_buf[i], adc_buf[i + 1]);
adc_buf[i] = 0;
adc_buf[i+1] = 0;
}
return TRUE;
}
VOID adc_wakeup (VOID)
{
ADC_InitTypeDef ADCInitStruct;
/* ADC Interrupt Initialization */
InterruptRegister((IRQ_FUN)&adc_isr, ADC_IRQ, (u32)NULL, 5);
InterruptEn(ADC_IRQ, 5);
/* To release ADC delta sigma clock gating */
PLL2_Set(BIT_SYS_SYSPLL_CK_ADC_EN, ENABLE);
/* Turn on ADC active clock */
RCC_PeriphClockCmd(APBPeriph_ADC, APBPeriph_ADC_CLOCK, ENABLE);
ADC_InitStruct(&ADCInitStruct);
ADCInitStruct.ADC_BurstSz = 8;
ADCInitStruct.ADC_OneShotTD = 8; /* means 4 times */
ADC_Init(&ADCInitStruct);
ADC_SetOneShot(ENABLE, 100, ADCInitStruct.ADC_OneShotTD); /* 100 will task 200ms */
pmu_register_sleep_callback(PMU_ADC_DEVICE, (PSM_HOOK_FUN)adc_suspend, (void*)NULL, (PSM_HOOK_FUN)adc_resume, (void*)NULL);
pmu_sysactive_timer_init();
pmu_set_sysactive_time(PMU_ADC_DEVICE, 1000);
pmu_release_wakelock(PMU_OS);
vTaskDelete(NULL);
}
void main(void)
{
if(xTaskCreate( (TaskFunction_t)adc_wakeup, "ADC WAKEUP DEMO", (2048/4), NULL, (tskIDLE_PRIORITY + 1), NULL)!= pdPASS) {
DBG_8195A("Cannot create ADC wakeup demo task\n\r");
}
vTaskStartScheduler();
while(1);
}