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https://github.com/taubel/sdk-ameba-v4.0b-gcc.git
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Tautvydas Belgeras
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2528 changed files with 1001987 additions and 0 deletions
293
component/soc/realtek/8195a/fwlib/src/hal_32k.c
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293
component/soc/realtek/8195a/fwlib/src/hal_32k.c
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/*
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* Routines to access hardware
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*
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* Copyright (c) 2013 Realtek Semiconductor Corp.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*/
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#include "rtl8195a.h"
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#ifdef CONFIG_TIMER_MODULE
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VOID
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En32KCalibration(
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VOID
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)
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{
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u32 Rtemp;
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u32 Ttemp = 0;
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//DiagPrintf("32K clock source calibration\n");
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//set parameter
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
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//offset 1 = 0x1500
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Rtemp = 0x811500;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
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HalDelayUs(40);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
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//offset 2 = 0x01c0
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Rtemp = 0x8201c0;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
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HalDelayUs(40);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
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//offset 4 = 0x0100
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Rtemp = 0x840100;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
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HalDelayUs(40);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
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//offset 0 = 0xf980
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Rtemp = 0x80f980;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
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HalDelayUs(40);
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, 0);
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while(1) {
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//Polling LOCK
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Rtemp = 0x110000;
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HAL_WRITE32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL0, Rtemp);
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//DiagPrintf("Polling lock\n");
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HalDelayUs(40);
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Rtemp = HAL_READ32(SYSTEM_CTRL_BASE,REG_OSC32K_REG_CTRL1);
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if ((Rtemp & 0x3000) != 0x0){
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//DiagPrintf("32.768 Calibration Success\n", Ttemp);
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break;
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}
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else {
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Ttemp++;
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HalDelayUs(30);
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//DiagPrintf("Check lock: %d\n", Ttemp);
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//DiagPrintf("0x278: %x\n", Rtemp);
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if (Ttemp > 100000) { /*Delay 100ms*/
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DiagPrintf("32K Calibration Fail!!\n", Ttemp);
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break;
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}
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}
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}
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}
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#if CONFIG_WDG
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WDG_ADAPTER WDGAdapter;
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extern HAL_TIMER_OP HalTimerOp;
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#ifdef CONFIG_WDG_NORMAL
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VOID
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WDGInitial(
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IN u32 Period
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)
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{
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u8 CountId;
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u16 DivFactor;
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u32 CountTemp;
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u32 CountProcess = 0;
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u32 DivFacProcess = 0;
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u32 PeriodProcess = 100*Period;
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u32 MinPeriodTemp = 0xFFFFFFFF;
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u32 PeriodTemp = 0;
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u32 *Reg = (u32*)&(WDGAdapter.Ctrl);
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DBG_8195A(" Period = 0x%08x\n", Period);
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for (CountId = 0; CountId < 12; CountId++) {
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CountTemp = ((0x00000001 << (CountId+1))-1);
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DivFactor = (u16)((PeriodProcess)/(CountTemp*3));
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if (DivFactor > 0) {
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PeriodTemp = 3*(DivFactor+1)*CountTemp;
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if (PeriodProcess < PeriodTemp) {
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if (MinPeriodTemp > PeriodTemp) {
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MinPeriodTemp = PeriodTemp;
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CountProcess = CountId;
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DivFacProcess = DivFactor;
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}
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}
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}
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}
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DBG_8195A("WdgScalar = 0x%08x\n", DivFacProcess);
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DBG_8195A("WdgCunLimit = 0x%08x\n", CountProcess);
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WDGAdapter.Ctrl.WdgScalar = DivFacProcess;
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WDGAdapter.Ctrl.WdgEnByte = 0;
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WDGAdapter.Ctrl.WdgClear = 1;
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WDGAdapter.Ctrl.WdgCunLimit = CountProcess;
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WDGAdapter.Ctrl.WdgMode = RESET_MODE;
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WDGAdapter.Ctrl.WdgToISR = 0;
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HAL_WRITE32(VENDOR_REG_BASE, 0, (*Reg));
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}
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VOID
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WDGIrqHandle
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(
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IN VOID *Data
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)
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{
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u32 temp;
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WDG_REG *CtrlReg;
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if (NULL != WDGAdapter.UserCallback) {
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WDGAdapter.UserCallback(WDGAdapter.callback_id);
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}
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// Clear ISR
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temp = HAL_READ32(VENDOR_REG_BASE, 0);
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CtrlReg = (WDG_REG*)&temp;
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CtrlReg->WdgToISR = 1; // write 1 clear
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HAL_WRITE32(VENDOR_REG_BASE, 0, (temp));
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}
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VOID
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WDGIrqInitial(
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VOID
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)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.IrqHandle.Data = (u32)&WDGAdapter;
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WDGAdapter.IrqHandle.IrqFun = (IRQ_FUN)WDGIrqHandle;
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WDGAdapter.IrqHandle.IrqNum = WDG_IRQ;
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WDGAdapter.IrqHandle.Priority = 0;
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InterruptRegister(&(WDGAdapter.IrqHandle));
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InterruptEn(&(WDGAdapter.IrqHandle));
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WDGAdapter.Ctrl.WdgToISR = 1; // clear ISR first
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WDGAdapter.Ctrl.WdgMode = INT_MODE;
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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WDGAdapter.Ctrl.WdgToISR = 0;
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}
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VOID
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WDGStart(
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VOID
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)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.Ctrl.WdgEnByte = 0xA5;
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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}
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VOID
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WDGStop(
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VOID
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)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.Ctrl.WdgEnByte = 0;
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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}
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VOID
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WDGRefresh(
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VOID
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)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.Ctrl.WdgClear = 1;
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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}
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VOID
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WDGIrqCallBackReg(
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IN VOID *CallBack,
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IN u32 Id
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)
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{
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WDGAdapter.UserCallback = (VOID (*)(u32))CallBack;
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WDGAdapter.callback_id = Id;
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}
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#endif
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#ifdef CONFIG_WDG_TEST
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VOID
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WDGIrqHandle
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(
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IN VOID *Data
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)
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{
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}
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VOID
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WDGGtimerHandle
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(
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IN VOID *Data
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)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.Ctrl.WdgClear = 1;
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DBG_8195A("reset WDG\n");
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if (HAL_READ32(SYSTEM_CTRL_BASE,REG_SYS_DSTBY_INFO2) == 0) {
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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}
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}
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VOID
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InitWDGIRQ(VOID)
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{
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u32 *Temp = (u32*)&(WDGAdapter.Ctrl);
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WDGAdapter.Ctrl.WdgScalar = 0x96;
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WDGAdapter.Ctrl.WdgEnByte = 0xA5;
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WDGAdapter.Ctrl.WdgClear = 1;
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WDGAdapter.Ctrl.WdgCunLimit = CNTFFFH;
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WDGAdapter.Ctrl.WdgMode = RESET_MODE;
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WDGAdapter.Ctrl.WdgToISR = 0;
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if (WDGAdapter.Ctrl.WdgMode == INT_MODE) {
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WDGAdapter.IrqHandle.Data = NULL;
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WDGAdapter.IrqHandle.IrqFun = (IRQ_FUN)WDGIrqHandle;
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WDGAdapter.IrqHandle.IrqNum = WDG_IRQ;
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WDGAdapter.IrqHandle.Priority = 5;
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InterruptRegister(&(WDGAdapter.IrqHandle));
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InterruptEn(&(WDGAdapter.IrqHandle));
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}
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else {
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WDGAdapter.WdgGTimer.TimerIrqPriority = 0;
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WDGAdapter.WdgGTimer.TimerMode = USER_DEFINED;
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WDGAdapter.WdgGTimer.IrqDis = OFF;
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WDGAdapter.WdgGTimer.TimerId = 2;//
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WDGAdapter.WdgGTimer.IrqHandle.IrqFun = (IRQ_FUN)WDGGtimerHandle;
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WDGAdapter.WdgGTimer.IrqHandle.IrqNum = TIMER2_7_IRQ;
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WDGAdapter.WdgGTimer.IrqHandle.Priority = 5;
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WDGAdapter.WdgGTimer.IrqHandle.Data = NULL;
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if ((WDGAdapter.Ctrl.WdgCunLimit == CNTFFFH)&&(WDGAdapter.Ctrl.WdgScalar >= 0x8429)){
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WDGAdapter.WdgGTimer.TimerLoadValueUs = 0xFFFFFFFF - WDGTIMERELY;
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}
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else {
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WDGAdapter.WdgGTimer.TimerLoadValueUs = (BIT0 << (WDGAdapter.Ctrl.WdgCunLimit+1))
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*WDGAdapter.Ctrl.WdgScalar*TIMER_TICK_US - WDGTIMERELY;
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}
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HalTimerOp.HalTimerInit((VOID*) &(WDGAdapter.WdgGTimer));
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}
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//fill reg
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HAL_WRITE32(VENDOR_REG_BASE, 0, ((*Temp)));
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}
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//WDG
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VOID HalWdgInit(
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VOID
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)
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{
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}
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#endif //CONFIG_WDG_TEST
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#endif //CONFIG_WDG
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#endif //#ifdef CONFIG_TIMER_MODULE
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