/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/**/
/**/
include "rom_symbol_v01_iar.icf";
/****************************************
 * Memory Regions                   *
 ****************************************/
define symbol __ICFEDIT_region_ROM_start__       	= 0x00000000;
define symbol __ICFEDIT_region_ROM_end__         	= 0x0007FFFF;
define symbol __ICFEDIT_region_ROMBSS_RAM_start__       = 0x10000000;
define symbol __ICFEDIT_region_ROMBSS_RAM_end__        	= 0x10001FFF;
define symbol __ICFEDIT_region_BOOTLOADER_RAM_start__   = 0x10002000;
define symbol __ICFEDIT_region_BOOTLOADER_RAM_end__     = 0x10004FFF;
define symbol __ICFEDIT_region_BD_RAM_start__    	= 0x10005000;
define symbol __ICFEDIT_region_BD_RAM_end__      	= 0x1002FFFF;
define symbol __ICFEDIT_region_MSP_RAM_start__    	= 0x1003E000;
define symbol __ICFEDIT_region_MSP_RAM_end__      	= 0x1003EFFF;
define symbol __ICFEDIT_region_RDP_RAM_start__    	= 0x1003F000;
define symbol __ICFEDIT_region_RDP_RAM_end__      	= 0x1003FFEF;
define symbol __ICFEDIT_region_IMG2_TEMP_start__ 	= 0x10006000;
define symbol __ICFEDIT_region_IMG2_TEMP_end__   	= 0x1000BFFF;
define symbol __ICFEDIT_region_XIP_BOOT_start__ 	= 0x08000000+0x20;
define symbol __ICFEDIT_region_XIP_BOOT_end__   	= 0x08003FFF;
define symbol __ICFEDIT_region_XIP_OTA1_start__ 	= 0x0800B000+0x20;
define symbol __ICFEDIT_region_XIP_OTA1_end__   	= 0x080FFFFF;
/****************************************
 * Sizes                   *
 ****************************************/
/*define symbol __ICFEDIT_size_cstack__   = 0x400;*/
/*define symbol __ICFEDIT_size_heap__     = 0x800;*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region ROM_BSS_region   = mem:[from __ICFEDIT_region_ROMBSS_RAM_start__   to __ICFEDIT_region_ROMBSS_RAM_end__];
define region BOOT_RAM_region   = mem:[from __ICFEDIT_region_BOOTLOADER_RAM_start__   to __ICFEDIT_region_BOOTLOADER_RAM_end__];
define region BD_RAM_region   = mem:[from __ICFEDIT_region_BD_RAM_start__   to __ICFEDIT_region_BD_RAM_end__];
define region IMG2_TEMP_region   = mem:[from __ICFEDIT_region_IMG2_TEMP_start__   to __ICFEDIT_region_IMG2_TEMP_end__];
define region XIP_BOOT_region   = mem:[from __ICFEDIT_region_XIP_BOOT_start__   to __ICFEDIT_region_XIP_BOOT_end__];
define region XIP_OTA1_region   = mem:[from __ICFEDIT_region_XIP_OTA1_start__   to __ICFEDIT_region_XIP_OTA1_end__];
define region RDP_RAM_region   = mem:[from __ICFEDIT_region_RDP_RAM_start__   to __ICFEDIT_region_RDP_RAM_end__];
/*define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };*/
/*define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };*/
//initialize by copy { readwrite };
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
//do not initialize  { section * };
//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
//
/****************************************
 * ROM Section config                   *
 ****************************************/
keep { section .rom.text };
keep { section .rom.rodata };
place at start of ROM_region   { readonly, section .rom.text, section .rom.rodata };
/****************************************
 * ROM BSS Section config                *
 ****************************************/
keep { section .ram_vector_table1 };
keep { section .ram_vector_table2 };
keep { section .ram_vector_table3 };
keep { section .hal.rom.bss* };
keep { section .wlan_ram_map* };
keep { section .libc.ram.bss* };
keep { section .ssl_ram_map* };
define block .hal.rom.bss with fixed order{         section .ram_vector_table1, 
                                                section .ram_vector_table2,
                                                section .ram_vector_table3,
                                                section .hal.rom.bss*,
                                                section .wlan_ram_map*,
                                                section .libc.ram.bss*,
                                                section .ssl_ram_map*, 
                                      };
define block ROM_BSS with fixed order { block .hal.rom.bss};
place at start of ROM_BSS_region  { readwrite, 
                                      block ROM_BSS,
                                      };
/****************************************
 * BOOT RAM Section config                *
 ****************************************/
keep { section .image1.entry.data* };
keep { section .image1.validate.rodata* };
define block .ram_image1.entry with fixed order{section .image1.entry.data*,
						section .image1.validate.rodata*,
						};
keep { section .boot.ram.text* };
keep { section .boot.rodata* };
define block .ram_image1.text with fixed order{section .boot.ram.text*,
						section .boot.rodata*,
						};
keep { section .boot.ram.data* };
define block .ram_image1.data with fixed order{section .boot.ram.data*,
						};
keep { section .boot.ram.bss* };
define block .ram_image1.bss with fixed order{section .boot.ram.bss*,
						};
define block IMAGE1 with fixed order { block .ram_image1.entry, block .ram_image1.text, block .ram_image1.data, block .ram_image1.bss};
place at start of BOOT_RAM_region   { readwrite, 
                                    block IMAGE1,
                                  };
/****************************************
 * BD RAM Section config                *
 ****************************************/
keep { section .image2.entry.data* };
keep { section .image2.validate.rodata* };
define block .ram_image2.entry with fixed order{ section .image2.entry.data*,
						section .image2.validate.rodata*,
						};
define block SHT$$PREINIT_ARRAY { preinit_array };
define block SHT$$INIT_ARRAY { init_array };
define block CPP_INIT with fixed order { block SHT$$PREINIT_ARRAY,
					block SHT$$INIT_ARRAY };
define block .ram.data with fixed order{ section .data*, 
					 section DATA, 
					 section .iar.init_table,
					 section __DLIB_PERTHREAD,				 	 
					 block CPP_INIT,
					 section .mdns.data,
					 section .mdns.text
					};
define block .ram.text with fixed order{ section .image2.ram.text*,
					}; 
define block IMAGE2 with fixed order {  block .ram_image2.entry,
					block .ram.data,  
					block .ram.text,  
					};
define block .ram_image2.bss with fixed order{ section .bss*,
                                        section COMMON,
                                      };
define block .ram_image2.skb.bss with fixed order{ section .bdsram.data* };
define block .ram_heap.data with fixed order{ section .bfsram.data* };
place at start of BD_RAM_region  { readwrite, 
					block IMAGE2,
					block .ram_image2.bss,
					block .ram_image2.skb.bss,
					block .ram_heap.data,
					section .heap.stdlib,	
					};
/****************************************
 * XIP BOOT Section config                *
 ****************************************/
keep { section .flashboot.text* };
define block .xip_image1.text with fixed order{ section .flashboot.text* };
define block Bootloader with fixed order { section LOADER };
place at start of XIP_BOOT_region   {   block Bootloader,
					readwrite,
					 block .xip_image1.text };
/****************************************
 * XIP OTA1 Section config                *
 ****************************************/
define block .xip_image2.text with fixed order{ section .img2_custom_signature*,
						section .text*,
						section .rodata*,
						section .debug_trace,
						section CODE,
						section Veneer, // object startup.o,
						};
place at start of  XIP_OTA1_region   {  readwrite, 
					  block .xip_image2.text };
/****************************************
 * RDP Section config                    *
 ****************************************/
keep {	section .rdp.ram.text* };
keep {	section .rdp.ram.data* };
define block .RDP_RAM with fixed order {
	section .rdp.ram.text*,
	section .rdp.ram.data* };
place at start of  RDP_RAM_region{
	readwrite, 
	block .RDP_RAM };
define exported symbol __ram_start_table_start__= 0x10002000;	// use in rom
define exported symbol __image1_validate_code__= 0x10002018;	// needed by ram code
define exported symbol __rom_top_4k_start_= 0x1003F000;	// needed by ram code
define exported symbol __flash_text_start__= 0x0800b020; // needed by ram code
define exported symbol boot_export_symbol = 0x10002020;  
