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polyfractal 2016-12-30 18:23:32 -05:00
parent d4f581cea3
commit 34016a7bd3
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41
component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac Normal file
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__load_dram_param(){
//DRAM_INFO
DeviceType = 8; //DRAM_SDR
Page = 0; //DRAM_COLADDR_8B
Bank=0; //DRAM_BANK_2
DqWidth=0; //DRAM_DQ_1
//DRAM_MODE_REG_INFO
BstLen=0; //BST_LEN_4
BstType=0; //SENQUENTIAL
Mode0Cas=3;
Mode0Wr=0;
Mode1DllEnN=0;
Mode1AllLat=0;
Mode2Cwl=0;
//DRAM_TIMING_INFO
DramTimingTref = 64000;
DramRowNum = 8192;
//SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
Tck = 80000; //SDR 12.5MHZ
TrfcPs=60000;
TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
WrMaxTck=2;
TrcdPs=15000;
TrpPs=15000;
TrasPs=42000;
TrrdTck=2;
TwrPs=Tck*2;
TwtrTck=0;
TmrdTck=2;
TrtpTck=0;
TccdTck=1;
TrcPs=60000;
//DRAM_DEVICE_INFO
DdrPeriodPs=Tck;
DfiRate=0; //DFI_RATIO_1
}

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component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac Normal file
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__load_dram_common(){
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
}

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component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt Normal file
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To Change DRAM setting
1. Create and Fill content like EM6A6165TS_7G.mac
2. Change load file in common.mac