mirror of
https://github.com/eggman/rtl_ameba_gcc_sample.git
synced 2024-11-01 03:34:17 +00:00
227 lines
4.5 KiB
Text
227 lines
4.5 KiB
Text
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ENTRY(PreProcessForVendor)
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INCLUDE "export-rom.txt"
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MEMORY
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{
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TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
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BD_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 455735
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SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
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}
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STACK_SIZE = 0x2000 ;
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SECTIONS
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{
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__rom_bss_start__ = 0x10000300;
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__rom_bss_end__ = 0x10000bc8;
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.ram.start.table :
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{
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__ram_image1_text_start__ = .;
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__ram_start_table_start__ = .;
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KEEP(*(SORT(.start.ram.data*)))
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__ram_start_table_end__ = .;
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} > BD_RAM
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/* Add . to assign the start address of the section, *
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* to prevent the change of the start address by ld doing section alignment */
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.ram_image1.text . :
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{
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/* these 4 sections is used by ROM global variable */
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/* Don't move them and never add RAM code variable to these sections */
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__image1_validate_code__ = .;
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KEEP(*(.image1.validate.rodata*))
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KEEP(*(.infra.ram.data*))
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KEEP(*(.timer.ram.data*))
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KEEP(*(.hal.ram.data*))
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__image1_bss_start__ = .;
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*(.hal.flash.data*)
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*(.hal.sdrc.data*)
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__image1_bss_end__ = .;
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*(.hal.ram.text*)
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*(.hal.flash.text*)
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*(.hal.sdrc.text*)
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*(.rodata*)
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*(.infra.ram.text*)
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__ram_image1_text_end__ = .;
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} > BD_RAM
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.image2.start.table :
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{
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__ram_image2_text_start__ = .;
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__image2_entry_func__ = .;
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KEEP(*(SORT(.image2.ram.data*)))
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__image2_validate_code__ = .;
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KEEP(*(.image2.validate.rodata*))
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} > BD_RAM
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.ram_image2.text :
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{
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KEEP(*(.vectors .vectors.*))
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*(.infra.ram.start*)
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*(.mon.ram.text*)
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*(.text .text.* .gnu.linkonce.t.*)
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*(.ramfunc .ramfunc.*);
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*(.glue_7t) *(.glue_7)
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*(.gnu.linkonce.r.*)
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} > BD_RAM
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > BD_RAM
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.ram.data :
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{
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__data_start__ = .;
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. = ALIGN(4);
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*(vtable)
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. = ALIGN(4);
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*(.data .data.*);
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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/* init data */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP(*crtbegin?.o(.ctors))
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KEEP(*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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KEEP(*(.ctors))
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/* finit data */
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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KEEP (*crtbegin.o(.dtors))
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KEEP(*crtbegin?.o(.dtors))
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KEEP(*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
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KEEP(*(SORT(.dtors.*)))
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KEEP(*crtend.o(.dtors))
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KEEP(*(.dtors))
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} > BD_RAM
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. = ALIGN(4);
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx ALIGN(4) : AT(__exidx_start)
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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__ram_image2_text_end__ = .;
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} > BD_RAM
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PROVIDE_HIDDEN (__exidx_end = .);
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.sdr_data :
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{
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__sdram_data_start__ = .;
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*(.sdram.data*)
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__sdram_data_end__ = .;
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} > SDRAM_RAM
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD):
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{
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. = ALIGN(4);
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__bss_start__ = .;
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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*(.bdsram.data*)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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__bss_end__ = .;
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} > BD_RAM
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.bf_data (NOLOAD):
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{
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__buffer_data_start__ = .;
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*(.bfsram.data*)
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__buffer_data_end__ = .;
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} > BD_RAM
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.heap (NOLOAD):
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > BD_RAM
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/* stack section */
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. = ALIGN(8);
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PROVIDE( _sstack = .);
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PROVIDE(__StackLimit = _sstack);
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.stack_dummy (NOLOAD) : AT(_sstack)
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{
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. = ALIGN(8);
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. = . + STACK_SIZE;
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. = ALIGN(8);
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} > BD_RAM
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PROVIDE(_estack = .);
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PROVIDE(__StackTop = _estack);
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PROVIDE(__stack = __StackTop);
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. = ALIGN(4);
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_end = . ;
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}
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