From 3fa968afe2abfead9fbfc2009417ae4476046a8a Mon Sep 17 00:00:00 2001 From: kissste Date: Mon, 15 May 2017 21:59:48 -0400 Subject: [PATCH] First commit --- .cproject | 1260 +++++++++++++++++++++++++++ .gitignore | 1 + .project | 127 +++ DAPLink-RTL00Console.bat | 7 + DAPLink-RdFullFlash.bat | 7 + DAPLink-Reset.bat | 6 + DAPLink_WrFullFlash.bat | 6 + JLink-RTL00ConsoleROM.bat | 3 + JLink-RdFullFlash.bat | 3 + JLink-Reset.bat | 3 + JLink-RunRAM.bat | 3 + JLinkGDB-RdFullFlash.bat | 6 + JLinkGDB-RunRAM.bat | 15 + JLinkGDB-WrFlash.bat | 21 + JLinkGDBServer.bat | 6 + JLinkGDB_OTA.bat | 15 + JLinkOCD-RdFullFlash.bat | 7 + JLink_RdFullFlash.bat | 6 + JlinkOpenOCD.bat | 4 + LICENSE | 24 + Makefile | 59 ++ STLink-RdFullFlash.bat | 7 + STLink-Reset.bat | 6 + flasher.mk | 307 +++++++ flasher/RTL00ConsoleROM.JLinkScript | 6 + flasher/RTL00Console_ROM.bin | Bin 0 -> 600 bytes flasher/RTL8710.jflash | 119 +++ flasher/RTL8710AF.hex | 130 +++ flasher/RTL_FFlash.JLinkScript | 17 + flasher/RTL_Reset.JLinkScript | 9 + flasher/RTL_RunRAM.JLinkScript | 12 + flasher/ameba1.cfg | 124 +++ flasher/cortex.ocd | 99 +++ flasher/flash_file.jlink | 9 + flasher/gdb_flasher.jlink | 198 +++++ flasher/gdb_init.jlink | 30 + flasher/gdb_ota.jlink | 374 ++++++++ flasher/gdb_rdflash.jlink | 17 + flasher/gdb_run_ram.jlink | 11 + flasher/gdb_wrfile.jlink | 156 ++++ flasher/gdb_wrflash.jlink | 164 ++++ flasher/rtl8710.ocd | 340 ++++++++ flasher/rtl8710_flasher.bin | Bin 0 -> 968 bytes init_project.sh | 20 + paths.bat | 1 + paths.mk | 44 + pick_padding_checksum/Makefile | 7 + pick_padding_checksum/checksum.c | 108 +++ pick_padding_checksum/checksum.exe | Bin 0 -> 46592 bytes pick_padding_checksum/padding.c | 45 + pick_padding_checksum/padding.exe | Bin 0 -> 46592 bytes pick_padding_checksum/pick.cpp | 140 +++ pick_padding_checksum/pick.exe | Bin 0 -> 47104 bytes project/inc/FreeRTOSConfig.h | 215 +++++ project/inc/build_info.h | 7 + project/inc/feep_config.h | 29 + project/inc/lwipopts.h | 381 ++++++++ project/inc/main.h | 119 +++ project/inc/platform_autoconf.h | 251 ++++++ project/inc/platform_opts.h | 171 ++++ project/inc/rtl8195a/c_types.h | 96 ++ project/inc/rtl8195a/os.h | 593 +++++++++++++ project/inc/rtl8195a/rom_wps_os.h | 24 + project/inc/rtl8195a/rtl_common.h | 15 + project/inc/rtl8195a/rtl_libc.h | 164 ++++ project/inc/user/cgi-test.h | 8 + project/inc/user/cgiwifi_rtl.h | 13 + project/inc/user/http_server.h | 14 + project/inc/user/main.h | 68 ++ project/inc/user/user_config.h | 29 + project/inc/wifi_user_set.h | 72 ++ project/src/FreeRTOS-openocd.c | 20 + project/src/console/atcmd_user.c | 603 +++++++++++++ project/src/console/gpio_irq_test.c | 99 +++ project/src/console/spi_tst.c | 83 ++ project/src/console/wifi_console.c | 324 +++++++ project/src/rtl_boot_s.c | 722 +++++++++++++++ project/src/user/main.c | 97 +++ project/src/user/user_init.c | 101 +++ project/src/user/wc_mgr.c | 291 +++++++ readme.md | 12 + readme.txt | 8 + sdkbuild.mk | 93 ++ sdkset.mk | 450 ++++++++++ 84 files changed, 9261 insertions(+) create mode 100644 .cproject create mode 100644 .gitignore create mode 100644 .project create mode 100644 DAPLink-RTL00Console.bat create mode 100644 DAPLink-RdFullFlash.bat create mode 100644 DAPLink-Reset.bat create mode 100644 DAPLink_WrFullFlash.bat create mode 100644 JLink-RTL00ConsoleROM.bat create mode 100644 JLink-RdFullFlash.bat create mode 100644 JLink-Reset.bat create mode 100644 JLink-RunRAM.bat create mode 100644 JLinkGDB-RdFullFlash.bat create mode 100644 JLinkGDB-RunRAM.bat create mode 100644 JLinkGDB-WrFlash.bat create mode 100644 JLinkGDBServer.bat create mode 100644 JLinkGDB_OTA.bat create mode 100644 JLinkOCD-RdFullFlash.bat create mode 100644 JLink_RdFullFlash.bat create mode 100644 JlinkOpenOCD.bat create mode 100644 LICENSE create mode 100644 Makefile create mode 100644 STLink-RdFullFlash.bat create mode 100644 STLink-Reset.bat create mode 100644 flasher.mk create mode 100644 flasher/RTL00ConsoleROM.JLinkScript create mode 100644 flasher/RTL00Console_ROM.bin create mode 100644 flasher/RTL8710.jflash create mode 100644 flasher/RTL8710AF.hex create mode 100644 flasher/RTL_FFlash.JLinkScript create mode 100644 flasher/RTL_Reset.JLinkScript create mode 100644 flasher/RTL_RunRAM.JLinkScript create mode 100644 flasher/ameba1.cfg create mode 100644 flasher/cortex.ocd create mode 100644 flasher/flash_file.jlink create mode 100644 flasher/gdb_flasher.jlink create mode 100644 flasher/gdb_init.jlink create mode 100644 flasher/gdb_ota.jlink create mode 100644 flasher/gdb_rdflash.jlink create mode 100644 flasher/gdb_run_ram.jlink create mode 100644 flasher/gdb_wrfile.jlink create mode 100644 flasher/gdb_wrflash.jlink create mode 100644 flasher/rtl8710.ocd create mode 100644 flasher/rtl8710_flasher.bin create mode 100644 init_project.sh create mode 100644 paths.bat create mode 100644 paths.mk create mode 100644 pick_padding_checksum/Makefile create mode 100644 pick_padding_checksum/checksum.c create mode 100644 pick_padding_checksum/checksum.exe create mode 100644 pick_padding_checksum/padding.c create mode 100644 pick_padding_checksum/padding.exe create mode 100644 pick_padding_checksum/pick.cpp create mode 100644 pick_padding_checksum/pick.exe create mode 100644 project/inc/FreeRTOSConfig.h create mode 100644 project/inc/build_info.h create mode 100644 project/inc/feep_config.h create mode 100644 project/inc/lwipopts.h create mode 100644 project/inc/main.h create mode 100644 project/inc/platform_autoconf.h create mode 100644 project/inc/platform_opts.h create mode 100644 project/inc/rtl8195a/c_types.h create mode 100644 project/inc/rtl8195a/os.h create mode 100644 project/inc/rtl8195a/rom_wps_os.h create mode 100644 project/inc/rtl8195a/rtl_common.h create mode 100644 project/inc/rtl8195a/rtl_libc.h create mode 100644 project/inc/user/cgi-test.h create mode 100644 project/inc/user/cgiwifi_rtl.h create mode 100644 project/inc/user/http_server.h create mode 100644 project/inc/user/main.h create mode 100644 project/inc/user/user_config.h create mode 100644 project/inc/wifi_user_set.h create mode 100644 project/src/FreeRTOS-openocd.c create mode 100644 project/src/console/atcmd_user.c create mode 100644 project/src/console/gpio_irq_test.c create mode 100644 project/src/console/spi_tst.c create mode 100644 project/src/console/wifi_console.c create mode 100644 project/src/rtl_boot_s.c create mode 100644 project/src/user/main.c create mode 100644 project/src/user/user_init.c create mode 100644 project/src/user/wc_mgr.c create mode 100644 readme.md create mode 100644 readme.txt create mode 100644 sdkbuild.mk create mode 100644 sdkset.mk diff --git a/.cproject b/.cproject new file mode 100644 index 0000000..129d225 --- /dev/null +++ b/.cproject @@ -0,0 +1,1260 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + mingw32-make.exe + -j 4 + all + true + false + false + + + make + -s + clean + true + true + false + + + make + -s + flashburn + true + true + false + + + make + -s + reset + true + true + false + + + make + -s + test + true + true + false + + + mingw32-make.exe + -s + readfullflash + true + true + false + + + mingw32-make.exe + -s + flash_OTA + true + true + false + + + mingw32-make.exe + -s + runram + true + true + false + + + mingw32-make.exe + -s + mp + true + true + false + + + mingw32-make.exe + -s + webfs + true + true + false + + + mingw32-make.exe + -s + flashwebfs + true + true + false + + + + diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..d163863 --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +build/ \ No newline at end of file diff --git a/.project b/.project new file mode 100644 index 0000000..0dbd10a --- /dev/null +++ b/.project @@ -0,0 +1,127 @@ + + + RTLHTTPD + + + RTL00_SDKV35a + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + RTL00_SDKV35a + 2 + PARENT-1-PROJECT_LOC/RTL00MP3/RTL00_SDKV35a + + + + + 1491847060016 + RTL00_SDKV35a + 5 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-*.h + + + + 1491847060020 + RTL00_SDKV35a + 5 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-*.c + + + + 1491847060024 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-AutoMake + + + + 1491847060028 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-build + + + + 1491847060032 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-flasher + + + + 1491847060035 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-LibAutoMake + + + + 1491847060039 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-project + + + + 1491847060050 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-.git + + + + 1491847060054 + RTL00_SDKV35a + 10 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-.settings + + + + 1491847060058 + RTL00_SDKV35a + 14 + + org.eclipse.ui.ide.multiFilter + 1.0-name-matches-false-false-iar_utility + + + + diff --git a/DAPLink-RTL00Console.bat b/DAPLink-RTL00Console.bat new file mode 100644 index 0000000..bc0d13c --- /dev/null +++ b/DAPLink-RTL00Console.bat @@ -0,0 +1,7 @@ +@echo off +call paths.bat +cd flasher +openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "load_ram_binary RTL00Console_ROM.bin 0x10000BA8" -c "exit" +rem -c "shutdown" + + diff --git a/DAPLink-RdFullFlash.bat b/DAPLink-RdFullFlash.bat new file mode 100644 index 0000000..5861662 --- /dev/null +++ b/DAPLink-RdFullFlash.bat @@ -0,0 +1,7 @@ +@echo off +call paths.bat +cd flasher +openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "adapter_khz 5000" -c "rtl8710_flash_read ../fullflash.bin 0 1048576" -c "shutdown" +echo flash read fullflash.bin +pause + diff --git a/DAPLink-Reset.bat b/DAPLink-Reset.bat new file mode 100644 index 0000000..aceee70 --- /dev/null +++ b/DAPLink-Reset.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +@cd flasher +openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "restart_from_falsh" -c "shutdown" +rem + diff --git a/DAPLink_WrFullFlash.bat b/DAPLink_WrFullFlash.bat new file mode 100644 index 0000000..bd1cf72 --- /dev/null +++ b/DAPLink_WrFullFlash.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +cd flasher +openocd -f interface/cmsis-dap.cfg -c "adapter_khz 3500" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write fullflash.bin 0" -c "shutdown" +pause + diff --git a/JLink-RTL00ConsoleROM.bat b/JLink-RTL00ConsoleROM.bat new file mode 100644 index 0000000..d8488c6 --- /dev/null +++ b/JLink-RTL00ConsoleROM.bat @@ -0,0 +1,3 @@ +@echo off +call paths.bat +start JLink.exe -Device CORTEX-M3 -If SWD -Speed 4000 flasher\RTL00ConsoleROM.JLinkScript diff --git a/JLink-RdFullFlash.bat b/JLink-RdFullFlash.bat new file mode 100644 index 0000000..de5d955 --- /dev/null +++ b/JLink-RdFullFlash.bat @@ -0,0 +1,3 @@ +@echo off +call paths.bat +JLink.exe -Device CORTEX-M3 -If SWD -Speed 10000 flasher/RTL_FFlash.JLinkScript diff --git a/JLink-Reset.bat b/JLink-Reset.bat new file mode 100644 index 0000000..35c6fba --- /dev/null +++ b/JLink-Reset.bat @@ -0,0 +1,3 @@ +@echo off +call paths.bat +start JLink.exe -Device CORTEX-M3 -If SWD -Speed 1000 flasher\RTL_Reset.JLinkScript diff --git a/JLink-RunRAM.bat b/JLink-RunRAM.bat new file mode 100644 index 0000000..a355298 --- /dev/null +++ b/JLink-RunRAM.bat @@ -0,0 +1,3 @@ +@echo off +call paths.bat +start JLink.exe -Device CORTEX-M3 -If SWD -Speed 1000 flasher\RTL_RunRAM.JLinkScript diff --git a/JLinkGDB-RdFullFlash.bat b/JLinkGDB-RdFullFlash.bat new file mode 100644 index 0000000..76865da --- /dev/null +++ b/JLinkGDB-RdFullFlash.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 1000 +arm-none-eabi-gdb.exe -x flasher/gdb_rdflash.jlink +taskkill /F /IM JLinkGDBServer.exe + diff --git a/JLinkGDB-RunRAM.bat b/JLinkGDB-RunRAM.bat new file mode 100644 index 0000000..323aa3a --- /dev/null +++ b/JLinkGDB-RunRAM.bat @@ -0,0 +1,15 @@ +@echo off +call paths.bat +@if exist build\obj\build.axf goto run +echo File 'build\obj\build.axf' not found! +echo Build project... +mingw32-make.exe -f Makefile all +@if not exist build\obj\build.axf goto err +:run +start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 1000 +arm-none-eabi-gdb.exe -x flasher/gdb_run_ram.jlink +taskkill /F /IM JLinkGDBServer.exe +goto end +:err +echo Error! +:end \ No newline at end of file diff --git a/JLinkGDB-WrFlash.bat b/JLinkGDB-WrFlash.bat new file mode 100644 index 0000000..c70f651 --- /dev/null +++ b/JLinkGDB-WrFlash.bat @@ -0,0 +1,21 @@ +@echo off +call paths.bat +@if %1x==x goto xxx +set img_file=%1 +goto run +:xxx +set img_file=build/bin/ram_all.bin +:run +echo define call1>flasher/flash_file.jlink +echo SetFirwareSize %img_file%>>flasher/flash_file.jlink +echo end>>flasher/flash_file.jlink +echo define call2>>flasher/flash_file.jlink +echo FlasherWrite %img_file% 0 $Image1Size>>flasher/flash_file.jlink +echo end>>flasher/flash_file.jlink +echo define call3>>flasher/flash_file.jlink +echo FlasherWrite %img_file% $Image2Addr $Image2Size>>flasher/flash_file.jlink +echo end>>flasher/flash_file.jlink +start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 3500 +arm-none-eabi-gdb.exe -x flasher/gdb_wrflash.jlink +taskkill /F /IM JLinkGDBServer.exe + diff --git a/JLinkGDBServer.bat b/JLinkGDBServer.bat new file mode 100644 index 0000000..c356ac1 --- /dev/null +++ b/JLinkGDBServer.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 1000 +arm-none-eabi-gdb.exe -x flasher/gdb_init.jlink +taskkill /F /IM JLinkGDBServer.exe + diff --git a/JLinkGDB_OTA.bat b/JLinkGDB_OTA.bat new file mode 100644 index 0000000..f64317e --- /dev/null +++ b/JLinkGDB_OTA.bat @@ -0,0 +1,15 @@ +@echo off +call paths.bat +@if exist build\bin\ota.bin goto run +echo File 'build\obj\ota.bin' not found! +echo Build project... +mingw32-make.exe -f Makefile all +@if not exist build\bin\ota.bin goto err +:run +start start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 1000 +arm-none-eabi-gdb.exe -x flasher/gdb_ota.jlink +taskkill /F /IM JLinkGDBServer.exe +goto end +:err +echo Error! +:end \ No newline at end of file diff --git a/JLinkOCD-RdFullFlash.bat b/JLinkOCD-RdFullFlash.bat new file mode 100644 index 0000000..4708bea --- /dev/null +++ b/JLinkOCD-RdFullFlash.bat @@ -0,0 +1,7 @@ +@echo off +call paths.bat +cd flasher +openocd -f interface/Jlink.cfg -c "adapter_khz 3500" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "adapter_khz 3900" -c "rtl8710_flash_read ../fullflash.bin 0 1048576" -c "shutdown" +echo flash read fullflash.bin +pause + diff --git a/JLink_RdFullFlash.bat b/JLink_RdFullFlash.bat new file mode 100644 index 0000000..450e141 --- /dev/null +++ b/JLink_RdFullFlash.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +openocd -f interface/Jlink.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "adapter_khz 3500" -c "rtl8710_flash_read_id" -c "rtl8710_flash_read ../fullflash.bin 0 1048576" -c "shutdown" +echo flash read fullflash.bin +pause + diff --git a/JlinkOpenOCD.bat b/JlinkOpenOCD.bat new file mode 100644 index 0000000..6e354f6 --- /dev/null +++ b/JlinkOpenOCD.bat @@ -0,0 +1,4 @@ +@echo off +call paths.bat +taskkill /F /IM openocd.exe +start openocd -f interface\Jlink.cfg -f flasher\ameba1.cfg diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..68a49da --- /dev/null +++ b/LICENSE @@ -0,0 +1,24 @@ +This is free and unencumbered software released into the public domain. + +Anyone is free to copy, modify, publish, use, compile, sell, or +distribute this software, either in source code form or as a compiled +binary, for any purpose, commercial or non-commercial, and by any +means. + +In jurisdictions that recognize copyright laws, the author or authors +of this software dedicate any and all copyright interest in the +software to the public domain. We make this dedication for the benefit +of the public at large and to the detriment of our heirs and +successors. We intend this dedication to be an overt act of +relinquishment in perpetuity of all present and future rights to this +software under copyright law. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR +OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +OTHER DEALINGS IN THE SOFTWARE. + +For more information, please refer to diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..1127b95 --- /dev/null +++ b/Makefile @@ -0,0 +1,59 @@ + +all: ram_all +mp: ram_all_mp + +.PHONY: ram_all +ram_all: + @$(MAKE) -f sdkbuild.mk + @$(MAKE) -f flasher.mk genbin1 genbin23 + +webfs: + @$(MAKE) -f webfs.mk webpages.espfs + +.PHONY: ram_all_mp +ram_all_mp: + @$(MAKE) -f sdkbuild.mk mp + @$(MAKE) -f flasher.mk mp + +.PHONY: clean clean_all +clean: + @$(MAKE) -f sdkbuild.mk clean + @$(MAKE) -f webfs.mk clean + +clean_all: + @$(MAKE) -f sdkbuild.mk clean_all + @$(MAKE) -f webfs.mk clean + +.PHONY: flashburn runram reset test readfullflash flashwebfs +flashburn: + #JLinkGDB-WrFlash.bat + @$(MAKE) -f flasher.mk flashburn + +flash_OTA: + @$(MAKE) -f flasher.mk flash_OTA + +flashwebfs: + @$(MAKE) -f webfs.mk webpages.espfs + @$(MAKE) -f flasher.mk flashwebfs + #JLinkGDB-WrWebFs.bat + +runram: + #JLink-RunRAM.bat + @$(MAKE) --f flasher.mk runram + +reset: + #JLink-Reset.bat + @$(MAKE) -f flasher.mk reset + +test: + JLink-RTL00ConsoleROM.bat + #@make -f flasher.mk test + +readfullflash: + #JLink-RdFullFlash.bat + @$(MAKE) -f flasher.mk readfullflash + +.PHONY: prerequirement +prerequirement: + @$(file >DEPENDENCY_LIST.txt,$(DEPENDENCY_LIST)) + \ No newline at end of file diff --git a/STLink-RdFullFlash.bat b/STLink-RdFullFlash.bat new file mode 100644 index 0000000..af82648 --- /dev/null +++ b/STLink-RdFullFlash.bat @@ -0,0 +1,7 @@ +@echo off +call paths.bat +cd flasher +openocd -f interface/stlink-v2.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "adapter_khz 5000" -c "rtl8710_flash_read ../fullflash.bin 0 1048576" -c "shutdown" +echo flash read fullflash.bin +pause + diff --git a/STLink-Reset.bat b/STLink-Reset.bat new file mode 100644 index 0000000..d4aeb47 --- /dev/null +++ b/STLink-Reset.bat @@ -0,0 +1,6 @@ +@echo off +call paths.bat +@cd flasher +openocd -f interface/stlink-v2.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "cortex_reboot" -c "shutdown" +rem + diff --git a/flasher.mk b/flasher.mk new file mode 100644 index 0000000..4c111ed --- /dev/null +++ b/flasher.mk @@ -0,0 +1,307 @@ +# RTL8710 Flasher v0.0.alfa +# pvvx 21.09.2016 +-include paths.mk +#--------------------------- +#FLASHER = stlink-v2-1 +#FLASHER = stlink-v2 +FLASHER ?= Jlink +JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/ +#--------------------------- +# Default +#--------------------------- +# TARGET dirs +TARGET ?= build +OBJ_DIR ?= build/obj +BIN_DIR ?= build/bin +ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf +#--------------------------- +# Compilation tools +CROSS_COMPILE ?= $(GCC_PATH)arm-none-eabi- +AR ?= $(CROSS_COMPILE)ar +CC ?= $(CROSS_COMPILE)gcc +AS ?= $(CROSS_COMPILE)as +NM ?= $(CROSS_COMPILE)nm +LD ?= $(CROSS_COMPILE)gcc +GDB ?= $(CROSS_COMPILE)gdb +SIZE ?= $(CROSS_COMPILE)size +OBJCOPY ?= $(CROSS_COMPILE)objcopy +OBJDUMP ?= $(CROSS_COMPILE)objdump + +# Make bunary tools +TOOLS_PATH ?= component/soc/realtek/8195a/misc/iar_utility/common/tools/ +ifneq ($(shell uname), Linux) +EXE = .exe +endif +PICK = $(TOOLS_PATH)pick$(EXE) +PADDING = $(TOOLS_PATH)padding$(EXE) +CHCKSUM = $(TOOLS_PATH)checksum$(EXE) + +# openocd tools +OPENOCD = $(OPENOCD_PATH)openocd + +JLINK_GDB ?= JLinkGDBServer.exe +JLINK_EXE ?= JLink.exe + +ifeq ($(FLASHER), Jlink) +# Jlink FLASHER_SPEED ..4000 kHz +FLASHER_SPEED = 3500 +else +ifeq ($(FLASHER),stlink-v2) +# stlink-v2 FLASHER_SPEED ..1800 kHz +FLASHER_SPEED = 1800 +else +# over FLASHER_SPEED ..500 kHz ? +FLASHER_SPEED = 500 +endif +endif + +# COMPILED_BOOT if defined -> extract image1, boot head in elf +COMPILED_BOOT=1 +# COMPILED_BOOT_BIN if !defined -> use source startup boot +#COMPILED_BOOT_BIN=1 +# PADDINGSIZE defined -> image2 OTA +PADDINGSIZE =44k + +NMAPFILE = $(OBJ_DIR)/$(TARGET).nmap + +#FLASHER_PATH ?= flasher/ + +#RAM_IMAGE?= $(BIN_DIR)/ram.bin + +RAM1_IMAGE ?= $(BIN_DIR)/ram_1.bin +RAM1P_IMAGE ?= $(BIN_DIR)/ram_1.p.bin +RAM1R_IMAGE ?= $(BIN_DIR)/ram_1.r.bin + +RAM2_IMAGE = $(BIN_DIR)/ram_2.bin +RAM2P_IMAGE = $(BIN_DIR)/ram_2.p.bin +RAM2NS_IMAGE = $(BIN_DIR)/ram_2.ns.bin + +RAM3_IMAGE = $(BIN_DIR)/sdram.bin +RAM3P_IMAGE = $(BIN_DIR)/sdram.p.bin + +FLASH_IMAGE = $(BIN_DIR)/ram_all.bin +OTA_IMAGE = $(BIN_DIR)/ota.bin + +#all: FLASH_IMAGE = $(BIN_DIR)/ram_all.bin +#all: OTA_IMAGE = $(BIN_DIR)/ota.bin +mp: FLASH_IMAGE = $(BIN_DIR)/ram_all_mp.bin +mp: OTA_IMAGE = $(BIN_DIR)/ota_mp.bin + +TST_IMAGE = $(BIN_DIR)/ram_2.bin + +.PHONY: genbin1 genbin23 flashburn reset test readfullflash flashwebfs flash_OTA +.NOTPARALLEL: all mp genbin1 genbin23 flashburn reset test readfullflash _endgenbin flashwebfs flash_OTA + +all: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin +mp: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin + +genbin1: $(ELFFILE) $(RAM1P_IMAGE) + +genbin23: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin + + +_endgenbin: + @echo "-----------------------------------------------------------" + @echo "Image ($(OTA_IMAGE)) size $(shell printf '%d\n' $$(( $$(stat --printf="%s" $(OTA_IMAGE)) )) ) bytes" + @echo "Image ($(FLASH_IMAGE)) size $(shell printf '%d\n' $$(( $$(stat --printf="%s" $(FLASH_IMAGE)) )) ) bytes" + @echo "===========================================================" + +ifeq ($(FLASHER_TYPE), Jlink) + +reset: + @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_Reset.JLinkScript + +runram: + @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM.JLinkScript + +readfullflash: + @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_FFlash.JLinkScript + + +flashburn: + @echo define call1>$(FLASHER_PATH)flash_file.jlink + @echo SetFirwareSize build/bin/ram_all.bin>>$(FLASHER_PATH)flash_file.jlink + @echo end>>$(FLASHER_PATH)flash_file.jlink + @echo define call2>>$(FLASHER_PATH)flash_file.jlink + @echo FlasherWrite build/bin/ram_all.bin 0 '$$'Image1Size>>$(FLASHER_PATH)flash_file.jlink + @echo end>>$(FLASHER_PATH)flash_file.jlink + @echo define call3>>$(FLASHER_PATH)flash_file.jlink + @echo FlasherWrite build/bin/ram_all.bin '$$'Image2Addr '$$'Image2Size>>$(FLASHER_PATH)flash_file.jlink + @echo end>>$(FLASHER_PATH)flash_file.jlink + @cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000 + @$(GDB) -x $(FLASHER_PATH)gdb_wrflash.jlink + #@taskkill /F /IM $(JLINK_GDBSRV) + +flashwebfs: + @echo define call1>$(FLASHER_PATH)file_info.jlink + @echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/webpages.espfs))>>$(FLASHER_PATH)file_info.jlink + @echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink + @echo end>>$(FLASHER_PATH)file_info.jlink + @echo define call2>>$(FLASHER_PATH)file_info.jlink + @echo FlasherWrite $(BIN_DIR)/webpages.espfs '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink + @echo end>>$(FLASHER_PATH)file_info.jlink + @cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000 + @$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink + #@taskkill /F /IM $(JLINK_GDBSRV) + +flash_OTA: + @cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000 + @$(GDB) -x $(FLASHER_PATH)gdb_ota.jlink + #@taskkill /F /IM $(JLINK_GDBSRV) + +else + +flashburn: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ + -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ + -c "rtl8710_flash_write $(RAM1P_IMAGE) 0" \ + -c "rtl8710_flash_write $(RAM2P_IMAGE) 0xb000" \ + -c "rtl8710_reboot" -c "reset run" -c shutdown + +flashimage2p: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ + -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ + -c "rtl8710_flash_write $(RAM2P_IMAGE) 0xb000" \ + -c "rtl8710_reboot" -c "reset run" -c shutdown + +flashwebfs: + @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ + -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \ + -c "rtl8710_flash_write $(BIN_DIR)/webpages.espfs 0xd0000" \ + -c "rtl8710_reboot" -c "reset run" -c shutdown + + +reset: +# @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) flasher/RTLreset.JLinkScript + @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ + -c "rtl8710_reboot" -c shutdown + +runram: +# @$(JLINK_PATH)$(JLINK_GDB) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED) +# @$(GDB) -x flasher/gdb_run_ram.jlink +# @taskkill.exe -F -IM $(JLINK_GDB) + @$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \ + -c "load_image $(RAM1R_IMAGE) 0x10000bc8 bin" \ + -c "load_image $(RAM2_IMAGE) 0x10006000 bin" \ + -c "mww 0x40000210 0x20200113" \ + -c "reset run" -c shutdown + +endif + +$(NMAPFILE): $(ELFFILE) + @echo "===========================================================" + @echo "Build names map file" + @echo $@ + @$(NM) $< | sort > $@ +# @echo "===========================================================" + +$(FLASH_IMAGE): $(RAM1P_IMAGE) $(RAM2P_IMAGE) $(RAM3P_IMAGE) + @echo "===========================================================" + @echo "Make Flash image ($(FLASH_IMAGE))" +# @echo "===========================================================" + @mkdir -p $(BIN_DIR) + @rm -f $(FLASH_IMAGE) + @cat $(RAM1P_IMAGE) > $(FLASH_IMAGE) +# @chmod 777 $(FLASH_IMAGE) +ifdef PADDINGSIZE + @$(PADDING) $(PADDINGSIZE) 0xFF $(FLASH_IMAGE) +endif + @cat $(RAM2P_IMAGE) >> $(FLASH_IMAGE) + @cat $(RAM3P_IMAGE) >> $(FLASH_IMAGE) +# @echo "Image ($(FLASH_IMAGE)) size $(shell printf '%d\n' $$(( $$(stat --printf="%s" $(FLASH_IMAGE)) )) ) bytes" +# @echo "===========================================================" +# @rm $(BIN_DIR)/ram_*.p.bin + +$(OTA_IMAGE): $(RAM2NS_IMAGE) $(RAM3_IMAGE) + @echo "===========================================================" + @echo "Make OTA image ($(OTA_IMAGE))" + @rm -f $(OTA_IMAGE) + @cat $(RAM2NS_IMAGE) > $(OTA_IMAGE) + @cat $(RAM3P_IMAGE) >> $(OTA_IMAGE) +# @chmod 777 $(OTA_IMAGE) + @$(CHCKSUM) $(OTA_IMAGE) || true +# @echo "===========================================================" + +$(RAM1P_IMAGE): $(ELFFILE) $(NMAPFILE) + @echo "===========================================================" + @echo "Create image1r ($(RAM1R_IMAGE))" +# @echo "===========================================================" .bootloader +ifdef COMPILED_BOOT + @mkdir -p $(BIN_DIR) + @rm -f $(RAM1_IMAGE) $(RAM1R_IMAGE) +ifdef COMPILED_BOOT_BIN + @$(eval RAM1_START_ADDR := $(shell grep _binary_build_bin_ram_1_r_bin_start $(NMAPFILE) | awk '{print $$1}')) + @$(eval RAM1_END_ADDR := $(shell grep _binary_build_bin_ram_1_r_bin_end $(NMAPFILE) | awk '{print $$1}')) +else + @$(eval RAM1_START_ADDR := $(shell grep __ram_image1_text_start__ $(NMAPFILE) | awk '{print $$1}')) + @$(eval RAM1_END_ADDR := $(shell grep __ram_image1_text_end__ $(NMAPFILE) | awk '{print $$1}')) +endif + $(if $(RAM1_START_ADDR),,$(error "Not found __ram_image1_text_start__!")) + $(if $(RAM1_END_ADDR),,$(error "Not found __ram_image1_text_end__!")) +ifeq ($(RAM1_START_ADDR),$(RAM1_END_ADDR)) +ifdef COMPILED_BOOT_BIN + $(OBJCOPY) --change-section-address .boot.head=0x10000ba8 -j .boot.head -j .bootloader -Obinary $(ELFFILE) $(RAM1P_IMAGE) +else +# $(OBJCOPY) -j .rom_ram -Obinary $(ELFFILE) $(RAM_IMAGE) + $(OBJCOPY) -j .ram.start.table -j .ram_image1.text -Obinary $(ELFFILE) $(RAM1R_IMAGE) + $(PICK) 0x$(RAM1_START_ADDR) 0x$(RAM1_END_ADDR) $(RAM1R_IMAGE) $(RAM1P_IMAGE) head+reset_offset 0x0B000 +endif +else + $(error "BOOT-image size = 0") +# $(error Flasher: COMPILE_BOOT = No) +endif +else + @if [ -s $(RAM1R_IMAGE) ]; then echo "Use external $(RAM1R_IMAGE)!"; fi +endif + +$(RAM2P_IMAGE): $(ELFFILE) $(NMAPFILE) + @echo "===========================================================" + @echo "Create image2p ($(RAM2P_IMAGE))" +# @echo "===========================================================" + @mkdir -p $(BIN_DIR) + @rm -f $(RAM2_IMAGE) $(RAM2P_IMAGE) + @$(eval RAM2_START_ADDR = $(shell grep __ram_image2_text $(NMAPFILE) | grep _start__ | awk '{print $$1}')) + @$(eval RAM2_END_ADDR = $(shell grep __ram_image2_text $(NMAPFILE) | grep _end__ | awk '{print $$1}')) + $(if $(RAM2_START_ADDR),,$(error "Not found __ram_image2_text_start__!")) + $(if $(RAM2_END_ADDR),,$(error "Not found __ram_image2_text_end__!")) + @$(OBJCOPY) -j .image2.start.table -j .ram_image2.text -j .ram_image2.rodata -j .ram.data -Obinary $(ELFFILE) $(RAM2_IMAGE) + @$(PICK) 0x$(RAM2_START_ADDR) 0x$(RAM2_END_ADDR) $(RAM2_IMAGE) $(RAM2P_IMAGE) body+reset_offset+sig + +$(RAM2NS_IMAGE):$(ELFFILE) $(NMAPFILE) + @echo "===========================================================" + @echo "Create image2ns ($(RAM2NS_IMAGE))" +# @echo "===========================================================" + mkdir -p $(BIN_DIR) + rm -f $(RAM2_IMAGE) $(RAM2NS_IMAGE) + $(eval RAM2_START_ADDR = $(shell grep __ram_image2_text $(NMAPFILE) | grep _start__ | awk '{print $$1}')) + $(eval RAM2_END_ADDR = $(shell grep __ram_image2_text $(NMAPFILE) | grep _end__ | awk '{print $$1}')) + $(if $(RAM2_START_ADDR),,$(error "Not found __ram_image2_text_start__!")) + $(if $(RAM2_END_ADDR),,$(error "Not found __ram_image2_text_end__!")) + $(OBJCOPY) -j .image2.start.table -j .ram_image2.text -j .ram_image2.rodata -j .ram.data -Obinary $(ELFFILE) $(RAM2_IMAGE) + $(PICK) 0x$(RAM2_START_ADDR) 0x$(RAM2_END_ADDR) $(RAM2_IMAGE) $(RAM2NS_IMAGE) body+reset_offset + +$(RAM3_IMAGE): $(ELFFILE) $(NMAPFILE) + @echo "===========================================================" + @echo "Create image3 (SDRAM, $(RAM3P_IMAGE))" +# @echo "===========================================================" + @mkdir -p $(BIN_DIR) + @rm -f $(RAM3_IMAGE) $(RAM3P_IMAGE) + @$(eval RAM3_START_ADDR = $(shell grep __sdram_data_ $(NMAPFILE) | grep _start__ | awk '{print $$1}')) + @$(eval RAM3_END_ADDR = $(shell grep __sdram_data_ $(NMAPFILE) | grep _end__ | awk '{print $$1}')) + $(if $(RAM3_START_ADDR),,$(error "Not found __sdram_data_start__!")) + $(if $(RAM3_END_ADDR),,$(error "Not found __sdram_data_end__!")) +#ifneq ($(RAM3_START_ADDR),$(RAM3_END_ADDR)) + @echo $(RAM3_START_ADDR) $(RAM3_END_ADDR) + @$(OBJCOPY) -j .image3 -j .sdr_text -j .sdr_rodata -j .sdr_data -Obinary $(ELFFILE) $(RAM3_IMAGE) + $(PICK) 0x$(RAM3_START_ADDR) 0x$(RAM3_END_ADDR) $(RAM3_IMAGE) $(RAM3P_IMAGE) body+reset_offset +#else +# @rm -f $(RAM3_IMAGE) $(RAM3P_IMAGE) +# @echo "SDRAM not used (size = 0)" +#endif + +$(ELFFILE): + $(error Falsher: file $@ not found) + +clean: + @rm -f $(BIN_DIR)/*.bin + \ No newline at end of file diff --git a/flasher/RTL00ConsoleROM.JLinkScript b/flasher/RTL00ConsoleROM.JLinkScript new file mode 100644 index 0000000..5b85200 --- /dev/null +++ b/flasher/RTL00ConsoleROM.JLinkScript @@ -0,0 +1,6 @@ +h +loadbin flasher/RTL00Console_ROM.bin 0x10000ba8 +r +w4 0x40000210,0x4011117 +g +q \ No newline at end of file diff --git a/flasher/RTL00Console_ROM.bin b/flasher/RTL00Console_ROM.bin new file mode 100644 index 0000000000000000000000000000000000000000..e83cb165765b0706201fe3e2eb5bfcbadaf693d5 GIT binary patch literal 600 zcmbO^bJ{ffGiiSg7@uK&ddD!yf{B6Q1UG|#4#R&icnM^G1!6`X1_53mmIPwuO0f=* zBuFjCRt5zI?-}l@Kyi+(j7V%IBsMb=n+48p-pb;pu#?e^QR#+)8qkbnIVNrX8-?4L z6jXpb6>t9!|Ba*)ls%MzJQz;grtGWertIPWp}}Q^yJA*S*5a%OSqu~8J%GIIr0m7n z53(61$O3s+etZy=@woEii{h0ZKMYs6OLjhL1^~0Mt#SYW literal 0 HcmV?d00001 diff --git a/flasher/RTL8710.jflash b/flasher/RTL8710.jflash new file mode 100644 index 0000000..a5d0547 --- /dev/null +++ b/flasher/RTL8710.jflash @@ -0,0 +1,119 @@ + AppVersion = 47812 +[GENERAL] + ConnectMode = 0 + CurrentFile = "fullflash.bin" + DataFileSAddr = 0x98000000 + GUIMode = 0 + HostName = "" + TargetIF = 1 + USBPort = 0 + USBSerialNo = 0x00000000 +[JTAG] + IRLen = 0 + MultipleTargets = 0 + NumDevices = 0 + Speed0 = 400 + Speed1 = 12000 + TAP_Number = 0 + UseAdaptive0 = 0 + UseAdaptive1 = 0 + UseMaxSpeed0 = 0 + UseMaxSpeed1 = 0 +[CPU] + CheckCoreID = 0 + ChipName = "RTL8710AF" + ClockSpeed = 0x00000000 + Core = 0x030000FF + CoreID = 0x00000000 + CoreIDMask = 0x0F000FFF + DeviceFamily = 0x00000003 + EndianMode = 0 + HasInternalFlash = 0 + InitStep0_Action = "Reset" + InitStep0_Comment = "Reset and Halt" + InitStep0_Value0 = 0x00000000 + InitStep0_Value1 = 0x00000005 + InitStep1_Action = "Go" + InitStep1_Comment = "" + InitStep1_Value0 = 0x00000000 + InitStep1_Value1 = 0x00000000 + InitStep2_Action = "Reset" + InitStep2_Comment = "Reset and halt target" + InitStep2_Value0 = 0x00000000 + InitStep2_Value1 = 0x00000005 + InitStep3_Action = "Write Register" + InitStep3_Comment = "Only T=1" + InitStep3_Value0 = 0x00000010 + InitStep3_Value1 = 0x01000000 + InitStep4_Action = "Write 32bit" + InitStep4_Comment = "Setup SystemCoreClock" + InitStep4_Value0 = 0x40000014 + InitStep4_Value1 = 0x00000001 + InitStep5_Action = "Delay" + InitStep5_Comment = "" + InitStep5_Value0 = 0x00000000 + InitStep5_Value1 = 0x00000005 + InitStep6_Action = "Write 32bit" + InitStep6_Comment = "Write Page Size" + InitStep6_Value0 = 0x1FFFFFF0 + InitStep6_Value1 = 0x00000100 + InitStep7_Action = "Write 32bit" + InitStep7_Comment = "Write Sector Size" + InitStep7_Value0 = 0x1FFFFFF4 + InitStep7_Value1 = 0x00001000 + InitStep8_Action = "Write 32bit" + InitStep8_Comment = "Write Block Size" + InitStep8_Value0 = 0x1FFFFFF8 + InitStep8_Value1 = 0x00010000 + InitStep9_Action = "Write 32bit" + InitStep9_Comment = "Write Block Count" + InitStep9_Value0 = 0x1FFFFFFC + InitStep9_Value1 = 0x00000010 + NumExitSteps = 0 + NumInitSteps = 10 + RAMAddr = 0x10000000 + RAMSize = 0x00010000 + ScriptFile = "" + UseAutoSpeed = 0x00000001 + UseRAM = 1 + UseScriptFile = 0 +[FLASH] + aSectorSel[0] = + AutoDetect = 1 + BankName = "" + BankSelMode = 1 + BaseAddr = 0x98000000 + CheckId = 3 + CustomRAMCode = "RTL8710AF.hex" + DeviceName = "Auto detected flash memory" + EndBank = 8191 + NumBanks = 1 + OrgNumBits = 16 + OrgNumChips = 1 + StartBank = 0 + UseCustomRAMCode = 1 +[PRODUCTION] + AutoPerformsErase = 1 + AutoPerformsHardLock = 0 + AutoPerformsHardUnlock = 0 + AutoPerformsProgram = 1 + AutoPerformsSecure = 0 + AutoPerformsSoftLock = 0 + AutoPerformsSoftUnlock = 1 + AutoPerformsStartApp = 0 + AutoPerformsUnsecure = 0 + AutoPerformsVerify = 1 + EnableProductionMode = 0 + EnableTargetPower = 0 + EraseType = 2 + ProductionDelay = 0x000001F4 + ProductionThreshold = 0x00000BB8 + ProgramSN = 0 + SerialFile = "" + SNAddr = 0x00000000 + SNInc = 0x00000001 + SNLen = 0x00000004 + SNListFile = "" + SNValue = 0x00000001 + TargetPowerDelay = 0x00000014 + VerifyType = 1 diff --git a/flasher/RTL8710AF.hex b/flasher/RTL8710AF.hex new file mode 100644 index 0000000..fd2dc4c --- /dev/null +++ b/flasher/RTL8710AF.hex @@ -0,0 +1,130 @@ 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+1,17 @@ +h +r +w4 0x40000230,0x0000D3C4 +w4 0x40000210,0x00200113 +w4 0x400002C0,0x00110001 +w4 0x40006008,0 +w4 0x4000602C,0 +w4 0x40006010,1 +w4 0x40006014,2 +w4 0x40006018,0 +w4 0x4000601C,0 +w4 0x4000604C,0 +savebin fullflash.bin 0x98000000 0x100000 +w4 0x40000210,0x211157 +r +g +q \ No newline at end of file diff --git a/flasher/RTL_Reset.JLinkScript b/flasher/RTL_Reset.JLinkScript new file mode 100644 index 0000000..196d12a --- /dev/null +++ b/flasher/RTL_Reset.JLinkScript @@ -0,0 +1,9 @@ +r0 +trst0 +r1 +trst1 +h +r +w4 0x40000210,0x111157 +g +q \ No newline at end of file diff --git a/flasher/RTL_RunRAM.JLinkScript b/flasher/RTL_RunRAM.JLinkScript new file mode 100644 index 0000000..5991456 --- /dev/null +++ b/flasher/RTL_RunRAM.JLinkScript @@ -0,0 +1,12 @@ +r0 +trst0 +r1 +trst1 +h +r +loadbin build/bin/ram_1.r.bin 0x10000bc8 +loadbin build/bin/ram_2.bin 0x10006000 +r +w4 0x40000210,0x20111157 +g +q \ No newline at end of file diff --git a/flasher/ameba1.cfg b/flasher/ameba1.cfg new file mode 100644 index 0000000..f3ee2db --- /dev/null +++ b/flasher/ameba1.cfg @@ -0,0 +1,124 @@ +# Main file for Ameba1 series Cortex-M3 parts +# +# !!!!!! +# + +set CHIPNAME rtl8195a +set CHIPSERIES ameba1 + +# Adapt based on what transport is active. +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + error "CHIPNAME not set. Please do not include ameba1.cfg directly." +} + +if { [info exists CHIPSERIES] } { + # Validate chip series is supported + if { $CHIPSERIES != "ameba1" } { + error "Unsupported chip series specified." + } + set _CHIPSERIES $CHIPSERIES +} else { + error "CHIPSERIES not set. Please do not include ameba1.cfg directly." +} + +if { [info exists CPUTAPID] } { + # Allow user override + set _CPUTAPID $CPUTAPID +} else { + # Ameba1 use a Cortex M3 core. + if { $_CHIPSERIES == "ameba1" } { + if { [using_jtag] } { + set _CPUTAPID 0x4ba00477 + } { + set _CPUTAPID 0x2ba01477 + } + } +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME + + +# Run with *real slow* clock by default since the +# boot rom could have been playing with the PLL, so +# we have no idea what clock the target is running at. +adapter_khz 1000 + +# delays on reset lines +adapter_nsrst_delay 200 +if {[using_jtag]} { + jtag_ntrst_delay 200 +} + + +# Ameba1 (Cortex M3 core) support SYSRESETREQ +if {![using_hla]} { + # if srst is not fitted use SYSRESETREQ to + # perform a soft reset + cortex_m reset_config sysresetreq +} + +$_TARGETNAME configure -event reset-init {ameba1_init} + +# Ameba1 SDRAM enable +proc ameba1_init { } { + # init System + mww 0x40000014 0x00000021 + sleep 10 + mww 0x40000304 0x1fc00002 + sleep 10 + mww 0x40000250 0x00000400 + sleep 10 + mww 0x40000340 0x00000000 + sleep 10 + mww 0x40000230 0x0000dcc4 + sleep 10 + mww 0x40000210 0x00011117 + sleep 10 + mww 0x40000210 0x00011157 + sleep 10 + mww 0x400002c0 0x00110011 + sleep 10 + mww 0x40000320 0xffffffff + sleep 10 + # init SDRAM + mww 0x40000040 0x00fcc702 + sleep 10 + mdw 0x40000040 + mww 0x40005224 0x00000001 + sleep 10 + mww 0x40005004 0x00000208 + sleep 10 + mww 0x40005008 0xffffd000 + sleep 13 + mww 0x40005020 0x00000022 + sleep 13 + mww 0x40005010 0x09006201 + sleep 13 + mww 0x40005014 0x00002611 + sleep 13 + mww 0x40005018 0x00068413 + sleep 13 + mww 0x4000501c 0x00000042 + sleep 13 + mww 0x4000500c 0x700 ;# set Idle + sleep 20 + mww 0x40005000 0x1 ;# start init + sleep 100 + mdw 0x40005000 + mww 0x4000500c 0x600 ;# enter memory mode + sleep 30 + + mww 0x40005008 0x00000000 ;# 0xf00 + ;# mww 0x40005008 0x00000f00 + sleep 3 + mww 0x40000300 0x0006005e ;# 0x5e + ;# mww 0x40000300 0x0000005e + sleep 3 +} diff --git a/flasher/cortex.ocd b/flasher/cortex.ocd new file mode 100644 index 0000000..b0cdf18 --- /dev/null +++ b/flasher/cortex.ocd @@ -0,0 +1,99 @@ +proc cortex_bootstrap {start} { + # disable interrupts + reg faultmask 0x01 + set vectors "" + mem2array vectors 32 $start 2 + reg sp $vectors(0) + reg pc $vectors(1) + resume +} + +proc cortex_reboot {} { + set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000210 ] ] ] +# set aaa [ format "0x%08x" [ expr 0x40000210 ] ] + echo "CLK_CTRL1 = $ddd" +# echo "# Set processor clock to default before system reset" + set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000014 ] ] ] +# set aaa [ format "0x%08x" [ expr 0x40000014 ] ] + echo "SOC_FUNC_EN = $ddd" +# mww 0x40000014 0x00000021 + sleep 10 + echo "# Reboot (system reset)" + mww 0xE000ED0C 0x05FA0007 +} + +proc init_system {} { +# Set processor clock to default before system reset +# CLK_CTRL1 +# mww 0x40000014 0x00000011 + mww 0x40000014 0x00000021 + sleep 10 +# PESOC_SOC_CTRL +# mww 0x40000304 0x1fc00001 + mww 0x40000304 0x1fc00002 + sleep 10 +# PESOC_CLK_SEL + mww 0x40000250 0x00000400 + sleep 10 +# GPIO_PULL_CTRL4 + mww 0x40000340 0x00000000 + sleep 10 +# PESOC_CLK_CTRL +# mww 0x40000230 0x0000d3c4 + mww 0x40000230 0x0000dcc4 + sleep 10 +# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE +# mww 0x40000210 0x00211117 + mww 0x40000210 0x00011117 + sleep 10 +# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE + MEM_CTRL + mww 0x40000210 0x00011157 + sleep 10 +# CPU_PERIPHERAL_CTRL SPI_FLASH_PIN_EN|SDR_PIN_EN|SWD_PIN_EN|LOG_UART_PIN_EN ? +# mww 0x400002c0 0x00110000 + mww 0x400002c0 0x00110011 + sleep 10 +# GPIO_SHTDN_CTRL +# mww 0x40000320 0x00000033 + mww 0x40000320 0xffffffff + sleep 10 + + mww 0x40005008 0x00000000 + sleep 10 +# PESOC_MEM_CTRL + mww 0x40000300 0x0006005e + sleep 10 + + # set baudrate to 38400 +# mww 0x40003010 0x00000080 +# mww 0x40003008 0x00000022 +# mww 0x4000300C 0x00000000 +# mww 0x40003010 0x00000000 +} + +proc boot_from_flash {} { + echo "# skip sdram init, it has been init in openocd config" + mww 0x40000210 0x211157 +} + +proc boot_from_ram {} { + echo "# boot from ram, igonore loading flash" + mww 0x40000210 0x8011157 +} + +proc restart_from_falsh {} { + init + init_system + boot_from_flash + cortex_reboot +} + +proc load_ram_binary { local_filename address } { +# set address 0x10000BC8 + init + reset halt + set size [file size $local_filename] + load_image $local_filename $address bin $address $size + boot_from_ram + resume +} diff --git a/flasher/flash_file.jlink b/flasher/flash_file.jlink new file mode 100644 index 0000000..83b04c0 --- /dev/null +++ b/flasher/flash_file.jlink @@ -0,0 +1,9 @@ +define call1 +SetFirwareSize build/bin/ram_all.bin +end +define call2 +FlasherWrite build/bin/ram_all.bin 0 $Image1Size +end +define call3 +FlasherWrite build/bin/ram_all.bin $Image2Addr $Image2Size +end diff --git a/flasher/gdb_flasher.jlink b/flasher/gdb_flasher.jlink new file mode 100644 index 0000000..f3aa851 --- /dev/null +++ b/flasher/gdb_flasher.jlink @@ -0,0 +1,198 @@ +#################################### +# J-LINK GDB SERVER initialization # +#################################### +define InitJlink +printf "Jlink Init:\n" +set verbose off +set complaints 0 +set confirm off +set exec-done-display off +show exec-done-display +set trace-commands off +#set debug aix-thread off +#set debug dwarf2-die 0 +set debug displaced off +set debug expression 0 +set debug frame 0 +set debug infrun 0 +set debug observer 0 +set debug overload 0 +#set debugvarobj 0 +set pagination off +set print address off +set print symbol-filename off +set print symbol off +set print pretty off +set print object off +#set debug notification off +set debug parser off +set debug remote 0 +target remote localhost:2331 +set remotetimeout 10000 +monitor device Cortex-M3 +monitor endian little +monitor reset +# Set max speed +monitor speed 4000 +set mem inaccessible-by-default off +# Setup GDB FOR FASTER DOWNLOADS +set remote memory-write-packet-size 8192 +set remote memory-write-packet-size fixed +end +############# +# Boot_Flash +define SetBootFlash +printf "SetBoot = Flash:\n" +monitor long 0x40000210 = 0x211157 +end +# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) +define SetBootCall0 +printf "SetBoot = Call0:\n" +monitor long 0x40000210 = 0x80111157 +end +# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) +define SetBootCall1 +printf "SetBoot = Call1:\n" +monitor long 0x40000210 = 0x20111157 +end +# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) +define SetBootCall2 +printf "SetBoot = Call2:\n" +monitor long 0x40000210 = 0x10111157 +end +# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) +define SetBootCall3 +printf "SetBoot = Call3:\n" +monitor long 0x40000210 = 0x8111157 +end +# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) +define SetBootCall4 +printf "SetBoot = Call4:\n" +monitor long 0x40000210 = 0x4111157 +end +# CPU CLK 166 MHz? +define SetClk166MHz +printf "SetCLK 166.66MHz:\n" +monitor long 0x40000014 = 0x00000011 +end +# CPU CLK 83 MHz? +define SetClk83MHz +printf "SetCLK 83.33MHz:\n" +monitor long 0x40000014 = 0x00000021 +end +############### +# System Init # +############### +define SystemInit +printf "System Init:\n" +monitor long 0x40000304 = 0x1FC00002 +monitor long 0x40000250 = 0x400 +monitor long 0x40000340 = 0x0 +monitor long 0x40000230 = 0xdcc4 +monitor long 0x40000210 = 0x11117 +monitor long 0x40000210 = 0x11157 +monitor long 0x400002c0 = 0x110011 +monitor long 0x40000320 = 0xffffffff +end +############ +# SPI Init # +############ +define SPI_Init +printf "Init SPI:\n" +#enable spi flash peripheral clock +set $Temp = {int}(0x40000230) +set $Temp = ($Temp | 0x300) +set {int}(0x40000230) = $Temp +#enable spi flash peripheral +set $Temp = {int}(0x40000210) +set $Temp = ($Temp | 0x10) +set {int}(0x40000210) = $Temp +#select spi flash pinout (0 - internal), enable spi flash pins +set $Temp = {int}(0x400002C0) +set $Temp = (($Temp & 0xFFFFFFF8) | 1) +set {int}(0x400002C0) = $Temp +#disable SPI FLASH operation +monitor long 0x40006008 = 0 +#disable all interrupts +monitor long 0x4000602C = 0 +#use first "slave select" pin +monitor long 0x40006010 = 1 +#baud rate, default value +monitor long 0x40006014 = 2 +#tx fifo threshold +monitor long 0x40006018 = 0 +#rx fifo threshold +monitor long 0x4000601C = 0 +#disable DMA +monitor long 0x4000604C = 0 +set $SPI_FLASH_BASE = 0x98000000 +end +################### +# SetFirwareSize # +################### +define SetFirwareSize +set $rambuffer = 0x10000300 +printf "Get ImagesSize:\n" +restore $arg0 binary $rambuffer 0 0x20 +set $Image1Size = {int}($rambuffer+0x10) + 32 +set $Image1LoadAddr = {int}($rambuffer+0x14) +set $Image2Addr = {short}($rambuffer+0x18) * 1024 +if $Image1Size != 0 && $Image1Size < 0x1000000 + if $Image2Addr == 0 + set $Image2Addr = $Image1Size + end + printf "Image1Size = %d\n", $Image1Size + printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr + printf "Image2FlashAddr = 0x%08x\n", $Image2Addr + set $parms1 = $rambuffer - $Image2Addr + set $parms3 = $Image2Addr + 0x08 + restore $arg0 binary $parms1 $Image2Addr $parms3 + set $Image2Size = {int}($rambuffer) + set $Image2LoadAddr = {int}($rambuffer+0x4) + if $Image2Size != 0xFFFFFFFF && $Image2Size != 0 + set $Image2Size = $Image2Size + 16 + printf "Image2Size = %d\n", $Image2Size + printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr + set $FirmwareSize = $Image2Addr + $Image2Size + printf "FirmwareSize = %d\n", $FirmwareSize + else + set $Image2Size = 0 + printf "Image2 - None\n" + set $FirmwareSize = $Image1Size + printf "FirmwareSize = %d\n", $FirmwareSize + end +else + set $Image1Size = 0 + set $Image2Size = 0 + set $Image2Addr = 0 + set $FirmwareSize = 0 + printf "Image not format Firmware!\n" +end +end +##################### +# Flash Images Info # +##################### +define FlashImagesInfo +printf "Flash Info:\n" +set $Image1Size = {int}($SPI_FLASH_BASE + 0x10) + 32 +set $Image1LoadAddr = {int}($SPI_FLASH_BASE + 0x14) +if $Image1LoadAddr == 0xFFFFFFFF +printf "Image1 - None\n" +else +set $Image2FlashAddr = {short}($SPI_FLASH_BASE + 0x18) * 1024 +if $Image2FlashAddr == 0 +$Image2FlashAddr = $Image1Size +end +set $Image2Size = {int}($Image2FlashAddr + $SPI_FLASH_BASE) +set $Image2LoadAddr = {int}($Image2FlashAddr + $SPI_FLASH_BASE + 0x4) +printf "Image1Size = %d\n", $Image1Size +printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr +printf "Image2FlashAddr = 0x%08x\n", $Image2FlashAddr +if $Image2Size != 0xFFFFFFFF +printf "Image2Size = %d\n", $Image2Size +printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr +else +printf "Image2 - None\n" +end +end +end diff --git a/flasher/gdb_init.jlink b/flasher/gdb_init.jlink new file mode 100644 index 0000000..0ffc247 --- /dev/null +++ b/flasher/gdb_init.jlink @@ -0,0 +1,30 @@ +# +# J-LINK GDB SERVER initialization +# +target remote localhost:2331 +set remotetimeout 10000 +monitor device Cortex-M3 +monitor endian little +monitor reset +# Set max speed +monitor speed 4000 +set mem inaccessible-by-default off +# Setup GDB FOR FASTER DOWNLOADS +#set remote memory-write-packet-size 4096 +#set remote memory-write-packet-size fixed +# Boot Flash +monitor long 0x40000210 = 0x211157 +# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) +#monitor long 0x40000210 = 0x80011117 +# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) +#monitor long 0x40000210 = 0x20011117 +# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) +#monitor long 0x40000210 = 0x10011117 +# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) +#monitor long 0x40000210 = 0x8011117 +# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) +monitor long 0x40000210 = 0x4011117 +# CPU CLK 166 MHz? +# monitor long 0x40000014 = 0x00000011 +# CPU CLK 83 MHz? +#monitor long 0x40000014 = 0x00000021 diff --git a/flasher/gdb_ota.jlink b/flasher/gdb_ota.jlink new file mode 100644 index 0000000..9ed1306 --- /dev/null +++ b/flasher/gdb_ota.jlink @@ -0,0 +1,374 @@ +#################################### +# J-LINK GDB SERVER initialization # +#################################### +define InitJlink +printf "Jlink Init:\n" +set verbose off +set complaints 0 +set confirm off +set exec-done-display off +show exec-done-display +set trace-commands off +#set debug aix-thread off +#set debug dwarf2-die 0 +set debug displaced off +set debug expression 0 +set debug frame 0 +set debug infrun 0 +set debug observer 0 +set debug overload 0 +#set debugvarobj 0 +set pagination off +set print address off +set print symbol-filename off +set print symbol off +set print pretty off +set print object off +#set debug notification off +set debug parser off +set debug remote 0 +target remote localhost:2331 +set remotetimeout 10000 +monitor device Cortex-M3 +monitor endian little +monitor reset +# Set max speed +monitor speed 4000 +set mem inaccessible-by-default off +# Setup GDB FOR FASTER DOWNLOADS +set remote memory-write-packet-size 8192 +set remote memory-write-packet-size fixed +end +############# +# Boot_Flash +define SetBootFlash +printf "SetBoot = Flash:\n" +monitor long 0x40000210 = 0x211157 +end +# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) +define SetBootCall0 +printf "SetBoot = Call0:\n" +monitor long 0x40000210 = 0x80011117 +end +# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 ) +define SetBootCall1 +printf "SetBoot = Call1:\n" +monitor long 0x40000210 = 0x20011117 +end +# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 ) +define SetBootCall2 +printf "SetBoot = Call2:\n" +monitor long 0x40000210 = 0x10011117 +end +# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) +define SetBootCall3 +printf "SetBoot = Call3:\n" +monitor long 0x40000210 = 0x8011117 +end +# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 ) +define SetBootCall4 +printf "SetBoot = Call4:\n" +monitor long 0x40000210 = 0x4011117 +end +# CPU CLK 166 MHz? +define SetClk166MHz +printf "SetCLK 166.66MHz:\n" +monitor long 0x40000014 = 0x00000011 +end +# CPU CLK 83 MHz? +define SetClk83MHz +printf "SetCLK 83.33MHz:\n" +monitor long 0x40000014 = 0x00000021 +end +############### +# System Init # +############### +define SystemInit +printf "System Init:\n" +monitor long 0x40000304 = 0x1FC00002 +monitor long 0x40000250 = 0x400 +monitor long 0x40000340 = 0x0 +monitor long 0x40000230 = 0xdcc4 +monitor long 0x40000210 = 0x11117 +monitor long 0x40000210 = 0x11157 +monitor long 0x400002c0 = 0x110011 +monitor long 0x40000320 = 0xffffffff +end +############ +# SPI Init # +############ +define SPI_Init +printf "Init SPI:\n" +#enable spi flash peripheral clock +set $Temp = {int}(0x40000230) +set $Temp = ($Temp | 0x300) +set {int}(0x40000230) = $Temp +#enable spi flash peripheral +set $Temp = {int}(0x40000210) +set $Temp = ($Temp | 0x10) +set {int}(0x40000210) = $Temp +#select spi flash pinout (0 - internal), enable spi flash pins +set $Temp = {int}(0x400002C0) +set $Temp = (($Temp & 0xFFFFFFF8) | 1) +set {int}(0x400002C0) = $Temp +#disable SPI FLASH operation +monitor long 0x40006008 = 0 +#disable all interrupts +monitor long 0x4000602C = 0 +#use first "slave select" pin +monitor long 0x40006010 = 1 +#baud rate, default value +monitor long 0x40006014 = 2 +#tx fifo threshold +monitor long 0x40006018 = 0 +#rx fifo threshold +monitor long 0x4000601C = 0 +#disable DMA +monitor long 0x4000604C = 0 +set $SPI_FLASH_BASE = 0x98000000 +end +################### +# GetOtaSize # +################### +define GetOtaSize +set $rambuffer = 0x10000300 +printf "Get ImagesSize:\n" +set $ImageOtaSize = 0 +restore $arg0 binary $rambuffer 0 4 +set $ImageAddSize = {int}($rambuffer+0) +if $ImageAddSize != 0 + printf "Image2Size = %d\n", $ImageAddSize + set $ImageOtaSize = $ImageOtaSize + $ImageAddSize + 16 + set $parms1 = $rambuffer - $ImageOtaSize + set $parms3 = $ImageOtaSize + 4 + restore $arg0 binary $parms1 $ImageOtaSize $parms3 + set $ImageAddSize = {int}($rambuffer+0) + if $ImageAddSize < 0x200000 + printf "ImageSdramSize = %d\n", $ImageAddSize + set $ImageOtaSize = $ImageOtaSize + $ImageAddSize + 20 + end +else + printf "Image2Size = %d !\n", $ImageOtaSize +end +end +##################### +# Flash Images Info # +##################### +define FlashImagesInfo +printf "Flash Info:\n" +set $Image1Size = {int}($SPI_FLASH_BASE + 0x10) + 32 +set $Image1LoadAddr = {int}($SPI_FLASH_BASE + 0x14) +if $Image1LoadAddr == 0xFFFFFFFF +printf "Image1 - None\n" +else +set $Image2FlashAddr = {short}($SPI_FLASH_BASE + 0x18) * 1024 +if $Image2FlashAddr == 0 +$Image2FlashAddr = $Image1Size +end +set $Image2Size = {int}($Image2FlashAddr + $SPI_FLASH_BASE) +set $Image2LoadAddr = {int}($Image2FlashAddr + $SPI_FLASH_BASE + 0x4) +printf "Image1Size = %d\n", $Image1Size +printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr +printf "Image2FlashAddr = 0x%08x\n", $Image2FlashAddr +if $Image2Size != 0xFFFFFFFF +printf "Image2Size = %d\n", $Image2Size +printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr +else +printf "Image2 - None\n" +end +end +set $ImageOtaAddr = {int}($SPI_FLASH_BASE + 0x9000) +if $ImageOtaAddr != 0x80000 +printf "ImageOtaAddr = 0x%08x - Invalid!\n", $ImageOtaAddr +else +printf "ImageOtaAddr = 0x%08x\n", $ImageOtaAddr +end +end +############### +# FlasherInit # +############### +define FlasherInit +set $rtl8710_flasher_capacity = 0 +set $rtl8710_flasher_auto_erase = 1 +set $rtl8710_flasher_auto_verify = 1 +set $rtl8710_flasher_firmware_ptr = 0x10001000 +set $rtl8710_flasher_buffer = 0x10008000 +set $rtl8710_flasher_buffer_size = 421888 +set $rtl8710_flasher_sector_size = 4096 +set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF +end +############### +# FlasherWait # +############### +define FlasherWait +set $fresult = {int}($rtl8710_flasher_buffer) +while ($fresult != 0) +set $fresult = {int}($rtl8710_flasher_buffer) +end +end +############### +# FlasherLoad # +############### +define FlasherLoad +if $rtl8710_flasher_capacity == 0 + printf "initializing RTL8710 flasher\n" + restore $arg0 binary $rtl8710_flasher_firmware_ptr 0 968 + monitor reset + set $pc = $rtl8710_flasher_firmware_ptr + set $sp = 0x1ffffffc + set {int}($rtl8710_flasher_buffer + 0x08) = 0 + set {int}($rtl8710_flasher_buffer + 0x00) = 1 + #continue + monitor go + FlasherWait + set $id = {int}($rtl8710_flasher_buffer + 0x0C) + set $rtl8710_flasher_capacity = 1 << (($id >> 16) & 0x0ff) + if ($id == 0x1420c2) + printf "Flash ID = 0x%08x : MX25L8006E (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + else + printf "Flash ID = 0x%08x : (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + end + printf "RTL8710 flasher initialized\n" +else +printf "reinitializing RTL8710 flasher\n" +end +end +################## +# FlasherRdBlock # +################## +define FlasherRdBlock +#printf "FlashRdBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 3 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + error "read error, offset 0x%08x", $arg0 +end +end +################## +# FlasherWrBlock # +################## +define FlasherWrBlock +#printf "FlashWrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 4 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + error "write error, offset 0x%08x", $arg0 +end +end +################## +# FlasherVrBlock # +################## +define FlasherVrBlock +#printf "FlashVrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 5 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + set $status = {int}($rtl8710_flasher_buffer + 0x0C) + set $status = {int}($status + $arg0) + error "verify error, offset 0x%08x", $status +end +end +################# +# FlashSecErase # +################# +define FlashSecErase +#printf "FlashSecErase 0x%08x, 0x%08x\n", $rtl8710_flasher_buffer, $arg0 +set {int}($rtl8710_flasher_buffer + 0x04) = 2 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +end +################ +# FlasherWrite # +################ +define FlasherWrite +set $sector = 0 +set $offset = 0 +set $size = $arg2 +while $offset < $size + set $len = $size - $offset + if $len > $rtl8710_flasher_buffer_size + set $len = $rtl8710_flasher_buffer_size + end + set $flash_offset = $arg1 + $offset + printf "write offset 0x%08x\n", $flash_offset + set $parms1 = $rtl8710_flasher_buffer + 0x20 - $offset + set $parms2 = $offset + set $parms3 = $offset + $len + restore $arg0 binary $parms1 $parms2 $parms3 + if $rtl8710_flasher_auto_erase != 0 + set $count_i = $flash_offset + while $count_i < ($flash_offset + $len) + set $sector = $count_i/$rtl8710_flasher_sector_size + if $rtl8710_flasher_auto_erase_sector != $sector + set $parms1 = $sector * $rtl8710_flasher_sector_size + printf "erase sector %d at 0x%08x\n", $sector, $parms1 + FlashSecErase $parms1 + set $rtl8710_flasher_auto_erase_sector = $sector + end + set $count_i = $count_i + 1 + end + end + FlasherWrBlock $flash_offset $len + printf "write %d bytes at 0x%08x\n", $len, $flash_offset + if $rtl8710_flasher_auto_verify != 0 + printf "verify offset 0x%08x len %d\n", $flash_offset, $len + FlasherVrBlock $flash_offset $len + end + set $offset = $offset + $rtl8710_flasher_buffer_size +end +end +######################################### +InitJlink +SystemInit +SetClk166MHz +SPI_Init +GetOtaSize build/bin/ota.bin +if $ImageOtaSize != 0 + FlasherInit + FlasherLoad flasher/rtl8710_flasher.bin + set $FixOtaAddr = 0x80000 + set $pbuffer = $rtl8710_flasher_buffer + 0x20 + FlasherRdBlock 0x9000 0x1000 + set $ImageOtaAddr = {int}($pbuffer) + if $ImageOtaAddr != $FixOtaAddr + printf "ImageOtaAddr = 0x%08x - Invalid!\n", $ImageOtaAddr + set {int}($pbuffer) = $FixOtaAddr + set $Temp = $ImageOtaAddr & $FixOtaAddr + if $Temp != $FixOtaAddr + printf "FlashSecErase at 0x9000\n" + FlashSecErase 0x9000 + printf "Write offset 0x9000 4096 bytes\n" + FlasherWrBlock 0x9000 0x1000 + else + printf "Write offset 0x9000 4 bytes\n" + FlasherWrBlock 0x9000 0x0004 + end + end + FlasherWrite build/bin/ota.bin $FixOtaAddr $ImageOtaSize + restore build/bin/ota.bin binary $pbuffer 0 0x1000 + set {int}($pbuffer + 0x08) = 0x35393138 + set {int}($pbuffer + 0x0C) = 0x31313738 + FlasherWrBlock $FixOtaAddr 0x10 + FlashImagesInfo +end +monitor reset +SetBootFlash +monitor go +quit diff --git a/flasher/gdb_rdflash.jlink b/flasher/gdb_rdflash.jlink new file mode 100644 index 0000000..674ce48 --- /dev/null +++ b/flasher/gdb_rdflash.jlink @@ -0,0 +1,17 @@ +# GDB Jlink read fullflash +# Init +source -v flasher/gdb_flasher.jlink +InitJlink +SystemInit +SPI_Init +monitor speed 12000 +#FlashInfo +# Read FullFlash +printf "Read FullFlash:\n" +set $dumpstartaddr = $SPI_FLASH_BASE +set $dumpendaddr = $SPI_FLASH_BASE + 0x100000 +printf "Start addr of dumping = 0x%08x\n", $dumpstartaddr +printf "End addr of dumping = 0x%08x\n", $dumpendaddr +dump binary memory ../fullflash.bin $dumpstartaddr $dumpendaddr +printf "FullFlash saved in ./build/bin/fullflash.bin - OK.\n" +quit diff --git a/flasher/gdb_run_ram.jlink b/flasher/gdb_run_ram.jlink new file mode 100644 index 0000000..ad6a86d --- /dev/null +++ b/flasher/gdb_run_ram.jlink @@ -0,0 +1,11 @@ +# +# J-LINK GDB SERVER initialization +# +source -v flasher/gdb_flasher.jlink +InitJlink +load build/obj/build.axf +SetBootCall4 +monitor reset +monitor go +quit + diff --git a/flasher/gdb_wrfile.jlink b/flasher/gdb_wrfile.jlink new file mode 100644 index 0000000..b81e8c4 --- /dev/null +++ b/flasher/gdb_wrfile.jlink @@ -0,0 +1,156 @@ +############### +# FlasherInit # +############### +define FlasherInit +set $rtl8710_flasher_capacity = 0 +set $rtl8710_flasher_auto_erase = 1 +set $rtl8710_flasher_auto_verify = 1 +set $rtl8710_flasher_firmware_ptr = 0x10001000 +set $rtl8710_flasher_buffer = 0x10008000 +set $rtl8710_flasher_buffer_size = 421888 +set $rtl8710_flasher_sector_size = 4096 +set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF +end +############### +# FlasherWait # +############### +define FlasherWait +set $fresult = {int}($rtl8710_flasher_buffer) +while ($fresult != 0) +set $fresult = {int}($rtl8710_flasher_buffer) +end +end +############### +# FlasherLoad # +############### +define FlasherLoad +if $rtl8710_flasher_capacity == 0 + printf "initializing RTL8710 flasher\n" + restore $arg0 binary $rtl8710_flasher_firmware_ptr 0 968 + monitor reset + set $pc = $rtl8710_flasher_firmware_ptr + set $sp = 0x1ffffffc + set {int}($rtl8710_flasher_buffer + 0x08) = 0 + set {int}($rtl8710_flasher_buffer + 0x00) = 1 + #continue + monitor go + FlasherWait + set $id = {int}($rtl8710_flasher_buffer + 0x0C) + set $rtl8710_flasher_capacity = 1 << (($id >> 16) & 0x0ff) + if ($id == 0x1420c2) + printf "Flash ID = 0x%08x : MX25L8006E (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + else + printf "Flash ID = 0x%08x : (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + end + printf "RTL8710 flasher initialized\n" +else +printf "reinitializing RTL8710 flasher\n" +end +end +################## +# FlasherWrBlock # +################## +define FlasherWrBlock +#printf "FlashWrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 4 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + error "write error, offset 0x%08x", $arg0 +end +end +################## +# FlasherVrBlock # +################## +define FlasherVrBlock +#printf "FlashVrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 5 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + set $status = {int}($rtl8710_flasher_buffer + 0x0C) + set $status = {int}($status + $arg0) + error "verify error, offset 0x%08x", $status +end +end +################# +# FlashSecErase # +################# +define FlashSecErase +#printf "FlashSecErase 0x%08x, 0x%08x\n", $rtl8710_flasher_buffer, $arg0 +set {int}($rtl8710_flasher_buffer + 0x04) = 2 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +end +################ +# FlasherWrite # +################ +define FlasherWrite +set $sector = 0 +set $offset = 0 +set $size = $arg2 +while $offset < $size + set $len = $size - $offset + if $len > $rtl8710_flasher_buffer_size + set $len = $rtl8710_flasher_buffer_size + end + set $flash_offset = $arg1 + $offset + printf "write offset 0x%08x\n", $flash_offset + set $parms1 = $rtl8710_flasher_buffer + 0x20 - $offset + set $parms2 = $offset + set $parms3 = $offset + $len + restore $arg0 binary $parms1 $parms2 $parms3 + if $rtl8710_flasher_auto_erase != 0 + set $count_i = $flash_offset + while $count_i < ($flash_offset + $len) + set $sector = $count_i/$rtl8710_flasher_sector_size + if $rtl8710_flasher_auto_erase_sector != $sector + set $parms1 = $sector * $rtl8710_flasher_sector_size + printf "erase sector %d at 0x%08x\n", $sector, $parms1 + FlashSecErase $parms1 + set $rtl8710_flasher_auto_erase_sector = $sector + end + set $count_i = $count_i + 1 + end + end + FlasherWrBlock $flash_offset $len + printf "wrote %d bytes at 0x%08x\n", $len, $flash_offset + if $rtl8710_flasher_auto_verify != 0 + printf "verify offset 0x%08x len %d\n", $flash_offset, $len + FlasherVrBlock $flash_offset $len + end + set $offset = $offset + $rtl8710_flasher_buffer_size +end +end +######################################### +source -v flasher/gdb_flasher.jlink +source -v flasher/file_info.jlink +InitJlink +SystemInit +SetClk83MHz +SPI_Init +FlasherInit +FlasherLoad flasher/rtl8710_flasher.bin +call1 +if $ImageSize != 0 +set $ImageEnd = $ImageSize + $ImageAddr + 0x4000 +if $rtl8710_flasher_capacity >= $ImageEnd + printf "Write Image size %d to Flash addr 0x%08x:\n", $ImageSize, $ImageAddr + call2 +else + printf "Error: Image size is too big!\n" +end +else + printf "Error: Image size is zero!\n" +end +quit diff --git a/flasher/gdb_wrflash.jlink b/flasher/gdb_wrflash.jlink new file mode 100644 index 0000000..6d37642 --- /dev/null +++ b/flasher/gdb_wrflash.jlink @@ -0,0 +1,164 @@ +############### +# FlasherInit # +############### +define FlasherInit +set $rtl8710_flasher_capacity = 0 +set $rtl8710_flasher_auto_erase = 1 +set $rtl8710_flasher_auto_verify = 1 +set $rtl8710_flasher_firmware_ptr = 0x10001000 +set $rtl8710_flasher_buffer = 0x10008000 +set $rtl8710_flasher_buffer_size = 421888 +set $rtl8710_flasher_sector_size = 4096 +set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF +end +############### +# FlasherWait # +############### +define FlasherWait +set $fresult = {int}($rtl8710_flasher_buffer) +while ($fresult != 0) +set $fresult = {int}($rtl8710_flasher_buffer) +end +end +############### +# FlasherLoad # +############### +define FlasherLoad +if $rtl8710_flasher_capacity == 0 + printf "initializing RTL8710 flasher\n" + restore $arg0 binary $rtl8710_flasher_firmware_ptr 0 968 + monitor reset + set $pc = $rtl8710_flasher_firmware_ptr + set $sp = 0x1ffffffc + set {int}($rtl8710_flasher_buffer + 0x08) = 0 + set {int}($rtl8710_flasher_buffer + 0x00) = 1 + #continue + monitor go + FlasherWait + set $id = {int}($rtl8710_flasher_buffer + 0x0C) + set $rtl8710_flasher_capacity = 1 << (($id >> 16) & 0x0ff) + if ($id == 0x1420c2) + printf "Flash ID = 0x%08x : MX25L8006E (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + else + printf "Flash ID = 0x%08x : (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10 + end + printf "RTL8710 flasher initialized\n" +else +printf "reinitializing RTL8710 flasher\n" +end +end +################## +# FlasherWrBlock # +################## +define FlasherWrBlock +#printf "FlashWrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 4 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + error "write error, offset 0x%08x", $arg0 +end +end +################## +# FlasherVrBlock # +################## +define FlasherVrBlock +#printf "FlashVrBlock 0x%08x, 0x%08x\n", $arg0, $arg1 +set {int}($rtl8710_flasher_buffer + 0x04) = 5 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x14) = $arg1 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +set $status = {int}($rtl8710_flasher_buffer + 0x08) +if $status > 0 + set $status = {int}($rtl8710_flasher_buffer + 0x0C) + set $status = {int}($status + $arg0) + error "verify error, offset 0x%08x", $status +end +end +################# +# FlashSecErase # +################# +define FlashSecErase +#printf "FlashSecErase 0x%08x, 0x%08x\n", $rtl8710_flasher_buffer, $arg0 +set {int}($rtl8710_flasher_buffer + 0x04) = 2 +set {int}($rtl8710_flasher_buffer + 0x08) = 0 +set {int}($rtl8710_flasher_buffer + 0x10) = $arg0 +set {int}($rtl8710_flasher_buffer + 0x00) = 1 +FlasherWait +end +################ +# FlasherWrite # +################ +define FlasherWrite +set $sector = 0 +set $offset = 0 +set $size = $arg2 +while $offset < $size + set $len = $size - $offset + if $len > $rtl8710_flasher_buffer_size + set $len = $rtl8710_flasher_buffer_size + end + set $flash_offset = $arg1 + $offset + printf "write offset 0x%08x\n", $flash_offset + set $parms1 = $rtl8710_flasher_buffer + 0x20 - $flash_offset + set $parms2 = $flash_offset + set $parms3 = $flash_offset + $len + restore $arg0 binary $parms1 $parms2 $parms3 + if $rtl8710_flasher_auto_erase != 0 + set $count_i = $flash_offset + while $count_i < ($flash_offset + $len) + set $sector = $count_i/$rtl8710_flasher_sector_size + if $rtl8710_flasher_auto_erase_sector != $sector + set $parms1 = $sector * $rtl8710_flasher_sector_size + printf "erase sector %d at 0x%08x\n", $sector, $parms1 + FlashSecErase $parms1 + set $rtl8710_flasher_auto_erase_sector = $sector + end + set $count_i = $count_i + 1 + end + end + FlasherWrBlock $flash_offset $len + printf "wrote %d bytes at 0x%08x\n", $len, $flash_offset + if $rtl8710_flasher_auto_verify != 0 + printf "verify offset 0x%08x len %d\n", $flash_offset, $len + FlasherVrBlock $flash_offset $len + end + set $offset = $offset + $rtl8710_flasher_buffer_size +end +end +######################################### +source -v flasher/gdb_flasher.jlink +source -v flasher/flash_file.jlink +InitJlink +SystemInit +SetClk166MHz +SPI_Init +FlashImagesInfo +#SetFirwareSize $wr_flile +call1 +if $FirmwareSize == 0 + error "FirmwareSize = 0!" +end +FlasherInit +FlasherLoad flasher/rtl8710_flasher.bin +if $Image1Size != 0 + printf "Write Image1 size %d to Flash addr 0x00000000:\n", $Image1Size + #FlasherWrite $wr_flile 0 $Image1Size + call2 + if $Image2Size != 0 && $Image2Addr >= $Image1Size + printf "Write Image2 size %d to Flash addr 0x%08x:\n", $Image2Size, $Image2Addr + #FlasherWrite $wr_flile $Image2Addr $Image2Size + call3 + end +end +FlashImagesInfo +monitor reset +SetBootFlash +monitor go +quit diff --git a/flasher/rtl8710.ocd b/flasher/rtl8710.ocd new file mode 100644 index 0000000..2f2b102 --- /dev/null +++ b/flasher/rtl8710.ocd @@ -0,0 +1,340 @@ +# +# OpenOCD script for RTL8710 +# Copyright (C) 2016 Rebane, rebane@alkohol.ee +# +set CHIPNAME rtl8195a +set CHIPSERIES ameba1 + +# Adapt based on what transport is active. + +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME rtl8710 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x800 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x2ba01477 +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x10001000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +# adapter_khz 500 +adapter_nsrst_delay 100 + +if {![using_hla]} { + cortex_m reset_config sysresetreq vectreset +} + +set rtl8710_flasher_firmware_ptr 0x10001000 +set rtl8710_flasher_buffer 0x10008000 +set rtl8710_flasher_buffer_size 262144 +set rtl8710_flasher_sector_size 4096 + +array set rtl8710_flasher_code { + 0 0xB671B57F 1 0x25FF4B58 2 0x6B196B1A 3 0x7040F042 4 0x69D96318 5 0xF4414E55 + 6 0x69D97480 7 0xF8D361DC 8 0xF8C32120 9 0xF8D35120 10 0xF8C31124 11 0x47B05124 + 12 0x47B04E4F 13 0x47984B4F 14 0x60104A4F 15 0x484F47B0 16 0x60012100 17 0x2C006804 + 18 0x4D4DD0FC 19 0xB93E682E 20 0x60264C49 21 0x47B04E46 22 0x47984B46 23 0xE7ED6020 + 24 0x2B01682B 25 0x4E42D109 26 0x4C4647B0 27 0x47A02006 28 0x47904A45 29 0x47A020C7 + 30 0x682AE00D 31 0xD10E2A02 32 0x47B04E3B 33 0x20064C3F 34 0x483F47A0 35 0x493F4780 + 36 0x68084D3F 37 0x47B047A8 38 0x47A02004 39 0x6828E7CE 40 0xD1132803 41 0x47A04C32 + 42 0x24004838 43 0x4E396805 44 0x68311960 45 0xD206428C 46 0x4B384A37 47 0x221018A1 + 48 0x34104798 49 0x4D2AE7F3 50 0xE7B847A8 51 0x29046829 52 0x2400D11B 53 0x6806482F + 54 0xD2B042B4 55 0x47A84D24 56 0x20064E28 57 0x4B2847B0 58 0x49284798 59 0x680A4B2A + 60 0x18A018E1 61 0xF44F4B2A 62 0x47987280 63 0x200447A8 64 0xF50447B0 65 0x47A87480 + 66 0x682CE7E4 67 0xD1232C05 68 0x47984B17 69 0x4D1F2400 70 0x4294682A 71 0x481BD28F + 72 0x68012210 73 0x18604E1D 74 0x47B04669 75 0x1B19682B 76 0xBF282910 77 0x23002110 + 78 0xD011428B 79 0xF81D4A16 80 0x18A05003 81 0x42B55CC6 82 0x3301D101 83 0x4A15E7F4 + 84 0x60112101 85 0xE7726054 86 0x25014E12 87 0xE76E6035 88 0x47A84D03 89 0xE7D63410 + 90 0x40000200 91 0x100011BD 92 0x100013DD 93 0x10001289 94 0x1000800C 95 0x10008000 + 96 0x10008004 97 0x1000130D 98 0x100013ED 99 0x10008010 100 0x10001335 101 0x10008014 + 102 0x10008020 103 0x10001221 104 0x10001375 105 0x10008008 106 0x6A5A4B03 107 0xD0FB0512 + 108 0x0060F893 109 0xBF004770 110 0x40006000 111 0x6B194B17 112 0xF4416B1A 113 0x63187040 + 114 0x69186919 115 0x0110F041 116 0xF8D36119 117 0x220000C0 118 0x0106F020 119 0x00C0F8D3 + 120 0x10C0F8C3 121 0x00C0F8D3 122 0x0101F040 123 0x00C0F8D3 124 0x10C0F8C3 125 0x43BCF503 + 126 0x609A6899 127 0x20016AD9 128 0x691962DA 129 0x69596118 130 0x61592102 131 0x619A6999 + 132 0x61DA69D9 133 0x64DA6CD9 134 0xBF004770 135 0x40000200 136 0x460EB570 137 0xB34A4614 + 138 0xF3C04B15 139 0x681A4507 140 0x7240F44F 141 0x685A601A 142 0xF3C02103 143 0x2C102207 + 144 0x2410BF28 145 0x605CB2C0 146 0x1060F883 147 0x5060F883 148 0xF8832101 149 0xF8832060 + 150 0x689A0060 151 0x60992500 152 0x47984B08 153 0x35015570 154 0x42A2B2AA 155 0x4804D3F8 + 156 0xF0116A81 157 0xD1FA0301 158 0x60836881 159 0xBD704620 160 0x40006000 161 0x100011A9 + 162 0x4C10B5F8 163 0x68232003 164 0x7340F44F 165 0x68636023 166 0x60602101 167 0x68A3229F + 168 0x60A14D0B 169 0x2060F884 170 0x460647A8 171 0x460747A8 172 0x040347A8 173 0x2707EA43 + 174 0x0006EA47 175 0x4B036AA1 176 0x0201F011 177 0x6899D1FA 178 0xBDF8609A 179 0x40006000 + 180 0x100011A9 181 0x4C0BB510 182 0x68232001 183 0x7340F44F 184 0x68636023 185 0x60602105 + 186 0x60A068A2 187 0xF8844A06 188 0x47901060 189 0x4B036AA1 190 0x0201F011 191 0x6899D1FA + 192 0xBD10609A 193 0x40006000 194 0x100011A9 195 0x21014B08 196 0xF44F681A 197 0x601A7280 + 198 0x6099689A 199 0x0060F883 200 0x48036A9A 201 0x0101F012 202 0x6883D1FA 203 0x47706081 + 204 0x40006000 205 0x21014B0E 206 0xF44F681A 207 0x601A7280 208 0x2220689A 209 0xF8836099 + 210 0xF3C02060 211 0xF3C04107 212 0xB2C02207 213 0x1060F883 214 0x2060F883 215 0x0060F883 + 216 0x4A036A99 217 0x0001F011 218 0x6893D1FA 219 0x47706090 220 0x40006000 221 0xB36AB530 + 222 0x25014B17 223 0xF44F681C 224 0x601C7480 225 0x2402689C 226 0xF883609D 227 0xF3C04060 + 228 0xF3C04507 229 0xB2C02407 230 0x5060F883 231 0x7F80F5B2 232 0xF44FBF28 233 0xF8837280 + 234 0xF8834060 235 0x20000060 236 0x4C095C0D 237 0xF8843001 238 0xB2855060 239 0xD3F74295 + 240 0x07496A99 241 0x6AA0D5FC 242 0xF0104B03 243 0xD1FA0101 244 0x60996898 245 0xBD304610 + 246 0x40006000 247 0x4B02B508 248 0x07C04798 249 0xBD08D4FB 250 0x100012D5 251 0x4B04B508 + 252 0xF0004798 253 0xB2C10002 254 0xD0F82900 255 0xBF00BD08 256 0x100012D5 +} + +set rtl8710_flasher_command_read_id 0 +set rtl8710_flasher_command_mass_erase 1 +set rtl8710_flasher_command_sector_erase 2 +set rtl8710_flasher_command_read 3 +set rtl8710_flasher_command_write 4 +set rtl8710_flasher_command_verify 5 + +set rtl8710_flasher_ready 0 +set rtl8710_flasher_capacity 0 +set rtl8710_flasher_auto_erase 0 +set rtl8710_flasher_auto_verify 0 +set rtl8710_flasher_auto_erase_sector 0xFFFFFFFF + +proc rtl8710_flasher_init {} { + global rtl8710_flasher_firmware_ptr + global rtl8710_flasher_buffer + global rtl8710_flasher_capacity + global rtl8710_flasher_ready + global rtl8710_flasher_code + + if {[expr {$rtl8710_flasher_ready == 0}]} { + echo "initializing RTL8710 flasher" + halt + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + array2mem rtl8710_flasher_code 32 $rtl8710_flasher_firmware_ptr [array size rtl8710_flasher_code] + reg faultmask 0x01 + reg sp 0x20000000 + reg pc $rtl8710_flasher_firmware_ptr + resume + rtl8710_flasher_wait + set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]] + set rtl8710_flasher_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}] + set rtl8710_flasher_ready 1 + echo "RTL8710 flasher initialized" + } + return "" +} + +proc rtl8710_flasher_mrw {reg} { + set value "" + mem2array value 32 $reg 1 + return $value(0) +} + +proc rtl8710_flasher_wait {} { + global rtl8710_flasher_buffer + while {[rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x00}]]} { } +} + +proc rtl8710_flasher_load_block {local_filename offset len} { + global rtl8710_flasher_buffer + load_image $local_filename [expr {$rtl8710_flasher_buffer + 0x20 - $offset}] bin [expr {$rtl8710_flasher_buffer + 0x20}] $len +} + +proc rtl8710_flasher_read_block {offset len} { + global rtl8710_flasher_buffer + global rtl8710_flasher_command_read + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset + mww [expr {$rtl8710_flasher_buffer + 0x14}] $len + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait + set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]] + if {[expr {$status > 0}]} { + error "read error, offset $offset" + } +} + +proc rtl8710_flasher_write_block {offset len} { + global rtl8710_flasher_buffer + global rtl8710_flasher_command_write + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_write + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset + mww [expr {$rtl8710_flasher_buffer + 0x14}] $len + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait + set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]] + if {[expr {$status > 0}]} { + error "write error, offset $offset" + } +} + +proc rtl8710_flasher_verify_block {offset len} { + global rtl8710_flasher_buffer + global rtl8710_flasher_command_verify + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_verify + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset + mww [expr {$rtl8710_flasher_buffer + 0x14}] $len + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait + set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]] + if {[expr {$status > 0}]} { + set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]] + set status [expr {$status + $offset}] + error "verify error, offset $status" + } +} + +proc rtl8710_flash_read_id {} { + global rtl8710_flasher_buffer + global rtl8710_flasher_capacity + global rtl8710_flasher_command_read_id + rtl8710_flasher_init + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait + set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]] + set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]] + set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]] + set memory_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}] + echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes" +} + +proc rtl8710_flash_mass_erase {} { + global rtl8710_flasher_buffer + global rtl8710_flasher_command_mass_erase + rtl8710_flasher_init + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_mass_erase + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait +} + +proc rtl8710_flash_sector_erase {offset} { + global rtl8710_flasher_buffer + global rtl8710_flasher_command_sector_erase + rtl8710_flasher_init + mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_sector_erase + mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000 + mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset + mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001 + rtl8710_flasher_wait +} + +proc rtl8710_flash_read {local_filename loc size} { + global rtl8710_flasher_buffer + global rtl8710_flasher_buffer_size + rtl8710_flasher_init + for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} { + set len [expr {$size - $offset}] + if {[expr {$len > $rtl8710_flasher_buffer_size}]} { + set len $rtl8710_flasher_buffer_size + } + set flash_offset [expr {$loc + $offset}] + echo "read offset $flash_offset" + rtl8710_flasher_read_block $flash_offset $len + dump_image _rtl8710_flasher.bin [expr {$rtl8710_flasher_buffer + 0x20}] $len + exec dd conv=notrunc if=_rtl8710_flasher.bin "of=$local_filename" bs=1 "seek=$offset" + echo "read $len bytes" + } +} + +proc rtl8710_flash_write {local_filename loc} { + global rtl8710_flasher_buffer_size + global rtl8710_flasher_sector_size + global rtl8710_flasher_auto_erase + global rtl8710_flasher_auto_verify + global rtl8710_flasher_auto_erase_sector + rtl8710_flasher_init + set sector 0 + set size [file size $local_filename] + for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} { + set len [expr {$size - $offset}] + if {[expr {$len > $rtl8710_flasher_buffer_size}]} { + set len $rtl8710_flasher_buffer_size + } + set flash_offset [expr {$loc + $offset}] + echo "write offset $flash_offset" + rtl8710_flasher_load_block $local_filename $offset $len + if {[expr {$rtl8710_flasher_auto_erase != 0}]} { + for {set i $flash_offset} {$i < [expr {$flash_offset + $len}]} {incr i} { + set sector [expr {$i / $rtl8710_flasher_sector_size}] + if {[expr {$rtl8710_flasher_auto_erase_sector != $sector}]} { + echo "erase sector $sector" + rtl8710_flash_sector_erase [expr {$sector * $rtl8710_flasher_sector_size}] + set rtl8710_flasher_auto_erase_sector $sector + } + } + } + rtl8710_flasher_write_block $flash_offset $len + echo "wrote $len bytes" + if {[expr {$rtl8710_flasher_auto_verify != 0}]} { + echo "verify offset $flash_offset" + rtl8710_flasher_verify_block $flash_offset $len + } + } +} + +proc rtl8710_flash_verify {local_filename loc} { + global rtl8710_flasher_buffer_size + rtl8710_flasher_init + set size [file size $local_filename] + for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} { + set len [expr {$size - $offset}] + if {[expr {$len > $rtl8710_flasher_buffer_size}]} { + set len $rtl8710_flasher_buffer_size + } + set flash_offset [expr {$loc + $offset}] + echo "read offset $flash_offset" + rtl8710_flasher_load_block $local_filename $offset $len + echo "verify offset $flash_offset" + rtl8710_flasher_verify_block $flash_offset $len + } +} + +proc rtl8710_flash_auto_erase {on} { + global rtl8710_flasher_auto_erase + if {[expr {$on != 0}]} { + set rtl8710_flasher_auto_erase 1 + echo "auto erase on" + } else { + set rtl8710_flasher_auto_erase 0 + echo "auto erase off" + } +} + +proc rtl8710_flash_auto_verify {on} { + global rtl8710_flasher_auto_verify + if {[expr {$on != 0}]} { + set rtl8710_flasher_auto_verify 1 + echo "auto verify on" + } else { + set rtl8710_flasher_auto_verify 0 + echo "auto verify off" + } +} + +proc rtl8710_reboot {} { + echo "# Set processor clock to default before system reset" + mww 0x40000014 0x00000021 + sleep 10 + echo "# Reboot (system reset)" + mww 0xE000ED0C 0x05FA0007 +} + diff --git a/flasher/rtl8710_flasher.bin b/flasher/rtl8710_flasher.bin new file mode 100644 index 0000000000000000000000000000000000000000..6c7e36d4c99d89ba7a7263e641d5777eedd594d1 GIT binary patch literal 968 zcmZ`%O-vI(6rSxb&|*etj4YCDx0tjgCWM4|@IbSa4($R>BvBL&Q{_9rWE=u=9ys6vrhY{{E8@KjdW9ml-cADxdwMfvCP(#GTT_L zyp|U51d`9|S)xuS<4%RUZc6jEC_D3i(=T4;#B&(5=iKg2s!#8qc>% zP>IDUpA&ki{oDNG?YPUii5&>~rzA_^*+d7^?L8gfid@f8g>!s>tX?`(QDC;+`aW7g zn@EQ|ORWe`w;*hdBmC|>!U)g+>kFK%1BW4Q1QY-V02=^p>KX8cz-T1DZ_%T!Uj*qR4|~&dx`r1NGJTDXEHed}y2H1hHz;-E4$KzITwld*a3*M`Ky+i)Fz-%(?`g&%rx*?!__|s&~kgb0p~-$1J1Wjl+w? z;9DdnSjgb{ZW4t4WL=31s5<{N8vP9!RmB4JGEGvWreK7ZK3ma{J?&`*H*s*ofp=}@ zNDJJ^agmc#6x?gGHJ`~5Y97yc&ZSk?|EtBB+p8DU`umqC*Evshosj8)JM-32+gp9< z!}z0I+PSGtqiWgU-c+P~JpEWQ4Ib?zBID+hPl;3C{v^ddtogth-H<}^=97;&n}PqK KwogEIZT|;|PH&e0 literal 0 HcmV?d00001 diff --git a/init_project.sh b/init_project.sh new file mode 100644 index 0000000..045b726 --- /dev/null +++ b/init_project.sh @@ -0,0 +1,20 @@ +##!/bin/bash + +# compile ameba tools +make -C pick_padding_checksum + +# download librtlhttpd +git clone -b rtl8710 https://f28@bitbucket.org/f28/librtlhttpd.git + +cd librtlhttpd + +# download heatshrink library +git submodule init +git submodule update + +cd .. + + +#download SDK +#cd .. +#git clone https://github.com/pvvx/RTL00MP3.git diff --git a/paths.bat b/paths.bat new file mode 100644 index 0000000..374f93e --- /dev/null +++ b/paths.bat @@ -0,0 +1 @@ +PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.4_2016q2\bin;D:\MCU\SEGGER\JLink_V612i;%PATH% \ No newline at end of file diff --git a/paths.mk b/paths.mk new file mode 100644 index 0000000..a7154c4 --- /dev/null +++ b/paths.mk @@ -0,0 +1,44 @@ +#--------------------------- +# User defined +#--------------------------- +SDK_PATH = ../RTL00MP3/RTL00_SDKV35a/ +#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH +#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH +TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/ +FLASHER_TYPE ?= Jlink +#FLASHER_TYPE ?= OCD +FLASHER_PATH ?= flasher/ +JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/ +JLINK_GDBSRV ?= JLinkGDBServer.exe +#--------------------------- +# Default +#--------------------------- +# Compilation tools +CROSS_COMPILE = $(GCC_PATH)arm-none-eabi- +AR = $(CROSS_COMPILE)ar +CC = $(CROSS_COMPILE)gcc +AS = $(CROSS_COMPILE)as +NM = $(CROSS_COMPILE)nm +LD = $(CROSS_COMPILE)gcc +GDB = $(CROSS_COMPILE)gdb +SIZE = $(CROSS_COMPILE)size +OBJCOPY = $(CROSS_COMPILE)objcopy +OBJDUMP = $(CROSS_COMPILE)objdump + +# TARGET dirs +TARGET ?= build +OBJ_DIR ?= $(TARGET)/obj +BIN_DIR ?= $(TARGET)/bin +ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf + +# Make bunary tools +ifneq ($(shell uname), Linux) +EXE = .exe +endif +PICK = $(TOOLS_PATH)pick$(EXE) +PADDING = $(TOOLS_PATH)padding$(EXE) +CHCKSUM = $(TOOLS_PATH)checksum$(EXE) + +# openocd tools +OPENOCD = $(OPENOCD_PATH)openocd + diff --git a/pick_padding_checksum/Makefile b/pick_padding_checksum/Makefile new file mode 100644 index 0000000..d3cdb8b --- /dev/null +++ b/pick_padding_checksum/Makefile @@ -0,0 +1,7 @@ +all: + gcc -o checksum checksum.c -s + gcc -o padding padding.c -s + g++ -o pick pick.cpp -s + +clean: + rm -f pick padding checksum \ No newline at end of file diff --git a/pick_padding_checksum/checksum.c b/pick_padding_checksum/checksum.c new file mode 100644 index 0000000..ca9bc50 --- /dev/null +++ b/pick_padding_checksum/checksum.c @@ -0,0 +1,108 @@ +// checksum.cpp : Defines the entry point for the console application. + +/* + +Compile command: + gcc -m32 -o tools/linux/checksum tools/linux/src/checksum.c -static + +*/ + +#if 1 + +#include +#include +#include + +int main(int argc, char *argv[]) +{ + FILE *fp; + unsigned int checksum = 0; + //unsigned char buf[502000]; //MAX FW Size = 512K-44K/2 = 501760 + unsigned char *buf; + int i; + int size = 0; + + if(argc != 2) return -1; + + fp = fopen(argv[1], "rb+"); + if(!fp) return -2; + + + fseek(fp,0L,SEEK_END); + size = ftell(fp); + fseek(fp,0L,SEEK_SET); + + buf = malloc(size+100); + if(!buf){ + fclose(fp); + return -3; + } + + printf("size = %d \n\r", size); + + memset(buf, 0, size+100); + + fread(buf, 1, size, fp); + + for(i=0;i +#include +#include +#include +#include +#include + +int main(int argc, char *argv[]) +{ + //FILE *fp; + int fd; + unsigned int checksum = 0; + + if(argc != 2) return -1; + + //fp = fopen(argv[1], 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length*=(1024*1024); + else { + printf("unit %s is Not valid\n", unit); + return; + } + fp = fopen(argv[3], "r+b"); + if(!fp) return; + + buf = malloc(length); + memset(buf, data, length); + printf("Original size %zd\n", fread(buf, 1, length, fp)); + fseek(fp, 0, SEEK_SET); + printf("Padding size %zd\n", fwrite(buf, 1, length, fp)); + + free(buf); + fclose(fp); +} + diff --git a/pick_padding_checksum/padding.exe b/pick_padding_checksum/padding.exe new file mode 100644 index 0000000000000000000000000000000000000000..d98f8afa9c4f649e8331593b4a96b0eb649281c2 GIT binary patch literal 46592 zcmeFadwdi{);HdhOke^7JwVi;aT(k}iCj#S)r<#A((ia5ED1iXcd7_LS{?Pd@HXl@|$eou9GGPv&kp5Oa^ ze(xW@&l5hRy6bYzsdG-9I(4e5lYLKx5Gx3R75^g87 zKOR|QnfCF>nGY>2b}m`E_`#*~A9X%3f6=1FlJouo=ThGy=fXwK%sXZ{A6>klVEmv# z16&5^9Iqfuv)F`Ref6g~Cbl*~j2&o+87@4DoVW1bE(oEaNFDfJiT^|$J;&&DTkuHq z^B*VP@N(n30`Hd~IQ6>JfZE{4Nc5L>K;VJx&`tb-Uq47)gilsIbY{LHm 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a/pick_padding_checksum/pick.cpp b/pick_padding_checksum/pick.cpp new file mode 100644 index 0000000..7bd41fa --- /dev/null +++ b/pick_padding_checksum/pick.cpp @@ -0,0 +1,140 @@ +// pick.cpp : main project file. +// https://raw.githubusercontent.com/pvvx/RTL00MP3/34d4d9f465cc29867196bb22b73e811d5b984800/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/tools/src/pick.cpp + +// compilation: g++ -o pick pick.cpp -s + +//#include "stdafx.h" + +//using namespace System; + +#include +#include +#include +//#include +#include +#include +#include + +#define PATTERN_1 0x96969999 +#define PATTERN_2 0xFC66CC3F +#define PATTERN_3 0x03CC33C0 +#define PATTERN_4 0x6231DCE5 + +unsigned int fw_head[4] = { PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4 }; +unsigned int seg_head[4] = { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; +/* +int main(array ^args) +{ + Console::WriteLine(L"Hello World"); + return 0; +} +*/ +int main(int argc, char* argv[]) +{ + int arg_num = 6; + + if ((argc>5) && (strstr(argv[5], "head"))) arg_num++; + + if (argc != arg_num){ + printf("Usage: pick.exe \n"); + return -1; + } + + unsigned char *buf; + + unsigned int start;//=atoi(argv[1]); + unsigned int end;// = atoi(argv[2]); + unsigned int base; + + int is_raw = 0; + int is_sig = 0; + + char *inf = argv[3]; + char *outf = argv[4]; + + int size; + FILE *ifp, *ofp; + + //if(argv[1][0]=='0'&&(argv[1][1]=='x'||argv[1][1]=='X')) + // sscanf(argv[1], "0x%x", &start); + //else + // start=atoi(argv[1]); + start = strtol(argv[1], NULL, 0); + + //if(argv[2][0]=='0'&&(argv[2][1]=='x'||argv[2][1]=='X')) + // sscanf(argv[2], "0x%x", &end); + //else + // end=atoi(argv[2]); + end = strtol(argv[2], NULL, 0); + + base = start & 0xFFFF0000; + + if (strstr(argv[5], "reset_offset")){ + base = start; + } + + if (strstr(argv[5], "raw")){ + is_raw = 1; + } + else + is_raw = 0; + + if (strstr(argv[5], "sig")){ + is_sig = 1; + } + else + is_sig = 0; + + printf("b:%d s:%d e:%d\n", base, start, end); + //printf("%s %s\n", inf, outf); + + ifp = fopen(inf, "rb"); + if (!ifp) return -2; + ofp = fopen(outf, "wb"); + if (!ofp) return -3; + + fseek(ifp, 0, SEEK_END); + size = ftell(ifp); + + printf("size %d\n", size); + buf = (unsigned char *)malloc(size); + if (!buf) return -4; + + if (end == 0) end = base + size; + + if (end - start + 1 > 0){ + fseek(ifp, start - base, SEEK_SET); + fread(buf, end - start, 1, ifp); + if (is_raw == 0){ + if (strstr(argv[5], "head")){ + int offset = strtol(argv[6], NULL, 0); + printf("append fw head %x\n", offset); + fwrite(fw_head, 4, sizeof(unsigned int), ofp); + seg_head[2] = (0xFFFF0000 | (offset / 1024)); + } + else{ + if (is_sig){ + seg_head[2] = 0x35393138; + seg_head[3] = 0x31313738; + } + else{ + seg_head[2] = 0xFFFFFFFF; + seg_head[3] = 0xFFFFFFFF; + } + } + seg_head[0] = end - start; + seg_head[1] = start; + fwrite(seg_head, 4, sizeof(unsigned int), ofp); + } + fwrite(buf, end - start, 1, ofp); + + } + printf("copy size %d\n", end - start); + fclose(ifp); + fclose(ofp); + free(buf); + + return 0; +} + + diff --git a/pick_padding_checksum/pick.exe b/pick_padding_checksum/pick.exe new file mode 100644 index 0000000000000000000000000000000000000000..23719ab3149bd3c67c6483ca3ffb670d2c0e202f GIT binary patch literal 47104 zcmeFa4RjPm);HcWnZN{w^dM1##&ys^6ZtSv)QmBe0|gPzfaV zjHb37j4STC&!WQ0?y|e=F1s5;RK$Fd1Vjy>5Izlv+RY$@4?_}=d4IRMdlFcE{_lC8 z^FQZ(&sjK0bywZGb?e?+w{G34>f}6HF2o3eV8c%&A_!GT>7SSX{_lU4pg8{8_v3|% zxK9RES;l@cXyTJ|id^#-%zI+NtY=)0&zd`Tp5%Hg-?hL$*EMIZE9=1tu4m@W&L7^d zUmv%Ddc02%##-#cZD0LqirHGLAjb5ySO*F(Ag2O94ne5C45<@8tMEhA(X&;j+k!`; zpZ{~=4KJ$)S$Mw$!KK4e1*(I8Mxwv82||KhfBZlBZF5?L#2=~n#z{dKL4^Ipzu{8; zVhLqZDSi<_)YoVy@Qi;mh4C|o&z>dC!t+?lScM<-S$GjYJ^p!x)av02bifws%X<9u z!B1HaAUt}7ncm^~PtGWSbZl23qZ&U%{4ep-;~(&Ohd)+SL|G#UPb)qB`@a%lX7%tn zdb^y5;3aSO&lkgT`Z6D$NVz(%z!>TW$+pKo4ks1zc3qSY-g3Cg9zb{`xQlcC^Y(wr z0r^;xlI3Z7rv3#5yr%XvsS->`Cl$Bj||R0tgdxv-_9DSiz!CtBt7#T0bL8WOZ}CV1*#j_fd^*-YF-5u4dr)Cot{^RZZ^hJ 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ztkm2RyK9psd3VO7N!_s*O@`qMQ@=Dh0awdciC`wCD3tNl-|CWB;tx`)(sA{Ul=w#^ zm6BVB<6kDX`X0Q(T(wwQZg0aXx}te5my%njd$J$ucYsi-3h$zh7A{b~P^>H#D_3eC zSU~ksR>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + *************************************************************************** + * * + * Having a problem? Start by reading the FAQ "My application does * + * not run, what could be wrong?" * + * * + * http://www.FreeRTOS.org/FAQHelp.html * + * * + *************************************************************************** + + + http://www.FreeRTOS.org - Documentation, training, latest versions, license + and contact details. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool. + + Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell + the code with commercial support, indemnification, and middleware, under + the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also + provide a safety engineered and independently SIL3 certified version under + the SafeRTOS brand: http://www.SafeRTOS.com. +*/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H +#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) +#include +extern uint32_t SystemCoreClock; +#endif + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +#define configUSE_STACK_TCM_HEAP 1 // RTL871xAx/RTL8195Ax Stack priority used TCM HEAP +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 1 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( SystemCoreClock ) +#define configTICK_RATE_HZ ( ( uint32_t ) 1000 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 ) +#ifdef CONFIG_UVC +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 110 * 1024 ) ) // use HEAP5 +#else +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 90 * 1024 ) ) // use HEAP5 +#endif +#define configMAX_TASK_NAME_LEN ( 10 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_CO_ROUTINES 1 +#define configUSE_MUTEXES 1 +#define configUSE_TIMERS 1 + +#define configMAX_PRIORITIES ( 11 ) +#define PRIORITIE_OFFSET ( 4 ) + +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_ALTERNATIVE_API 0 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 0 +#define configGENERATE_RUN_TIME_STATS 1 +#if configGENERATE_RUN_TIME_STATS +#define configUSE_STATS_FORMATTING_FUNCTIONS 1 +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() //( ulHighFrequencyTimerTicks = 0UL ) +#define portGET_RUN_TIME_COUNTER_VALUE() xTickCount //ulHighFrequencyTimerTicks +#undef configUSE_TRACE_FACILITY +#define configUSE_TRACE_FACILITY 1 +#define portCONFIGURE_STATS_PEROID_VALUE 1000 //unit Ticks +#endif + +#define configTIMER_TASK_PRIORITY ( 1 ) + +#ifdef CONFIG_UVC +#define configTIMER_QUEUE_LENGTH ( 20 ) +#else +#define configTIMER_QUEUE_LENGTH ( 10 ) +#endif + +#define configTIMER_TASK_STACK_DEPTH ( 512 ) //USE_MIN_STACK_SIZE modify from 512 to 256 + +#if (__IASMARM__ != 1) + +extern void freertos_pre_sleep_processing(unsigned int *expected_idle_time); +extern void freertos_post_sleep_processing(unsigned int *expected_idle_time); +extern int freertos_ready_to_sleep(); + +/* Enable tickless power saving. */ +#define configUSE_TICKLESS_IDLE 1 + +/* In wlan usage, this value is suggested to use value less than 80 milliseconds */ +#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 + +/* It's magic trick that let us can use our own sleep function */ +#define configPRE_SLEEP_PROCESSING( x ) ( freertos_pre_sleep_processing(&x) ) + +#define configPOST_SLEEP_PROCESSING( x ) ( freertos_post_sleep_processing(&x) ) + +/* It's magic trick that let us can enable/disable tickless dynamically */ +#define traceLOW_POWER_IDLE_BEGIN(); do { \ + if (!freertos_ready_to_sleep()) { \ + mtCOVERAGE_TEST_MARKER(); \ + break; \ + } + + // portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ); + +#define traceLOW_POWER_IDLE_END(); } while (0); + +/* It's FreeRTOS related feature but it's not included in FreeRTOS design. */ +#define configUSE_WAKELOCK_PMU 1 + +#endif // #if (__IASMARM__ != 1) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_pcTaskGetTaskName 1 +#define INCLUDE_xTimerPendFunctionCall 1 + +/* Cortex-M specific definitions. */ +#ifdef __NVIC_PRIO_BITS + /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ + #define configPRIO_BITS __NVIC_PRIO_BITS +#else + #define configPRIO_BITS 4 /* 15 priority levels */ +#endif + + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0f + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 + + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) + +//#define RTK_MODE_TIMER + + +#define INCLUDE_uxTaskGetStackHighWaterMark 1 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/project/inc/build_info.h b/project/inc/build_info.h new file mode 100644 index 0000000..c701022 --- /dev/null +++ b/project/inc/build_info.h @@ -0,0 +1,7 @@ +#define UTS_VERSION "2017/05/15-21:54:34" +#define RTL8195AFW_COMPILE_TIME "2017/05/15-21:54:34" +#define RTL8195AFW_COMPILE_DATE "20170515" +#define RTL8195AFW_COMPILE_BY "steve" +#define RTL8195AFW_COMPILE_HOST "" +#define RTL8195AFW_COMPILE_DOMAIN "" +#define RTL195AFW_COMPILER "gcc 5.4.1" diff --git a/project/inc/feep_config.h b/project/inc/feep_config.h new file mode 100644 index 0000000..273eeb1 --- /dev/null +++ b/project/inc/feep_config.h @@ -0,0 +1,29 @@ +/* + * feep_config.h + * + * Created on: 06 нояб. 2016 г. + * Author: PVV + */ + +#ifndef _INC_FEEP_CONFIG_H_ +#define _INC_FEEP_CONFIG_H_ + +#define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect +#define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF +#define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf +#define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct + +typedef struct _sdhcp_cfg { + u8 mode; // =0 dhcp off, =1 - dhcp on, =2 Static ip, =3 - auto + u32 ip; + u32 mask; + u32 gw; +}dhcp_cfg; + +/* +#define FEEP_WRITE_WIFI_CFG(x) flash_write_cfg(x, FEEP_ID_WIFI_CFG, sizeof(struct wlan_fast_reconnect)) +#define FEEP_READ_WIFI_CFG(x) flash_read_cfg(x, FEEP_ID_WIFI_CFG, sizeof(struct wlan_fast_reconnect)) +*/ + + +#endif /* _INC_FEEP_CONFIG_H_ */ diff --git a/project/inc/lwipopts.h b/project/inc/lwipopts.h new file mode 100644 index 0000000..e0bdc01 --- /dev/null +++ b/project/inc/lwipopts.h @@ -0,0 +1,381 @@ +/** + ****************************************************************************** + * @file lwipopts.h + * @author MCD Application Team + * @version V1.1.0 + * @date 07-October-2011 + * @brief lwIP Options Configuration. + * This file is based on Utilities\lwip_v1.3.2\src\include\lwip\opt.h + * and contains the lwIP configuration for the STM32F2x7 demonstration. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +#ifndef __LWIPOPTS_H__ +#define __LWIPOPTS_H__ + +#include +#include "platform_opts.h" + +/** + * LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS==1: randomize the local port for the first + * local TCP/UDP pcb (default==0). This can prevent creating predictable port + * numbers after booting a device. + */ +#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1 + +#define WIFI_LOGO_CERTIFICATION_CONFIG 1 //for ping 10k test buffer setting +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#define MEM_LIBC_MALLOC 1 +/** +* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator. +* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution +* speed and usage from interrupts! +*/ +#define MEMP_MEM_MALLOC 1 + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#define SYS_LIGHTWEIGHT_PROT 1 + +/* Define LWIP_COMPAT_MUTEX if the port has no mutexes and binary semaphores + should be used instead */ +#define LWIP_COMPAT_MUTEX 1 + +#define ETHARP_TRUST_IP_MAC 0 +#define IP_REASSEMBLY 1 +#define IP_FRAG 1 +#define ARP_QUEUEING 0 + +/** + * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname + * field. + */ +#define LWIP_NETIF_HOSTNAME 1 +#define LWIP_NETIF_HOSTNAME_SIZE 16 +/** + * netif0: DEF_HOSTNAME "0", netif1: DEF_HOSTNAME "1", .. + */ +#define DEF_HOSTNAME "rtl871x" + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#define NO_SYS 0 + +/* ---------- Memory options ---------- */ +/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which + lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 + byte alignment -> define MEM_ALIGNMENT to 2. */ +#define MEM_ALIGNMENT 4 + +/* MEM_SIZE: the size of the heap memory. If the application will send +a lot of data that needs to be copied, this should be set high. */ +#if WIFI_LOGO_CERTIFICATION_CONFIG + #define MEM_SIZE (10*1024) //for ping 10k test +#else + #define MEM_SIZE (5*1024) +#endif + +/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application + sends a lot of data out of ROM (or other static memory), this + should be set high. */ +#define MEMP_NUM_PBUF 100 +/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + per active UDP "connection". */ +#define MEMP_NUM_UDP_PCB 6 +/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP + connections. */ +#define MEMP_NUM_TCP_PCB 10 +/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP + connections. */ +#define MEMP_NUM_TCP_PCB_LISTEN 5 +/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP + segments. */ +#define MEMP_NUM_TCP_SEG 20 +/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active + timeouts. */ +#define MEMP_NUM_SYS_TIMEOUT 10 + + +/* ---------- Pbuf options ---------- */ +/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */ +#if WIFI_LOGO_CERTIFICATION_CONFIG + #define PBUF_POOL_SIZE 30 //for ping 10k test +#else + #define PBUF_POOL_SIZE 20 +#endif + +/* IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled.*/ +#if WIFI_LOGO_CERTIFICATION_CONFIG + #define IP_REASS_MAX_PBUFS 30 //for ping 10k test +#else + #define IP_REASS_MAX_PBUFS 10 +#endif + +/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ +#define PBUF_POOL_BUFSIZE 500 + + +/* ---------- TCP options ---------- */ +#define LWIP_TCP 1 +#define TCP_TTL 255 + +/* Controls if TCP should queue segments that arrive out of + order. Define to 0 if your device is low on memory. */ +#define TCP_QUEUE_OOSEQ 1 + +/* TCP Maximum segment size. */ +#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */ + +/* TCP sender buffer space (bytes). */ +#define TCP_SND_BUF (5*TCP_MSS) + +/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */ + +#define TCP_SND_QUEUELEN (4* TCP_SND_BUF/TCP_MSS) + +/* TCP receive window. */ +#define TCP_WND (4*TCP_MSS) + + +/* ---------- ICMP options ---------- */ +#define LWIP_ICMP 1 + +/* ---------- ARP options ----------- */ +#define LWIP_ARP 1 + +/* ---------- DHCP options ---------- */ +/* Define LWIP_DHCP to 1 if you want DHCP configuration of + interfaces. DHCP is not implemented in lwIP 0.5.1, however, so + turning this on does currently not work. */ +#define LWIP_DHCP 1 + +/* ---------- UDP options ---------- */ +#define LWIP_UDP 1 +#define UDP_TTL 255 +/* ---------- DNS options ---------- */ +#define LWIP_DNS 1 + +/* ---------- UPNP options --------- */ +#define LWIP_UPNP 0 + +/* Support Multicast */ +#define LWIP_IGMP 1 +#define LWIP_RAND() Rand() + +/* Support TCP Keepalive */ +#define LWIP_TCP_KEEPALIVE 1 + +/*LWIP_UART_ADAPTER==1: Enable LWIP_UART_ADAPTER when CONFIG_GAGENT is enabled, + because some GAGENT functions denpond on the following macro definitions.*/ +#if CONFIG_EXAMPLE_UART_ADAPTER +#define LWIP_UART_ADAPTER 1 +#else +#define LWIP_UART_ADAPTER 0 +#endif + +#if LWIP_UART_ADAPTER +#undef LWIP_SO_SNDTIMEO +#define LWIP_SO_SNDTIMEO 1 + +#undef SO_REUSE +#define SO_REUSE 1 + +#undef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 10 + +#undef TCP_WND +#define TCP_WND (4*TCP_MSS) + +#define TCP_KEEPIDLE_DEFAULT 10000UL +#define TCP_KEEPINTVL_DEFAULT 1000UL +#define TCP_KEEPCNT_DEFAULT 10U +#endif + +#if CONFIG_EXAMPLE_UART_ATCMD +#undef LWIP_SO_SNDTIMEO +#define LWIP_SO_SNDTIMEO 1 + +#undef SO_REUSE +#define SO_REUSE 1 + +#undef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 10 + +#undef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB (MEMP_NUM_NETCONN) + +#undef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB (MEMP_NUM_NETCONN) + +#undef TCP_WND +#define TCP_WND (4*TCP_MSS) + +#define TCP_KEEPIDLE_DEFAULT 10000UL +#define TCP_KEEPINTVL_DEFAULT 1000UL +#define TCP_KEEPCNT_DEFAULT 10U + +#define ERRNO 1 +#endif + +/* ---------- Statistics options ---------- */ +#define LWIP_STATS 0 +#define LWIP_PROVIDE_ERRNO 1 + + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ + +/* +The STM32F2x7 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware: + - To use this feature let the following define uncommented. + - To disable it and process by CPU comment the the checksum. +*/ +//Do checksum by lwip - WLAN nic does not support Checksum offload +//#define CHECKSUM_BY_HARDWARE + + +#ifdef CHECKSUM_BY_HARDWARE + /* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/ + #define CHECKSUM_GEN_IP 0 + /* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/ + #define CHECKSUM_GEN_UDP 0 + /* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/ + #define CHECKSUM_GEN_TCP 0 + /* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/ + #define CHECKSUM_CHECK_IP 0 + /* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/ + #define CHECKSUM_CHECK_UDP 0 + /* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/ + #define CHECKSUM_CHECK_TCP 0 +#else + /* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/ + #define CHECKSUM_GEN_IP 1 + /* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/ + #define CHECKSUM_GEN_UDP 1 + /* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/ + #define CHECKSUM_GEN_TCP 1 + /* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/ + #define CHECKSUM_CHECK_IP 1 + /* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/ + #define CHECKSUM_CHECK_UDP 1 + /* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/ + #define CHECKSUM_CHECK_TCP 1 +#endif + + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#define LWIP_NETCONN 1 + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#define LWIP_SOCKET 1 + +/* + ----------------------------------- + ---------- DEBUG options ---------- + ----------------------------------- +*/ + +#define LWIP_DEBUG 0 + +/* + --------------------------------- + ---------- OS options ---------- + --------------------------------- +*/ + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#define TCPIP_THREAD_STACKSIZE 1000 +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#define TCPIP_MBOX_SIZE 6 +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#define DEFAULT_UDP_RECVMBOX_SIZE 6 +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#define DEFAULT_TCP_RECVMBOX_SIZE 6 +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#define DEFAULT_RAW_RECVMBOX_SIZE 6 +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#define DEFAULT_ACCEPTMBOX_SIZE 6 +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#define DEFAULT_THREAD_STACKSIZE 500 +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#define TCPIP_THREAD_PRIO (configMAX_PRIORITIES - 2) + +/** LWIP_TIMEVAL_PRIVATE: if you want to use the struct timeval provided + * by your system, set this to 0 and include in cc.h */ +#if defined(_SYS__TIMEVAL_H_) +#define LWIP_TIMEVAL_PRIVATE 0 +#endif + +#endif /* __LWIPOPTS_H__ */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/project/inc/main.h b/project/inc/main.h new file mode 100644 index 0000000..e05a0ab --- /dev/null +++ b/project/inc/main.h @@ -0,0 +1,119 @@ +#ifndef MAIN_H +#define MAIN_H + +#include + +#ifndef CONFIG_WLAN +#define CONFIG_WLAN 1 +#endif + +/* Header file declaration*/ +void wlan_network(); + +/* Interactive Mode */ +#define SERIAL_DEBUG_RX 1 + +/* WLAN and Netork */ +#define STA_MODE_SSID "ap" /* Set SSID here */ +#define AP_MODE_SSID "wlan_ap_ssid" /* Set SSID here */ +#define AP_DEFAULT_CH 6 +#define WLAN0_NAME "wlan0" +#define WLAN1_NAME "wlan1" +#define WPA_PASSPHRASE "1234567890" /* Max 32 cahracters */ +#define WEP40_KEY {0x12, 0x34, 0x56, 0x78, 0x90} + +#define ATVER_1 1 // For First AT command +#define ATVER_2 2 // For UART Module AT command + +#if CONFIG_EXAMPLE_UART_ATCMD +#define ATCMD_VER ATVER_2 +#else +#define ATCMD_VER ATVER_1 +#endif + +#if ATCMD_VER == ATVER_2 + +extern unsigned char sta_ip[4], sta_netmask[4], sta_gw[4]; +extern unsigned char ap_ip[4], ap_netmask[4], ap_gw[4]; + +/*Static IP ADDRESS*/ +#define IP_ADDR0 sta_ip[0] +#define IP_ADDR1 sta_ip[1] +#define IP_ADDR2 sta_ip[2] +#define IP_ADDR3 sta_ip[3] + +/*NETMASK*/ +#define NETMASK_ADDR0 sta_netmask[0] +#define NETMASK_ADDR1 sta_netmask[1] +#define NETMASK_ADDR2 sta_netmask[2] +#define NETMASK_ADDR3 sta_netmask[3] + +/*Gateway Address*/ +#define GW_ADDR0 sta_gw[0] +#define GW_ADDR1 sta_gw[1] +#define GW_ADDR2 sta_gw[2] +#define GW_ADDR3 sta_gw[3] + +/*******************************************/ + +/*Static IP ADDRESS*/ +#define AP_IP_ADDR0 ap_ip[0] +#define AP_IP_ADDR1 ap_ip[1] +#define AP_IP_ADDR2 ap_ip[2] +#define AP_IP_ADDR3 ap_ip[3] + +/*NETMASK*/ +#define AP_NETMASK_ADDR0 ap_netmask[0] +#define AP_NETMASK_ADDR1 ap_netmask[1] +#define AP_NETMASK_ADDR2 ap_netmask[2] +#define AP_NETMASK_ADDR3 ap_netmask[3] + +/*Gateway Address*/ +#define AP_GW_ADDR0 ap_gw[0] +#define AP_GW_ADDR1 ap_gw[1] +#define AP_GW_ADDR2 ap_gw[2] +#define AP_GW_ADDR3 ap_gw[3] + +#else + +/*Static IP ADDRESS*/ +#define IP_ADDR0 192 +#define IP_ADDR1 168 +#define IP_ADDR2 3 +#define IP_ADDR3 80 + +/*NETMASK*/ +#define NETMASK_ADDR0 255 +#define NETMASK_ADDR1 255 +#define NETMASK_ADDR2 255 +#define NETMASK_ADDR3 0 + +/*Gateway Address*/ +#define GW_ADDR0 192 +#define GW_ADDR1 168 +#define GW_ADDR2 3 +#define GW_ADDR3 1 + +/*******************************************/ + +/*Static IP ADDRESS*/ +#define AP_IP_ADDR0 192 +#define AP_IP_ADDR1 168 +#define AP_IP_ADDR2 43 +#define AP_IP_ADDR3 1 + +/*NETMASK*/ +#define AP_NETMASK_ADDR0 255 +#define AP_NETMASK_ADDR1 255 +#define AP_NETMASK_ADDR2 255 +#define AP_NETMASK_ADDR3 0 + +/*Gateway Address*/ +#define AP_GW_ADDR0 192 +#define AP_GW_ADDR1 168 +#define AP_GW_ADDR2 43 +#define AP_GW_ADDR3 1 + +#endif //#if ATCMD_VER == ATVER_2 + +#endif diff --git a/project/inc/platform_autoconf.h b/project/inc/platform_autoconf.h new file mode 100644 index 0000000..d87e751 --- /dev/null +++ b/project/inc/platform_autoconf.h @@ -0,0 +1,251 @@ +/* + * + */ +#define AUTOCONF_INCLUDED + +#define RTL8710AF +//#define RTL8711AM +/* Image1 on project */ +#define PRESENT_IMAGE1 +/* Image2 on project */ +#define PRESENT_IMAGE2 +/* + * Target Platform Selection + */ +#define CONFIG_WITHOUT_MONITOR 1 + +#undef CONFIG_RTL8195A +#define CONFIG_RTL8195A 1 +#undef CONFIG_FPGA +#undef CONFIG_RTL_SIM +#undef CONFIG_POST_SIM +/* + * < Mass Production Option + */ +#undef CONFIG_MP +#undef CONFIG_CP +#undef CONFIG_FT +#define RTL8195A 1 +/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz, + 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */ +#define CONFIG_CPU_CLK 1 +//166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA +//83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA +//41.6MHZ - RUN/IDLE ~51/11 mA +//20.8MHZ - RUN/IDLE ~49/9.5 mA +//4MHZ - IDLE ~8 mA +#undef CONFIG_FPGA_CLK +#define CONFIG_SDR_CLK 1 +#define CONFIG_SDR_100MHZ 1 +#undef CONFIG_SDR_50MHZ +#undef CONFIG_SDR_25MHZ +#undef CONFIG_SDR_12_5MHZ +#define SDR_CLOCK_SEL_VALUE (0) +#define CONFIG_BOOT_PROCEDURE 1 +#define CONFIG_IMAGE_PAGE_LOAD 1 +#undef CONFIG_IMAGE_AUTO_LOAD +#undef CONFIG_IMAGE_PAGE_LOAD +//#define CONFIG_IMAGE_AUTO_LOAD 1 +//#define CONFIG_BOOT_TO_UPGRADE_IMG2 1 +#undef CONFIG_PERI_UPDATE_IMG +#define CONFIG_BOOT_FROM_JTAG 1 +#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE +#define CONFIG_KERNEL 1 +#define PLATFORM_FREERTOS 1 +#undef PLATFORM_UCOSII +#undef PLATFORM_ECOS +#undef CONFIG_TASK_SCHEDUL_DIS +#define TASK_SCHEDULER_DISABLED (0) +#define CONFIG_NORMALL_MODE 1 +#undef CONFIG_MEMORY_VERIFY_MODE +#define CONFIG_TIMER_EN 1 +#define CONFIG_TIMER_NORMAL 1 +#undef CONFIG_TIMER_TEST +#define CONFIG_TIMER_MODULE 1 +#define CONFIG_WDG 1 +#undef CONFIG_WDG_NON +#define CONFIG_WDG_NORMAL 1 +#define CONFIG_WDG_ON_IDLE 10 // wdt in sec -> main.c + tasks.c +#define CONFIG_GDMA_EN 1 +#define CONFIG_GDMA_NORMAL 1 +#undef CONFIG_GDMA_TEST +#define CONFIG_GDMA_MODULE 1 +#define CONFIG_WIFI_EN 1 +#define CONFIG_WIFI_NORMAL 1 +#undef CONFIG_WIFI_TEST +#define CONFIG_WIFI_MODULE 1 +#define CONFIG_GPIO_EN 1 +#define CONFIG_GPIO_NORMAL 1 +#undef CONFIG_GPIO_TEST +#define CONFIG_GPIO_MODULE 1 +#if defined(CONFIG_INIC) || (CONFIG_SDIOD) +#define CONFIG_SDIO_DEVICE_EN 1 +#define CONFIG_SDIO_DEVICE_NORMAL 1 +#undef CONFIG_SDIO_DEVICE_TEST +#define CONFIG_SDIO_DEVICE_MODULE 1 +#else +#undef CONFIG_SDIO_DEVICE_EN +#endif +#define CONFIG_SDIO_HOST_EN 1 +//#define CONFIG_USB_EN 1 +#undef CONFIG_USB_NORMAL +#define CONFIG_USB_TEST 1 +#define CONFIG_USB_MODULE 1 +#define CONFIG_USB_VERIFY 1 +#undef CONFIG_USB_ROM_LIB +//#define CONFIG_USB_DBGINFO_EN 1 +#if defined(CONFIG_INIC) || (CONFIG_USBD) +#define DWC_DEVICE_ONLY 1 +#else +#define DWC_HOST_ONLY 1 +#define CONFIG_USB_HOST_ONLY 1 +#endif +#define CONFIG_SPI_COM_EN 1 +#define CONFIG_SPI_COM_NORMAL 1 +#undef CONFIG_SPI_COM_TEST +#define CONFIG_SPI_COM_MODULE 1 +#define CONFIG_UART_EN 1 +#define CONFIG_UART_NORMAL 1 +#undef CONFIG_UART_TEST +#define CONFIG_UART_MODULE 1 +#define CONFIG_I2C_EN 1 +#define CONFIG_I2C_NORMAL 1 +#undef CONFIG_I2C_TEST +#define CONFIG_I2C_MODULE 1 +#undef CONFIG_DEBUG_LOG_I2C_HAL +#undef CONFIG_PCM_EN +#define CONFIG_I2S_EN 1 +#define CONFIG_I2S_NORMAL 1 +#undef CONFIG_I2S_TEST +#define CONFIG_I2S_MODULE 1 +#undef CONFIG_DEBUG_LOG_I2S_HAL +#define CONFIG_NFC_EN 1 +#define CONFIG_NFC_NORMAL 1 +#undef CONFIG_NFC_TEST +#define CONFIG_NFC_MODULE 1 +#define CONFIG_SOC_PS_EN 1 +#define CONFIG_SOC_PS_NORMAL 1 +#undef CONFIG_SOC_PS_TEST +#define CONFIG_SOC_PS_MODULE 1 // hal_soc_ps_monitor.c +//#define CONFIG_SOC_PS_VERIFY 1 // hal_soc_ps_monitor.c +#define CONFIG_CRYPTO_EN 1 +#define CONFIG_CRYPTO_NORMAL 1 +#undef CONFIG_CRYPTO_TEST +#define CONFIG_CRYPTO_MODULE 1 +#define CONFIG_CRYPTO_STARTUP 1 +#define CONFIG_MII_EN 0 //1 +#define CONFIG_PWM_EN 1 +#define CONFIG_PWM_NORMAL 1 +#undef CONFIG_PWM_TEST +#define CONFIG_PWM_MODULE 1 +#define CONFIG_EFUSE_EN 1 // common/mbed/targets/hal/rtl8195a/efuse_api.c +#define CONFIG_EFUSE_NORMAL 1 +#undef CONFIG_EFUSE_TEST +#define CONFIG_EFUSE_MODULE 1 +#ifdef RTL8711AM +#define CONFIG_SDR_EN 1 +#endif +#define CONFIG_SDR_NORMAL 1 +#undef CONFIG_SDR_TEST +#define CONFIG_SDR_MODULE 1 +#define CONFIG_SPIC_EN 1 +#define CONFIG_SPIC_NORMAL 1 +#undef CONFIG_SPIC_TEST +#define CONFIG_SPIC_MODULE 1 +#define CONFIG_ADC_EN 1 +//#define CONFIG_DAC_EN 1 +#define CONFIG_NOR_FLASH 1 +#undef CONFIG_SPI_FLASH +#undef CONFIG_NAND_FLASH +#undef CONFIG_NONE_FLASH +#undef CONFIG_BTBX_EN + +// add pvvx +#define CONFIG_LOG_UART_EN 1 + +/* + * < Engineer Mode Config + */ +#undef CONFIG_JTAG +#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE +#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE +#undef CONFIG_CMSIS_MATH_LIB_EN + +/* + * < Application Config + */ +#define CONFIG_NETWORK 1 +#define CONFIG_RTLIB_EN 1 +#define CONFIG_RTLIB_NORMAL 1 +#undef CONFIG_RTLIB_TEST +#define CONFIG_RTLIB_MODULE 1 + +/* + * < System Debug Message Config + */ +#define CONFIG_UART_LOG_HISTORY 1 +#undef CONFIG_CONSOLE_NORMALL_MODE +#define CONFIG_CONSOLE_VERIFY_MODE 1 + +/* CONFIG_DEBUG_LOG: +=0 Off all diag/debug msg, +=1 Only errors, +=2 errors + warning, (default) +=3 errors + warning + info, +=4 errors + warning + info + debug, +=5 full */ +#define CONFIG_DEBUG_LOG 2 +#if CONFIG_DEBUG_LOG > 0 +//#define CONFIG_DEBUG_ERR_MSG 1 +#define CONFIG_DEBUG_LOG_ADC_HAL 1 +#define CONFIG_DEBUG_LOG_I2S_HAL 1 +//#undef CONFIG_DEBUG_WARN_MSG +//#undef CONFIG_DEBUG_INFO_MSG +#endif // CONFIG_DEBUG_LOG +/* + * < SDK Option Config + */ +#undef CONFIG_MBED_ENABLED +#undef CONFIG_APP_DEMO + +/* + * < Select Chip Version + */ +#undef CONFIG_CHIP_A_CUT +#define CONFIG_CHIP_B_CUT 1 +#undef CONFIG_CHIP_C_CUT +#undef CONFIG_CHIP_E_CUT + +/* + * < Select toolchain + */ +#undef CONFIG_TOOLCHAIN_ASDK +#undef CONFIG_TOOLCHAIN_ARM_GCC + +/* + * < Build Option + */ +#define CONFIG_LINK_ROM_LIB 1 +#undef CONFIG_LINK_ROM_SYMB +#undef CONFIG_NORMAL_BUILD +#undef CONFIG_RELEASE_BUILD +#undef CONFIG_RELEASE_BUILD_LIBRARIES +#undef CONFIG_LIB_BUILD_RAM +#define CONFIG_RELEASE_BUILD_RAM_ALL 1 +#undef CONFIG_IMAGE_ALL +#define CONFIG_IMAGE_SEPARATE 1 + +#if CONFIG_CPU_CLK < 6 +#define CPU_CLOCK_SEL_DIV5_3 0 +#define CPU_CLOCK_SEL_VALUE CONFIG_CPU_CLK +#else +#define CPU_CLOCK_SEL_DIV5_3 1 +#define CPU_CLOCK_SEL_VALUE (CONFIG_CPU_CLK-6) +#endif + +#if CPU_CLOCK_SEL_DIV5_3 +#define PLATFORM_CLOCK (200000000ul>>CPU_CLOCK_SEL_VALUE) +#else +#define PLATFORM_CLOCK (((200000000ul*5ul)/6ul)>>CPU_CLOCK_SEL_VALUE) +#endif + diff --git a/project/inc/platform_opts.h b/project/inc/platform_opts.h new file mode 100644 index 0000000..6db83c2 --- /dev/null +++ b/project/inc/platform_opts.h @@ -0,0 +1,171 @@ +/** + ****************************************************************************** + *This file contains general configurations for ameba platform + ****************************************************************************** +*/ +#ifndef __PLATFORM_OPTS_H__ +#define __PLATFORM_OPTS_H__ + +/*For MP mode setting*/ +#define SUPPORT_MP_MODE 0 + +/** + * For AT cmd Log service configurations + */ +#define SUPPORT_LOG_SERVICE 0 +#if SUPPORT_LOG_SERVICE +#define LOG_SERVICE_BUFLEN 100 //can't larger than UART_LOG_CMD_BUFLEN(127) +#define CONFIG_LOG_HISTORY 0 +#if CONFIG_LOG_HISTORY +#define LOG_HISTORY_LEN 5 +#endif +#define SUPPORT_INTERACTIVE_MODE 0 //on/off wifi_interactive_mode +#define CONFIG_LOG_SERVICE_LOCK 0 +#endif + +/** + * For interactive mode configurations, depends on log service + */ +#if SUPPORT_INTERACTIVE_MODE +#define CONFIG_INTERACTIVE_MODE 1 +#define CONFIG_INTERACTIVE_EXT 0 +#else +#define CONFIG_INTERACTIVE_MODE 0 +#define CONFIG_INTERACTIVE_EXT 0 +#endif + +/** + * For FreeRTOS tickless configurations + */ +#define FREERTOS_PMU_TICKLESS_PLL_RESERVED 0 // In sleep mode, 0: close PLL clock, 1: reserve PLL clock +#define FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM 1 // In sleep mode, 1: suspend SDRAM, 0: no act + +/******************************************************************************/ + +/** +* For common flash usage +*/ +#define AP_SETTING_SECTOR 0x000FE000 +#define UART_SETTING_SECTOR 0x000FC000 +#define FAST_RECONNECT_DATA (0x80000 - 0x1000) + +/** + * For Wlan configurations + */ +#define CONFIG_WLAN 1 +#if CONFIG_WLAN +#define CONFIG_LWIP_LAYER 1 +#define CONFIG_AT_USR 1 // add pvxx +//#define CONFIG_AT_LWIP 1 // add pvxx +//#define CONFIG_AT_SYS 1 // add pvxx +//#define CONFIG_AT_WIFI 1 // add pvxx +#define CONFIG_INIT_NET 1 // init lwip layer when start up +#define CONFIG_WIFI_IND_USE_THREAD 0 // wifi indicate worker thread + +//on/off relative commands in log service +#define CONFIG_SSL_CLIENT 0 +#define CONFIG_WEBSERVER 0 +#define CONFIG_OTA_UPDATE 1 +#define CONFIG_BSD_TCP 1 //NOTE : Enable CONFIG_BSD_TCP will increase about 11KB code size +#define CONFIG_AIRKISS 0 //on or off tencent airkiss +#define CONFIG_UART_SOCKET 0 // Set: CONFIG_UART_EN, CONFIG_UART_SOCKET +#define CONFIG_UART_XMODEM 0 //support uart xmodem upgrade or not +#define CONFIG_TRANSPORT 0 //on or off the at command for transport socket + +/* For WPS and P2P */ +#define CONFIG_ENABLE_WPS 1 //SK Hack +#define CONFIG_ENABLE_P2P 1 //SK Hack +#if CONFIG_ENABLE_P2P +#define CONFIG_ENABLE_WPS_AP 1 +#undef CONFIG_WIFI_IND_USE_THREAD +#define CONFIG_WIFI_IND_USE_THREAD 1 +#endif +#if (CONFIG_ENABLE_P2P && ((CONFIG_ENABLE_WPS_AP == 0) || (CONFIG_ENABLE_WPS == 0))) +#error "If CONFIG_ENABLE_P2P, need to define CONFIG_ENABLE_WPS_AP 1" +#endif + +/* For Simple Link */ +#define CONFIG_INCLUDE_SIMPLE_CONFIG 0 + +/*For wowlan service settings*/ +#define CONFIG_WOWLAN_SERVICE 0 + +#endif //end of #if CONFIG_WLAN +/*******************************************************************************/ + +/** + * For Ethernet configurations + */ +#define CONFIG_ETHERNET 0 +#if CONFIG_ETHERNET + +#define CONFIG_LWIP_LAYER 1 +#define CONFIG_INIT_NET 1 //init lwip layer when start up + +//on/off relative commands in log service +#define CONFIG_SSL_CLIENT 0 +#define CONFIG_BSD_TCP 0 //NOTE : Enable CONFIG_BSD_TCP will increase about 11KB code size + +#endif + + +/** + * For iNIC configurations + */ +#ifdef CONFIG_INIC //this flag is defined in IAR project +#define CONFIG_INIC_EN 1 //enable iNIC mode +#undef CONFIG_ENABLE_WPS +#define CONFIG_ENABLE_WPS 1 +#undef CONFIG_INCLUDE_SIMPLE_CONFIG +#define CONFIG_INCLUDE_SIMPLE_CONFIG 1 +#undef CONFIG_WOWLAN_SERVICE +#define CONFIG_WOWLAN_SERVICE 1 +#undef LOG_SERVICE_BUFLEN +#define LOG_SERVICE_BUFLEN 256 +#undef CONFIG_LWIP_LAYER +#define CONFIG_LWIP_LAYER 0 +#undef CONFIG_OTA_UPDATE +#define CONFIG_OTA_UPDATE 0 +#undef CONFIG_EXAMPLE_WLAN_FAST_CONNECT +#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0 +#define CONFIG_INIC_SDIO_HCI 1 //for SDIO or USB iNIC +#define CONFIG_INIC_USB_HCI 0 +#define CONFIG_INIC_CMD_RSP 1 //need to return msg to host +#endif +/******************End of iNIC configurations*******************/ + +/* For UART Module AT command example */ +#define CONFIG_EXAMPLE_UART_ATCMD 0 +#if CONFIG_EXAMPLE_UART_ATCMD +#undef FREERTOS_PMU_TICKLESS_PLL_RESERVED +#define FREERTOS_PMU_TICKLESS_PLL_RESERVED 1 +#undef CONFIG_OTA_UPDATE +#define CONFIG_OTA_UPDATE 1 +#undef CONFIG_TRANSPORT +#define CONFIG_TRANSPORT 1 +#undef LOG_SERVICE_BUFLEN +#define LOG_SERVICE_BUFLEN 1600 +#undef CONFIG_LOG_SERVICE_LOCK +#define CONFIG_LOG_SERVICE_LOCK 1 +#else +#define CONFIG_EXAMPLE_WLAN_FAST_CONNECT 0 +#endif + +//#define CONFIG_EXAMPLE_UART_ADAPTER 1 +//#define CONFIG_EXAMPLE_MDNS +#define USE_FLASH_EEP 1 +#define CONFIG_WLAN_CONNECT_CB 1 + +//#define CONFIG_FATFS_EN 1 // FatFs & SD + +#ifdef CONFIG_FATFS_EN +// fatfs version +#define FATFS_R_10C +// fatfs disk interface +#define FATFS_DISK_USB 0 +#define FATFS_DISK_SD 1 +#undef CONFIG_SDIO_HOST_EN +#define CONFIG_SDIO_HOST_EN 1 +#endif + +#endif // __PLATFORM_OPTS_H__ diff --git a/project/inc/rtl8195a/c_types.h b/project/inc/rtl8195a/c_types.h new file mode 100644 index 0000000..239d801 --- /dev/null +++ b/project/inc/rtl8195a/c_types.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2010 - 2011 Espressif System + * + */ + +#ifndef _C_TYPES_H_ +#define _C_TYPES_H_ + +typedef unsigned char uint8_t; +typedef signed char sint8_t; +typedef signed char int8_t; +typedef unsigned short uint16_t; +typedef signed short sint16_t; +typedef signed short int16_t; +typedef unsigned long uint32_t; +typedef signed long sint32_t; +typedef signed long int32_t; +typedef signed long long sint64_t; +typedef unsigned long long uint64_t; +typedef unsigned long long u_int64_t; +typedef float real32_t; +typedef double real64_t; + +typedef unsigned char uint8; +typedef unsigned char u8; +typedef signed char sint8; +typedef signed char int8; +typedef signed char s8; +typedef unsigned short uint16; +typedef unsigned short u16; +typedef signed short sint16; +typedef signed short s16; +typedef unsigned int uint32; +typedef unsigned int u_int; +typedef unsigned int u32; +typedef signed int sint32; +typedef signed int s32; +typedef int int32; +typedef signed long long sint64; +typedef unsigned long long uint64; +typedef unsigned long long u64; +typedef float real32; +typedef double real64; + +#define __le16 u16 + +typedef unsigned int size_t; +typedef int ssize_t; + +#ifndef _SYS_CDEFS_H_ +#define __packed __attribute__((packed)) +#endif + +#define LOCAL static + +#ifndef NULL +#define NULL (void *)0 +#endif /* NULL */ + +/* probably should not put STATUS here */ +typedef enum { + OK = 0, + FAIL, + PENDING, + BUSY, + CANCEL, +} STATUS; + +#define BIT(nr) (1UL << (nr)) + +#define REG_SET_BIT(_r, _b) (*(volatile uint32_t*)(_r) |= (_b)) +#define REG_CLR_BIT(_r, _b) (*(volatile uint32_t*)(_r) &= ~(_b)) + +#define DMEM_ATTR +#define SHMEM_ATTR + +#ifdef ICACHE_FLASH +#define ICACHE_FLASH_ATTR +#define ICACHE_RODATA_ATTR +#else +#define ICACHE_FLASH_ATTR +#define ICACHE_RODATA_ATTR +#endif /* ICACHE_FLASH */ + +#ifndef __cplusplus +typedef unsigned char bool; +//#define BOOL bool +#define true (1) +#define false (0) +#define TRUE true +#define FALSE false + + +#endif /* !__cplusplus */ + +#endif /* _C_TYPES_H_ */ diff --git a/project/inc/rtl8195a/os.h b/project/inc/rtl8195a/os.h new file mode 100644 index 0000000..2a0a4a7 --- /dev/null +++ b/project/inc/rtl8195a/os.h @@ -0,0 +1,593 @@ +/* + * OS specific functions + * Copyright (c) 2005-2009, Jouni Malinen + * + * This software may be distributed under the terms of the BSD license. + * See README for more details. + */ + +#ifndef OS_H +#define OS_H + +//#include "basic_types.h" +#include +#include "osdep_service.h" +#include "freertos/wrapper.h" +#include "utils/rom/rom_wps_os.h" + +typedef void* xqueue_handle_t; + +typedef long os_time_t; + +typedef _timer os_timer; + +/** + * os_sleep - Sleep (sec, usec) + * @sec: Number of seconds to sleep + * @usec: Number of microseconds to sleep + */ +void os_sleep(os_time_t sec, os_time_t usec); + +struct os_time { + os_time_t sec; + os_time_t usec; +}; + +struct os_reltime { + os_time_t sec; + os_time_t usec; +}; + +/** + * os_get_time - Get current time (sec, usec) + * @t: Pointer to buffer for the time + * Returns: 0 on success, -1 on failure + */ +int os_get_time(struct os_time *t); + +int os_get_reltime(struct os_reltime *t); +/* Helper macros for handling struct os_time */ +/* (&timeout->time, &tmp->time) */ +#define os_time_before(a, b) \ + ((a)->sec < (b)->sec || \ + ((a)->sec == (b)->sec && (a)->usec < (b)->usec)) + +#define os_time_sub(a, b, res) do { \ + (res)->sec = (a)->sec - (b)->sec; \ + (res)->usec = (a)->usec - (b)->usec; \ + if ((res)->usec < 0) { \ + (res)->sec--; \ + (res)->usec += 1000000; \ + } \ +} while (0) + +/** + * os_mktime - Convert broken-down time into seconds since 1970-01-01 + * @year: Four digit year + * @month: Month (1 .. 12) + * @day: Day of month (1 .. 31) + * @hour: Hour (0 .. 23) + * @min: Minute (0 .. 59) + * @sec: Second (0 .. 60) + * @t: Buffer for returning calendar time representation (seconds since + * 1970-01-01 00:00:00) + * Returns: 0 on success, -1 on failure + * + * Note: The result is in seconds from Epoch, i.e., in UTC, not in local time + * which is used by POSIX mktime(). + */ +int os_mktime(int year, int month, int day, int hour, int min, int sec, + os_time_t *t); + +struct os_tm { + int sec; /* 0..59 or 60 for leap seconds */ + int min; /* 0..59 */ + int hour; /* 0..23 */ + int day; /* 1..31 */ + int month; /* 1..12 */ + int year; /* Four digit year */ +}; + +int os_gmtime(os_time_t t, struct os_tm *tm); + +/* Helpers for handling struct os_time */ + +/* Helpers for handling struct os_reltime */ + +static inline int os_reltime_before(struct os_reltime *a, + struct os_reltime *b) +{ + return os_time_before(a,b); +} + + +static inline void os_reltime_sub(struct os_reltime *a, struct os_reltime *b, + struct os_reltime *res) +{ + os_time_sub(a,b,res); +} + + +static inline void os_reltime_age(struct os_reltime *start, + struct os_reltime *age) +{ + struct os_reltime now; + + os_get_time((struct os_time *)&now); + os_reltime_sub(&now, start, age); +} + + +static inline int os_reltime_expired(struct os_reltime *now, + struct os_reltime *ts, + os_time_t timeout_secs) +{ + struct os_reltime age; + + os_reltime_sub(now, ts, &age); + return (age.sec > timeout_secs) || + (age.sec == timeout_secs && age.usec > 0); +} + +/** + * os_daemonize - Run in the background (detach from the controlling terminal) + * @pid_file: File name to write the process ID to or %NULL to skip this + * Returns: 0 on success, -1 on failure + */ +int os_daemonize(const char *pid_file); + +/** + * os_daemonize_terminate - Stop running in the background (remove pid file) + * @pid_file: File name to write the process ID to or %NULL to skip this + */ +void os_daemonize_terminate(const char *pid_file); + +/** + * os_get_random - Get cryptographically strong pseudo random data + * @buf: Buffer for pseudo random data + * @len: Length of the buffer + * Returns: 0 on success, -1 on failure + */ +int os_get_random(unsigned char *buf, size_t len); + +/** + * os_random - Get pseudo random value (not necessarily very strong) + * Returns: Pseudo random value + */ +unsigned long os_random(void); + +/** + * os_rel2abs_path - Get an absolute path for a file + * @rel_path: Relative path to a file + * Returns: Absolute path for the file or %NULL on failure + * + * This function tries to convert a relative path of a file to an absolute path + * in order for the file to be found even if current working directory has + * changed. The returned value is allocated and caller is responsible for + * freeing it. It is acceptable to just return the same path in an allocated + * buffer, e.g., return strdup(rel_path). This function is only used to find + * configuration files when os_daemonize() may have changed the current working + * directory and relative path would be pointing to a different location. + */ +char * os_rel2abs_path(const char *rel_path); + +/** + * os_program_init - Program initialization (called at start) + * Returns: 0 on success, -1 on failure + * + * This function is called when a programs starts. If there are any OS specific + * processing that is needed, it can be placed here. It is also acceptable to + * just return 0 if not special processing is needed. + */ +int os_program_init(void); + +/** + * os_program_deinit - Program deinitialization (called just before exit) + * + * This function is called just before a program exists. If there are any OS + * specific processing, e.g., freeing resourced allocated in os_program_init(), + * it should be done here. It is also acceptable for this function to do + * nothing. + */ +void os_program_deinit(void); + +/** + * os_setenv - Set environment variable + * @name: Name of the variable + * @value: Value to set to the variable + * @overwrite: Whether existing variable should be overwritten + * Returns: 0 on success, -1 on error + * + * This function is only used for wpa_cli action scripts. OS wrapper does not + * need to implement this if such functionality is not needed. + */ +int os_setenv(const char *name, const char *value, int overwrite); + +/** + * os_unsetenv - Delete environent variable + * @name: Name of the variable + * Returns: 0 on success, -1 on error + * + * This function is only used for wpa_cli action scripts. OS wrapper does not + * need to implement this if such functionality is not needed. + */ +int os_unsetenv(const char *name); + +/** + * os_readfile - Read a file to an allocated memory buffer + * @name: Name of the file to read + * @len: For returning the length of the allocated buffer + * Returns: Pointer to the allocated buffer or %NULL on failure + * + * This function allocates memory and reads the given file to this buffer. Both + * binary and text files can be read with this function. The caller is + * responsible for freeing the returned buffer with os_free(). + */ +char * os_readfile(const char *name, size_t *len); + +//#if 0 +/** + * os_zalloc - Allocate and zero memory + * @size: Number of bytes to allocate + * Returns: Pointer to allocated and zeroed memory or %NULL on failure + * + * Caller is responsible for freeing the returned buffer with os_free(). + */ +void * os_zalloc(size_t size); + +/** + * os_calloc - Allocate and zero memory for an array + * @nmemb: Number of members in the array + * @size: Number of bytes in each member + * Returns: Pointer to allocated and zeroed memory or %NULL on failure + * + * This function can be used as a wrapper for os_zalloc(nmemb * size) when an + * allocation is used for an array. The main benefit over os_zalloc() is in + * having an extra check to catch integer overflows in multiplication. + * + * Caller is responsible for freeing the returned buffer with os_free(). + */ +static inline void * os_calloc(size_t nmemb, size_t size) +{ + if (size && nmemb > (~(size_t) 0) / size) + return NULL; + return os_zalloc(nmemb * size); +} +//#endif + + +static inline int os_memcmp_const(const void *a, const void *b, size_t len) +{ + const u8 *aa = a; + const u8 *bb = b; + size_t i; + u8 res; + + for (res = 0, i = 0; i < len; i++) + res |= aa[i] ^ bb[i]; + + return res; +} + +/* + * The following functions are wrapper for standard ANSI C or POSIX functions. + * By default, they are just defined to use the standard function name and no + * os_*.c implementation is needed for them. This avoids extra function calls + * by allowing the C pre-processor take care of the function name mapping. + * + * If the target system uses a C library that does not provide these functions, + * build_config.h can be used to define the wrappers to use a different + * function name. This can be done on function-by-function basis since the + * defines here are only used if build_config.h does not define the os_* name. + * If needed, os_*.c file can be used to implement the functions that are not + * included in the C library on the target system. Alternatively, + * OS_NO_C_LIB_DEFINES can be defined to skip all defines here in which case + * these functions need to be implemented in os_*.c file for the target system. + */ + +#ifdef OS_NO_C_LIB_DEFINES + +/** + * os_malloc - Allocate dynamic memory + * @size: Size of the buffer to allocate + * Returns: Allocated buffer or %NULL on failure + * + * Caller is responsible for freeing the returned buffer with os_free(). + */ +void * os_malloc(size_t size); + +/** + * os_realloc - Re-allocate dynamic memory + * @ptr: Old buffer from os_malloc() or os_realloc() + * @size: Size of the new buffer + * Returns: Allocated buffer or %NULL on failure + * + * Caller is responsible for freeing the returned buffer with os_free(). + * If re-allocation fails, %NULL is returned and the original buffer (ptr) is + * not freed and caller is still responsible for freeing it. + */ +void * os_realloc(void *ptr, size_t size); + +/** + * os_free - Free dynamic memory + * @ptr: Old buffer from os_malloc() or os_realloc(); can be %NULL + */ +void os_free(void *ptr); + +/** + * os_memcpy - Copy memory area + * @dest: Destination + * @src: Source + * @n: Number of bytes to copy + * Returns: dest + * + * The memory areas src and dst must not overlap. os_memmove() can be used with + * overlapping memory. + */ +void * os_memcpy(void *dest, const void *src, size_t n); + +/** + * os_memmove - Copy memory area + * @dest: Destination + * @src: Source + * @n: Number of bytes to copy + * Returns: dest + * + * The memory areas src and dst may overlap. + */ +void *os_memmove(void *dest, const void *src, size_t n); + +/** + * os_memset - Fill memory with a constant byte + * @s: Memory area to be filled + * @c: Constant byte + * @n: Number of bytes started from s to fill with c + * Returns: s + */ +void *os_memset(void *s, int c, size_t n); + +/** + * os_memcmp - Compare memory areas + * @s1: First buffer + * @s2: Second buffer + * @n: Maximum numbers of octets to compare + * Returns: An integer less than, equal to, or greater than zero if s1 is + * found to be less than, to match, or be greater than s2. Only first n + * characters will be compared. + */ +int os_memcmp(const void *s1, const void *s2, size_t n); + +/** + * os_strdup - Duplicate a string + * @s: Source string + * Returns: Allocated buffer with the string copied into it or %NULL on failure + * + * Caller is responsible for freeing the returned buffer with os_free(). + */ +char *os_strdup(const char *s); + +/** + * os_strlen - Calculate the length of a string + * @s: '\0' terminated string + * Returns: Number of characters in s (not counting the '\0' terminator) + */ +size_t os_strlen(const char *s); + +/** + * os_strcasecmp - Compare two strings ignoring case + * @s1: First string + * @s2: Second string + * Returns: An integer less than, equal to, or greater than zero if s1 is + * found to be less than, to match, or be greatred than s2 + */ +int os_strcasecmp(const char *s1, const char *s2); + +/** + * os_strncasecmp - Compare two strings ignoring case + * @s1: First string + * @s2: Second string + * @n: Maximum numbers of characters to compare + * Returns: An integer less than, equal to, or greater than zero if s1 is + * found to be less than, to match, or be greater than s2. Only first n + * characters will be compared. + */ +int os_strncasecmp(const char *s1, const char *s2, size_t n); + +/** + * os_strchr - Locate the first occurrence of a character in string + * @s: String + * @c: Character to search for + * Returns: Pointer to the matched character or %NULL if not found + */ +char *os_strchr(const char *s, int c); + +/** + * os_strrchr - Locate the last occurrence of a character in string + * @s: String + * @c: Character to search for + * Returns: Pointer to the matched character or %NULL if not found + */ +char *os_strrchr(const char *s, int c); + +/** + * os_strcmp - Compare two strings + * @s1: First string + * @s2: Second string + * Returns: An integer less than, equal to, or greater than zero if s1 is + * found to be less than, to match, or be greatred than s2 + */ +int os_strcmp(const char *s1, const char *s2); + +/** + * os_strncmp - Compare two strings + * @s1: First string + * @s2: Second string + * @n: Maximum numbers of characters to compare + * Returns: An integer less than, equal to, or greater than zero if s1 is + * found to be less than, to match, or be greater than s2. Only first n + * characters will be compared. + */ +int os_strncmp(const char *s1, const char *s2, size_t n); + +/** + * os_strncpy - Copy a string + * @dest: Destination + * @src: Source + * @n: Maximum number of characters to copy + * Returns: dest + */ +char *os_strncpy(char *dest, const char *src, size_t n); + +/** + * os_strstr - Locate a substring + * @haystack: String (haystack) to search from + * @needle: Needle to search from haystack + * Returns: Pointer to the beginning of the substring or %NULL if not found + */ +char *os_strstr(const char *haystack, const char *needle); + +/** + * os_snprintf - Print to a memory buffer + * @str: Memory buffer to print into + * @size: Maximum length of the str buffer + * @format: printf format + * Returns: Number of characters printed (not including trailing '\0'). + * + * If the output buffer is truncated, number of characters which would have + * been written is returned. Since some C libraries return -1 in such a case, + * the caller must be prepared on that value, too, to indicate truncation. + * + * Note: Some C library implementations of snprintf() may not guarantee null + * termination in case the output is truncated. The OS wrapper function of + * os_snprintf() should provide this guarantee, i.e., to null terminate the + * output buffer if a C library version of the function is used and if that + * function does not guarantee null termination. + * + * If the target system does not include snprintf(), see, e.g., + * http://www.ijs.si/software/snprintf/ for an example of a portable + * implementation of snprintf. + */ +int os_snprintf(char *str, size_t size, const char *format, ...); + +#else /* OS_NO_C_LIB_DEFINES */ + +#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B) +#ifdef CONFIG_MEM_MONITOR + u8* os_malloc(u32 sz); + void os_mfree(u8 *pbuf, u32 sz); + #ifndef os_free + #define os_free(p, sz) os_mfree(((u8*)(p)), (sz)) + #endif +#else + #ifndef os_malloc + #define os_malloc(sz) _rtw_malloc(sz) + #endif + #ifndef os_free + #define os_free(p, sz) _rtw_mfree(((u8*)(p)), (sz)) + #endif +#endif +#endif + extern void *os_zalloc(size_t size); + extern char *os_strdup(const char *string_copy_from); + + #ifndef os_sleep + #define os_sleep(s, us) rtw_mdelay_os((s)*1000 + (us)/1000) + #endif + #ifndef os_memcpy + #define os_memcpy(d, s, n) rtw_memcpy((void*)(d), ((void*)(s)), (n)) + #endif + #ifndef os_memmove + #define os_memmove(d, s, n) memmove((d), (s), (n)) + #endif + #ifndef os_memset + #define os_memset(pbuf, c, sz) rtw_memset(pbuf, c, sz) + #endif + #ifndef os_memcmp + #define os_memcmp(s1, s2, n) rtw_memcmp(((void*)(s1)), ((void*)(s2)), (n)) + #endif + #ifndef os_memcmp_p2p + #define os_memcmp_p2p(s1, s2, n) memcmp((s1), (s2), (n)) + #endif + #ifndef os_get_random_bytes + #define os_get_random_bytes(d,sz) rtw_get_random_bytes(((void*)(d)), (sz)) + #endif + #ifndef os_strlen + #define os_strlen(s) strlen(s) + #endif + #ifndef os_strcasecmp + #ifdef _MSC_VER + #define os_strcasecmp(s1, s2) _stricmp((s1), (s2)) + #else + #define os_strcasecmp(s1, s2) strcasecmp((s1), (s2)) + #endif + #endif + #ifndef os_strncasecmp + #ifdef _MSC_VER + #define os_strncasecmp(s1, s2, n) _strnicmp((s1), (s2), (n)) + #else + #define os_strncasecmp(s1, s2, n) strncasecmp((s1), (s2), (n)) + #endif + #endif + #ifndef os_init_timer + #define os_init_timer(t, p, f, x, n) rtw_init_timer((t), (p), (f), (x), (n)) + #endif + #ifndef os_set_timer + #define os_set_timer(t, d) rtw_set_timer((t), (d)) + #endif + #ifndef os_cancel_timer + #define os_cancel_timer(t) rtw_cancel_timer(t) + #endif + #ifndef os_del_timer + #define os_del_timer(t) rtw_del_timer(t) + #endif + #ifndef os_atoi + #define os_atoi(s) rtw_atoi(s) + #endif + +#ifndef os_strchr +#define os_strchr(s, c) strchr((s), (c)) +#endif +#ifndef os_strcmp +#define os_strcmp(s1, s2) strcmp((s1), (s2)) +#endif +#ifndef os_strncmp +#define os_strncmp(s1, s2, n) strncmp((s1), (s2), (n)) +#endif +#ifndef os_strncpy +#define os_strncpy(d, s, n) strncpy((d), (s), (n)) +#endif +#ifndef os_strrchr +#define os_strrchr(s, c) strrchr((s), (c)) +#endif +#ifndef os_strstr +#define os_strstr(h, n) strstr((h), (n)) +#endif + +#ifndef os_snprintf + #ifdef _MSC_VER + #define os_snprintf _snprintf + #else + #define os_snprintf snprintf + #endif +#endif + +#endif /* OS_NO_C_LIB_DEFINES */ + + +static inline void * os_realloc_array(void *ptr, size_t nmemb, size_t size) +{ + if (size && nmemb > (~(size_t) 0) / size) + return NULL; + return os_realloc(ptr, nmemb * size, nmemb * size); +} + +void *os_xqueue_create(unsigned long uxQueueLength, unsigned long uxItemSize) ; + +int os_xqueue_receive(xqueue_handle_t xQueue, void * const pvBuffer, unsigned long xSecsToWait); + +void os_xqueue_delete(xqueue_handle_t xQueue ); + +int os_xqueue_send(xqueue_handle_t xQueue, const void * const pvItemToQueue, unsigned long xSecsToWait); + + +#endif /* OS_H */ diff --git a/project/inc/rtl8195a/rom_wps_os.h b/project/inc/rtl8195a/rom_wps_os.h new file mode 100644 index 0000000..cd41061 --- /dev/null +++ b/project/inc/rtl8195a/rom_wps_os.h @@ -0,0 +1,24 @@ +/* + * OS specific functions + * Copyright (c) 2005-2009, Jouni Malinen + * + * This software may be distributed under the terms of the BSD license. + * See README for more details. + */ + +#ifndef ROM_WPS_OS_H +#define ROM_WPS_OS_H + +#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B) + +#include +extern struct _rom_wlan_ram_map rom_wlan_ram_map; +#define os_malloc(sz) rom_wlan_ram_map.rtw_malloc(sz) +#define os_free(p, sz) rom_wlan_ram_map.rtw_mfree(((u8*)(p)), (sz)) + +#endif + +extern u8 *WPS_realloc(u8 *old_buf, u32 old_sz, u32 new_sz); +#define os_realloc(p, os, ns) WPS_realloc(((u8*)(p)),(os),(ns)) + +#endif /* ROM_WPS_OS_H */ diff --git a/project/inc/rtl8195a/rtl_common.h b/project/inc/rtl8195a/rtl_common.h new file mode 100644 index 0000000..a107e16 --- /dev/null +++ b/project/inc/rtl8195a/rtl_common.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) + * + */ + +#ifndef __RTL_COMMON_H__ +#define __RTL_COMMON_H__ + +#include +#include +#include + +#include "c_types.h" + +#endif diff --git a/project/inc/rtl8195a/rtl_libc.h b/project/inc/rtl8195a/rtl_libc.h new file mode 100644 index 0000000..15733fc --- /dev/null +++ b/project/inc/rtl8195a/rtl_libc.h @@ -0,0 +1,164 @@ +/* +* ROM calls +*/ + +#ifndef _INC_RTL_LIBC_ +#define _INC_RTL_LIBC_ + +//#undef malloc +#define malloc(size) pvPortMalloc(size) +//#undef free +#define free(pbuf) vPortFree(pbuf) + +#define atoi(str) prvAtoi(str) + +#define calloc(nelements, elementSize) calloc_freertos(nelements, elementSize) + +#define snprintf rtl_snprintf +#define sprintf rtl_sprintf +#define printf rtl_printf +#define vprintf rtl_vprintf +#define vsnprintf rtl_vsnprintf +#define vfprintf rtl_vfprintf +#define memchr rtl_memchr +#define memcmp rtl_memcmp +#define memcpy rtl_memcpy +#define memmove rtl_memmove +#define memset rtl_memset +#define strcat rtl_strcat +#define strchr rtl_strchr +#define strcmp rtl_strcmp +#define strcpy rtl_strcpy +#define strlen rtl_strlen +#define strncat rtl_strncat +#define strncmp rtl_strncmp +#define strncpy rtl_strncpy +#define strstr rtl_strstr +#define strsep rtl_strsep +#define strtok rtl_strtok + +#define dtoi rtl_dtoi +#define dtoui rtl_dtoui +#define i2f rtl_i2f +#define i2d rtl_i2d +#define ui2f rtl_ui2f +#define ui2d rtl_ui2d +#define itoa rtl_itoa +#define ltoa rtl_ltoa +#define utoa rtl_utoa +#define ultoa rtl_ultoa +#define ftol rtl_ftol +#define ftod rtl_ftod +#define dtof rtl_dtof +#define fadd rtl_fadd +#define fsub rtl_fsub +#define fmul rtl_fmul +#define fdiv rtl_fdiv +#define dadd rtl_dadd +#define dsub rtl_dsub +#define dmul rtl_dmul +#define ddiv rtl_ddiv +#define dcmpeq rtl_dcmpeq +#define dcmplt rtl_dcmplt +#define dcmple rtl_dcmple +#define dcmpgt rtl_dcmpgt +#define fcmplt rtl_fcmplt +#define fcmpgt rtl_fcmpgt + +#define fabsf rtl_fabsf +#define fabs rtl_fabs +#define cos_f32 rtl_cos_f32 +#define sin_f32 rtl_sin_f32 + + +#if 0 +extern void *calloc_freertos(size_t nelements, size_t elementSize); +// ram_libc.c +extern int rtl_snprintf(char *str, size_t size, const char *fmt, ...); +extern int rtl_sprintf(char *str, const char *fmt, ...); +extern int rtl_printf(const char *fmt, ...); +extern int rtl_vprintf(const char *fmt, void *param); +extern int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param); +extern int rtl_vfprintf(FILE *fp, const char *fmt0, va_list ap); +extern int rtl_memchr(const void *src_void, int c, size_t length); +extern int rtl_memcmp(const void *m1, const void *m2, size_t n); +extern int rtl_memcpy(void *dst0, const void *src0, size_t len0); +extern int rtl_memmove(void *dst_void, const void *src_void, size_t length); +extern int rtl_memset(void *m, int c, size_t n); +extern char * rtl_strcat(char *s1, const char *s2); +extern char * rtl_strchr(const char *s1, int i); +extern int rtl_strcmp(const char *s1, const char *s2); +extern char * rtl_strcpy(char *dst0, const char *src0); +extern int rtl_strlen(const char *str); +extern char * rtl_strncat(char *s1, const char *s2, size_t n); +extern int rtl_strncmp(const char *s1, const char *s2, size_t n); +extern char * rtl_strncpy(char *dst0, const char *src0, size_t count); +extern char * rtl_strstr(const char *searchee, const char *lookfor); +extern char * rtl_strsep(char **source_ptr, const char *delim); +extern char * rtl_strtok(char *s, const char *delim); + +//rtl_eabi_cast_ram.c +extern int rtl_dtoi(double d); +extern int rtl_dtoui(double d); +extern float rtl_i2f(int val); +extern int rtl_i2d(int val); +extern float rtl_ui2f(unsigned int val); +extern int rtl_ui2d(unsigned int val); +extern char *rtl_itoa(int value, char *string, int radix); +extern char *rtl_ltoa(int value, char *string, int radix); +extern char *rtl_utoa(unsigned int value, char *string, int radix); +extern char *rtl_ultoa(unsigned int value, char *string, int radix); +extern int rtl_ftol(float f); +extern int rtl_ftod(float f); +extern float rtl_dtof(double d); +extern float rtl_fadd(float a, float b); +extern float rtl_fsub(float a, float b); +extern float rtl_fmul(float a, float b); +extern float rtl_fdiv(float a, float b); +extern int rtl_dadd(double a, double b); +extern int rtl_dsub(double a, double b); +extern int rtl_dmul(double a, double b); +extern int rtl_ddiv(double a, double b); +extern int rtl_dcmpeq(double a, double b); +extern int rtl_dcmplt(double a, double b); +extern int rtl_dcmple(double a, double b); +extern int rtl_dcmpgt(double a, double b); +extern int rtl_fcmplt(float a, float b); +extern int rtl_fcmpgt(float a, float b); + +// rtl_math_ram.c +extern float rtl_fabsf(float a); +extern int rtl_fabs(double a); +extern float rtl_cos_f32(float a); +extern float rtl_sin_f32(float a); + +// ram_pvvx_libc.c +extern int snprintf(char *str, size_t size, const char *fmt, ...); +extern int sprintf(char *str, const char *fmt, ...); +extern int printf(const char *fmt, ...); +extern int vprintf(const char *fmt, void *param); +extern int vsnprintf(char *str, size_t size, const char *fmt, void *param); +extern int vfprintf(FILE *fp, const char *fmt0, va_list ap); +extern int memchr(const void *src_void, int c, size_t length); +extern int memcmp(const void *m1, const void *m2, size_t n); +extern int memcpy(void *dst0, const void *src0, size_t len0); +extern int memmove(void *dst_void, const void *src_void, size_t length); +extern int memset(void *m, int c, size_t n); +extern char * strcat(char *s1, const char *s2); +extern char * strchr(const char *s1, int i); +extern int strcmp(const char *s1, const char *s2); +extern char * strcpy(char *dst0, const char *src0); +extern int strlen(const char *str); +extern char * strncat(char *s1, const char *s2, size_t n); +extern int strncmp(const char *s1, const char *s2, size_t n); +extern char * strncpy(char *dst0, const char *src0, size_t count); +extern char * strstr(const char *searchee, const char *lookfor); +extern char * strsep(char **source_ptr, const char *delim); +extern char * strtok(char *s, const char *delim); +extern int sscanf(const char *buf, const char *fmt, ...); +extern char toupper(char ch); +extern int _stricmp (const char *s1, const char *s2); +extern unsigned long long __aeabi_llsr(unsigned long long val, unsigned int shift); +#endif + +#endif // _INC_RTL_LIBC_ diff --git a/project/inc/user/cgi-test.h b/project/inc/user/cgi-test.h new file mode 100644 index 0000000..6904016 --- /dev/null +++ b/project/inc/user/cgi-test.h @@ -0,0 +1,8 @@ +#ifndef CGI_TEST_H +#define CGI_TEST_H + + + +int cgiTestbed(HttpdConnData *connData); + +#endif diff --git a/project/inc/user/cgiwifi_rtl.h b/project/inc/user/cgiwifi_rtl.h new file mode 100644 index 0000000..ed03d71 --- /dev/null +++ b/project/inc/user/cgiwifi_rtl.h @@ -0,0 +1,13 @@ +#ifndef CGIWIFI_H +#define CGIWIFI_H + +#include "httpd.h" + +httpd_cgi_state cgiWiFiScan(HttpdConnData *connData); +httpd_cgi_state tplWlan(HttpdConnData *connData, char *token, void **arg); +httpd_cgi_state cgiWiFi(HttpdConnData *connData); +httpd_cgi_state cgiWiFiConnect(HttpdConnData *connData); +httpd_cgi_state cgiWiFiSetMode(HttpdConnData *connData); +httpd_cgi_state cgiWiFiConnStatus(HttpdConnData *connData); + +#endif diff --git a/project/inc/user/http_server.h b/project/inc/user/http_server.h new file mode 100644 index 0000000..62d5148 --- /dev/null +++ b/project/inc/user/http_server.h @@ -0,0 +1,14 @@ +/* + * http_server.h + * + * Created on: Feb 20, 2017 + * Author: user003 + */ + +#ifndef HTTP_SERVER_H_ +#define HTTP_SERVER_H_ + +void GpioLedInit(void); +void websocketBcast(void *arg); + +#endif /* HTTP_SERVER_H_ */ diff --git a/project/inc/user/main.h b/project/inc/user/main.h new file mode 100644 index 0000000..d3cdef6 --- /dev/null +++ b/project/inc/user/main.h @@ -0,0 +1,68 @@ +#ifndef MAIN_H +#define MAIN_H + +#include + +#ifndef CONFIG_WLAN +#define CONFIG_WLAN 1 +#endif + +/* Header file declaration*/ +void wlan_network(); + +/* Interactive Mode */ +#define SERIAL_DEBUG_RX 1 + + +#define ATVER_1 1 // For First AT command +#define ATVER_2 2 // For UART Module AT command + +#if CONFIG_EXAMPLE_UART_ATCMD +#define ATCMD_VER ATVER_2 +#else +#define ATCMD_VER ATVER_1 +#endif + + + +/*Static IP ADDRESS*/ +#define IP_ADDR0 192 +#define IP_ADDR1 168 +#define IP_ADDR2 3 +#define IP_ADDR3 80 + +/*NETMASK*/ +#define NETMASK_ADDR0 255 +#define NETMASK_ADDR1 255 +#define NETMASK_ADDR2 255 +#define NETMASK_ADDR3 0 + +/*Gateway Address*/ +#define GW_ADDR0 192 +#define GW_ADDR1 168 +#define GW_ADDR2 3 +#define GW_ADDR3 1 + +/*******************************************/ + +/*Static IP ADDRESS*/ +#define AP_IP_ADDR0 192 +#define AP_IP_ADDR1 168 +#define AP_IP_ADDR2 43 +#define AP_IP_ADDR3 1 + +/*NETMASK*/ +#define AP_NETMASK_ADDR0 255 +#define AP_NETMASK_ADDR1 255 +#define AP_NETMASK_ADDR2 255 +#define AP_NETMASK_ADDR3 0 + +/*Gateway Address*/ +#define AP_GW_ADDR0 192 +#define AP_GW_ADDR1 168 +#define AP_GW_ADDR2 43 +#define AP_GW_ADDR3 1 + + + +#endif diff --git a/project/inc/user/user_config.h b/project/inc/user/user_config.h new file mode 100644 index 0000000..ed0fd9e --- /dev/null +++ b/project/inc/user/user_config.h @@ -0,0 +1,29 @@ +/* + * wc_mgr.h + * + * Created on: Feb 16, 2017 + * Author: sharikov + */ +#ifndef WC_MGR_H_ +#define WC_MGR_H_ + +#define FREERTOS +#define HTTPD_MAX_CONNECTIONS 15 + +// #define WIFI_RESET_SETTINGS_PIN PB_1 // wifi settings reset: connect PB1 to ground + +#define GPIO_LED_PIN PA_4 +#define BITBAND_LED BITBAND_A4 + +#define AP_SCAN_LIST_SIZE 32 + +#define FLASH_APP_BASE 0xd0000 +#define flash_size + +#define USE_NETBIOS + +#define HTTPD_PRIORITY (tskIDLE_PRIORITY + 1 + PRIORITIE_OFFSET) +#define CAPDNS_PRIORITY (tskIDLE_PRIORITY + 0 + PRIORITIE_OFFSET) +#define WEBSOC_PRIORITY (tskIDLE_PRIORITY + 1 + PRIORITIE_OFFSET) + +#endif /* WC_MGR_H_ */ diff --git a/project/inc/wifi_user_set.h b/project/inc/wifi_user_set.h new file mode 100644 index 0000000..ed9d13d --- /dev/null +++ b/project/inc/wifi_user_set.h @@ -0,0 +1,72 @@ +/* + * wifi_user_set.h + * + * Created on: 01/04/2017 + * Author: pvvx + */ + +#ifndef _WIFI_USER_SET_H_ +#define _WIFI_USER_SET_H_ + +//========================================= +//==== Wlan Config ======================== +#define DEF_WIFI_MODE RTW_MODE_AP // Стартовый режим WiFi: RTW_MODE_STA_AP, RTW_MODE_AP, RTW_MODE_STA, RTW_MODE_NONE +#define DEF_WIFI_AP_STATIONS 3 // Max number of STAs, should be 1..3, default is 3 +#define DEF_WIFI_COUNTRY RTW_COUNTRY_RU // Регион использования WiFi... +#define DEF_WIFI_TX_PWR RTW_TX_PWR_PERCENTAGE_25 // RTW_TX_PWR_PERCENTAGE_75 // RTW_TX_PWR_PERCENTAGE_100 +#define DEF_WIFI_BGN RTW_NETWORK_BGN // rtw_network_mode_t +#define DEF_WIFI_ADAPTIVITY RTW_ADAPTIVITY_NORMAL // RTW_ADAPTIVITY_DISABLE/RTW_ADAPTIVITY_NORMAL/RTW_ADAPTIVITY_CARRIER_SENSE + +/* Опции загрузки конфигов по старту */ +//#define DEF_LOAD_CFG 0 // старт в назначенном режиме по умолчанию +//#define DEF_LOAD_CFG BID_ALL_WIFI_CFG // старт в назначенном общем режиме по умолчанию, с загрузками последних конфигураций ST и AP +#define DEF_LOAD_CFG (BID_ALL_WIFI_CFG | BID_WIFI_CFG) // старт в записанном режиме + +/* Опции разрешения записи конфигов по упсешному соединению или выполнению операции установок режимов WiFi без ошибок */ +#define DEF_SAVE_CFG (BID_ALL_WIFI_CFG | BID_WIFI_CFG) // сохранение по успешному соединению/выполненю для всех конфигов: + // (для ST или AP пишутся раздельно) с проверкой на изменения +//==== Interface 0 - wlan0 = AP =========== +#define DEF_AP_SSID "RTL871X" +#define DEF_AP_PASSWORD "0123456789" +/* Варианты типов Security для AP: + RTW_SECURITY_OPEN - Open Security + RTW_SECURITY_WPA_TKIP_PSK - WPA Security + RTW_SECURITY_WPA2_AES_PSK - WPA2 Security using AES cipher + RTW_SECURITY_WPA2_MIXED_PSK - WPA2 Security using AES and/or TKIP ciphers */ +#define DEF_AP_SECURITY RTW_SECURITY_WPA2_AES_PSK // WEP security is NOT IMPLEMENTED. It is NOT SECURE! +#define DEF_AP_BEACON 100 // 100...6000 ms +#define DEF_AP_CHANNEL 1 // 1..14 +#define DEF_AP_CHANNEL 1 // 1..14 +#define DEF_AP_DHCP_MODE 1 // =0 dhcp off, =1 - dhcp on +#define DEF_AP_IP IP4ADDR(192,168,4,1) +#define DEF_AP_MSK IP4ADDR(255,255,255,0) +#define DEF_AP_GW IP4ADDR(192,168,4,1) +// if not defined DHCP_START && DHCP_STOP -> 2..255 +//#define DEF_AP_DHCP_START 2 // DHCP ip start xx.xx.xx.2 +//#define DEF_AP_DHCP_STOP 15 // DHCP ip stop xx.xx.xx.15 +//==== Interface 1 - wlan1 = STA ========== +#define DEF_ST_SSID "HOMEAP" // Имя SSID AP (роутера) для присоединения по умолчанию (первый старт) +#define DEF_ST_PASSWORD "0123456789" // Пароль AP (роутера) для присоединения по умолчанию (первый старт) +#define DEF_ST_SECURITY RTW_SECURITY_WPA_WPA2_MIXED // Тип Security +#define DEF_ST_BSSID { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } // If bssid set is not ff.ff.ff.ff.ff.ff, +#define DEF_ST_USE_BSSID 0 // station will connect to the router with both ssid[] and bssid[] matched. +#define DEF_ST_CHANNEL 1 // 1..14 +#define DEF_ST_AUTORECONNECT 1 // 0 - none, 1..254 - count, 255 - all +#define DEF_ST_RECONNECT_PAUSE 1 // 5 sec +#define DEF_ST_SLEEP 3 // 0 - Off, 1 - IPS, 2 - LPS, 3 - IPS/LPS mode +#define DEF_ST_LPS_DTIM 0 // LPS DTIM +#define DEF_ST_DHCP_MODE 1 // =0 dhcp off, + // =1 - dhcp on, - динамический ip + // =2 Static ip, - fixed ip + // =3 - auto fix - старт в режиме "dhcp on", после получения ip - фиксация и переключение в режим рестартов со "Static ip" +#define DEF_ST_IP IP4ADDR(192,168,1,100) +#define DEF_ST_MSK IP4ADDR(255,255,255,0) +#define DEF_ST_GW IP4ADDR(192,168,1,1) +//==== Interface 2 - eth0 ================= +#define DEF_EH_DHCP_MODE 1 // =0 dhcp off, =1 - dhcp on +#define DEF_EH_IP IP4ADDR(192,168,7,200) +#define DEF_EH_MSK IP4ADDR(255,255,255,0) +#define DEF_EH_GW IP4ADDR(192,168,7,1) +//========================================= + +#endif /* _WIFI_USER_SET_H_ */ diff --git a/project/src/FreeRTOS-openocd.c b/project/src/FreeRTOS-openocd.c new file mode 100644 index 0000000..81a3ab7 --- /dev/null +++ b/project/src/FreeRTOS-openocd.c @@ -0,0 +1,20 @@ +/* + * Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer + * present in the kernel, so it has to be supplied by other means for + * OpenOCD's threads awareness. + * + * Add this file to your project, and, if you're using --gc-sections, + * ``--undefined=uxTopUsedPriority'' (or + * ``-Wl,--undefined=uxTopUsedPriority'' when using gcc for final + * linking) to your LDFLAGS; same with all the other symbols you need. + */ + +#include "FreeRTOS.h" + +#ifdef __GNUC__ +#define USED __attribute__((used)) +#else +#define USED +#endif + +const int USED uxTopUsedPriority = configMAX_PRIORITIES - 1; diff --git a/project/src/console/atcmd_user.c b/project/src/console/atcmd_user.c new file mode 100644 index 0000000..3eff0f4 --- /dev/null +++ b/project/src/console/atcmd_user.c @@ -0,0 +1,603 @@ +#include + +#ifdef CONFIG_AT_USR + +#include "FreeRTOS.h" +#include "task.h" +#include "semphr.h" +#include "at_cmd/log_service.h" +#include "at_cmd/atcmd_wifi.h" +#include +#include "tcpip.h" +#include +#include +#include +#include "tcm_heap.h" +#include "rtl8195a/rtl_libc.h" + +#include "sleep_ex_api.h" + +#include "lwip/tcp_impl.h" + +extern char str_rom_57ch3Dch0A[]; // "=========================================================\n" 57 + +#define printf rtl_printf // DiagPrintf + +/* RAM/TCM/Heaps info */ +extern void ShowMemInfo(void); +/* +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + */ +//------------------------------------------------------------------------------ +// Mem, Tasks info +//------------------------------------------------------------------------------ +LOCAL void fATST(int argc, char *argv[]) { + ShowMemInfo(); +#if 0 //CONFIG_DEBUG_LOG > 1 + dump_mem_block_list(); + tcm_heap_dump(); +#endif; + printf("\n"); +#if (configGENERATE_RUN_TIME_STATS == 1) + char *cBuffer = pvPortMalloc(512); + if(cBuffer != NULL) { + vTaskGetRunTimeStats((char *)cBuffer); + printf("%s", cBuffer); + } + vPortFree(cBuffer); +#endif +#if defined(configUSE_TRACE_FACILITY) && (configUSE_TRACE_FACILITY == 1) && (configUSE_STATS_FORMATTING_FUNCTIONS == 1) + { + char * pcWriteBuffer = malloc(1024); + if(pcWriteBuffer) { + vTaskList((char*)pcWriteBuffer); + printf("\nTask List:\n"); + printf(&str_rom_57ch3Dch0A[7]); // "==========================================\n" + printf("Name\t Status Priority HighWaterMark TaskNumber\n%s\n", pcWriteBuffer); + free(pcWriteBuffer); + } + } +#endif +} +/*------------------------------------------------------------------------------------- + Копирует данные из области align(4) (flash, registers, ...) в область align(1) (ram) +--------------------------------------------------------------------------------------*/ +extern void copy_align4_to_align1(unsigned char * pd, void * ps, unsigned int len); +/* +static void copy_align4_to_align1(unsigned char * pd, void * ps, unsigned int len) +{ + union { + unsigned char uc[4]; + unsigned int ud; + }tmp; + unsigned int *p = (unsigned int *)((unsigned int)ps & (~3)); + unsigned int xlen = (unsigned int)ps & 3; + // unsigned int size = len; + + if(xlen) { + tmp.ud = *p++; + while (len) { + len--; + *pd++ = tmp.uc[xlen++]; + if(xlen & 4) break; + } + } + xlen = len >> 2; + while(xlen) { + tmp.ud = *p++; + *pd++ = tmp.uc[0]; + *pd++ = tmp.uc[1]; + *pd++ = tmp.uc[2]; + *pd++ = tmp.uc[3]; + xlen--; + } + if(len & 3) { + tmp.ud = *p; + pd[0] = tmp.uc[0]; + if(len & 2) { + pd[1] = tmp.uc[1]; + if(len & 1) { + pd[2] = tmp.uc[2]; + } + } + } + // return size; +} +*/ +int print_hex_dump(uint8_t *buf, int len, unsigned char k) { + uint32_t ss[2]; + ss[0] = 0x78323025; // "%02x" + ss[1] = k; // ","...'\0' + uint8_t * ptr = buf; + int result = 0; + while (len--) { + if (len == 0) + ss[1] = 0; + result += printf((uint8_t *) &ss, *ptr++); + } + return result; +} + +extern char str_rom_hex_addr[]; // in *.ld "[Addr] .0 .1 .2 .3 .4 .5 .6 .7 .8 .9 .A .B .C .D .E .F\n" + +void dump_bytes(uint32 addr, int size) +{ + uint8 buf[17]; + u32 symbs_line = sizeof(buf)-1; + printf(str_rom_hex_addr); + while (size) { + if (symbs_line > size) symbs_line = size; + printf("%08X ", addr); + copy_align4_to_align1(buf, addr, symbs_line); + print_hex_dump(buf, symbs_line, ' '); + int i; + for(i = 0 ; i < symbs_line ; i++) { + if(buf[i] < 0x20 || buf[i] > 0x7E) { + buf[i] = '.'; + } + } + buf[symbs_line] = 0; + i = (sizeof(buf)-1) - symbs_line; + while(i--) printf(" "); + printf(" %s\r\n", buf); + addr += symbs_line; + size -= symbs_line; + } +} +//------------------------------------------------------------------------------ +// Dump byte register +//------------------------------------------------------------------------------ +LOCAL void fATSB(int argc, char *argv[]) +{ +/* + int size = 16; + uint32 addr = Strtoul(argv[1],0,16); + if (argc > 2) { + size = Strtoul(argv[2],0,10); + if (size <= 0 || size > 16384) + size = 16; + } + if(addr + size > SPI_FLASH_BASE) { + flash_turnon(); + dump_bytes(addr, size); + SpicDisableRtl8195A(); + } + else { + dump_bytes(addr, size); + } +*/ +} + +//------------------------------------------------------------------------------ +// Dump dword register +//------------------------------------------------------------------------------ +LOCAL void fATSD(int argc, char *argv[]) +{ +/* + if (argc > 2) { + int size = Strtoul(argv[2],0,10); + if (size <= 0 || size > 16384) + argv[2] = "16"; + } +*/ + flash_turnon(); + CmdDumpWord(argc-1, (unsigned char**)(argv+1)); + SpicDisableRtl8195A(); +} +//------------------------------------------------------------------------------ +// Write dword register +//------------------------------------------------------------------------------ +LOCAL void fATSW(int argc, char *argv[]) +{ + CmdWriteWord(argc-1, (unsigned char**)(argv+1)); +} + +/* Get one byte from the 4-byte address */ +#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0]) +#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1]) +#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2]) +#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3]) +/* These are cast to u16_t, with the intent that they are often arguments + * to printf using the U16_F format from cc.h. */ +#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr)) +#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr)) +#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr)) +#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr)) + +#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \ + ip4_addr2_16(ipaddr), \ + ip4_addr3_16(ipaddr), \ + ip4_addr4_16(ipaddr) + +#define IPSTR "%d.%d.%d.%d" + +extern const char * const tcp_state_str[]; +/* +static const char * const tcp_state_str[] = { + "CLOSED", + "LISTEN", + "SYN_SENT", + "SYN_RCVD", + "ESTABLISHED", + "FIN_WAIT_1", + "FIN_WAIT_2", + "CLOSE_WAIT", + "CLOSING", + "LAST_ACK", + "TIME_WAIT" +}; +*/ +/****************************************************************************** + * FunctionName : debug + * Parameters : + * Returns : +*******************************************************************************/ +void print_udp_pcb(void) +{ + struct udp_pcb *pcb; + bool prt_none = true; + rtl_printf("UDP pcbs:\n"); + for(pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { + rtl_printf("flg:%02x\t" IPSTR ":%d\t" IPSTR ":%d\trecv:%p\n", pcb->flags, IP2STR(&pcb->local_ip), pcb->local_port, IP2STR(&pcb->remote_ip), pcb->remote_port, pcb->recv ); + prt_none = false; + }; + if(prt_none) rtl_printf("none\n"); +} +/****************************************************************************** + * FunctionName : debug + * Parameters : + * Returns : +*******************************************************************************/ +void print_tcp_pcb(void) +{ + struct tcp_pcb *pcb; + rtl_printf("Active PCB states:\n"); + bool prt_none = true; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + rtl_printf("Port %d|%d\tflg:%02x\ttmr:%p\t%s\n", pcb->local_port, pcb->remote_port, pcb->flags, pcb->tmr, tcp_state_str[pcb->state]); + prt_none = false; + }; + if(prt_none) rtl_printf("none\n"); + rtl_printf("Listen PCB states:\n"); + prt_none = true; + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + rtl_printf("Port %d|%d\tflg:%02x\ttmr:%p\t%s\n", pcb->local_port, pcb->remote_port, pcb->flags, pcb->tmr, tcp_state_str[pcb->state]); + prt_none = false; + }; + if(prt_none) rtl_printf("none\n"); + rtl_printf("TIME-WAIT PCB states:\n"); + prt_none = true; + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + rtl_printf("Port %d|%d\tflg:%02x\ttmr:%p \t%s\n", pcb->local_port, pcb->remote_port, pcb->flags, pcb->tmr, tcp_state_str[pcb->state]); + prt_none = false; + }; + if(prt_none) rtl_printf("none\n"); +} +/****************************************************************************** + * FunctionName : debug + * Parameters : + * Returns : +*******************************************************************************/ +LOCAL void fATLW(int argc, char *argv[]) // Info Lwip +{ + print_udp_pcb(); + print_tcp_pcb(); +} +//------------------------------------------------------------------------------ +// Deep sleep +//------------------------------------------------------------------------------ +LOCAL void fATDS(int argc, char *argv[]) +{ + uint32 sleep_ms = 10000; + if(argc > 1) sleep_ms = atoi(argv[1]); +#if 0 + if(argc > 2) { + printf("%u ms waiting low level on PB_1 before launching Deep-Sleep...\n", sleep_ms); + // turn off log uart + HalDeinitLogUart(); // sys_log_uart_off(); + + // initialize wakeup pin + gpio_t gpio_wake; + gpio_init(&gpio_wake, PB_1); + gpio_dir(&gpio_wake, PIN_INPUT); + gpio_mode(&gpio_wake, PullDown); + TickType_t sttime = xTaskGetTickCount(); + + do { + if(gpio_read(&gpio_wake) == 0) { + // Enter deep sleep... Wait give rising edge at PB_1 to wakeup system. + deepsleep_ex(DSLEEP_WAKEUP_BY_GPIO, 0); + }; + vTaskDelay(1); + } while(xTaskGetTickCount() - sttime < sleep_ms); + HalInitLogUart(); // sys_log_uart_on(); + printf("No set pin low in deep sleep!\n"); + } + else { + printf("Deep-Sleep %u ms\n", sleep_ms); + HalLogUartWaitTxFifoEmpty(); + // Enter deep sleep... Wait timer ms + deepsleep_ex(DSLEEP_WAKEUP_BY_TIMER, sleep_ms); + } +#else + HalLogUartWaitTxFifoEmpty(); + deepsleep_ex(DSLEEP_WAKEUP_BY_TIMER, sleep_ms); +#endif +} +/*------------------------------------------------------------------------------ + * power saving mode + *----------------------------------------------------------------------------*/ +LOCAL void fATSP(int argc, char *argv[]) +{ + if(argc > 2) { + switch (argv[1][0]) { + case 'a': // acquire + { + acquire_wakelock(atoi(argv[2])); + break; + } + case 'r': // release + { + release_wakelock(atoi(argv[2])); + break; + } + }; + }; + printf("WakeLock Status %d\n", get_wakelock_status()); +} +//------------------------------------------------------------------------------ +#include "wlan_lib.h" +#include "hal_com_reg.h" + +extern struct netif xnetif[NET_IF_NUM]; + +u8 RandSK256() { + u8 buf; + rtw_get_random_bytes(&buf, 1); + return buf; +} + +u8 RandSK(u8 max) { + u8 buf; + do { + rtw_get_random_bytes(&buf, 1); + } while (buf>max); + return buf; +} +#ifdef CONFIG_PROMISC +void fATWM(int argc, char *argv[]){ + argv[0] = "wifi_promisc"; + printf("[ATWM]x: _AT_WLAN_PROMISC_\n"); + char mac[100]; + wifi_get_mac_address(&mac); + printf("\n\r%s\r\n", mac); + //printf("set\n\r"); + //char mac2[100]="123456789012"; + //wifi_set_mac_address(&mac2); + //printf("get\n\r"); + //wifi_get_mac_address(&mac); + //printf("\n\r%s\r\n", mac); + if(1) { + int out_buf_size = 40; + unsigned char buf[40]; + u8 *mac = (u8 *)LwIP_GetMAC(&xnetif[0]); + memcpy(buf,' ',40); + //sprintf(buf, ",,,B,%02x%02x%02x%02x%02x%02x,", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + sprintf(buf, "0123456789"); + struct pbuf * p = pbuf_alloc(PBUF_TRANSPORT, out_buf_size * sizeof(char), PBUF_REF); + p->payload = buf; + + struct udp_pcb *broadcast_pcb; + struct ip_addr forward_ip; + #define fwd_port 5001 + + broadcast_pcb = udp_new(); + //38.132.37.5 + //IP4_ADDR(&forward_ip, 38, 132, 37, 5); + //192.168.1.3 + IP4_ADDR(&forward_ip, 192, 168, 1, 3); + //IP4_ADDR(&forward_ip, 192, 168, 1, 1); + + int ret = udp_sendto(broadcast_pcb, p, &forward_ip, fwd_port); //dest port + pbuf_free(p); + printf(">>>button UDP message sent %d==>\n", ret); + //test_rtk(); + printf("&rltk_wlan_info= %p\n", &rltk_wlan_info); + dump_bytes((u32)&rltk_wlan_info, 64); + printf("[0]\n"); + _adapter *ad = rltk_wlan_info[0].dev; + printf("adapter = %p\n", ad); + dump_bytes((u32)ad, 16); + printf("bSurpriseRemoved [%p] = %d, +%d\n", &ad->bSurpriseRemoved, ad->bSurpriseRemoved, (u32)&ad->bSurpriseRemoved - (u32)ad); + dump_bytes((u32)&ad->bSurpriseRemoved, 32); + printf("mlmepriv +%d, mlmeextpriv +%d, cmdpriv +d%\n", + (u32)(&ad->mlmepriv) - (u32)(ad), + (u32)(&ad->mlmeextpriv) - (u32)(ad), + (u32)(&ad->cmdpriv) - (u32)(ad)); + printf("xmitpriv +%d, recvpriv +%d, stapriv +%d\n", + (u32)(&ad->xmitpriv) - (u32)(ad), (u32)(&ad->recvpriv) - (u32)(ad), + (u32)(&ad->stapriv) - (u32)(ad)); + printf("bDriverStopped %d, hw_init_completed %d, cmdThread %d\n", + (u32)(&ad->bDriverStopped) - (u32)(ad), + (u32)(&ad->hw_init_completed) - (u32)(ad), + (u32)(&ad->cmdThread) - (u32)(ad)); + printf("intf_start %d, bup %d, pcodatapriv %d\n", + (u32)(&ad->intf_start) - (u32)(ad), (u32)(&ad->bup) - (u32)(ad), + (u32)(&ad->pcodatapriv) - (u32)(ad)); + printf("Sizeof(adapter) = %d\n", sizeof(struct _ADAPTER)); + if (sizeof(struct _ADAPTER) != 6088) { + printf("Error: Check aligned WiFi struct!\n"); + } + printf("[1]\n"); + ad = rltk_wlan_info[1].dev; + printf("adapter = %p\n", ad); + dump_bytes((u32)ad, 16); + printf("bSurpriseRemoved [%p] = %d, +%d\n", &ad->bSurpriseRemoved, ad->bSurpriseRemoved, (u32)&ad->bSurpriseRemoved - (u32)ad); + dump_bytes((u32)&ad->bSurpriseRemoved, 32); + printf("mlmepriv +%d, mlmeextpriv +%d, cmdpriv +d%\n", + (u32)(&ad->mlmepriv) - (u32)(ad), + (u32)(&ad->mlmeextpriv) - (u32)(ad), + (u32)(&ad->cmdpriv) - (u32)(ad)); + printf("xmitpriv +%d, recvpriv +%d, stapriv +%d\n", + (u32)(&ad->xmitpriv) - (u32)(ad), (u32)(&ad->recvpriv) - (u32)(ad), + (u32)(&ad->stapriv) - (u32)(ad)); + printf("bDriverStopped %d, hw_init_completed %d, cmdThread %d\n", + (u32)(&ad->bDriverStopped) - (u32)(ad), + (u32)(&ad->hw_init_completed) - (u32)(ad), + (u32)(&ad->cmdThread) - (u32)(ad)); + printf("intf_start %d, bup %d, pcodatapriv %d\n", + (u32)(&ad->intf_start) - (u32)(ad), (u32)(&ad->bup) - (u32)(ad), + (u32)(&ad->pcodatapriv) - (u32)(ad)); + printf("Sizeof(adapter) = %d\n", sizeof(struct _ADAPTER)); + if (sizeof(struct _ADAPTER) != 6088) { + printf("Error: Check aligned WiFi struct!\n"); + } + printf("adhoc\n"); + printf("rltk_wlan_info[0].dev\n"); + dump_bytes(&(rltk_wlan_info[0]),32); + dump_bytes(&(rltk_wlan_info[0].mac),6); + printf("rltk_wlan_info[1].dev\n"); + dump_bytes(&(rltk_wlan_info[1]),32); + dump_bytes(&(rltk_wlan_info[1].mac),6); + + printf("prep A\n"); + //return; + char wlan0[6] = "wlan0"; + char mac1[6] = "123456"; + char ssid[6] = "123456"; + u8 alfa[65] = "1234567890qwertyuiopasdfghjklzxcvbnm QWERTYUIOPASDFGHJKLZXCVBNM_."; + u8 packet[128] = { 0x80, 0x00, 0x00, 0x00, + /*4*/ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + /*10*/ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, + /*16*/ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, + /*22*/ 0xc0, 0x6c, + /*24*/ 0x83, 0x51, 0xf7, 0x8f, 0x0f, 0x00, 0x00, 0x00, + /*32*/ 0x64, 0x00, + /*34*/ 0x01, 0x04, + /* SSID */ + /*36*/ 0x00, 0x06, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, + 0x01, 0x08, 0x82, 0x84, + 0x8b, 0x96, 0x24, 0x30, 0x48, 0x6c, 0x03, 0x01, + /*56*/ 0x04}; + u8 channel; + //_adapter *ad0 = rltk_wlan_info[0].dev; + while (1) { + if(0) { + channel = 1; //RandSK(11)+1; + // Source MAC Address + packet[10] = packet[16] = 1;//RandSK256(); + packet[11] = packet[17] = 1;//RandSK256(); + packet[12] = packet[18] = 1;//RandSK256(); + packet[13] = packet[19] = 1;//RandSK256(); + packet[14] = packet[20] = 1;//RandSK256(); + packet[15] = packet[21] = 1;//RandSK256(); + } else { + channel = RandSK(11)+1; + // Source MAC Address + packet[10] = packet[16] = RandSK256(); + packet[11] = packet[17] = RandSK256(); + packet[12] = packet[18] = RandSK256(); + packet[13] = packet[19] = RandSK256(); + packet[14] = packet[20] = RandSK256(); + packet[15] = packet[21] = RandSK256(); + } + // Randomize SSID (Fixed size 6. Lazy right?) + packet[38] = alfa[RandSK(65)]; + packet[39] = alfa[RandSK(65)]; + packet[40] = alfa[RandSK(65)]; + packet[41] = alfa[RandSK(65)]; + packet[42] = alfa[RandSK(65)]; + packet[43] = alfa[RandSK(65)]; + + packet[56] = channel; + wext_set_channel(wlan0, channel); + rtw_msleep_os(100); + const TickType_t xDelay = 1000 / portTICK_PERIOD_MS; //1000ms + //while(1) { + memcpy(&mac1,&packet[10],6); + memcpy(&ssid,&packet[38],6); + printf("> ch,mac,ssid = %d,%12X,%s", channel,mac,ssid); + for(int i=0;i<4;i++) { + //rtw_send_mgnt(ad0, &packet, 57, NULL); + wext_send_mgnt(wlan0, &packet, 57, NULL); + printf("."); + taskYIELD(); + //vTaskDelay( xDelay ); + if(0) { + ShowMemInfo(); + dump_mem_block_list(); + tcm_heap_dump(); + } + //rtw_msleep_os(100); + } + } + if(1) { + printf("rltk_wlan_info = %p\n", &rltk_wlan_info); + int size = 512; + int addr = 0; + uint8_t *blk_data = (uint8_t *)malloc(size); + memset(blk_data, 0xff, size); + if(blk_data) { + uint8_t * ptr = blk_data; + //Hal_ReadEFuse(*(_adapter **)(rltk_wlan_info[0].dev->priv), 0, 0, 512, ptr, 1); + //rtw_flash_map_update(*(_adapter **)(rltk_wlan_info->priv), 512); + u32 symbs_line = 16; + while(addr < size) { + if(symbs_line > size) symbs_line = size; + printf("%08X ", addr); + print_hex_dump(ptr, symbs_line, ' '); + printf("\r\n"); + addr += symbs_line; + ptr += symbs_line; + size -= symbs_line; + if(size == 0) break; + } + free(blk_data); + } + } + } + if(0){ + printf("[ATWM]Usage: ATWM=DURATION_SECONDS[with_len]\n"); +#if CONFIG_INIC_CMD_RSP + inic_c2h_msg("ATWM", RTW_BADARG, NULL, 0); +#endif + return; + } + cmd_promisc(2,argv); + return; +#if CONFIG_INIC_CMD_RSP + inic_frame_tail = inic_frame = pvPortMalloc(sizeof(struct inic_eth_frame)*MAX_INIC_FRAME_NUM); + if(inic_frame == NULL){ + inic_c2h_msg("ATWM", RTW_BUFFER_UNAVAILABLE_TEMPORARY, NULL, 0); + return; + } +#endif +#ifdef CONFIG_PROMISC + wifi_init_packet_filter(); +#endif + //promisc_test(1000, 0); +#if CONFIG_INIC_CMD_RSP + if(inic_frame) + vPortFree(inic_frame); + inic_frame_tail = NULL; + inic_frame_cnt = 0; +#endif +} +#endif +//------------------------------------------------------------------------------ +MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_at[] = { + {"ATST", 0, fATST, ": Memory info"}, + {"ATLW", 0, fATLW, ": LwIP Info"}, + {"ATWM", 0, fATWM, ": Prom"}, + {"ATSB", 1, fATSB, "=[,COUNT(dec)]: Dump byte register"}, + {"ATSD", 1, fATSD, "=[,COUNT(dec)]: Dump dword register"}, + {"ATSW", 2, fATSW, "=,: Set register"}, + {"ATDS", 0, fATDS, "=[TIME(ms)]: Deep sleep"}, + {"ATSP", 0, fATSP, "=,: Power"} +}; + +#endif //#ifdef CONFIG_AT_USR diff --git a/project/src/console/gpio_irq_test.c b/project/src/console/gpio_irq_test.c new file mode 100644 index 0000000..d67e0ec --- /dev/null +++ b/project/src/console/gpio_irq_test.c @@ -0,0 +1,99 @@ +/* + * test.c + * + * Created on: 12 марта 2017 г. + * Author: PVV + */ + +#include +#include "device.h" +#include "gpio_api.h" // mbed +#include "gpio_irq_api.h" // mbed +#include "gpio_irq_ex_api.h" // mbed +#include "timer_api.h" +#include "diag.h" +#include "main.h" + +#include "hal_diag.h" +#include "rtl8195a/rtl_libc.h" + +#define GPIO_LED_PIN PA_4 +#define GPIO_IRQ_PIN PC_4 + +gpio_irq_t gpio_btn; +gpio_t gpio_led; +gtimer_t my_timer; + +uint32_t lo_time_us, hi_time_us; +uint32_t lo_time_cnt, hi_time_cnt; +uint32_t old_tsf; +uint32_t lo, hi, fr; + +uint32_t io_irq_count; + +LOCAL void gpio_demo_irq_handler(uint32_t id, gpio_irq_event event) { + +// gpio_irq_disable(&gpio_btn); + io_irq_count++; + uint32_t new_tsf = get_tsf(); + uint32_t delta_us = (uint32_t) new_tsf - (uint32_t) old_tsf; + if (event & 1) { + lo_time_us += delta_us; + lo_time_cnt++; + gpio_irq_set(&gpio_btn, IRQ_LOW, 1); + } else { + hi_time_us += delta_us; + hi_time_cnt++; + gpio_irq_set(&gpio_btn, IRQ_HIGH, 1); + } + old_tsf = new_tsf; +// gpio_irq_enable(&gpio_btn); +} + +LOCAL void timer1_timeout_handler(uint32_t id) { + + if (lo_time_cnt && hi_time_cnt) { + lo = lo_time_us / lo_time_cnt; + hi = hi_time_us / hi_time_cnt; + fr = hi + lo; + lo_time_cnt = 0; + lo_time_us = 0; + hi_time_cnt = 0; + hi_time_us = 0; + printf("Period: %lu us, Lo: %lu us, Hi: %lu us\n", fr, lo, hi); + } +} + +/** + * @brief Main program. + * @param None + * @retval None + */ +LOCAL void fATTT(int argc, char *argv[]) { + + lo_time_cnt = 0; + lo_time_us = 0; + hi_time_cnt = 0; + hi_time_us = 0; + + // Init LED control pin + gpio_init(&gpio_led, GPIO_LED_PIN); + gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output + gpio_mode(&gpio_led, PullNone); // No pull + gpio_write(&gpio_led, 0); + + // Initial Push Button pin as interrupt source + gpio_irq_init(&gpio_btn, GPIO_IRQ_PIN, gpio_demo_irq_handler, + (uint32_t) (&gpio_led)); + gpio_irq_set(&gpio_btn, IRQ_FALL, 1); // Falling Edge Trigger + gpio_irq_enable(&gpio_btn); + + // Initial a periodical timer + gtimer_init(&my_timer, TIMER1); + gtimer_start_periodical(&my_timer, 1000000, (void*) timer1_timeout_handler, + (uint32_t) &gpio_led); +} + +MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_test[] = { { "ATTT", 0, + fATTT, ": Test" } }; + diff --git a/project/src/console/spi_tst.c b/project/src/console/spi_tst.c new file mode 100644 index 0000000..7548065 --- /dev/null +++ b/project/src/console/spi_tst.c @@ -0,0 +1,83 @@ +/* + * spi_test.c + */ +#include +#include "rtl8195a.h" +#include "spi_api.h" +#include "spi_ex_api.h" +#include "rtl8195a/rtl_libc.h" + +#define SPI0_MOSI PC_2 +#define SPI0_MISO PC_3 +#define SPI0_SCLK PC_1 +#define SPI0_CS PC_0 + +spi_t spi_master; + +LOCAL void show_reg_spi(int i) { + rtl_printf("Regs SPI:\n"); + for(int x = 0; x < 64 ; x += 4) { + rtl_printf("0x%08x ", HAL_SSI_READ32(i, x)); + if((x & 0x0F) == 0x0C) rtl_printf("\n"); + } +} + + +LOCAL void fATSSI(int argc, char *argv[]) +{ + int len = 128; + int count = 32; + int clk = 1000000; + int ssn = 0; + if(argc > 1) { + len = atoi(argv[1]); + if(len > 32768 || len <= 0) { + len = 128; + error_printf("%s: len = %u!\n", __func__, len); + }; + }; + if(argc > 2) { + count = atoi(argv[2]); + if(count > 10000 || count <= 0) { + count = 32; + error_printf("%s: count = %u!\n", __func__, count); + }; + }; + if(argc > 3) { + clk = atoi(argv[3]); + if(clk <= 0) { + clk = 1000000; + error_printf("%s: clk = %u!\n", __func__, clk); + }; + }; + if(argc > 4) { + ssn = atoi(argv[4]); + if(ssn > 7 || ssn < 0) { + ssn = 0; + error_printf("%s: ssn = %u!\n", __func__, ssn); + }; + }; + char* buff = pvPortMalloc(len); + if(buff) { + spi_init(&spi_master, SPI0_MOSI, SPI0_MISO, SPI0_SCLK, SPI0_CS); // CS заданный тут нигде не используется + spi_format(&spi_master, 16, 3, 0); + spi_frequency(&spi_master, clk); + spi_slave_select(&spi_master, ssn); // выбор CS + for(int i = 0; i < len; i++) buff[i] = (char)i; + while(count--) { + spi_master_write_stream(&spi_master, buff, len); + while(spi_busy(&spi_master)); + rtl_printf("Master write: %d\n", count); + }; +// show_reg_spi(spi_master.spi_adp.Index); + spi_free(&spi_master); + free(buff); + } + else { + error_printf("%s: error malloc!\n", __func__); + }; +} + +MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_spitst[] = { + {"ATSSI", 0, fATSSI, "[len[,count[,clk[,ssn]]]]: Spi test"} +}; diff --git a/project/src/console/wifi_console.c b/project/src/console/wifi_console.c new file mode 100644 index 0000000..b8af14d --- /dev/null +++ b/project/src/console/wifi_console.c @@ -0,0 +1,324 @@ +/* + * wifi_console.c + * + * Created on: 03/04/2017 + * Author: pvvx + */ + +#include +#include "FreeRTOS.h" +#include "diag.h" +#include "wifi_api.h" +#include "wifi_conf.h" +#include "rtl8195a/rtl_libc.h" +#include "hal_platform.h" + +#include "section_config.h" +#include "hal_diag.h" +#include "lwip/netif.h" + + +extern struct netif xnetif[NET_IF_NUM]; + +//========================================================== +//--- CONSOLE -------------------------- + +// ATPN=[,password[,encryption[,auto reconnect[,reconnect pause]]]: WIFI Connect to AP +LOCAL void fATPN(int argc, char *argv[]){ + if(argc > 1) { + if(argv[1][0] == '?') { + show_wifi_st_cfg(); + } + else { + strncpy(wifi_st_cfg.ssid, argv[1], NDIS_802_11_LENGTH_SSID); + int pswlen; + if(argc > 2) { + pswlen = strlen(wifi_st_cfg.password); + strncpy(wifi_st_cfg.password, argv[2], NDIS_802_11_LENGTH_SSID); + if(pswlen > 7) { + wifi_st_cfg.security = IDX_SECURITY_WPA2_AES_PSK; + } + else if(!pswlen) { + wifi_st_cfg.security = IDX_SECURITY_OPEN; + } + else { + printf("password len < 8!\n"); + wifi_st_cfg.security = IDX_SECURITY_OPEN; + } + } + else { + // default + wifi_st_cfg.password[0] = 0; + wifi_st_cfg.security = IDX_SECURITY_OPEN; + } + if(argc > 3) { + if(pswlen > 7) { + wifi_st_cfg.security = atoi(argv[3]); + } + else { + printf("password len < 8!\n"); + wifi_st_cfg.security = IDX_SECURITY_OPEN; + } + } + if(argc > 4) { + wifi_st_cfg.autoreconnect = atoi(argv[4]); + } + else wifi_st_cfg.autoreconnect = 0; + if(argc > 5) { + wifi_st_cfg.reconnect_pause = atoi(argv[5]); + } + else wifi_st_cfg.reconnect_pause = 5; + show_wifi_st_cfg(); +#if CONFIG_WLAN_CONNECT_CB + connect_close(); +#endif + wifi_run(wifi_run_mode | RTW_MODE_STA); + } + } +} + +// ATPA=[,password[,encryption[,channel[,hidden[,max connections]]]]]: Start WIFI AP +LOCAL void fATPA(int argc, char *argv[]){ + if(argc > 1) { + if(argv[1][0] == '?') { + show_wifi_ap_cfg(); + } + else { + strncpy(wifi_ap_cfg.ssid, argv[1], NDIS_802_11_LENGTH_SSID); + if(argc > 2) { + strncpy(wifi_ap_cfg.password, argv[2], NDIS_802_11_LENGTH_SSID); + int i = strlen(wifi_ap_cfg.password); + if(i > 7) { + wifi_ap_cfg.security = 1; // IDX_SECURITY_WPA2_AES_PSK; + } + else if(i == 0) { + wifi_ap_cfg.security = 0; // IDX_SECURITY_OPEN; + } + else { + printf("password len < 8!\n"); + wifi_ap_cfg.security = 0; // IDX_SECURITY_OPEN; + } + } + else { + wifi_ap_cfg.password[0] = 0; + wifi_ap_cfg.security = 0; // IDX_SECURITY_OPEN; + } + if(argc > 3) { + wifi_ap_cfg.security = (argv[3][0] == '0')? 0 : 1; //RTW_SECURITY_OPEN : RTW_SECURITY_WPA2_AES_PSK; + } + if(argc > 4) { + wifi_ap_cfg.channel = atoi(argv[4]); + } + else wifi_ap_cfg.channel = 1; + if(argc > 5) { + wifi_ap_cfg.ssid_hidden = atoi(argv[5]); + } + else wifi_ap_cfg.ssid_hidden = 0; + + if(argc > 6) { + wifi_ap_cfg.max_sta = atoi(argv[6]); + } + else wifi_ap_cfg.max_sta = 3; + + show_wifi_ap_cfg(); +#if CONFIG_WLAN_CONNECT_CB + connect_close(); +#endif + wifi_run(wifi_run_mode | RTW_MODE_AP); + } + } +} + +// WIFI Connect, Disconnect +LOCAL void fATWR(int argc, char *argv[]){ + rtw_mode_t mode = RTW_MODE_NONE; + if(argc > 1) mode = atoi(argv[1]); +#if CONFIG_WLAN_CONNECT_CB + connect_close(); +#endif + wifi_run(mode); +} + +#if CONFIG_WLAN_CONNECT_CB +// Close connections +LOCAL void fATOF(int argc, char *argv[]){ + connect_close(); +} + +// Open connections +LOCAL void fATON(int argc, char *argv[]){ + connect_start(); +} +#endif + +LOCAL void fATWI(int argc, char *argv[]) { +#if 1 + if(argc > 2) { + uint8_t c = argv[1][0] | 0x20; + if(c == 's') { + int i = atoi(argv[2]); + printf("Save configs(%d)..\n", i); + write_wifi_cfg(atoi(argv[2])); + } + else if(c == 'l') { + wifi_cfg.load_flg = atoi(argv[2]); + } + else if(c == 'm') { + wifi_cfg.mode = atoi(argv[2]); + } + } +#endif + rtw_wifi_setting_t Setting; + if((wifi_run_mode & RTW_MODE_AP) + && wifi_get_setting(wlan_ap_name, &Setting) == 0) { + wifi_show_setting(wlan_ap_name, &Setting); +// show_wifi_ap_ip(); + printf("\tIP: " IPSTR "\n", IP2STR(&xnetif[WLAN_AP_NETIF_NUM].ip_addr)); + } + if((wifi_run_mode & RTW_MODE_STA) + && wifi_get_setting(wlan_st_name, &Setting) == 0) { + wifi_show_setting(wlan_st_name, &Setting); +// show_wifi_st_ip(); + printf("\tIP: " IPSTR "\n", IP2STR(&xnetif[WLAN_ST_NETIF_NUM].ip_addr)); + } + printf("\nWIFI config:\n"); + printf(&str_rom_57ch3Dch0A[25]); // "================================\n" + show_wifi_cfg(); + printf("\nWIFI AP config:\n"); + printf(&str_rom_57ch3Dch0A[25]); // "================================\n" + show_wifi_ap_cfg(); + printf("\nWIFI ST config:\n"); + printf(&str_rom_57ch3Dch0A[25]); // "================================\n" + show_wifi_st_cfg(); + printf("\n"); +} + +extern uint8_t rtw_power_percentage_idx; + +LOCAL void fATWT(int argc, char *argv[]) { + if(argc > 1) { + int txpwr = atoi(argv[1]); + debug_printf("set tx power (%d)...\n", txpwr); + if(rltk_set_tx_power_percentage(txpwr) != RTW_SUCCESS) { + error_printf("Error set tx power (%d)!", wifi_cfg.tx_pwr); + } + } + printf("TX power = %d\n", rtw_power_percentage_idx); +} + +//-- Test tsf (64-bits counts, 1 us step) --- + +#include "hal_com_reg.h" + +#define ReadTSF_Lo32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR))) +#define ReadTSF_Hi32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR1))) + +LOCAL uint64_t get_tsf(void) +{ + return *((uint64_t *)(WIFI_REG_BASE + REG_TSFTR)); +} + +LOCAL void fATSF(int argc, char *argv[]) +{ + uint64_t tsf = get_tsf(); + printf("\nTSF: %08x%08x\n", (uint32_t)(tsf>>32), (uint32_t)(tsf)); +} + +LOCAL void fATWP(int argc, char *argv[]) { + if(argc > 1) { + release_wakelock(0xffff); + wifi_set_power_mode(1, 1); + wifi_set_lps_dtim(atoi(argv[1])); + } + else { + unsigned char x; + if(wifi_get_lps_dtim(&x) >= 0) { + printf("DTIM: %d\n", x); + } + } +} +/* -------- WiFi Scan ------------------------------- */ +LOCAL void scan_result_handler(internal_scan_handler_t* ap_scan_result) +{ + if (ap_scan_result) { + if(ap_scan_result->scan_cnt) { + printf("\nScan networks:\n\n"); + printf("N\tType\tMAC\t\t\tSignal\tCh\tWPS\tSecyrity\tSSID\n\n"); + for(int i = 0 ; i < ap_scan_result->scan_cnt; i++) { + rtw_scan_result_t* record = &ap_scan_result->ap_details[i]; + printf("%d\t", i+1); + printf("%s\t", (record->bss_type == RTW_BSS_TYPE_ADHOC)? "Adhoc": "Infra"); + printf(MAC_FMT, MAC_ARG(record->BSSID.octet)); + printf("\t%d\t", record->signal_strength); + printf("%d\t", record->channel); + printf("%d\t", record->wps_type); + { + uint8 * s = rtw_security_to_str(record->security); + printf("%s\t", s); + if(strlen(s) < 8) printf("\t"); + } + record->SSID.val[record->SSID.len] = '\0'; + printf("%s\n", record->SSID.val); + } + + } + } else { + printf("Scan networks: None!\n"); + } +} +/* -------- WiFi Scan ------------------------------- */ +LOCAL void fATSN(int argc, char *argv[]) +{ + api_wifi_scan(scan_result_handler); +} + +#if defined(CONFIG_ENABLE_WPS_AP) && CONFIG_ENABLE_WPS_AP +extern void cmd_ap_wps(int argc, char **argv); +extern void cmd_wps(int argc, char **argv); +//extern void cmd_wifi_on(int argc, char **argv); +#endif +#if CONFIG_ENABLE_P2P +extern void cmd_wifi_p2p_start(int argc, char **argv); +extern void cmd_wifi_p2p_stop(int argc, char **argv); +extern void cmd_p2p_listen(int argc, char **argv); +extern void cmd_p2p_find(int argc, char **argv); +extern void cmd_p2p_peers(int argc, char **argv); +extern void cmd_p2p_info(int argc, char **argv); +extern void cmd_p2p_disconnect(int argc, char **argv); +extern void cmd_p2p_connect(int argc, char **argv); +extern void cmd_wifi_p2p_auto_go_start(int argc, char **argv); +extern void cmd_p2p_peers(int argc, char **argv); +#endif //CONFIG_ENABLE_P2P + +MON_RAM_TAB_SECTION COMMAND_TABLE console_cmd_wifi_api[] = { + {"ATPN", 1, fATPN, "=[,password[,encryption[,auto-reconnect[,reconnect pause]]]: WIFI Connect to AP"}, + {"ATPA", 1, fATPA, "=[,password[,encryption[,channel[,hidden[,max connections]]]]]: Start WIFI AP"}, +#if defined(CONFIG_ENABLE_WPS_AP) && CONFIG_ENABLE_WPS_AP + {"WPS_AP", 1, cmd_ap_wps, "=[,pin]: WiFi AP WPS"}, + {"WPS_ST", 1, cmd_wps, "=[,pin]: WiFi Station WPS"}, +#endif +#if CONFIG_ENABLE_P2P + {"P2P_START", 0, cmd_wifi_p2p_start, ": p2p start" }, + {"P2P_ASTART", 0, cmd_wifi_p2p_auto_go_start, ": p2p auto go start" }, + {"P2P_STOP", 0, cmd_wifi_p2p_stop, ": p2p stop"}, + {"P2P_PEERS", 0, cmd_p2p_peers, ": p2p peers" }, + {"P2P_FIND", 0, cmd_p2p_find, ": p2p find"}, + {"P2P_INFO", 0, cmd_p2p_info, ": p2p info"}, + {"P2P_DISCCONNECT", 0, cmd_p2p_disconnect, ": p2p disconnect"}, + {"P2P_CONNECT", 0, cmd_p2p_connect, ": p2p connect"}, +#endif + {"ATWR", 0, fATWR, ": WIFI Connect, Disconnect"}, +#if CONFIG_WLAN_CONNECT_CB + {"ATON", 0, fATON, ": Open connections"}, + {"ATOFF", 0, fATOF, ": Close connections"}, +#endif + {"ATWI", 0, fATWI, ": WiFi Info"}, +#if CONFIG_DEBUG_LOG > 3 + {"ATWT", 1, fATWT, "=: WiFi tx power: 0 - 100%, 1 - 75%, 2 - 50%, 3 - 25%, 4 - 12.5%"}, + {"ATSF", 0, fATSF, ": Test TSF value"}, +#endif + {"ATWP", 0, fATWP, ": WiFi power"}, + {"ATSN", 0, fATSN, ": Scan networks"} +}; + + diff --git a/project/src/rtl_boot_s.c b/project/src/rtl_boot_s.c new file mode 100644 index 0000000..7638774 --- /dev/null +++ b/project/src/rtl_boot_s.c @@ -0,0 +1,722 @@ +/* + * BootLoader Ver 0.2 + * Created on: 12/02/2017 + * Author: pvvx + */ + +//#include "../../../rtl_webupdater/project/inc/platform_autoconf.h" +#include "platform_autoconf.h" +#include "rtl_bios_data.h" +#include "diag.h" +#include "rtl8195a/rtl8195a_sys_on.h" + +#include "hal_spi_flash.h" + +//------------------------------------------------------------------------- +// Data declarations + +#define DEFAULT_BAUDRATE UART_BAUD_RATE_38400 + +/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz, + 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */ +#define DEFAULT_BOOT_CLK_CPU 1 // Warning! If Start CLK > 100 MHz -> Errors SPIC function in Ameba SDK! + +#ifdef DEFAULT_BOOT_CLK_CPU +#if DEFAULT_BOOT_CLK_CPU < 6 +#define DEFAULT_BOOT_CPU_CLOCK_SEL_DIV5_3 0 +#define DEFAULT_BOOT_CPU_CLOCK_SEL_VALUE DEFAULT_BOOT_CLK_CPU +#else +#define DEFAULT_BOOT_CPU_CLOCK_SEL_DIV5_3 1 +#define DEFAULT_BOOT_CPU_CLOCK_SEL_VALUE (DEFAULT_BOOT_CLK_CPU-6) +#endif +#endif // DEFAULT_BOOT_CLK_CPU + +#define BOOT_RAM_TEXT_SECTION // __attribute__((section(".boot.text"))) + +//------------------------------------------------------------------------- +typedef struct _seg_header { + uint32 size; + uint32 ldaddr; +} IMGSEGHEAD, *PIMGSEGHEAD; + +typedef struct _img2_header { + IMGSEGHEAD seg; + uint32 sign[2]; + void (*startfunc)(void); + uint8 rtkwin[7]; + uint8 ver[13]; + uint8 name[32]; +} IMG2HEAD, *PIMG2HEAD; + +#ifndef FLASH_SECTOR_SIZE +#define FLASH_SECTOR_SIZE 4096 +#endif +//------------------------------------------------------------------------- +// Function declarations +LOCAL void RtlBootToFlash(void); // image1 +LOCAL void RtlBoot1ToSram(void); // image1 +LOCAL void RtlBoot2ToSram(void); // image1 +LOCAL void RtlBoot3ToSram(void); // image1 +LOCAL void RtlBoot4ToSram(void); // image1 + +extern _LONG_CALL_ VOID HalCpuClkConfig(unsigned char CpuType); +extern _LONG_CALL_ VOID VectorTableInitRtl8195A(u32 StackP); +extern _LONG_CALL_ VOID HalInitPlatformLogUartV02(VOID); +extern _LONG_CALL_ VOID HalInitPlatformTimerV02(VOID); +//extern _LONG_CALL_ VOID DramInit_rom(IN DRAM_DEVICE_INFO *DramInfo); +//extern _LONG_CALL_ u32 SdrCalibration_rom(VOID); +extern _LONG_CALL_ int SdrControllerInit_rom(PDRAM_DEVICE_INFO pDramInfo); +extern _LONG_CALL_ u32 SpicCmpDataForCalibrationRtl8195A(void); // compare read_data and golden_data +//extern _LONG_CALL_ VOID SpicWaitWipDoneRtl8195A(SPIC_INIT_PARA SpicInitPara); // wait spi-flash status register[0] = 0 +//extern _LONG_CALL_ VOID SpicLoadInitParaFromClockRtl8195A(u8 CpuClkMode, u8 BaudRate, PSPIC_INIT_PARA pSpicInitPara); +//extern _LONG_CALL_ VOID RtlConsolInit(IN u32 Boot, IN u32 TBLSz, IN VOID *pTBL); + +//#pragma arm section code = ".boot.text"; +//#pragma arm section rodata = ".boot.rodata", rwdata = ".boot.data", zidata = ".boot.bss"; + +typedef void (*START_FUNC)(void); + +//------------------------------------------------------------------------- +/* Start table: */ +START_RAM_FUN_SECTION RAM_FUNCTION_START_TABLE __ram_start_table_start__ = { + RtlBootToFlash + 1, // StartFun(), Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) + RtlBoot1ToSram + 1, // PatchWAKE(), Run if ( v40000210 & 0x20000000 ) + RtlBoot2ToSram + 1, // PatchFun0(), Run if ( v40000210 & 0x10000000 ) + RtlBoot3ToSram + 1, // PatchFun1(), Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 ) + RtlBoot4ToSram + 1 };// PatchFun2(), Run for Init console, if ( v40000210 & 0x4000000 ) +//------------------------------------------------------------------------- +/* Set Debug Flags */ +LOCAL void BOOT_RAM_TEXT_SECTION SetDebugFlgs() { +#if CONFIG_DEBUG_LOG > 3 + CfgSysDebugWarn = -1; + CfgSysDebugInfo = -1; + CfgSysDebugErr = -1; + ConfigDebugWarn = -1; + ConfigDebugInfo = -1; + ConfigDebugErr = -1; +#elif CONFIG_DEBUG_LOG > 1 + CfgSysDebugWarn = -1; + // CfgSysDebugInfo = 0; + CfgSysDebugErr = -1; + ConfigDebugWarn = -1; + // ConfigDebugInfo = 0; + ConfigDebugErr = -1; +#elif CONFIG_DEBUG_LOG > 0 + // CfgSysDebugWarn = 0; + // CfgSysDebugInfo = 0; + CfgSysDebugErr = -1; + // ConfigDebugWarn = 0; + // ConfigDebugInfo = 0; + ConfigDebugErr = -1; +#else + // CfgSysDebugWarn = 0; + // CfgSysDebugInfo = 0; + // CfgSysDebugErr = 0; + // ConfigDebugWarn = 0; + // ConfigDebugInfo = 0; + // ConfigDebugErr = 0; +#endif +} + +/* JTAG On */ +LOCAL void BOOT_RAM_TEXT_SECTION JtagOn(void) { + ACTCK_VENDOR_CCTRL(ON); + SLPCK_VENDOR_CCTRL(ON); + HalPinCtrlRtl8195A(JTAG, 0, 1); +} + +/* GetChipId() */ +LOCAL uint8 /*INFRA_START_SECTION*/BOOT_RAM_TEXT_SECTION _Get_ChipId() { + uint8 ChipId = CHIP_ID_8710AF; + if (HALEFUSEOneByteReadROM(HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_CTRL), 0xF8, + &ChipId, L25EOUTVOLTAGE) != 1) + DBG_8195A("Get Chip ID Failed\r"); + return ChipId; +} + +/* + * 16 bytes FIFO ... 16*11/38400 = 0.004583 sec + * (0.005/5)*166666666 = 166666.666 Tcpu + */ +LOCAL void /*INFRA_START_SECTION*/BOOT_RAM_TEXT_SECTION loguart_wait_tx_fifo_empty(void) { + if (HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_LOG_UART_EN) { + int x = 16384; + while ((!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)) && x--) + ; // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! + } +} + +extern SPIC_INIT_PARA SpicInitParaAllClk[SpicMaxMode][CPU_CLK_TYPE_NO]; // 100021ec [144=0x90] +LOCAL uint32 InitTabParaAllClk[3 * CPU_CLK_TYPE_NO] = { + // SIO + 0x01310102, // 72t/byte + 0x03310101, // 0201 - 40t, 0101 - 39t, 0102 - 72t, 0103 - 104t + 0x05310001, // 39t + 0x07310001, + 0x09310001, + 0x0B310001, + // DIO + 0x11311301, // BaudRate = 1, RdDummyCyle = 19, DelayLine = 63, DIO + 0x13311201, // 1201 - 36t + 0x15311101, // 1101 - 35t + 0x17311101, + 0x19311101, + 0x1B311101 + // QIO + /* MXIC Flash only DIO! + 0x21311301, // BaudRate = 1, RdDummyCyle = 19, DelayLine = 63, DIO + 0x23311201, // 1201 - 36t + 0x25311101, // 1101 - 35t + 0x27311101, + 0x29311101, + 0x2B311101 + */ +}; + +struct spic_table_flash_type { + uint8 cmd[12]; + uint8 strlr2; + uint8 fbaud; + uint8 addrlen; + uint8 fsize; + uint32 contrl; + uint16 validcmd[3]; + uint8 manufacturerid; + uint8 memorytype; +}; + +//PSPIC_INIT_PARA pSpicInitPara; + +struct spic_table_flash_type spic_table_flash = { + { // for FLASH MX25L8006E/1606E + FLASH_CMD_FREAD, // REG_SPIC_READ_FAST_SINGLE 0x400060E0 0x0B + FLASH_CMD_DREAD, // REG_SPIC_READ_DUAL_DATA 0x400060E4 0x3B + FLASH_CMD_DREAD, // REG_SPIC_READ_DUAL_ADDR_DATA 0x400060E8 0x3B ? + FLASH_CMD_QREAD, // REG_SPIC_READ_QUAD_DATA 0x400060EC 0x6B + FLASH_CMD_4READ, // REG_SPIC_READ_QUAD_ADDR_DATA 0x400060F0 0xEB ? + FLASH_CMD_PP, // REG_SPIC_WRITE_SIGNLE 0x400060F4 0x02 + FLASH_CMD_DPP, // REG_SPIC_WRITE_DUAL_DATA 0x400060F8 0xA2 + FLASH_CMD_DPP, // REG_SPIC_WRITE_DUAL_ADDR_DATA 0x400060FC 0xA2 ? + FLASH_CMD_QPP, // REG_SPIC_WRITE_QUAD_DATA 0x40006100 0x32 + FLASH_CMD_4PP, // REG_SPIC_WRITE_QUAD_ADDR_DATA 0x40006104 0x38 + FLASH_CMD_WREN, // REG_SPIC_WRITE_ENABLE 0x40006108 0x06 + FLASH_CMD_RDSR // REG_SPIC_READ_STATUS 0x4000610C 0x05 + }, + BIT_FIFO_ENTRY(5) | BIT_SO_DUM, // REG_SPIC_CTRLR2 0x40006110 0x51 + BIT_FSCKDV(1), // REG_SPIC_FBAUDR 0x40006114 0x01 + BIT_ADDR_PHASE_LENGTH(3), // REG_SPIC_ADDR_LENGTH 0x40006118 0x03 + BIT_FLASE_SIZE(0x0F), // REG_SPIC_FLASE_SIZE 0x40006124 0x0E ? + BIT_CS_H_WR_DUM_LEN(2)| BIT_AUTO_ADDR__LENGTH(3) | BIT_RD_DUMMY_LENGTH(0x0), // REG_SPIC_AUTO_LENGTH 0x4000611C 0x20030001 ? + { + BIT_WR_BLOCKING, // REG_SPIC_VALID_CMD 0x40006120 0x200 SpicOneBitMode + BIT_WR_BLOCKING | BIT_RD_DUAL_I, // REG_SPIC_VALID_CMD 0x40006120 0x202 SpicDualBitMode + BIT_WR_BLOCKING | BIT_RD_DUAL_I, // REG_SPIC_VALID_CMD 0x40006120 0x202 SpicDualBitMode + // BIT_WR_BLOCKING | BIT_RD_QUAD_O, // REG_SPIC_VALID_CMD 0x40006120 0x208 SpicQuadBitMode MXIC not QIO + }, + 0xC2, 0x20 // MX25L8006/MX25L1606 +}; + +LOCAL int BOOT_RAM_TEXT_SECTION SetSpicBitMode(uint8 BitMode) { + PSPIC_INIT_PARA pspic = &SpicInitParaAllClk[BitMode][((HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL1) >> 4) & 7)]; + if(pspic->Mode.Valid) { + // Disable SPI_FLASH User Mode + HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); + HAL_SPI_WRITE32(REG_SPIC_VALID_CMD, spic_table_flash.validcmd[pspic->Mode.BitMode]); + HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, (HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH) & 0xFFFF0000) | pspic->RdDummyCyle); + HAL_SPI_WRITE32(REG_SPIC_BAUDR, pspic->BaudRate); + FLASH_DDL_FCTRL(pspic->DelayLine); // SPI_DLY_CTRL_ADDR [7:0] + // Enable SPI_FLASH User Mode + HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN); + } + SPI_FLASH_PIN_FCTRL(ON); + // Test Read Pattern + if(!SpicCmpDataForCalibrationRtl8195A()) { + FLASH_DDL_FCTRL(0x31); // SPI_DLY_CTRL_ADDR [7:0] + for(uint8 BaudRate = 1; BaudRate < 4; BaudRate++) { + for(uint8 RdDummyCyle = 0; RdDummyCyle < 63; RdDummyCyle++) { + // Disable SPI_FLASH User Mode + HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); + HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, (HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH) & 0xFFFF0000) | RdDummyCyle); + HAL_SPI_WRITE32(REG_SPIC_BAUDR, BaudRate); + // Enable SPI_FLASH User Mode + HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN); + // HAL_SPI_WRITE32(REG_SPIC_FLUSH_FIFO, 1); + if(SpicCmpDataForCalibrationRtl8195A()) { + DiagPrintf("Spic reinit %d:%d\n", BaudRate, RdDummyCyle); + pspic->BaudRate = BaudRate; + pspic->RdDummyCyle = RdDummyCyle; + pspic->DelayLine = 0x31; + pspic->Mode.Valid = 1; + return 1; + }; + }; + }; + return 0; + }; + return 1; +} + +void BOOT_RAM_TEXT_SECTION InitSpicFlashType(struct spic_table_flash_type *ptable_flash) { + u8 * ptrb = &ptable_flash->cmd; + volatile u32 * ptrreg = (volatile u32 *)(SPI_FLASH_CTRL_BASE + REG_SPIC_READ_FAST_SINGLE);// 0x400060E0 + HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); // Disable SPI_FLASH User Mode + do { + *ptrreg++ = *ptrb++; + } while(ptrb < (u8 *)(&ptable_flash->fsize)); + ptrreg[0] = ptable_flash->contrl; + ptrreg[1] = ptable_flash->validcmd[SpicOneBitMode]; + ptrreg[2] = ptable_flash->fsize; + HAL_SPI_WRITE32(REG_SPIC_SER, BIT_SER); +} + +LOCAL int BOOT_RAM_TEXT_SECTION InitSpic(uint8 SpicBitMode) { + _memset(SpicInitParaAllClk, 0, sizeof(SpicInitParaAllClk)); + uint32 * ptr = InitTabParaAllClk; + uint8 x; + for(x = 0; x < SpicMaxMode; x++) { + *(uint32 *)&SpicInitParaAllClk[SpicOneBitMode][x].BaudRate = ptr[0]; + *(uint32 *)&SpicInitParaAllClk[SpicDualBitMode][x].BaudRate = ptr[CPU_CLK_TYPE_NO]; + *(uint32 *)&SpicInitParaAllClk[SpicQuadBitMode][x].BaudRate = ptr[CPU_CLK_TYPE_NO]; // MXIC not QIO + ptr++; + } + ACTCK_FLASH_CCTRL(1); + SLPCK_FLASH_CCTRL(1); + HalPinCtrlRtl8195A(SPI_FLASH, 0, 1); + InitSpicFlashType(&spic_table_flash); + return SetSpicBitMode(SpicBitMode); +} + + +/* SYSPlatformInit */ +LOCAL void /*INFRA_START_SECTION*/BOOT_RAM_TEXT_SECTION SYSPlatformInit(void) { + __asm__ __volatile__ ("cpsid f\n"); + JtagOn(); + SetDebugFlgs(); + //----- SYS Init + HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, + (HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0) & (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04))) | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 + HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, + (HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1) & (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1))) | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; + //----- SDIO_Device_Off + HAL_PERI_ON_WRITE32(REG_PESOC_HCI_CLK_CTRL0, + HAL_PERI_ON_READ32(REG_PESOC_HCI_CLK_CTRL0) & (~BIT_SOC_ACTCK_SDIO_DEV_EN)); + HAL_PERI_ON_WRITE32(REG_SOC_HCI_COM_FUNC_EN, + HAL_PERI_ON_READ32(REG_SOC_HCI_COM_FUNC_EN) & (~(BIT_SOC_HCI_SDIOD_ON_EN | BIT_SOC_HCI_SDIOD_OFF_EN))); + HAL_PERI_ON_WRITE32(REG_HCI_PINMUX_CTRL, + HAL_PERI_ON_READ32(REG_HCI_PINMUX_CTRL) & (~(BIT_HCI_SDIOD_PIN_EN))); + //----- GPIO Adapter + extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter; + _memset(&gBoot_Gpio_Adapter, 0, sizeof(gBoot_Gpio_Adapter)); + _pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter; +#ifdef DEFAULT_BOOT_CLK_CPU + //----- CLK CPU + loguart_wait_tx_fifo_empty(); // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! +#if DEFAULT_BOOT_CPU_CLOCK_SEL_DIV5_3 + // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz + HalCpuClkConfig(DEFAULT_BOOT_CPU_CLOCK_SEL_VALUE); + *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 +#else + // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz + *((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 + HalCpuClkConfig(DEFAULT_BOOT_CPU_CLOCK_SEL_VALUE); +#endif // CPU_CLOCK_SEL_DIV5_3 +#endif // DEFAULT_CLK_CPU + //----- System + VectorTableInitRtl8195A(STACK_TOP); // 0x1FFFFFFC + HalInitPlatformLogUartV02(); // Show ""... :( + HalInitPlatformTimerV02(); + __asm__ __volatile__ ("cpsie f\n"); +} + +/*------------------------------------------------------------------------------------- + Копирует данные из области align(4) (flash, registers, ...) в область align(1) (ram) + --------------------------------------------------------------------------------------*/ +LOCAL unsigned int BOOT_RAM_TEXT_SECTION flashcpy(unsigned int faddr, + void *dist, unsigned int size) { + union { + unsigned char uc[4]; + unsigned int ud; + } tmp; + if (faddr < SPI_FLASH_BASE) + faddr += SPI_FLASH_BASE; + unsigned char * pd = (unsigned char *) dist; + unsigned int *p = (unsigned int *) ((unsigned int) faddr & (~3)); + unsigned int xlen = (unsigned int) faddr & 3; + unsigned int len = size; + + if (xlen) { + tmp.ud = *p++; + while (len) { + len--; + *pd++ = tmp.uc[xlen++]; + if (xlen & 4) + break; + }; + }; + xlen = len >> 2; + while (xlen) { + tmp.ud = *p++; + *pd++ = tmp.uc[0]; + *pd++ = tmp.uc[1]; + *pd++ = tmp.uc[2]; + *pd++ = tmp.uc[3]; + xlen--; + }; + if (len & 3) { + tmp.ud = *p; + pd[0] = tmp.uc[0]; + if (len & 2) { + pd[1] = tmp.uc[1]; + if (len & 1) { + pd[2] = tmp.uc[2]; + }; + }; + }; + return size; +} + +enum { + SEG_ID_ERR, + SEG_ID_SRAM, + SEG_ID_TCM, + SEG_ID_SDRAM, + SEG_ID_SOC, + SEG_ID_FLASH, + SEG_ID_CPU, + SEG_ID_ROM, + SEG_ID_MAX +} SEG_ID; + +LOCAL const char * const txt_tab_seg[] = { + "UNK", // 0 + "SRAM", // 1 + "TCM", // 2 + "SDRAM", // 3 + "SOC", // 4 + "FLASH", // 5 + "CPU", // 6 + "ROM" // 7 +}; + +LOCAL const uint32 tab_seg_def[] = { 0x10000000, 0x10070000, 0x1fff0000, + 0x20000000, 0x30000000, 0x30200000, 0x40000000, 0x40800000, 0x98000000, + 0xA0000000, 0xE0000000, 0xE0010000, 0x00000000, 0x00050000 }; + +LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) { + uint32 ret = SEG_ID_ERR; + uint32 * ptr = &tab_seg_def; + if (size > 0) { + do { + ret++; + if (addr >= ptr[0] && addr + size <= ptr[1]) { + return ret; + }; + ptr += 2; + } while (ret < SEG_ID_MAX); + }; + return 0; +} + +LOCAL uint32 BOOT_RAM_TEXT_SECTION load_img2_head(uint32 faddr, PIMG2HEAD hdr) { + flashcpy(faddr, hdr, sizeof(IMG2HEAD)); + uint32 ret = get_seg_id(hdr->seg.ldaddr, hdr->seg.size); + if (hdr->sign[1] == IMG_SIGN2_RUN) { + if (hdr->sign[0] == IMG_SIGN1_RUN) { + ret |= 1 << 9; + } else if (hdr->sign[0] == IMG_SIGN1_SWP) { + ret |= 1 << 8; + }; + } + if (*(u32 *) (&hdr->rtkwin) == IMG2_SIGN_DW1_TXT) { + ret |= 1 << 10; + }; + return ret; +} + +LOCAL uint32 BOOT_RAM_TEXT_SECTION load_segs(uint32 faddr, PIMG2HEAD hdr, + uint8 flgload) { + uint32 fnextaddr = faddr; + uint8 segnum = 0; + while (1) { + uint32 seg_id = get_seg_id(hdr->seg.ldaddr, hdr->seg.size); + DBG_8195A("fnextaddr=0x%x seg_id=0x%x\n", fnextaddr, seg_id); + if (flgload + && (seg_id == SEG_ID_SRAM || seg_id == SEG_ID_TCM + || seg_id == SEG_ID_SDRAM)) { +#if CONFIG_DEBUG_LOG > 1 + DBG_8195A("Load Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", + segnum, faddr, txt_tab_seg[seg_id], hdr->seg.ldaddr, + hdr->seg.size); +#endif + fnextaddr += flashcpy(fnextaddr, hdr->seg.ldaddr, hdr->seg.size); + } else if (seg_id) { +#if CONFIG_DEBUG_LOG > 2 + DBG_8195A("Skip Flash seg%d: 0x%08x -> %s: 0x%08x, size: %d\n", segnum, + fnextaddr, txt_tab_seg[seg_id], hdr->seg.ldaddr, hdr->seg.size); +#endif + fnextaddr += hdr->seg.size; + } else { + break; + } + fnextaddr += flashcpy(fnextaddr, &hdr->seg, sizeof(IMGSEGHEAD)); + segnum++; + } + return fnextaddr; +} + +/* loadUserImges + * загружает Image2 с заданным номером +*/ +LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int image_selection) { + IMG2HEAD hdr; + int image_to_load = image_selection & 0x0f; + int current_image_num = 0; + uint32 faddr; // с какого места искать Image2 + uint32 img_id; + u8 faddr_from_sysarea=0; + DBG_8195A("Selected Image %d.\n", image_selection & 0x0f); + + //задаем начальный адрес Image2 + if ((image_selection == 0x23) || (image_selection == 0x11)) { + int fsize = 0x200000; + if (_Get_ChipId()==CHIP_ID_8710AF) + fsize = 0x100000; + // выбрана последняя прошивка - начальный адрес берем из системной области + // (upgraded Image2) + flashcpy(FLASH_SYSTEM_DATA_ADDR, &faddr, sizeof(faddr)); // config data + 0 + // начало прошивки только с начала блока + faddr &= ~(FLASH_SECTOR_SIZE - 1); + // проверим загруженный адрес + if (faddr >= fsize) + faddr = 0xb000; // начальный адрес в системной области неверный, будем искать прошивку + else { + current_image_num = image_to_load; + faddr_from_sysarea = 1; + } + } + else + faddr = 0xb000; // default Image2 + + while (1) { + faddr = (faddr + FLASH_SECTOR_SIZE - 1) & (~(FLASH_SECTOR_SIZE - 1)); + DBG_8195A("image_to_load=%d faddr=0x%x ", image_to_load, faddr); + DBG_8195A("current_image_num=%d faddr_from_sysarea=%d\n",current_image_num, faddr_from_sysarea); + img_id = load_img2_head(faddr, &hdr); + if ((img_id >> 8) > 4 || (uint8) img_id != 0) { + faddr = load_segs(faddr + 0x10, &hdr.seg, + current_image_num == image_to_load); + if (current_image_num == image_to_load) { + DBG_8195A("Image%d: %s\n", current_image_num, hdr.name); + break; + } + current_image_num++; + } + else { + if (current_image_num) { + faddr = 0xb000; // default Image2 + current_image_num =0; + if (faddr_from_sysarea) { + // нет Image2 по адресу из FLASH_SYSTEM_DATA_ADDR + // попробуем загрузить прошивку заданную выводами + faddr_from_sysarea =0; + continue; + } + // по заданному адресу прошивки нет + DBG_8195A("No Image%d! Trying Image0...\n", image_to_load); + // пробуем загрузить 0 прошивку + image_to_load = 0; + } + else { + // нет 0 прошивки, прекращаем загрузку + current_image_num = -1; + break; + } + } + }; + return current_image_num; +} + +/* IsForceLoadDefaultImg2 + * считывает из системной области список выводов для выбора прошивки (максимум два) + * и опрашивает состояние этих выводов + * номер прошивки: + * номер 0 - default Image2 - аварийная прошивка + * номера 1..3 - upgraded Image2 - рабочие прошивки + * + * на выходе: биты 3..0 - выбранный номер прошивки + * если выводы не заданы или заданы неправильно - возвращает 0 + * если задан 1 вывод возвращает 0...1 + * если задано 2 вывода возвращает 0...3 + * биты 7..4 - сколько выводов задано + */ +/*LOCAL*/ uint8 BOOT_RAM_TEXT_SECTION IsForceLoadDefaultImg2(void) { + uint8 gpio_pin[4]; + HAL_GPIO_PIN GPIO_Pin; + HAL_GPIO_PIN_STATE flg; + int result; + int mask; + int pincount; + u8 uart_disconnected; + + flashcpy(FLASH_SYSTEM_DATA_ADDR + 0x08, &gpio_pin, sizeof(gpio_pin)); // config data + 8 + // _pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter; + + pincount =0; + result=0; + mask=1; + uart_disconnected=0; + for (int i = 0; i<2; i++) { + uint8 x = gpio_pin[i]; + if (x != 0xff) { + // если вывод в том же состоянии считаем что он выбран + // если он в противоположном состоянии - не выбран + if (x & 0x80) { + GPIO_Pin.pin_mode = DIN_PULL_LOW; + flg = GPIO_PIN_LOW; + } else { + GPIO_Pin.pin_mode = DIN_PULL_HIGH; + flg = GPIO_PIN_HIGH; + } + + x &=0x7f; + GPIO_Pin.pin_name = HAL_GPIO_GetIPPinName_8195a(x); + if (GPIO_Pin.pin_name == 0xff) + continue; + + // PB0, PB1 - LOG UART + // в модулях RTL00/01 PB0 не может использоваться как вход выбора прошивки. + if (((x==0x11) || (x==0x10)) && (uart_disconnected==0)) { + HalPinCtrlRtl8195A(LOG_UART, 0, 0); // отключим LOG UART + uart_disconnected =1; + } + + HAL_GPIO_Init_8195a(&GPIO_Pin); + HalDelayUs(50); + if (HAL_GPIO_ReadPin_8195a(&GPIO_Pin) == flg) + result |= mask; + + HAL_GPIO_DeInit_8195a(&GPIO_Pin); + mask<<=1; + pincount++; + } + }; // while + if (uart_disconnected) { + HalPinCtrlRtl8195A(LOG_UART, 0, 1); // подключим LOG UART + HalDelayUs(26*11); // 1/38400 * 11 + } + + // _pHAL_Gpio_Adapter->IrqHandle.IrqFun = NULL; + + DBG_8195A("Pin count=%d Image %d selected\n",pincount, result); + return (result & 0x0f) | (pincount<<4); +} + +/* RTL Console ROM */ +LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) { + // DiagPrintf("\r\nRTL Console ROM\r\n"); + // RtlConsolInit(ROM_STAGE, (u32) 6, (void*) &UartLogRomCmdTable); + pUartLogCtl->RevdNo = UART_LOG_HISTORY_LEN; + pUartLogCtl->BootRdy = 1; + pUartLogCtl->pTmpLogBuf->UARTLogBuf[0] = '?'; + pUartLogCtl->pTmpLogBuf->BufCount = 1; + pUartLogCtl->ExecuteCmd = 1; + RtlConsolTaskRom(pUartLogCtl); +} + +/* Enter Image 1.5 */ +LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) { + int load_result; + + if (flg) + _memset(&__rom_bss_start__, 0, &__rom_bss_end__ - &__rom_bss_start__); + + SYSPlatformInit(); + + if (!flg) + DBG_8195A("\r===== Enter FLASH-Boot ====\n"); + else + DBG_8195A("\r===== Enter SRAM-Boot %d ====\n", flg); +#if CONFIG_DEBUG_LOG > 1 + DBG_8195A("CPU CLK: %d Hz, SOC FUNC EN: %p\r\n", HalGetCpuClk(), + HAL_PERI_ON_READ32(REG_SOC_FUNC_EN)); +#endif + uint8 ChipId = _Get_ChipId(); + if (ChipId < CHIP_ID_8195AM) { + //----- SDRAM Off + SDR_PIN_FCTRL(OFF); + LDO25M_CTRL(OFF); + HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Off + } else { + //----- SDRAM On + LDO25M_CTRL(ON); + HAL_SYS_CTRL_WRITE32(REG_SYS_REGU_CTRL0, + (HAL_SYS_CTRL_READ32(REG_SYS_REGU_CTRL0) & 0xfffff) | BIT_SYS_REGU_LDO25M_ADJ(0x0e)); + SDR_PIN_FCTRL(ON); + }; + if (!InitSpic(SpicDualBitMode)) { + DBG_8195A("Spic Init Error!\n"); + RtlConsolRam(); + }; + if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT(21)) == 0) { // уже загружена? + // extern DRAM_DEVICE_INFO SdrDramInfo_rom; // 50 MHz + if (!SdrControllerInit_rom(&SdrDramInfo)) { // 100 MHz + DBG_8195A("SDR Controller Init fail!\n"); + RtlConsolRam(); + } +#if 0 // Test SDRAM + else { + uint32 *ptr = SDR_SDRAM_BASE; + uint32 tt = 0x55AA55AA; + for (int i = 0; i < 512 * 1024; i++) { + ptr[i] = tt++; + }; + tt = 0x55AA55AA; + for (int i = 0; i < 512 * 1024; i++) { + if (ptr[i] != tt) { + DBG_8195A("SDR err %p %p != %p!\n", &ptr[i], ptr[i], tt); + RtlConsolRam(); + } + tt++; + }; + DBG_8195A("SDR tst end\n"); + }; +#endif // test + HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); + }; + + if (!flg) { + load_result = loadUserImges(IsForceLoadDefaultImg2()); + } + + + if (_strcmp((const char *) &__image2_validate_code__, IMG2_SIGN_TXT) || + (load_result <0)) { + DBG_8195A("Invalid Image Signature!\n"); + RtlConsolRam(); + } + + DBG_8195A("Img Sign: %s, Go @ 0x%08x\r\n", &__image2_validate_code__, + __image2_entry_func__); + __image2_entry_func__(); +} + +/* RtlBootToSram */ +LOCAL void BOOT_RAM_TEXT_SECTION RtlBoot1ToSram(void) { + EnterImage15(1); +} +/* RtlBootToSram */ +LOCAL void BOOT_RAM_TEXT_SECTION RtlBoot2ToSram(void) { + EnterImage15(2); +} +/* RtlBootToSram */ +LOCAL void BOOT_RAM_TEXT_SECTION RtlBoot3ToSram(void) { + EnterImage15(3); +} +/* RtlBootToSram */ +LOCAL void BOOT_RAM_TEXT_SECTION RtlBoot4ToSram(void) { + EnterImage15(4); +} + +LOCAL void BOOT_RAM_TEXT_SECTION RtlBootToFlash(void) { + EnterImage15(0); +} diff --git a/project/src/user/main.c b/project/src/user/main.c new file mode 100644 index 0000000..5cd8912 --- /dev/null +++ b/project/src/user/main.c @@ -0,0 +1,97 @@ +/* + * + */ + +#include "platform_autoconf.h" +#include "autoconf.h" +#include "FreeRTOS.h" +#include "task.h" +#include "diag.h" +#include "hal_crypto.h" +#include "hal_log_uart.h" +#include "hal_misc.h" +#include "diag.h" +//#include "wdt_api.h" +//#include +#include "hal_platform.h" +#include "rtl8195a_sys_on.h" + +#ifdef CONFIG_WDG_ON_IDLE +#include "hal_peri_on.h" +#include "rtl8195a_peri_on.h" +#endif + +/* --------------------------------------------------- + * Customized Signature (Image Name) + * ---------------------------------------------------*/ +#include "section_config.h" +SECTION(".custom.validate.rodata") +const unsigned char cus_sig[32] = "HTTPD Sample"; + +#ifdef CONFIG_DEBUG_LOG +#define DEBUG_MAIN_LEVEL CONFIG_DEBUG_LOG +#else +#define DEBUG_MAIN_LEVEL 0 +#endif + +#ifndef CONFIG_INIT_NET +#define CONFIG_INIT_NET 1 +#endif +#ifndef CONFIG_INTERACTIVE_MODE +#define CONFIG_INTERACTIVE_MODE 1 +#endif + +extern void user_init_thrd(void); + +/* RAM/TCM/Heaps info */ +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + +/* main */ +void main(void) +{ +#if DEBUG_MAIN_LEVEL > 3 + ConfigDebugErr = -1; + ConfigDebugInfo = ~(_DBG_SPI_FLASH_);//|_DBG_TCM_HEAP_); + ConfigDebugWarn = -1; + CfgSysDebugErr = -1; + CfgSysDebugInfo = -1; + CfgSysDebugWarn = -1; +#endif + +#ifdef CONFIG_WDG_ON_IDLE + HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & 0x1FFFFF); +#if CONFIG_DEBUG_LOG > 3 + WDGInitial(CONFIG_WDG_ON_IDLE * 3000); // 30 s +#else + WDGInitial(CONFIG_WDG_ON_IDLE * 1000); // 10 s +#endif + WDGStart(); +#endif + +#if (defined(CONFIG_CRYPTO_STARTUP) && (CONFIG_CRYPTO_STARTUP)) + if(rtl_cryptoEngine_init() != 0 ) { + DBG_8195A("Crypto engine init failed!\n"); + } +#endif + +#if DEBUG_MAIN_LEVEL > 1 + vPortFree(pvPortMalloc(4)); // Init RAM heap + ShowMemInfo(); // RAM/TCM/Heaps info +#endif + + /* wlan & user_start intialization */ + xTaskCreate(user_init_thrd, "user_init", 1024, NULL, tskIDLE_PRIORITY + 1 + PRIORITIE_OFFSET, NULL); + + /*Enable Schedule, Start Kernel*/ +#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED +#ifdef PLATFORM_FREERTOS + vTaskStartScheduler(); +#endif +#else + RtlConsolTaskRom(NULL); +#endif +} diff --git a/project/src/user/user_init.c b/project/src/user/user_init.c new file mode 100644 index 0000000..9abfcb7 --- /dev/null +++ b/project/src/user/user_init.c @@ -0,0 +1,101 @@ +/* + * user_init.c + * + */ +#include "user_config.h" +#include "platform_opts.h" +#include "rtl8195a.h" +#include "FreeRTOS.h" +#include "task.h" +#include "diag.h" +#include "objects.h" +#include "wifi_api.h" +//#include "espfs.h" +//#include "http_server.h" +//#include "httpd.h" +//#include "captdns.h" +#include "netbios/netbios.h" +#include "bitband_io.h" + + +//extern HttpdBuiltInUrl mainInUrls[]; + + +#ifdef WIFI_RESET_SETTINGS_PIN + +LOCAL int check_wifi_settings_reset(void) +{ + gpio_t button_gpio; + int time_tst = 300; // 3 sec low button +#if WIFI_RESET_SETTINGS_PIN == PB_1 + HalDeinitLogUart(); // sys_log_uart_off(); +#endif + gpio_init(&button_gpio, WIFI_RESET_SETTINGS_PIN); + gpio_dir(&button_gpio, PIN_INPUT); // Direction: Input + gpio_mode(&button_gpio, PullUp); // Pull-High + + while(time_tst) { + if(gpio_read(&button_gpio)) { + break; + }; + vTaskDelay(10); + time_tst--; + }; + + gpio_deinit(&button_gpio); +#if WIFI_RESET_SETTINGS_PIN == PB_1 + vTaskDelay(1); + HalPinCtrlRtl8195A(LOG_UART, 0, 1); // connect LOG UART // HalInitLogUart(); // sys_log_uart_on(); +#endif + return time_tst; +} + +#endif + +void user_init_thrd(void) { + +#ifdef WIFI_RESET_SETTINGS_PIN + if (check_wifi_settings_reset() == 0) { + rtl_printf("No Load Config\n"); + wifi_cfg.load_flg &= ~BID_WIFI_CFG; + }; +#endif + +#ifdef GPIO_LED_PIN + //GpioLedInit(); +#endif +// release_wakelock(15); + + wifi_init(); + + netbios_init(); + + //captdnsInit(); + + debug_printf("[Before espfsInit]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); + + //EspFsInitResult e = espFsInit((void*)FLASH_APP_BASE); + + debug_printf("[After espfsInit]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); + + //httpdInit(&mainInUrls, 80); + + //if (e==0) + // xTaskCreate(websocketBcast, "wsbcast", 300, NULL, WEBSOC_PRIORITY, NULL); + //else + // error_printf("Espfs not found.\n"); + + debug_printf("[After httpdInit]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); + + /* Initilaize the console stack */ + console_init(); + + /* Kill init thread after all init tasks done */ + vTaskDelete(NULL); +} + + + diff --git a/project/src/user/wc_mgr.c b/project/src/user/wc_mgr.c new file mode 100644 index 0000000..151e2c5 --- /dev/null +++ b/project/src/user/wc_mgr.c @@ -0,0 +1,291 @@ +#include "FreeRTOS.h" +#include "task.h" +#include "diag.h" +#include "objects.h" +#include "osdep_service.h" +#include "device_lock.h" +#include "semphr.h" +#include "tcm_heap.h" + + +#if CONFIG_WLAN +#include "wifi_conf.h" +#include "wlan_intf.h" +#include "wifi_constants.h" +#include "wifi_lib.h" + +#include +#include +#include +#endif +#include "lwip_netconf.h" +#include +#include +#include +#include "tcpip.h" + +#include "main.h" +#include "wc_mgr.h" +#include "http_server.h" + +//rtw_mode_t wifi_mode = RTW_MODE_STA_AP; //RTW_MODE__NONE; + + +#if CONFIG_LWIP_LAYER +extern struct netif xnetif[NET_IF_NUM]; +#endif + + + + +typedef int (*wlan_init_done_ptr)(void); +typedef int (*write_reconnect_ptr)(uint8_t *data, uint32_t len); +extern init_done_ptr p_wlan_init_done_callback; +//extern write_reconnect_ptr p_write_reconnect_ptr; + +static rtw_ap_info_t ap = {0}; + +static rtw_network_info_t wifi = { + {0}, // ssid + {0}, // bssid + 0, // security + NULL, // password + 0, // password len + -1 // key id +}; + +rtw_wifi_setting_t wifi_setting = {RTW_MODE_STA_AP, {0}, 0, RTW_SECURITY_OPEN, {0}}; + + + +#if 0 +static void init_wifi_struct(void) +{ + memset(wifi.ssid.val, 0, sizeof(wifi.ssid.val)); + memset(wifi.bssid.octet, 0, ETH_ALEN); + //memset(password, 0, sizeof(password)); + wifi.ssid.len = 0; + wifi.password = NULL; + wifi.password_len = 0; + wifi.key_id = -1; + memset(ap.ssid.val, 0, sizeof(ap.ssid.val)); + ap.ssid.len = 0; + ap.password = NULL; + ap.password_len = 0; + ap.channel = 1; +} + +static void get_wifi_setting_from_if() +{ + const char *ifname = WLAN0_NAME; + + if(rltk_wlan_running(WLAN1_IDX)) + {//STA_AP_MODE + ifname = WLAN1_NAME; + } + + wifi_get_setting(ifname, &wifi_setting); + + rtl_printf("LoadWifiSetting(): wifi_setting.ssid=%s\n", wifi_setting.ssid); + rtl_printf("LoadWifiSetting(): wifi_setting.channel=%d\n", wifi_setting.channel); + rtl_printf("LoadWifiSetting(): wifi_setting.security_type=%d\n", wifi_setting.security_type); + rtl_printf("LoadWifiSetting(): wifi_setting.password=%s\n", wifi_setting.password); +} +#endif + +void show_info(uint8_t wmask) { + rtw_wifi_setting_t Setting; + + if (wmask & 1) { + wifi_get_setting(WLAN0_NAME, &Setting); + wifi_show_setting(WLAN0_NAME, &Setting); + } + if (wmask & 2) { + wifi_get_setting(WLAN1_NAME, &Setting); + wifi_show_setting(WLAN1_NAME, &Setting); + } +} + +_WEAK void connect_start(void) +{ + rtl_printf("%s\n", __FUNCTION__); +} + +_WEAK void connect_close(void) +{ + rtl_printf("%s\n", __FUNCTION__); +} + +int wlan_reconnect(u8 *data, uint32_t len) { + rtl_printf("%s\n", __FUNCTION__); + return 0; +} +int write_reconnect_cb(u8 *data, uint32_t len) +{ + rtl_printf("%s\n", __FUNCTION__); + return 0; +} + +extern void (*p_wlan_autoreconnect_hdl)(rtw_security_t, char*, int, char*, int, int); +extern void wifi_autoreconnect_hdl (rtw_security_t, char*, int, char*, int, int); +// (not work if lib_wlan_mp.a ?) +int sta_autoreconnect_setup(void) +{ + p_wlan_autoreconnect_hdl = wifi_autoreconnect_hdl; + //WLAN0_NAME, mode, retry_times, timeout + return wext_set_autoreconnect(WLAN0_NAME, 1, 20, 7); +} + +void reset_wifi_settings(void) { + char* ssid; + + rtl_printf("%s\n", __func__); + + //--------- Default wi-fi settigns --------- + // STATION settings + ssid = "HOMEAP"; + wifi.ssid.len = strlen(ssid); + memset((void*)&wifi.ssid.val[0], 0, sizeof(&wifi.ssid.val)); + memcpy((void*)&wifi.ssid.val[0], (void*)ssid, wifi.ssid.len); + wifi.security_type = RTW_SECURITY_OPEN; //RTW_SECURITY_WPA2_AES_PSK; + wifi.password = "0123456789"; // + wifi.password_len = strlen(wifi.password); + wifi.key_id =0; + + // AP settings + ssid = "RTL8710"; + ap.ssid.len = strlen(ssid); + memset(ap.ssid.val, 0, sizeof(ap.ssid.val)); + memcpy((void*)&ap.ssid.val[0], (void*)ssid, ap.ssid.len); + ap.security_type = RTW_SECURITY_OPEN; // RTW_SECURITY_WPA2_AES_PSK + ap.channel = 1; + ap.password = "0123456789"; + ap.password_len = strlen(ap.password); + //------------------------------------------ +} +void load_wifi_settings(void) { + rtl_printf("%s\n", __func__); +#if 0 + // ... + // load settings from flash + // ... +#else + reset_wifi_settings(); +#endif +} + + +void wc_start(void) { + int ret; + void *semaphore = NULL; + int timeout = 10000/200; + + + + + p_wlan_init_done_callback = NULL; + + + + LwIP_Init(); + + if (wifi_on(RTW_MODE_STA_AP) < 0) { + printf("ERROR: Wifi on failed!\n"); + goto exit_fail; + } + + // stop dhcp server and client + dhcps_deinit(); + LwIP_DHCP(0, DHCP_STOP); + LwIP_DHCP(1, DHCP_STOP); + + rtl_printf("Starting AP ...\n"); + ret = wifi_start_ap( + ap.ssid.val, //char *ssid, + ap.security_type, //rtw_security_t ecurity_type, + ap.password, //char *password, + ap.ssid.len, //int ssid_len, + ap.password_len, //int password_len, + ap.channel //int channel + ); + if (ret != RTW_SUCCESS) { + rtl_printf("ERROR: Operation failed!\n\n"); + return; + } + while(1) { + char essid[33]; + + if(wext_get_ssid(WLAN1_NAME, (unsigned char *) essid) > 0) { + if(strcmp((const char *) essid, (const char *)ap.ssid.val) == 0) { + rtl_printf("%s started\n", ap.ssid.val); + ret = RTW_SUCCESS; + break; + } + } + + if(timeout == 0) { + rtl_printf("ERROR: Start AP timeout!\n"); + ret = RTW_TIMEOUT; + break; + } + //vTaskDelay(1 * configTICK_RATE_HZ); + vTaskDelay(200/portTICK_RATE_MS); + timeout --; + } + rtl_printf("[AP_on]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +#if CONFIG_LWIP_LAYER + LwIP_UseStaticIP(&xnetif[1]); +#ifdef CONFIG_DONT_CARE_TP + pnetiff->flags |= NETIF_FLAG_IPSWITCH; +#endif + dhcps_init(&xnetif[1]); +#endif + + show_info(2); + + sta_autoreconnect_setup(); + + rtl_printf("[Wifi_on]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); + + ret = wifi_connect(wifi.ssid.val, + wifi.security_type, + wifi.password, + wifi.ssid.len, + wifi.password_len, + wifi.key_id, + semaphore); + + rtl_printf("Connected to AP\n"); + rtl_printf("[STA_connected]: RAM heap\t%d bytes\tTCM heap\t%d bytes\n", + xPortGetFreeHeapSize(), tcm_heap_freeSpace()); + if(ret != RTW_SUCCESS) { + rtl_printf("ERROR: Operation failed! Error=%d\n", ret); + //goto exit_fail; + } else { + // Start DHCPClient + LwIP_DHCP(0, DHCP_START); + rtl_printf("Got IP\n"); + +#if CONFIG_WLAN_CONNECT_CB + // extern void connect_start(void); + connect_start(); +#endif + + } + + + + show_info(3); + + httpd_start(); + + + + exit_fail: + vTaskDelete(NULL); +} + + + diff --git a/readme.md b/readme.md new file mode 100644 index 0000000..5ceaafc --- /dev/null +++ b/readme.md @@ -0,0 +1,12 @@ +# RTL8710 Raw Packet Demo # +*** + +## REQUIREMENTS ## + +### Hardware ### +* RTL8710 based wi-fi module (RtlDuino/RTL00/RTL01/PADI) +* Openocd compatible JTAG adapter (jlink/st-link/cmsis-dap/versaloon...) + +### Sofrware ### +SDK3.5.2 +https://github.com/pvvx/RTL00MP3 diff --git a/readme.txt b/readme.txt new file mode 100644 index 0000000..a8c308e --- /dev/null +++ b/readme.txt @@ -0,0 +1,8 @@ +Raw Packets +RTL00 module (RTL8710AF) + +########################################################################################### +Used GCC SDK RTL8710 basic version +set paths.mk + +SDK_PATH = ../RTL00MP3/RTL00_SDKV35a/ diff --git a/sdkbuild.mk b/sdkbuild.mk new file mode 100644 index 0000000..5291d37 --- /dev/null +++ b/sdkbuild.mk @@ -0,0 +1,93 @@ + +include sdkset.mk +include paths.mk + +INCFLAGS = $(patsubst %,-I%,$(patsubst sdk/%,$(SDK_PATH)%,$(INCLUDES))) + +LIBFLAGS = $(addprefix -L,$(patsubst sdk/%,$(SDK_PATH)%,$(PATHLIBS))) $(addprefix -l,$(LIBS)) + +LFLAGS += -Wl,-Map=$(OBJ_DIR)/$(TARGET).map + +CFLAGS += $(INCFLAGS) + +SRC_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C))) $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C))) +DRAM_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C))) +BOOT_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C))) + +SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C)) +OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST))) +DEPENDENCY_LIST = $(patsubst %.c,$(OBJ_DIR)/%.d,$(SRC_C_LIST)) + +TARGET ?= build +OBJ_DIR ?= $(TARGET)/obj +BIN_DIR ?= $(TARGET)/bin +ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf + +all: prerequirement application +mp: prerequirement application + +.PHONY: build_info +build_info: + @echo \#define UTS_VERSION \"`date +%Y/%m/%d-%T`\" > .ver + @echo \#define RTL8195AFW_COMPILE_TIME \"`date +%Y/%m/%d-%T`\" >> .ver + @echo \#define RTL8195AFW_COMPILE_DATE \"`date +%Y%m%d`\" >> .ver + @echo \#define RTL8195AFW_COMPILE_BY \"`id -u -n`\" >> .ver + @echo \#define RTL8195AFW_COMPILE_HOST \"`$(HOSTNAME_APP)`\" >> .ver + @if [ -x /bin/dnsdomainname ]; then \ + echo \#define RTL8195AFW_COMPILE_DOMAIN \"`dnsdomainname`\"; \ + elif [ -x /bin/domainname ]; then \ + echo \#define RTL8195AFW_COMPILE_DOMAIN \"`domainname`\"; \ + else \ + echo \#define RTL8195AFW_COMPILE_DOMAIN ; \ + fi >> .ver + @echo \#define RTL195AFW_COMPILER \"gcc `$(CC) $(CFLAGS) -dumpversion | tr --delete '\r'`\" >> .ver + @mv -f .ver project/inc/$@.h + +.PHONY: application +application: build_info $(SRC_O) $(DRAM_O) $(BOOT_O) + @echo "===========================================================" + @echo "Link ($(TARGET))" +# @echo "===========================================================" + @mkdir -p $(BIN_DIR) $(OBJ_DIR) + @$(file > $(OBJ_DIR)/obj_list.lst,$(OBJ_LIST)) + @$(LD) $(LFLAGS) -o $(ELFFILE) @$(OBJ_DIR)/obj_list.lst $(LIBFLAGS) -T$(LDFILE) + @$(OBJDUMP) -d $(ELFFILE) > $(OBJ_DIR)/$(TARGET).asm + +.PHONY: prerequirement +#.NOTPARALLEL: prerequirement +prerequirement: +# @$(file >DEPENDENCY_LIST.txt,$(DEPENDENCY_LIST)) + @echo "===========================================================" + @echo "Compile ($(TARGET))" +# @echo "===========================================================" + @mkdir -p $(OBJ_DIR) + +$(SRC_O): %.o : %.c + @echo $< + @mkdir -p $(OBJ_DIR)/$(dir $@) + @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ + @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) + +$(DRAM_O): %.o : %.c + @echo $< + @mkdir -p $(OBJ_DIR)/$(dir $@) + @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ + @$(OBJCOPY) --prefix-alloc-sections .sdram $(OBJ_DIR)/$@ + @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) + +$(BOOT_O): %.o : %.c + @echo $< + @mkdir -p $(OBJ_DIR)/$(dir $@) + @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ + @$(OBJCOPY) --prefix-alloc-sections .boot $(OBJ_DIR)/$@ + @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) + +-include $(DEPENDENCY_LIST) + +VPATH:=$(OBJ_DIR) $(SDK_PATH) + +#.PHONY: clean +clean: + rm -rf $(OBJ_DIR) $(BIN_DIR) $(OBJ_DIR)/$(SDK_PATH) + + \ No newline at end of file diff --git a/sdkset.mk b/sdkset.mk new file mode 100644 index 0000000..dc9e442 --- /dev/null +++ b/sdkset.mk @@ -0,0 +1,450 @@ +#USE_AT = 1 +#USE_FATFS = 1 +#USE_SDIOH = 1 +#USE_POLARSSL = 1 +USE_P2P_WPS = 1 +ifndef USE_AT +USE_NEWCONSOLE = 1 +USE_WIFI_API = 1 +endif +USE_MBED = 1 + +#RTOSDIR=freertos_v8.1.2 +RTOSDIR=freertos_v9.0.0 +LWIPDIR=lwip_v1.4.1 + +# FLAGS +# ------------------------------------------------------------------- +CFLAGS = -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK -DF_CPU=166666666L -DNDEBUG +CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 -Wall -Werror +CFLAGS += -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -fsigned-char +CFLAGS += -w -Wno-pointer-sign +LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles -nostdlib +#--specs=nano.specs +LFLAGS += -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning -Wl,-nostdlib + +# LIBS +# ------------------------------------------------------------------- +LIBS = +all: LIBS +=_platform_new _wlan _p2p _wps _websocket _sdcard _xmodem _mdns +# m c nosys gcc _wps +mp: LIBS +=_platform_new _wlan_mp _wps _p2p _websocket _sdcard _xmodem _mdns +PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc +LDFILE = rlx8195A-symbol-v04-img2.ld +BOOTS = sdk/component/soc/realtek/8195a/misc/bsp/image + +# Include folder list +# ------------------------------------------------------------------- +INCLUDES = ../inc +INCLUDES += project/inc +INCLUDES += sdk/component/soc/realtek/common/bsp +INCLUDES += sdk/component/os/freertos +INCLUDES += sdk/component/os/freertos/$(RTOSDIR)/Source/include +INCLUDES += sdk/component/os/freertos/$(RTOSDIR)/Source/portable/GCC/ARM_CM3 +INCLUDES += sdk/component/os/os_dep/include sdk/component/soc/realtek/8195a/misc/driver +INCLUDES += sdk/component/common/api/network/include +INCLUDES += sdk/component/common/api +INCLUDES += sdk/component/common/api/platform +INCLUDES += sdk/component/common/api/wifi +INCLUDES += sdk/component/common/api/wifi/rtw_wpa_supplicant/src +INCLUDES += sdk/component/common/network +INCLUDES += sdk/component/common/network/lwip/$(LWIPDIR)/port/realtek/freertos +INCLUDES += sdk/component/common/network/lwip/$(LWIPDIR)/src/include +INCLUDES += sdk/component/common/network/lwip/$(LWIPDIR)/src/include/lwip +INCLUDES += sdk/component/common/network/lwip/$(LWIPDIR)/src/include/ipv4 +INCLUDES += sdk/component/common/network/lwip/$(LWIPDIR)/port/realtek +INCLUDES += sdk/component/common/test +INCLUDES += sdk/component/soc/realtek/8195a/cmsis +INCLUDES += sdk/component/soc/realtek/8195a/cmsis/device +INCLUDES += sdk/component/soc/realtek/8195a/fwlib +INCLUDES += sdk/component/soc/realtek/8195a/fwlib/rtl8195a +INCLUDES += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/ +INCLUDES += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/include +INCLUDES += sdk/component/common/drivers +INCLUDES += sdk/component/common/drivers/i2s +INCLUDES += sdk/component/common/drivers/wlan/realtek/include +INCLUDES += sdk/component/common/drivers/wlan/realtek/src/osdep +INCLUDES += sdk/component/common/drivers/wlan/realtek/src/hci +INCLUDES += sdk/component/common/drivers/wlan/realtek/src/hal +INCLUDES += sdk/component/common/drivers/wlan/realtek/src/hal/OUTSRC +INCLUDES += sdk/component/common/drivers/sdio/realtek/sdio_host/inc +INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom +INCLUDES += sdk/component/common/network/ssl/ssl_ram_map/rom +#INCLUDES += sdk/component/common/media/codec +#INCLUDES += sdk/component/common/drivers/usb_class/host/uvc/inc +#INCLUDES += sdk/component/common/drivers/usb_class/device +#INCLUDES += sdk/component/common/drivers/usb_class/device/class +#INCLUDES += sdk/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include + +# Source file list +# ------------------------------------------------------------------- +SRC_C = +DRAM_C = +BOOT_C = + +#bootloader +SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +#BOOT_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c + +#cmsis +SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/system_8195a.c + +#console new/old +ifdef USE_NEWCONSOLE +SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_console_new.c +else +SRC_C += sdk/component/common/api/at_cmd/log_service.c +SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_consol.c +endif +ifdef USE_AT +DRAM_C += sdk/component/common/api/at_cmd/atcmd_ethernet.c +DRAM_C += sdk/component/common/api/at_cmd/atcmd_lwip.c +DRAM_C += sdk/component/common/api/at_cmd/atcmd_sys.c +DRAM_C += sdk/component/common/api/at_cmd/atcmd_wifi.c +endif +#SRC_C += sdk/component/soc/realtek/8195a/misc/driver/low_level_io.c + +#network - api +ifdef USE_P2P_WPS +SRC_C += sdk/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_p2p_config.c +SRC_C += sdk/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_wps_config.c +endif +SRC_C += sdk/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c +SRC_C += sdk/component/common/api/wifi/wifi_conf.c +SRC_C += sdk/component/common/api/wifi/wifi_ind.c +SRC_C += sdk/component/common/api/wifi/wifi_promisc.c +SRC_C += sdk/component/common/api/wifi/wifi_simple_config.c +SRC_C += sdk/component/common/api/wifi/wifi_util.c +SRC_C += sdk/component/common/api/lwip_netconf.c +ifdef USE_WIFI_API +SRC_C += sdk/component/common/api/wifi_api.c +SRC_C += sdk/component/common/api/wifi_api_scan.c +endif + +#network - lwip +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/api_lib.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/api_msg.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/err.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/netbuf.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/netdb.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/netifapi.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/sockets.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/api/tcpip.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/autoip.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/icmp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/igmp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/inet.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/inet_chksum.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/ip.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/ip_addr.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/ipv4/ip_frag.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/def.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/dhcp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/dns.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/init.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/lwip_timers.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/mem.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/memp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/netif.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/pbuf.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/raw.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/stats.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/sys.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/tcp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/tcp_in.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/tcp_out.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/core/udp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/src/netif/etharp.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/port/realtek/freertos/ethernetif.c +SRC_C += sdk/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c +SRC_C += sdk/component/common/network/lwip/$(LWIPDIR)/port/realtek/freertos/sys_arch.c +SRC_C += sdk/component/common/network/dhcp/dhcps.c +SRC_C += sdk/component/common/network/sntp/sntp.c +SRC_C += sdk/component/common/network/netbios/netbios.c + +#network - mdns +#SRC_C += sdk/component/common/network/mDNS/mDNSPlatform.c + +#os - freertos +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/portable/MemMang/heap_5.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/portable/GCC/ARM_CM3/port.c +SRC_C += sdk/component/os/freertos/cmsis_os.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/croutine.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/event_groups.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/list.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/queue.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/tasks.c +SRC_C += sdk/component/os/freertos/$(RTOSDIR)/Source/timers.c + +#os - osdep +SRC_C += sdk/component/os/os_dep/device_lock.c +SRC_C += sdk/component/os/freertos/freertos_service.c +SRC_C += sdk/component/os/os_dep/mailbox.c +SRC_C += sdk/component/os/os_dep/osdep_api.c +SRC_C += sdk/component/os/os_dep/osdep_service.c +SRC_C += sdk/component/os/os_dep/tcm_heap.c + +ifdef USE_MBED +#peripheral - api +INCLUDES += sdk/component/common/mbed/api +INCLUDES += sdk/component/common/mbed/hal +INCLUDES += sdk/component/common/mbed/hal_ext +INCLUDES += sdk/component/common/mbed/targets/hal/rtl8195a +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/analogin_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/dma_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/efuse_api.c +#SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/ethernet_api.c +#SRC_C += sdk/component/common/drivers/ethernet_mii/ethernet_mii.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/flash_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/gpio_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/gpio_irq_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/i2c_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/i2s_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/log_uart_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/nfc_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/pinmap.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/pinmap_common.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/port_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/pwmout_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/rtc_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/serial_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/sleep.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/spdio_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/spi_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/sys_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/timer_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/us_ticker.c +SRC_C += sdk/component/common/mbed/common/us_ticker_api.c +SRC_C += sdk/component/common/mbed/common/wait_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/wdt_api.c +SRC_C += sdk/component/common/mbed/targets/hal/rtl8195a/flash_eep.c +endif + +#peripheral - hal +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_32k.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_adc.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_gdma.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_gpio.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_i2c.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_i2s.c +#SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_mii.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_nfc.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_pcm.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_pwm.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_ssi.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_timer.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_uart.c +ifdef USE_SDIOH +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_sdio_host.c +SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sd.c +SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c +endif + +#peripheral - osdep +SRC_C += sdk/component/os/freertos/freertos_pmu.c + +#peripheral - rtl8195a +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_adc.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gdma.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gpio.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2c.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2s.c +#SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_mii.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_nfc.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pwm.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_timer.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c + +#peripheral - wlan +#SRC_C += sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_skbuf.c + +#SDRAM +#DRAM_C += sdk/component/common/api/platform/stdlib_patch.c +#SDRAM - polarssl +ifdef USE_POLARSSL +INCLUDES += sdk/component/common/network/ssl/polarssl-1.3.8/include + +SRC_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/bignum.c + +DRAM_C += sdk/component/common/network/ssl/ssl_ram_map/rom/rom_ssl_ram_map.c +DRAM_C += sdk/component/common/network/ssl/ssl_ram_map/ssl_ram_map.c + +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/aes.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/aesni.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/arc4.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/asn1parse.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/asn1write.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/base64.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/blowfish.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/camellia.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ccm.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/certs.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/cipher.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/cipher_wrap.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ctr_drbg.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/debug.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/des.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/dhm.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ecp.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ecp_curves.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ecdh.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ecdsa.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/entropy.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/entropy_poll.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/error.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/gcm.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/havege.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/hmac_drbg.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/md.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/md_wrap.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/md2.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/md4.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/md5.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/memory_buffer_alloc.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/net.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/oid.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/padlock.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pbkdf2.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pem.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pkcs5.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pkcs11.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pkcs12.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pk.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pk_wrap.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pkparse.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/pkwrite.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/platform.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ripemd160.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/rsa.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/sha1.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/sha256.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/sha512.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ssl_cache.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ssl_ciphersuites.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ssl_cli.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ssl_srv.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/ssl_tls.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/threading.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/timing.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/version.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/version_features.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509_crt.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509_crl.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509_csr.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509_create.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509write_crt.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/x509write_csr.c +DRAM_C += sdk/component/common/network/ssl/polarssl-1.3.8/library/xtea.c +endif + +#utilities - FatFS +ifdef USE_FATFS +INCLUDES += sdk/component/common/file_system/fatfs +INCLUDES += sdk/component/common/file_system/fatfs/r0.10c/include +SRC_C += sdk/component/common/file_system/fatfs/fatfs_ext/src/ff_driver.c +SRC_C += sdk/component/common/file_system/fatfs/r0.10c/src/diskio.c +SRC_C += sdk/component/common/file_system/fatfs/r0.10c/src/ff.c +SRC_C += sdk/component/common/file_system/fatfs/r0.10c/src/option/ccsbcs.c +ifdef USE_SDIOH +SRC_C += sdk/component/common/file_system/fatfs/disk_if/src/sdcard.c +endif +endif + +# Reversed SDK component +#ADD_SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/app_start.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_dac.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_common.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_efuse.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_log_uart.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_pinmux.c +SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_misc.c +#ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_spi_flash_ram.c +# Component clib, ... +SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/startup.c +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c +#if +- nostdlib.. +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c +#if c_printf() float +SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c +# ------------------------------------------------------------------- +# Add Source file list +# ------------------------------------------------------------------- +ADD_SRC_C = +# ------------------------------------------------------------------- +# SAMPLES +# ------------------------------------------------------------------- +ifdef USE_AT +INCLUDES += sdk/component/common/utilities +ADD_SRC_C += sdk/component/common/api/network/src/wlan_network.c +ADD_SRC_C += sdk/component/common/api/wifi_interactive_mode.c +ADD_SRC_C += sdk/component/common/api/network/src/ping_test.c +ADD_SRC_C += sdk/component/common/utilities/webserver.c +ADD_SRC_C += sdk/component/common/utilities/tcptest.c +ADD_SRC_C += sdk/component/common/utilities/update.c +INCLUDES += sdk/component/common/example +INCLUDES += sdk/component/common/example/wlan_fast_connect +ADD_SRC_C += sdk/component/common/example/wlan_fast_connect/example_wlan_fast_connect.c +ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c +ADD_SRC_C += sdk/component/common/example/example_entry.c +ADD_SRC_C += sdk/component/common/application/xmodem/uart_fw_update.c +endif +#application +#INCLUDES += sdk/component/common/application/apple/WACServer/External/Curve25519 +#INCLUDES += sdk/component/common/application/apple/WACServer/External/GladmanAES +#INCLUDES += sdk/component/common/audio +#INCLUDES += sdk/component/common/application/xmodem +#INCLUDES += sdk/component/common/application +#INCLUDES += sdk/component/common/application/iotdemokit +#INCLUDES += sdk/component/common/application/google +#INCLUDES += sdk/component/common/media/framework +#SDRAM - wigadget +#DRAM_C += sdk/component/common/application/wigadget/cloud_link.c +#DRAM_C += sdk/component/common/application/wigadget/shtc1.c +#DRAM_C += sdk/component/common/application/wigadget/wigadget.c + +#utilities +#ADD_SRC_C += sdk/component/common/utilities/cJSON.c +#ADD_SRC_C += sdk/component/common/utilities/http_client.c +#ADD_SRC_C += sdk/component/common/utilities/uart_socket.c +#ADD_SRC_C += sdk/component/common/utilities/xml.c +#ADD_SRC_C += sdk/component/common/utilities/ssl_client.c +#ADD_SRC_C += sdk/component/common/utilities/ssl_client_ext.c +#ADD_SRC_C += sdk/component/common/utilities/uart_ymodem.c +#ADD_SRC_C += sdk/component/common/application/uart_adapter/uart_adapter.c +#ADD_SRC_C += sdk/component/common/example/cJSON/cJSON_example.c +#ADD_SRC_C += sdk/component/common/example/googlenest/example_google.c +#ADD_SRC_C += sdk/component/common/example/mdns/example_mdns.c +#ADD_SRC_C += sdk/component/common/example/socket_select/example_socket_select.c +#ADD_SRC_C += sdk/component/common/example/xml/example_xml.c + +#============================================= +# PROJECT +#============================================= +INCLUDES += project/inc/user +# bootloader +BOOT_C += project/src/rtl_boot_s.c +# openocd freertos helper +ADD_SRC_C += project/src/FreeRTOS-openocd.c +# user main +ADD_SRC_C += project/src/user/main.c +ADD_SRC_C += project/src/user/user_init.c +# console +ADD_SRC_C += project/src/console/atcmd_user.c +#ADD_SRC_C += project/src/console/spi_tst.c +#ADD_SRC_C += project/src/console/wlan_tst.c +ADD_SRC_C += project/src/console/wifi_console.c +# httpd +#ADD_SRC_C += project/src/user/http_server.c +#ADD_SRC_C += project/src/user/cgi-test.c +#ADD_SRC_C += project/src/user/cgiwifi_rtl.c +#ADD_SRC_C += project/src/user/wc_mgr.c +# components +#include librtlhttpd/librtlhttpd.mk +#=============================================