mirror of
https://github.com/sandeepmistry/rtl8710-openocd.git
synced 2024-12-04 20:20:29 +00:00
220 lines
9.5 KiB
C
220 lines
9.5 KiB
C
#ifndef _RTL8710_H_
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#define _RTL8710_H_
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#include <stdint.h>
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typedef struct{
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volatile uint32_t CTRLR0;
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volatile uint32_t CTRLR1;
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volatile uint32_t SSIENR;
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volatile uint32_t MWCR;
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volatile uint32_t SER;
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volatile uint32_t BAUDR;
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volatile uint32_t TXFTLR;
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volatile uint32_t RXFTLR;
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volatile uint32_t TXFLR;
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volatile uint32_t RXFLR;
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volatile uint32_t SR;
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volatile uint32_t IMR;
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volatile uint32_t ISR;
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volatile uint32_t RISR;
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volatile uint32_t TXOICR;
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volatile uint32_t RXOICR;
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volatile uint32_t RXUICR;
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volatile uint32_t MSTICR;
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volatile uint32_t ICR;
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volatile uint32_t DMACR;
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volatile uint32_t DMATDLR;
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volatile uint32_t DMARDLR;
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volatile uint32_t IDR;
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volatile uint32_t SSI_COMP_VERSION;
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union{
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struct{
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union{
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volatile uint8_t DR;
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volatile uint8_t DR8;
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};
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uint8_t RESERVED1[3];
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}__attribute__((packed));
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struct{
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volatile uint16_t DR16;
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uint16_t RESERVED2[1];
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}__attribute__((packed));
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volatile uint32_t DR32;
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};
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uint32_t RESERVED3[31];
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volatile uint32_t READ_FAST_SINGLE;
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volatile uint32_t READ_DUAL_DATA;
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volatile uint32_t READ_DUAL_ADDR_DATA;
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volatile uint32_t READ_QUAD_DATA;
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union{
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volatile uint32_t READ_QUAD_ADDR_DATA;
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volatile uint32_t RX_SAMPLE_DLY;
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};
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volatile uint32_t WRITE_SIGNLE;
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volatile uint32_t WRITE_DUAL_DATA;
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volatile uint32_t WRITE_DUAL_ADDR_DATA;
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volatile uint32_t WRITE_QUAD_DATA;
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volatile uint32_t WRITE_QUAD_ADDR_DATA;
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volatile uint32_t WRITE_ENABLE;
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volatile uint32_t READ_STATUS;
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volatile uint32_t CTRLR2;
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volatile uint32_t FBAUDR;
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volatile uint32_t ADDR_LENGTH;
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volatile uint32_t AUTO_LENGTH;
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volatile uint32_t VALID_CMD;
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volatile uint32_t FLASE_SIZE;
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volatile uint32_t FLUSH_FIFO;
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}__attribute__((packed)) SPI_TypeDef;
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#define SPI_FLASH ((SPI_TypeDef *)0x40006000)
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// SPI_CTRLR0
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#define SPI_CTRLR0_FRF (((uint32_t)0x03) << 4)
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#define SPI_CTRLR0_SCPH (((uint32_t)0x01) << 6)
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#define SPI_CTRLR0_SCPOL (((uint32_t)0x01) << 7)
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#define SPI_CTRLR0_TMOD (((uint32_t)0x03) << 8)
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#define SPI_CTRLR0_SLV_OE (((uint32_t)0x01) << 10)
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#define SPI_CTRLR0_SRL (((uint32_t)0x01) << 11)
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#define SPI_CTRLR0_CFS (((uint32_t)0x0F) << 12)
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#define SPI_CTRLR0_ADDR_CH (((uint32_t)0x03) << 16)
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#define SPI_CTRLR0_DATA_CH (((uint32_t)0x03) << 18)
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#define SPI_CTRLR0_CMD_CH (((uint32_t)0x03) << 20)
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#define SPI_CTRLR0_FAST_RD (((uint32_t)0x01) << 22)
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#define SPI_CTRLR0_SHIFT_CK_MTIMES (((uint32_t)0x1F) << 23)
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// SPI_SER
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#define SPI_SER_SS0 (((uint32_t)0x01) << 0)
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#define SPI_SER_SS1 (((uint32_t)0x01) << 1)
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#define SPI_SER_SS2 (((uint32_t)0x01) << 2)
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// SPI_SR
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#define SPI_SR_SSI (((uint32_t)0x01) << 0)
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#define SPI_SR_TFNF (((uint32_t)0x01) << 1)
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#define SPI_SR_TFE (((uint32_t)0x01) << 2)
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#define SPI_SR_RFNE (((uint32_t)0x01) << 3)
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#define SPI_SR_RFF (((uint32_t)0x01) << 4)
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#define SPI_SR_TXE (((uint32_t)0x01) << 5)
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typedef struct{
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volatile uint32_t PEON_PWR_CTRL; // 0x0200
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volatile uint32_t PON_ISO_CTRL; // 0x0204
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uint32_t RESERVED1[2];
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volatile uint32_t SOC_FUNC_EN; // 0x0210
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volatile uint32_t SOC_HCI_COM_FUNC_EN; // 0x0214
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volatile uint32_t SOC_PERI_FUNC0_EN; // 0x0218
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volatile uint32_t SOC_PERI_FUNC1_EN; // 0x021C
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volatile uint32_t SOC_PERI_DB_FUNC0_EN; // 0x0220
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uint32_t RESERVED2[3];
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volatile uint32_t PESOC_CLK_CTRL; // 0x0230
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volatile uint32_t PESOC_PERI_CLK_CTRL0; // 0x0234
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volatile uint32_t PESOC_PERI_CLK_CTRL1; // 0x0238
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volatile uint32_t PESOC_CLK_CTRL3; // 0x023C
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volatile uint32_t PESOC_HCI_CLK_CTRL0; // 0x0240
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volatile uint32_t PESOC_COM_CLK_CTRL1; // 0x0244
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volatile uint32_t PESOC_HW_ENG_CLK_CTRL; // 0x0248
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uint32_t RESERVED3[1];
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volatile uint32_t PESOC_CLK_SEL; // 0x0250
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uint32_t RESERVED4[6];
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volatile uint32_t SYS_ANACK_CAL_CTRL; // 0x026C
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volatile uint32_t OSC32K_CTRL; // 0x0270
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volatile uint32_t OSC32K_REG_CTRL0; // 0x0274
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volatile uint32_t OSC32K_REG_CTRL1; // 0x0278
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volatile uint32_t THERMAL_METER_CTRL; // 0x027C
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volatile uint32_t UART_MUX_CTRL; // 0x0280
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volatile uint32_t SPI_MUX_CTRL; // 0x0284
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volatile uint32_t I2C_MUX_CTRL; // 0x0288
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volatile uint32_t I2S_MUX_CTRL; // 0x028C
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uint32_t RESERVED5[4];
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volatile uint32_t HCI_PINMUX_CTRL; // 0x02A0
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volatile uint32_t WL_PINMUX_CTRL; // 0x02A4
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volatile uint32_t BT_PINMUX_CTRL; // 0x02A8
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volatile uint32_t PWM_PINMUX_CTRL; // 0x02AC
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uint32_t RESERVED6[4];
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volatile uint32_t CPU_PERIPHERAL_CTRL; // 0x02C0
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uint32_t RESERVED7[7];
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volatile uint32_t HCI_CTRL_STATUS_0; // 0x02E0
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volatile uint32_t HCI_CTRL_STATUS_1; // 0x02E4
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uint32_t RESERVED8[6];
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volatile uint32_t PESOC_MEM_CTRL; // 0x0300
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volatile uint32_t PESOC_SOC_CTRL; // 0x0304
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volatile uint32_t PESOC_PERI_CTRL; // 0x0308
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uint32_t RESERVED9[5];
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volatile uint32_t GPIO_SHTDN_CTRL; // 0x0320
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volatile uint32_t GPIO_DRIVING_CTRL; // 0x0324
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uint32_t RESERVED10[2];
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volatile uint32_t GPIO_PULL_CTRL0; // 0x0330
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volatile uint32_t GPIO_PULL_CTRL1; // 0x0334
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volatile uint32_t GPIO_PULL_CTRL2; // 0x0338
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volatile uint32_t GPIO_PULL_CTRL3; // 0x033C
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volatile uint32_t GPIO_PULL_CTRL4; // 0x0340
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volatile uint32_t GPIO_PULL_CTRL5; // 0x0344
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volatile uint32_t GPIO_PULL_CTRL6; // 0x0348
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uint32_t RESERVED11[5];
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volatile uint32_t PERI_PWM0_CTRL; // 0x0360
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volatile uint32_t PERI_PWM1_CTRL; // 0x0364
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volatile uint32_t PERI_PWM2_CTRL; // 0x0368
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volatile uint32_t PERI_PWM3_CTRL; // 0x036C
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volatile uint32_t PERI_TIM_EVT_CTRL; // 0x0370
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volatile uint32_t PERI_EGTIM_CTRL; // 0x0374
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uint32_t RESERVED12[30];
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volatile uint32_t PEON_CFG; // 0x03F0
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volatile uint32_t PEON_STATUS; // 0x03F4
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}__attribute__((packed)) PERI_ON_TypeDef;
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#define PERI_ON ((PERI_ON_TypeDef *)0x40000200)
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// PERI_ON_SOC_FUNC_EN
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#define PERI_ON_SOC_FUNC_EN_FUN (((uint32_t)0x01) << 0)
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#define PERI_ON_SOC_FUNC_EN_OCP (((uint32_t)0x01) << 1)
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#define PERI_ON_SOC_FUNC_EN_LXBUS (((uint32_t)0x01) << 2)
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#define PERI_ON_SOC_FUNC_EN_FLASH (((uint32_t)0x01) << 4)
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#define PERI_ON_SOC_FUNC_EN_MEM_CTRL (((uint32_t)0x01) << 6)
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#define PERI_ON_SOC_FUNC_EN_CPU (((uint32_t)0x01) << 8)
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#define PERI_ON_SOC_FUNC_EN_LOG_UART (((uint32_t)0x01) << 12)
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#define PERI_ON_SOC_FUNC_EN_GDMA0 (((uint32_t)0x01) << 13)
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#define PERI_ON_SOC_FUNC_EN_GDMA1 (((uint32_t)0x01) << 14)
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#define PERI_ON_SOC_FUNC_EN_GTIMER (((uint32_t)0x01) << 16)
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#define PERI_ON_SOC_FUNC_EN_SECURITY_ENGINE (((uint32_t)0x01) << 20)
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// PERI_ON_SOC_PERI_FUNC1_EN
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#define PERI_ON_SOC_PERI_FUNC1_EN_ADC0 (((uint32_t)0x01) << 0)
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#define PERI_ON_SOC_PERI_FUNC1_EN_DAC0 (((uint32_t)0x01) << 4)
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#define PERI_ON_SOC_PERI_FUNC1_EN_DAC1 (((uint32_t)0x01) << 5)
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#define PERI_ON_SOC_PERI_FUNC1_EN_GPIO (((uint32_t)0x01) << 8)
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// PERI_ON_PESOC_CLK_CTRL
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#define PERI_ON_CLK_CTRL_CKE_OCP (((uint32_t)0x01) << 0)
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#define PERI_ON_CLK_CTRL_CKE_PLFM (((uint32_t)0x01) << 2)
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#define PERI_ON_CLK_CTRL_ACTCK_TRACE_EN (((uint32_t)0x01) << 4)
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#define PERI_ON_CLK_CTRL_SLPCK_TRACE_EN (((uint32_t)0x01) << 5)
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#define PERI_ON_CLK_CTRL_ACTCK_VENDOR_REG_EN (((uint32_t)0x01) << 6)
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#define PERI_ON_CLK_CTRL_SLPCK_VENDOR_REG_EN (((uint32_t)0x01) << 7)
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#define PERI_ON_CLK_CTRL_ACTCK_FLASH_EN (((uint32_t)0x01) << 8)
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#define PERI_ON_CLK_CTRL_SLPCK_FLASH_EN (((uint32_t)0x01) << 9)
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#define PERI_ON_CLK_CTRL_ACTCK_SDR_EN (((uint32_t)0x01) << 10)
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#define PERI_ON_CLK_CTRL_SLPCK_SDR_EN (((uint32_t)0x01) << 11)
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#define PERI_ON_CLK_CTRL_ACTCK_LOG_UART_EN (((uint32_t)0x01) << 12)
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#define PERI_ON_CLK_CTRL_SLPCK_LOG_UART_EN (((uint32_t)0x01) << 13)
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#define PERI_ON_CLK_CTRL_ACTCK_TIMER_EN (((uint32_t)0x01) << 14)
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#define PERI_ON_CLK_CTRL_SLPCK_TIMER_EN (((uint32_t)0x01) << 15)
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#define PERI_ON_CLK_CTRL_ACTCK_GDMA0_EN (((uint32_t)0x01) << 16)
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#define PERI_ON_CLK_CTRL_SLPCK_GDMA0_EN (((uint32_t)0x01) << 17)
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#define PERI_ON_CLK_CTRL_ACTCK_GDMA1_EN (((uint32_t)0x01) << 18)
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#define PERI_ON_CLK_CTRL_SLPCK_GDMA1_EN (((uint32_t)0x01) << 19)
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#define PERI_ON_CLK_CTRL_ACTCK_GPIO_EN (((uint32_t)0x01) << 24)
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#define PERI_ON_CLK_CTRL_SLPCK_GPIO_EN (((uint32_t)0x01) << 25)
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#define PERI_ON_CLK_CTRL_ACTCK_BTCMD_EN (((uint32_t)0x01) << 28)
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#define PERI_ON_CLK_CTRL_SLPCK_BTCMD_EN (((uint32_t)0x01) << 29)
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// PERI_ON_CPU_PERIPHERAL_CTRL
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#define PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_EN (((uint32_t)0x01) << 0)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_SPI_FLASH_PIN_SEL (((uint32_t)0x03) << 1)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_SDR_PIN_EN (((uint32_t)0x01) << 4)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_TRACE_PIN_EN (((uint32_t)0x01) << 17)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_PIN_EN (((uint32_t)0x01) << 20)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_IR_EN (((uint32_t)0x01) << 21)
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#define PERI_ON_CPU_PERIPHERAL_CTRL_LOG_UART_PIN_SEL (((uint32_t)0x03) << 22)
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#endif
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