mirror of
https://github.com/pvvx/rtl00TstMinAmebaV35a.git
synced 2024-11-25 10:44:15 +00:00
398 lines
9.3 KiB
C
398 lines
9.3 KiB
C
/*
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* Routines to access hardware
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*
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* Copyright (c) 2013 Realtek Semiconductor Corp.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*/
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#ifndef _RTL8195A_GPIO_H_
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#define _RTL8195A_GPIO_H_
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#include "hal_api.h"
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#include "hal_gpio.h"
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#define GPIO_PORTA_DR 0x00 // data register
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#define GPIO_PORTA_DDR 0x04 // data direction
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#define GPIO_PORTA_CTRL 0x08 // data source control, we should keep it as default: data source from software
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#define GPIO_PORTB_DR 0x0c // data register
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#define GPIO_PORTB_DDR 0x10 // data direction
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#define GPIO_PORTB_CTRL 0x14 // data source control, we should keep it as default: data source from software
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#define GPIO_PORTC_DR 0x18 // data register
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#define GPIO_PORTC_DDR 0x1c // data direction
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#define GPIO_PORTC_CTRL 0x20 // data source control, we should keep it as default: data source from software
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//1 Only the PORTA can be configured to generate interrupts
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#define GPIO_INT_EN 0x30 // Interrupt enable register
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#define GPIO_INT_MASK 0x34 // Interrupt mask
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#define GPIO_INT_TYPE 0x38 // Interrupt type(level/edge) register
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#define GPIO_INT_POLARITY 0x3C // Interrupt polarity(Active low/high) register
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#define GPIO_INT_STATUS 0x40 // Interrupt status
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#define GPIO_INT_RAWSTATUS 0x44 // Interrupt status without mask
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#define GPIO_DEBOUNCE 0x48 // Interrupt signal debounce
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#define GPIO_PORTA_EOI 0x4c // Clear interrupt
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#define GPIO_EXT_PORTA 0x50 // GPIO IN read or OUT read back
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#define GPIO_EXT_PORTB 0x54 // GPIO IN read or OUT read back
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#define GPIO_EXT_PORTC 0x58 // GPIO IN read or OUT read back
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#define GPIO_INT_SYNC 0x60 // Is level-sensitive interrupt being sync sith PCLK
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enum {
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HAL_GPIO_HIGHZ = 0,
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HAL_GPIO_PULL_LOW = 1,
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HAL_GPIO_PULL_HIGH = 2
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};
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typedef enum
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{
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GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */
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GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */
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GPIO_Mode_INT = 0x02, /*!< GPIO Interrupt Mode */
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GPIO_Mode_MAX = 0x03,
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}GPIOMode_TypeDef;
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/**
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* @brief GPIO Configuration PullUp PullDown enumeration
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*/
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typedef enum
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{
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GPIO_PuPd_NOPULL = 0x00, /*!< GPIO Interrnal HIGHZ */
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GPIO_PuPd_DOWN = 0x01, /*!< GPIO Interrnal Pull DOWN */
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GPIO_PuPd_UP = 0x02, /*!< GPIO Interrnal Pull UP */
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}GPIOPuPd_TypeDef;
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/**
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* @brief Setting interrupt's trigger type
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*
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* Setting interrupt's trigger type
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*/
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typedef enum
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{
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GPIO_INT_Trigger_LEVEL = 0x0, /**< This interrupt is level trigger */
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GPIO_INT_Trigger_EDGE = 0x1, /**< This interrupt is edge trigger */
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}GPIOIT_LevelType;
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/**
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* @brief Setting interrupt active mode
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*
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* Setting interrupt active mode
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*/
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typedef enum
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{
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GPIO_INT_POLARITY_ACTIVE_LOW = 0x0, /**< Setting interrupt to low active: falling edge or low level */
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GPIO_INT_POLARITY_ACTIVE_HIGH = 0x1, /**< Setting interrupt to high active: rising edge or high level */
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}GPIOIT_PolarityType;
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/**
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* @brief Enable/Disable interrupt debounce mode
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*
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* Enable/Disable interrupt debounce mode
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*/
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typedef enum
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{
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GPIO_INT_DEBOUNCE_DISABLE = 0x0, /**< Disable interrupt debounce */
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GPIO_INT_DEBOUNCE_ENABLE = 0x1, /**< Enable interrupt debounce */
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}GPIOIT_DebounceType;
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typedef struct {
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GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. */
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GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins. */
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GPIOIT_LevelType GPIO_ITTrigger; /**< Interrupt mode is level or edge trigger */
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GPIOIT_PolarityType GPIO_ITPolarity; /**< Interrupt mode is high or low active trigger */
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GPIOIT_DebounceType GPIO_ITDebounce; /**< Enable or disable de-bounce for interrupt */
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u32 GPIO_Pin; // Pin: [7:5]: port number, [4:0]: pin number
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}GPIO_InitTypeDef;
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//======================================================
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// ROM Function prototype
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extern PHAL_GPIO_ADAPTER _pHAL_Gpio_Adapter;
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#ifndef CONFIG_RELEASE_BUILD_LIBRARIES
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static __inline HAL_Status
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GPIO_Lock (
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VOID
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)
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{
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HAL_Status Status;
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if (_pHAL_Gpio_Adapter->EnterCritical) {
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_pHAL_Gpio_Adapter->EnterCritical();
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}
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if(_pHAL_Gpio_Adapter->Locked) {
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Status = HAL_BUSY;
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}
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else {
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_pHAL_Gpio_Adapter->Locked = 1;
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Status = HAL_OK;
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}
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if (_pHAL_Gpio_Adapter->ExitCritical) {
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_pHAL_Gpio_Adapter->ExitCritical();
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}
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return Status;
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}
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static __inline VOID
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GPIO_UnLock (
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VOID
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)
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{
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if (_pHAL_Gpio_Adapter->EnterCritical) {
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_pHAL_Gpio_Adapter->EnterCritical();
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}
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_pHAL_Gpio_Adapter->Locked = 0;
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if (_pHAL_Gpio_Adapter->ExitCritical) {
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_pHAL_Gpio_Adapter->ExitCritical();
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}
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}
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#endif // #ifndef CONFIG_RELEASE_BUILD_LIBRARIES
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_LONG_CALL_ extern u32
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HAL_GPIO_IrqHandler_8195a(
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IN VOID *pData
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);
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_LONG_CALL_ extern u32
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HAL_GPIO_MbedIrqHandler_8195a(
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IN VOID *pData
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_IntCtrl_8195a(
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HAL_GPIO_PIN *GPIO_Pin,
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u32 En
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_Init_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_DeInit_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_GPIO_PIN_STATE
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HAL_GPIO_ReadPin_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_WritePin_8195a(
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HAL_GPIO_PIN *GPIO_Pin,
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HAL_GPIO_PIN_STATE Pin_State
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_RegIrq_8195a(
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IN PIRQ_HANDLE pIrqHandle
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_UnRegIrq_8195a(
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IN PIRQ_HANDLE pIrqHandle
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_UserRegIrq_8195a(
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HAL_GPIO_PIN *GPIO_Pin,
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VOID *IrqHandler,
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VOID *IrqData
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_UserUnRegIrq_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_MaskIrq_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_UnMaskIrq_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_IntDebounce_8195a(
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HAL_GPIO_PIN *GPIO_Pin,
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u8 Enable
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);
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_LONG_CALL_ u32
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HAL_GPIO_GetIPPinName_8195a(
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u32 chip_pin
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);
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_LONG_CALL_ HAL_Status
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HAL_GPIO_PullCtrl_8195a(
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u32 chip_pin,
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u8 pull_type
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);
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_LONG_CALL_ u32
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GPIO_GetChipPinName_8195a(
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u32 port,
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u32 pin
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);
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_LONG_CALL_ VOID
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GPIO_PullCtrl_8195a(
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u32 chip_pin,
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u8 pull_type
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);
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_LONG_CALL_ VOID
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GPIO_Int_SetType_8195a(
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u8 pin_num,
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u8 int_mode
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);
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_LONG_CALL_ HAL_Status HAL_GPIO_IntCtrl_8195aV02(HAL_GPIO_PIN *GPIO_Pin, u32 En);
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_LONG_CALL_ u32 GPIO_Int_Clear_8195aV02(u32 irq_clr);
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HAL_Status
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HAL_GPIO_ClearISR_8195a(
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HAL_GPIO_PIN *GPIO_Pin
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);
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/********** HAL In-Line Functions **********/
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/**
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* @brief Reads the specified input port pin.
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @retval The input port pin current status(High or Low).
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*/
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static __inline s32
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HAL_GPIO_ReadPin(
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HAL_GPIO_PIN *GPIO_Pin
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)
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{
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return (s32)HAL_GPIO_ReadPin_8195a(GPIO_Pin);
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}
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/**
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* @brief Write the specified output port pin.
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @param Pin_State: The state going to be set to the assigned GPIO pin.
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*
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* @retval None
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*/
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static __inline VOID
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HAL_GPIO_WritePin(
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HAL_GPIO_PIN *GPIO_Pin,
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u32 Value
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)
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{
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HAL_GPIO_WritePin_8195a(GPIO_Pin, (HAL_GPIO_PIN_STATE)Value);
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}
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/**
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* @brief To register a user interrupt handler for a specified pin
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @param IrqHandler: The IRQ handler to be assigned to the specified pin
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*
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* @param IrqData: The pointer will be pass the the IRQ handler
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*
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* @retval None
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*/
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static __inline VOID
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HAL_GPIO_UserRegIrq(
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HAL_GPIO_PIN *GPIO_Pin,
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VOID *IrqHandler,
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VOID *IrqData
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)
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{
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HAL_GPIO_UserRegIrq_8195a(GPIO_Pin, IrqHandler, IrqData);
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}
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/**
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* @brief To un-register a user interrupt handler for a specified pin
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @retval None
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*/
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static __inline VOID
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HAL_GPIO_UserUnRegIrq(
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HAL_GPIO_PIN *GPIO_Pin
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)
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{
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HAL_GPIO_UserUnRegIrq_8195a(GPIO_Pin);
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}
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/**
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* @brief Enable/Disable GPIO interrupt
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin initialization.
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*
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* @param En: Enable (1) or Disable (0)
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*
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* @retval HAL_Status
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*/
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static __inline VOID
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HAL_GPIO_IntCtrl(
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HAL_GPIO_PIN *GPIO_Pin,
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u32 En
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)
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{
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HAL_GPIO_IntCtrl_8195a(GPIO_Pin, En);
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}
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/**
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* @brief Mask the interrupt of a specified pin
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @retval None
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*/
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static __inline VOID
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HAL_GPIO_MaskIrq(
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HAL_GPIO_PIN *GPIO_Pin
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)
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{
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HAL_GPIO_MaskIrq_8195a(GPIO_Pin);
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}
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/**
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* @brief UnMask the interrupt of a specified pin
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*
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* @param GPIO_Pin: The data structer which contains the parameters for the GPIO Pin.
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*
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* @retval None
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*/
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static __inline VOID
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HAL_GPIO_UnMaskIrq(
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HAL_GPIO_PIN *GPIO_Pin
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)
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{
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HAL_GPIO_ClearISR_8195a(GPIO_Pin);
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HAL_GPIO_UnMaskIrq_8195a(GPIO_Pin);
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}
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#endif // end of "#define _RTL8195A_GPIO_H_"
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