mirror of
https://github.com/pvvx/rtl00TstMinAmebaV35a.git
synced 2024-11-22 17:54:14 +00:00
145 lines
3.7 KiB
C
145 lines
3.7 KiB
C
/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2014, Realtek Semiconductor Corp.
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* All rights reserved.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*******************************************************************************
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*/
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#include "objects.h"
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#include "pinmap.h"
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//static uint32_t channel_ids[32] = {0};
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//static gpio_irq_handler irq_handler;
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#if CONFIG_GPIO_EN
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#include "gpio_irq_api.h"
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#include "gpio_irq_ex_api.h"
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
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{
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uint32_t pin_name;
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if (pin == NC) return -1;
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obj->pin = pin;
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pin_name = HAL_GPIO_GetPinName((u32)pin);; // get the IP pin name
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obj->hal_pin.pin_name = pin_name;
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obj->hal_pin.pin_mode = INT_FALLING; // default use Falling trigger
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obj->hal_port_num = HAL_GPIO_GET_PORT_BY_NAME(pin_name);
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obj->hal_pin_num = HAL_GPIO_GET_PIN_BY_NAME(pin_name);
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HAL_GPIO_Irq_Init(&obj->hal_pin);
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HAL_GPIO_UserRegIrq(&obj->hal_pin, (VOID*) handler, (VOID*) id);
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return 0;
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}
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void gpio_irq_free(gpio_irq_t *obj)
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{
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HAL_GPIO_UserUnRegIrq(&obj->hal_pin);
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HAL_GPIO_DeInit(&obj->hal_pin);
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}
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void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
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{
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switch((uint32_t)event) {
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case IRQ_RISE:
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obj->hal_pin.pin_mode = INT_RISING;
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break;
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case IRQ_FALL:
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obj->hal_pin.pin_mode = INT_FALLING;
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break;
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case IRQ_LOW:
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obj->hal_pin.pin_mode = INT_LOW;
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break;
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case IRQ_HIGH:
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obj->hal_pin.pin_mode = INT_HIGH;
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break;
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case IRQ_NONE:
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// ?
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break;
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default:
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break;
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}
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// HAL_GPIO_Irq_Init(&obj->hal_pin);
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HAL_GPIO_Init_8195a(&obj->hal_pin);
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HAL_GPIO_IntCtrl(&obj->hal_pin, enable);
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}
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void gpio_irq_enable(gpio_irq_t *obj)
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{
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HAL_GPIO_UnMaskIrq(&obj->hal_pin);
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}
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void gpio_irq_disable(gpio_irq_t *obj)
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{
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HAL_GPIO_MaskIrq(&obj->hal_pin);
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}
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void gpio_irq_deinit(gpio_irq_t *obj)
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{
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HAL_GPIO_DeInit(&obj->hal_pin);
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}
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void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type)
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{
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HAL_GPIO_PullCtrl((u32) obj->pin, (u32)pull_type);
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}
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void gpio_irq_set_event(gpio_irq_t *obj, gpio_irq_event event)
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{
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uint32_t reg_value;
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uint32_t level_edge;
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uint32_t polarity;
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uint8_t pin_num;
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pin_num = obj->hal_pin_num & 0x1f; // Max 31
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switch (event) {
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case IRQ_LOW:
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level_edge = 0; // level trigger
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polarity = 0; // active low
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break;
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case IRQ_HIGH:
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level_edge = 0; // level trigger
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polarity = 1; // active high
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break;
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case IRQ_FALL:
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level_edge = 1; // edge trigger
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polarity = 0; // active low
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break;
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case IRQ_RISE:
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level_edge = 1; // edge trigger
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polarity = 1; // active high
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break;
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default:
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DBG_GPIO_ERR("Unknow Interrupt Trigger Type(%d)\n", event);
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return;
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}
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// Config Level or Edge trigger
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reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_TYPE);
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reg_value &= ~(1 << pin_num);
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reg_value |= (level_edge << pin_num);
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HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_TYPE, reg_value);
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// Config Low active or Gigh active
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reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_POLARITY);
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reg_value &= ~(1 << pin_num);
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reg_value |= (polarity << pin_num);
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HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_POLARITY, reg_value);
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}
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#endif
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