j3d1/rtl00TstMinAmebaV35a
1
0
Fork 0
mirror of https://github.com/pvvx/rtl00TstMinAmebaV35a.git synced 2025-07-31 20:31:06 +00:00
Code Issues Projects Releases Packages Wiki Activity

first commit

Browse source
This commit is contained in:
pvvx 2016-09-23 07:21:45 +03:00
commit c399bf5be0
806 changed files with 421674 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

1
project/realtek_ameba1_va0_example/GCC-RELEASE/.gitignore vendored Normal file
View file

@ -0,0 +1 @@
/application/

29
project/realtek_ameba1_va0_example/GCC-RELEASE/Makefile Normal file
View file

@ -0,0 +1,29 @@
all: ram_all
.PHONY: ram_all
ram_all:
@$(MAKE) -f application.mk
.PHONY: mp
mp: toolchain
@$(MAKE) -f application.mk mp
.PHONY: clean clean_all
clean:
@$(MAKE) -f application.mk clean
clean_all:
@$(MAKE) -f application.mk clean_all
.PHONY: flash debug ramdebug setup
setup:
@$(MAKE) -f application.mk $(MAKECMDGOALS)
flash:
@$(MAKE) -f application.mk flashburn
debug:
@$(MAKE) -f application.mk debug
ramdebug:
@$(MAKE) -f application.mk ramdebug

560
project/realtek_ameba1_va0_example/GCC-RELEASE/application.mk Normal file
View file

@ -0,0 +1,560 @@
# Initialize tool chain
# -------------------------------------------------------------------
#ARM_GCC_TOOLCHAIN = ../../../tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/
AMEBA_TOOLDIR = ../../../component/soc/realtek/8195a/misc/iar_utility/common/tools/
FLASH_TOOLDIR = ../../../component/soc/realtek/8195a/misc/gcc_utility/
CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)arm-none-eabi-
# Compilation tools
AR = $(CROSS_COMPILE)ar
CC = $(CROSS_COMPILE)gcc
AS = $(CROSS_COMPILE)as
NM = $(CROSS_COMPILE)nm
LD = $(CROSS_COMPILE)gcc
GDB = $(CROSS_COMPILE)gdb
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
OS := $(shell uname)
ifneq ($(findstring Linux, $(OS)), Linux)
PICK = $(AMEBA_TOOLDIR)pick.exe
PAD = $(AMEBA_TOOLDIR)padding.exe
CHKSUM = $(AMEBA_TOOLDIR)checksum.exe
else
PICK = $(AMEBA_TOOLDIR)pick
PAD = $(AMEBA_TOOLDIR)padding
CHKSUM = $(AMEBA_TOOLDIR)checksum
endif
# Initialize target name and target object files
# -------------------------------------------------------------------
all: application manipulate_images
mp: application manipulate_images
TARGET=application
OBJ_DIR=$(TARGET)/Debug/obj
BIN_DIR=$(TARGET)/Debug/bin
# Include folder list
# -------------------------------------------------------------------
INCLUDES =
INCLUDES += -I../inc
INCLUDES += -I../../../component/soc/realtek/common/bsp
INCLUDES += -I../../../component/os/freertos
INCLUDES += -I../../../component/os/freertos/freertos_v8.1.2/Source/include
INCLUDES += -I../../../component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3
INCLUDES += -I../../../component/os/os_dep/include
INCLUDES += -I../../../component/soc/realtek/8195a/misc/driver
INCLUDES += -I../../../component/common/api/network/include
INCLUDES += -I../../../component/common/api
INCLUDES += -I../../../component/common/api/platform
INCLUDES += -I../../../component/common/api/wifi
INCLUDES += -I../../../component/common/api/wifi/rtw_wpa_supplicant/src
INCLUDES += -I../../../component/common/application
INCLUDES += -I../../../component/common/application/iotdemokit
INCLUDES += -I../../../component/common/application/google
INCLUDES += -I../../../component/common/media/framework
INCLUDES += -I../../../component/common/example
INCLUDES += -I../../../component/common/example/wlan_fast_connect
INCLUDES += -I../../../component/common/mbed/api
INCLUDES += -I../../../component/common/mbed/hal
INCLUDES += -I../../../component/common/mbed/hal_ext
INCLUDES += -I../../../component/common/mbed/targets/hal/rtl8195a
INCLUDES += -I../../../component/common/network
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include/lwip
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include/ipv4
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/port/realtek
INCLUDES += -I../../../component/common/test
INCLUDES += -I../../../component/soc/realtek/8195a/cmsis
INCLUDES += -I../../../component/soc/realtek/8195a/cmsis/device
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/rtl8195a
INCLUDES += -I../../../component/soc/realtek/8195a/misc/rtl_std_lib/include
INCLUDES += -I../../../component/common/drivers/wlan/realtek/include
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/osdep
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hci
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hal
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hal/OUTSRC
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom
INCLUDES += -I../../../component/common/network/ssl/polarssl-1.3.8/include
INCLUDES += -I../../../component/common/network/ssl/ssl_ram_map/rom
INCLUDES += -I../../../component/common/utilities
INCLUDES += -I../../../component/soc/realtek/8195a/misc/rtl_std_lib/include
INCLUDES += -I../../../component/common/application/apple/WACServer/External/Curve25519
INCLUDES += -I../../../component/common/application/apple/WACServer/External/GladmanAES
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
INCLUDES += -I../../../component/common/video/v4l2/inc
INCLUDES += -I../../../component/common/media/codec
INCLUDES += -I../../../component/common/drivers/usb_class/host/uvc/inc
INCLUDES += -I../../../component/common/drivers/usb_class/device
INCLUDES += -I../../../component/common/drivers/usb_class/device/class
INCLUDES += -I../../../component/common/file_system/fatfs
INCLUDES += -I../../../component/common/file_system/fatfs/r0.10c/include
INCLUDES += -I../../../component/common/drivers/sdio/realtek/sdio_host/inc
INCLUDES += -I../../../component/common/audio
INCLUDES += -I../../../component/common/drivers/i2s
INCLUDES += -I../../../component/common/application/xmodem
# Source file list
# -------------------------------------------------------------------
SRC_C =
DRAM_C =
#cmsis
SRC_C += ../../../component/soc/realtek/8195a/cmsis/device/system_8195a.c
#console
SRC_C += ../../../component/common/api/at_cmd/atcmd_ethernet.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_lwip.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_sys.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_wifi.c
SRC_C += ../../../component/common/api/at_cmd/log_service.c
SRC_C += ../../../component/soc/realtek/8195a/misc/driver/low_level_io.c
SRC_C += ../../../component/soc/realtek/8195a/misc/driver/rtl_consol.c
#network - api
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_p2p_config.c
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_wps_config.c
SRC_C += ../../../component/common/api/wifi/wifi_conf.c
SRC_C += ../../../component/common/api/wifi/wifi_ind.c
SRC_C += ../../../component/common/api/wifi/wifi_promisc.c
SRC_C += ../../../component/common/api/wifi/wifi_simple_config.c
SRC_C += ../../../component/common/api/wifi/wifi_util.c
SRC_C += ../../../component/common/api/lwip_netconf.c
#network - app
SRC_C += ../../../component/common/api/network/src/ping_test.c
SRC_C += ../../../component/common/utilities/ssl_client.c
SRC_C += ../../../component/common/utilities/ssl_client_ext.c
SRC_C += ../../../component/common/utilities/tcptest.c
SRC_C += ../../../component/common/application/uart_adapter/uart_adapter.c
SRC_C += ../../../component/common/utilities/uart_ymodem.c
SRC_C += ../../../component/common/utilities/update.c
SRC_C += ../../../component/common/api/network/src/wlan_network.c
#network - lwip
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/api_lib.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/api_msg.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/err.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netbuf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netdb.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netifapi.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/autoip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/inet.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/inet_chksum.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip_addr.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip_frag.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/def.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/dns.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/init.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/lwip_timers.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/mem.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/memp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/netif.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/pbuf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/raw.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/stats.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/sys.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp_in.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp_out.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/udp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c
SRC_C += ../../../component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/sys_arch.c
SRC_C += ../../../component/common/network/dhcp/dhcps.c
SRC_C += ../../../component/common/network/sntp/sntp.c
#network - mdns
SRC_C += ../../../component/common/network/mDNS/mDNSPlatform.c
#os - freertos
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3/port.c
SRC_C += ../../../component/os/freertos/cmsis_os.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/croutine.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/event_groups.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/list.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/queue.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/tasks.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/timers.c
#os - osdep
SRC_C += ../../../component/os/os_dep/device_lock.c
SRC_C += ../../../component/os/freertos/freertos_service.c
SRC_C += ../../../component/os/os_dep/mailbox.c
SRC_C += ../../../component/os/os_dep/osdep_api.c
SRC_C += ../../../component/os/os_dep/osdep_service.c
SRC_C += ../../../component/os/os_dep/tcm_heap.c
#peripheral - api
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/analogin_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/dma_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/efuse_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/ethernet_api.c
SRC_C += ../../../component/common/drivers/ethernet_mii/ethernet_mii.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/flash_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/gpio_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/gpio_irq_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/i2c_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/i2s_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/nfc_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pinmap.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pinmap_common.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/port_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/rtc_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/serial_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/sleep.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/spdio_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/spi_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/sys_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/timer_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/us_ticker.c
SRC_C += ../../../component/common/mbed/common/us_ticker_api.c
SRC_C += ../../../component/common/mbed/common/wait_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/wdt_api.c
#peripheral - hal
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_32k.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_adc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_gdma.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_gpio.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_i2c.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_i2s.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_mii.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_nfc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_pcm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_pwm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_ssi.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_timer.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_uart.c
#peripheral - osdep
SRC_C += ../../../component/os/freertos/freertos_pmu.c
#peripheral - rtl8195a
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_adc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gdma.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gpio.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2c.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2s.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_mii.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_nfc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pwm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_timer.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
#peripheral - wlan
#all:SRC_C += ../../../component/common/drivers/wlan/realtek/src/core/option/rtw_opt_skbuf.c
#SRC_C += ../../../component/common/api/wifi_interactive_mode.c
#SDRAM
DRAM_C += ../../../component/common/api/platform/stdlib_patch.c
#SDRAM - polarssl
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/aes.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/aesni.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/arc4.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/asn1parse.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/asn1write.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/base64.c
SRC_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/bignum.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/blowfish.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/camellia.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ccm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/certs.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/cipher.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/cipher_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ctr_drbg.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/debug.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/des.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/dhm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecp.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecp_curves.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecdh.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecdsa.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/entropy.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/entropy_poll.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/error.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/gcm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/havege.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/hmac_drbg.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md2.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md4.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md5.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/memory_buffer_alloc.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/net.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/oid.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/padlock.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pbkdf2.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pem.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs5.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs11.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs12.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pk.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pk_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkparse.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkwrite.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/platform.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ripemd160.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/rsa.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha1.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha256.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha512.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_cache.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_ciphersuites.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_cli.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_srv.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_tls.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/threading.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/timing.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/version.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/version_features.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_crt.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_crl.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_csr.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_create.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509write_crt.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509write_csr.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/xtea.c
#SDRAM - ssl_ram_map
DRAM_C += ../../../component/common/network/ssl/ssl_ram_map/rom/rom_ssl_ram_map.c
DRAM_C += ../../../component/common/network/ssl/ssl_ram_map/ssl_ram_map.c
#SDRAM - wigadget
DRAM_C += ../../../component/common/application/wigadget/cloud_link.c
DRAM_C += ../../../component/common/application/wigadget/shtc1.c
DRAM_C += ../../../component/common/application/wigadget/wigadget.c
#utilities
SRC_C += ../../../component/common/utilities/cJSON.c
SRC_C += ../../../component/common/utilities/http_client.c
SRC_C += ../../../component/common/utilities/uart_socket.c
SRC_C += ../../../component/common/utilities/webserver.c
SRC_C += ../../../component/common/utilities/xml.c
#utilities - example
SRC_C += ../../../component/common/example/example_entry.c
SRC_C += ../../../component/common/example/uart_atcmd/example_uart_atcmd.c
#utilities - FatFS
SRC_C += ../../../component/common/file_system/fatfs/fatfs_ext/src/ff_driver.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/diskio.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/ff.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/option/ccsbcs.c
SRC_C += ../../../component/common/file_system/fatfs/disk_if/src/sdcard.c
#utilities - xmodme update
SRC_C += ../../../component/common/application/xmodem/uart_fw_update.c
#user
SRC_C += ../src/main.c
# Generate obj list
# -------------------------------------------------------------------
SRC_O = $(patsubst %.c,%.o,$(SRC_C))
DRAM_O = $(patsubst %.c,%.o,$(DRAM_C))
SRC_C_LIST = $(notdir $(SRC_C)) $(notdir $(DRAM_C))
OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST)))
DEPENDENCY_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.d,$(SRC_C_LIST)))
# Compile options
# -------------------------------------------------------------------
CFLAGS =
CFLAGS += -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK
CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -w -O2 -Wno-pointer-sign -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -mcpu=cortex-m3 -DF_CPU=166000000L -std=gnu99 -fsigned-char
LFLAGS =
LFLAGS += -mcpu=cortex-m3 -mthumb -g --specs=nano.specs -nostartfiles -Wl,-Map=$(BIN_DIR)/application.map -Os -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning
LIBFLAGS =
all: LIBFLAGS += -L../../../component/soc/realtek/8195a/misc/bsp/lib/common/GCC/ -l_platform -l_wlan -l_p2p -l_wps -l_rtlstd -l_websocket -l_xmodem -lm -lc -lnosys -lgcc
mp: LIBFLAGS += -L../../../component/soc/realtek/8195a/misc/bsp/lib/common/GCC/ -l_platform -l_wlan_mp -l_p2p -l_wps -l_rtlstd -l_websocket -l_xmodem -lm -lc -lnosys -lgcc
RAMALL_BIN =
OTA_BIN =
all: RAMALL_BIN = ram_all.bin
all: OTA_BIN = ota.bin
mp: RAMALL_BIN = ram_all_mp.bin
mp: OTA_BIN = ota_mp.bin
# Compile
# -------------------------------------------------------------------
.PHONY: application
application: prerequirement build_info $(SRC_O) $(DRAM_O)
@$(LD) $(LFLAGS) -o $(BIN_DIR)/$(TARGET).axf $(OBJ_LIST) $(OBJ_DIR)/ram_1.r.o $(LIBFLAGS) -T./rlx8195A-symbol-v02-img2.ld
@$(OBJDUMP) -d $(BIN_DIR)/$(TARGET).axf > $(BIN_DIR)/$(TARGET).asm
# Manipulate Image
# -------------------------------------------------------------------
.PHONY: manipulate_images
manipulate_images:
@echo ===========================================================
@echo Image manipulating
@echo ===========================================================
@$(NM) $(BIN_DIR)/$(TARGET).axf | sort > $(BIN_DIR)/$(TARGET).nmap
@$(OBJCOPY) -j .image2.start.table -j .ram_image2.text -j .ram_image2.rodata -j .ram.data -j .sdr_text -j .sdr_rodata -j .sdr_data -Obinary $(BIN_DIR)/$(TARGET).axf $(BIN_DIR)/ram_2.bin
# $(OBJCOPY) -j .sdr_text -j .sdr_rodata -j .sdr_data -Obinary $(BIN_DIR)/$(TARGET).axf $(BIN_DIR)/sdram.bin
@cp ../../../component/soc/realtek/8195a/misc/bsp/image/ram_1.p.bin $(BIN_DIR)/ram_1.p.bin
@chmod 777 $(BIN_DIR)/ram_1.p.bin
@chmod +rx $(PICK) $(CHKSUM) $(PAD)
@$(PICK) 0x`grep __ram_image2_text_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __ram_image2_text_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/ram_2.bin $(BIN_DIR)/ram_2.p.bin body+reset_offset+sig
@$(PICK) 0x`grep __ram_image2_text_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __ram_image2_text_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/ram_2.bin $(BIN_DIR)/ram_2.ns.bin body+reset_offset
# @$(PICK) 0x`grep __sdram_data_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __sdram_data_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/sdram.bin $(BIN_DIR)/ram_3.p.bin body+reset_offset
@$(PAD) 44k 0xFF $(BIN_DIR)/ram_1.p.bin
@cat $(BIN_DIR)/ram_1.p.bin > $(BIN_DIR)/$(RAMALL_BIN)
@chmod 777 $(BIN_DIR)/$(RAMALL_BIN)
@cat $(BIN_DIR)/ram_2.p.bin >> $(BIN_DIR)/$(RAMALL_BIN)
# if [ -s $(BIN_DIR)/sdram.bin ]; then cat $(BIN_DIR)/ram_3.p.bin >> $(BIN_DIR)/$(RAMALL_BIN); fi
@cat $(BIN_DIR)/ram_2.ns.bin > $(BIN_DIR)/$(OTA_BIN)
@chmod 777 $(BIN_DIR)/$(OTA_BIN)
# if [ -s $(BIN_DIR)/sdram.bin ]; then cat $(BIN_DIR)/ram_3.p.bin >> $(BIN_DIR)/$(OTA_BIN); fi
@$(CHKSUM) $(BIN_DIR)/$(OTA_BIN) || true
@rm $(BIN_DIR)/ram_*.p.bin $(BIN_DIR)/ram_*.ns.bin
# Generate build info
# -------------------------------------------------------------------
.PHONY: build_info
build_info:
@echo \#define UTS_VERSION \"`date +%Y/%m/%d-%T`\" > .ver
@echo \#define RTL8195AFW_COMPILE_TIME \"`date +%Y/%m/%d-%T`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_DATE \"`date +%Y%m%d`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_BY \"`id -u -n`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_HOST \"`$(HOSTNAME_APP)`\" >> .ver
@if [ -x /bin/dnsdomainname ]; then \
echo \#define RTL8195AFW_COMPILE_DOMAIN \"`dnsdomainname`\"; \
elif [ -x /bin/domainname ]; then \
echo \#define RTL8195AFW_COMPILE_DOMAIN \"`domainname`\"; \
else \
echo \#define RTL8195AFW_COMPILE_DOMAIN ; \
fi >> .ver
@echo \#define RTL195AFW_COMPILER \"gcc `$(CC) $(CFLAGS) -dumpversion | tr --delete '\r'`\" >> .ver
@mv -f .ver ../../../project/realtek_ameba1_va0_example/inc/$@.h
.PHONY: prerequirement
prerequirement:
@echo ===========================================================
@echo Build $(TARGET)
@echo ===========================================================
@mkdir -p $(OBJ_DIR)
@mkdir -p $(BIN_DIR)
@cp ../../../component/soc/realtek/8195a/misc/bsp/image/ram_1.r.bin $(OBJ_DIR)/ram_1.r.bin
@chmod 777 $(OBJ_DIR)/ram_1.r.bin
@$(OBJCOPY) --rename-section .data=.loader.data,contents,alloc,load,readonly,data -I binary -O elf32-littlearm -B arm $(OBJ_DIR)/ram_1.r.bin $(OBJ_DIR)/ram_1.r.o
$(SRC_O): %.o : %.c
@echo $<
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -MM -MT $@ -MF $(OBJ_DIR)/$(notdir $(patsubst %.o,%.d,$@))
@cp $@ $(OBJ_DIR)/$(notdir $@)
@chmod 777 $(OBJ_DIR)/$(notdir $@)
$(DRAM_O): %.o : %.c
@echo $<
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
@$(OBJCOPY) --prefix-alloc-sections .sdram $@
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -MM -MT $@ -MF $(OBJ_DIR)/$(notdir $(patsubst %.o,%.d,$@))
@cp $@ $(OBJ_DIR)/$(notdir $@)
@chmod 777 $(OBJ_DIR)/$(notdir $@)
-include $(DEPENDENCY_LIST)
# Generate build info
# -------------------------------------------------------------------
#ifeq (setup,$(firstword $(MAKECMDGOALS)))
# # use the rest as arguments for "run"
# RUN_ARGS := $(wordlist 2,$(words $(MAKECMDGOALS)),$(MAKECMDGOALS))
# # ...and turn them into do-nothing targets
# $(eval $(RUN_ARGS):;@:)
#endif
.PHONY: setup
setup:
@echo "----------------"
@echo Setup $(GDB_SERVER)
@echo "----------------"
ifeq ($(GDB_SERVER), openocd)
cp -p $(FLASH_TOOLDIR)/rtl_gdb_debug_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_ramdebug_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_flash_write_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
else
cp -p $(FLASH_TOOLDIR)/rtl_gdb_debug_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_ramdebug_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_flash_write_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
endif
.PHONY: flashburn
flashburn:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
endif
@cp $(FLASH_TOOLDIR)/target_NORMALB.axf $(FLASH_TOOLDIR)/target_NORMAL.axf
@chmod 777 ./application/Debug/bin/ram_all.bin $(FLASH_TOOLDIR)/target_NORMAL.axf
$(file > fwsize.gdb,set $$RamFileSize = $(shell printf '%d' $$(( $$(stat --printf="%s" $(BIN_DIR)/ram_all.bin) )) ))
# chmod +rx $(FLASH_TOOLDIR)/SetupGDB_NORMAL.sh
# $(FLASH_TOOLDIR)/SetupGDB_NORMAL.sh
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
.PHONY: debug
debug:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_debug.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
cmd /c start $(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
else
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
endif
.PHONY: ramdebug
ramdebug:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
cmd /c start $(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
else
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
endif
.PHONY: clean
clean:
@rm -rf $(TARGET)
@rm -f $(SRC_O) $(DRAM_O)
@rm -f $(patsubst %.o,%.d,$(SRC_O)) $(patsubst %.o,%.d,$(DRAM_O))
.PHONY: clean_all
clean_all:
rm -rf $(ARM_GCC_TOOLCHAIN)
rm -rf $(TARGET)
rm -f $(SRC_O) $(DRAM_O)
rm -f $(patsubst %.o,%.d,$(SRC_O)) $(patsubst %.o,%.d,$(DRAM_O))

646
project/realtek_ameba1_va0_example/GCC-RELEASE/export-rom_v02.txt Normal file
View file

@ -0,0 +1,646 @@
SECTIONS
{
__vectors_table = 0x0;
Reset_Handler = 0x101;
NMI_Handler = 0x109;
HardFault_Handler = 0x10d;
MemManage_Handler = 0x121;
BusFault_Handler = 0x125;
UsageFault_Handler = 0x129;
HalLogUartInit = 0x201;
HalSerialPutcRtl8195a = 0x2d9;
HalSerialGetcRtl8195a = 0x309;
HalSerialGetIsrEnRegRtl8195a = 0x329;
HalSerialSetIrqEnRegRtl8195a = 0x335;
HalCpuClkConfig = 0x341;
HalGetCpuClk = 0x355;
HalRomInfo = 0x39d;
HalGetRomInfo = 0x3b5;
HalResetVsr = 0x3c5;
HalDelayUs = 0x899;
HalNMIHandler = 0x8e1;
HalHardFaultHandler = 0x911;
HalMemManageHandler = 0xc09;
HalBusFaultHandler = 0xc39;
HalUsageFaultHandler = 0xc69;
HalUart0PinCtrlRtl8195A = 0xcfd;
HalUart1PinCtrlRtl8195A = 0xdc9;
HalUart2PinCtrlRtl8195A = 0xe9d;
HalSPI0PinCtrlRtl8195A = 0xf75;
HalSPI1PinCtrlRtl8195A = 0x1015;
HalSPI2PinCtrlRtl8195A = 0x10e5;
HalSPI0MCSPinCtrlRtl8195A = 0x11b5;
HalI2C0PinCtrlRtl8195A = 0x1275;
HalI2C1PinCtrlRtl8195A = 0x1381;
HalI2C2PinCtrlRtl8195A = 0x1459;
HalI2C3PinCtrlRtl8195A = 0x1529;
HalI2S0PinCtrlRtl8195A = 0x1639;
HalI2S1PinCtrlRtl8195A = 0x176d;
HalPCM0PinCtrlRtl8195A = 0x1845;
HalPCM1PinCtrlRtl8195A = 0x1949;
HalSDIODPinCtrlRtl8195A = 0x1a1d;
HalSDIOHPinCtrlRtl8195A = 0x1a6d;
HalMIIPinCtrlRtl8195A = 0x1ab9;
HalWLLEDPinCtrlRtl8195A = 0x1b51;
HalWLANT0PinCtrlRtl8195A = 0x1c0d;
HalWLANT1PinCtrlRtl8195A = 0x1c61;
HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5;
HalWLBTCMDPinCtrlRtl8195A = 0x1d05;
HalNFCPinCtrlRtl8195A = 0x1d59;
HalPWM0PinCtrlRtl8195A = 0x1da9;
HalPWM1PinCtrlRtl8195A = 0x1ead;
HalPWM2PinCtrlRtl8195A = 0x1fb5;
HalPWM3PinCtrlRtl8195A = 0x20b1;
HalETE0PinCtrlRtl8195A = 0x21b9;
HalETE1PinCtrlRtl8195A = 0x22c1;
HalETE2PinCtrlRtl8195A = 0x23c9;
HalETE3PinCtrlRtl8195A = 0x24d1;
HalEGTIMPinCtrlRtl8195A = 0x25d9;
HalSPIFlashPinCtrlRtl8195A = 0x2679;
HalSDRPinCtrlRtl8195A = 0x2725;
HalJTAGPinCtrlRtl8195A = 0x280d;
HalTRACEPinCtrlRtl8195A = 0x2861;
HalLOGUartPinCtrlRtl8195A = 0x28b9;
HalLOGUartIRPinCtrlRtl8195A = 0x291d;
HalSICPinCtrlRtl8195A = 0x2981;
HalEEPROMPinCtrlRtl8195A = 0x29d9;
HalDEBUGPinCtrlRtl8195A = 0x2a31;
HalPinCtrlRtl8195A = 0x2b39;
SpicRxCmdRtl8195A = 0x2e5d;
SpicWaitBusyDoneRtl8195A = 0x2ea5;
SpicGetFlashStatusRtl8195A = 0x2eb5;
SpicWaitWipDoneRtl8195A = 0x2f55;
SpicTxCmdRtl8195A = 0x2f6d;
SpicSetFlashStatusRtl8195A = 0x2fc1;
SpicCmpDataForCalibrationRtl8195A = 0x3049;
SpicLoadInitParaFromClockRtl8195A = 0x3081;
SpicInitRtl8195A = 0x30e5;
SpicEraseFlashRtl8195A = 0x31bd;
SpiFlashApp = 0x3279;
HalPeripheralIntrHandle = 0x33b5;
HalSysOnIntrHandle = 0x3439;
HalWdgIntrHandle = 0x3485;
HalTimer0IntrHandle = 0x34d5;
HalTimer1IntrHandle = 0x3525;
HalI2C3IntrHandle = 0x3575;
HalTimer2To7IntrHandle = 0x35c5;
HalSpi0IntrHandle = 0x3615;
HalGpioIntrHandle = 0x3665;
HalUart0IntrHandle = 0x36b5;
HalSpiFlashIntrHandle = 0x3705;
HalUsbOtgIntrHandle = 0x3755;
HalSdioHostIntrHandle = 0x37a5;
HalI2s0OrPcm0IntrHandle = 0x37f5;
HalI2s1OrPcm1IntrHandle = 0x3845;
HalWlDmaIntrHandle = 0x3895;
HalWlProtocolIntrHandle = 0x38e5;
HalCryptoIntrHandle = 0x3935;
HalGmacIntrHandle = 0x3985;
HalGdma0Ch0IntrHandle = 0x39d5;
HalGdma0Ch1IntrHandle = 0x3a25;
HalGdma0Ch2IntrHandle = 0x3a75;
HalGdma0Ch3IntrHandle = 0x3ac5;
HalGdma0Ch4IntrHandle = 0x3b15;
HalGdma0Ch5IntrHandle = 0x3b65;
HalGdma1Ch0IntrHandle = 0x3bb5;
HalGdma1Ch1IntrHandle = 0x3c05;
HalGdma1Ch2IntrHandle = 0x3c55;
HalGdma1Ch3IntrHandle = 0x3ca5;
HalGdma1Ch4IntrHandle = 0x3cf5;
HalGdma1Ch5IntrHandle = 0x3d45;
HalSdioDeviceIntrHandle = 0x3d95;
VectorTableInitRtl8195A = 0x3de5;
VectorTableInitForOSRtl8195A = 0x4019;
VectorIrqRegisterRtl8195A = 0x4029;
VectorIrqUnRegisterRtl8195A = 0x4091;
VectorIrqEnRtl8195A = 0x40f1;
VectorIrqDisRtl8195A = 0x418d;
_UartRxDmaIrqHandle = 0x422d;
HalRuartPutCRtl8195a = 0x4281;
HalRuartGetCRtl8195a = 0x429d;
HalRuartRTSCtrlRtl8195a = 0x42bd;
HalRuartGetDebugValueRtl8195a = 0x42e1;
HalRuartGetIMRRtl8195a = 0x43e1;
HalRuartSetIMRRtl8195a = 0x442d;
_UartIrqHandle = 0x4465;
HalRuartDmaInitRtl8195a = 0x4681;
HalRuartIntDisableRtl8195a = 0x4845;
HalRuartDeInitRtl8195a = 0x4855;
HalRuartIntEnableRtl8195a = 0x4985;
_UartTxDmaIrqHandle = 0x4995;
HalRuartRegIrqRtl8195a = 0x49d1;
HalRuartAdapterLoadDefRtl8195a = 0x4a4d;
HalRuartTxGdmaLoadDefRtl8195a = 0x4add;
HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9;
RuartLock = 0x4cc9;
RuartUnLock = 0x4ced;
HalRuartIntSendRtl8195a = 0x4d09;
HalRuartDmaSendRtl8195a = 0x4e35;
HalRuartStopSendRtl8195a = 0x4f89;
HalRuartIntRecvRtl8195a = 0x504d;
HalRuartDmaRecvRtl8195a = 0x51ad;
HalRuartStopRecvRtl8195a = 0x52cd;
RuartIsTimeout = 0x5385;
HalRuartSendRtl8195a = 0x53b1;
HalRuartRecvRtl8195a = 0x5599;
RuartResetRxFifoRtl8195a = 0x5751;
HalRuartResetRxFifoRtl8195a = 0x5775;
HalRuartInitRtl8195a = 0x5829;
HalGdmaOnOffRtl8195a = 0x5df1;
HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d;
HalGdmaChEnRtl8195a = 0x5e51;
HalGdmaChDisRtl8195a = 0x5e6d;
HalGdamChInitRtl8195a = 0x5e91;
HalGdmaChSetingRtl8195a = 0x5ebd;
HalGdmaChBlockSetingRtl8195a = 0x000060dd;
HalGdmaChIsrCleanRtl8195a = 0x6419;
HalGdmaChCleanAutoSrcRtl8195a = 0x64a1;
HalGdmaChCleanAutoDstRtl8195a = 0x6501;
HalEFUSEPowerSwitch8195AROM = 0x6561;
HALEFUSEOneByteReadROM = 0x65f9;
HALEFUSEOneByteWriteROM = 0x6699;
__rtl_memcmpb_v1_00 = 0x681d;
__rtl_random_v1_00 = 0x6861;
__rtl_align_to_be32_v1_00 = 0x6881;
__rtl_memsetw_v1_00 = 0x6899;
__rtl_memsetb_v1_00 = 0x68ad;
__rtl_memcpyw_v1_00 = 0x68bd;
__rtl_memcpyb_v1_00 = 0x68dd;
__rtl_memDump_v1_00 = 0x68f5;
__rtl_AES_set_encrypt_key = 0x6901;
__rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11;
__rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95;
__rtl_cryptoEngine_init_v1_00 = 0x6ea9;
__rtl_cryptoEngine_exit_v1_00 = 0x7055;
__rtl_cryptoEngine_reset_v1_00 = 0x70b1;
__rtl_cryptoEngine_v1_00 = 0x70ed;
__rtl_crypto_cipher_init_v1_00 = 0x7c69;
__rtl_crypto_cipher_encrypt_v1_00 = 0x7c89;
__rtl_crypto_cipher_decrypt_v1_00 = 0x7cad;
HalSsiPinmuxEnableRtl8195a = 0x7cd5;
HalSsiEnableRtl8195a = 0x7e45;
HalSsiDisableRtl8195a = 0x7ef9;
HalSsiLoadSettingRtl8195a = 0x7fad;
HalSsiSetInterruptMaskRtl8195a = 0x8521;
HalSsiGetInterruptMaskRtl8195a = 0x85c9;
HalSsiSetSclkPolarityRtl8195a = 0x863d;
HalSsiSetSclkPhaseRtl8195a = 0x8715;
HalSsiWriteRtl8195a = 0x87e9;
HalSsiSetDeviceRoleRtl8195a = 0x8861;
HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9;
HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941;
HalSsiReadRtl8195a = 0x89b9;
HalSsiGetRxFifoLevelRtl8195a = 0x8a2d;
HalSsiGetTxFifoLevelRtl8195a = 0x8aa5;
HalSsiGetStatusRtl8195a = 0x8b1d;
HalSsiWriteableRtl8195a = 0x8b91;
HalSsiReadableRtl8195a = 0x8c09;
HalSsiBusyRtl8195a = 0x8c81;
HalSsiReadInterruptRtl8195a = 0x8cf9;
HalSsiWriteInterruptRtl8195a = 0x8efd;
HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009;
HalSsiGetInterruptStatusRtl8195a = 0x90d9;
HalSsiInterruptEnableRtl8195a = 0x914d;
HalSsiInterruptDisableRtl8195a = 0x9299;
HalSsiGetRawInterruptStatusRtl8195a = 0x93e9;
HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d;
HalSsiInitRtl8195a = 0x94d1;
_SsiReadInterrupt = 0x9ba5;
_SsiWriteInterrupt = 0x9db1;
_SsiIrqHandle = 0x9eb1;
HalI2CWrite32 = 0xa061;
HalI2CRead32 = 0xa09d;
HalI2CDeInit8195a = 0xa0dd;
HalI2CSendRtl8195a = 0xa1f1;
HalI2CReceiveRtl8195a = 0xa25d;
HalI2CEnableRtl8195a = 0xa271;
HalI2CIntrCtrl8195a = 0xa389;
HalI2CReadRegRtl8195a = 0xa3a1;
HalI2CWriteRegRtl8195a = 0xa3b1;
HalI2CSetCLKRtl8195a = 0xa3c5;
HalI2CMassSendRtl8195a = 0xa6e9;
HalI2CClrIntrRtl8195a = 0xa749;
HalI2CClrAllIntrRtl8195a = 0xa761;
HalI2CInit8195a = 0xa775;
HalI2CDMACtrl8195a = 0xaa31;
RtkI2CIoCtrl = 0xaa61;
RtkI2CPowerCtrl = 0xaa65;
HalI2COpInit = 0xaa69;
I2CIsTimeout = 0xac65;
I2CTXGDMAISRHandle = 0xb435;
I2CRXGDMAISRHandle = 0xb4c1;
RtkI2CIrqInit = 0xb54d;
RtkI2CIrqDeInit = 0xb611;
RtkI2CPinMuxInit = 0xb675;
RtkI2CPinMuxDeInit = 0xb7c9;
RtkI2CDMAInit = 0xb955;
RtkI2CInit = 0xbc95;
RtkI2CDMADeInit = 0xbdad;
RtkI2CDeInit = 0xbe4d;
RtkI2CSendUserAddr = 0xbee5;
RtkI2CSend = 0xc07d;
RtkI2CLoadDefault = 0xce51;
RtkSalI2COpInit = 0xcf21;
HalI2SWrite32 = 0xcf65;
HalI2SRead32 = 0xcf85;
HalI2SDeInitRtl8195a = 0xcfa9;
HalI2STxRtl8195a = 0xcfc9;
HalI2SRxRtl8195a = 0xd011;
HalI2SEnableRtl8195a = 0xd05d;
HalI2SIntrCtrlRtl8195a = 0xd0b1;
HalI2SReadRegRtl8195a = 0xd0d1;
HalI2SClrIntrRtl8195a = 0xd0dd;
HalI2SClrAllIntrRtl8195a = 0xd0fd;
HalI2SInitRtl8195a = 0xd11d;
GPIO_GetIPPinName_8195a = 0xd2e5;
GPIO_GetChipPinName_8195a = 0xd331;
GPIO_PullCtrl_8195a = 0xd39d;
GPIO_FuncOn_8195a = 0xd421;
GPIO_FuncOff_8195a = 0xd481;
GPIO_Int_Mask_8195a = 0xd4e9;
GPIO_Int_SetType_8195a = 0xd511;
HAL_GPIO_IrqHandler_8195a = 0xd5fd;
HAL_GPIO_MbedIrqHandler_8195a = 0xd645;
HAL_GPIO_UserIrqHandler_8195a = 0xd6a1;
HAL_GPIO_IntCtrl_8195a = 0xd6cd;
HAL_GPIO_Init_8195a = 0xd805;
HAL_GPIO_DeInit_8195a = 0xdac1;
HAL_GPIO_ReadPin_8195a = 0xdbd1;
HAL_GPIO_WritePin_8195a = 0xdc91;
HAL_GPIO_RegIrq_8195a = 0xddad;
HAL_GPIO_UnRegIrq_8195a = 0xddf5;
HAL_GPIO_UserRegIrq_8195a = 0xde15;
HAL_GPIO_UserUnRegIrq_8195a = 0xdef9;
HAL_GPIO_MaskIrq_8195a = 0xdfc1;
HAL_GPIO_UnMaskIrq_8195a = 0xe061;
HAL_GPIO_IntDebounce_8195a = 0xe101;
HAL_GPIO_GetIPPinName_8195a = 0xe1c1;
HAL_GPIO_PullCtrl_8195a = 0xe1c9;
DumpForOneBytes = 0xe259;
CmdRomHelp = 0xe419;
CmdWriteWord = 0xe491;
CmdDumpHelfWord = 0xe505;
CmdDumpWord = 0xe5f1;
CmdDumpByte = 0xe6f5;
CmdSpiFlashTool = 0xe751;
GetRomCmdNum = 0xe7a9;
CmdWriteByte = 0xe7ad;
Isspace = 0xe7ed;
Strtoul = 0xe801;
ArrayInitialize = 0xe8b1;
GetArgc = 0xe8c9;
GetArgv = 0xe8f9;
UartLogCmdExecute = 0xe95d;
UartLogShowBackSpace = 0xe9fd;
UartLogRecallOldCmd = 0xea39;
UartLogHistoryCmd = 0xea71;
UartLogCmdChk = 0xeadd;
UartLogIrqHandle = 0xebf5;
RtlConsolInit = 0xecc5;
RtlConsolTaskRom = 0xed49;
RtlExitConsol = 0xed79;
RtlConsolRom = 0xedcd;
HalTimerOpInit = 0xee0d;
HalTimerIrq2To7Handle = 0xee59;
HalGetTimerIdRtl8195a = 0xef09;
HalTimerInitRtl8195a = 0xef3d;
HalTimerDisRtl8195a = 0xf069;
HalTimerEnRtl8195a = 0xf089;
HalTimerReadCountRtl8195a = 0xf0a9;
HalTimerIrqClearRtl8195a = 0xf0bd;
HalTimerDumpRegRtl8195a = 0xf0d1;
VSprintf = 0xf129;
DiagPrintf = 0xf39d;
DiagSPrintf = 0xf3b9;
DiagSnPrintf = 0xf3d1;
prvDiagPrintf = 0xf3ed;
prvDiagSPrintf = 0xf40d;
_memcmp = 0xf429;
_memcpy = 0xf465;
_memset = 0xf511;
Rand = 0xf585;
_strncpy = 0xf60d;
_strcpy = 0xf629;
prvStrCpy = 0xf639;
_strlen = 0xf651;
_strnlen = 0xf669;
prvStrLen = 0xf699;
_strcmp = 0xf6b1;
_strncmp = 0xf6d1;
prvStrCmp = 0xf719;
StrUpr = 0xf749;
prvAtoi = 0xf769;
prvStrStr = 0xf7bd;
_strsep = 0xf7d5;
skip_spaces = 0xf815;
skip_atoi = 0xf831;
_parse_integer_fixup_radix = 0xf869;
_parse_integer = 0xf8bd;
simple_strtoull = 0xf915;
simple_strtoll = 0xf945;
simple_strtoul = 0xf965;
simple_strtol = 0xf96d;
_vsscanf = 0xf985;
_sscanf = 0xff71;
div_u64 = 0xff91;
div_s64 = 0xff99;
div_u64_rem = 0xffa1;
div_s64_rem = 0xffb1;
_strpbrk = 0xffc1;
_strchr = 0xffed;
aes_set_key = 0x10005;
aes_encrypt = 0x103d1;
aes_decrypt = 0x114a5;
AES_WRAP = 0x125c9;
AES_UnWRAP = 0x12701;
crc32_get = 0x12861;
arc4_byte = 0x12895;
rt_arc4_init = 0x128bd;
rt_arc4_crypt = 0x12901;
rt_md5_init = 0x131c1;
rt_md5_append = 0x131f5;
rt_md5_final = 0x1327d;
rt_md5_hmac = 0x132d5;
rtw_get_bit_value_from_ieee_value = 0x13449;
rtw_is_cckrates_included = 0x13475;
rtw_is_cckratesonly_included = 0x134b5;
rtw_check_network_type = 0x134dd;
rtw_set_fixed_ie = 0x1350d;
rtw_set_ie = 0x1352d;
rtw_get_ie = 0x1355d;
rtw_set_supported_rate = 0x13591;
rtw_get_rateset_len = 0x13611;
rtw_get_wpa_ie = 0x1362d;
rtw_get_wpa2_ie = 0x136c9;
rtw_get_wpa_cipher_suite = 0x13701;
rtw_get_wpa2_cipher_suite = 0x13769;
rtw_parse_wpa_ie = 0x137d1;
rtw_parse_wpa2_ie = 0x138ad;
rtw_get_sec_ie = 0x13965;
rtw_get_wps_ie = 0x13a15;
rtw_get_wps_attr = 0x13a99;
rtw_get_wps_attr_content = 0x13b49;
rtw_ieee802_11_parse_elems = 0x13b91;
str_2char2num = 0x13d9d;
key_2char2num = 0x13db9;
convert_ip_addr = 0x13dd1;
rom_psk_PasswordHash = 0x13e9d;
rom_psk_CalcGTK = 0x13ed5;
rom_psk_CalcPTK = 0x13f69;
wep_80211_encrypt = 0x14295;
wep_80211_decrypt = 0x142f5;
tkip_micappendbyte = 0x14389;
rtw_secmicsetkey = 0x143d9;
rtw_secmicappend = 0x14419;
rtw_secgetmic = 0x14435;
rtw_seccalctkipmic = 0x1449d;
tkip_phase1 = 0x145a5;
tkip_phase2 = 0x14725;
tkip_80211_encrypt = 0x14941;
tkip_80211_decrypt = 0x149d5;
aes1_encrypt = 0x14a8d;
aesccmp_construct_mic_iv = 0x14c65;
aesccmp_construct_mic_header1 = 0x14ccd;
aesccmp_construct_mic_header2 = 0x14d21;
aesccmp_construct_ctr_preload = 0x14db5;
aes_80211_encrypt = 0x14e29;
aes_80211_decrypt = 0x151ad;
_sha1_process_message_block = 0x155b9;
_sha1_pad_message = 0x15749;
rt_sha1_init = 0x157e5;
rt_sha1_update = 0x15831;
rt_sha1_finish = 0x158a9;
rt_hmac_sha1 = 0x15909;
rom_aes_128_cbc_encrypt = 0x15a65;
rom_aes_128_cbc_decrypt = 0x15ae1;
rom_rijndaelKeySetupEnc = 0x15b5d;
rom_aes_decrypt_init = 0x15c39;
rom_aes_internal_decrypt = 0x15d15;
rom_aes_decrypt_deinit = 0x16071;
rom_aes_encrypt_init = 0x16085;
rom_aes_internal_encrypt = 0x1609d;
rom_aes_encrypt_deinit = 0x16451;
bignum_init = 0x17b35;
bignum_deinit = 0x17b61;
bignum_get_unsigned_bin_len = 0x17b81;
bignum_get_unsigned_bin = 0x17b85;
bignum_set_unsigned_bin = 0x17c21;
bignum_cmp = 0x17cd1;
bignum_cmp_d = 0x17cd5;
bignum_add = 0x17cfd;
bignum_sub = 0x17d0d;
bignum_mul = 0x17d1d;
bignum_exptmod = 0x17d2d;
WPS_realloc = 0x17d51;
os_zalloc = 0x17d99;
rom_hmac_sha256_vector = 0x17dc1;
rom_hmac_sha256 = 0x17ebd;
rom_sha256_vector = 0x18009;
phy_CalculateBitShift = 0x18221;
PHY_SetBBReg_8195A = 0x18239;
PHY_QueryBBReg_8195A = 0x18279;
ROM_odm_QueryRxPwrPercentage = 0x1829d;
ROM_odm_EVMdbToPercentage = 0x182bd;
ROM_odm_SignalScaleMapping_8195A = 0x182e5;
ROM_odm_FalseAlarmCounterStatistics = 0x183cd;
ROM_odm_SetEDCCAThreshold = 0x18721;
ROM_odm_SetTRxMux = 0x18749;
ROM_odm_SetCrystalCap = 0x18771;
ROM_odm_GetDefaultCrytaltalCap = 0x187d5;
ROM_ODM_CfoTrackingReset = 0x187e9;
ROM_odm_CfoTrackingFlow = 0x18811;
curve25519_donna = 0x1965d;
aes_test_alignment_detection = 0x1a391;
aes_mode_reset = 0x1a3ed;
aes_ecb_encrypt = 0x1a3f9;
aes_ecb_decrypt = 0x1a431;
aes_cbc_encrypt = 0x1a469;
aes_cbc_decrypt = 0x1a579;
aes_cfb_encrypt = 0x1a701;
aes_cfb_decrypt = 0x1a9e5;
aes_ofb_crypt = 0x1acc9;
aes_ctr_crypt = 0x1af7d;
aes_encrypt_key128 = 0x1b289;
aes_encrypt_key192 = 0x1b2a5;
aes_encrypt_key256 = 0x1b2c1;
aes_encrypt_key = 0x1b2e1;
aes_decrypt_key128 = 0x1b351;
aes_decrypt_key192 = 0x1b36d;
aes_decrypt_key256 = 0x1b389;
aes_decrypt_key = 0x1b3a9;
aes_init = 0x1b419;
CRYPTO_chacha_20 = 0x1b41d;
CRYPTO_poly1305_init = 0x1bc25;
CRYPTO_poly1305_update = 0x1bd09;
CRYPTO_poly1305_finish = 0x1bd8d;
rom_sha512_starts = 0x1ceb5;
rom_sha512_update = 0x1d009;
rom_sha512_finish = 0x1d011;
rom_sha512 = 0x1d261;
rom_sha512_hmac_starts = 0x1d299;
rom_sha512_hmac_update = 0x1d35d;
rom_sha512_hmac_finish = 0x1d365;
rom_sha512_hmac_reset = 0x1d3b5;
rom_sha512_hmac = 0x1d3d1;
rom_sha512_hkdf = 0x1d40d;
rom_ed25519_gen_keypair = 0x1d501;
rom_ed25519_gen_signature = 0x1d505;
rom_ed25519_verify_signature = 0x1d51d;
rom_ed25519_crypto_sign_seed_keypair = 0x1d521;
rom_ed25519_crypto_sign_detached = 0x1d579;
rom_ed25519_crypto_sign_verify_detached = 0x1d655;
rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d;
rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35;
rom_ed25519_ge_p3_tobytes = 0x207d5;
rom_ed25519_ge_scalarmult_base = 0x20821;
rom_ed25519_ge_tobytes = 0x209e1;
rom_ed25519_sc_muladd = 0x20a2d;
rom_ed25519_sc_reduce = 0x2603d;
__rtl_memchr_v1_00 = 0x28a4d;
__rtl_memcmp_v1_00 = 0x28ae1;
__rtl_memcpy_v1_00 = 0x28b49;
__rtl_memmove_v1_00 = 0x28bed;
__rtl_memset_v1_00 = 0x28cb5;
__rtl_strcat_v1_00 = 0x28d49;
__rtl_strchr_v1_00 = 0x28d91;
__rtl_strcmp_v1_00 = 0x28e55;
__rtl_strcpy_v1_00 = 0x28ec9;
__rtl_strlen_v1_00 = 0x28f15;
__rtl_strncat_v1_00 = 0x28f69;
__rtl_strncmp_v1_00 = 0x28fc5;
__rtl_strncpy_v1_00 = 0x2907d;
__rtl_strstr_v1_00 = 0x293cd;
__rtl_strsep_v1_00 = 0x2960d;
__rtl_strtok_v1_00 = 0x29619;
__rtl__strtok_r_v1_00 = 0x2962d;
__rtl_strtok_r_v1_00 = 0x29691;
__rtl_close_v1_00 = 0x29699;
__rtl_fstat_v1_00 = 0x296ad;
__rtl_isatty_v1_00 = 0x296c1;
__rtl_lseek_v1_00 = 0x296d5;
__rtl_open_v1_00 = 0x296e9;
__rtl_read_v1_00 = 0x296fd;
__rtl_write_v1_00 = 0x29711;
__rtl_sbrk_v1_00 = 0x29725;
__rtl_ltoa_v1_00 = 0x297bd;
__rtl_ultoa_v1_00 = 0x29855;
__rtl_dtoi_v1_00 = 0x298c5;
__rtl_dtoi64_v1_00 = 0x29945;
__rtl_dtoui_v1_00 = 0x299dd;
__rtl_ftol_v1_00 = 0x299e5;
__rtl_itof_v1_00 = 0x29a51;
__rtl_itod_v1_00 = 0x29ae9;
__rtl_i64tod_v1_00 = 0x29b79;
__rtl_uitod_v1_00 = 0x29c55;
__rtl_ftod_v1_00 = 0x29d2d;
__rtl_dtof_v1_00 = 0x29de9;
__rtl_uitof_v1_00 = 0x29e89;
__rtl_fadd_v1_00 = 0x29f65;
__rtl_fsub_v1_00 = 0x2a261;
__rtl_fmul_v1_00 = 0x2a559;
__rtl_fdiv_v1_00 = 0x2a695;
__rtl_dadd_v1_00 = 0x2a825;
__rtl_dsub_v1_00 = 0x2aed9;
__rtl_dmul_v1_00 = 0x2b555;
__rtl_ddiv_v1_00 = 0x2b8ad;
__rtl_dcmpeq_v1_00 = 0x2be4d;
__rtl_dcmplt_v1_00 = 0x2bebd;
__rtl_dcmpgt_v1_00 = 0x2bf51;
__rtl_dcmple_v1_00 = 0x2c049;
__rtl_fcmplt_v1_00 = 0x2c139;
__rtl_fcmpgt_v1_00 = 0x2c195;
__rtl_cos_f32_v1_00 = 0x2c229;
__rtl_sin_f32_v1_00 = 0x2c435;
__rtl_fabs_v1_00 = 0x2c639;
__rtl_fabsf_v1_00 = 0x2c641;
__rtl_dtoa_r_v1_00 = 0x2c77d;
__rom_mallocr_init_v1_00 = 0x2d7d1;
__rtl_free_r_v1_00 = 0x2d841;
__rtl_malloc_r_v1_00 = 0x2da31;
__rtl_realloc_r_v1_00 = 0x2df55;
__rtl_memalign_r_v1_00 = 0x2e331;
__rtl_valloc_r_v1_00 = 0x2e421;
__rtl_pvalloc_r_v1_00 = 0x2e42d;
__rtl_calloc_r_v1_00 = 0x2e441;
__rtl_cfree_r_v1_00 = 0x2e4a9;
__rtl_Balloc_v1_00 = 0x2e515;
__rtl_Bfree_v1_00 = 0x2e571;
__rtl_i2b_v1_00 = 0x2e585;
__rtl_multadd_v1_00 = 0x2e599;
__rtl_mult_v1_00 = 0x2e629;
__rtl_pow5mult_v1_00 = 0x2e769;
__rtl_hi0bits_v1_00 = 0x2e809;
__rtl_d2b_v1_00 = 0x2e845;
__rtl_lshift_v1_00 = 0x2e901;
__rtl_cmp_v1_00 = 0x2e9bd;
__rtl_diff_v1_00 = 0x2ea01;
__rtl_sread_v1_00 = 0x2eae9;
__rtl_seofread_v1_00 = 0x2eb39;
__rtl_swrite_v1_00 = 0x2eb3d;
__rtl_sseek_v1_00 = 0x2ebc1;
__rtl_sclose_v1_00 = 0x2ec11;
__rtl_sbrk_r_v1_00 = 0x2ec41;
__rtl_fflush_r_v1_00 = 0x2ef8d;
__rtl_vfprintf_r_v1_00 = 0x2f661;
__rtl_fpclassifyd = 0x30c15;
CpkClkTbl = 0x30c68;
ROM_IMG1_VALID_PATTEN = 0x30c80;
SpicCalibrationPattern = 0x30c88;
SpicInitCPUCLK = 0x30c98;
BAUDRATE = 0x30ca8;
OVSR = 0x30d1c;
DIV = 0x30d90;
OVSR_ADJ = 0x30e04;
__AES_rcon = 0x30e78;
__AES_Te4 = 0x30ea0;
I2CDmaChNo = 0x312a0;
UartLogRomCmdTable = 0x316a0;
_HalRuartOp = 0x31700;
_HalGdmaOp = 0x31760;
RTW_WPA_OUI_TYPE = 0x3540c;
WPA_CIPHER_SUITE_NONE = 0x35410;
WPA_CIPHER_SUITE_WEP40 = 0x35414;
WPA_CIPHER_SUITE_TKIP = 0x35418;
WPA_CIPHER_SUITE_CCMP = 0x3541c;
WPA_CIPHER_SUITE_WEP104 = 0x35420;
RSN_CIPHER_SUITE_NONE = 0x35424;
RSN_CIPHER_SUITE_WEP40 = 0x35428;
RSN_CIPHER_SUITE_TKIP = 0x3542c;
RSN_CIPHER_SUITE_CCMP = 0x35430;
RSN_CIPHER_SUITE_WEP104 = 0x35434;
RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444;
RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448;
RSN_VERSION_BSD = 0x3544c;
rom_wps_Te0 = 0x35988;
rom_wps_rcons = 0x35d88;
rom_wps_Td4s = 0x35d94;
rom_wps_Td0 = 0x35e94;
NewVectorTable = 0x10000000;
UserIrqFunTable = 0x10000100;
UserIrqDataTable = 0x10000200;
__rom_bss_start__ = 0x10000300;
CfgSysDebugWarn = 0x10000300;
CfgSysDebugInfo = 0x10000304;
CfgSysDebugErr = 0x10000308;
ConfigDebugWarn = 0x1000030c;
ConfigDebugInfo = 0x10000310;
ConfigDebugErr = 0x10000314;
HalTimerOp = 0x10000318;
GPIOState = 0x10000334;
gTimerRecord = 0x1000034c;
SSI_DBG_CONFIG = 0x10000350;
_pHAL_Gpio_Adapter = 0x10000354;
Timer2To7VectorTable = 0x10000358;
pUartLogCtl = 0x10000384;
UartLogBuf = 0x10000388;
UartLogCtl = 0x10000408;
UartLogHistoryBuf = 0x10000430;
ArgvArray = 0x100006ac;
rom_wlan_ram_map = 0x100006d4;
FalseAlmCnt = 0x100006e0;
ROMInfo = 0x10000720;
DM_CfoTrack = 0x10000738;
rom_libgloss_ram_map = 0x10000760;
__rtl_errno = 0x10000bc4;
_rtl_impure_ptr = 0x10001c60;
}

1
project/realtek_ameba1_va0_example/GCC-RELEASE/fwsize.gdb Normal file
View file

@ -0,0 +1 @@
set $RamFileSize = 344948

77
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/Check_Jtag.sh Normal file
View file

@ -0,0 +1,77 @@
#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
RLXSTS=$(ps -W | grep "rlx_probe_driver.exe" | grep -v "grep" | wc -l)
echo $RLXSTS
JLKSTS=$(ps -W | grep "JLinkGDBServer.exe" | grep -v "grep" | wc -l)
echo $JLKSTS
echo $CURRENT_UTILITY_DIR
#===============================================================================
#make the new string for being written
if [ $RLXSTS = 1 ]
then
echo "probe get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
else
if [ $JLKSTS = 1 ]
then
echo "jlink get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
fi
fi
#===============================================================================

20
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/SetupGDB_NORMAL.sh Normal file
View file

@ -0,0 +1,20 @@
#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
echo "..."
echo $CURRENT_UTILITY_DIR
RAMFILENAME="./application/Debug/bin/ram_all.bin"
echo $RAMFILENAME
#RAMFILENAME="ram_2.bin"
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
#get file size
RAM_FILE_SIZE=$(stat -c %s $RAMFILENAME)
RAM_FILE_SIZE_HEX=`echo "obase=16; $RAM_FILE_SIZE"|bc`
echo "size "$RAM_FILE_SIZE" --> 0x"$RAM_FILE_SIZE_HEX
echo "set \$RamFileSize = 0x$RAM_FILE_SIZE_HEX" > fwsize.gdb
exit

124
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/openocd/ameba1.cfg Normal file
View file

@ -0,0 +1,124 @@
# Main file for Ameba1 series Cortex-M3 parts
#
# !!!!!!
#
set CHIPNAME rtl8195a
set CHIPSERIES ameba1
# Adapt based on what transport is active.
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
error "CHIPNAME not set. Please do not include ameba1.cfg directly."
}
if { [info exists CHIPSERIES] } {
# Validate chip series is supported
if { $CHIPSERIES != "ameba1" } {
error "Unsupported chip series specified."
}
set _CHIPSERIES $CHIPSERIES
} else {
error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
}
if { [info exists CPUTAPID] } {
# Allow user override
set _CPUTAPID $CPUTAPID
} else {
# Ameba1 use a Cortex M3 core.
if { $_CHIPSERIES == "ameba1" } {
if { [using_jtag] } {
set _CPUTAPID 0x4ba00477
} {
set _CPUTAPID 0x2ba01477
}
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at.
adapter_khz 1000
# delays on reset lines
adapter_nsrst_delay 200
if {[using_jtag]} {
jtag_ntrst_delay 200
}
# Ameba1 (Cortex M3 core) support SYSRESETREQ
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event reset-init {ameba1_init}
# Ameba1 SDRAM enable
proc ameba1_init { } {
# init System
mww 0x40000014 0x00000021
sleep 10
mww 0x40000304 0x1fc00002
sleep 10
mww 0x40000250 0x00000400
sleep 10
mww 0x40000340 0x00000000
sleep 10
mww 0x40000230 0x0000dcc4
sleep 10
mww 0x40000210 0x00011117
sleep 10
mww 0x40000210 0x00011157
sleep 10
mww 0x400002c0 0x00110011
sleep 10
mww 0x40000320 0xffffffff
sleep 10
# init SDRAM
mww 0x40000040 0x00fcc702
sleep 10
mdw 0x40000040
mww 0x40005224 0x00000001
sleep 10
mww 0x40005004 0x00000208
sleep 10
mww 0x40005008 0xffffd000
sleep 13
mww 0x40005020 0x00000022
sleep 13
mww 0x40005010 0x09006201
sleep 13
mww 0x40005014 0x00002611
sleep 13
mww 0x40005018 0x00068413
sleep 13
mww 0x4000501c 0x00000042
sleep 13
mww 0x4000500c 0x700 ;# set Idle
sleep 20
mww 0x40005000 0x1 ;# start init
sleep 100
mdw 0x40005000
mww 0x4000500c 0x600 ;# enter memory mode
sleep 30
mww 0x40005008 0x00000000 ;# 0xf00
;# mww 0x40005008 0x00000f00
sleep 3
mww 0x40000300 0x0006005e ;# 0x5e
;# mww 0x40000300 0x0000005e
sleep 3
}

BIN
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/ram_all.bin Normal file
View file

Binary file not shown.

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug.txt Normal file
View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug_jlink.txt Normal file
View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug_openocd.txt Normal file
View file

@ -0,0 +1,57 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

199
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write.txt Normal file
View file

@ -0,0 +1,199 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

199
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write_jlink.txt Normal file
View file

@ -0,0 +1,199 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

198
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write_openocd.txt Normal file
View file

@ -0,0 +1,198 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset init
monitor halt
monitor sleep 20
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

112
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_ramdebug.txt Normal file
View file

@ -0,0 +1,112 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

112
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_ramdebug_jlink.txt Normal file
View file

@ -0,0 +1,112 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

59
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_ramdebug_openocd.txt Normal file
View file

@ -0,0 +1,59 @@
# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
set {int}0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

BIN
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/target_NORMAL.axf Normal file
View file

Binary file not shown.

BIN
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/target_NORMALB.axf Normal file
View file

Binary file not shown.

BIN
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/target_NORMALC.axf Normal file
View file

Binary file not shown.

2
project/realtek_ameba1_va0_example/GCC-RELEASE/readme.txt Normal file
View file

@ -0,0 +1,2 @@
platform_opts.h:
#define CONFIG_ENABLE_WPS 1

275
project/realtek_ameba1_va0_example/GCC-RELEASE/rlx8195A-symbol-v02-img2.ld Normal file
View file

@ -0,0 +1,275 @@
ENTRY(Reset_Handler)
INCLUDE "export-rom_v02.txt"
MEMORY
{
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 21560
//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 434176
RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 7936
//BD_RAM (rwx) : ORIGIN = 0x10004000, LENGTH = 442368
SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
}
SECTIONS
{
__rom_bss_start__ = 0x10000300;
__rom_bss_end__ = 0x10000bc8;
/*
.ram.start.table :
{
__ram_image1_text_start__ = .;
__ram_start_table_start__ = .;
KEEP(*(SORT(.start.ram.data*)))
__ram_start_table_end__ = .;
} > ROM_USED_RAM
*/
/* Add . to assign the start address of the section, *
* to prevent the change of the start address by ld doing section alignment */
/* these 4 sections is used by ROM global variable */
/* Don't move them and never add RAM code variable to these sections */
/*
.ram_image1.text . :
{
__image1_validate_code__ = .;
KEEP(*(.image1.validate.rodata*))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.hal.ram.data*))
__image1_bss_start__ = .;
__image1_bss_end__ = .;
__ram_image1_data_end__ = .;
*(.hal.ram.text*)
*(.infra.ram.text*)
__ram_image1_text_end__ = .;
} > ROM_USED_RAM
*/
/*
.tcm :
{
__tcm_start__ = .;
*(.tcm.heap)
*mem.o (.bss)
*memp.o (.bss)
__tcm_end__ = .;
} > TCM
*/
.bootloader :
{
KEEP(*(.loader.data*))
} > ROM_USED_RAM
OVERLAY 0x1FFF0000:
{
.valid
{
*mem.o (.bss*)
*memp.o (.bss*)
*(.tcm.heap)
}
.dummy
{
__ram_image1_text_start__ = .;
__ram_start_table_start__ = .;
KEEP(*(SORT(.start.ram.data*)))
__ram_start_table_end__ = .;
__image1_validate_code__ = .;
KEEP(*(.image1.validate.rodata*))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.hal.ram.data*))
__image1_bss_start__ = .;
.ram_image1.bss$$Base = .;
__image1_bss_end__ = .;
.ram_image1.bss$$Limit = .;
__ram_image1_data_end__ = .;
*(.hal.ram.text*)
*(.infra.ram.text*)
}
} > TCM
.image2.start.table :
{
__ram_image2_text_start__ = .;
__image2_entry_func__ = .;
.image2.start.table1$$Base = .;
KEEP(*(SORT(.image2.ram.data*)))
__image2_validate_code__ = .;
KEEP(*(.image2.validate.rodata*))
KEEP(*(.custom.validate.rodata*))
} > BD_RAM
.ram_image2.text :
{
KEEP(*(.infra.ram.start*))
*(.mon.ram.text*)
*(.hal.flash.text*)
*(.hal.sdrc.text*)
*(.hal.gpio.text*)
*(.fwu.text*)
*(.text*)
} > BD_RAM
/*--------------
.sdr_text :
{
__sdram_data_start__ = .;
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
} > BD_RAM
.sdr_rodata :
{
*(.sdram.rodata*)
*(.p2p.rodata*)
*(.wps.rodata*)
*(.websocket.rodata*)
} > BD_RAM
.sdr_data :
{
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
__sdram_data_end__ = .;
} > BD_RAM
.sdr_bss :
{
__sdram_bss_start__ = .;
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
*(.websocket.bss*)
__sdram_bss_end__ = .;
} > BD_RAM
--------------*/
.ram_image2.rodata :
{
*(.rodata*)
*(.fwu.rodata*)
} > BD_RAM
.ram.data :
{
__data_start__ = .;
*(.data*)
__data_end__ = .;
__ram_image2_text_end__ = .;
} > BD_RAM
.ram.bss :
{
__bss_start__ = .;
.ram.bss$$Base = .;
*(.hal.flash.data*)
*(.hal.sdrc.data*)
*(.hal.gpio.data*)
*(.fwu.data*)
*(.bss*)
*(COMMON)
*(.bdsram.data*)
__bss_end__ = .;
.ram.bss$$Limit = .;
} > BD_RAM
.bf_data :
{
__buffer_data_start__ = .;
*(.bfsram.data*)
__buffer_data_end__ = .;
} > BD_RAM
.bf_data2 :
{
__buffer_data_start2__ = .;
__buffer_data_end2__ = .;
} > RECY_RAM
.sdr_text :
{
__sdram_data_start__ = .;
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
} > SDRAM_RAM
.sdr_rodata :
{
*(.sdram.rodata*)
*(.p2p.rodata*)
*(.wps.rodata*)
*(.websocket.rodata*)
} > SDRAM_RAM
.sdr_data :
{
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
__sdram_data_end__ = .;
} > SDRAM_RAM
.sdr_bss :
{
__sdram_bss_start__ = .;
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
*(.websocket.bss*)
__sdram_bss_end__ = .;
} > SDRAM_RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > BD_RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > BD_RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

2
project/realtek_ameba1_va0_example/GCC-RELEASE/run_openocd.bat Normal file
View file

@ -0,0 +1,2 @@
taskkill /F /IM openocd.exe
openocd -f interface\Jlink.cfg -f ..\..\..\component\soc\realtek\8195a\misc\gcc_utility\openocd\ameba1.cfg

21
project/realtek_ameba1_va0_example/GCC-RELEASE/run_openocd.sh Normal file
View file

@ -0,0 +1,21 @@
#!/bin/sh
OS=`uname | cut -c 1-6`
PID=`ps aux | grep openocd | gawk '{print $1}'`
if [ ! -z "$PID" -a "$PID" != " " ]; then
echo Found openocd running, Kill it
kill $PID
else
if [ $OS == CYGWIN ]; then
echo Try to search windows process
PID=`ps --windows | grep openocd | gawk '{print $1}'`
if [ -n PID ]; then
echo Found openocd running, Kill it
taskkill /F /pid $PID
fi
fi
fi
openocd -f interface/cmsis-dap.cfg -f ../../../component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1.cfg