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pvvx 2016-09-23 07:21:45 +03:00
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project/realtek_ameba1_va0_example/GCC-RELEASE/.gitignore vendored Normal file
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/application/

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project/realtek_ameba1_va0_example/GCC-RELEASE/Makefile Normal file
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all: ram_all
.PHONY: ram_all
ram_all:
@$(MAKE) -f application.mk
.PHONY: mp
mp: toolchain
@$(MAKE) -f application.mk mp
.PHONY: clean clean_all
clean:
@$(MAKE) -f application.mk clean
clean_all:
@$(MAKE) -f application.mk clean_all
.PHONY: flash debug ramdebug setup
setup:
@$(MAKE) -f application.mk $(MAKECMDGOALS)
flash:
@$(MAKE) -f application.mk flashburn
debug:
@$(MAKE) -f application.mk debug
ramdebug:
@$(MAKE) -f application.mk ramdebug

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project/realtek_ameba1_va0_example/GCC-RELEASE/application.mk Normal file
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# Initialize tool chain
# -------------------------------------------------------------------
#ARM_GCC_TOOLCHAIN = ../../../tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/
AMEBA_TOOLDIR = ../../../component/soc/realtek/8195a/misc/iar_utility/common/tools/
FLASH_TOOLDIR = ../../../component/soc/realtek/8195a/misc/gcc_utility/
CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)arm-none-eabi-
# Compilation tools
AR = $(CROSS_COMPILE)ar
CC = $(CROSS_COMPILE)gcc
AS = $(CROSS_COMPILE)as
NM = $(CROSS_COMPILE)nm
LD = $(CROSS_COMPILE)gcc
GDB = $(CROSS_COMPILE)gdb
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
OS := $(shell uname)
ifneq ($(findstring Linux, $(OS)), Linux)
PICK = $(AMEBA_TOOLDIR)pick.exe
PAD = $(AMEBA_TOOLDIR)padding.exe
CHKSUM = $(AMEBA_TOOLDIR)checksum.exe
else
PICK = $(AMEBA_TOOLDIR)pick
PAD = $(AMEBA_TOOLDIR)padding
CHKSUM = $(AMEBA_TOOLDIR)checksum
endif
# Initialize target name and target object files
# -------------------------------------------------------------------
all: application manipulate_images
mp: application manipulate_images
TARGET=application
OBJ_DIR=$(TARGET)/Debug/obj
BIN_DIR=$(TARGET)/Debug/bin
# Include folder list
# -------------------------------------------------------------------
INCLUDES =
INCLUDES += -I../inc
INCLUDES += -I../../../component/soc/realtek/common/bsp
INCLUDES += -I../../../component/os/freertos
INCLUDES += -I../../../component/os/freertos/freertos_v8.1.2/Source/include
INCLUDES += -I../../../component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3
INCLUDES += -I../../../component/os/os_dep/include
INCLUDES += -I../../../component/soc/realtek/8195a/misc/driver
INCLUDES += -I../../../component/common/api/network/include
INCLUDES += -I../../../component/common/api
INCLUDES += -I../../../component/common/api/platform
INCLUDES += -I../../../component/common/api/wifi
INCLUDES += -I../../../component/common/api/wifi/rtw_wpa_supplicant/src
INCLUDES += -I../../../component/common/application
INCLUDES += -I../../../component/common/application/iotdemokit
INCLUDES += -I../../../component/common/application/google
INCLUDES += -I../../../component/common/media/framework
INCLUDES += -I../../../component/common/example
INCLUDES += -I../../../component/common/example/wlan_fast_connect
INCLUDES += -I../../../component/common/mbed/api
INCLUDES += -I../../../component/common/mbed/hal
INCLUDES += -I../../../component/common/mbed/hal_ext
INCLUDES += -I../../../component/common/mbed/targets/hal/rtl8195a
INCLUDES += -I../../../component/common/network
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include/lwip
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/src/include/ipv4
INCLUDES += -I../../../component/common/network/lwip/lwip_v1.4.1/port/realtek
INCLUDES += -I../../../component/common/test
INCLUDES += -I../../../component/soc/realtek/8195a/cmsis
INCLUDES += -I../../../component/soc/realtek/8195a/cmsis/device
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/rtl8195a
INCLUDES += -I../../../component/soc/realtek/8195a/misc/rtl_std_lib/include
INCLUDES += -I../../../component/common/drivers/wlan/realtek/include
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/osdep
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hci
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hal
INCLUDES += -I../../../component/common/drivers/wlan/realtek/src/hal/OUTSRC
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/ram_lib/wlan/realtek/wlan_ram_map/rom
INCLUDES += -I../../../component/common/network/ssl/polarssl-1.3.8/include
INCLUDES += -I../../../component/common/network/ssl/ssl_ram_map/rom
INCLUDES += -I../../../component/common/utilities
INCLUDES += -I../../../component/soc/realtek/8195a/misc/rtl_std_lib/include
INCLUDES += -I../../../component/common/application/apple/WACServer/External/Curve25519
INCLUDES += -I../../../component/common/application/apple/WACServer/External/GladmanAES
INCLUDES += -I../../../component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include
INCLUDES += -I../../../component/common/video/v4l2/inc
INCLUDES += -I../../../component/common/media/codec
INCLUDES += -I../../../component/common/drivers/usb_class/host/uvc/inc
INCLUDES += -I../../../component/common/drivers/usb_class/device
INCLUDES += -I../../../component/common/drivers/usb_class/device/class
INCLUDES += -I../../../component/common/file_system/fatfs
INCLUDES += -I../../../component/common/file_system/fatfs/r0.10c/include
INCLUDES += -I../../../component/common/drivers/sdio/realtek/sdio_host/inc
INCLUDES += -I../../../component/common/audio
INCLUDES += -I../../../component/common/drivers/i2s
INCLUDES += -I../../../component/common/application/xmodem
# Source file list
# -------------------------------------------------------------------
SRC_C =
DRAM_C =
#cmsis
SRC_C += ../../../component/soc/realtek/8195a/cmsis/device/system_8195a.c
#console
SRC_C += ../../../component/common/api/at_cmd/atcmd_ethernet.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_lwip.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_sys.c
SRC_C += ../../../component/common/api/at_cmd/atcmd_wifi.c
SRC_C += ../../../component/common/api/at_cmd/log_service.c
SRC_C += ../../../component/soc/realtek/8195a/misc/driver/low_level_io.c
SRC_C += ../../../component/soc/realtek/8195a/misc/driver/rtl_consol.c
#network - api
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_p2p_config.c
SRC_C += ../../../component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_wps_config.c
SRC_C += ../../../component/common/api/wifi/wifi_conf.c
SRC_C += ../../../component/common/api/wifi/wifi_ind.c
SRC_C += ../../../component/common/api/wifi/wifi_promisc.c
SRC_C += ../../../component/common/api/wifi/wifi_simple_config.c
SRC_C += ../../../component/common/api/wifi/wifi_util.c
SRC_C += ../../../component/common/api/lwip_netconf.c
#network - app
SRC_C += ../../../component/common/api/network/src/ping_test.c
SRC_C += ../../../component/common/utilities/ssl_client.c
SRC_C += ../../../component/common/utilities/ssl_client_ext.c
SRC_C += ../../../component/common/utilities/tcptest.c
SRC_C += ../../../component/common/application/uart_adapter/uart_adapter.c
SRC_C += ../../../component/common/utilities/uart_ymodem.c
SRC_C += ../../../component/common/utilities/update.c
SRC_C += ../../../component/common/api/network/src/wlan_network.c
#network - lwip
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/api_lib.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/api_msg.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/err.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netbuf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netdb.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/netifapi.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/sockets.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/api/tcpip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/autoip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/icmp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/igmp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/inet.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/inet_chksum.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip_addr.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/ipv4/ip_frag.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/def.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/dhcp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/dns.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/init.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/lwip_timers.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/mem.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/memp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/netif.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/pbuf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/raw.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/stats.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/sys.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp_in.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/tcp_out.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/core/udp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/src/netif/etharp.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/ethernetif.c
SRC_C += ../../../component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
SRC_C += ../../../component/common/network/lwip/lwip_v1.4.1/port/realtek/freertos/sys_arch.c
SRC_C += ../../../component/common/network/dhcp/dhcps.c
SRC_C += ../../../component/common/network/sntp/sntp.c
#network - mdns
SRC_C += ../../../component/common/network/mDNS/mDNSPlatform.c
#os - freertos
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/portable/GCC/ARM_CM3/port.c
SRC_C += ../../../component/os/freertos/cmsis_os.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/croutine.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/event_groups.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/list.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/queue.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/tasks.c
SRC_C += ../../../component/os/freertos/freertos_v8.1.2/Source/timers.c
#os - osdep
SRC_C += ../../../component/os/os_dep/device_lock.c
SRC_C += ../../../component/os/freertos/freertos_service.c
SRC_C += ../../../component/os/os_dep/mailbox.c
SRC_C += ../../../component/os/os_dep/osdep_api.c
SRC_C += ../../../component/os/os_dep/osdep_service.c
SRC_C += ../../../component/os/os_dep/tcm_heap.c
#peripheral - api
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/analogin_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/dma_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/efuse_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/ethernet_api.c
SRC_C += ../../../component/common/drivers/ethernet_mii/ethernet_mii.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/flash_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/gpio_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/gpio_irq_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/i2c_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/i2s_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/log_uart_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/nfc_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pinmap.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pinmap_common.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/port_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/pwmout_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/rtc_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/serial_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/sleep.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/spdio_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/spi_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/sys_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/timer_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/us_ticker.c
SRC_C += ../../../component/common/mbed/common/us_ticker_api.c
SRC_C += ../../../component/common/mbed/common/wait_api.c
SRC_C += ../../../component/common/mbed/targets/hal/rtl8195a/wdt_api.c
#peripheral - hal
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_32k.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_adc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_gdma.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_gpio.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_i2c.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_i2s.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_mii.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_nfc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_pcm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_pwm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_sdr_controller.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_ssi.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_timer.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/src/hal_uart.c
#peripheral - osdep
SRC_C += ../../../component/os/freertos/freertos_pmu.c
#peripheral - rtl8195a
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_adc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gdma.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_gpio.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2c.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_i2s.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_mii.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_nfc.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_pwm.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_ssi.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_timer.c
SRC_C += ../../../component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_uart.c
#peripheral - wlan
#all:SRC_C += ../../../component/common/drivers/wlan/realtek/src/core/option/rtw_opt_skbuf.c
#SRC_C += ../../../component/common/api/wifi_interactive_mode.c
#SDRAM
DRAM_C += ../../../component/common/api/platform/stdlib_patch.c
#SDRAM - polarssl
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/aes.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/aesni.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/arc4.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/asn1parse.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/asn1write.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/base64.c
SRC_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/bignum.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/blowfish.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/camellia.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ccm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/certs.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/cipher.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/cipher_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ctr_drbg.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/debug.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/des.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/dhm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecp.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecp_curves.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecdh.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ecdsa.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/entropy.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/entropy_poll.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/error.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/gcm.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/havege.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/hmac_drbg.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md2.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md4.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/md5.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/memory_buffer_alloc.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/net.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/oid.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/padlock.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pbkdf2.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pem.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs5.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs11.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkcs12.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pk.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pk_wrap.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkparse.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/pkwrite.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/platform.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ripemd160.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/rsa.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha1.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha256.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/sha512.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_cache.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_ciphersuites.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_cli.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_srv.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/ssl_tls.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/threading.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/timing.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/version.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/version_features.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_crt.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_crl.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_csr.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509_create.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509write_crt.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/x509write_csr.c
DRAM_C += ../../../component/common/network/ssl/polarssl-1.3.8/library/xtea.c
#SDRAM - ssl_ram_map
DRAM_C += ../../../component/common/network/ssl/ssl_ram_map/rom/rom_ssl_ram_map.c
DRAM_C += ../../../component/common/network/ssl/ssl_ram_map/ssl_ram_map.c
#SDRAM - wigadget
DRAM_C += ../../../component/common/application/wigadget/cloud_link.c
DRAM_C += ../../../component/common/application/wigadget/shtc1.c
DRAM_C += ../../../component/common/application/wigadget/wigadget.c
#utilities
SRC_C += ../../../component/common/utilities/cJSON.c
SRC_C += ../../../component/common/utilities/http_client.c
SRC_C += ../../../component/common/utilities/uart_socket.c
SRC_C += ../../../component/common/utilities/webserver.c
SRC_C += ../../../component/common/utilities/xml.c
#utilities - example
SRC_C += ../../../component/common/example/example_entry.c
SRC_C += ../../../component/common/example/uart_atcmd/example_uart_atcmd.c
#utilities - FatFS
SRC_C += ../../../component/common/file_system/fatfs/fatfs_ext/src/ff_driver.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/diskio.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/ff.c
SRC_C += ../../../component/common/file_system/fatfs/r0.10c/src/option/ccsbcs.c
SRC_C += ../../../component/common/file_system/fatfs/disk_if/src/sdcard.c
#utilities - xmodme update
SRC_C += ../../../component/common/application/xmodem/uart_fw_update.c
#user
SRC_C += ../src/main.c
# Generate obj list
# -------------------------------------------------------------------
SRC_O = $(patsubst %.c,%.o,$(SRC_C))
DRAM_O = $(patsubst %.c,%.o,$(DRAM_C))
SRC_C_LIST = $(notdir $(SRC_C)) $(notdir $(DRAM_C))
OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST)))
DEPENDENCY_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.d,$(SRC_C_LIST)))
# Compile options
# -------------------------------------------------------------------
CFLAGS =
CFLAGS += -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK
CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -w -O2 -Wno-pointer-sign -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -mcpu=cortex-m3 -DF_CPU=166000000L -std=gnu99 -fsigned-char
LFLAGS =
LFLAGS += -mcpu=cortex-m3 -mthumb -g --specs=nano.specs -nostartfiles -Wl,-Map=$(BIN_DIR)/application.map -Os -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning
LIBFLAGS =
all: LIBFLAGS += -L../../../component/soc/realtek/8195a/misc/bsp/lib/common/GCC/ -l_platform -l_wlan -l_p2p -l_wps -l_rtlstd -l_websocket -l_xmodem -lm -lc -lnosys -lgcc
mp: LIBFLAGS += -L../../../component/soc/realtek/8195a/misc/bsp/lib/common/GCC/ -l_platform -l_wlan_mp -l_p2p -l_wps -l_rtlstd -l_websocket -l_xmodem -lm -lc -lnosys -lgcc
RAMALL_BIN =
OTA_BIN =
all: RAMALL_BIN = ram_all.bin
all: OTA_BIN = ota.bin
mp: RAMALL_BIN = ram_all_mp.bin
mp: OTA_BIN = ota_mp.bin
# Compile
# -------------------------------------------------------------------
.PHONY: application
application: prerequirement build_info $(SRC_O) $(DRAM_O)
@$(LD) $(LFLAGS) -o $(BIN_DIR)/$(TARGET).axf $(OBJ_LIST) $(OBJ_DIR)/ram_1.r.o $(LIBFLAGS) -T./rlx8195A-symbol-v02-img2.ld
@$(OBJDUMP) -d $(BIN_DIR)/$(TARGET).axf > $(BIN_DIR)/$(TARGET).asm
# Manipulate Image
# -------------------------------------------------------------------
.PHONY: manipulate_images
manipulate_images:
@echo ===========================================================
@echo Image manipulating
@echo ===========================================================
@$(NM) $(BIN_DIR)/$(TARGET).axf | sort > $(BIN_DIR)/$(TARGET).nmap
@$(OBJCOPY) -j .image2.start.table -j .ram_image2.text -j .ram_image2.rodata -j .ram.data -j .sdr_text -j .sdr_rodata -j .sdr_data -Obinary $(BIN_DIR)/$(TARGET).axf $(BIN_DIR)/ram_2.bin
# $(OBJCOPY) -j .sdr_text -j .sdr_rodata -j .sdr_data -Obinary $(BIN_DIR)/$(TARGET).axf $(BIN_DIR)/sdram.bin
@cp ../../../component/soc/realtek/8195a/misc/bsp/image/ram_1.p.bin $(BIN_DIR)/ram_1.p.bin
@chmod 777 $(BIN_DIR)/ram_1.p.bin
@chmod +rx $(PICK) $(CHKSUM) $(PAD)
@$(PICK) 0x`grep __ram_image2_text_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __ram_image2_text_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/ram_2.bin $(BIN_DIR)/ram_2.p.bin body+reset_offset+sig
@$(PICK) 0x`grep __ram_image2_text_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __ram_image2_text_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/ram_2.bin $(BIN_DIR)/ram_2.ns.bin body+reset_offset
# @$(PICK) 0x`grep __sdram_data_start__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` 0x`grep __sdram_data_end__ $(BIN_DIR)/$(TARGET).nmap | gawk '{print $$1}'` $(BIN_DIR)/sdram.bin $(BIN_DIR)/ram_3.p.bin body+reset_offset
@$(PAD) 44k 0xFF $(BIN_DIR)/ram_1.p.bin
@cat $(BIN_DIR)/ram_1.p.bin > $(BIN_DIR)/$(RAMALL_BIN)
@chmod 777 $(BIN_DIR)/$(RAMALL_BIN)
@cat $(BIN_DIR)/ram_2.p.bin >> $(BIN_DIR)/$(RAMALL_BIN)
# if [ -s $(BIN_DIR)/sdram.bin ]; then cat $(BIN_DIR)/ram_3.p.bin >> $(BIN_DIR)/$(RAMALL_BIN); fi
@cat $(BIN_DIR)/ram_2.ns.bin > $(BIN_DIR)/$(OTA_BIN)
@chmod 777 $(BIN_DIR)/$(OTA_BIN)
# if [ -s $(BIN_DIR)/sdram.bin ]; then cat $(BIN_DIR)/ram_3.p.bin >> $(BIN_DIR)/$(OTA_BIN); fi
@$(CHKSUM) $(BIN_DIR)/$(OTA_BIN) || true
@rm $(BIN_DIR)/ram_*.p.bin $(BIN_DIR)/ram_*.ns.bin
# Generate build info
# -------------------------------------------------------------------
.PHONY: build_info
build_info:
@echo \#define UTS_VERSION \"`date +%Y/%m/%d-%T`\" > .ver
@echo \#define RTL8195AFW_COMPILE_TIME \"`date +%Y/%m/%d-%T`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_DATE \"`date +%Y%m%d`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_BY \"`id -u -n`\" >> .ver
@echo \#define RTL8195AFW_COMPILE_HOST \"`$(HOSTNAME_APP)`\" >> .ver
@if [ -x /bin/dnsdomainname ]; then \
echo \#define RTL8195AFW_COMPILE_DOMAIN \"`dnsdomainname`\"; \
elif [ -x /bin/domainname ]; then \
echo \#define RTL8195AFW_COMPILE_DOMAIN \"`domainname`\"; \
else \
echo \#define RTL8195AFW_COMPILE_DOMAIN ; \
fi >> .ver
@echo \#define RTL195AFW_COMPILER \"gcc `$(CC) $(CFLAGS) -dumpversion | tr --delete '\r'`\" >> .ver
@mv -f .ver ../../../project/realtek_ameba1_va0_example/inc/$@.h
.PHONY: prerequirement
prerequirement:
@echo ===========================================================
@echo Build $(TARGET)
@echo ===========================================================
@mkdir -p $(OBJ_DIR)
@mkdir -p $(BIN_DIR)
@cp ../../../component/soc/realtek/8195a/misc/bsp/image/ram_1.r.bin $(OBJ_DIR)/ram_1.r.bin
@chmod 777 $(OBJ_DIR)/ram_1.r.bin
@$(OBJCOPY) --rename-section .data=.loader.data,contents,alloc,load,readonly,data -I binary -O elf32-littlearm -B arm $(OBJ_DIR)/ram_1.r.bin $(OBJ_DIR)/ram_1.r.o
$(SRC_O): %.o : %.c
@echo $<
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -MM -MT $@ -MF $(OBJ_DIR)/$(notdir $(patsubst %.o,%.d,$@))
@cp $@ $(OBJ_DIR)/$(notdir $@)
@chmod 777 $(OBJ_DIR)/$(notdir $@)
$(DRAM_O): %.o : %.c
@echo $<
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
@$(OBJCOPY) --prefix-alloc-sections .sdram $@
@$(CC) $(CFLAGS) $(INCLUDES) -c $< -MM -MT $@ -MF $(OBJ_DIR)/$(notdir $(patsubst %.o,%.d,$@))
@cp $@ $(OBJ_DIR)/$(notdir $@)
@chmod 777 $(OBJ_DIR)/$(notdir $@)
-include $(DEPENDENCY_LIST)
# Generate build info
# -------------------------------------------------------------------
#ifeq (setup,$(firstword $(MAKECMDGOALS)))
# # use the rest as arguments for "run"
# RUN_ARGS := $(wordlist 2,$(words $(MAKECMDGOALS)),$(MAKECMDGOALS))
# # ...and turn them into do-nothing targets
# $(eval $(RUN_ARGS):;@:)
#endif
.PHONY: setup
setup:
@echo "----------------"
@echo Setup $(GDB_SERVER)
@echo "----------------"
ifeq ($(GDB_SERVER), openocd)
cp -p $(FLASH_TOOLDIR)/rtl_gdb_debug_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_ramdebug_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_flash_write_openocd.txt $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
else
cp -p $(FLASH_TOOLDIR)/rtl_gdb_debug_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_ramdebug_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
cp -p $(FLASH_TOOLDIR)/rtl_gdb_flash_write_jlink.txt $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
endif
.PHONY: flashburn
flashburn:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
endif
@cp $(FLASH_TOOLDIR)/target_NORMALB.axf $(FLASH_TOOLDIR)/target_NORMAL.axf
@chmod 777 ./application/Debug/bin/ram_all.bin $(FLASH_TOOLDIR)/target_NORMAL.axf
$(file > fwsize.gdb,set $$RamFileSize = $(shell printf '%d' $$(( $$(stat --printf="%s" $(BIN_DIR)/ram_all.bin) )) ))
# chmod +rx $(FLASH_TOOLDIR)/SetupGDB_NORMAL.sh
# $(FLASH_TOOLDIR)/SetupGDB_NORMAL.sh
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_flash_write.txt
.PHONY: debug
debug:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_debug.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
cmd /c start $(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
else
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_debug.txt
endif
.PHONY: ramdebug
ramdebug:
@if [ ! -f $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt ] ; then echo Please do \"make setup GDB_SERVER=[jlink or openocd]\" first; echo && false ; fi
ifneq ($(findstring Linux, $(OS)), Linux)
$(FLASH_TOOLDIR)/Check_Jtag.sh
cmd /c start $(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
else
$(GDB) -x $(FLASH_TOOLDIR)/rtl_gdb_ramdebug.txt
endif
.PHONY: clean
clean:
@rm -rf $(TARGET)
@rm -f $(SRC_O) $(DRAM_O)
@rm -f $(patsubst %.o,%.d,$(SRC_O)) $(patsubst %.o,%.d,$(DRAM_O))
.PHONY: clean_all
clean_all:
rm -rf $(ARM_GCC_TOOLCHAIN)
rm -rf $(TARGET)
rm -f $(SRC_O) $(DRAM_O)
rm -f $(patsubst %.o,%.d,$(SRC_O)) $(patsubst %.o,%.d,$(DRAM_O))

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project/realtek_ameba1_va0_example/GCC-RELEASE/export-rom_v02.txt Normal file
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@ -0,0 +1,646 @@
SECTIONS
{
__vectors_table = 0x0;
Reset_Handler = 0x101;
NMI_Handler = 0x109;
HardFault_Handler = 0x10d;
MemManage_Handler = 0x121;
BusFault_Handler = 0x125;
UsageFault_Handler = 0x129;
HalLogUartInit = 0x201;
HalSerialPutcRtl8195a = 0x2d9;
HalSerialGetcRtl8195a = 0x309;
HalSerialGetIsrEnRegRtl8195a = 0x329;
HalSerialSetIrqEnRegRtl8195a = 0x335;
HalCpuClkConfig = 0x341;
HalGetCpuClk = 0x355;
HalRomInfo = 0x39d;
HalGetRomInfo = 0x3b5;
HalResetVsr = 0x3c5;
HalDelayUs = 0x899;
HalNMIHandler = 0x8e1;
HalHardFaultHandler = 0x911;
HalMemManageHandler = 0xc09;
HalBusFaultHandler = 0xc39;
HalUsageFaultHandler = 0xc69;
HalUart0PinCtrlRtl8195A = 0xcfd;
HalUart1PinCtrlRtl8195A = 0xdc9;
HalUart2PinCtrlRtl8195A = 0xe9d;
HalSPI0PinCtrlRtl8195A = 0xf75;
HalSPI1PinCtrlRtl8195A = 0x1015;
HalSPI2PinCtrlRtl8195A = 0x10e5;
HalSPI0MCSPinCtrlRtl8195A = 0x11b5;
HalI2C0PinCtrlRtl8195A = 0x1275;
HalI2C1PinCtrlRtl8195A = 0x1381;
HalI2C2PinCtrlRtl8195A = 0x1459;
HalI2C3PinCtrlRtl8195A = 0x1529;
HalI2S0PinCtrlRtl8195A = 0x1639;
HalI2S1PinCtrlRtl8195A = 0x176d;
HalPCM0PinCtrlRtl8195A = 0x1845;
HalPCM1PinCtrlRtl8195A = 0x1949;
HalSDIODPinCtrlRtl8195A = 0x1a1d;
HalSDIOHPinCtrlRtl8195A = 0x1a6d;
HalMIIPinCtrlRtl8195A = 0x1ab9;
HalWLLEDPinCtrlRtl8195A = 0x1b51;
HalWLANT0PinCtrlRtl8195A = 0x1c0d;
HalWLANT1PinCtrlRtl8195A = 0x1c61;
HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5;
HalWLBTCMDPinCtrlRtl8195A = 0x1d05;
HalNFCPinCtrlRtl8195A = 0x1d59;
HalPWM0PinCtrlRtl8195A = 0x1da9;
HalPWM1PinCtrlRtl8195A = 0x1ead;
HalPWM2PinCtrlRtl8195A = 0x1fb5;
HalPWM3PinCtrlRtl8195A = 0x20b1;
HalETE0PinCtrlRtl8195A = 0x21b9;
HalETE1PinCtrlRtl8195A = 0x22c1;
HalETE2PinCtrlRtl8195A = 0x23c9;
HalETE3PinCtrlRtl8195A = 0x24d1;
HalEGTIMPinCtrlRtl8195A = 0x25d9;
HalSPIFlashPinCtrlRtl8195A = 0x2679;
HalSDRPinCtrlRtl8195A = 0x2725;
HalJTAGPinCtrlRtl8195A = 0x280d;
HalTRACEPinCtrlRtl8195A = 0x2861;
HalLOGUartPinCtrlRtl8195A = 0x28b9;
HalLOGUartIRPinCtrlRtl8195A = 0x291d;
HalSICPinCtrlRtl8195A = 0x2981;
HalEEPROMPinCtrlRtl8195A = 0x29d9;
HalDEBUGPinCtrlRtl8195A = 0x2a31;
HalPinCtrlRtl8195A = 0x2b39;
SpicRxCmdRtl8195A = 0x2e5d;
SpicWaitBusyDoneRtl8195A = 0x2ea5;
SpicGetFlashStatusRtl8195A = 0x2eb5;
SpicWaitWipDoneRtl8195A = 0x2f55;
SpicTxCmdRtl8195A = 0x2f6d;
SpicSetFlashStatusRtl8195A = 0x2fc1;
SpicCmpDataForCalibrationRtl8195A = 0x3049;
SpicLoadInitParaFromClockRtl8195A = 0x3081;
SpicInitRtl8195A = 0x30e5;
SpicEraseFlashRtl8195A = 0x31bd;
SpiFlashApp = 0x3279;
HalPeripheralIntrHandle = 0x33b5;
HalSysOnIntrHandle = 0x3439;
HalWdgIntrHandle = 0x3485;
HalTimer0IntrHandle = 0x34d5;
HalTimer1IntrHandle = 0x3525;
HalI2C3IntrHandle = 0x3575;
HalTimer2To7IntrHandle = 0x35c5;
HalSpi0IntrHandle = 0x3615;
HalGpioIntrHandle = 0x3665;
HalUart0IntrHandle = 0x36b5;
HalSpiFlashIntrHandle = 0x3705;
HalUsbOtgIntrHandle = 0x3755;
HalSdioHostIntrHandle = 0x37a5;
HalI2s0OrPcm0IntrHandle = 0x37f5;
HalI2s1OrPcm1IntrHandle = 0x3845;
HalWlDmaIntrHandle = 0x3895;
HalWlProtocolIntrHandle = 0x38e5;
HalCryptoIntrHandle = 0x3935;
HalGmacIntrHandle = 0x3985;
HalGdma0Ch0IntrHandle = 0x39d5;
HalGdma0Ch1IntrHandle = 0x3a25;
HalGdma0Ch2IntrHandle = 0x3a75;
HalGdma0Ch3IntrHandle = 0x3ac5;
HalGdma0Ch4IntrHandle = 0x3b15;
HalGdma0Ch5IntrHandle = 0x3b65;
HalGdma1Ch0IntrHandle = 0x3bb5;
HalGdma1Ch1IntrHandle = 0x3c05;
HalGdma1Ch2IntrHandle = 0x3c55;
HalGdma1Ch3IntrHandle = 0x3ca5;
HalGdma1Ch4IntrHandle = 0x3cf5;
HalGdma1Ch5IntrHandle = 0x3d45;
HalSdioDeviceIntrHandle = 0x3d95;
VectorTableInitRtl8195A = 0x3de5;
VectorTableInitForOSRtl8195A = 0x4019;
VectorIrqRegisterRtl8195A = 0x4029;
VectorIrqUnRegisterRtl8195A = 0x4091;
VectorIrqEnRtl8195A = 0x40f1;
VectorIrqDisRtl8195A = 0x418d;
_UartRxDmaIrqHandle = 0x422d;
HalRuartPutCRtl8195a = 0x4281;
HalRuartGetCRtl8195a = 0x429d;
HalRuartRTSCtrlRtl8195a = 0x42bd;
HalRuartGetDebugValueRtl8195a = 0x42e1;
HalRuartGetIMRRtl8195a = 0x43e1;
HalRuartSetIMRRtl8195a = 0x442d;
_UartIrqHandle = 0x4465;
HalRuartDmaInitRtl8195a = 0x4681;
HalRuartIntDisableRtl8195a = 0x4845;
HalRuartDeInitRtl8195a = 0x4855;
HalRuartIntEnableRtl8195a = 0x4985;
_UartTxDmaIrqHandle = 0x4995;
HalRuartRegIrqRtl8195a = 0x49d1;
HalRuartAdapterLoadDefRtl8195a = 0x4a4d;
HalRuartTxGdmaLoadDefRtl8195a = 0x4add;
HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9;
RuartLock = 0x4cc9;
RuartUnLock = 0x4ced;
HalRuartIntSendRtl8195a = 0x4d09;
HalRuartDmaSendRtl8195a = 0x4e35;
HalRuartStopSendRtl8195a = 0x4f89;
HalRuartIntRecvRtl8195a = 0x504d;
HalRuartDmaRecvRtl8195a = 0x51ad;
HalRuartStopRecvRtl8195a = 0x52cd;
RuartIsTimeout = 0x5385;
HalRuartSendRtl8195a = 0x53b1;
HalRuartRecvRtl8195a = 0x5599;
RuartResetRxFifoRtl8195a = 0x5751;
HalRuartResetRxFifoRtl8195a = 0x5775;
HalRuartInitRtl8195a = 0x5829;
HalGdmaOnOffRtl8195a = 0x5df1;
HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d;
HalGdmaChEnRtl8195a = 0x5e51;
HalGdmaChDisRtl8195a = 0x5e6d;
HalGdamChInitRtl8195a = 0x5e91;
HalGdmaChSetingRtl8195a = 0x5ebd;
HalGdmaChBlockSetingRtl8195a = 0x000060dd;
HalGdmaChIsrCleanRtl8195a = 0x6419;
HalGdmaChCleanAutoSrcRtl8195a = 0x64a1;
HalGdmaChCleanAutoDstRtl8195a = 0x6501;
HalEFUSEPowerSwitch8195AROM = 0x6561;
HALEFUSEOneByteReadROM = 0x65f9;
HALEFUSEOneByteWriteROM = 0x6699;
__rtl_memcmpb_v1_00 = 0x681d;
__rtl_random_v1_00 = 0x6861;
__rtl_align_to_be32_v1_00 = 0x6881;
__rtl_memsetw_v1_00 = 0x6899;
__rtl_memsetb_v1_00 = 0x68ad;
__rtl_memcpyw_v1_00 = 0x68bd;
__rtl_memcpyb_v1_00 = 0x68dd;
__rtl_memDump_v1_00 = 0x68f5;
__rtl_AES_set_encrypt_key = 0x6901;
__rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11;
__rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95;
__rtl_cryptoEngine_init_v1_00 = 0x6ea9;
__rtl_cryptoEngine_exit_v1_00 = 0x7055;
__rtl_cryptoEngine_reset_v1_00 = 0x70b1;
__rtl_cryptoEngine_v1_00 = 0x70ed;
__rtl_crypto_cipher_init_v1_00 = 0x7c69;
__rtl_crypto_cipher_encrypt_v1_00 = 0x7c89;
__rtl_crypto_cipher_decrypt_v1_00 = 0x7cad;
HalSsiPinmuxEnableRtl8195a = 0x7cd5;
HalSsiEnableRtl8195a = 0x7e45;
HalSsiDisableRtl8195a = 0x7ef9;
HalSsiLoadSettingRtl8195a = 0x7fad;
HalSsiSetInterruptMaskRtl8195a = 0x8521;
HalSsiGetInterruptMaskRtl8195a = 0x85c9;
HalSsiSetSclkPolarityRtl8195a = 0x863d;
HalSsiSetSclkPhaseRtl8195a = 0x8715;
HalSsiWriteRtl8195a = 0x87e9;
HalSsiSetDeviceRoleRtl8195a = 0x8861;
HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9;
HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941;
HalSsiReadRtl8195a = 0x89b9;
HalSsiGetRxFifoLevelRtl8195a = 0x8a2d;
HalSsiGetTxFifoLevelRtl8195a = 0x8aa5;
HalSsiGetStatusRtl8195a = 0x8b1d;
HalSsiWriteableRtl8195a = 0x8b91;
HalSsiReadableRtl8195a = 0x8c09;
HalSsiBusyRtl8195a = 0x8c81;
HalSsiReadInterruptRtl8195a = 0x8cf9;
HalSsiWriteInterruptRtl8195a = 0x8efd;
HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009;
HalSsiGetInterruptStatusRtl8195a = 0x90d9;
HalSsiInterruptEnableRtl8195a = 0x914d;
HalSsiInterruptDisableRtl8195a = 0x9299;
HalSsiGetRawInterruptStatusRtl8195a = 0x93e9;
HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d;
HalSsiInitRtl8195a = 0x94d1;
_SsiReadInterrupt = 0x9ba5;
_SsiWriteInterrupt = 0x9db1;
_SsiIrqHandle = 0x9eb1;
HalI2CWrite32 = 0xa061;
HalI2CRead32 = 0xa09d;
HalI2CDeInit8195a = 0xa0dd;
HalI2CSendRtl8195a = 0xa1f1;
HalI2CReceiveRtl8195a = 0xa25d;
HalI2CEnableRtl8195a = 0xa271;
HalI2CIntrCtrl8195a = 0xa389;
HalI2CReadRegRtl8195a = 0xa3a1;
HalI2CWriteRegRtl8195a = 0xa3b1;
HalI2CSetCLKRtl8195a = 0xa3c5;
HalI2CMassSendRtl8195a = 0xa6e9;
HalI2CClrIntrRtl8195a = 0xa749;
HalI2CClrAllIntrRtl8195a = 0xa761;
HalI2CInit8195a = 0xa775;
HalI2CDMACtrl8195a = 0xaa31;
RtkI2CIoCtrl = 0xaa61;
RtkI2CPowerCtrl = 0xaa65;
HalI2COpInit = 0xaa69;
I2CIsTimeout = 0xac65;
I2CTXGDMAISRHandle = 0xb435;
I2CRXGDMAISRHandle = 0xb4c1;
RtkI2CIrqInit = 0xb54d;
RtkI2CIrqDeInit = 0xb611;
RtkI2CPinMuxInit = 0xb675;
RtkI2CPinMuxDeInit = 0xb7c9;
RtkI2CDMAInit = 0xb955;
RtkI2CInit = 0xbc95;
RtkI2CDMADeInit = 0xbdad;
RtkI2CDeInit = 0xbe4d;
RtkI2CSendUserAddr = 0xbee5;
RtkI2CSend = 0xc07d;
RtkI2CLoadDefault = 0xce51;
RtkSalI2COpInit = 0xcf21;
HalI2SWrite32 = 0xcf65;
HalI2SRead32 = 0xcf85;
HalI2SDeInitRtl8195a = 0xcfa9;
HalI2STxRtl8195a = 0xcfc9;
HalI2SRxRtl8195a = 0xd011;
HalI2SEnableRtl8195a = 0xd05d;
HalI2SIntrCtrlRtl8195a = 0xd0b1;
HalI2SReadRegRtl8195a = 0xd0d1;
HalI2SClrIntrRtl8195a = 0xd0dd;
HalI2SClrAllIntrRtl8195a = 0xd0fd;
HalI2SInitRtl8195a = 0xd11d;
GPIO_GetIPPinName_8195a = 0xd2e5;
GPIO_GetChipPinName_8195a = 0xd331;
GPIO_PullCtrl_8195a = 0xd39d;
GPIO_FuncOn_8195a = 0xd421;
GPIO_FuncOff_8195a = 0xd481;
GPIO_Int_Mask_8195a = 0xd4e9;
GPIO_Int_SetType_8195a = 0xd511;
HAL_GPIO_IrqHandler_8195a = 0xd5fd;
HAL_GPIO_MbedIrqHandler_8195a = 0xd645;
HAL_GPIO_UserIrqHandler_8195a = 0xd6a1;
HAL_GPIO_IntCtrl_8195a = 0xd6cd;
HAL_GPIO_Init_8195a = 0xd805;
HAL_GPIO_DeInit_8195a = 0xdac1;
HAL_GPIO_ReadPin_8195a = 0xdbd1;
HAL_GPIO_WritePin_8195a = 0xdc91;
HAL_GPIO_RegIrq_8195a = 0xddad;
HAL_GPIO_UnRegIrq_8195a = 0xddf5;
HAL_GPIO_UserRegIrq_8195a = 0xde15;
HAL_GPIO_UserUnRegIrq_8195a = 0xdef9;
HAL_GPIO_MaskIrq_8195a = 0xdfc1;
HAL_GPIO_UnMaskIrq_8195a = 0xe061;
HAL_GPIO_IntDebounce_8195a = 0xe101;
HAL_GPIO_GetIPPinName_8195a = 0xe1c1;
HAL_GPIO_PullCtrl_8195a = 0xe1c9;
DumpForOneBytes = 0xe259;
CmdRomHelp = 0xe419;
CmdWriteWord = 0xe491;
CmdDumpHelfWord = 0xe505;
CmdDumpWord = 0xe5f1;
CmdDumpByte = 0xe6f5;
CmdSpiFlashTool = 0xe751;
GetRomCmdNum = 0xe7a9;
CmdWriteByte = 0xe7ad;
Isspace = 0xe7ed;
Strtoul = 0xe801;
ArrayInitialize = 0xe8b1;
GetArgc = 0xe8c9;
GetArgv = 0xe8f9;
UartLogCmdExecute = 0xe95d;
UartLogShowBackSpace = 0xe9fd;
UartLogRecallOldCmd = 0xea39;
UartLogHistoryCmd = 0xea71;
UartLogCmdChk = 0xeadd;
UartLogIrqHandle = 0xebf5;
RtlConsolInit = 0xecc5;
RtlConsolTaskRom = 0xed49;
RtlExitConsol = 0xed79;
RtlConsolRom = 0xedcd;
HalTimerOpInit = 0xee0d;
HalTimerIrq2To7Handle = 0xee59;
HalGetTimerIdRtl8195a = 0xef09;
HalTimerInitRtl8195a = 0xef3d;
HalTimerDisRtl8195a = 0xf069;
HalTimerEnRtl8195a = 0xf089;
HalTimerReadCountRtl8195a = 0xf0a9;
HalTimerIrqClearRtl8195a = 0xf0bd;
HalTimerDumpRegRtl8195a = 0xf0d1;
VSprintf = 0xf129;
DiagPrintf = 0xf39d;
DiagSPrintf = 0xf3b9;
DiagSnPrintf = 0xf3d1;
prvDiagPrintf = 0xf3ed;
prvDiagSPrintf = 0xf40d;
_memcmp = 0xf429;
_memcpy = 0xf465;
_memset = 0xf511;
Rand = 0xf585;
_strncpy = 0xf60d;
_strcpy = 0xf629;
prvStrCpy = 0xf639;
_strlen = 0xf651;
_strnlen = 0xf669;
prvStrLen = 0xf699;
_strcmp = 0xf6b1;
_strncmp = 0xf6d1;
prvStrCmp = 0xf719;
StrUpr = 0xf749;
prvAtoi = 0xf769;
prvStrStr = 0xf7bd;
_strsep = 0xf7d5;
skip_spaces = 0xf815;
skip_atoi = 0xf831;
_parse_integer_fixup_radix = 0xf869;
_parse_integer = 0xf8bd;
simple_strtoull = 0xf915;
simple_strtoll = 0xf945;
simple_strtoul = 0xf965;
simple_strtol = 0xf96d;
_vsscanf = 0xf985;
_sscanf = 0xff71;
div_u64 = 0xff91;
div_s64 = 0xff99;
div_u64_rem = 0xffa1;
div_s64_rem = 0xffb1;
_strpbrk = 0xffc1;
_strchr = 0xffed;
aes_set_key = 0x10005;
aes_encrypt = 0x103d1;
aes_decrypt = 0x114a5;
AES_WRAP = 0x125c9;
AES_UnWRAP = 0x12701;
crc32_get = 0x12861;
arc4_byte = 0x12895;
rt_arc4_init = 0x128bd;
rt_arc4_crypt = 0x12901;
rt_md5_init = 0x131c1;
rt_md5_append = 0x131f5;
rt_md5_final = 0x1327d;
rt_md5_hmac = 0x132d5;
rtw_get_bit_value_from_ieee_value = 0x13449;
rtw_is_cckrates_included = 0x13475;
rtw_is_cckratesonly_included = 0x134b5;
rtw_check_network_type = 0x134dd;
rtw_set_fixed_ie = 0x1350d;
rtw_set_ie = 0x1352d;
rtw_get_ie = 0x1355d;
rtw_set_supported_rate = 0x13591;
rtw_get_rateset_len = 0x13611;
rtw_get_wpa_ie = 0x1362d;
rtw_get_wpa2_ie = 0x136c9;
rtw_get_wpa_cipher_suite = 0x13701;
rtw_get_wpa2_cipher_suite = 0x13769;
rtw_parse_wpa_ie = 0x137d1;
rtw_parse_wpa2_ie = 0x138ad;
rtw_get_sec_ie = 0x13965;
rtw_get_wps_ie = 0x13a15;
rtw_get_wps_attr = 0x13a99;
rtw_get_wps_attr_content = 0x13b49;
rtw_ieee802_11_parse_elems = 0x13b91;
str_2char2num = 0x13d9d;
key_2char2num = 0x13db9;
convert_ip_addr = 0x13dd1;
rom_psk_PasswordHash = 0x13e9d;
rom_psk_CalcGTK = 0x13ed5;
rom_psk_CalcPTK = 0x13f69;
wep_80211_encrypt = 0x14295;
wep_80211_decrypt = 0x142f5;
tkip_micappendbyte = 0x14389;
rtw_secmicsetkey = 0x143d9;
rtw_secmicappend = 0x14419;
rtw_secgetmic = 0x14435;
rtw_seccalctkipmic = 0x1449d;
tkip_phase1 = 0x145a5;
tkip_phase2 = 0x14725;
tkip_80211_encrypt = 0x14941;
tkip_80211_decrypt = 0x149d5;
aes1_encrypt = 0x14a8d;
aesccmp_construct_mic_iv = 0x14c65;
aesccmp_construct_mic_header1 = 0x14ccd;
aesccmp_construct_mic_header2 = 0x14d21;
aesccmp_construct_ctr_preload = 0x14db5;
aes_80211_encrypt = 0x14e29;
aes_80211_decrypt = 0x151ad;
_sha1_process_message_block = 0x155b9;
_sha1_pad_message = 0x15749;
rt_sha1_init = 0x157e5;
rt_sha1_update = 0x15831;
rt_sha1_finish = 0x158a9;
rt_hmac_sha1 = 0x15909;
rom_aes_128_cbc_encrypt = 0x15a65;
rom_aes_128_cbc_decrypt = 0x15ae1;
rom_rijndaelKeySetupEnc = 0x15b5d;
rom_aes_decrypt_init = 0x15c39;
rom_aes_internal_decrypt = 0x15d15;
rom_aes_decrypt_deinit = 0x16071;
rom_aes_encrypt_init = 0x16085;
rom_aes_internal_encrypt = 0x1609d;
rom_aes_encrypt_deinit = 0x16451;
bignum_init = 0x17b35;
bignum_deinit = 0x17b61;
bignum_get_unsigned_bin_len = 0x17b81;
bignum_get_unsigned_bin = 0x17b85;
bignum_set_unsigned_bin = 0x17c21;
bignum_cmp = 0x17cd1;
bignum_cmp_d = 0x17cd5;
bignum_add = 0x17cfd;
bignum_sub = 0x17d0d;
bignum_mul = 0x17d1d;
bignum_exptmod = 0x17d2d;
WPS_realloc = 0x17d51;
os_zalloc = 0x17d99;
rom_hmac_sha256_vector = 0x17dc1;
rom_hmac_sha256 = 0x17ebd;
rom_sha256_vector = 0x18009;
phy_CalculateBitShift = 0x18221;
PHY_SetBBReg_8195A = 0x18239;
PHY_QueryBBReg_8195A = 0x18279;
ROM_odm_QueryRxPwrPercentage = 0x1829d;
ROM_odm_EVMdbToPercentage = 0x182bd;
ROM_odm_SignalScaleMapping_8195A = 0x182e5;
ROM_odm_FalseAlarmCounterStatistics = 0x183cd;
ROM_odm_SetEDCCAThreshold = 0x18721;
ROM_odm_SetTRxMux = 0x18749;
ROM_odm_SetCrystalCap = 0x18771;
ROM_odm_GetDefaultCrytaltalCap = 0x187d5;
ROM_ODM_CfoTrackingReset = 0x187e9;
ROM_odm_CfoTrackingFlow = 0x18811;
curve25519_donna = 0x1965d;
aes_test_alignment_detection = 0x1a391;
aes_mode_reset = 0x1a3ed;
aes_ecb_encrypt = 0x1a3f9;
aes_ecb_decrypt = 0x1a431;
aes_cbc_encrypt = 0x1a469;
aes_cbc_decrypt = 0x1a579;
aes_cfb_encrypt = 0x1a701;
aes_cfb_decrypt = 0x1a9e5;
aes_ofb_crypt = 0x1acc9;
aes_ctr_crypt = 0x1af7d;
aes_encrypt_key128 = 0x1b289;
aes_encrypt_key192 = 0x1b2a5;
aes_encrypt_key256 = 0x1b2c1;
aes_encrypt_key = 0x1b2e1;
aes_decrypt_key128 = 0x1b351;
aes_decrypt_key192 = 0x1b36d;
aes_decrypt_key256 = 0x1b389;
aes_decrypt_key = 0x1b3a9;
aes_init = 0x1b419;
CRYPTO_chacha_20 = 0x1b41d;
CRYPTO_poly1305_init = 0x1bc25;
CRYPTO_poly1305_update = 0x1bd09;
CRYPTO_poly1305_finish = 0x1bd8d;
rom_sha512_starts = 0x1ceb5;
rom_sha512_update = 0x1d009;
rom_sha512_finish = 0x1d011;
rom_sha512 = 0x1d261;
rom_sha512_hmac_starts = 0x1d299;
rom_sha512_hmac_update = 0x1d35d;
rom_sha512_hmac_finish = 0x1d365;
rom_sha512_hmac_reset = 0x1d3b5;
rom_sha512_hmac = 0x1d3d1;
rom_sha512_hkdf = 0x1d40d;
rom_ed25519_gen_keypair = 0x1d501;
rom_ed25519_gen_signature = 0x1d505;
rom_ed25519_verify_signature = 0x1d51d;
rom_ed25519_crypto_sign_seed_keypair = 0x1d521;
rom_ed25519_crypto_sign_detached = 0x1d579;
rom_ed25519_crypto_sign_verify_detached = 0x1d655;
rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d;
rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35;
rom_ed25519_ge_p3_tobytes = 0x207d5;
rom_ed25519_ge_scalarmult_base = 0x20821;
rom_ed25519_ge_tobytes = 0x209e1;
rom_ed25519_sc_muladd = 0x20a2d;
rom_ed25519_sc_reduce = 0x2603d;
__rtl_memchr_v1_00 = 0x28a4d;
__rtl_memcmp_v1_00 = 0x28ae1;
__rtl_memcpy_v1_00 = 0x28b49;
__rtl_memmove_v1_00 = 0x28bed;
__rtl_memset_v1_00 = 0x28cb5;
__rtl_strcat_v1_00 = 0x28d49;
__rtl_strchr_v1_00 = 0x28d91;
__rtl_strcmp_v1_00 = 0x28e55;
__rtl_strcpy_v1_00 = 0x28ec9;
__rtl_strlen_v1_00 = 0x28f15;
__rtl_strncat_v1_00 = 0x28f69;
__rtl_strncmp_v1_00 = 0x28fc5;
__rtl_strncpy_v1_00 = 0x2907d;
__rtl_strstr_v1_00 = 0x293cd;
__rtl_strsep_v1_00 = 0x2960d;
__rtl_strtok_v1_00 = 0x29619;
__rtl__strtok_r_v1_00 = 0x2962d;
__rtl_strtok_r_v1_00 = 0x29691;
__rtl_close_v1_00 = 0x29699;
__rtl_fstat_v1_00 = 0x296ad;
__rtl_isatty_v1_00 = 0x296c1;
__rtl_lseek_v1_00 = 0x296d5;
__rtl_open_v1_00 = 0x296e9;
__rtl_read_v1_00 = 0x296fd;
__rtl_write_v1_00 = 0x29711;
__rtl_sbrk_v1_00 = 0x29725;
__rtl_ltoa_v1_00 = 0x297bd;
__rtl_ultoa_v1_00 = 0x29855;
__rtl_dtoi_v1_00 = 0x298c5;
__rtl_dtoi64_v1_00 = 0x29945;
__rtl_dtoui_v1_00 = 0x299dd;
__rtl_ftol_v1_00 = 0x299e5;
__rtl_itof_v1_00 = 0x29a51;
__rtl_itod_v1_00 = 0x29ae9;
__rtl_i64tod_v1_00 = 0x29b79;
__rtl_uitod_v1_00 = 0x29c55;
__rtl_ftod_v1_00 = 0x29d2d;
__rtl_dtof_v1_00 = 0x29de9;
__rtl_uitof_v1_00 = 0x29e89;
__rtl_fadd_v1_00 = 0x29f65;
__rtl_fsub_v1_00 = 0x2a261;
__rtl_fmul_v1_00 = 0x2a559;
__rtl_fdiv_v1_00 = 0x2a695;
__rtl_dadd_v1_00 = 0x2a825;
__rtl_dsub_v1_00 = 0x2aed9;
__rtl_dmul_v1_00 = 0x2b555;
__rtl_ddiv_v1_00 = 0x2b8ad;
__rtl_dcmpeq_v1_00 = 0x2be4d;
__rtl_dcmplt_v1_00 = 0x2bebd;
__rtl_dcmpgt_v1_00 = 0x2bf51;
__rtl_dcmple_v1_00 = 0x2c049;
__rtl_fcmplt_v1_00 = 0x2c139;
__rtl_fcmpgt_v1_00 = 0x2c195;
__rtl_cos_f32_v1_00 = 0x2c229;
__rtl_sin_f32_v1_00 = 0x2c435;
__rtl_fabs_v1_00 = 0x2c639;
__rtl_fabsf_v1_00 = 0x2c641;
__rtl_dtoa_r_v1_00 = 0x2c77d;
__rom_mallocr_init_v1_00 = 0x2d7d1;
__rtl_free_r_v1_00 = 0x2d841;
__rtl_malloc_r_v1_00 = 0x2da31;
__rtl_realloc_r_v1_00 = 0x2df55;
__rtl_memalign_r_v1_00 = 0x2e331;
__rtl_valloc_r_v1_00 = 0x2e421;
__rtl_pvalloc_r_v1_00 = 0x2e42d;
__rtl_calloc_r_v1_00 = 0x2e441;
__rtl_cfree_r_v1_00 = 0x2e4a9;
__rtl_Balloc_v1_00 = 0x2e515;
__rtl_Bfree_v1_00 = 0x2e571;
__rtl_i2b_v1_00 = 0x2e585;
__rtl_multadd_v1_00 = 0x2e599;
__rtl_mult_v1_00 = 0x2e629;
__rtl_pow5mult_v1_00 = 0x2e769;
__rtl_hi0bits_v1_00 = 0x2e809;
__rtl_d2b_v1_00 = 0x2e845;
__rtl_lshift_v1_00 = 0x2e901;
__rtl_cmp_v1_00 = 0x2e9bd;
__rtl_diff_v1_00 = 0x2ea01;
__rtl_sread_v1_00 = 0x2eae9;
__rtl_seofread_v1_00 = 0x2eb39;
__rtl_swrite_v1_00 = 0x2eb3d;
__rtl_sseek_v1_00 = 0x2ebc1;
__rtl_sclose_v1_00 = 0x2ec11;
__rtl_sbrk_r_v1_00 = 0x2ec41;
__rtl_fflush_r_v1_00 = 0x2ef8d;
__rtl_vfprintf_r_v1_00 = 0x2f661;
__rtl_fpclassifyd = 0x30c15;
CpkClkTbl = 0x30c68;
ROM_IMG1_VALID_PATTEN = 0x30c80;
SpicCalibrationPattern = 0x30c88;
SpicInitCPUCLK = 0x30c98;
BAUDRATE = 0x30ca8;
OVSR = 0x30d1c;
DIV = 0x30d90;
OVSR_ADJ = 0x30e04;
__AES_rcon = 0x30e78;
__AES_Te4 = 0x30ea0;
I2CDmaChNo = 0x312a0;
UartLogRomCmdTable = 0x316a0;
_HalRuartOp = 0x31700;
_HalGdmaOp = 0x31760;
RTW_WPA_OUI_TYPE = 0x3540c;
WPA_CIPHER_SUITE_NONE = 0x35410;
WPA_CIPHER_SUITE_WEP40 = 0x35414;
WPA_CIPHER_SUITE_TKIP = 0x35418;
WPA_CIPHER_SUITE_CCMP = 0x3541c;
WPA_CIPHER_SUITE_WEP104 = 0x35420;
RSN_CIPHER_SUITE_NONE = 0x35424;
RSN_CIPHER_SUITE_WEP40 = 0x35428;
RSN_CIPHER_SUITE_TKIP = 0x3542c;
RSN_CIPHER_SUITE_CCMP = 0x35430;
RSN_CIPHER_SUITE_WEP104 = 0x35434;
RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444;
RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448;
RSN_VERSION_BSD = 0x3544c;
rom_wps_Te0 = 0x35988;
rom_wps_rcons = 0x35d88;
rom_wps_Td4s = 0x35d94;
rom_wps_Td0 = 0x35e94;
NewVectorTable = 0x10000000;
UserIrqFunTable = 0x10000100;
UserIrqDataTable = 0x10000200;
__rom_bss_start__ = 0x10000300;
CfgSysDebugWarn = 0x10000300;
CfgSysDebugInfo = 0x10000304;
CfgSysDebugErr = 0x10000308;
ConfigDebugWarn = 0x1000030c;
ConfigDebugInfo = 0x10000310;
ConfigDebugErr = 0x10000314;
HalTimerOp = 0x10000318;
GPIOState = 0x10000334;
gTimerRecord = 0x1000034c;
SSI_DBG_CONFIG = 0x10000350;
_pHAL_Gpio_Adapter = 0x10000354;
Timer2To7VectorTable = 0x10000358;
pUartLogCtl = 0x10000384;
UartLogBuf = 0x10000388;
UartLogCtl = 0x10000408;
UartLogHistoryBuf = 0x10000430;
ArgvArray = 0x100006ac;
rom_wlan_ram_map = 0x100006d4;
FalseAlmCnt = 0x100006e0;
ROMInfo = 0x10000720;
DM_CfoTrack = 0x10000738;
rom_libgloss_ram_map = 0x10000760;
__rtl_errno = 0x10000bc4;
_rtl_impure_ptr = 0x10001c60;
}

1
project/realtek_ameba1_va0_example/GCC-RELEASE/fwsize.gdb Normal file
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set $RamFileSize = 344948

77
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/Check_Jtag.sh Normal file
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#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
RLXSTS=$(ps -W | grep "rlx_probe_driver.exe" | grep -v "grep" | wc -l)
echo $RLXSTS
JLKSTS=$(ps -W | grep "JLinkGDBServer.exe" | grep -v "grep" | wc -l)
echo $JLKSTS
echo $CURRENT_UTILITY_DIR
#===============================================================================
#make the new string for being written
if [ $RLXSTS = 1 ]
then
echo "probe get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="#monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
else
if [ $JLKSTS = 1 ]
then
echo "jlink get"
#-------------------------------------------
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor reset 1"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
#===========================================
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
#echo $LINE_NUMBER
echo $DEFAULT_STR
STRLEN_DFT=$(expr length "$DEFAULT_STR")
DEFAULT_STR="monitor sleep 20"
echo $DEFAULT_STR
#-------------------------------------------
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
sed -i "$SED_PARA" $GDBSCPTFILE
fi
fi
#===============================================================================

20
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/SetupGDB_NORMAL.sh Normal file
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#!/bin/sh
#===============================================================================
CURRENT_UTILITY_DIR=$(pwd)
echo "..."
echo $CURRENT_UTILITY_DIR
RAMFILENAME="./application/Debug/bin/ram_all.bin"
echo $RAMFILENAME
#RAMFILENAME="ram_2.bin"
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
#===============================================================================
#get file size
RAM_FILE_SIZE=$(stat -c %s $RAMFILENAME)
RAM_FILE_SIZE_HEX=`echo "obase=16; $RAM_FILE_SIZE"|bc`
echo "size "$RAM_FILE_SIZE" --> 0x"$RAM_FILE_SIZE_HEX
echo "set \$RamFileSize = 0x$RAM_FILE_SIZE_HEX" > fwsize.gdb
exit

124
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/openocd/ameba1.cfg Normal file
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# Main file for Ameba1 series Cortex-M3 parts
#
# !!!!!!
#
set CHIPNAME rtl8195a
set CHIPSERIES ameba1
# Adapt based on what transport is active.
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
error "CHIPNAME not set. Please do not include ameba1.cfg directly."
}
if { [info exists CHIPSERIES] } {
# Validate chip series is supported
if { $CHIPSERIES != "ameba1" } {
error "Unsupported chip series specified."
}
set _CHIPSERIES $CHIPSERIES
} else {
error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
}
if { [info exists CPUTAPID] } {
# Allow user override
set _CPUTAPID $CPUTAPID
} else {
# Ameba1 use a Cortex M3 core.
if { $_CHIPSERIES == "ameba1" } {
if { [using_jtag] } {
set _CPUTAPID 0x4ba00477
} {
set _CPUTAPID 0x2ba01477
}
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at.
adapter_khz 1000
# delays on reset lines
adapter_nsrst_delay 200
if {[using_jtag]} {
jtag_ntrst_delay 200
}
# Ameba1 (Cortex M3 core) support SYSRESETREQ
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event reset-init {ameba1_init}
# Ameba1 SDRAM enable
proc ameba1_init { } {
# init System
mww 0x40000014 0x00000021
sleep 10
mww 0x40000304 0x1fc00002
sleep 10
mww 0x40000250 0x00000400
sleep 10
mww 0x40000340 0x00000000
sleep 10
mww 0x40000230 0x0000dcc4
sleep 10
mww 0x40000210 0x00011117
sleep 10
mww 0x40000210 0x00011157
sleep 10
mww 0x400002c0 0x00110011
sleep 10
mww 0x40000320 0xffffffff
sleep 10
# init SDRAM
mww 0x40000040 0x00fcc702
sleep 10
mdw 0x40000040
mww 0x40005224 0x00000001
sleep 10
mww 0x40005004 0x00000208
sleep 10
mww 0x40005008 0xffffd000
sleep 13
mww 0x40005020 0x00000022
sleep 13
mww 0x40005010 0x09006201
sleep 13
mww 0x40005014 0x00002611
sleep 13
mww 0x40005018 0x00068413
sleep 13
mww 0x4000501c 0x00000042
sleep 13
mww 0x4000500c 0x700 ;# set Idle
sleep 20
mww 0x40005000 0x1 ;# start init
sleep 100
mdw 0x40005000
mww 0x4000500c 0x600 ;# enter memory mode
sleep 30
mww 0x40005008 0x00000000 ;# 0xf00
;# mww 0x40005008 0x00000f00
sleep 3
mww 0x40000300 0x0006005e ;# 0x5e
;# mww 0x40000300 0x0000005e
sleep 3
}

BIN
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/ram_all.bin Normal file
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Binary file not shown.

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug_jlink.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

57
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_debug_openocd.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#skip sdram init, it has been init in openocd config
set {int}0x40000210=0x211157
#x /1xw 0x40000210
b main
continue
clear main
#Load the file
#lo

199
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

199
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write_jlink.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

198
project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_flash_write_openocd.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#set file path
set $BINFILE = "./application/Debug/bin/ram_all.bin"
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
#set JTAG and external SRAM
monitor reset init
monitor halt
monitor sleep 20
#===============================================================================
#Variables declaration (1)
#binary file size
set $RamFileSize = 0x0000
source fwsize.gdb
printf "-------------------------------\n"
printf "RamFileSize: %x\n",$RamFileSize
printf "-------------------------------\n"
#===============================================================================
set $FLASHDATBUFSIZE = 0x800
#===============================================================================
#define PERI_ON_BASE 0x40000000
set $PERI_ON_BASE = 0x40000000
#define REG_SOC_PERI_FUNC0_EN 0x0218
set $REG_SOC_PERI_FUNC0_EN = 0x0210
#define SPI_FLASH_BASE 0x4000000
set $SPI_FLASH_BASE = 0x98000000
#------------------------------------------------------------------
set $Temp = 0x0
#===============================================================================
#Load flash download file
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
#Load the file
lo
printf "Load flash controller.\n"
#===============================================================================
#Set for executing flash controller funciton
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
p /x $Temp
set $Temp = ($Temp | (0x01 << 27))
p /x $Temp
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
printf "....\n"
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
#===============================================================================
#Direct the startup wake function to flash program function
#the function pointer address
#set $testpointer = 0x200006b4
#set $testpointer2 = 0x200006b8
#set $FuntionPointer = 0x200006c4
#set $FPTemp = 0x200a08e9
#set {int}($FuntionPointer) = $FPTemp
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
#===============================================================================
#Load file
# restore filename [binary] bias start end
# Restore the contents of file filename into memory.
# The restore command can automatically recognize any known bfd file format, except for raw binary.
# To restore a raw binary file you must specify the optional keyword binary after the filename.
#===============================================================================
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
printf "LoopNum = %x\n", $LoopNum
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
printf "TailSize = %x\n", $TailSize
printf "global variables\n"
set $FLASHDATSRC = 0x0
set $FILESTARTADDR = 0X0
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
#b RtlFlashProgram:StartOfFlashBlockWrite
b rtl_flash_download.c:489
b rtl_flash_download.c:524
#b Rtl_flash_control.c:RtlFlashProgram
#continue to 489
c
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
set EraseMode=1
print EraseMode
set FirmwareSize=$RamFileSize
print FirmwareSize
#continue to 524
c
#printf "...\n"
set $FLASHDATSRC = FlashDatSrc
printf "FlashDatSrc:%x\n", $FLASHDATSRC
printf "FlashBlockWriteSize "
set FlashBlockWriteSize = $FLASHDATBUFSIZE
#p /x FlashBlockWriteSize
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
printf "FlashAddrForWrite"
set FlashAddrForWrite = 0x0
printf "Flash write start...\n"
set $LoopCnt = 0
while ($LoopCnt < $LoopNum)
p /x FlashAddrForWrite
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
printf "FILEENDADDR"
p /x $FILEENDADDR
set FlashBlockWriteSize = $FLASHDATBUFSIZE
set FlashAddrForWrite = $FILEENDADDR
set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
set $LoopCnt = $LoopCnt + 0x01
end
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
#set FlashAddrForWrite = $FILEENDADDR
#set $FILESTARTADDR = $FILEENDADDR
set $FILEENDADDR = $FILESTARTADDR + $TailSize
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
#Set complete flas
set FlashWriteComplete = 0x1
printf "dump for check\n"
set $LoopCnt = 0
set $dumpaddr = 0
set $dumpstartaddr = $SPI_FLASH_BASE
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
printf "start addr of dumping"
p /x $dumpstartaddr
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
delete
b rtl_flash_download.c:556
c
quit
#===============================================================================

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project/realtek_ameba1_va0_example/GCC-RELEASE/gcc_utility/rtl_gdb_ramdebug.txt Normal file
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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :2331
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset 1
monitor sleep 20
monitor clrbp
#===============================================================================
#Init SDRAM here
# init System
monitor MemU32 0x40000014=0x00000021
monitor sleep 10
monitor MemU32 0x40000304=0x1fc00002
monitor sleep 10
monitor MemU32 0x40000250=0x00000400
monitor sleep 10
monitor MemU32 0x40000340=0x00000000
monitor sleep 10
monitor MemU32 0x40000230=0x0000dcc4
monitor sleep 10
monitor MemU32 0x40000210=0x00011117
monitor sleep 10
monitor MemU32 0x40000210=0x00011157
monitor sleep 10
monitor MemU32 0x400002c0=0x00110011
monitor sleep 10
monitor MemU32 0x40000320=0xffffffff
monitor sleep 10
# init SDRAM
monitor MemU32 0x40000040=0x00fcc702
monitor sleep 10
monitor MemU32 0x40000040
monitor MemU32 0x40005224=0x00000001
monitor sleep 10
monitor MemU32 0x40005004=0x00000208
monitor sleep 10
monitor MemU32 0x40005008=0xffffd000
monitor sleep 13
monitor MemU32 0x40005020=0x00000022
monitor sleep 13
monitor MemU32 0x40005010=0x09006201
monitor sleep 13
monitor MemU32 0x40005014=0x00002611
monitor sleep 13
monitor MemU32 0x40005018=0x00068413
monitor sleep 13
monitor MemU32 0x4000501c=0x00000042
monitor sleep 13
monitor MemU32 0x4000500c=0x700
monitor sleep 20
monitor MemU32 0x40005000=0x1
monitor sleep 100
monitor MemU32 0x40005000
monitor MemU32 0x4000500c=0x600
monitor sleep 30
monitor MemU32 0x40005008=0x00000000
monitor sleep 3
monitor MemU32 0x40000300=0x0006005e
monitor sleep 3
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
monitor MemU32 0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

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# GDB script for loading ram.bin process
#===============================================================================
#set GDB connection
set remotetimeout 100000
target remote :3333
#===============================================================================
#Message display setting
#disable all messages
set verbose off
set complaints 0
set confirm off
set exec-done-display off
show exec-done-display
set trace-commands off
#set debug aix-thread off
#set debug dwarf2-die 0
set debug displaced off
set debug expression 0
set debug frame 0
set debug infrun 0
set debug observer 0
set debug overload 0
set debugvarobj 0
set pagination off
set print address off
set print symbol-filename off
set print symbol off
set print pretty off
set print object off
#set debug notification off
set debug parser off
set debug remote 0
#===============================================================================
monitor reset init
monitor sleep 20
monitor halt
#===============================================================================
#Load flash download file
file ./application/Debug/bin/application.axf
#boot from ram, igonore loading flash
set {int}0x40000210=0x8011157
#Load the file
lo
#Run to main
b main
continue
clear main

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platform_opts.h:
#define CONFIG_ENABLE_WPS 1

275
project/realtek_ameba1_va0_example/GCC-RELEASE/rlx8195A-symbol-v02-img2.ld Normal file
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ENTRY(Reset_Handler)
INCLUDE "export-rom_v02.txt"
MEMORY
{
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 21560
//RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 16128
BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 434176
RECY_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 7936
//BD_RAM (rwx) : ORIGIN = 0x10004000, LENGTH = 442368
SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
}
SECTIONS
{
__rom_bss_start__ = 0x10000300;
__rom_bss_end__ = 0x10000bc8;
/*
.ram.start.table :
{
__ram_image1_text_start__ = .;
__ram_start_table_start__ = .;
KEEP(*(SORT(.start.ram.data*)))
__ram_start_table_end__ = .;
} > ROM_USED_RAM
*/
/* Add . to assign the start address of the section, *
* to prevent the change of the start address by ld doing section alignment */
/* these 4 sections is used by ROM global variable */
/* Don't move them and never add RAM code variable to these sections */
/*
.ram_image1.text . :
{
__image1_validate_code__ = .;
KEEP(*(.image1.validate.rodata*))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.hal.ram.data*))
__image1_bss_start__ = .;
__image1_bss_end__ = .;
__ram_image1_data_end__ = .;
*(.hal.ram.text*)
*(.infra.ram.text*)
__ram_image1_text_end__ = .;
} > ROM_USED_RAM
*/
/*
.tcm :
{
__tcm_start__ = .;
*(.tcm.heap)
*mem.o (.bss)
*memp.o (.bss)
__tcm_end__ = .;
} > TCM
*/
.bootloader :
{
KEEP(*(.loader.data*))
} > ROM_USED_RAM
OVERLAY 0x1FFF0000:
{
.valid
{
*mem.o (.bss*)
*memp.o (.bss*)
*(.tcm.heap)
}
.dummy
{
__ram_image1_text_start__ = .;
__ram_start_table_start__ = .;
KEEP(*(SORT(.start.ram.data*)))
__ram_start_table_end__ = .;
__image1_validate_code__ = .;
KEEP(*(.image1.validate.rodata*))
KEEP(*(.infra.ram.data*))
KEEP(*(.timer.ram.data*))
KEEP(*(.cutb.ram.data*))
KEEP(*(.cutc.ram.data*))
KEEP(*(.hal.ram.data*))
__image1_bss_start__ = .;
.ram_image1.bss$$Base = .;
__image1_bss_end__ = .;
.ram_image1.bss$$Limit = .;
__ram_image1_data_end__ = .;
*(.hal.ram.text*)
*(.infra.ram.text*)
}
} > TCM
.image2.start.table :
{
__ram_image2_text_start__ = .;
__image2_entry_func__ = .;
.image2.start.table1$$Base = .;
KEEP(*(SORT(.image2.ram.data*)))
__image2_validate_code__ = .;
KEEP(*(.image2.validate.rodata*))
KEEP(*(.custom.validate.rodata*))
} > BD_RAM
.ram_image2.text :
{
KEEP(*(.infra.ram.start*))
*(.mon.ram.text*)
*(.hal.flash.text*)
*(.hal.sdrc.text*)
*(.hal.gpio.text*)
*(.fwu.text*)
*(.text*)
} > BD_RAM
/*--------------
.sdr_text :
{
__sdram_data_start__ = .;
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
} > BD_RAM
.sdr_rodata :
{
*(.sdram.rodata*)
*(.p2p.rodata*)
*(.wps.rodata*)
*(.websocket.rodata*)
} > BD_RAM
.sdr_data :
{
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
__sdram_data_end__ = .;
} > BD_RAM
.sdr_bss :
{
__sdram_bss_start__ = .;
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
*(.websocket.bss*)
__sdram_bss_end__ = .;
} > BD_RAM
--------------*/
.ram_image2.rodata :
{
*(.rodata*)
*(.fwu.rodata*)
} > BD_RAM
.ram.data :
{
__data_start__ = .;
*(.data*)
__data_end__ = .;
__ram_image2_text_end__ = .;
} > BD_RAM
.ram.bss :
{
__bss_start__ = .;
.ram.bss$$Base = .;
*(.hal.flash.data*)
*(.hal.sdrc.data*)
*(.hal.gpio.data*)
*(.fwu.data*)
*(.bss*)
*(COMMON)
*(.bdsram.data*)
__bss_end__ = .;
.ram.bss$$Limit = .;
} > BD_RAM
.bf_data :
{
__buffer_data_start__ = .;
*(.bfsram.data*)
__buffer_data_end__ = .;
} > BD_RAM
.bf_data2 :
{
__buffer_data_start2__ = .;
__buffer_data_end2__ = .;
} > RECY_RAM
.sdr_text :
{
__sdram_data_start__ = .;
*(.sdram.text*)
*(.p2p.text*)
*(.wps.text*)
*(.websocket.text*)
} > SDRAM_RAM
.sdr_rodata :
{
*(.sdram.rodata*)
*(.p2p.rodata*)
*(.wps.rodata*)
*(.websocket.rodata*)
} > SDRAM_RAM
.sdr_data :
{
*(.sdram.data*)
*(.p2p.data*)
*(.wps.data*)
*(.websocket.data*)
__sdram_data_end__ = .;
} > SDRAM_RAM
.sdr_bss :
{
__sdram_bss_start__ = .;
*(.sdram.bss*)
*(.p2p.bss*)
*(.wps.bss*)
*(.websocket.bss*)
__sdram_bss_end__ = .;
} > SDRAM_RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > BD_RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > BD_RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

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taskkill /F /IM openocd.exe
openocd -f interface\Jlink.cfg -f ..\..\..\component\soc\realtek\8195a\misc\gcc_utility\openocd\ameba1.cfg

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#!/bin/sh
OS=`uname | cut -c 1-6`
PID=`ps aux | grep openocd | gawk '{print $1}'`
if [ ! -z "$PID" -a "$PID" != " " ]; then
echo Found openocd running, Kill it
kill $PID
else
if [ $OS == CYGWIN ]; then
echo Try to search windows process
PID=`ps --windows | grep openocd | gawk '{print $1}'`
if [ -n PID ]; then
echo Found openocd running, Kill it
taskkill /F /pid $PID
fi
fi
fi
openocd -f interface/cmsis-dap.cfg -f ../../../component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1.cfg

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project/realtek_ameba1_va0_example/example_sources/analogin_voltage/readme.txt Normal file
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Example Description
This example describes how to use ADC.
1.Prepare a DC power supply to provide a adjustable voltage.
2.Connect anode to HDK board A3, and cathode to GND
3.Run the main function.
4.Will see result like below
AD1:00008049 = 1644 mv, AD2:00002a75 = 17 mv, AD3:00002a94 = 20 mv
NOTE:
1. For 8195AM EVB, A0 and A1 are hardware connected. A2 is also available.
For 8711AM EVB, A0 and A1 are not available. Only A2 is avaliable.
2. ADC need calibration to get correct voltage value by modifing OFFSET and GAIN_DIV.

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project/realtek_ameba1_va0_example/example_sources/analogin_voltage/src/main.c Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "analogin_api.h"
#include <sys_api.h>
#define ADC_CALIBRATION 0
#define MBED_ADC_EXAMPLE_PIN_1 AD_1 // no pin out
#define MBED_ADC_EXAMPLE_PIN_2 AD_2 // HDK, A1
#define MBED_ADC_EXAMPLE_PIN_3 AD_3 // HDK, A2
#if defined (__ICCARM__)
analogin_t adc0;
analogin_t adc1;
analogin_t adc2;
#else
volatile analogin_t adc0;
volatile analogin_t adc1;
volatile analogin_t adc2;
#endif
void adc_delay(void)
{
int i;
for(i=0;i<1600000;i++)
asm(" nop");
}
uint16_t adcdat0 = 0;
uint16_t adcdat1 = 0;
uint16_t adcdat2 = 0;
int32_t v_mv0;
int32_t v_mv1;
int32_t v_mv2;
/*
* OFFSET: value of measuring at 0.000v, value(0.000v)
* GAIN_DIV: value(1.000v)-value(0.000v) or value(2.000v)-value(1.000v) or value(3.000v)-value(2.000v)
*
* MSB 12bit of value is valid, need to truncate LSB 4bit (0xABCD -> 0xABC). OFFSET and GAIN_DIV are truncated values.
*/
#define OFFSET 0x298
#define GAIN_DIV 0x34C
#define AD2MV(ad,offset,gain) (((ad/16)-offset)*1000/gain)
VOID
main (
VOID
)
{
uint16_t offset, gain;
analogin_init(&adc0, MBED_ADC_EXAMPLE_PIN_1); // no pinout on HDK board
analogin_init(&adc1, MBED_ADC_EXAMPLE_PIN_2);
analogin_init(&adc2, MBED_ADC_EXAMPLE_PIN_3);
#if ADC_CALIBRATION
sys_adc_calibration(0, &offset, &gain);
printf("ADC:offset = 0x%x, gain = 0x%x\n", offset, gain);
if((offset==0xFFFF) || (gain==0xFFFF))
#endif
{
offset = OFFSET;
gain = GAIN_DIV;
printf("ADC:offset = 0x%x, gain = 0x%x\n", offset, gain);
}
for (;;){
adcdat0 = analogin_read_u16(&adc0);
adcdat1 = analogin_read_u16(&adc1);
adcdat2 = analogin_read_u16(&adc2);
v_mv0 = AD2MV(adcdat0, offset, gain);
v_mv1 = AD2MV(adcdat1, offset, gain);
v_mv2 = AD2MV(adcdat2, offset, gain);
printf("AD0:%x = %d mv, AD1:%x = %d mv, AD2:%x = %d mv\n", adcdat0, v_mv0, adcdat1, v_mv1, adcdat2, v_mv2);
adc_delay();
}
analogin_deinit(&adc0);
analogin_deinit(&adc1);
analogin_deinit(&adc2);
}

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Example Description
This example describes how to use CRYPTO function, it is based on cutomer requirement modified.
use Arduino board to test, and it will show at console

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "FreeRTOS.h"
#include "task.h"
#include "device.h"
#include "serial_api.h"
#include "hal_crypto.h"
#include "main.h"
#include "diag.h"
#include <polarssl/aes.h>
#define STACKSIZE 2048
//static const u8 plaintext[] = "The quick brown fox jumps over the lazy dog";
//static const u8 md5_digest[] = "\x9e\x10\x7d\x9d\x37\x2b\xb6\x82"
// "\x6b\xd8\x1d\x35\x42\xa4\x19\xd6";
//static const u8 md5_key[] = "key";
static const char plaintext[] = "12345678901234567890123456789012345678901234567890123456789012" \
"345678901234567890";
static const char md5_digest[] = { 0x57, 0xED, 0xF4, 0xA2, 0x2B, 0xE3, 0xC9, 0x55,
0xAC, 0x49, 0xDA, 0x2E, 0x21, 0x07, 0xB6, 0x7A };
static const u8 md5_key[] = "key";
static unsigned char md5_test_buf[16][128] =
{
{ "" },
{ "a" },
{ "abc" },
{ "message digest" },
{ "abcdefghijklmnopqrstuvwxyz" },
{ "The quick brown fox jumps over the lazy dog" },
{ "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789" },
{ "12345678901234567890123456789012345678901234567890123456789012" \
"345678901234567890" },
{ "" },
{ "a" },
{ "abc" },
{ "message digest" },
{ "abcdefghijklmnopqrstuvwxyz" },
{ "The quick brown fox jumps over the lazy dog" },
{ "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789" },
{ "12345678901234567890123456789012345678901234567890123456789012" \
"345678901234567890" }
};
static const int md5_test_buflen[16] =
{
0, 1, 3, 14, 26, 43, 62, 80, 0, 1, 3, 14, 26, 43, 62, 80
};
static const unsigned char md5_test_sum[16][16] =
{
{ 0xD4, 0x1D, 0x8C, 0xD9, 0x8F, 0x00, 0xB2, 0x04,
0xE9, 0x80, 0x09, 0x98, 0xEC, 0xF8, 0x42, 0x7E },
{ 0x0C, 0xC1, 0x75, 0xB9, 0xC0, 0xF1, 0xB6, 0xA8,
0x31, 0xC3, 0x99, 0xE2, 0x69, 0x77, 0x26, 0x61 },
{ 0x90, 0x01, 0x50, 0x98, 0x3C, 0xD2, 0x4F, 0xB0,
0xD6, 0x96, 0x3F, 0x7D, 0x28, 0xE1, 0x7F, 0x72 },
{ 0xF9, 0x6B, 0x69, 0x7D, 0x7C, 0xB7, 0x93, 0x8D,
0x52, 0x5A, 0x2F, 0x31, 0xAA, 0xF1, 0x61, 0xD0 },
{ 0xC3, 0xFC, 0xD3, 0xD7, 0x61, 0x92, 0xE4, 0x00,
0x7D, 0xFB, 0x49, 0x6C, 0xCA, 0x67, 0xE1, 0x3B },
{"\x9e\x10\x7d\x9d\x37\x2b\xb6\x82"
"\x6b\xd8\x1d\x35\x42\xa4\x19\xd6"},
{ 0xD1, 0x74, 0xAB, 0x98, 0xD2, 0x77, 0xD9, 0xF5,
0xA5, 0x61, 0x1C, 0x2C, 0x9F, 0x41, 0x9D, 0x9F },
{ 0x57, 0xED, 0xF4, 0xA2, 0x2B, 0xE3, 0xC9, 0x55,
0xAC, 0x49, 0xDA, 0x2E, 0x21, 0x07, 0xB6, 0x7A },
{ 0xD4, 0x1D, 0x8C, 0xD9, 0x8F, 0x00, 0xB2, 0x04,
0xE9, 0x80, 0x09, 0x98, 0xEC, 0xF8, 0x42, 0x7E },
{ 0x0C, 0xC1, 0x75, 0xB9, 0xC0, 0xF1, 0xB6, 0xA8,
0x31, 0xC3, 0x99, 0xE2, 0x69, 0x77, 0x26, 0x61 },
{ 0x90, 0x01, 0x50, 0x98, 0x3C, 0xD2, 0x4F, 0xB0,
0xD6, 0x96, 0x3F, 0x7D, 0x28, 0xE1, 0x7F, 0x72 },
{ 0xF9, 0x6B, 0x69, 0x7D, 0x7C, 0xB7, 0x93, 0x8D,
0x52, 0x5A, 0x2F, 0x31, 0xAA, 0xF1, 0x61, 0xD0 },
{ 0xC3, 0xFC, 0xD3, 0xD7, 0x61, 0x92, 0xE4, 0x00,
0x7D, 0xFB, 0x49, 0x6C, 0xCA, 0x67, 0xE1, 0x3B },
{"\x9e\x10\x7d\x9d\x37\x2b\xb6\x82"
"\x6b\xd8\x1d\x35\x42\xa4\x19\xd6"},
{ 0xD1, 0x74, 0xAB, 0x98, 0xD2, 0x77, 0xD9, 0xF5,
0xA5, 0x61, 0x1C, 0x2C, 0x9F, 0x41, 0x9D, 0x9F },
{ 0x57, 0xED, 0xF4, 0xA2, 0x2B, 0xE3, 0xC9, 0x55,
0xAC, 0x49, 0xDA, 0x2E, 0x21, 0x07, 0xB6, 0x7A },
};
u8 digest[64];
u8 cipher_result[2048];
u8 test_result[1024];
serial_t sobj;
/*
*
*
* This test_md5 function is used to test hardware md5 functoinality
*/
void test_md5(void)
{
int i;
int ret;
u8 md5sum[16];
DiagPrintf("MD5 test\r\n");
ret = rtl_crypto_md5(plaintext, strlen(plaintext), (unsigned char *)&digest); // the length of MD5's digest is 16 bytes.
if ( rtl_memcmpb(digest, md5_digest, 16) == 0 ) {
DiagPrintf("MD5 test result is correct, ret=%d\r\n", ret);
} else {
DiagPrintf("MD5 test result is WRONG!!, ret=%d\r\n", ret);
}
for( i = 0; i < 16; i++ )
{
DiagPrintf( " MD5 test #%d: ", i + 1 );
ret = rtl_crypto_md5(md5_test_buf[i], md5_test_buflen[i], md5sum); // the length of MD5's digest is 16 bytes.
DiagPrintf(" MD5 ret=%d\n", ret);
if( rtl_memcmpb( md5sum, md5_test_sum[i], 16 ) != 0 )
{
DiagPrintf( "failed\n" );
memset(md5sum,0,16);
}
else{
DiagPrintf( "passed\n" );
memset(md5sum,0,16);}
}
}
//
// vector : AES CBC 128 bit :
// http://www.inconteam.com/software-development/41-encryption/55-aes-test-vectors#aes-cbc-128
//
//#ifdef __ICCARM__
//#pragma data_alignment = 4
//#elif defined (__GNUC__)
//__attribute__ ((aligned (4)))
//#endif
static const unsigned char aes_test_key[16] =
{
0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
} ;
//#ifdef __ICCARM__
//#pragma data_alignment = 4
//#elif defined (__GNUC__)
//__attribute__ ((aligned (4)))
//#endif
static const unsigned char aes_test_iv_1[16] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
};
static const unsigned char aes_test_buf[16] =
{
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
};
static const unsigned char aes_test_ecb_buf[160] =
{
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a
};
static const unsigned char aes_test_res_128[16] =
{
0x76, 0x49, 0xab, 0xac, 0x81, 0x19, 0xb2, 0x46,
0xce, 0xe9, 0x8e, 0x9b, 0x12, 0xe9, 0x19, 0x7d
};
static const unsigned char aes_test_ecb_res_128[160] =
{
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97
};
/*
*
* THis test_aes_cbc function is use to directly test hardware aes cbc crypto functionality
*
*/
int test_aes_cbc(void)
{
const u8 *key, *pIv;
u32 keylen= 0;
u32 ivlen = 0;
u8 *message;
u32 msglen;
u8 *pResult;
int ret;
DiagPrintf("AES CBC test\r\n");
key = aes_test_key;
keylen = 16;
pIv = aes_test_iv_1;
ivlen = 16;
pResult = cipher_result;
message = (unsigned char *)aes_test_buf;
msglen = sizeof(aes_test_buf);
ret = rtl_crypto_aes_cbc_init(key,keylen);
if ( ret != 0 ) {
DiagPrintf("AES CBC init failed\r\n");
return ret;
}
ret = rtl_crypto_aes_cbc_encrypt(message, msglen, pIv, ivlen, pResult);
if ( ret != 0 ) {
DiagPrintf("AES CBC encrypt failed\r\n");
return ret;
}
if ( rtl_memcmpb(aes_test_res_128, pResult, msglen) == 0 ) {
DiagPrintf("AES CBC encrypt result success\r\n");
} else {
DiagPrintf("AES CBC encrypt result failed\r\n");
}
message = pResult;
ret = rtl_crypto_aes_cbc_decrypt(message, msglen, pIv, ivlen, pResult);
if ( ret != 0 ) {
DiagPrintf("AES CBC decrypt failed, ret=%d\r\n", ret);
return ret;
}
if ( rtl_memcmpb(aes_test_buf, pResult, msglen) == 0 ) {
DiagPrintf("AES CBC decrypt result success\r\n");
} else {
DiagPrintf("AES CBC decrypt result failed\r\n");
}
return 0;
}
/*
*
* THis test_aes_ecb function is use to directly test hardware ecb cbc crypto functionality
*
* The input parameter for ecb need to confirm iv is null and ivlen is 0
*/
int test_aes_ecb(void)
{
const u8 *key, *pIv;
u32 keylen= 0;
u32 ivlen = 0;
u8 *message;
u32 msglen;
u8 *pResult;
int ret;
DiagPrintf("AES ECB test\r\n");
key = aes_test_key;
keylen = 16;
pIv = NULL;
ivlen = 0;
pResult = cipher_result;
message = (unsigned char *)aes_test_ecb_buf;
msglen = sizeof(aes_test_buf);
//for(int i=0;i<msglen;i++)
//printf("\r\n first message[%d] = %p,",i,message[i]);
ret = rtl_crypto_aes_ecb_init(key,keylen);
if ( ret != 0 ) {
DiagPrintf("AES ECB init failed\r\n");
return ret;
}
ret = rtl_crypto_aes_ecb_encrypt(message, msglen, pIv, ivlen, pResult);
if ( ret != 0 ) {
DiagPrintf("AES ECB encrypt failed\r\n");
return ret;
}
if ( rtl_memcmpb(aes_test_ecb_res_128, pResult, msglen) == 0 )
{
DiagPrintf("AES ECB encrypt result success\r\n");
}
else {
DiagPrintf("AES ECB encrypt result failed\r\n");
}
message = pResult;
//for(int i=0;i<msglen;i++)
//printf("\r\n second message[%d] = %p,",i,message[i]);
ret = rtl_crypto_aes_ecb_decrypt(message, msglen, pIv, ivlen, pResult);
if ( ret != 0 ) {
DiagPrintf("AES ECB decrypt failed, ret=%d\r\n", ret);
return ret;
}
if ( rtl_memcmpb(aes_test_ecb_buf, pResult, msglen) == 0 )
{
DiagPrintf("AES ECB decrypt result success\r\n");
}
else {
DiagPrintf("AES ECB decrypt result failed\r\n");
}
//for(int i=0;i<msglen;i++)
//printf("\r\n last message[%d] = %p,",i,message[i]);
return 0;
}
void main(void)
{
// sample text
char rc;
//
int ret;
int loop=0;
u32 keylen= 0;
u32 ivlen = 0;
u8 *pResult;
u8 *message;
u32 *ResultLen;
u32 msglen = 0;
const u8 *key, *pIv;
key = aes_test_key;
keylen = 16;
pIv = aes_test_iv_1;
ivlen = 16;
//
message = (unsigned char *)aes_test_buf;
msglen = sizeof(aes_test_buf);
DiagPrintf("CRYPTO API Demo...\r\n");
if ( rtl_cryptoEngine_init() != 0 ) {
DiagPrintf("crypto engine init failed\r\n");
}
else
printf("init success\n");
pResult = test_result;
test_md5();
test_aes_cbc();
test_aes_ecb();
//aes_test(); //added api combined aes_cbc setkey and cryption into one function
}

8
project/realtek_ameba1_va0_example/example_sources/efuse_mtp/readme.txt Normal file
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Example Description
This example describes how to read/write efuse in MTP.
MTP block has 32 bytes.
Requirement Components:
None

72
project/realtek_ameba1_va0_example/example_sources/efuse_mtp/src/main.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "hal_efuse.h"
#include "efuse_api.h"
#include "osdep_service.h"
#include "device_lock.h"
#define MTP_MAX_LEN 32 // The MTP max length is 32 bytes
static void efuse_mtp_task(void *param)
{
int ret;
u8 i, buf[MTP_MAX_LEN];
DBG_8195A("\nefuse MTP block: Test Start\n");
// read MTP content
_memset(buf, 0xFF, MTP_MAX_LEN);
device_mutex_lock(RT_DEV_LOCK_EFUSE);
efuse_mtp_read(buf);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
for(i=0; i<MTP_MAX_LEN; i+=8){
DBG_8195A("[%d]\t%02X %02X %02X %02X %02X %02X %02X %02X\n",
i, buf[i], buf[i+1], buf[i+2], buf[i+3], buf[i+4], buf[i+5], buf[i+6], buf[i+7]);
}
// write MTP content
_memset(buf, 0xFF, MTP_MAX_LEN);
if(0){ // fill your data
for(i=0; i<MTP_MAX_LEN; i++)
buf[i] = i;
}
if(0){ // write
device_mutex_lock(RT_DEV_LOCK_EFUSE);
ret = efuse_mtp_write(buf, MTP_MAX_LEN);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
if(ret < 0){
DBG_8195A("efuse MTP block: write length error\n");
goto exit;
}
DBG_8195A("\nWrite Done\n");
DBG_8195A("Remain %d\n", efuse_get_remaining_length());
}
DBG_8195A("\n");
// read MTP content
_memset(buf, 0xFF, MTP_MAX_LEN);
device_mutex_lock(RT_DEV_LOCK_EFUSE);
efuse_mtp_read(buf);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
for(i=0; i<MTP_MAX_LEN; i+=8){
DBG_8195A("[%d]\t%02X %02X %02X %02X %02X %02X %02X %02X\n",
i, buf[i], buf[i+1], buf[i+2], buf[i+3], buf[i+4], buf[i+5], buf[i+6], buf[i+7]);
}
DBG_8195A("efuse MTP block: Test Done\n");
vTaskDelete(NULL);
exit:
DBG_8195A("efuse MTP block: Test Fail!\n");
vTaskDelete(NULL);
}
void main(void)
{
if(xTaskCreate(efuse_mtp_task, ((const char*)"efuse_mtp_task"), 512, NULL, tskIDLE_PRIORITY + 1, NULL) != pdPASS)
printf("\n\r%s xTaskCreate(efuse_mtp_task) failed", __FUNCTION__);
/*Enable Schedule, Start Kernel*/
if(rtw_get_scheduler_state() == OS_SCHEDULER_NOT_STARTED)
vTaskStartScheduler();
else
vTaskDelete(NULL);
}

10
project/realtek_ameba1_va0_example/example_sources/efuse_otp/readme.txt Normal file
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Example Description
This example describes how to read/write efuse in OTP.
OTP block has 32 bytes.
Requirement Components:
None

81
project/realtek_ameba1_va0_example/example_sources/efuse_otp/src/main.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "hal_efuse.h"
#include "efuse_api.h"
#include "osdep_service.h"
#include "device_lock.h"
//======================================================
// OTP : one time programming
//======================================================
#define OTP_MAX_LEN 32 // The OTP max length is 32 bytes
static void efuse_otp_task(void *param)
{
int ret;
u8 i, buf[OTP_MAX_LEN];
DBG_8195A("\nefuse OTP block: Test Start\n");
// read OTP content
device_mutex_lock(RT_DEV_LOCK_EFUSE);
ret = efuse_otp_read(0, OTP_MAX_LEN, buf);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
if(ret < 0){
DBG_8195A("efuse OTP block: read address and length error\n");
goto exit;
}
for(i=0; i<OTP_MAX_LEN; i+=8){
DBG_8195A("[%d]\t%02X %02X %02X %02X %02X %02X %02X %02X\n",
i, buf[i], buf[i+1], buf[i+2], buf[i+3], buf[i+4], buf[i+5], buf[i+6], buf[i+7]);
}
// write OTP content
_memset(buf, 0xFF, OTP_MAX_LEN);
if(0){ // fill your data
for(i=0; i<OTP_MAX_LEN; i++)
buf[i] = i;
}
if(0){ // write
device_mutex_lock(RT_DEV_LOCK_EFUSE);
ret = efuse_otp_write(0, OTP_MAX_LEN, buf);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
if(ret < 0){
DBG_8195A("efuse OTP block: write address and length error\n");
goto exit;
}
DBG_8195A("\nWrite Done.\n");
}
DBG_8195A("\n");
// read OTP content
device_mutex_lock(RT_DEV_LOCK_EFUSE);
ret = efuse_otp_read(0, OTP_MAX_LEN, buf);
device_mutex_unlock(RT_DEV_LOCK_EFUSE);
if(ret < 0){
DBG_8195A("efuse OTP block: read address and length error\n");
goto exit;
}
for(i=0; i<OTP_MAX_LEN; i+=8){
DBG_8195A("[%d]\t%02X %02X %02X %02X %02X %02X %02X %02X\n",
i, buf[i], buf[i+1], buf[i+2], buf[i+3], buf[i+4], buf[i+5], buf[i+6], buf[i+7]);
}
DBG_8195A("efuse OTP block: Test Done\n");
vTaskDelete(NULL);
exit:
DBG_8195A("efuse OTP block: Test Fail!\n");
vTaskDelete(NULL);
}
void main(void)
{
if(xTaskCreate(efuse_otp_task, ((const char*)"efuse_otp_task"), 512, NULL, tskIDLE_PRIORITY + 1, NULL) != pdPASS)
printf("\n\r%s xTaskCreate(efuse_otp_task) failed", __FUNCTION__);
/*Enable Schedule, Start Kernel*/
if(rtw_get_scheduler_state() == OS_SCHEDULER_NOT_STARTED)
vTaskStartScheduler();
else
vTaskDelete(NULL);
}

44
project/realtek_ameba1_va0_example/example_sources/ethernet_mii/src/main.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "main.h"
#include "ethernet_api.h"
#include <example_entry.h>
extern void console_init(void);
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
if ( rtl_cryptoEngine_init() != 0 ) {
DiagPrintf("crypto engine init failed\r\n");
}
/* Initialize log uart and at command service */
console_init();
/* pre-processor of application example */
pre_example_entry();
/* wlan intialization */
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
wlan_network();
#endif
ethernet_mii_init();// init ethernet driver
/* Execute application example */
example_entry();
/*Enable Schedule, Start Kernel*/
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
#ifdef PLATFORM_FREERTOS
vTaskStartScheduler();
#endif
#else
RtlConsolTaskRom(NULL);
#endif
}

8
project/realtek_ameba1_va0_example/example_sources/flash/readme.txt Normal file
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Example Description
This example read a specific flash offset, modify it and re-read again.
Requirement Components:
None

119
project/realtek_ameba1_va0_example/example_sources/flash/src/main.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "objects.h"
#include "flash_api.h"
#include "osdep_service.h"
#include "device_lock.h"
#include "main.h"
// Decide starting flash address for storing application data
// User should pick address carefully to avoid corrupting image section
#define FLASH_APP_BASE 0xFF000
static void flash_test_task(void *param)
{
flash_t flash;
uint32_t address = FLASH_APP_BASE;
#if 1
uint32_t val32_to_write = 0x13572468;
uint32_t val32_to_read;
int loop = 0;
int result = 0;
for(loop = 0; loop < 10; loop++)
{
device_mutex_lock(RT_DEV_LOCK_FLASH);
flash_read_word(&flash, address, &val32_to_read);
DBG_8195A("Read Data 0x%x\n", val32_to_read);
flash_erase_sector(&flash, address);
flash_write_word(&flash, address, val32_to_write);
flash_read_word(&flash, address, &val32_to_read);
device_mutex_unlock(RT_DEV_LOCK_FLASH);
DBG_8195A("Read Data 0x%x\n", val32_to_read);
// verify result
result = (val32_to_write == val32_to_read) ? 1 : 0;
//printf("\r\nResult is %s\r\n", (result) ? "success" : "fail");
DBG_8195A("\r\nResult is %s\r\n", (result) ? "success" : "fail");
result = 0;
}
#else
int VERIFY_SIZE = 256;
int SECTOR_SIZE = 16;
uint8_t writedata[VERIFY_SIZE];
uint8_t readdata[VERIFY_SIZE];
uint8_t verifydata = 0;
int loop = 0;
int index = 0;
int sectorindex = 0;
int result = 0;
int resultsector = 0;
int testloop = 0;
for(testloop = 0; testloop < 1; testloop++){
address = FLASH_APP_BASE;
for(sectorindex = 0; sectorindex < 4080; sectorindex++){
result = 0;
//address += SECTOR_SIZE;
device_mutex_lock(RT_DEV_LOCK_FLASH);
flash_erase_sector(&flash, address);
device_mutex_unlock(RT_DEV_LOCK_FLASH);
//DBG_8195A("Address = %x \n", address);
for(loop = 0; loop < SECTOR_SIZE; loop++){
for(index = 0; index < VERIFY_SIZE; index++)
{
writedata[index] = verifydata + index;
}
device_mutex_lock(RT_DEV_LOCK_FLASH);
flash_stream_write(&flash, address, VERIFY_SIZE, &writedata);
flash_stream_read(&flash, address, VERIFY_SIZE, &readdata);
device_mutex_unlock(RT_DEV_LOCK_FLASH);
for(index = 0; index < VERIFY_SIZE; index++)
{
//DBG_8195A("Address = %x, Writedata = %x, Readdata = %x \n",address,writedata[index],readdata[index]);
if(readdata[index] != writedata[index]){
DBG_8195A("Error: Loop = %d, Address = %x, Writedata = %x, Readdata = %x \n",testloop,address,writedata[index],readdata[index]);
}
else{
result++;
//DBG_8195A(ANSI_COLOR_BLUE"Correct: Loop = %d, Address = %x, Writedata = %x, Readdata = %x \n"ANSI_COLOR_RESET,testloop,address,writedata[index],readdata[index]);
}
}
address += VERIFY_SIZE;
}
if(result == VERIFY_SIZE * SECTOR_SIZE){
//DBG_8195A("Sector %d Success \n", sectorindex);
resultsector++;
}
}
if(resultsector == 4079){
DBG_8195A("Test Loop %d Success \n", testloop);
}
resultsector = 0;
verifydata++;
}
//DBG_8195A("%d Sector Success \n", resultsector);
DBG_8195A("Test Done");
#endif
vTaskDelete(NULL);
}
void main(void)
{
if(xTaskCreate(flash_test_task, ((const char*)"flash_test_task"), 1024, NULL, tskIDLE_PRIORITY + 1, NULL) != pdPASS)
printf("\n\r%s xTaskCreate(flash_test_task) failed", __FUNCTION__);
/*Enable Schedule, Start Kernel*/
if(rtw_get_scheduler_state() == OS_SCHEDULER_NOT_STARTED)
vTaskStartScheduler();
else
vTaskDelete(NULL);
}

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "diag.h"
#include "main.h"
#include "dma_api.h"
#if 1
//Multi-Block Example Demo
#define DMA_CPY_LEN 176
#define DMA_BLOCK_LENGTH 22
#define DMA_SRC_OFFSET 0
#define DMA_DST_OFFSET 0
#define BLOCK_NUM 8
gdma_t gdma;
uint8_t TestBuf1[DMA_CPY_LEN];
uint8_t TestBuf2[DMA_CPY_LEN];
volatile uint8_t dma_done;
struct BlockInfo{
u32 SrcAddr;
u32 DstAddr;
u32 BlockLength;
u32 SrcOffset;
u32 DstOffset;
};
void dma_done_handler(uint32_t id) {
DiagPrintf("DMA Copy Done!!\r\n");
dma_done = 1;
}
int main(void) {
int i = 0,err = 0;
struct BlockInfo block_info[BLOCK_NUM];
//Set how many blocks we want to transfer (16 at most)
gdma.gdma_obj.BlockNum = BLOCK_NUM;
//Initialize DMA multi-block mode setting
dma_memcpy_aggr_init(&gdma, dma_done_handler, (uint32_t) &gdma);
_memset(TestBuf1, 0,DMA_CPY_LEN);
for(i = 0; i < DMA_CPY_LEN; i++){
TestBuf1[i] = DMA_CPY_LEN - 1 - i;
}
_memset(TestBuf2, 0,DMA_CPY_LEN);
dma_done = 0;
for(i = 0; i < BLOCK_NUM; i++){
//User can decide the relation between SrcOffset/DstOffset,SrcAddr/DstAddr and Block length
// For example :
//block_info[i].SrcOffset = 0;
//block_info[i].DstOffset = 4;
//block_info[i].SrcAddr = &TestBuf1[ i * DMA_BLOCK_LENGTH] ;//SRC
//block_info[i].DstAddr = &TestBuf2[0] + (DMA_BLOCK_LENGTH + block_info[i].DstOffset )*i;//Dest
//block_info[i].BlockLength = DMA_BLOCK_LENGTH;
block_info[i].SrcOffset = 0;
block_info[i].DstOffset = 0;
block_info[i].SrcAddr = (uint32_t) &TestBuf1[ i * DMA_BLOCK_LENGTH] ;//SRC
block_info[i].DstAddr = (uint32_t) &TestBuf2[ i * DMA_BLOCK_LENGTH] ;//Dest
block_info[i].BlockLength = DMA_BLOCK_LENGTH;
//DiagPrintf("block_info[%d].SrcAddr = %x\r\n",i, block_info[i].SrcAddr);
//DiagPrintf("block_info[%d].DstAddr = %x\r\n",i, block_info[i].DstAddr);
//DiagPrintf("block_info[%d].BlockLength = %x\r\n",i, block_info[i].BlockLength);
//DiagPrintf("block_info[%d].SrcOffset = %x\r\n",i, block_info[i].SrcOffset);
//DiagPrintf("block_info[%d].DstOffset = %x\r\n",i, block_info[i].DstOffset);
}
dma_memcpy_aggr(&gdma, (PHAL_GDMA_BLOCK) &block_info);
while (dma_done == 0);
err = 0;
for (i=0;i<DMA_CPY_LEN;i++) {
//DiagPrintf("dma_done = %x\r\n", dma_done);
//DiagPrintf("TestBuf2[%d] = %x\r\n",i, TestBuf2[i]);
if (TestBuf2[i+DMA_DST_OFFSET] != TestBuf1[i+DMA_SRC_OFFSET]) {
DiagPrintf("DMA Copy Memory Compare Err, %d %x %x\r\n", i, TestBuf1[i+DMA_SRC_OFFSET], TestBuf2[i+DMA_DST_OFFSET]);
DiagPrintf("DMA done = %x\r\n", dma_done);
err = 1;
break;
}
}
if (!err) {
DiagPrintf("DMA Copy Memory Compare OK!! %x\r\n", TestBuf2[DMA_DST_OFFSET+DMA_CPY_LEN - 1]);
}
HalGdmaMemCpyDeInit(&(gdma.gdma_obj));
while(1);
return 0;
}
#else
//Single-Block Example Demo
#define DMA_CPY_LEN 256
#define DMA_SRC_OFFSET 0
#define DMA_DST_OFFSET 0
gdma_t gdma;
uint8_t TestBuf1[512];
uint8_t TestBuf2[512];
volatile uint8_t dma_done;
void dma_done_handler(uint32_t id) {
DiagPrintf("DMA Copy Done!!\r\n");
dma_done = 1;
}
int main(void) {
int i;
int err;
dma_memcpy_init(&gdma, dma_done_handler, (uint32_t)&gdma);
for (i=0;i< 512;i++) {
TestBuf1[i] = i;
}
_memset(TestBuf2, 0xff, 512);
dma_done = 0;
dma_memcpy(&gdma, TestBuf2+DMA_DST_OFFSET, TestBuf1+DMA_SRC_OFFSET, DMA_CPY_LEN);
while (dma_done == 0);
err = 0;
for (i=0;i<DMA_CPY_LEN;i++) {
if (TestBuf2[i+DMA_DST_OFFSET] != TestBuf1[i+DMA_SRC_OFFSET]) {
DiagPrintf("DMA Copy Memory Compare Err, %d %x %x\r\n", i, TestBuf1[i+DMA_SRC_OFFSET], TestBuf2[i+DMA_DST_OFFSET]);
err = 1;
break;
}
}
if (!err) {
DiagPrintf("DMA Copy Memory Compare OK!! %x\r\n", TestBuf2[DMA_DST_OFFSET+DMA_CPY_LEN]);
}
HalGdmaMemCpyDeInit(&(gdma.gdma_obj));
while(1);
return 0;
}
#endif

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Example Description
This example describes how to use GPIO read/write by mbed api.
Requirement Components:
a LED
a push button
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as input with internal pull-high, connect a push button to this pin and ground.
- PC_5 as output, connect a LED to this pin and ground.
In this example, the LED is on when the push button is pressed.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_PUSHBT_PIN PC_4
/**
* @brief Main program.
* @param None
* @retval None
*/
//int main_app(IN u16 argc, IN u8 *argv[])
void main(void)
{
gpio_t gpio_led;
gpio_t gpio_btn;
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin
gpio_init(&gpio_btn, GPIO_PUSHBT_PIN);
gpio_dir(&gpio_btn, PIN_INPUT); // Direction: Input
gpio_mode(&gpio_btn, PullUp); // Pull-High
while(1){
if (gpio_read(&gpio_btn)) {
// turn off LED
gpio_write(&gpio_led, 0);
}
else {
// turn on LED
gpio_write(&gpio_led, 1);
}
}
}

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Example Description
This example describes how to use GPIO read/write by mbed api.
Requirement Components:
a LED
a push button
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as input with internal pull-high, connect a push button to this pin and ground.
- PC_5 as output, connect a LED to this pin and ground.
In this example, push the button to trigger interrupt to turn on/off the LED.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "gpio_irq_api.h" // mbed
#include "diag.h"
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_IRQ_PIN PC_4
int led_ctrl;
gpio_t gpio_led;
extern u32 ConfigDebugWarn;
void gpio_demo_irq_handler (uint32_t id, gpio_irq_event event)
{
gpio_t *gpio_led;
DBG_GPIO_WARN("%s==>\n", __FUNCTION__);
gpio_led = (gpio_t *)id;
led_ctrl = !led_ctrl;
gpio_write(gpio_led, led_ctrl);
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
gpio_irq_t gpio_btn;
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin as interrupt source
gpio_irq_init(&gpio_btn, GPIO_IRQ_PIN, gpio_demo_irq_handler, (uint32_t)(&gpio_led));
gpio_irq_set(&gpio_btn, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_btn);
led_ctrl = 1;
gpio_write(&gpio_led, led_ctrl);
while(1);
}

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Example Description
This example describes how to disable JTAG module and use GPIO pin to blink led.
Requirement Components:
a LED
a push button
PC_4 as input with internal pull-high, connect a push button to this pin and ground.
If button is not pressed while device boot up, then jtag module is turned off.
If button is pressed while device boot up, then we don't turn off jtag module.
PE_0 as output, connect a LED to this pin and ground.
If jatg module is turned off, then we blink led.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "sys_api.h" // for sys_jtag_off()
#include "main.h"
#define GPIO_JTAG_ENABLE_PIN PC_4
#define GPIO_LED_PIN PE_0
void main(void)
{
int i;
gpio_t gpio_jtag_enable;
gpio_t gpio_led;
gpio_init(&gpio_jtag_enable, GPIO_JTAG_ENABLE_PIN);
gpio_dir(&gpio_jtag_enable, PIN_INPUT);
gpio_mode(&gpio_jtag_enable, PullUp);
if (gpio_read(&gpio_jtag_enable) == 0)
{
// JTAG enable pin is disabled
sys_jtag_off();
printf("jtag off\r\n");
// Now you can use jtag pin for other gpio usage
// ex. use PE_0 to blink led
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
while(1)
{
gpio_write(&gpio_led, 1);
for (i=0; i<10000000; i++) asm(" nop"); // simple delay
gpio_write(&gpio_led, 0);
for (i=0; i<10000000; i++) asm(" nop"); // simple delay
}
}
else
{
// JTAG enable pin is enabled
printf("jtag on\r\n");
}
for (;;);
}

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Example Description
This example describes how to implement high/low level trigger on 1 gpio pin.
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
Connect PC_4 and PC_5
- PC_4 as gpio input high/low level trigger.
- PC_5 as gpio output
In this example, PC_5 is signal source that change level to high and low periodically.
PC_4 setup to listen low level events in initial.
When PC_4 catch low level events, it disable the irq to avoid receiving duplicate events.
(NOTE: the level events will keep invoked if level keeps in same level)
Then PC_4 is configured to listen high level events and enable irq.
As PC_4 catches high level events, it changes back to listen low level events.
Thus PC_4 can handle both high/low level events.
In this example, you will see log that prints high/low level event periodically.

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_irq_api.h" // mbed
#include "gpio_irq_ex_api.h"
#include "diag.h"
#include "main.h"
#define GPIO_IRQ_LEVEL_PIN PC_4
#define GPIO_SIGNAL_SOURCE PC_5
gpio_irq_t gpio_level;
int current_level = IRQ_LOW;
void gpio_level_irq_handler (uint32_t id, gpio_irq_event event)
{
uint32_t *level = (uint32_t *) id;
// Disable level irq because the irq will keep triggered when it keeps in same level.
gpio_irq_disable(&gpio_level);
// make some software de-bounce here if the signal source is not stable.
if (*level == IRQ_LOW )
{
printf("low level event\r\n");
// Change to listen to high level event
*level = IRQ_HIGH;
gpio_irq_set(&gpio_level, IRQ_HIGH, 1);
gpio_irq_enable(&gpio_level);
}
else if (*level == IRQ_HIGH)
{
printf("high level event\r\n");
// Change to listen to low level event
*level = IRQ_LOW;
gpio_irq_set(&gpio_level, IRQ_LOW, 1);
gpio_irq_enable(&gpio_level);
}
}
void main(void)
{
int i;
// configure level trigger handler
gpio_irq_init(&gpio_level, GPIO_IRQ_LEVEL_PIN, gpio_level_irq_handler, (uint32_t)(&current_level));
gpio_irq_set(&gpio_level, IRQ_LOW, 1);
gpio_irq_enable(&gpio_level);
// configure gpio as signal source for high/low level trigger
gpio_t gpio_src;
gpio_init(&gpio_src, GPIO_SIGNAL_SOURCE);
gpio_dir(&gpio_src, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_src, PullNone);
while(1) {
gpio_write(&gpio_src, 1);
for (i=0; i<20000000; i++) asm("nop");
gpio_write(&gpio_src, 0);
for (i=0; i<20000000; i++) asm("nop");
}
}

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Example Description
This example describes how to use GPIO read/write in a light weight way.
Requirement Components:
a LED
a push button
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as input with internal pull-high, connect a push button to this pin and ground.
- PC_5 as output, connect a LED to this pin and ground.
In this example, the LED is on when the push button is pressed.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_PUSHBT_PIN PC_4
/* You can improve time cost of gpio write by import source code of
* function "gpio_direct_write" based on your needs.
* In this example, enable CACHE_WRITE_ACTION as demonstration.
*/
#define CACHE_WRITE_ACTION (0)
#if defined(CACHE_WRITE_ACTION) && (CACHE_WRITE_ACTION == 1)
const u8 _GPIO_SWPORT_DR_TBL[] = {
GPIO_PORTA_DR,
GPIO_PORTB_DR,
GPIO_PORTC_DR
};
#endif
void main(void)
{
gpio_t gpio_led;
gpio_t gpio_btn;
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin
gpio_init(&gpio_btn, GPIO_PUSHBT_PIN);
gpio_dir(&gpio_btn, PIN_INPUT); // Direction: Input
gpio_mode(&gpio_btn, PullUp); // Pull-High
#if defined(CACHE_WRITE_ACTION) && (CACHE_WRITE_ACTION == 1)
u8 port_num = HAL_GPIO_GET_PORT_BY_NAME(gpio_led.hal_pin.pin_name);;
u8 pin_num = HAL_GPIO_GET_PIN_BY_NAME(gpio_led.hal_pin.pin_name);;
u8 dr_tbl = _GPIO_SWPORT_DR_TBL[port_num];
u32 RegValue;
#endif
while(1){
#if defined(CACHE_WRITE_ACTION) && (CACHE_WRITE_ACTION == 1)
if (gpio_read(&gpio_btn)) {
// turn off LED
RegValue = HAL_READ32(GPIO_REG_BASE, dr_tbl);
RegValue &= ~(1 << pin_num);
HAL_WRITE32(GPIO_REG_BASE, dr_tbl, RegValue);
} else {
// turn on LED
RegValue = HAL_READ32(GPIO_REG_BASE, dr_tbl);
RegValue |= (1<< pin_num);
HAL_WRITE32(GPIO_REG_BASE, dr_tbl, RegValue);
}
#else
if (gpio_read(&gpio_btn)) {
// turn off LED
gpio_direct_write(&gpio_led, 0);
} else {
// turn on LED
gpio_direct_write(&gpio_led, 1);
}
#endif
}
}

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Example Description
This example describes how to use GPIO Port read/write by mbed api.
Requirement Components:
8 LEDs
2 bords

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "port_api.h" // mbed
#include "PortNames.h" // mbed
#include "main.h"
#define PORT_OUTPUT_TEST 1 //1: output test, 0: input test
#define LED_PATTERN_NUM 12
port_t port0;
const uint8_t led_pattern[LED_PATTERN_NUM]={0x81, 0x42, 0x24, 0x18, 0x00, 0x88, 0x44, 0x22, 0x11, 0xff, 0x00};
const uint8_t My_Port_Def[] = {
PA_6, PA_7, PA_5, PD_4,
PD_5, PA_4, PA_3, PA_2,
0xFF // must end with 0xFF
};
extern void wait_ms(u32);
/**
* @brief Main program.
* @param None
* @retval None
*/
#if PORT_OUTPUT_TEST
void main(void)
{
int i;
unsigned int pin_mask;
port_mode(&port0, PullNone);
// Assign pins to this port
port0.pin_def = (uint8_t*)My_Port_Def;
pin_mask = 0xFF; // each bit map to 1 pin: 0: pin disable, 1: pin enable
port_init(&port0, PortA, pin_mask, PIN_OUTPUT);
while(1){
for (i=0;i<LED_PATTERN_NUM;i++) {
port_write(&port0, led_pattern[i]);
wait_ms(200);
}
}
}
#else
void main(void)
{
int i;
unsigned int pin_mask;
int value_new, value_tmp, value_old;
int stable;
port_mode(&port0, PullNone);
// Assign pins to this port
port0.pin_def = My_Port_Def;
pin_mask = 0xFF; // each bit map to 1 pin: 0: pin disable, 1: pin enable
port_init(&port0, PortA, pin_mask, PIN_INPUT);
value_old = port_read(&port0);
while(1){
// De-bonse
value_new = port_read(&port0);
stable = 0;
while (stable < 3){
value_tmp = port_read(&port0);
if (value_new != value_tmp) {
value_new = value_tmp;
stable = 0;
}
else {
stable++;
}
}
if (value_old != value_new) {
DBG_8195A("0x%x\r\n", value_new);
value_old = value_new;
}
wait_ms(50);
}
}
#endif

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Example Description
This example describes how to use GPIO read/write mbed api to generate a pulse and to measure the pulse width.
Requirement Components:
a wire
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as the interrupt GPIO pin with no pull (High-Z).
- PC_5 as output to generate a pulse.
- Use a wire to connect PC_4 and PC_5
In this example, the UART consol will print out the measured width (in us) of the pulse which generated by PC_5.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "gpio_irq_api.h" // mbed
#include "diag.h"
#include "us_ticker_api.h"
#include "main.h"
#define GPIO_OUT_PIN PC_5
#define GPIO_IRQ_PIN PC_4
gpio_t gpio_out;
gpio_irq_t gpio_irq;
volatile char irq_rise;
void gpio_demo_irq_handler (uint32_t id, gpio_irq_event event)
{
static unsigned int rise_time;
static unsigned int fall_time;
if (irq_rise) {
rise_time = us_ticker_read();
// Changed as Falling Edge Trigger
gpio_irq_set_event(&gpio_irq, IRQ_FALL);
irq_rise = 0;
} else {
fall_time = us_ticker_read();
// Changed as Rising Edge Trigger
gpio_irq_set_event(&gpio_irq, IRQ_RISE);
irq_rise = 1;
DBG_8195A("%d\n", (fall_time-rise_time));
}
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
// Init LED control pin
gpio_init(&gpio_out, GPIO_OUT_PIN);
gpio_dir(&gpio_out, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_out, PullNone); // No pull
gpio_write(&gpio_out, 0);
// Initial Push Button pin as interrupt source
gpio_irq_init(&gpio_irq, GPIO_IRQ_PIN, gpio_demo_irq_handler, (uint32_t)(&gpio_irq));
gpio_irq_set(&gpio_irq, IRQ_RISE, 1); // Falling Edge Trigger
irq_rise = 1;
gpio_irq_pull_ctrl(&gpio_irq, PullNone);
gpio_irq_enable(&gpio_irq);
while(1) {
wait_ms(500);
gpio_write(&gpio_out, 1);
wait_us(1000);
gpio_write(&gpio_out, 0);
}
}

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Example Description
This example describes how to use general timer.
Requirement Components:
2 LED
Connect the two LED to port PC_0 and PC_1 respectivly.
Behavior:
The two LED will blink at different frequence.
Two timers are intialized in this example
(1) Periodic timer
(2) One shut timer

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "timer_api.h"
#include "main.h"
#define GPIO_LED_PIN1 PC_0
#define GPIO_LED_PIN2 PC_1
/**
* @brief Main program.
* @param None
* @retval None
*/
//int main_app(IN u16 argc, IN u8 *argv[])
gtimer_t my_timer1;
gtimer_t my_timer2;
gpio_t gpio_led1;
gpio_t gpio_led2;
volatile uint32_t time2_expired=0;
void timer1_timeout_handler(uint32_t id)
{
gpio_t *gpio_led = (gpio_t *)id;
gpio_write(gpio_led, !gpio_read(gpio_led));
}
void timer2_timeout_handler(uint32_t id)
{
time2_expired = 1;
}
void main(void)
{
// Init LED control pin
gpio_init(&gpio_led1, GPIO_LED_PIN1);
gpio_dir(&gpio_led1, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led1, PullNone); // No pull
gpio_init(&gpio_led2, GPIO_LED_PIN2);
gpio_dir(&gpio_led2, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led2, PullNone); // No pull
// Initial a periodical timer
gtimer_init(&my_timer1, TIMER0);
gtimer_start_periodical(&my_timer1, 1000000, (void*)timer1_timeout_handler, (uint32_t)&gpio_led1);
// Initial a one-shout timer and re-trigger it in while loop
gtimer_init(&my_timer2, TIMER1);
time2_expired = 0;
gtimer_start_one_shout(&my_timer2, 500000, (void*)timer2_timeout_handler, NULL);
while(1){
if (time2_expired) {
gpio_write(&gpio_led2, !gpio_read(&gpio_led2));
time2_expired = 0;
gtimer_start_one_shout(&my_timer2, 500000, (void*)timer2_timeout_handler, NULL);
}
}
}

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Example Description
This example describes how to use general timer API to implement a software RTC.
Behavior:
This example will print the time message to the log UART every 1 sec.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include <time.h>
#include "timer_api.h"
#include "main.h"
#define SW_RTC_TIMER_ID TIMER4
static gtimer_t sw_rtc;
static volatile struct tm rtc_timeinfo;
const static u8 dim[14] = {
31, 0, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, 31, 28 };
static inline bool is_leap_year(unsigned int year)
{
return (!(year % 4) && (year % 100)) || !(year % 400);
}
static u8 days_in_month (u8 month, u8 year)
{
u8 ret = dim [ month - 1 ];
if (ret == 0)
ret = is_leap_year (year) ? 29 : 28;
return ret;
}
static void sw_rtc_tick_handler(uint32_t id)
{
if(++rtc_timeinfo.tm_sec > 59) { // Increment seconds, check for overflow
rtc_timeinfo.tm_sec = 0; // Reset seconds
if(++rtc_timeinfo.tm_min > 59) { // Increment minutes, check for overflow
rtc_timeinfo.tm_min = 0; // Reset minutes
if(++rtc_timeinfo.tm_hour > 23) { // Increment hours, check for overflow
rtc_timeinfo.tm_hour = 0; // Reset hours
++rtc_timeinfo.tm_yday; // Increment day of year
if(++rtc_timeinfo.tm_wday > 6) // Increment day of week, check for overflow
rtc_timeinfo.tm_wday = 0; // Reset day of week
// Increment day of month, check for overflow
if(++rtc_timeinfo.tm_mday >
days_in_month(rtc_timeinfo.tm_mon, rtc_timeinfo.tm_year)) {
rtc_timeinfo.tm_mday = 1; // Reset day of month
if(++rtc_timeinfo.tm_mon > 11) { // Increment month, check for overflow
rtc_timeinfo.tm_mon = 0; // Reset month
rtc_timeinfo.tm_yday = 0; // Reset day of year
++rtc_timeinfo.tm_year; // Increment year
} // - year
} // - month
} // - day
} // - hour
}
}
static void rtc_init(void)
{
// Initial a periodical timer
gtimer_init(&sw_rtc, SW_RTC_TIMER_ID);
// Tick every 1 sec
gtimer_start_periodical(&sw_rtc, 1000000, (void*)sw_rtc_tick_handler, (uint32_t)&sw_rtc);
}
static void rtc_deinit(void)
{
gtimer_stop(&sw_rtc);
gtimer_deinit(&sw_rtc);
}
static void rtc_set_time(uint32_t year, uint8_t mon, uint8_t mday, uint8_t wday,
uint8_t hour, uint8_t min, uint8_t sec)
{
int i;
gtimer_stop(&sw_rtc);
rtc_timeinfo.tm_sec = sec;
rtc_timeinfo.tm_min = min;
rtc_timeinfo.tm_hour = hour;
rtc_timeinfo.tm_mday = mday-1;
rtc_timeinfo.tm_wday = wday-1;
rtc_timeinfo.tm_yday = 0;
for (i=0;i<(mon-1);i++) {
rtc_timeinfo.tm_yday += days_in_month(i,year);
}
rtc_timeinfo.tm_yday += (mday-1);
rtc_timeinfo.tm_mon = mon-1;
rtc_timeinfo.tm_year = year;
gtimer_start(&sw_rtc);
}
static void rtc_read_time(struct tm *timeinfo)
{
_memcpy((void*)timeinfo, (void*)&rtc_timeinfo, sizeof(struct tm));
timeinfo->tm_mon++;
timeinfo->tm_mday++;
timeinfo->tm_wday++;
timeinfo->tm_yday++;
}
void main(void)
{
struct tm timeinfo;
rtc_init();
// Give RTC a initial value: 2015/4/15 (Wed) 12:00:00
rtc_set_time(2015, 4, 15, 3, 12, 0, 0);
while (1) {
rtc_read_time(&timeinfo);
DBG_8195A("%d-%d-%d[%d] %d:%d:%d\r\n", timeinfo.tm_year, timeinfo.tm_mon, timeinfo.tm_mday,
timeinfo.tm_wday, timeinfo.tm_hour, timeinfo.tm_min, timeinfo.tm_sec);
wait_ms(1000);
}
rtc_deinit();
}

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Example Description
This example describes how to use i2c by using mbed api
work with arduino extended board, which has SHTC1 temperature and humidity
sensor
Connect
- I2C3 SDA (PB_3) to extended board's SDA
- I2C3 SCL (PB_2) to extended board's SCL

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#include "device.h"
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include "osdep_api.h"
#include "i2c_api.h"
#include "pinmap.h"
#include "rtl_lib.h"
#define NO_ERROR 0x00
#define ACK_ERROR 0x01
#define CHECKSUM_ERROR 0x02
#define NULL_ERROR 0x03
#define MBED_I2C_MTR_SDA PD_4
#define MBED_I2C_MTR_SCL PD_5
#define MBED_I2C_SLAVE_ADDR0 0x70
#define POLYNOMIAL 0x131 // P(x) = x^8 + x^5 + x^4 + 1 = 100110001
#define MBED_I2C_BUS_CLK 100000 //hz
#define I2C_DATA_MAX_LENGTH 16
uint8_t i2cdata_write[I2C_DATA_MAX_LENGTH];
uint8_t i2cdata_read[I2C_DATA_MAX_LENGTH];
int i2cdata_read_pos;
volatile i2c_t i2cmaster;
// Sensor Commands
#define READ_ID 0xEFC8 // command: read ID register
#define SOFT_RESET 0x805D // soft resetSample Code for SHTC1
#define MEAS_T_RH_POLLING 0x7866 // meas. read T first, clock stretching disabled
#define MEAS_T_RH_CLOCKSTR 0x7CA2 // meas. read T first, clock stretching enabled
#define MEAS_RH_T_POLLING 0x58E0 // meas. read RH first, clock stretching disabled
#define MEAS_RH_T_CLOCKSTR 0x5C24 // meas. read RH first, clock stretching enabled
static int SHTC1_GetID(uint16_t *id);
static void SHTC1_WriteCommand(uint16_t cmd);
static int SHTC1_Read2BytesAndCrc(uint16_t *data);
static int SHTC1_CheckCrc(uint8_t data[], uint8_t nbrOfBytes, uint8_t checksum);
static float SHTC1_CalcTemperature(uint16_t rawValue);
static float SHTC1_CalcHumidity(uint16_t rawValue);
int SHTC1_Init(uint16_t *pID)
{
int error = NO_ERROR;
DiagPrintf("SHTC1_Init \r\n");
i2c_init((i2c_t*)&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency((i2c_t*)&i2cmaster,MBED_I2C_BUS_CLK);
if (pID == NULL ) return NULL_ERROR;
error = SHTC1_GetID(pID);
return error;
}
static int SHTC1_GetID(uint16_t *id)
{
int error = NO_ERROR;
uint8_t bytes[2];
uint8_t checksum;
SHTC1_WriteCommand(READ_ID);
i2c_read((i2c_t*)&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[0], 3, 1);
i2cdata_read_pos = 0;
error = SHTC1_Read2BytesAndCrc(id);
return error;
}
static int SHTC1_Read2BytesAndCrc(uint16_t *data)
{
int error;
int readed;
uint8_t bytes[2];
uint8_t checksum;
bytes[0] = i2cdata_read[i2cdata_read_pos++];
bytes[1] = i2cdata_read[i2cdata_read_pos++];
checksum = i2cdata_read[i2cdata_read_pos++];
error = SHTC1_CheckCrc(bytes, 2, checksum);
*data = (bytes[0] << 8) | bytes[1];
return error;
}
static int SHTC1_CheckCrc(uint8_t data[], uint8_t nbrOfBytes, uint8_t checksum)
{
uint8_t bit; // bit mask
uint8_t crc = 0xFF; // calculated checksum
uint8_t byteCtr; // byte counter
// calculates 8-Bit checksum with given polynomial
for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
{
crc ^= (data[byteCtr]);
for(bit = 8; bit > 0; --bit)
{
if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
else crc = (crc << 1);
}
}
// verify checksum
if(crc != checksum) return CHECKSUM_ERROR;
else return NO_ERROR;
}
static void SHTC1_WriteCommand(uint16_t cmd)
{
int writebytes;
i2cdata_write[0] = (uint8_t)(cmd >>8);
i2cdata_write[1] = (uint8_t)(cmd&0xFF);
i2c_write((i2c_t*)&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdata_write[0], 2, 1);
}
static float SHTC1_CalcTemperature(uint16_t rawValue)
{
return 175.0 * (float)rawValue / 65536.0 - 45.0;
}
static float SHTC1_CalcHumidity(uint16_t rawValue)
{
return 100.0 * (float)rawValue / 65536.0;
}
int SHTC1_GetTempAndHumi(float *temp, float *humi)
{
int error;
uint16_t rawValueTemp;
uint16_t rawValueHumi;
SHTC1_WriteCommand(MEAS_T_RH_CLOCKSTR);
//Wire1.requestFrom(I2C_ADR_SHTC1, 6);
i2c_read((i2c_t*)&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[0], 6, 1);
i2cdata_read_pos = 0;
error = NO_ERROR;
error |= SHTC1_Read2BytesAndCrc(&rawValueTemp);
error |= SHTC1_Read2BytesAndCrc(&rawValueHumi);
//diag_printf("raw temp=0x%x, raw humidity=0x%x, error=%d\n",
// rawValueTemp, rawValueHumi, error);
if ( error == NO_ERROR ) {
*temp = SHTC1_CalcTemperature(rawValueTemp);
*humi = SHTC1_CalcHumidity(rawValueHumi);
}
return error;
}
void main(void)
{
gpio_t gpio_led;
int led_status;
int i2clocalcnt;
int error;
uint16_t shtc1_id;
float temperature = 1.123f;
float humidity = 2.456f;
DBG_8195A("sleep 10 sec. to wait for UART console\n");
RtlMsleepOS(10000);
DBG_8195A("start i2c example - SHTC1\n");
error = SHTC1_Init(&shtc1_id);
if ( error == NO_ERROR ) {
DiagPrintf("SHTC1 init ok, id=0x%x\r\n", shtc1_id);
} else {
DiagPrintf("SHTC1 init FAILED! \r\n");
for(;;);
}
while(1){
error = SHTC1_GetTempAndHumi(&temperature, &humidity);
rtl_printf("temp=%f, humidity=%f, error=%d\n",
temperature, humidity, error);
RtlMsleepOS(1000);
}
}

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Example Description
This example describes how to use i2c by using mbed api
1.Connect LOG-UART connector to PC
2.Connect
- I2C3 SDA (PB_3) to I2C1 SDA (PC_4) pin,
- I2C3 SCL (PB_2) to I2C1 SCL (PC_5) pin.
3.Run the main function.
4.Get the Master and Slave Data.

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include <osdep_api.h>
#include "i2c_api.h"
#include "pinmap.h"
#include "ex_api.h"
#define MBED_I2C_MTR_SDA PB_3
#define MBED_I2C_MTR_SCL PB_2
#define MBED_I2C_SLV_SDA PC_4
#define MBED_I2C_SLV_SCL PC_5
#define MBED_I2C_SLAVE_ADDR0 0xAA
#define MBED_I2C_BUS_CLK 100000 //hz
#define I2C_DATA_LENGTH 127
char i2cdatasrc[I2C_DATA_LENGTH];
char i2cdatadst[I2C_DATA_LENGTH];
char i2cdatardsrc[I2C_DATA_LENGTH];
char i2cdatarddst[I2C_DATA_LENGTH];
//#define I2C_SINGLE_BOARD
#undef I2C_SINGLE_BOARD
#ifndef I2C_SINGLE_BOARD
#define I2C_DUAL_BOARD
#endif
#ifdef I2C_SINGLE_BOARD
#define I2C_MASTER_DEVICE
#define I2C_SLAVE_DEVICE
#endif
#ifdef I2C_DUAL_BOARD
//#define I2C_MASTER_DEVICE
#ifndef I2C_MASTER_DEVICE
#define I2C_SLAVE_DEVICE
#endif
#endif
#define I2C_RESTART_DEMO // test restart
#ifdef I2C_DUAL_BOARD
// Slave
// RX
#define CLEAR_SLV_RXC_FLAG (slaveRXC = 0)
#define SET_SLV_RXC_FLAG (slaveRXC = 1)
#define WAIT_SLV_RXC while(slaveRXC == 0){;}
// Tx
#define CLEAR_SLV_TXC_FLAG (slaveTXC = 0)
#define SET_SLV_TXC_FLAG (slaveTXC = 1)
#define WAIT_SLV_TXC while(slaveTXC == 0){;}
// Master
// Rx
#define CLEAR_MST_RXC_FLAG (masterRXC = 0)
#define SET_MST_RXC_FLAG (masterRXC = 1)
#define WAIT_MST_RXC while(masterRXC == 0){;}
// Tx
#define CLEAR_MST_TXC_FLAG (masterTXC = 0)
#define SET_MST_TXC_FLAG (masterTXC = 1)
#define WAIT_MST_TXC while(masterTXC == 0){;}
#else // #ifdef I2C_DUAL_BOARD
// Slave
// Rx
#define CLEAR_SLV_RXC_FLAG
#define SET_SLV_RXC_FLAG
#define WAIT_SLV_RXC
// Tx
#define CLEAR_SLV_TXC_FLAG
#define SET_SLV_TXC_FLAG
#define WAIT_SLV_TXC
// Master
// Rx
#define CLEAR_MST_RXC_FLAG
#define SET_MST_RXC_FLAG
#define WAIT_MST_RXC
// Tx
#define CLEAR_MST_TXC_FLAG
#define SET_MST_TXC_FLAG
#define WAIT_MST_TXC
#endif // #ifdef I2C_DUAL_BOARD
#if defined (__ICCARM__)
i2c_t i2cmaster;
i2c_t i2cslave;
#else
volatile i2c_t i2cmaster;
volatile i2c_t i2cslave;
#endif
volatile int masterTXC;
volatile int masterRXC;
volatile int slaveTXC;
volatile int slaveRXC;
void i2c_slave_rxc_callback(void *userdata)
{
int i2clocalcnt;
int result = 0;
//DBG_8195A("show slave received data>>>\n");
for (i2clocalcnt = 0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt+=2) {
// DBG_8195A("i2c data: %02x \t %02x\n",i2cdatadst[i2clocalcnt],i2cdatadst[i2clocalcnt+1]);
}
// verify result
result = 1;
for (i2clocalcnt = 0; i2clocalcnt < 1; i2clocalcnt++) {
if (i2cdatasrc[i2clocalcnt] != i2cdatadst[i2clocalcnt]) {
result = 0;
break;
}
}
DBG_8195A("\r\nSlave receive: Result is %s\r\n", (result) ? "success" : "fail");
_memset(&i2cdatadst[0], 0x00, I2C_DATA_LENGTH);
SET_SLV_RXC_FLAG;
}
void i2c_master_rxc_callback(void *userdata)
{
int i2clocalcnt;
int result = 0;
//DBG_8195A("show master received data>>>\n");
for (i2clocalcnt = 0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt+=2) {
//DBG_8195A("i2c data: %02x \t %02x\n",i2cdatarddst[i2clocalcnt],i2cdatarddst[i2clocalcnt+1]);
}
// verify result
result = 1;
for (i2clocalcnt = 0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt++) {
if (i2cdatarddst[i2clocalcnt] != i2cdatardsrc[i2clocalcnt]) {
result = 0;
break;
}
}
DBG_8195A("\r\nMaster receive: Result is %s\r\n", (result) ? "success" : "fail");
}
void i2c_slave_txc_callback(void *userdata)
{
//DBG_8195A("stxc\n");
SET_SLV_TXC_FLAG;
}
void i2c_master_txc_callback(void *userdata)
{
//DBG_8195A("mtxc\n");
SET_MST_TXC_FLAG;
}
void i2c_master_err_callback(void *userdata)
{
DBG_8195A("ERRRRRR:%x\n", i2cmaster.SalI2CHndPriv.SalI2CHndPriv.ErrType);
}
void demo_i2c_master_enable(void)
{
_memset(&i2cmaster, 0x00, sizeof(i2c_t));
i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
i2c_set_user_callback(&i2cmaster, I2C_RX_COMPLETE, i2c_master_rxc_callback);
i2c_set_user_callback(&i2cmaster, I2C_TX_COMPLETE, i2c_master_txc_callback);
i2c_set_user_callback(&i2cmaster, I2C_ERR_OCCURRED, i2c_master_err_callback);
#ifdef I2C_RESTART_DEMO
i2c_restart_enable(&i2cmaster);
#endif
}
void demo_i2c_slave_enable(void)
{
_memset(&i2cslave, 0x00, sizeof(i2c_t));
i2c_init(&i2cslave, MBED_I2C_SLV_SDA ,MBED_I2C_SLV_SCL);
i2c_frequency(&i2cslave,MBED_I2C_BUS_CLK);
i2c_slave_address(&i2cslave, 0, MBED_I2C_SLAVE_ADDR0, 0xFF);
i2c_slave_mode(&i2cslave, 1);
i2c_set_user_callback(&i2cslave, I2C_RX_COMPLETE, i2c_slave_rxc_callback);
i2c_set_user_callback(&i2cslave, I2C_TX_COMPLETE, i2c_slave_txc_callback);
}
void demo_i2c_master_write_1byte(void)
{
DBG_8195A("Mst-W\n");
CLEAR_MST_TXC_FLAG;
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[0], 1, 0);
WAIT_MST_TXC;
DBG_8195A("Mst-W is complete and STOP bit is NOT sent.\n");
}
void demo_i2c_master_write_n_1byte(void)
{
DBG_8195A("Mst-W\n");
CLEAR_MST_TXC_FLAG;
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[1], (I2C_DATA_LENGTH-1), 1);
//wait for master TXC
WAIT_MST_TXC;
}
void demo_i2c_master_write(void)
{
DBG_8195A("Mst-W\n");
CLEAR_MST_TXC_FLAG;
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[0], I2C_DATA_LENGTH, 1);
//wait for master TXC
WAIT_MST_TXC;
}
void demo_i2c_master_read(void)
{
DBG_8195A("Mst-R\n");
DBG_8195A("Mst-R need to wait Slv-W complete.\n");
CLEAR_MST_RXC_FLAG;
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatarddst[0], I2C_DATA_LENGTH, 1);
WAIT_MST_RXC;
}
void demo_i2c_slave_read(void)
{
DBG_8195A("Slv-R\n");
CLEAR_SLV_RXC_FLAG;
i2c_slave_read(&i2cslave, &i2cdatadst[0], I2C_DATA_LENGTH);
WAIT_SLV_RXC;
}
void demo_i2c_slave_read_1byte(void)
{
DBG_8195A("Slv-R\n");
CLEAR_SLV_RXC_FLAG;
i2c_slave_read(&i2cslave, &i2cdatadst[0], 1);
WAIT_SLV_RXC;
}
void demo_i2c_slave_write(void)
{
DBG_8195A("Slv-W\n");
CLEAR_SLV_TXC_FLAG;
i2c_slave_write(&i2cslave, &i2cdatardsrc[0], I2C_DATA_LENGTH);
WAIT_SLV_TXC;
}
void main(void)
{
int i2clocalcnt;
// prepare for transmission
_memset(&i2cdatasrc[0], 0x00, I2C_DATA_LENGTH);
_memset(&i2cdatadst[0], 0x00, I2C_DATA_LENGTH);
_memset(&i2cdatardsrc[0], 0x00, I2C_DATA_LENGTH);
_memset(&i2cdatarddst[0], 0x00, I2C_DATA_LENGTH);
for (i2clocalcnt=0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt++){
i2cdatasrc[i2clocalcnt] = i2clocalcnt+0x2;
}
for (i2clocalcnt=0; i2clocalcnt < I2C_DATA_LENGTH; i2clocalcnt++){
i2cdatardsrc[i2clocalcnt] = i2clocalcnt+1;
}
// ------- Single board -------
#ifdef I2C_SINGLE_BOARD
demo_i2c_master_enable();
demo_i2c_slave_enable();
// Master write - Slave read
demo_i2c_slave_read();
#ifdef I2C_RESTART_DEMO
demo_i2c_master_write_1byte();
demo_i2c_master_write_n_1byte(); // n-1 bytes
#else
demo_i2c_master_write();
#endif
// Master read - Slave write
#ifdef I2C_RESTART_DEMO
demo_i2c_slave_read_1byte();
demo_i2c_master_write_1byte();
#endif
demo_i2c_slave_write();
demo_i2c_master_read();
#endif
//================================================================
// ------- Dual board -------
#ifdef I2C_DUAL_BOARD
#ifdef I2C_MASTER_DEVICE
demo_i2c_master_enable();
// Master write - Slave read
#ifdef I2C_RESTART_DEMO
demo_i2c_master_write_1byte();
demo_i2c_master_write_n_1byte(); // n-1 bytes
#else
demo_i2c_master_write();
#endif
// Master read - Slave write
#ifdef I2C_RESTART_DEMO
demo_i2c_master_write_1byte();
#endif
demo_i2c_master_read();
#endif // #ifdef I2C_MASTER_DEVICE
#ifdef I2C_SLAVE_DEVICE
demo_i2c_slave_enable();
// Master write - Slave read
demo_i2c_slave_read();
// Master read - Slave write
#ifdef I2C_RESTART_DEMO
demo_i2c_slave_read_1byte();
#endif
demo_i2c_slave_write();
#endif // #ifdef I2C_SLAVE_DEVICE
#endif // #ifdef I2C_DUAL_BOARD
while(1){;}
}

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Example Description
this example is use to measure atmos
work with arduino extended board, which has pressure sensor
the terminal will feedback real pressure value which is represented in Pa

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#include "device.h"
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include "osdep_api.h"
#include "i2c_api.h"
#include "pinmap.h"
//#include "rtl_lib.h"
#include "main.h"
#define MBED_I2C_MTR_SDA PB_3
#define MBED_I2C_MTR_SCL PB_2
#define MBED_I2C_INTB PA_5
#define MBED_I2C_SLAVE_ADDR0 0x5D
#define MBED_I2C_BUS_CLK 40000 //hz
#define I2C_DATA_MAX_LENGTH 20
#define malloc pvPortMalloc
#define free vPortFree
uint8_t i2cdata_write[I2C_DATA_MAX_LENGTH];
uint8_t i2cdata_read[I2C_DATA_MAX_LENGTH];
uint16_t cmd;
i2c_t i2cmaster;
int count = 0;
//sensor command
#define SENSOR_START 0x20A0
#define FIFO 0x2E41
#define REBOOT 0x2110
#define READ 0x2101
#define BYPASS 0x2E00
char i2cdatasrc[9] = {0x27, 0x28, 0x29, 0x2A};
//char i2cdatasrc[7] = {0x40, 0x48, 0x50, 0x27, 0x28, 0x29, 0x2A};
static void ePL_WriteCommand(uint16_t cmd)
{
i2cdata_write[0] = (uint8_t)(cmd >>8);
i2cdata_write[1] = (uint8_t)(cmd&0xFF);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdata_write[0], 2, 1);
}
/*
struct node
{
int info;
struct node *ptr;
}*front,*rear,*temp,*front1;
*/
//int frontelement();
//void enq(int data);
//void deq();
/*
void enq(int data)
{
if (rear == NULL)
{
rear = (struct node *)malloc(1*sizeof(struct node));
if(rear == NULL)
{
printf("\n\rmalloc rear failed!\n");
return;
}
rear->ptr = NULL;
rear->info = data;
front = rear;
//printf("front info: %d\n", front->info);
}
else
{
temp=(struct node *)malloc(1*sizeof(struct node));
rear->ptr = temp;
temp->info = data;
temp->ptr = NULL;
rear = temp;
//printf("rear info: %d\n", rear->info);
}
count++;
}
void deq()
{
front1 = front;
//printf("front info before deq: %d\n", front->info);
if (front1 == NULL)
{
printf("Error: Trying to display elements from empty queue\n");
return;
}
else
{
if (front1->ptr != NULL)
{
front1 = front1->ptr;
//printf("\nDequed value : %d\n", front->info);
free(front);
front = front1;
}
else
{
//printf("\nDequed value : %d\n", front->info);
free(front);
front = NULL;
rear = NULL;
}
count--;
}
}
*/
void main(void)
{
int result;
int i, data;
int temprature;
int flag = 0;
int sum = 0;
int average = 0;
struct node *output;
char intertupt;
DiagPrintf("Sensor_Init \r\n");
//for(i=0; i<16; i++)
//printf("ouput before: %d\n", i2cdata_read[i]);
i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
ePL_WriteCommand(SENSOR_START);
ePL_WriteCommand(REBOOT);
//ePL_WriteCommand(BYPASS);
while(1){
//i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[3], 1, 1);
//i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[3], 2, 1);
//printf("Status Reg: %d\n", i2cdata_read[3]);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[1], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[1], 2, 1);
//printf("--------pressure output LSB: %d\n", i2cdata_read[4]);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[2], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[2], 2, 1);
//printf("--------pressure output MID: %d\n", i2cdata_read[5]);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[3], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[3], 2, 1);
//printf("--------pressure output MSB: %d\n", i2cdata_read[6]);
Mdelay(2000);
data = (i2cdata_read[3]*256*256*100+i2cdata_read[2]*256*100+i2cdata_read[1]*100)/4128;
printf("pressure: %dPa\n", data);
/*
if(count == 20)
{
deq();
}
enq(data);
output = front;
sum = front->info;
while(output->ptr != NULL)
{
output = output->ptr;
sum = sum + output->info;
}
//printf("------count = %d---------\n", count);
average = sum / count;
//printf("---final output: %d---\n", average);
*/
}
Mdelay(1000);
}

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/*******************************************************************************
HRM.h - Definition header
*******************************************************************************/
#ifndef HRM_H
#define HRM_H
#include <stdint.h>
//------------------------------------------------------
#define HR_SAMPLE_RATE 25// Hz
#define HR_INTEG_MIN HR_INTEG_40
#define HR_INTEG_BASE HR_INTEG_250
#define HR_INTEG_MAX HR_INTEG_250
#define HR_TH_HIGH 63000
#define HR_TH_LOW 30000
//------------------------------------------------------
// HRM I2C address & register sub-addresses
#define HR_SLAVE_ADDRESS 0x82
#define HR_FILTER_1 0<<5
#define HR_FILTER_2 1<<5
#define HR_FILTER_4 2<<5
#define HR_FILTER_8 3<<5
#define HR_FILTER_16 4<<5
#define HR_FILTER_32 5<<5
#define HR_FILTER_64 6<<5
#define HR_FILTER_128 7<<5
#define HR_MODE_HR 1<<4
#define HR_MODE_HRS 9<<4
#define HR_GAIN_MID 1
#define HR_GAIN_LOW 3
#define HR_INTEG_20 5
#define HR_INTEG_25 6
#define HR_INTEG_30 7
#define HR_INTEG_40 8
#define HR_INTEG_55 9
#define HR_INTEG_70 10
#define HR_INTEG_90 11
#define HR_INTEG_110 12
#define HR_INTEG_150 13
#define HR_INTEG_200 14
#define HR_INTEG_250 15
#define HR_INTEG_350 16
#define HR_INTEG_450 17
#define HR_INTEG_550 18
#define HR_OSR_64 0<<2
#define HR_OSR_256 1<<2
#define HR_OSR_1024 2<<2
#define HR_OSR_2048 3<<2
#define HR_RESETN_RESET 0<<2
#define HR_RESETN_RUN 1<<2
#define HR_PDRIVE_70MA 0<<4
#define HR_PDRIVE_35MA 1<<4
#define HR_PDRIVE_200MA 2<<4
#define HR_PDRIVE_100MA 3<<4
#define HR_INT_FRAME 1<<2
#define HR_INT_DISABLED 2<<2
#define HR_IR_DISABLE 0<<7
#define HR_IR_ENABLE 1<<7
//------------------------------------------------------
// Declarations
void init_hrm(void);
uint16_t read_hrm(void);
#endif /* HRM_H */

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/*
* heart_interface.h
*
* Created on: 2014/4/29
* Author: 01004
*/
#ifndef HEART_INTERFACE_H_
#define HEART_INTERFACE_H_
#define MIN_HEART_RATE 48
#define MAX_HEART_RATE 180
extern int g_heartrate;
typedef void (*hr_callback)(int);
/*
* If there is no g-sensor, fill x, y, z in 0.
*/
void add_PPG_XYZ(int ppg, short xx, short yy, short zz);
/*
* A callback to handle heartrate events.
*/
void register_callback(hr_callback callback);
/*
* Ex: report_period = 25.
* it means report a heart rate every 25 samples.
*/
void start(int report_period);
void reset(void);
void stop(void);
#endif /* HEART_INTERFACE_H_ */

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Example Description
this example is use to measure heart rate of human
Requirement Components:
extend board
work with arduino extended board, which has heart rate sensor
during the measurement, user has to lie his pulp on the sensor and do not rock the sensor
the test code will return back the heart rate
Build code
1. Please be sure to copy inc\heart_interface.h, inc\HRM_2197.h
2. Include hr_library.a in IAR project. Add hr_library.a into folder "lib" in IAR project.

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/*******************************************************************************
* HRM.c - Eminent Heart Rate Module (HRM) routines via I2C
*******************************************************************************/
#include "HRM_2197.h"
#include <stdio.h>
#include <time.h>
//#include <windows.h>
#include "heart_interface.h"
#include "device.h"
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include "osdep_api.h"
#include "i2c_api.h"
#include "pinmap.h"
//#include "rtl_lib.h"
#include "gpio_api.h" // mbed
#include "main.h"
#define MBED_I2C_SLAVE_ADDR0 0x41
#define HR_MODE 0x001b
#define LED_ENABLE 0x3081
#define FRAME_ENABLE 0x4804
#define CHIP_RESET 0x4000
#define CHIP_RUN 0x4004
#define DATA_LOCK 0x4005
#define DATA_UNLOCK 0x4004
#define I2C_DATA_MAX_LENGTH 20
#define CLOCK_SET 0x3800
#define MBED_I2C_MTR_SDA PB_3
#define MBED_I2C_MTR_SCL PB_2
#define MBED_I2C_INTB PA_5
#define MBED_I2C_BUS_CLK 100000 //hz
uint8_t i2cdata_write[I2C_DATA_MAX_LENGTH];
uint8_t i2cdata_read[I2C_DATA_MAX_LENGTH];
uint16_t cmd;
i2c_t i2cmaster;
uint8_t integ_time = HR_INTEG_MIN;
int integ_time_array[] = { 4, 6, 8, 10, 15, 20, 25, 30, 40, 55, 70, 90, 110, 150, 200, 250, 350, 450, 550 };
//Step1. define the callback to handle event of heart rate update
/*******************************************************************************
* report heart rate every 1 second
*******************************************************************************/
void on_heartrate_update(int heartrate) {
printf("heart rate %d\n", heartrate);
//fflush(stdout);
}
char i2cdatasrc[3] = {0x68, 0x90, 0x98};
static void ePL_WriteCommand(uint16_t cmd)
{
i2cdata_write[0] = (uint8_t)(cmd >>8);
i2cdata_write[1] = (uint8_t)(cmd&0xFF);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdata_write[0], 2, 1);
}
uint16_t read_hrm(void) {
uint32_t raw, normalized_raw;
int integ_time_changed = 0;
ePL_WriteCommand(DATA_LOCK);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[1], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[1], 2, 1);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[2], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[2], 2, 1);
raw = i2cdata_read[1];
raw |= (uint16_t) i2cdata_read[2] << 8;
normalized_raw = raw >> 4;
normalized_raw = normalized_raw * integ_time_array[HR_INTEG_BASE];
normalized_raw = normalized_raw / integ_time_array[integ_time];
if (raw > HR_TH_HIGH && integ_time > HR_INTEG_MIN) {
integ_time -= 1;
integ_time_changed = 1;
} else if (raw < HR_TH_LOW && integ_time < HR_INTEG_MAX) {
integ_time += 1;
integ_time_changed = 1;
}
if (integ_time_changed == 1) {
ePL_WriteCommand(((0x01<<3)<<8) | ( HR_FILTER_4 | integ_time));
ePL_WriteCommand(((0x08<<3)<<8) | ( HR_RESETN_RESET));
}
ePL_WriteCommand(((0x08<<3)<<8) | ( HR_RESETN_RUN));
return normalized_raw;
}
/*******************************************************************************
* main function to read data, input to library,
* and calculate heart rate
*******************************************************************************/
void main(void) {
int i, length;
int *data;
int should_stop = 0;
uint16_t result;
data = (int*) calloc(3000, sizeof(int));
//load_ppg_signal(data, &length); //Load Test Data From File
i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
//Step2. delegate the event of heart rate update
register_callback(on_heartrate_update);
//Step3. Set the data length of heart rate calculation= 2^9 = 512
ePL_WriteCommand(((0x00<<3)<<8) | ( HR_MODE_HRS | HR_OSR_1024 | HR_GAIN_MID));
ePL_WriteCommand(((0x01<<3)<<8) | ( HR_FILTER_4 | integ_time));
ePL_WriteCommand(((0x09<<3)<<8) | ( HR_PDRIVE_70MA));
ePL_WriteCommand(((0x06<<3)<<8) | ( HR_IR_ENABLE | HR_INT_FRAME));
ePL_WriteCommand(((0x08<<3)<<8) | ( HR_RESETN_RESET));
while(1) {
//Step4. Add ppg data continuously, and the Lib will return the Heart Rate 1 time/sec
result = read_hrm();
if(result>100)
add_PPG_XYZ(result, 0, 0, 0);
Mdelay(40); //Simulate the ppg input time interval = 40ms
if(should_stop)
break;
}
//Step5. Stop
stop();
free(data);
}
/*******************************************************************************
* initialize ic parameters
*******************************************************************************/
/*******************************************************************************
* read rawdata
*******************************************************************************/

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Example Description
This example describes how to use proximity sensor to detect lightness
Requirement Components:
extend board
work with arduino extended board, which has proximity sensor
when the proximity sensor is in ALS mode (detect lightness), it will keep polling lightness output.

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project/realtek_ameba1_va0_example/example_sources/i2c_epl2590_light/src/main.c Normal file
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#include "device.h"
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include "osdep_api.h"
#include "i2c_api.h"
#include "pinmap.h"
//#include "rtl_lib.h"
#include "main.h"
#define MBED_I2C_MTR_SDA PB_3
#define MBED_I2C_MTR_SCL PB_2
#define MBED_I2C_INTB PA_5
#define MBED_I2C_SLAVE_ADDR0 0x49
#define MBED_I2C_BUS_CLK 100000 //hz
#define I2C_DATA_MAX_LENGTH 20
uint8_t i2cdata_write[I2C_DATA_MAX_LENGTH];
uint8_t i2cdata_read[I2C_DATA_MAX_LENGTH];
uint16_t cmd;
i2c_t i2cmaster;
//sensor command
#define WAKE_UP 0x1102
#define CHIP_REFRESH1 0xFD8E
#define CHIP_REFRESH2 0xFE22
#define CHIP_REFRESH3 0xFE02
#define CHIP_REFRESH4 0xFD00
#define PS_MODE 0x0002
#define ALS_MODE 0x0001
#define POWER_UP 0x1102
#define CHIP_RESET 0x1100
#define CHANGE_TIME 0x0851
#define SETTING_1 0x0F19
#define SETTING_2 0x0D10
#define INT 0x3022
char i2cdatasrc[5] = {0x1B, 0x15, 0x16, 0x80, 0x88};
static void ePL_WriteCommand(uint16_t cmd)
{
i2cdata_write[0] = (uint8_t)(cmd >>8);
i2cdata_write[1] = (uint8_t)(cmd&0xFF);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdata_write[0], 2, 1);
}
void main(void)
{
int result;
int i;
int light = 0;
int flag = 0;
char intertupt;
DiagPrintf("Sensor_Init \r\n");
i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
ePL_WriteCommand(WAKE_UP);
ePL_WriteCommand(CHIP_REFRESH1);
ePL_WriteCommand(CHIP_REFRESH2);
ePL_WriteCommand(CHIP_REFRESH3);
ePL_WriteCommand(CHIP_REFRESH4);
ePL_WriteCommand(ALS_MODE);
//ePL_WriteCommand(SETTING_1);
//ePL_WriteCommand(SETTING_2);
ePL_WriteCommand(CHIP_RESET);
ePL_WriteCommand(POWER_UP);
Mdelay(240);
while(1){
//ePL_WriteCommand(DATA_LOCK);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[0], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[0], 2, 1);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[1], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[1], 2, 1);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[2], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[2], 2, 1);
// printf("ALS LOW: %d\n", i2cdata_read[1]);
//printf("ALS HIGH: %d\n", i2cdata_read[2]);
light = i2cdata_read[1] + i2cdata_read[2] * 256;
printf("lightness: %d\n", light);
//flag = (i2cdata_read[0] & 8)? 1:0;
//int ret = (i2cdata_read[0] & 4)? 1:0;
//printf("flag: %d\n", flag);
//printf("ret: %d\n", ret);
//ePL_WriteCommand(POWER_UP);
Mdelay(1000);
}
}

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project/realtek_ameba1_va0_example/example_sources/i2c_epl2590_proximity/readme.txt Normal file
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Example Description
This example describes how to use proximity sensor to detect distance
Requirement Components:
extend board
work with arduino extended board, which has proximity sensor
When the proximity sensor is in PS mode (detect distance), if the object is close to the sensor, a near message will print out. Otherwise a far message will print out.

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project/realtek_ameba1_va0_example/example_sources/i2c_epl2590_proximity/src/main.c Normal file
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#include "device.h"
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include "osdep_api.h"
#include "i2c_api.h"
#include "pinmap.h"
//#include "rtl_lib.h"
#include "main.h"
#define MBED_I2C_MTR_SDA PB_3
#define MBED_I2C_MTR_SCL PB_2
#define MBED_I2C_INTB PA_5
#define MBED_I2C_SLAVE_ADDR0 0x49
#define MBED_I2C_BUS_CLK 100000 //hz
#define I2C_DATA_MAX_LENGTH 20
uint8_t i2cdata_write[I2C_DATA_MAX_LENGTH];
uint8_t i2cdata_read[I2C_DATA_MAX_LENGTH];
uint16_t cmd;
i2c_t i2cmaster;
//sensor command
#define WAKE_UP 0x1102
#define CHIP_REFRESH1 0xFD8E
#define CHIP_REFRESH2 0xFE22
#define CHIP_REFRESH3 0xFE02
#define CHIP_REFRESH4 0xFD00
#define PS_MODE 0x0002
#define ALS1_MODE 0x0072
#define ALS2_MODE 0x503E
#define ALS3_MODE 0x583E
#define POWER_UP 0x1102
#define CHIP_RESET 0x1100
#define CHANGE_TIME 0x0851
#define SETTING_1 0x0F19
#define SETTING_2 0x0D10
#define INT 0x3022
char i2cdatasrc[5] = {0x1B, 0x1E, 0x1F, 0x80, 0x88};
static void ePL_WriteCommand(uint16_t cmd)
{
i2cdata_write[0] = (uint8_t)(cmd >>8);
i2cdata_write[1] = (uint8_t)(cmd&0xFF);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdata_write[0], 2, 1);
}
void main(void)
{
int result;
int i;
int flag = 0;
char intertupt;
DiagPrintf("Sensor_Init \r\n");
i2c_init(&i2cmaster, MBED_I2C_MTR_SDA ,MBED_I2C_MTR_SCL);
i2c_frequency(&i2cmaster,MBED_I2C_BUS_CLK);
ePL_WriteCommand(WAKE_UP);
ePL_WriteCommand(CHIP_REFRESH1);
ePL_WriteCommand(CHIP_REFRESH2);
ePL_WriteCommand(CHIP_REFRESH3);
ePL_WriteCommand(CHIP_REFRESH4);
ePL_WriteCommand(PS_MODE);
ePL_WriteCommand(SETTING_1);
ePL_WriteCommand(SETTING_2);
ePL_WriteCommand(CHIP_RESET);
ePL_WriteCommand(POWER_UP);
Mdelay(240);
while(1){
//ePL_WriteCommand(DATA_LOCK);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[0], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[0], 2, 1);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[1], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[1], 2, 1);
i2c_write(&i2cmaster, MBED_I2C_SLAVE_ADDR0, &i2cdatasrc[2], 1, 1);
i2c_read(&i2cmaster, MBED_I2C_SLAVE_ADDR0, (char*)&i2cdata_read[2], 2, 1);
//printf("PS LOW: %d\n", i2cdata_read[1]);
//printf("PS HIGH: %d\n", i2cdata_read[2]);
flag = (i2cdata_read[0] & 8)? 1:0;
int ret = (i2cdata_read[0] & 4)? 1:0;
//printf("flag: %d\n", flag);
//printf("ret: %d\n", ret);
if(flag){
printf("the object is far\n");
}
else
{
printf("the object is near\n");
}
//ePL_WriteCommand(POWER_UP);
Mdelay(1000);
}
}

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Example Description
This example describes how to use i2s by using mbed extend api
1.Plug ALC5651 shield to Ameba HDK
2.Run the main function.
3.Plug earphone to Green phone jack

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#include <stdio.h>
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include <osdep_api.h>
#include "i2c_api.h"
#include "pinmap.h"
//#define I2C_MTR_SDA PC_4//PB_3
//#define I2C_MTR_SCL PC_5//PB_2
#define I2C_MTR_SDA PB_3
#define I2C_MTR_SCL PB_2
#define I2C_BUS_CLK 100000 //hz
#define I2C_ALC5651_ADDR (0x34/2)
#define RT5651_PRIV_INDEX 0x6a
#define RT5651_PRIV_DATA 0x6c
#if defined (__ICCARM__)
i2c_t alc5651_i2c;
#else
volatile i2c_t alc5651_i2c;
#define printf DBG_8195A
#endif
static void alc5651_delay(void)
{
int i;
i=10000;
while (i) {
i--;
asm volatile ("nop\n\t");
}
}
void alc5651_reg_write(unsigned int reg, unsigned int value)
{
char buf[4];
buf[0] = (char)reg;
buf[1] = (char)(value>>8);
buf[2] = (char)(value&0xff);
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 3, 1);
alc5651_delay();
}
void alc5651_reg_read(unsigned int reg, unsigned int *value)
{
int tmp;
char *buf = (char*)&tmp;
buf[0] = (char)reg;
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 1, 1);
alc5651_delay();
buf[0] = 0xaa;
buf[1] = 0xaa;
i2c_read(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 2, 1);
alc5651_delay();
*value= ((buf[0]&0xFF)<<8)|(buf[1]&0xFF);
}
void alc5651_index_write(unsigned int reg, unsigned int value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_write(RT5651_PRIV_DATA, value);
}
void alc5651_index_read(unsigned int reg, unsigned int *value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_read(RT5651_PRIV_DATA, value);
}
void alc5651_reg_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec reg dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_reg_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_index_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec index dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_index_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_init(void)
{
i2c_init(&alc5651_i2c, I2C_MTR_SDA, I2C_MTR_SCL);
i2c_frequency(&alc5651_i2c, I2C_BUS_CLK);
}
void alc5651_set_word_len(int len_idx) // interface2
{
// 0: 16 1: 20 2: 24 3: 8
unsigned int val;
alc5651_reg_read(0x71,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x71,val);
alc5651_reg_read(0x70,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x70,val);
}
void alc5651_init_interface1(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x27,0x3820);
alc5651_reg_write(0x77,0x0000);
}
void alc5651_init_interface2(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x28,0x3030);
alc5651_reg_write(0x2F,0x0080);
}

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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_11025_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_16000_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_22050_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_24000_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_32000_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_44100_2ch_16b.c Normal file
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project/realtek_ameba1_va0_example/example_sources/i2s/src/birds_48000_2ch_16b.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "main.h"
#include "i2s_api.h"
/**
* @brief Main program.
* @param None
* @retval None
*/
#include "alc5651.c"
/*
extern void alc5651_init(void);
extern void alc5651_init_interface2(void);
extern void alc5651_reg_dump(void);
extern void alc5651_index_dump(void);
extern void alc5651_set_word_len(int len_idx);
*/
i2s_t i2s_obj;
#define I2S_DMA_PAGE_SIZE 768 // 2 ~ 4096
#define I2S_DMA_PAGE_NUM 4 // Vaild number is 2~4
u8 i2s_tx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
u8 i2s_rx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
#define SAMPLE_FILE
#define SAMPLE_FILE_RATE 44100
#define SAMPLE_FILE_CHNUM 2
#define I2S_SCLK_PIN PC_1
#define I2S_WS_PIN PC_0
#define I2S_SD_PIN PC_2
#if defined(SAMPLE_FILE)
// no sample
// SR_96KHZ,
// SR_7p35KHZ,
// SR_29p4KHZ,
// SR_88p2KHZ
#if SAMPLE_FILE_RATE==8000
#if SAMPLE_FILE_CHNUM==2
#include "birds_8000_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_8KHZ
#endif
#elif SAMPLE_FILE_RATE==11025
#if SAMPLE_FILE_CHNUM==2
#include "birds_11025_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_11p02KHZ
#endif
#elif SAMPLE_FILE_RATE==16000
#if SAMPLE_FILE_CHNUM==2
#include "birds_16000_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_16KHZ
#endif
#elif SAMPLE_FILE_RATE==22050
#if SAMPLE_FILE_CHNUM==2
#include "birds_22050_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_22p05KHZ
#endif
#elif SAMPLE_FILE_RATE==24000
#if SAMPLE_FILE_CHNUM==2
#include "birds_24000_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_24KHZ
#endif
#elif SAMPLE_FILE_RATE==32000
#if SAMPLE_FILE_CHNUM==2
#include "birds_32000_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_32KHZ
#endif
#elif SAMPLE_FILE_RATE==44100
#if SAMPLE_FILE_CHNUM==2
#include "birds_44100_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_44p1KHZ
#endif
#elif SAMPLE_FILE_RATE==48000
#if SAMPLE_FILE_CHNUM==2
#include "birds_48000_2ch_16b.c"
#undef SAMPLE_FILE_RATE
#define SAMPLE_FILE_RATE SR_48KHZ
#endif
#endif
#if SAMPLE_FILE_CHNUM==2
#undef SAMPLE_FILE_CHNUM
#define SAMPLE_FILE_CHNUM CH_STEREO
#endif
int curr_cnt=0;
#else
short test_sine16[16]={0, 12539/4, 23170/4, 30273/4, 32767/4, 30273/4, 23170/4, 12539/4,
0, -12539/4, -23170/4, -30273/4, -32767/4, -30273/4, -23170/4, -12539/4};
int test_sine24[16]={0, 12539*256/4, 23170*256/4, 30273*256/4, 32767*256/4, 30273*256/4, 23170*256/4, 12539*256/4,
0, -12539*256/4, -23170*256/4, -30273*256/4, -32767*256/4, -30273*256/4, -23170*256/4, -12539*256/4};
extern void wait_ms(u32);
#include <math.h>
short remap_level_to_signed_16_bit(float val)
{
val*=32767;
if(val>32767) val=32767;
if(val<-32768) val=-32768;
return val;
}
void generate_freq_16bit(short *buffer, int count, float freq, float sampling_rate)
{
int pos; // sample number we're on
for (pos = 0; pos < count; pos++) {
float a = 2 * 3.14159f * freq * pos / sampling_rate;
// convert from [-1.0,1.0] to [-32767,32767]:
buffer[pos] = remap_level_to_signed_16_bit(a);
}
}
void gen_sound_sample16(short *buf, int buf_size, int channel_num)
{
int i;
for (i = 0 ; i < buf_size ; i+=channel_num){
buf[i] = test_sine16[(i/channel_num)%16];
if(channel_num>=2)
buf[i+1] = test_sine16[(i/channel_num)%16];
}
}
void gen_sound_sample24(int *buf, int buf_size, int channel_num)
{
int i;
for (i = 0 ; i < buf_size ; i+=channel_num){
buf[i] = test_sine24[(i/channel_num)%16]&0xFFFFFF;
if(channel_num>=2)
//buf[i+1] = test_sine24[(i/channel_num)%16]&0xFFFFFF;
buf[i+1] = test_sine24[(i/channel_num)%16]&0xFFFFFF;
}
}
#if 0
void test_delay(int sec)
{
for(int i=0;i<166*1000*100*sec;i++)
asm(" nop");
}
#endif
int test_rate_list[12] = {
SR_8KHZ,
SR_16KHZ,
SR_24KHZ,
SR_32KHZ,
SR_48KHZ,
SR_96KHZ,
SR_7p35KHZ,
SR_11p02KHZ,
SR_22p05KHZ,
SR_29p4KHZ,
SR_44p1KHZ,
SR_88p2KHZ
};
#endif
void test_tx_complete(void *data, char *pbuf)
{
int *ptx_buf;
i2s_t *obj = (i2s_t *)data;
static u32 count=0;
//DBG_8195A_I2S_LVL(VERI_I2S_LVL, "I2S%d %s\n",pI2SDemoHnd->DevNum,__func__);
count++;
if ((count&1023) == 1023)
{
DBG_8195A_I2S_LVL(VERI_I2S_LVL, ",\n");
}
ptx_buf = i2s_get_tx_page(obj);
//ptx_buf = (int*)pbuf;
#if defined(SAMPLE_FILE)
_memcpy((void*)ptx_buf, (void*)&sample[curr_cnt], I2S_DMA_PAGE_SIZE);
curr_cnt+=(I2S_DMA_PAGE_SIZE/sizeof(short));
if(curr_cnt >= sample_size*(obj->channel_num==CH_MONO?1:2)) {
curr_cnt = 0;
}
#else
if(obj->word_length == WL_16b){
gen_sound_sample16((short*)ptx_buf, I2S_DMA_PAGE_SIZE/sizeof(short), obj->channel_num==CH_MONO?1:2);
}else{
gen_sound_sample24((int*)ptx_buf, I2S_DMA_PAGE_SIZE/sizeof(int), obj->channel_num==CH_MONO?1:2);
}
#endif
i2s_send_page(obj, (uint32_t*)ptx_buf);
}
void test_rx_complete(void *data, char* pbuf)
{
i2s_t *obj = (i2s_t *)data;
int *ptx_buf;
static u32 count=0;
count++;
if ((count&1023) == 1023)
{
DBG_8195A_I2S_LVL(VERI_I2S_LVL, ".\n");
}
ptx_buf = i2s_get_tx_page(obj);
_memcpy((void*)ptx_buf, (void*)pbuf, I2S_DMA_PAGE_SIZE);
i2s_recv_page(obj); // submit a new page for receive
i2s_send_page(obj, (uint32_t*)ptx_buf); // loopback
}
void main(void)
{
int *ptx_buf;
int i,j;
alc5651_init();
alc5651_init_interface2(); // connect to ALC interface 2
// dump register
//alc5651_reg_dump();
//alc5651_index_dump();
// I2S init
i2s_obj.channel_num = CH_MONO;//CH_STEREO;
i2s_obj.sampling_rate = SR_44p1KHZ;
i2s_obj.word_length = WL_16b;
i2s_obj.direction = I2S_DIR_TXRX;
i2s_init(&i2s_obj, I2S_SCLK_PIN, I2S_WS_PIN, I2S_SD_PIN);
i2s_set_dma_buffer(&i2s_obj, (char*)i2s_tx_buf, (char*)i2s_rx_buf, \
I2S_DMA_PAGE_NUM, I2S_DMA_PAGE_SIZE);
i2s_tx_irq_handler(&i2s_obj, (i2s_irq_handler)test_tx_complete, (uint32_t)&i2s_obj);
i2s_rx_irq_handler(&i2s_obj, (i2s_irq_handler)test_rx_complete, (uint32_t)&i2s_obj);
#if defined(SAMPLE_FILE)
i2s_set_param(&i2s_obj,SAMPLE_FILE_CHNUM,SAMPLE_FILE_RATE,WL_16b);
for (i=0;i<I2S_DMA_PAGE_NUM;i++) {
ptx_buf = i2s_get_tx_page(&i2s_obj);
if (ptx_buf) {
_memcpy((void*)ptx_buf, (void*)&sample[curr_cnt], I2S_DMA_PAGE_SIZE);
i2s_send_page(&i2s_obj, (uint32_t*)ptx_buf);
curr_cnt+=(I2S_DMA_PAGE_SIZE/sizeof(short));
if(curr_cnt >= sample_size*(i2s_obj.channel_num==CH_MONO?1:2)) {
curr_cnt = 0;
}
}
}
#else
// output freq, @ sampling rate
// 6kHz @ 96kHz
// 3kHz @ 48kHz
// 2kHz @ 32kHz
// 1.5kHz @ 24kHz
// 1kHz @ 16kHz
// 500Hz @ 8kHz
// 5512.5 Hz @ 88200Hz
// 2756.25 Hz @ 44100Hz
// 1837.5 Hz @ 29400Hz
// 1378.125 Hz @ 22050Hz
// 459.375 Hz @ 7350Hz
// Stereo, 16bit
for(i=0;i<12;i++){
i2s_set_param(&i2s_obj,CH_STEREO,test_rate_list[i],WL_16b);
// Start with fill all pages of DMA buffer
for (j=0;j<I2S_DMA_PAGE_NUM;j++) {
ptx_buf = i2s_get_tx_page(&i2s_obj);
if (ptx_buf) {
gen_sound_sample16((short*)ptx_buf, I2S_DMA_PAGE_SIZE/sizeof(short), 2);
i2s_send_page(&i2s_obj, (uint32_t*)ptx_buf);
}
}
wait_ms(5000); // delay 5 sec.
}
// Mono, 16bit
for(i=0;i<12;i++){
i2s_set_param(&i2s_obj,CH_MONO,test_rate_list[i],WL_16b);
for (j=0;j<I2S_DMA_PAGE_NUM;j++) {
ptx_buf = i2s_get_tx_page(&i2s_obj);
if (ptx_buf) {
gen_sound_sample16((short*)ptx_buf, I2S_DMA_PAGE_SIZE/sizeof(short), 1);
i2s_send_page(&i2s_obj, (uint32_t*)ptx_buf);
}
}
wait_ms(5000); // delay 5 sec.
}
// i2s_deinit(&i2s_obj);
i2s_disable(&i2s_obj);
alc5651_set_word_len(2);
alc5651_reg_dump();
i2s_enable(&i2s_obj);
// Stereo, 24bit
for(i=0;i<12;i++){
i2s_set_param(&i2s_obj,CH_STEREO,test_rate_list[i],WL_24b);
for (j=0;j<I2S_DMA_PAGE_NUM;j++) {
ptx_buf = i2s_get_tx_page(&i2s_obj);
if (ptx_buf) {
gen_sound_sample24((int*)ptx_buf, I2S_DMA_PAGE_SIZE/sizeof(int), 2);
i2s_send_page(&i2s_obj, (uint32_t*)ptx_buf);
}
}
wait_ms(5000); // delay 5 sec.
}
// Not Support Mono, 24bit
i2s_deinit(&i2s_obj);
#endif
while(1);
}

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Example Description
This example describes how to use i2s by using mbed extend api
Use TXRX mode to archive software bypass mode
NOTE: RX need clock generated by TX. This mode can do TX/RX in the same time.
1.Plug ALC5651 shield to Ameba HDK
2.Run the main function.
3.Plug earphone to Green phone jack
4.Plug audio source to Red phone jack

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#include <stdio.h>
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include <osdep_api.h>
#include "i2c_api.h"
#include "pinmap.h"
//#define I2C_MTR_SDA PC_4//PB_3
//#define I2C_MTR_SCL PC_5//PB_2
#define I2C_MTR_SDA PB_3
#define I2C_MTR_SCL PB_2
#define I2C_BUS_CLK 100000 //hz
#define I2C_ALC5651_ADDR (0x34/2)
#define RT5651_PRIV_INDEX 0x6a
#define RT5651_PRIV_DATA 0x6c
#if defined (__ICCARM__)
i2c_t alc5651_i2c;
#else
volatile i2c_t alc5651_i2c;
#define printf DBG_8195A
#endif
static void alc5651_delay(void)
{
int i;
i=10000;
while (i) {
i--;
asm volatile ("nop\n\t");
}
}
void alc5651_reg_write(unsigned int reg, unsigned int value)
{
char buf[4];
buf[0] = (char)reg;
buf[1] = (char)(value>>8);
buf[2] = (char)(value&0xff);
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 3, 1);
alc5651_delay();
}
void alc5651_reg_read(unsigned int reg, unsigned int *value)
{
int tmp;
char *buf = (char*)&tmp;
buf[0] = (char)reg;
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 1, 1);
alc5651_delay();
buf[0] = 0xaa;
buf[1] = 0xaa;
i2c_read(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 2, 1);
alc5651_delay();
*value= ((buf[0]&0xFF)<<8)|(buf[1]&0xFF);
}
void alc5651_index_write(unsigned int reg, unsigned int value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_write(RT5651_PRIV_DATA, value);
}
void alc5651_index_read(unsigned int reg, unsigned int *value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_read(RT5651_PRIV_DATA, value);
}
void alc5651_reg_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec reg dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_reg_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_index_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec index dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_index_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_init(void)
{
i2c_init(&alc5651_i2c, I2C_MTR_SDA, I2C_MTR_SCL);
i2c_frequency(&alc5651_i2c, I2C_BUS_CLK);
}
void alc5651_set_word_len(int len_idx) // interface2
{
// 0: 16 1: 20 2: 24 3: 8
unsigned int val;
alc5651_reg_read(0x71,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x71,val);
alc5651_reg_read(0x70,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x70,val);
}
void alc5651_init_interface1(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x27,0x3820);
alc5651_reg_write(0x77,0x0000);
}
void alc5651_init_interface2(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x28,0x3030);
alc5651_reg_write(0x2F,0x0080);
}

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/* This is software bypass example */
#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "main.h"
#include "i2s_api.h"
/**
* @brief Main program.
* @param None
* @retval None
*/
#include "alc5651.c"
i2s_t i2s_obj;
#define I2S_DMA_PAGE_SIZE 768 // 2 ~ 4096
#define I2S_DMA_PAGE_NUM 4 // Vaild number is 2~4
u8 i2s_tx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
u8 i2s_rx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
#define I2S_SCLK_PIN PC_1
#define I2S_WS_PIN PC_0
#define I2S_SD_PIN PC_2
void test_tx_complete(void *data, char *pbuf)
{
return ;
}
void test_rx_complete(void *data, char* pbuf)
{
i2s_t *obj = (i2s_t *)data;
int *ptx_buf;
static u32 count=0;
count++;
if ((count&1023) == 1023)
{
DBG_8195A_I2S_LVL(VERI_I2S_LVL, ".\n");
}
ptx_buf = i2s_get_tx_page(obj);
_memcpy((void*)ptx_buf, (void*)pbuf, I2S_DMA_PAGE_SIZE);
i2s_send_page(obj, (uint32_t*)ptx_buf); // loopback
i2s_recv_page(obj); // submit a new page for receive
}
void main(void)
{
int *ptx_buf;
int i,j;
alc5651_init();
alc5651_init_interface2(); // connect to ALC interface 2
// dump register
//alc5651_reg_dump();
//alc5651_index_dump();
// I2S init
i2s_obj.channel_num = CH_STEREO;
i2s_obj.sampling_rate = SR_44p1KHZ;
i2s_obj.word_length = WL_16b;
i2s_obj.direction = I2S_DIR_TXRX;
i2s_init(&i2s_obj, I2S_SCLK_PIN, I2S_WS_PIN, I2S_SD_PIN);
i2s_set_dma_buffer(&i2s_obj, (char*)i2s_tx_buf, (char*)i2s_rx_buf, \
I2S_DMA_PAGE_NUM, I2S_DMA_PAGE_SIZE);
i2s_tx_irq_handler(&i2s_obj, (i2s_irq_handler)test_tx_complete, (uint32_t)&i2s_obj);
i2s_rx_irq_handler(&i2s_obj, (i2s_irq_handler)test_rx_complete, (uint32_t)&i2s_obj);
/* rx need clock, let tx out first */
i2s_send_page(&i2s_obj, (uint32_t*)i2s_get_tx_page(&i2s_obj));
i2s_recv_page(&i2s_obj);
while(1);
}

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Example Description
This example describes how to use i2s by using mbed extend api
Using TX only and RX only mode.
RX will fill buffer until full then switching to TX only mode to play buffer content.
1.Plug ALC5651 shield to Ameba HDK
2.Run the main function.
3.Plug earphone to Green phone jack
4.Plug audio source to Red phone jack

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#include <stdio.h>
#include "PinNames.h"
#include "basic_types.h"
#include "diag.h"
#include <osdep_api.h>
#include "i2c_api.h"
#include "pinmap.h"
//#define I2C_MTR_SDA PC_4//PB_3
//#define I2C_MTR_SCL PC_5//PB_2
#define I2C_MTR_SDA PB_3
#define I2C_MTR_SCL PB_2
#define I2C_BUS_CLK 100000 //hz
#define I2C_ALC5651_ADDR (0x34/2)
#define RT5651_PRIV_INDEX 0x6a
#define RT5651_PRIV_DATA 0x6c
#if defined (__ICCARM__)
i2c_t alc5651_i2c;
#else
volatile i2c_t alc5651_i2c;
#define printf DBG_8195A
#endif
static void alc5651_delay(void)
{
int i;
i=10000;
while (i) {
i--;
asm volatile ("nop\n\t");
}
}
void alc5651_reg_write(unsigned int reg, unsigned int value)
{
char buf[4];
buf[0] = (char)reg;
buf[1] = (char)(value>>8);
buf[2] = (char)(value&0xff);
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 3, 1);
alc5651_delay();
}
void alc5651_reg_read(unsigned int reg, unsigned int *value)
{
int tmp;
char *buf = (char*)&tmp;
buf[0] = (char)reg;
i2c_write(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 1, 1);
alc5651_delay();
buf[0] = 0xaa;
buf[1] = 0xaa;
i2c_read(&alc5651_i2c, I2C_ALC5651_ADDR, &buf[0], 2, 1);
alc5651_delay();
*value= ((buf[0]&0xFF)<<8)|(buf[1]&0xFF);
}
void alc5651_index_write(unsigned int reg, unsigned int value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_write(RT5651_PRIV_DATA, value);
}
void alc5651_index_read(unsigned int reg, unsigned int *value)
{
alc5651_reg_write(RT5651_PRIV_INDEX, reg);
alc5651_reg_read(RT5651_PRIV_DATA, value);
}
void alc5651_reg_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec reg dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_reg_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_index_dump(void)
{
int i;
unsigned int value;
printf("alc5651 codec index dump\n\r");
printf("------------------------\n\r");
for(i=0;i<=0xff;i++){
alc5651_index_read(i, &value);
printf("%02x : %04x\n\r", i, (unsigned short)value);
}
printf("------------------------\n\r");
}
void alc5651_init(void)
{
i2c_init(&alc5651_i2c, I2C_MTR_SDA, I2C_MTR_SCL);
i2c_frequency(&alc5651_i2c, I2C_BUS_CLK);
}
void alc5651_set_word_len(int len_idx) // interface2
{
// 0: 16 1: 20 2: 24 3: 8
unsigned int val;
alc5651_reg_read(0x71,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x71,val);
alc5651_reg_read(0x70,&val);
val &= (~(0x3<<2));
val |= (len_idx<<2);
alc5651_reg_write(0x70,val);
}
void alc5651_init_interface1(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x27,0x3820);
alc5651_reg_write(0x77,0x0000);
}
void alc5651_init_interface2(void)
{
alc5651_reg_write(0x00,0x0021);
alc5651_reg_write(0x63,0xE8FE);
alc5651_reg_write(0x61,0x5800);
alc5651_reg_write(0x62,0x0C00);
alc5651_reg_write(0x73,0x0000);
alc5651_reg_write(0x2A,0x4242);
alc5651_reg_write(0x45,0x2000);
alc5651_reg_write(0x02,0x4848);
alc5651_reg_write(0x8E,0x0019);
alc5651_reg_write(0x8F,0x3100);
alc5651_reg_write(0x91,0x0E00);
alc5651_index_write(0x3D,0x3E00);
alc5651_reg_write(0xFA,0x0011);
alc5651_reg_write(0x83,0x0800);
alc5651_reg_write(0x84,0xA000);
alc5651_reg_write(0xFA,0x0C11);
alc5651_reg_write(0x64,0x4010);
alc5651_reg_write(0x65,0x0C00);
alc5651_reg_write(0x61,0x5806);
alc5651_reg_write(0x62,0xCC00);
alc5651_reg_write(0x3C,0x004F);
alc5651_reg_write(0x3E,0x004F);
alc5651_reg_write(0x28,0x3030);
alc5651_reg_write(0x2F,0x0080);
}

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/* This is RX only and TX only example */
#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "main.h"
#include "i2s_api.h"
/**
* @brief Main program.
* @param None
* @retval None
*/
#include "alc5651.c"
i2s_t i2s_obj;
#define I2S_DMA_PAGE_SIZE 768 // 2 ~ 4096
#define I2S_DMA_PAGE_NUM 4 // Vaild number is 2~4
u8 i2s_tx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
u8 i2s_rx_buf[I2S_DMA_PAGE_SIZE*I2S_DMA_PAGE_NUM];
#define RECV_PAGE_NUM 50
u8 recv_buf[I2S_DMA_PAGE_SIZE*RECV_PAGE_NUM];
#define I2S_SCLK_PIN PC_1
#define I2S_WS_PIN PC_0
#define I2S_SD_PIN PC_2
u32 count = 0;
void test_tx_complete(void *data, char *pbuf)
{
i2s_t *obj = (i2s_t *)data;
int *ptx_buf;
if(count < RECV_PAGE_NUM){
ptx_buf = i2s_get_tx_page(obj);
_memcpy((void*)ptx_buf, (void*)&recv_buf[I2S_DMA_PAGE_SIZE*count], I2S_DMA_PAGE_SIZE);
i2s_send_page(obj, (uint32_t*)ptx_buf);
count++;
}else{
count = 0;
i2s_set_direction(obj, I2S_DIR_RX);
i2s_recv_page(obj);
}
}
void test_rx_complete(void *data, char* pbuf)
{
i2s_t *obj = (i2s_t *)data;
int *ptx_buf;
if(count < RECV_PAGE_NUM){
_memcpy((void*)&recv_buf[I2S_DMA_PAGE_SIZE*count], (void*)pbuf, I2S_DMA_PAGE_SIZE);
count++;
i2s_recv_page(obj);
}else{
count = 1;
i2s_set_direction(obj, I2S_DIR_TX);
ptx_buf = i2s_get_tx_page(obj);
_memcpy((void*)ptx_buf, (void*)recv_buf, I2S_DMA_PAGE_SIZE);
i2s_send_page(obj, (uint32_t*)ptx_buf); // loopback
}
}
void main(void)
{
int *ptx_buf;
int i,j;
alc5651_init();
alc5651_init_interface2(); // connect to ALC interface 2
// dump register
//alc5651_reg_dump();
//alc5651_index_dump();
// I2S init
i2s_obj.channel_num = CH_MONO;
i2s_obj.sampling_rate = SR_16KHZ;
i2s_obj.word_length = WL_16b;
i2s_obj.direction = I2S_DIR_RX;
i2s_init(&i2s_obj, I2S_SCLK_PIN, I2S_WS_PIN, I2S_SD_PIN);
i2s_set_dma_buffer(&i2s_obj, (char*)i2s_tx_buf, (char*)i2s_rx_buf, \
I2S_DMA_PAGE_NUM, I2S_DMA_PAGE_SIZE);
i2s_tx_irq_handler(&i2s_obj, (i2s_irq_handler)test_tx_complete, (uint32_t)&i2s_obj);
i2s_rx_irq_handler(&i2s_obj, (i2s_irq_handler)test_rx_complete, (uint32_t)&i2s_obj);
i2s_recv_page(&i2s_obj);
while(1);
}

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "log_uart_api.h"
log_uart_t uobj;
void uart_send_string(log_uart_t *uobj, char *pstr)
{
unsigned int i=0;
while (*(pstr+i) != 0) {
log_uart_putc(uobj, *(pstr+i));
i++;
}
}
void main(void)
{
// sample text
char rc;
// Initial Log UART: BaudRate=115200, 8-bits, No Parity, 1 Stop bit
log_uart_init(&uobj, 38400, 8, ParityNone, 1);
uart_send_string(&uobj, "UART API Demo...\r\n");
uart_send_string(&uobj, "Hello World!!\r\n");
while(1){
uart_send_string(&uobj, "\r\n8195a$");
rc = log_uart_getc(&uobj);
log_uart_putc(&uobj, rc);
}
}

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project/realtek_ameba1_va0_example/example_sources/log_uart_loopback/src/main.c Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "log_uart_api.h"
char buf[100]="Hello World!!\r\n";;
log_uart_t uobj;
int uart_scan (char *buf)
{
int i;
for (i=0;i<100;i++) {
*(buf+i) = log_uart_getc(&uobj);
if ((*(buf+i) == 0x0A) || (*(buf+i) == 0x0D)) {
break;
}
}
return i;
}
void main(void)
{
int ret;
log_uart_init(&uobj, 38400, 8, ParityNone, 1);
log_uart_send(&uobj, buf, _strlen(buf), 100);
while (1) {
// ret = log_uart_recv(&uobj, buf, 100, 2000);
ret = uart_scan(buf);
log_uart_send(&uobj, buf, ret, 1000);
log_uart_putc(&uobj, 0x0A);
log_uart_putc(&uobj, 0x0D);
}
}

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "log_uart_api.h"
#define BUF_SZ (1024*3)
extern void wait_ms(int ms);
char buf[BUF_SZ]="Hello World!!\r\n";;
volatile uint32_t tx_busy=0;
volatile uint32_t rx_busy=0;
log_uart_t uobj;
void uart_tx_done(uint32_t id)
{
log_uart_t *uobj = (void*)id;
tx_busy = 0;
}
void uart_rx_done(uint32_t id)
{
log_uart_t *uobj = (void*)id;
rx_busy = 0;
}
void main(void)
{
int ret;
int i;
int timeout;
log_uart_init(&uobj, 38400, 8, ParityNone, 1);
log_uart_tx_comp_handler(&uobj, (void*)uart_tx_done, (uint32_t) &uobj);
log_uart_rx_comp_handler(&uobj, (void*)uart_rx_done, (uint32_t) &uobj);
log_uart_send(&uobj, buf, _strlen(buf), 100);
while (1) {
rx_busy = 1;
log_uart_recv_stream(&uobj, buf, BUF_SZ);
timeout = 2000;
ret = BUF_SZ;
while (rx_busy) {
wait_ms(1);
timeout--;
if (timeout == 0) {
// return value is the bytes received
ret = log_uart_recv_stream_abort(&uobj);
rx_busy = 0;
}
}
if (ret > 0) {
buf[ret] = 0; // end of string
tx_busy = 1;
log_uart_send_stream(&uobj, buf, ret);
timeout = 2000;
while (tx_busy) {
wait_ms(1);
timeout--;
if (timeout == 0) {
tx_busy = 0;
// return value is the bytes transmitted
ret = log_uart_send_stream_abort(&uobj);
}
}
log_uart_putc(&uobj, 0x0d);
log_uart_putc(&uobj, 0x0a);
}
}
}

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Example Description
This example describes how to use nfc interface.
Requirement Components:
1. nfc reader.
Ex. Smart phone which has NFC reader. In Android, you can use below app
NFC Tag reader
https://play.google.com/store/apps/details?id=com.nxp.taginfolite
NFC Tag reader & writer
https://play.google.com/store/apps/details?id=com.wakdev.wdnfc
NFC tag writer
https://play.google.com/store/apps/details?id=com.nxp.nfc.tagwriter
2. Connect NFC antenna.
By default the NFC antenna is provided but not connected.
You can choose your desired antenna and weld it on the board
Verification Steps:
(a) Open nfc reader app, Tap phone on NFC antenna, then the ndef message content is text "HELLO WORLD!"
(b) Open nfc writer app, write something to the tag. (Ex. text message "abcdefg")
It'll also dump raw data on the log.
(c) Open nfc reader app, tap phone on NFC antenna, and check if the conten is exactly the same as previous move.

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "cmsis_os.h"
#include "diag.h"
#include "main.h"
#include "nfc_api.h"
#include "flash_api.h"
#define NFC_RESTORE_DEFAULT (0)
#define NFC_MAX_PAGE_NUM 36
nfctag_t nfctag;
unsigned int nfc_tag_content[NFC_MAX_PAGE_NUM];
unsigned char nfc_tag_dirty[NFC_MAX_PAGE_NUM];
#define RTK_NFC_UID 0x58
unsigned char nfc_default_uid[7] = {
RTK_NFC_UID, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06
};
osThreadId nfc_tid = 0;
#define FLASH_APP_NFC_BASE 0x85000
flash_t flash_nfc;
void nfc_event_listener(void *arg, unsigned int event) {
switch(event) {
case NFC_EV_READER_PRESENT:
DiagPrintf("NFC_EV_READER_PRESENT\r\n");
break;
case NFC_EV_READ:
DiagPrintf("NFC_EV_READ\r\n");
break;
case NFC_EV_WRITE:
DiagPrintf("NFC_EV_WRITE\r\n");
break;
case NFC_EV_ERR:
DiagPrintf("NFC_EV_ERR\r\n");
break;
case NFC_EV_CACHE_READ:
DiagPrintf("NFC_EV_CACHE_READ\r\n");
break;
}
}
/**
* This callback function is called several times if tag is being written multiple pages.
* DO NOT put heavy task here otherwise it will block tag write and cause timeout failure.
**/
void nfc_write_listener(void *arg, unsigned int page, unsigned int pgdat) {
nfc_tag_content[page] = pgdat;
nfc_tag_dirty[page] = 1;
if (nfc_tid) {
osSignalSet(nfc_tid, NFC_EV_WRITE);
}
}
int is_valid_nfc_uid() {
int valid_content = 1;
unsigned char uid[7];
unsigned char bcc[2];
uid[0] = (unsigned char)((nfc_tag_content[0] & 0x000000FF) >> 0);
uid[1] = (unsigned char)((nfc_tag_content[0] & 0x0000FF00) >> 8);
uid[2] = (unsigned char)((nfc_tag_content[0] & 0x00FF0000) >> 16);
bcc[0] = (unsigned char)((nfc_tag_content[0] & 0xFF000000) >> 24);
uid[3] = (unsigned char)((nfc_tag_content[1] & 0x000000FF) >> 0);
uid[4] = (unsigned char)((nfc_tag_content[1] & 0x0000FF00) >> 8);
uid[5] = (unsigned char)((nfc_tag_content[1] & 0x00FF0000) >> 16);
uid[6] = (unsigned char)((nfc_tag_content[1] & 0xFF000000) >> 24);
bcc[1] = (unsigned char)((nfc_tag_content[2] & 0x000000FF) >> 0);
// verify Block Check Character
if (bcc[0] != (0x88 ^ uid[0] ^ uid[1] ^ uid[2])) {
valid_content = 0;
}
if (bcc[1] != (uid[3] ^ uid[4] ^ uid[5] ^ uid[6])) {
valid_content = 0;
}
return valid_content;
}
unsigned int generate_default_tag_content() {
unsigned int page_size = 0;
memset(nfc_tag_content, 0, NFC_MAX_PAGE_NUM * sizeof(unsigned int));
// calculate Block Check Character
unsigned char bcc[2];
bcc[0] = 0x88 ^ nfc_default_uid[0] ^ nfc_default_uid[1] ^ nfc_default_uid[2];
bcc[1] = nfc_default_uid[3] ^ nfc_default_uid[4] ^ nfc_default_uid[5] ^ nfc_default_uid[6];
// generate header
nfc_tag_content[page_size++] = ((unsigned int)nfc_default_uid[0]) << 0 |
((unsigned int)nfc_default_uid[1]) << 8 |
((unsigned int)nfc_default_uid[2]) << 16 |
((unsigned int) bcc[0]) << 24;
nfc_tag_content[page_size++] = ((unsigned int)nfc_default_uid[3]) << 0 |
((unsigned int)nfc_default_uid[4]) << 8 |
((unsigned int)nfc_default_uid[5]) << 16 |
((unsigned int)nfc_default_uid[6]) << 24;
nfc_tag_content[page_size++] = ((unsigned int) bcc[1]) << 0;
nfc_tag_content[page_size++] = 0x001211E1;
// Init tag content as NDEF will-known text message "HELLO WORLD!" in little endian
nfc_tag_content[page_size++] = 0x01d11303;
nfc_tag_content[page_size++] = 0x6502540f;
nfc_tag_content[page_size++] = 0x4c45486e;
nfc_tag_content[page_size++] = 0x57204f4c;
nfc_tag_content[page_size++] = 0x444c524f;
nfc_tag_content[page_size++] = 0x0000fe21;
return page_size;
}
void nfc_load_tag_content_from_flash() {
int i, address, page_size;
memset(nfc_tag_content, 0, NFC_MAX_PAGE_NUM * sizeof(unsigned int));
memset(nfc_tag_dirty, 0, NFC_MAX_PAGE_NUM);
for (i = 0, address = FLASH_APP_NFC_BASE; i < NFC_MAX_PAGE_NUM; i++, address+=4) {
flash_read_word(&flash_nfc, address, &nfc_tag_content[i]);
}
if (!is_valid_nfc_uid() || NFC_RESTORE_DEFAULT) {
DiagPrintf("Invalid tag content, restore to default value\r\n");
page_size = generate_default_tag_content();
// update to flash
flash_erase_sector(&flash_nfc, FLASH_APP_NFC_BASE);
for (i = 0, address = FLASH_APP_NFC_BASE; i < page_size; i++, address += 4) {
flash_write_word(&flash_nfc, address, nfc_tag_content[i]);
}
}
}
void nfc_store_tag_content() {
int i, address;
int modified_page_count;
// dump the modified tag content
modified_page_count = 0;
for (i = 4; i < NFC_MAX_PAGE_NUM && nfc_tag_dirty[i]; i++) {
modified_page_count++;
DiagPrintf("page:%02d data:%08x\r\n", i, nfc_tag_content[i]);
}
// update to cache from page 4
nfc_cache_write(&nfctag, &(nfc_tag_content[4]), 4, modified_page_count);
modified_page_count += 4; // we also need update tag header to flash which has size 4
flash_erase_sector(&flash_nfc, FLASH_APP_NFC_BASE);
for (i = 0, address = FLASH_APP_NFC_BASE; i < modified_page_count; i++, address += 4) {
flash_write_word(&flash_nfc, address, nfc_tag_content[i]);
}
}
void nfc_task(void const *arg) {
int i;
osEvent evt;
nfc_load_tag_content_from_flash();
nfc_init(&nfctag, nfc_tag_content);
nfc_event(&nfctag, nfc_event_listener, NULL, 0xFF);
nfc_write(&nfctag, nfc_write_listener, NULL);
osSignalClear(nfc_tid, NFC_EV_WRITE);
while(1) {
evt = osSignalWait (0, 0xFFFFFFFF); // wait for any signal with max timeout
if (evt.status == osEventSignal && (evt.value.signals & NFC_EV_WRITE)) {
osDelay(300);
nfc_store_tag_content();
memset(nfc_tag_dirty, 0, NFC_MAX_PAGE_NUM);
osSignalClear(nfc_tid, NFC_EV_WRITE);
}
}
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
osThreadDef(nfc_task, osPriorityRealtime, 1, 1024);
nfc_tid = osThreadCreate (osThread (nfc_task), NULL);
DBG_INFO_MSG_OFF(_DBG_SPI_FLASH_);
//3 3)Enable Schedule, Start Kernel
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
#ifdef PLATFORM_FREERTOS
vTaskStartScheduler();
#endif
#else
RtlConsolTaskRom(NULL);
#endif
while(1);
}

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Example Description
This example describes how to use deep sleep api.
Requirement Components:
a LED
a push button
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as input with internal pull-high, connect a push button to this pin and ground.
- PC_5 as output, connect a LED to this pin and ground.
In this example, LED is turned on after device initialize.
User push the button to turn off LED and trigger device enter deep sleep mode for 10s.
If user press any key before sleep timeout, the system will resume.
LED is turned on again after device initialize.
It can be easily measure power consumption in normal mode and deep sleep mode before/after push the putton.
NOTE: You will see device resume immediately at first time.
It's because the log uart is a wakeup source and it buffered a wakeup event when DAP is used.
The symptom won't appear if you use power source on R43 and only power on module.

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "gpio_irq_api.h" // mbed
#include "sleep_ex_api.h"
#include "sys_api.h"
#include "diag.h"
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_IRQ_PIN PC_4
// deep sleep can only be waked up by GPIOB_1 and GTimer
#define GPIO_WAKE_PIN PB_1
// NOTICE: The pull condition may differnet on your board
PinName pull_down_list[] = {
PA_0, PA_1, PA_2, PA_3, PA_4, PA_5, PA_6, PA_7,
PB_0, PB_3, PB_4, PB_5, PB_6, PB_7,
PC_0, PC_1, PC_2, PC_3, PC_4, PC_5, PC_6, PC_7, PC_8, PC_9,
PD_0, PD_1, PD_2, PD_3, PD_4, PD_5, PD_6, PD_7, PD_8, PD_9,
PE_0, PE_1, PE_2, PE_3, PE_4, PE_5, PE_6, PE_7, PE_8, PE_9, PE_A,
PF_1, PF_2, PF_3, PF_4, PF_5
};
// NOTICE: The pull condition may differnet on your board
PinName pull_up_list[] = {
PB_2,
PF_0,
PG_0, PG_1, PG_2, PG_3, PG_4, PG_5, PG_6, PG_7,
PH_0, PH_1, PH_2, PH_3, PH_4, PH_5, PH_6, PH_7,
PI_0, PI_1, PI_2, PI_3, PI_4, PI_5, PI_6, PI_7,
PJ_0, PJ_1, PJ_2, PJ_3, PJ_4, PJ_5, PJ_6,
PK_0, PK_1, PK_2, PK_3, PK_4, PK_5, PK_6
};
void gpio_pull_control()
{
int i;
gpio_t gpio_obj;
for (i=0; i < sizeof(pull_down_list) / sizeof(pull_down_list[0]); i++) {
gpio_init(&gpio_obj, pull_down_list[i]);
gpio_dir(&gpio_obj, PIN_INPUT);
gpio_mode(&gpio_obj, PullDown);
}
for (i=0; i < sizeof(pull_up_list) / sizeof(pull_up_list[0]); i++) {
gpio_init(&gpio_obj, pull_up_list[i]);
gpio_dir(&gpio_obj, PIN_INPUT);
gpio_mode(&gpio_obj, PullUp);
}
}
void gpio_demo_irq_handler (uint32_t id, gpio_irq_event event)
{
gpio_t *gpio_led;
gpio_led = (gpio_t *)id;
printf("Enter deep sleep...Wait 10s or give rising edge at PB_1 to wakeup system.\r\n\r\n");
// turn off led
gpio_write(gpio_led, 0);
// turn off log uart
sys_log_uart_off();
// initialize wakeup pin at PB_1
gpio_t gpio_wake;
gpio_init(&gpio_wake, GPIO_WAKE_PIN);
gpio_dir(&gpio_wake, PIN_INPUT);
gpio_mode(&gpio_wake, PullDown);
// Please note that the pull control is different in different board
// This example is a sample code for RTL Ameba Dev Board
gpio_pull_control();
// enter deep sleep
deepsleep_ex(DSLEEP_WAKEUP_BY_GPIO | DSLEEP_WAKEUP_BY_TIMER, 10000);
}
void main(void)
{
gpio_t gpio_led;
gpio_irq_t gpio_btn;
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin as interrupt source
gpio_irq_init(&gpio_btn, GPIO_IRQ_PIN, gpio_demo_irq_handler, (uint32_t)(&gpio_led));
gpio_irq_set(&gpio_btn, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_btn);
// led on means system is in run mode
gpio_write(&gpio_led, 1);
printf("\r\nPush button at PC_4 to enter deep sleep\r\n");
while(1);
}

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Example Description
This example describes how to use deep standby api.
Requirement Components:
a LED
a push button
Pin name PA_5 and PC_5 map to GPIOA_5 and GPIOC_5:
- PA_5 as input, connect a push button to this pin and 3v3.
- PC_5 as output, connect a LED to this pin and ground.
In this example, LED is turned on after device initialize.
User push the button to turn off LED and trigger device enter deep standby mode for 10s.
If user press button before sleep timeout, the system will resume.
LED is turned on again after device initialize.
It can be easily measure power consumption in normal mode and deep standby mode before/after push the putton.

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "sleep_ex_api.h"
#include "diag.h"
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_PUSHBT_PIN PA_5
// NOTICE: The pull condition may differnet on your board
PinName pull_down_list[] = {
PA_0, PA_1, PA_2, PA_3, PA_4, PA_5, PA_6, PA_7,
PB_0, PB_1, PB_3, PB_4, PB_5, PB_6, PB_7,
PC_0, PC_1, PC_2, PC_3, PC_4, PC_5, PC_6, PC_7, PC_8, PC_9,
PD_0, PD_1, PD_2, PD_3, PD_4, PD_5, PD_6, PD_7, PD_8, PD_9,
PE_0, PE_1, PE_2, PE_3, PE_4, PE_5, PE_6, PE_7, PE_8, PE_9, PE_A,
PF_1, PF_2, PF_3, PF_4, PF_5
};
// NOTICE: The pull condition may differnet on your board
PinName pull_up_list[] = {
PB_2,
PF_0,
PG_0, PG_1, PG_2, PG_3, PG_4, PG_5, PG_6, PG_7,
PH_0, PH_1, PH_2, PH_3, PH_4, PH_5, PH_6, PH_7,
PI_0, PI_1, PI_2, PI_3, PI_4, PI_5, PI_6, PI_7,
PJ_0, PJ_1, PJ_2, PJ_3, PJ_4, PJ_5, PJ_6,
PK_0, PK_1, PK_2, PK_3, PK_4, PK_5, PK_6
};
void gpio_pull_control()
{
int i;
gpio_t gpio_obj;
for (i=0; i < sizeof(pull_down_list) / sizeof(pull_down_list[0]); i++) {
gpio_init(&gpio_obj, pull_down_list[i]);
gpio_dir(&gpio_obj, PIN_INPUT);
gpio_mode(&gpio_obj, PullDown);
}
for (i=0; i < sizeof(pull_up_list) / sizeof(pull_up_list[0]); i++) {
gpio_init(&gpio_obj, pull_up_list[i]);
gpio_dir(&gpio_obj, PIN_INPUT);
gpio_mode(&gpio_obj, PullUp);
}
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
gpio_t gpio_led, gpio_btn;
int old_btn_state, new_btn_state;
DBG_INFO_MSG_OFF(_DBG_GPIO_);
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin
gpio_init(&gpio_btn, GPIO_PUSHBT_PIN);
gpio_dir(&gpio_btn, PIN_INPUT); // Direction: Input
gpio_mode(&gpio_btn, PullDown);
old_btn_state = new_btn_state = 0;
gpio_write(&gpio_led, 1);
DiagPrintf("Push button to sleep...\r\n");
while(1){
new_btn_state = gpio_read(&gpio_btn);
if (old_btn_state == 1 && new_btn_state == 0) {
gpio_write(&gpio_led, 0);
DiagPrintf("Sleep 8s... (Or wakeup by pushing button)\r\n");
//turn off log uart to avoid warning in gpio_pull_control()
sys_log_uart_off();
// Please note that the pull control is different in different board
// This example is a sample code for RTL Ameba Dev Board
gpio_pull_control();
standby_wakeup_event_add(STANDBY_WAKEUP_BY_STIMER, 8000, 0);
standby_wakeup_event_add(STANDBY_WAKEUP_BY_PA5, 0, 1);
deepstandby_ex();
DiagPrintf("This line should not be printed\r\n");
}
old_btn_state = new_btn_state;
}
}

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Example Description
This example describes how to use sleep api.
Requirement Components:
a LED
a push button
Pin name PC_4 and PC_5 map to GPIOC_4 and GPIOC_5:
- PC_4 as input with internal pull-high, connect a push button to this pin and ground.
- PC_5 as output, connect a LED to this pin and ground.
In this example, LED is turned on after device initialize.
User push the button to turn off LED and trigger device enter sleep mode for 10s.
If user push button before sleep timeout, the system will resume.
LED is turned on again after system resume without restart PC.
It can be easily measure power consumption in normal mode and sleep mode before/after push the putton.

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/*
* Routines to access hardware
*
* Copyright (c) 2015 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "device.h"
#include "gpio_api.h" // mbed
#include "gpio_irq_api.h" // mbed
#include "sleep_ex_api.h"
#include "sys_api.h"
#include "diag.h"
#include "main.h"
#define GPIO_LED_PIN PC_5
#define GPIO_IRQ_PIN PC_4
int led_ctrl = 0;
gpio_t gpio_led;
int put_to_sleep = 0;
void gpio_demo_irq_handler (uint32_t id, gpio_irq_event event)
{
gpio_t *gpio_led;
gpio_led = (gpio_t *)id;
if (led_ctrl == 1) {
led_ctrl = 0;
gpio_write(gpio_led, led_ctrl);
put_to_sleep = 1;
} else {
led_ctrl = 1;
gpio_write(gpio_led, led_ctrl);
}
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
gpio_irq_t gpio_btn;
int IsDramOn = 1;
DBG_INFO_MSG_OFF(_DBG_GPIO_);
// Init LED control pin
gpio_init(&gpio_led, GPIO_LED_PIN);
gpio_dir(&gpio_led, PIN_OUTPUT); // Direction: Output
gpio_mode(&gpio_led, PullNone); // No pull
// Initial Push Button pin as interrupt source
gpio_irq_init(&gpio_btn, GPIO_IRQ_PIN, gpio_demo_irq_handler, (uint32_t)(&gpio_led));
gpio_irq_set(&gpio_btn, IRQ_FALL, 1);
gpio_irq_enable(&gpio_btn);
led_ctrl = 1;
gpio_write(&gpio_led, led_ctrl);
DBG_8195A("Push button to enter sleep\r\n");
//system will hang when it tries to suspend SDRAM for 8711AF
if ( sys_is_sdram_power_on() == 0 ) {
IsDramOn = 0;
}
put_to_sleep = 0;
while(1) {
if (put_to_sleep) {
DBG_8195A("Sleep 8s or push button to resume system...\r\n");
sys_log_uart_off();
sleep_ex_selective(SLP_GPIO | SLEEP_WAKEUP_BY_STIMER, 8000, 0, IsDramOn); // sleep_ex can't be put in irq handler
sys_log_uart_on();
DBG_8195A("System resume\r\n");
put_to_sleep = 0;
led_ctrl = 1;
gpio_write(&gpio_led, led_ctrl);
}
}
}

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Example Description
This example describes how to use freertos tickless with uart interruptable interface
Requirement Components:
USBtoTTL adapter
Connect to PC
- Connect Ground: connect to GND pin via USBtoTTL adapter
- Use UART1
GPIOA_0 as UART1_RX connect to TX of USBtoTTL adapter
GPIOA_4 as UART1_TX connect to RX of USBtoTTL adapter
We also need connect GPIOC_1 as gpio interrupt which parallel with log uart rx pin.
In this example, freertos will enter/leave tickless automatically.
User can type continuous "Enter" in uart or log uart to wake system if system is in tickless.
System is keep awake until user type a command via uart.
There are some features in this example:
(1) We replace tickless' sleep function with system sleep api which save more power.
(2) Freertos enter tickless if the wakelock bit map is 0.
It means there is no function require system keep awake.
By default there is WAKELOCK_OS keep system awake.
So we need release this WAKELOCK_OS enable tickless mode.
(3) We configure uart rx as gpio interrupt mode. This make uart can wake system.
NOTICE: If you don't want loss any data from treating UART signal as GPIO interrupt,
you can set FREERTOS_PMU_TICKLESS_PLL_RESERVED to 1 in "platform_opt.h".
It will reserved PLL clock in tickless and UART can receive the whole data.
But it also cost more power consumption.

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project/realtek_ameba1_va0_example/example_sources/pm_tickless/src/main.c Normal file
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#include "FreeRTOS.h"
#include "task.h"
#include "diag.h"
#include "main.h"
#include <example_entry.h>
#include "freertos_pmu.h"
#include "gpio_irq_api.h"
#include "serial_api.h"
// select uart tx/rx pin with gpio interrupt function
#define UART_TX PA_4
#define UART_RX PA_0
#define LOGUART_RX_WAKE PC_1
#define WAKELOCK_EXAMPLE WAKELOCK_USER_BASE
serial_t mysobj;
volatile char rc = 0;
extern void wlan_netowrk(void);
extern void console_init(void);
char cmdbuf[128];
int cmdbuf_index = 0;
void uart_irq_callback(uint32_t id, SerialIrq event)
{
serial_t *sobj = (void*)id;
if(event == RxIrq) {
acquire_wakelock(WAKELOCK_EXAMPLE);
rc = serial_getc(sobj);
if (rc == '\r' || rc == '\n') {
serial_putc(sobj, '\r');
serial_putc(sobj, '\n');
serial_putc(sobj, '#');
serial_putc(sobj, ' ');
if (cmdbuf_index != 0) {
/* NOTICE: If you don't want loss any data from treating UART signal as GPIO interrupt,
* you can set FREERTOS_PMU_TICKLESS_PLL_RESERVED to 1 in "platform_opt.h".
* It will reserved PLL clock in tickless and UART can receive the whole data.
* But it also cost more power consumption.
**/
// process command
printf("cmd(%d): %s\r\n", cmdbuf_index, cmdbuf);
// release wakelock and reset buf
cmdbuf_index = 0;
release_wakelock(WAKELOCK_EXAMPLE);
}
}
if (!(rc == '\r' || rc == '\n' )) {
// receive command
serial_putc(sobj, rc);
cmdbuf[cmdbuf_index] = rc;
cmdbuf_index++;
cmdbuf[cmdbuf_index] = '\0';
}
}
}
void gpio_uart_rx_irq_callback(uint32_t id, gpio_irq_event event)
{
acquire_wakelock(WAKELOCK_EXAMPLE);
}
void pre_sleep_process_callback(unsigned int expected_idle_time)
{
// For peripherals that need turned off before sleep, call disable or deinit peripheral here
}
void post_sleep_process_callback(unsigned int expected_idle_time)
{
// For peripherals that are turned off before sleep, call enable or init peripheral here
}
void config_uart()
{
// setup uart
serial_init(&mysobj, UART_TX, UART_RX);
serial_baud(&mysobj, 38400);
serial_format(&mysobj, 8, ParityNone, 1);
serial_irq_handler(&mysobj, uart_irq_callback, (uint32_t)&mysobj);
serial_irq_set(&mysobj, RxIrq, 1);
serial_irq_set(&mysobj, TxIrq, 1);
// config uart rx as gpio wakeup pin
gpio_irq_t gpio_rx_wake;
gpio_irq_init(&gpio_rx_wake, UART_RX, gpio_uart_rx_irq_callback, NULL);
gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_rx_wake);
}
void gpio_loguart_rx_irq_callback (uint32_t id, gpio_irq_event event)
{
/* WAKELOCK_LOGUART is also handled in log service.
* It is release after a complete command is sent.
**/
acquire_wakelock(WAKELOCK_LOGUART);
}
void config_loguart()
{
/* Log uart RX pin doesn't support gpio interrupt.
* To make log uart wake system, we can parallel log uart RX with another gpio interrupt pin.
*/
gpio_irq_t gpio_rx_wake;
gpio_irq_init(&gpio_rx_wake, LOGUART_RX_WAKE, gpio_loguart_rx_irq_callback, NULL);
gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
gpio_irq_enable(&gpio_rx_wake);
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
if ( rtl_cryptoEngine_init() != 0 ) {
DiagPrintf("crypto engine init failed\r\n");
}
/* Initialize log uart and at command service */
console_init();
/* pre-processor of application example */
pre_example_entry();
/* wlan intialization */
#if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK)
wlan_network();
#endif
// setup uart with capability of wakeup system
config_uart();
// setup log uart with capability of wakeup system
config_loguart();
// By default tickless is disabled because WAKELOCK_OS is locked.
// Release this wakelock to enable tickless
release_wakelock(WAKELOCK_OS);
// Register pre/post sleep callback. They are called when system automatically enter/leave sleep.
register_sleep_callback_by_module(1, pre_sleep_process_callback, WAKELOCK_EXAMPLE);
register_sleep_callback_by_module(0, post_sleep_process_callback, WAKELOCK_EXAMPLE);
/* Execute application example */
example_entry();
/*Enable Schedule, Start Kernel*/
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
#ifdef PLATFORM_FREERTOS
vTaskStartScheduler();
#endif
#else
RtlConsolTaskRom(NULL);
#endif
}

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