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xidameng 2020-07-31 22:16:12 +08:00
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177
sdk/component/soc/realtek/amebad/verification/IR/rtl8721d_ir_learn.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8721D_IR_TEST_H_
#define _RTL8721D_IR_TEST_H_
/** @addtogroup DUALMODE_RMC Dualmode RMC
* @{
*/
/** @defgroup IR_LEARN Ir Learn
* @brief This file handles ir learn function.
* @{
*/
/*============================================================================*
* Macros
*============================================================================*/
/** @defgroup IR_LEARN_Exported_Macros Ir Learn Exported Macros
* @{
*/
#define IR_RX_FIFO_THR_LEVEL 10 /**<trigger interrupt if rx has IR_RX_FIFO_THR_LEVEL num data*/
#define LOOP_QUEUE_MAX_SIZE 512
#define QUEUE_CAPABILITY (LOOP_QUEUE_MAX_SIZE-1)
#define IR_FREQ_10MHZ 10000 /**<10M*/
/* Enable calculate frequency when decode packet or not */
#define CALCULATE_FREQUENCY TRUE
/* Enable correcting frequency by software */
#define CORRECT_FREQ_BY_SOFTWARE TRUE
#define RMC_IR_LEARN_TIMEOUT_MS 20000 /**<20s*/
#define ABS_FREQUENCY(a,b) ((a>b) ? (a-b):(b-a))
/* IR learn time out is 10s */
#define IR_LEARN_TIME_OUT (10*configTICK_RATE_HZ)/*10s*/
/*--------------Configure by user to confirm IR learn parameter --------*/
/* Filter threshold value. If 100< time interval< 2000, treat it as a part of a carrier time */
#define TIME_LOWEST_VALUE 100 /**<0.01ms learn frequency is 10M*/
#define TIME_HIGHEST_VALUE 2000 /**<0.2ms learn frequency is 10M*/
/* If low voltage time>0.25ms,we treat it as a time which have no carrier */
#define TIME_LOW_VOLTAGE_VALUE 2500 /**<0.25ms learn frequency is 10M*/
#define LEARN_WAVE_MAX_SIZE (100) /*max size of learn data of per key in uint32_t*/
#define LEARN_WAVE_MIN_SIZE (10) /*max size of learn data of per key in uint32_t*/
/** End of IR_LEARN_Exported_Macros
* @}
*/
/*============================================================================*
* Types
*============================================================================*/
/** @defgroup IR_LEARN_Exported_Types Ir Learn Exported Types
* @{
*/
typedef enum t_ir_ret_code
{
IR_RET_OK, /**< ir return ok*/
IR_LEARN_ERR, /**< ir learn error*/
} T_IR_RET_CODE;
/* Data struct for IR learn, to-do: 4 bytes align*/
/*need to find if all needed ###*/
typedef struct t_ir_packet_typedef
{
/* Manage loop queue */
volatile uint16_t read_index; /**< index of read queue */
volatile uint16_t write_index; /**< index of write queue */
uint32_t *queue; /**< pointer to the queue */
/* Record IR learned data */
uint32_t detect_time[LEARN_WAVE_MAX_SIZE];/**< record total time*/
uint32_t square_wave_num; /**< record square wave number*/
uint16_t detect_time_num; /**< record IR data number */
bool is_high_level; /**< record decode voltage level */
volatile bool over_flow; /**< record loop queue over folw or not */
#if CALCULATE_FREQUENCY
/* Record learned IR frequency */
float wave_frequency[LEARN_WAVE_MAX_SIZE / 2 + 1]; /**< record IR frequency*/
#else
/* Record IR high waveform time parameters */
uint32_t high_wave_time[LEARN_WAVE_MAX_SIZE / 2 + 1];
uint16_t high_wave_count[LEARN_WAVE_MAX_SIZE / 2 + 1];
#endif
uint16_t frequency_num; /**< Record number of calculated frequency */
volatile bool data_receive_completed; /**< Record IR learn data receive completed flag */
} T_IR_PACKET_TYPEDEF;
/** End of IR_LEARN_Exported_Types
* @}
*/
/*============================================================================*
* Variables
*============================================================================*/
/** @defgroup IR_LEARN_Exported_Variables Ir Learn Exported Variables
* @{
*/
/*record IR Learn Key Index*/
//extern T_VIRTUAL_KEY_DEFS g_ir_learn_key_index;
extern u32 g_ir_learn_key_index;
/*ir learn data packet*/
extern T_IR_PACKET_TYPEDEF g_ir_learn_packet;
/*set this flag if press key while receiving ir learn data*/
extern volatile bool g_exit_ir_learn_by_key;
/** End of IR_LEARN_Exported_Variables
* @}
*/
/*============================================================================*
* Functions
*============================================================================*/
/** @defgroup IR_LEARN_Exported_Functions Ir Learn Exported Functions
* @{
*/
/**
* @brief this API is for user to Initial IR learn mode.
* @param none
* @return none
*/
bool ir_learn_begin(void);
/**
* @brief this API is for user to end IR Learn.
* @param none
* @return none
*/
void ir_learn_end(void);
/**
* @brief this API is for user to reset IR learn mode, before capture wave every time.
* @param none
* @return none
*/
void ir_learn_reset(void);
/**
* @brief this API is for user to capture IR wave and save to flash ,
* address is key_index*LEARN_WAVE_MAX_SIZE.
* @param key_index key index for ir learn
* @return none
*/
void ir_learn_wave_capture(u32 key_index);
/**
* @brief this API is for user to exit IR wave wait or capture wave.
* @param none
* @return none
*/
void ir_learn_capture_exit(void);
/**
* @brief get flash address index according to key index value.
* @note
* @param key index
* @return flash index.
* @retval 0~8
*/
uint16_t get_flash_addr_index( u32 key_index);
/** End of IR_LEARN_Exported_Functions
* @}
*/
/** @} */ /* End of group IR_LEARN */
/** @} */ /* End of group DUALMODE_RMC */
#endif

41
sdk/component/soc/realtek/amebad/verification/adc/rtl8195a_adc_test.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_ADC_TEST_H_
#define _RTL8195A_ADC_TEST_H_
typedef enum _ADC_VERI_PROC_CMD_ {
ADC_TEST_DEINIT = 0,
ADC_TEST_INIT = 1,
ADC_TEST_DUMP = 2,
}ADC_VERI_PROC_CMD, *PADC_VERI_PROC_CMD;
typedef enum _ADC_VERI_ITEM_ {
ADC_TEST_S_NINT = 1, //single rw without DMA without INT
ADC_TEST_S_RINT = 2, //single rw without DMA with INT
ADC_TEST_D_INT = 3, //single rw without DMA with INT
ADC_TEST_DTR_INT = 4, //single rw using DMA with INT
#if TASK_SCHEDULER_DISABLED
ADC_TEST_S_GCINT = 7
#else
ADC_TEST_S_GCINT = 7,
ADC_TEST_N_DEINT = 10
#endif
}ADC_VERI_ITEM, *PADC_VERI_ITEM;
typedef struct _ADC_VERI_PARA_ {
u32 VeriProcCmd;
u32 VeriItem;
u32 VeriLoop;
u32 VeriAudio;
u32 VeriEndian;
}ADC_VERI_PARA,*PADC_VERI_PARA;
#endif

38
sdk/component/soc/realtek/amebad/verification/audio/rtl8721d_audio_test.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8721D_AUDIO_TEST_H_
#define _RTL8721D_AUDIO_TEST_H_
#include "ameba_soc.h"
struct audio_test {
GDMA_InitTypeDef SpTxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
GDMA_InitTypeDef SpRxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
u32 audio_tx_isr_cnt; //current tx isr count
u32 audio_rx_isr_cnt; //current rx isr count
u32 mono_val; //when i2s playtone, set mono initial value
u32 stereo_left_val; //when i2s playtone, set stereo left channel init value
u32 stereo_right_val; //when i2s playtone, set stereo right channel init value
u32 numBlock;
u32 bRx1stBlk;
};
/* GDMA transmission define */
#define GDMA_SINGLE_MAX_SIZE (128*30)
void AudioSpSetClk(AUDIO_SPORT_TypeDef* SPORTx, u32 Clk_Src);
_LONG_CALL_ void AUDIO_SP_SetClkDiv(AUDIO_SPORT_TypeDef* SPORTx, u32 mi, u32 ni);
_LONG_CALL_ void AUDIO_SP_SetTxCh(AUDIO_SPORT_TypeDef* SPORTx, u32 SP_TxCh);
_LONG_CALL_ void AUDIO_SP_SetRxCh(AUDIO_SPORT_TypeDef* SPORTx, u32 SP_RxCh);
_LONG_CALL_ BOOL AUDIO_SP_LPBKGDMA_Init(u32 Index, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc, u32 Length);
_LONG_CALL_ BOOL AUDIO_SP_MulTXGDMA_Init(u32 Index, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc, u8 *pTxData, u32 Length);
#endif

11
sdk/component/soc/realtek/amebad/verification/can/drv/dev_can_drv/dev_can_drv.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef DEV_CAN_DRV_H
#define DEV_CAN_DRV_H
#include "dev_can.h" /*include dev_can.h*/
#define DEV_CAN_PRINT DBG_8195A
#endif // TESTMASTER_H

25
sdk/component/soc/realtek/amebad/verification/can/drv/dev_objdict/EwtCanAnalysis_objdict.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef EWTCANANALYSIS_OBJDICT_H
#define EWTCANANALYSIS_OBJDICT_H
#include "data.h"
/* Prototypes of function provided by object dictionnary */
UNS32 EwtCanAnalysis_valueRangeTest (UNS8 typeValue, void * value);
const indextable * EwtCanAnalysis_scanIndexOD (UNS16 wIndex, UNS32 * errorCode, ODCallback_t **callbacks);
/* Master node data struct */
extern CO_Data EwtCanAnalysis_Data;
extern UNS8 temperature; /* Mapped at index 0x2000, subindex 0x00*/
extern UNS8 sn[5]; /* Mapped at index 0x2001, subindex 0x01 - 0x05 */
extern UNS8 button_Undefined1; /* Mapped at index 0x2002, subindex 0x01 */
extern UNS16 button_Undefined22; /* Mapped at index 0x2002, subindex 0x02 */
extern UNS8 button_Undefined333; /* Mapped at index 0x2002, subindex 0x03 */
extern UNS8 button_Undefined4; /* Mapped at index 0x2002, subindex 0x04 */
extern UNS32 button_Undefined5; /* Mapped at index 0x2002, subindex 0x05 */
extern UNS8 button_Undefined6; /* Mapped at index 0x2002, subindex 0x06 */
extern UNS8 button_Undefined77; /* Mapped at index 0x2002, subindex 0x07 */
#endif // EWTCANANALYSIS_OBJDICT_H

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sdk/component/soc/realtek/amebad/verification/can/drv/dev_objdict/ObjDict.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef OBJDICT_H
#define OBJDICT_H
#include "data.h"
/* Prototypes of function provided by object dictionnary */
UNS32 ObjDict_valueRangeTest (UNS8 typeValue, void * value);
const indextable * ObjDict_scanIndexOD (UNS16 wIndex, UNS32 * errorCode, ODCallback_t **callbacks);
/* Master node data struct */
extern CO_Data ObjDict_Data;
extern ODCallback_t Transmit_PDO_1_Parameter_callbacks[]; /* Callbacks of index0x1800 */
extern UNS8 Read_Inputs_8_Bit[1]; /* Mapped at index 0x6000, subindex 0x01 - 0x01 */
extern UNS8 Polarity_Input_8_Bit[1]; /* Mapped at index 0x6002, subindex 0x01 - 0x01 */
extern UNS8 Filter_Constant_Input_8_Bit[1]; /* Mapped at index 0x6003, subindex 0x01 - 0x01 */
extern UNS8 Global_Interrupt_Enable_Digital; /* Mapped at index 0x6005, subindex 0x00*/
extern UNS8 Interrupt_Mask_Any_Change_8_Bit[1]; /* Mapped at index 0x6006, subindex 0x01 - 0x01 */
extern UNS8 Interrupt_Mask_Low_to_High_8_Bit[1]; /* Mapped at index 0x6007, subindex 0x01 - 0x01 */
extern UNS8 Interrupt_Mask_High_to_Low_8_Bit[1]; /* Mapped at index 0x6008, subindex 0x01 - 0x01 */
extern UNS8 Write_Outputs_8_Bit[1]; /* Mapped at index 0x6200, subindex 0x01 - 0x01 */
extern UNS8 Change_Polarity_Outputs_8_Bit[1]; /* Mapped at index 0x6202, subindex 0x01 - 0x01 */
extern UNS8 Error_Mode_Outputs_8_Bit[1]; /* Mapped at index 0x6206, subindex 0x01 - 0x01 */
extern UNS8 Error_Value_Outputs_8_Bit[1]; /* Mapped at index 0x6207, subindex 0x01 - 0x01 */
#endif // OBJDICT_H

9
sdk/component/soc/realtek/amebad/verification/can/drv/dev_test/dev_master_test.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef DEV_MASTER_TEST_H
#define DEV_MASTER_TEST_H
#include "dev_test.h"
#endif // TESTMASTER_H

9
sdk/component/soc/realtek/amebad/verification/can/drv/dev_test/dev_slave_test.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef DEV_SLAVE_TEST_H
#define DEV_SLAVE_TEST_H
#include "dev_test.h"
#endif // TESTMASTER_H

41
sdk/component/soc/realtek/amebad/verification/can/drv/dev_test/dev_test.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef DEV_TEST_H
#define DEV_TEST_H
#include "rom_map.h"
#include <platform/platform_stdlib.h>
#include "platform_stdlib.h"
#include "basic_types.h"
#include "diag.h"
#include "rand.h"
#include "section_config.h"
#include "ameba_soc.h"
#include "rtl8721d_can_test.h"
#include "rtl8721d_can.h"
#include "FreeRTOSConfig.h"
#include "FreeRTOS.h"
#include "canfestival.h"
#include "applicfg.h"
#include "config.h"
#include "dev_can.h"
#include "timerscfg.h"
#include "timer.h"
#include "dev_can_drv.h"
#include "ObjDict.h"
#include "EwtCanAnalysis_objdict.h"
#include "dev_tim_drv.h"
#include "TestMaster.h"
#include "TestSlave.h"
#include "dev_master_test.h"
#include "dev_slave_test.h"
extern void canopen_drv_test_entry(u8 *argv[]);
extern u32 Strtoul(const u8 *nptr, u8 **endptr, u32 base);
#endif // TESTMASTER_H

9
sdk/component/soc/realtek/amebad/verification/can/drv/dev_timer_drv/dev_tim_drv.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef DEV_TIM_DRV_H
#define DEV_TIM_DRV_H
#endif // TESTMASTER_H

29
sdk/component/soc/realtek/amebad/verification/can/drv/test_master_slave_objdict/TestMaster.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef TESTMASTER_H
#define TESTMASTER_H
#include "data.h"
/* Prototypes of function provided by object dictionnary */
UNS32 TestMaster_valueRangeTest (UNS8 typeValue, void * value);
const indextable * TestMaster_scanIndexOD (UNS16 wIndex, UNS32 * errorCode, ODCallback_t **callbacks);
/* Master node data struct */
extern CO_Data TestMaster_Data;
extern UNS8 MasterMap1; /* Mapped at index 0x2000, subindex 0x00*/
extern UNS8 MasterMap2; /* Mapped at index 0x2001, subindex 0x00*/
extern UNS8 MasterMap3; /* Mapped at index 0x2002, subindex 0x00*/
extern UNS8 MasterMap4; /* Mapped at index 0x2003, subindex 0x00*/
extern UNS8 MasterMap5; /* Mapped at index 0x2004, subindex 0x00*/
extern UNS8 MasterMap6; /* Mapped at index 0x2005, subindex 0x00*/
extern UNS8 MasterMap7; /* Mapped at index 0x2006, subindex 0x00*/
extern UNS8 MasterMap8; /* Mapped at index 0x2007, subindex 0x00*/
extern UNS8 MasterMap9; /* Mapped at index 0x2008, subindex 0x00*/
extern UNS32 MasterMap10; /* Mapped at index 0x2009, subindex 0x00*/
extern UNS16 MasterMap11; /* Mapped at index 0x200A, subindex 0x00*/
extern INTEGER16 MasterMap12; /* Mapped at index 0x200B, subindex 0x00*/
extern INTEGER16 MasterMap13; /* Mapped at index 0x200C, subindex 0x00*/
#endif // TESTMASTER_H

29
sdk/component/soc/realtek/amebad/verification/can/drv/test_master_slave_objdict/TestSlave.h Normal file
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/* File generated by gen_cfile.py. Should not be modified. */
#ifndef TESTSLAVE_H
#define TESTSLAVE_H
#include "data.h"
/* Prototypes of function provided by object dictionnary */
UNS32 TestSlave_valueRangeTest (UNS8 typeValue, void * value);
const indextable * TestSlave_scanIndexOD (UNS16 wIndex, UNS32 * errorCode, ODCallback_t **callbacks);
/* Master node data struct */
extern CO_Data TestSlave_Data;
extern UNS8 SlaveMap1; /* Mapped at index 0x2000, subindex 0x00*/
extern UNS8 SlaveMap2; /* Mapped at index 0x2001, subindex 0x00*/
extern UNS8 SlaveMap3; /* Mapped at index 0x2002, subindex 0x00*/
extern UNS8 SlaveMap4; /* Mapped at index 0x2003, subindex 0x00*/
extern UNS8 SlaveMap5; /* Mapped at index 0x2004, subindex 0x00*/
extern UNS8 SlaveMap6; /* Mapped at index 0x2005, subindex 0x00*/
extern UNS8 SlaveMap7; /* Mapped at index 0x2006, subindex 0x00*/
extern UNS8 SlaveMap8; /* Mapped at index 0x2007, subindex 0x00*/
extern UNS8 SlaveMap9; /* Mapped at index 0x2008, subindex 0x00*/
extern UNS32 SlaveMap10; /* Mapped at index 0x2009, subindex 0x00*/
extern UNS16 SlaveMap11; /* Mapped at index 0x200A, subindex 0x00*/
extern INTEGER16 SlaveMap12; /* Mapped at index 0x200B, subindex 0x00*/
extern INTEGER16 SlaveMap13; /* Mapped at index 0x200C, subindex 0x00*/
#endif // TESTSLAVE_H

43
sdk/component/soc/realtek/amebad/verification/can/inc/can.h Normal file
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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __can_h__
#define __can_h__
#include "applicfg.h"
/**
* @brief The CAN message structure
* @ingroup can
*/
typedef struct {
UNS16 cob_id; /**< message's ID */
UNS8 rtr; /**< remote transmission request. (0 if not rtr message, 1 if rtr message) */
UNS8 len; /**< message's length (0 to 8) */
UNS8 data[8]; /**< message's datas */
} Message;
#define Message_Initializer {0,0,0,{0,0,0,0,0,0,0,0}}
typedef UNS8 (*canSend_t)(Message *);
#endif /* __can_h__ */

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sdk/component/soc/realtek/amebad/verification/can/inc/can_driver.h Normal file
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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __can_driver_h__
#define __can_driver_h__
struct struct_s_BOARD;
typedef struct struct_s_BOARD s_BOARD;
#include "applicfg.h"
#include "can.h"
/**
* @brief The CAN board configuration
* @ingroup can
*/
//struct struct_s_BOARD {
// char busname[100]; /**< The bus name on which the CAN board is connected */
// char baudrate[4]; /**< The board baudrate */
//};
struct struct_s_BOARD {
char * busname; /**< The bus name on which the CAN board is connected */
char * baudrate; /**< The board baudrate */
};
#ifndef DLL_CALL
#if !defined(WIN32) || defined(__CYGWIN__)
#define DLL_CALL(funcname) funcname##_driver
#else
//Windows was missing the definition of the calling convention
#define DLL_CALL(funcname) __stdcall funcname##_driver
#endif
#endif //DLL_CALL
#ifndef FCT_PTR_INIT
#define FCT_PTR_INIT
#endif
UNS8 DLL_CALL(canReceive)(CAN_HANDLE, Message *)FCT_PTR_INIT;
UNS8 DLL_CALL(canSend)(CAN_HANDLE, Message const *)FCT_PTR_INIT;
CAN_HANDLE DLL_CALL(canOpen)(s_BOARD *)FCT_PTR_INIT;
int DLL_CALL(canClose)(CAN_HANDLE)FCT_PTR_INIT;
UNS8 DLL_CALL(canChangeBaudRate)(CAN_HANDLE, char *)FCT_PTR_INIT;
#if defined DEBUG_MSG_CONSOLE_ON || defined NEED_PRINT_MESSAGE
#include "def.h"
#define _P(fc) case fc: MSG(#fc" ");break;
static inline void print_message(Message const *m)
{
int i;
UNS8 fc;
MSG("id:%02x ", m->cob_id & 0x7F);
fc = m->cob_id >> 7;
switch(fc)
{
case SYNC:
if(m->cob_id == 0x080)
MSG("SYNC ");
else
MSG("EMCY ");
break;
#ifdef CO_ENABLE_LSS
case LSS:
if(m->cob_id == 0x7E5)
MSG("MLSS ");
else
MSG("SLSS ");
break;
#endif
_P(TIME_STAMP)
_P(PDO1tx)
_P(PDO1rx)
_P(PDO2tx)
_P(PDO2rx)
_P(PDO3tx)
_P(PDO3rx)
_P(PDO4tx)
_P(PDO4rx)
_P(SDOtx)
_P(SDOrx)
_P(NODE_GUARD)
_P(NMT)
}
if( fc == SDOtx)
{
switch(m->data[0] >> 5)
{
/* scs: server command specifier */
_P(UPLOAD_SEGMENT_RESPONSE)
_P(DOWNLOAD_SEGMENT_RESPONSE)
_P(INITIATE_DOWNLOAD_RESPONSE)
_P(INITIATE_UPLOAD_RESPONSE)
_P(ABORT_TRANSFER_REQUEST)
}
}else if( fc == SDOrx)
{
switch(m->data[0] >> 5)
{
/* ccs: client command specifier */
_P(DOWNLOAD_SEGMENT_REQUEST)
_P(INITIATE_DOWNLOAD_REQUEST)
_P(INITIATE_UPLOAD_REQUEST)
_P(UPLOAD_SEGMENT_REQUEST)
_P(ABORT_TRANSFER_REQUEST)
}
}
MSG(" rtr:%d", m->rtr);
MSG(" len:%d", m->len);
for (i = 0 ; i < m->len ; i++)
MSG(" %02x", m->data[i]);
MSG("\n");
}
#endif
#endif

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sdk/component/soc/realtek/amebad/verification/can/inc/data.h Normal file
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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __data_h__
#define __data_h__
#ifdef __cplusplus
extern "C" {
#endif
/* declaration of CO_Data type let us include all necessary headers
struct struct_CO_Data can then be defined later
*/
typedef struct struct_CO_Data CO_Data;
#include "applicfg.h"
#include "def.h"
#include "can.h"
#include "objdictdef.h"
#include "objacces.h"
#include "sdo.h"
#include "pdo.h"
#include "states.h"
#include "lifegrd.h"
#include "sync.h"
#include "nmtSlave.h"
#include "nmtMaster.h"
#include "emcy.h"
#ifdef CO_ENABLE_LSS
#include "lss.h"
#endif
/**
* @ingroup od
* @brief This structure contains all necessary informations to define a CANOpen node
*/
struct struct_CO_Data {
/* Object dictionary */
UNS8 *bDeviceNodeId;
const indextable *objdict;
s_PDO_status *PDO_status;
TIMER_HANDLE *RxPDO_EventTimers;
void (*RxPDO_EventTimers_Handler)(CO_Data*, UNS32);
const quick_index *firstIndex;
const quick_index *lastIndex;
const UNS16 *ObjdictSize;
//const UNS8 *iam_a_slave;
UNS8 *iam_a_slave;
valueRangeTest_t valueRangeTest;
/* SDO */
s_transfer transfers[SDO_MAX_SIMULTANEOUS_TRANSFERS];
/* s_sdo_parameter *sdo_parameters; */
/* State machine */
e_nodeState nodeState;
s_state_communication CurrentCommunicationState;
initialisation_t initialisation;
preOperational_t preOperational;
operational_t operational;
stopped_t stopped;
void (*NMT_Slave_Node_Reset_Callback)(CO_Data*);
void (*NMT_Slave_Communications_Reset_Callback)(CO_Data*);
/* NMT-heartbeat */
UNS8 *ConsumerHeartbeatCount;
UNS32 *ConsumerHeartbeatEntries;
TIMER_HANDLE *ConsumerHeartBeatTimers;
UNS16 *ProducerHeartBeatTime;
TIMER_HANDLE ProducerHeartBeatTimer;
heartbeatError_t heartbeatError;
e_nodeState NMTable[NMT_MAX_NODE_ID];
/* SYNC */
TIMER_HANDLE syncTimer;
UNS32 *COB_ID_Sync;
UNS32 *Sync_Cycle_Period;
/*UNS32 *Sync_window_length;;*/
post_sync_t post_sync;
post_TPDO_t post_TPDO;
post_SlaveBootup_t post_SlaveBootup;
post_SlaveStateChange_t post_SlaveStateChange;
/* General */
UNS8 toggle;
CAN_PORT canHandle;
scanIndexOD_t scanIndexOD;
storeODSubIndex_t storeODSubIndex;
/* DCF concise */
const indextable* dcf_odentry;
UNS8* dcf_cursor;
UNS32 dcf_entries_count;
UNS8 dcf_status;
UNS32 dcf_size;
UNS8* dcf_data;
/* EMCY */
e_errorState error_state;
UNS8 error_history_size;
UNS8* error_number;
UNS32* error_first_element;
UNS8* error_register;
UNS32* error_cobid;
s_errors error_data[EMCY_MAX_ERRORS];
post_emcy_t post_emcy;
#ifdef CO_ENABLE_LSS
/* LSS */
lss_transfer_t lss_transfer;
lss_StoreConfiguration_t lss_StoreConfiguration;
#endif
};
#define NMTable_Initializer Unknown_state,
#ifdef SDO_DYNAMIC_BUFFER_ALLOCATION
#define s_transfer_Initializer {\
0, /* CliServNbr */\
0, /* wohami */\
SDO_RESET, /* state */\
0, /* toggle */\
0, /* abortCode */\
0, /* index */\
0, /* subIndex */\
0, /* count */\
0, /* offset */\
{0}, /* data (static use, so that all the table is initialize at 0)*/\
NULL, /* dynamicData */ \
0, /* dynamicDataSize */ \
0, /* peerCRCsupport */\
0, /* blksize */\
0, /* ackseq */\
0, /* objsize */\
0, /* lastblockoffset */\
0, /* seqno */\
0, /* endfield */\
RXSTEP_INIT,/* rxstep */\
{0}, /* tmpData */\
0, /* dataType */\
-1, /* timer */\
NULL /* Callback */\
},
#else
#define s_transfer_Initializer {\
0, /* nodeId */\
0, /* wohami */\
SDO_RESET, /* state */\
0, /* toggle */\
0, /* abortCode */\
0, /* index */\
0, /* subIndex */\
0, /* count */\
0, /* offset */\
{0}, /* data (static use, so that all the table is initialize at 0)*/\
0, /* peerCRCsupport */\
0, /* blksize */\
0, /* ackseq */\
0, /* objsize */\
0, /* lastblockoffset */\
0, /* seqno */\
0, /* endfield */\
RXSTEP_INIT,/* rxstep */\
{0}, /* tmpData */\
0, /* */\
-1, /* */\
NULL /* */\
},
#endif //SDO_DYNAMIC_BUFFER_ALLOCATION
#define ERROR_DATA_INITIALIZER \
{\
0, /* errCode */\
0, /* errRegMask */\
0 /* active */\
},
#ifdef CO_ENABLE_LSS
#ifdef CO_ENABLE_LSS_FS
#define lss_fs_Initializer \
,0, /* IDNumber */\
128, /* BitChecked */\
0, /* LSSSub */\
0, /* LSSNext */\
0, /* LSSPos */\
LSS_FS_RESET, /* FastScan_SM */\
-1, /* timerFS */\
{{0,0,0,0},{0,0,0,0}} /* lss_fs_transfer */
#else
#define lss_fs_Initializer
#endif
#define lss_Initializer {\
LSS_RESET, /* state */\
0, /* command */\
LSS_WAITING_MODE, /* mode */\
0, /* dat1 */\
0, /* dat2 */\
0, /* NodeID */\
0, /* addr_sel_match */\
0, /* addr_ident_match */\
"none", /* BaudRate */\
0, /* SwitchDelay */\
SDELAY_OFF, /* SwitchDelayState */\
NULL, /* canHandle_t */\
-1, /* TimerMSG */\
-1, /* TimerSDELAY */\
NULL, /* Callback */\
0 /* LSSanswer */\
lss_fs_Initializer /*FastScan service initialization */\
},\
NULL /* _lss_StoreConfiguration*/
#else
#define lss_Initializer
#endif
/* A macro to initialize the data in client app.*/
/* CO_Data structure */
#define CANOPEN_NODE_DATA_INITIALIZER(NODE_PREFIX) {\
/* Object dictionary*/\
& NODE_PREFIX ## _bDeviceNodeId, /* bDeviceNodeId */\
NODE_PREFIX ## _objdict, /* objdict */\
NODE_PREFIX ## _PDO_status, /* PDO_status */\
NULL, /* RxPDO_EventTimers */\
_RxPDO_EventTimers_Handler, /* RxPDO_EventTimers_Handler */\
& NODE_PREFIX ## _firstIndex, /* firstIndex */\
& NODE_PREFIX ## _lastIndex, /* lastIndex */\
& NODE_PREFIX ## _ObjdictSize, /* ObjdictSize */\
& NODE_PREFIX ## _iam_a_slave, /* iam_a_slave */\
NODE_PREFIX ## _valueRangeTest, /* valueRangeTest */\
\
/* SDO, structure s_transfer */\
{\
REPEAT_SDO_MAX_SIMULTANEOUS_TRANSFERS_TIMES(s_transfer_Initializer)\
},\
\
/* State machine*/\
Unknown_state, /* nodeState */\
/* structure s_state_communication */\
{\
0, /* csBoot_Up */\
0, /* csSDO */\
0, /* csEmergency */\
0, /* csSYNC */\
0, /* csHeartbeat */\
0, /* csPDO */\
0 /* csLSS */\
},\
_initialisation, /* initialisation */\
_preOperational, /* preOperational */\
_operational, /* operational */\
_stopped, /* stopped */\
NULL, /* NMT node reset callback */\
NULL, /* NMT communications reset callback */\
\
/* NMT-heartbeat */\
& NODE_PREFIX ## _highestSubIndex_obj1016, /* ConsumerHeartbeatCount */\
NODE_PREFIX ## _obj1016, /* ConsumerHeartbeatEntries */\
NODE_PREFIX ## _heartBeatTimers, /* ConsumerHeartBeatTimers */\
& NODE_PREFIX ## _obj1017, /* ProducerHeartBeatTime */\
TIMER_NONE, /* ProducerHeartBeatTimer */\
_heartbeatError, /* heartbeatError */\
\
{REPEAT_NMT_MAX_NODE_ID_TIMES(NMTable_Initializer)},\
/* is well initialized at "Unknown_state". Is it ok ? (FD)*/\
\
/* SYNC */\
TIMER_NONE, /* syncTimer */\
& NODE_PREFIX ## _obj1005, /* COB_ID_Sync */\
& NODE_PREFIX ## _obj1006, /* Sync_Cycle_Period */\
/*& NODE_PREFIX ## _obj1007, */ /* Sync_window_length */\
_post_sync, /* post_sync */\
_post_TPDO, /* post_TPDO */\
_post_SlaveBootup, /* post_SlaveBootup */\
_post_SlaveStateChange, /* post_SlaveStateChange */\
\
/* General */\
0, /* toggle */\
NULL, /* canSend */\
NODE_PREFIX ## _scanIndexOD, /* scanIndexOD */\
_storeODSubIndex, /* storeODSubIndex */\
/* DCF concise */\
NULL, /*dcf_odentry*/\
NULL, /*dcf_cursor*/\
1, /*dcf_entries_count*/\
0, /* dcf_status*/\
0, /* dcf_size */\
NULL, /* dcf_data */\
\
/* EMCY */\
Error_free, /* error_state */\
sizeof(NODE_PREFIX ## _obj1003) / sizeof(NODE_PREFIX ## _obj1003[0]), /* error_history_size */\
& NODE_PREFIX ## _highestSubIndex_obj1003, /* error_number */\
& NODE_PREFIX ## _obj1003[0], /* error_first_element */\
& NODE_PREFIX ## _obj1001, /* error_register */\
& NODE_PREFIX ## _obj1014, /* error_cobid */\
/* error_data: structure s_errors */\
{\
REPEAT_EMCY_MAX_ERRORS_TIMES(ERROR_DATA_INITIALIZER)\
},\
_post_emcy, /* post_emcy */\
/* LSS */\
lss_Initializer\
}
#ifdef __cplusplus
};
#endif
#endif /* __data_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "data.h"
#define DCF_STATUS_INIT 0
#define DCF_STATUS_READ_CHECK 1
#define DCF_STATUS_WRITE 2
#define DCF_STATUS_SAVED 3
#define DCF_STATUS_VERIF_OK 4
/**
* @brief Init the consise dcf in CO_Data for nodeId
*
* @param *d Pointer on a CAN object data structure
* @param nodeId Id of the slave node
* @return 1: dcf check started
* 0: nothing to do
*/
UNS8 init_consise_dcf(CO_Data* d, UNS8 nodeId);
/**
* @brief Function to be called from post_SlaveBootup
* for starting the configuration manager
*
* @param *d Pointer on a CAN object data structure
* @param nodeId Id of the slave node
* @return 0: configuration manager busy
* 1: nothing to check, node started
* 2: dcf check started
*/
UNS8 check_and_start_node(CO_Data* d, UNS8 nodeId);

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __def_h__
#define __def_h__
#include <config.h>
/** definitions used for object dictionary access. ie SDO Abort codes . (See DS 301 v.4.02 p.48)
*/
#define OD_SUCCESSFUL 0x00000000
#define OD_READ_NOT_ALLOWED 0x06010001
#define OD_WRITE_NOT_ALLOWED 0x06010002
#define OD_NO_SUCH_OBJECT 0x06020000
#define OD_NOT_MAPPABLE 0x06040041
#define OD_LENGTH_DATA_INVALID 0x06070010
#define OD_NO_SUCH_SUBINDEX 0x06090011
#define OD_VALUE_RANGE_EXCEEDED 0x06090030 /* Value range test result */
#define OD_VALUE_TOO_LOW 0x06090031 /* Value range test result */
#define OD_VALUE_TOO_HIGH 0x06090032 /* Value range test result */
/* Others SDO abort codes
*/
#define SDOABT_TOGGLE_NOT_ALTERNED 0x05030000
#define SDOABT_TIMED_OUT 0x05040000
#define SDOABT_OUT_OF_MEMORY 0x05040005 /* Size data exceed SDO_MAX_LENGTH_TRANSFER */
#define SDOABT_GENERAL_ERROR 0x08000000 /* Error size of SDO message */
#define SDOABT_LOCAL_CTRL_ERROR 0x08000021
/******************** CONSTANTS ****************/
/** Constantes which permit to define if a PDO frame
is a request one or a data one
*/
/* Should not be modified */
#define REQUEST 1
#define NOT_A_REQUEST 0
/* Misc constants */
/* -------------- */
/* Should not be modified */
#define Rx 0
#define Tx 1
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
/** Status of the SDO transmission
*/
#define SDO_RESET 0x0 /* Transmission not started. Init state. */
#define SDO_FINISHED 0x1 /* data are available */
#define SDO_ABORTED_RCV 0x80 /* Received an abort message. Data not available */
#define SDO_ABORTED_INTERNAL 0x85 /* Aborted but not because of an abort message. */
#define SDO_DOWNLOAD_IN_PROGRESS 0x2
#define SDO_UPLOAD_IN_PROGRESS 0x3
#define SDO_BLOCK_DOWNLOAD_IN_PROGRESS 0x4
#define SDO_BLOCK_UPLOAD_IN_PROGRESS 0x5
/** getReadResultNetworkDict may return any of above status value or this one
*/
#define SDO_PROVIDED_BUFFER_TOO_SMALL 0x8A
/* Status of the node during the SDO transfer : */
#define SDO_SERVER 0x1
#define SDO_CLIENT 0x2
#define SDO_UNKNOWN 0x3
/* SDOrx ccs: client command specifier */
#define DOWNLOAD_SEGMENT_REQUEST 0
#define INITIATE_DOWNLOAD_REQUEST 1
#define INITIATE_UPLOAD_REQUEST 2
#define UPLOAD_SEGMENT_REQUEST 3
#define ABORT_TRANSFER_REQUEST 4
#define BLOCK_UPLOAD_REQUEST 5
#define BLOCK_DOWNLOAD_REQUEST 6
/* SDOtx scs: server command specifier */
#define UPLOAD_SEGMENT_RESPONSE 0
#define DOWNLOAD_SEGMENT_RESPONSE 1
#define INITIATE_DOWNLOAD_RESPONSE 3
#define INITIATE_UPLOAD_RESPONSE 2
#define ABORT_TRANSFER_REQUEST 4
#define BLOCK_DOWNLOAD_RESPONSE 5
#define BLOCK_UPLOAD_RESPONSE 6
/* SDO block upload client subcommand */
#define SDO_BCS_INITIATE_UPLOAD_REQUEST 0
#define SDO_BCS_END_UPLOAD_REQUEST 1
#define SDO_BCS_UPLOAD_RESPONSE 2
#define SDO_BCS_START_UPLOAD 3
/* SDO block upload server subcommand */
#define SDO_BSS_INITIATE_UPLOAD_RESPONSE 0
#define SDO_BSS_END_UPLOAD_RESPONSE 1
/* SDO block download client subcommand */
#define SDO_BCS_INITIATE_DOWNLOAD_REQUEST 0
#define SDO_BCS_END_DOWNLOAD_REQUEST 1
/* SDO block download server subcommand */
#define SDO_BSS_INITIATE_DOWNLOAD_RESPONSE 0
#define SDO_BSS_END_DOWNLOAD_RESPONSE 1
#define SDO_BSS_DOWNLOAD_RESPONSE 2
/* Function Codes
---------------
defined in the canopen DS301
*/
#define NMT 0x0
#define SYNC 0x1
#define TIME_STAMP 0x2
#define PDO1tx 0x3
#define PDO1rx 0x4
#define PDO2tx 0x5
#define PDO2rx 0x6
#define PDO3tx 0x7
#define PDO3rx 0x8
#define PDO4tx 0x9
#define PDO4rx 0xA
#define SDOtx 0xB
#define SDOrx 0xC
#define NODE_GUARD 0xE
#define LSS 0xF
/* NMT Command Specifier, sent by master to change a slave state */
/* ------------------------------------------------------------- */
/* Should not be modified */
#define NMT_Start_Node 0x01
#define NMT_Stop_Node 0x02
#define NMT_Enter_PreOperational 0x80
#define NMT_Reset_Node 0x81
#define NMT_Reset_Comunication 0x82
/** Status of the LSS transmission
*/
#define LSS_RESET 0x0 /* Transmission not started. Init state. */
#define LSS_FINISHED 0x1 /* data are available */
#define LSS_ABORTED_INTERNAL 0x2 /* Aborted but not because of an abort message. */
#define LSS_TRANS_IN_PROGRESS 0x3
/* constantes used in the different state machines */
/* ----------------------------------------------- */
/* Must not be modified */
#define state1 0x01
#define state2 0x02
#define state3 0x03
#define state4 0x04
#define state5 0x05
#define state6 0x06
#define state7 0x07
#define state8 0x08
#define state9 0x09
#define state10 0x0A
#define state11 0x0B
#endif /* __def_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
AVR Port: Andreas GLAUSER and Peter CHRISTEN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __APPLICFG_AVR__
#define __APPLICFG_AVR__
#include <string.h>
#include <stdio.h>
// Integers
#define INTEGER8 signed char
#define INTEGER16 short
#define INTEGER24
#define INTEGER32 long
#define INTEGER40
#define INTEGER48
#define INTEGER56
#define INTEGER64
// Unsigned integers
#define UNS8 unsigned char
#define UNS16 unsigned short
#define UNS32 unsigned long
/*
#define UNS24
#define UNS40
#define UNS48
#define UNS56
#define UNS64
*/
#define TASK_HANDLE unsigned int
// Reals
#define REAL32 float
#define REAL64 double
#include "can.h"
// MSG functions
// not finished, the strings have to be placed to the flash and printed out
// using the printf_P function
/// Definition of MSG_ERR
// ---------------------
//#define DEBUG_ERR_CONSOLE_ON 1
//#define DEBUG_WAR_CONSOLE_ON 1
#include "diag.h"
#define printf DBG_8195A
#define DEBUG_ERR_CONSOLE_ON
#ifdef DEBUG_ERR_CONSOLE_ON
#define MSG_ERR(num, str, val) \
printf("num: %p\n", num); \
printf(str); \
printf("\n val: %p\n", val); \
printf('\n');
#else
#define MSG_ERR(num, str, val)
#endif
#if 0
#ifdef DEBUG_ERR_CONSOLE_ON
#define MSG_ERR(num, str, val) \
printf(num, ' '); \
printf(str); \
printf(val); \
printf('\n');
#else
#define MSG_ERR(num, str, val)
#endif
#endif
/// Definition of MSG_WAR
// ---------------------
#ifdef DEBUG_WAR_CONSOLE_ON
#define MSG_WAR(num, str, val) \
printf("num: %p\n", num); \
printf(str); \
printf("\n val: %p\n", val); \
printf('\n');
#else
#define MSG_WAR(num, str, val)
#endif
#if 0
#ifdef DEBUG_WAR_CONSOLE_ON
#define MSG_WAR(num, str, val) \
printf(num, ' '); \
printf(str); \
printf(val); \
printf('\n');
#else
#define MSG_WAR(num, str, val)
#endif
#endif
typedef void* CAN_HANDLE;
typedef void* CAN_PORT;
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
AVR Port: Andreas GLAUSER and Peter CHRISTEN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __CAN_CANFESTIVAL__
#define __CAN_CANFESTIVAL__
#include "applicfg.h"
#include "data.h"
#include "diag.h"
// --------- to be called by user app ---------
void initTimer(void);
UNS8 canSend(CAN_PORT notused, Message *m);
UNS8 canChangeBaudRate(CAN_PORT port, char* baud);
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
AVR Port: Andreas GLAUSER and Peter CHRISTEN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _CONFIG_H_
#define _CONFIG_H_
#if 0
#ifdef __IAR_SYSTEMS_ICC__
#include <ioavr.h>
#include <intrinsics.h>
#include "iar.h"
#else // GCC
#include <inttypes.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
#include <avr/sleep.h>
#include <avr/wdt.h>
#endif // GCC
//#define WD_SLEEP
// Needed defines by Atmel lib
#define FOSC 8000 // 8 MHz External cristal
#ifndef F_CPU
#define F_CPU (1000UL*FOSC) // Need for AVR GCC
#endif
#define CAN_BAUDRATE 125
#endif
/*CAN baudrate defines, or give the baud rate configuration table*/
#define CAN_BAUD_1M 0
#define CAN_BAUD_500K 1
#define CAN_BAUD_250K 2
#define CAN_BAUD_125K 3
#define CAN_BAUD_DEFAULT CAN_BAUD_1M
// Needed defines by Canfestival lib
#define MAX_CAN_BUS_ID 1
#define SDO_MAX_LENGTH_TRANSFER 32
#define SDO_BLOCK_SIZE 16
#define SDO_MAX_SIMULTANEOUS_TRANSFERS 1
#define NMT_MAX_NODE_ID 128
#define SDO_TIMEOUT_MS 3000U
#define MAX_NB_TIMER 8
// CANOPEN_BIG_ENDIAN is not defined
#define CANOPEN_LITTLE_ENDIAN 1
#define US_TO_TIMEVAL_FACTOR 8
#define REPEAT_SDO_MAX_SIMULTANEOUS_TRANSFERS_TIMES(repeat)\
repeat
#define REPEAT_NMT_MAX_NODE_ID_TIMES(repeat)\
repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat repeat
#define EMCY_MAX_ERRORS 8
#define REPEAT_EMCY_MAX_ERRORS_TIMES(repeat)\
repeat repeat repeat repeat repeat repeat repeat repeat
#endif /* _CONFIG_H_ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
AT91 Port: Peter CHRISTEN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#if 1
#ifndef __DEV_CAN__
#define __DEV_CAN__
#include "config.h"
// Canfestivals includes
#include "can.h"
// Number of receive MB
#define NB_MB 8
#define NB_RX_MB 4
// Number of transmit MB
#define NB_TX_MB (NB_MB - NB_RX_MB)
#if (NB_TX_MB < 1)
#error define less RX MBs, you must have at least 1 TX MB!
#elif (NB_RX_MB < 1)
#error define at least 1 RX MBs!
#endif
#define START_TX_MB NB_RX_MB
#define TX_INT_MSK ((0xFF << (NB_MB - NB_TX_MB)) & 0xFF)
#define RX_INT_MSK (0xFF >> (NB_MB - NB_RX_MB))
/************************* To be called by user app ***************************/
unsigned char canInit(unsigned int bitrate);
unsigned char canSend(CAN_PORT notused, Message *m);
unsigned char canReceive(Message *m);
#endif
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
AVR Port: Andreas GLAUSER and Peter CHRISTEN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __TIMERSCFG_H__
#define __TIMERSCFG_H__
// Whatever your microcontroller, the timer wont work if
// TIMEVAL is not at least on 32 bits
//#define TIMEVAL UNS32
#define TIMEVAL unsigned int
// The timer of the AVR counts from 0000 to 0xFFFF in CTC mode (it can be
// shortened setting OCR3A eg. to get 2ms instead of 2.048ms)
#define TIMEVAL_MAX 0xffffffff //0xFFFF //basic timer
// The timer is incrementing every 4 us.
//#define MS_TO_TIMEVAL(ms) (ms * 250)
//#define US_TO_TIMEVAL(us) (us>>2)
// The timer is incrementing every 8 us.
#define MS_TO_TIMEVAL(ms) ((ms) * 125)
#define US_TO_TIMEVAL(us) ((us)>>3)
// The timer is incrementing every 31.25 us.
#define MS_TO_TIMEVAL(ms) ((ms) * 32)
#define US_TO_TIMEVAL(us) ((us)>>5)
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*!
** @file emcy.h
** @author Luis Jimenez
** @date Wed Sep 26 2007
**
** @brief Declarations of the functions that manage EMCY (emergency) messages
**
**
*/
/** @defgroup emcyo Emergency Object
* Emergency Object is used to communicate device and application failures.
* @ingroup comobj
*/
#ifndef __emcy_h__
#define __emcy_h__
#include <applicfg.h>
/* The error states
* ----------------- */
typedef enum enum_errorState {
Error_free = 0x00,
Error_occurred = 0x01
} e_errorState;
typedef struct {
UNS16 errCode;
UNS8 errRegMask;
UNS8 active;
} s_errors;
#include "data.h"
typedef void (*post_emcy_t)(CO_Data* d, UNS8 nodeID, UNS16 errCode, UNS8 errReg);
void _post_emcy(CO_Data* d, UNS8 nodeID, UNS16 errCode, UNS8 errReg);
/*************************************************************************
* Functions
*************************************************************************/
/**
* @ingroup emcy
* @brief Sets a new error with code errCode. Also sets corresponding bits in Error register (1001h)
* @param *d Pointer on a CAN object data structure
* @param errCode The error code
* @param errRegMask
* @param addInfo
* @return
*/
UNS8 EMCY_setError(CO_Data* d, UNS16 errCode, UNS8 errRegMask, UNS16 addInfo);
/**
* @ingroup emcy
* @brief Indicates it has recovered from error errCode. Also clears corresponding bits in Error register (1001h)
* @param *d Pointer on a CAN object data structure
* @param errCode The error code
*/
void EMCY_errorRecovered(CO_Data* d, UNS16 errCode);
/**
* @ingroup emcy
* @brief Start EMCY consumer and producer
* @param *d Pointer on a CAN object data structure
*/
void emergencyInit(CO_Data* d);
/**
* @ingroup emcy
* @brief Stop EMCY producer and consumer
* @param *d Pointer on a CAN object data structure
*/
void emergencyStop(CO_Data* d);
/**
* @ingroup emcy
* @brief This function is responsible to process an EMCY canopen-message
* @param *d Pointer on a CAN object data structure
* @param *m Pointer on the CAN-message which has to be analysed.
*/
void proceedEMCY(CO_Data* d, Message* m);
#endif /*__emcy_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup heartbeato Heartbeat Object
* The heartbeat mechanism for a device is established through cyclically transmitting a message by a
* heartbeat producer. One or more devices in the network are aware of this heartbeat message. If the
* heartbeat cycle fails for the heartbeat producer the local application on the heartbeat consumer will be
* informed about that event.
* @ingroup comobj
*/
#ifndef __lifegrd_h__
#define __lifegrd_h__
#include <applicfg.h>
typedef void (*heartbeatError_t)(CO_Data*, UNS8);
void _heartbeatError(CO_Data* d, UNS8 heartbeatID);
typedef void (*post_SlaveBootup_t)(CO_Data*, UNS8);
void _post_SlaveBootup(CO_Data* d, UNS8 SlaveID);
typedef void (*post_SlaveStateChange_t)(CO_Data*, UNS8, e_nodeState);
void _post_SlaveStateChange(CO_Data* d, UNS8 nodeId, e_nodeState newNodeState);
#include "data.h"
/*************************************************************************
* Functions
*************************************************************************/
/**
* @ingroup statemachine
* @brief To read the state of a node
* This can be used by the master after having sent a life guard request,
* of by any node if it is waiting for heartbeat.
* @param *d Pointer on a CAN object data structure
* @param nodeId Id of a node
* @return e_nodeState State of the node corresponding to the nodeId
*/
e_nodeState getNodeState (CO_Data* d, UNS8 nodeId);
/**
* @brief Start heartbeat consumer and producer
* with respect to 0x1016 and 0x1017
* object dictionary entries
* @param *d Pointer on a CAN object data structure
*/
void heartbeatInit(CO_Data* d);
/**
* @brief Stop heartbeat consumer and producer
* @param *d Pointer on a CAN object data structure
*/
void heartbeatStop(CO_Data* d);
/**
* @brief This function is responsible to process a canopen-message which seams to be an NMT Error Control
* Messages. At them moment we assume that every NMT error control message
* is a heartbeat message.
* If a BootUp message is detected, it will return the nodeId of the Slave who booted up
* @param *d Pointer on a CAN object data structure
* @param *m Pointer on the CAN-message which has to be analysed.
*/
void proceedNODE_GUARD (CO_Data* d, Message* m);
#endif /*__lifegrd_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Jorge Berzosa
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup lss Layer Setting Services Object
* @brief LSS offers the possibility to inquire and change the settings of certain parameters of the local layers on
* a CANopen module with LSS Slave capabilities by a CANopen module with LSS Master capabilities via the
* CAN Network.
* The following parameters can be inquired and/or changed by the use of LSS:
* - Node-ID of the CANopen Slave
* - Bit timing parameters of the physical layer (baud rate)
* - LSS address (/2/ Identity Object, Index 1018H)
* @ingroup comobj
*/
#ifndef __LSS_h__
#define __LSS_h__
#define SLSS_ADRESS 0x7E4
#define MLSS_ADRESS 0x7E5
#define SDELAY_OFF 0
#define SDELAY_FIRST 1
#define SDELAY_SECOND 2
#define LSS_WAITING_MODE 0
#define LSS_CONFIGURATION_MODE 1
/* Switch mode services */
#define LSS_SM_GLOBAL 4
#define LSS_SM_SELECTIVE_VENDOR 64
#define LSS_SM_SELECTIVE_PRODUCT 65
#define LSS_SM_SELECTIVE_REVISION 66
#define LSS_SM_SELECTIVE_SERIAL 67
#define LSS_SM_SELECTIVE_RESP 68
/* Configuration services */
#define LSS_CONF_NODE_ID 17
#define LSS_CONF_BIT_TIMING 19
#define LSS_CONF_ACT_BIT_TIMING 21
#define LSS_CONF_STORE 23
/* Inquire services */
#define LSS_INQ_VENDOR_ID 90
#define LSS_INQ_PRODUCT_CODE 91
#define LSS_INQ_REV_NUMBER 92
#define LSS_INQ_SERIAL_NUMBER 93
#define LSS_INQ_NODE_ID 94
/* Identification services */
#define LSS_IDENT_REMOTE_VENDOR 70
#define LSS_IDENT_REMOTE_PRODUCT 71
#define LSS_IDENT_REMOTE_REV_LOW 72
#define LSS_IDENT_REMOTE_REV_HIGH 73
#define LSS_IDENT_REMOTE_SERIAL_LOW 74
#define LSS_IDENT_REMOTE_SERIAL_HIGH 75
#define LSS_IDENT_REMOTE_NON_CONF 76
#define LSS_IDENT_SLAVE 79
#define LSS_IDENT_NON_CONF_SLAVE 80
#define LSS_IDENT_FASTSCAN 81
/*FastScan State Machine*/
#define LSS_FS_RESET 0
#define LSS_FS_PROCESSING 1
#define LSS_FS_CONFIRMATION 2
typedef void (*LSSCallback_t)(CO_Data* d, UNS8 command);
typedef void (*lss_StoreConfiguration_t)(CO_Data* d,UNS8*,UNS8*);
//void _lss_StoreConfiguration(UNS8 *error, UNS8 *spec_error);
//typedef void (*lss_ChangeBaudRate_t)(CO_Data* d,char*);
//void _lss_ChangeBaudRate(char *BaudRate);
struct struct_lss_transfer;
//#include "timer.h"
#ifdef CO_ENABLE_LSS_FS
struct struct_lss_fs_transfer {
UNS32 FS_LSS_ID[4];
UNS8 FS_BitChecked[4];
};
typedef struct struct_lss_fs_transfer lss_fs_transfer_t;
#endif
/* The Transfer structure
* Used to store the different fields of the internal state of the LSS
*/
struct struct_lss_transfer {
UNS8 state; /* state of the transmission : Takes the values LSS_... */
UNS8 command; /* the LSS command of the transmision */
UNS8 mode; /* LSS mode */
UNS32 dat1; /* the data from the last msg received */
UNS8 dat2;
UNS8 nodeID; /* the new nodeid stored to update the nodeid when switching to LSS operational*/
UNS8 addr_sel_match; /* the matching mask for the LSS Switch Mode Selective service */
UNS8 addr_ident_match; /* the matching mask for the LSS Identify Remote Slaves service*/
char *baudRate; /* the new baudrate stored to update the node baudrate when a Activate Bit
* Timing Parameters is received*/
UNS16 switchDelay; /* the period of the two delay */
UNS8 switchDelayState; /* the state machine for the switchDelay */
CAN_PORT canHandle_t;
/* Time counters to implement a timeout in milliseconds.*/
TIMER_HANDLE timerMSG; /* timerMSG is automatically incremented whenever
* the lss state is in LSS_TRANS_IN_PROGRESS, and reseted to 0
* when the response LSS have been received.
*/
TIMER_HANDLE timerSDELAY; /* timerSDELAY is automatically incremented whenever
* the lss switchDelayState is in SDELAY_FIRST or SDELAY_SECOND, and reseted to 0
* when the two periods have been expired.
*/
LSSCallback_t Callback; /* The user callback func to be called at LSS transaction end */
UNS8 LSSanswer; /* stores if a message has been received during a timer period */
#ifdef CO_ENABLE_LSS_FS
UNS32 IDNumber; /* in the master, the LSS address parameter which it currently tries to identify.
* in the slave, the LSS address parameter which is being checked (LSS-ID[sub]). */
UNS8 BitChecked; /* bits of the current IDNumber that are currently checked */
UNS8 LSSSub; /* which part of the LSS-ID is currently checked in IDNumber */
UNS8 LSSNext; /* which LSSSub value will be used in the next request */
UNS8 LSSPos; /* in the slave, which part of the LSS-ID is currently processed*/
UNS8 FastScan_SM; /* the state machine for the FastScan protocol */
TIMER_HANDLE timerFS; /* timerFS is automatically incremented when the FastScan service
* has been requested and reseted to 0 when the protocol ends.
*/
#ifdef CO_ENABLE_LSS_FS
lss_fs_transfer_t lss_fs_transfer;
#endif
#endif
};
#ifdef CO_ENABLE_LSS
typedef struct struct_lss_transfer lss_transfer_t;
#else
typedef UNS8 lss_transfer_t;
#endif
void startLSS(CO_Data* d);
void stopLSS(CO_Data* d);
/** transmit a LSS message
* command is the LSS command specifier
* dat1 and dat2 are pointers to optional data (depend on command)
* return sendLSSMessage(d,command,dat1,dat2)
*/
UNS8 sendLSS (CO_Data* d, UNS8 command,void *dat1, void *dat2);
/** transmit a LSS message on CAN bus
* comamnd is the LSS command specifier
* bus_id is MLSS_ADRESS or SLSS_ADRESS depending in d->iam_a_slave.
* dat1 and dat2 are pointers to optional data (depend on command).
* return canSend(bus_id,&m)
*/
UNS8 sendLSSMessage(CO_Data* d, UNS8 command, void *dat1, void *dat2);
/** This function is called when the node is receiving a Master LSS message (cob-id = 0x7E5).
* - Check if there is a callback which will take care of the response. If not return 0 but does nothing.
* - Stops the timer so the alarm wont raise an error.
* - return 0 if OK
*/
UNS8 proceedLSS_Master (CO_Data* d, Message* m );
/** This function is called when the node is receiving a Slave LSS message (cob-id = 0x7E4).
* - Call the callback function or send the response message depending on the LSS comand within m.
* - return 0 if OK
*/
UNS8 proceedLSS_Slave (CO_Data* d, Message* m );
/** Used by the Master application to send a LSS command, WITHOUT response, to the slave.
* command: the LSS command. LSS_...
* dat1 and dat2: pointers to optional data (depend on command).
* return sendLSS(d,command,dat1,dat2)
*/
//UNS8 configNetworkNode(CO_Data* d, UNS8 command, void *dat1, void* dat2);
/**
* @ingroup lss
* @brief Used by the Master application to send a LSS command, WITH response, to the slave.
* @param *d Pointer on a CAN object data structure
* @param command
* @param *dat1
* @param *dat2
* @param Callback The function Callback, which must be defined in the user code, is called at the
* end of the exchange (on succes or abort) and can be NULL.
* @return sendLSS(d,command,dat1,dat2)
* The LSS_MSG_TIMER timer is started to control the timeout
*/
UNS8 configNetworkNode (CO_Data* d, UNS8 command, void *dat1, void* dat2, LSSCallback_t Callback);
/**
* @ingroup lss
* @brief Use this function after a configNetworkNode or configNetworkNodeCallBack to get the result.
* @param *d Pointer on a CAN object data structure
* @param command The LSS command (unused).
* @param *dat1
* @param *dat2
* @return :
* - LSS_RESET // Transmission not started. Init state.
* - LSS_FINISHED // data are available
* - LSS_ABORTED_INTERNAL // Aborted but not because of an abort message.
* - LSS_TRANS_IN_PROGRESS // Data not yet available
* @code
* example:
* UNS32 dat1;
* UNS8 dat2;
* res=configNetworkNodeCallBack(&_Data,LSS_INQ_NODE_ID,0,0,NULL); // inquire the nodeID
* while (getConfigResultNetworkNode (&_Data, LSS_INQ_NODE_ID, &dat1, &dat2) != LSS_TRANS_IN_PROGRESS);
* @endcode
*/
UNS8 getConfigResultNetworkNode (CO_Data* d, UNS8 command, UNS32* dat1, UNS8* dat2);
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup networkmanagement Network Management
* @ingroup userapi
*/
/** @defgroup nmtmaster NMT Master
* @brief NMT master provides mechanisms that control and monitor the state of nodes and their behavior in the network.
* @ingroup networkmanagement
*/
#ifndef __nmtMaster_h__
#define __nmtMaster_h__
#include "data.h"
/**
* @ingroup nmtmaster
* @brief Transmit a NMT message on the network to the slave whose nodeId is node ID.
*
* @param *d Pointer to a CAN object data structure
* @param nodeId Id of the slave node
* @param cs The order of state changement \n\n
*
* Allowed states :
* - cs = NMT_Start_Node // Put the node in operational mode
* - cs = NMT_Stop_Node // Put the node in stopped mode
* - cs = NMT_Enter_PreOperational // Put the node in pre_operational mode
* - cs = NMT_Reset_Node // Put the node in initialization mode
* - cs = NMT_Reset_Comunication // Put the node in initialization mode
*
* The mode is changed according to the slave state machine mode :
* - initialisation ---> pre-operational (Automatic transition)
* - pre-operational <--> operational
* - pre-operational <--> stopped
* - pre-operational, operational, stopped -> initialisation
* \n\n
* @return errorcode
* - 0 if the NMT message was send
* - 1 if an error occurs
*/
UNS8 masterSendNMTstateChange (CO_Data* d, UNS8 nodeId, UNS8 cs);
/**
* @ingroup nmtmaster
* @brief Transmit a NodeGuard message on the network to the slave whose nodeId is node ID
*
* @param *d Pointer to a CAN object data structure
* @param nodeId Id of the slave node
* @return
* - 0 is returned if the NodeGuard message was send.
* - 1 is returned if an error occurs.
*/
UNS8 masterSendNMTnodeguard (CO_Data* d, UNS8 nodeId);
/**
* @ingroup nmtmaster
* @brief Ask the state of the slave node whose nodeId is node Id.
*
* To ask states of all nodes on the network (NMT broadcast), nodeId must be equal to 0
* @param *d Pointer to a CAN object data structure
* @param nodeId Id of the slave node
*/
UNS8 masterRequestNodeState (CO_Data* d, UNS8 nodeId);
#endif /* __nmtMaster_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup nmtslave NMT Slave
* @brief The NMT Slave methods are called automatically when a NMT message from Master are received.
* @ingroup networkmanagement
*/
#ifndef __nmtSlave_h__
#define __nmtSlave_h__
#include <applicfg.h>
#include "data.h"
/**
* @brief Threat the reception of a NMT message from the master.
* @param *d Pointer to the CAN data structure
* @param *m Pointer to the message received
* @return
* - 0 if OK
* - -1 if the slave is not allowed, by its state, to receive the message
*/
void proceedNMTstateChange (CO_Data* d, Message * m);
/**
* @brief Transmit the boot-Up frame when the slave is moving from initialization
* state to pre_operational state.
* @param *d Pointer on the CAN data structure
* @return canSend(bus_id,&m)
*/
UNS8 slaveSendBootUp (CO_Data* d);
#endif /* __nmtSlave_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @file
* @brief Responsible for accessing the object dictionary.
*
* This file contains functions for accessing the object dictionary and
* variables that are contained by the object dictionary.
* Accessing the object dictionary contains setting local variables
* as PDOs and accessing (read/write) all entries of the object dictionary
* @warning Only the basic entries of an object dictionary are included
* at the moment.
*/
/** @defgroup od Object Dictionary Management
* @brief The Object Dictionary is the heart of each CANopen device containing all communication and application objects.
* @ingroup userapi
*/
#ifndef __objacces_h__
#define __objacces_h__
#include <applicfg.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef UNS32 (*valueRangeTest_t)(UNS8 typeValue, void *Value);
typedef void (* storeODSubIndex_t)(CO_Data* d, UNS16 wIndex, UNS8 bSubindex);
void _storeODSubIndex (CO_Data* d, UNS16 wIndex, UNS8 bSubindex);
/**
* @brief Print MSG_WAR (s) if error to the access to the object dictionary occurs.
*
* You must uncomment the lines in the file objaccess.c :\n
* //#define DEBUG_CAN\n
* //#define DEBUG_WAR_CONSOLE_ON\n
* //#define DEBUG_ERR_CONSOLE_ON\n\n
* Beware that sometimes, we force the sizeDataDict or sizeDataGiven to 0, when we wants to use
* this function but we do not have the access to the right value. One example is
* getSDOerror(). So do not take attention to these variables if they are null.
* @param index
* @param subIndex
* @param sizeDataDict Size of the data defined in the dictionary
* @param sizeDataGiven Size data given by the user.
* @param code error code to print. (SDO abort code. See file def.h)
* @return
*/
UNS8 accessDictionaryError(UNS16 index, UNS8 subIndex,
UNS32 sizeDataDict, UNS32 sizeDataGiven, UNS32 code);
/* _getODentry() Reads an entry from the object dictionary.\n
*
* use getODentry() macro to read from object and endianize
* use readLocalDict() macro to read from object and not endianize
*
* @code
* // Example usage:
* UNS8 *pbData;
* UNS8 length;
* UNS32 returnValue;
*
* returnValue = getODentry( (UNS16)0x100B, (UNS8)1,
* (void * *)&pbData, (UNS8 *)&length );
* if( returnValue != SUCCESSFUL )
* {
* // error handling
* }
* @endcode
* @param *d Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to read
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pDestData Pointer to the pointer which points to the variable where
* the value of this object dictionary entry should be copied
* @param pExpectedSize This function writes the size of the copied value (in Byte)
* into this variable.
* @param *pDataType Pointer to the type of the data. See objdictdef.h
* @param CheckAccess if other than 0, do not read if the data is Write Only
* [Not used today. Put always 0].
* @param Endianize When not 0, data is endianized into network byte order
* when 0, data is not endianized and copied in machine native
* endianness
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
*/
UNS32 _getODentry( CO_Data* d,
UNS16 wIndex,
UNS8 bSubindex,
void * pDestData,
UNS32 * pExpectedSize,
UNS8 * pDataType,
UNS8 checkAccess,
UNS8 endianize);
/**
* @ingroup od
* @brief getODentry() to read from object and endianize
* @param OD Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to read
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pDestData Pointer to the pointer which points to the variable where
* the value of this object dictionary entry should be copied
* @param pExpectedSize This function writes the size of the copied value (in Byte)
* into this variable.
* @param *pDataType Pointer to the type of the data. See objdictdef.h
* @param checkAccess Flag that indicate if a check rights must be perfomed (0 : no , other than 0 : yes)
* @param endianize Set to 1 : endianized into network byte order
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
*/
#define getODentry( OD, wIndex, bSubindex, pDestData, pExpectedSize, \
pDataType, checkAccess) \
_getODentry( OD, wIndex, bSubindex, pDestData, pExpectedSize, \
pDataType, checkAccess, 1)
/**
* @ingroup od
* @brief readLocalDict() reads an entry from the object dictionary, but in
* contrast to getODentry(), readLocalDict() doesn't endianize entry and reads
* entry in machine native endianness.
* @param OD Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to read
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pDestData Pointer to the pointer which points to the variable where
* the value of this object dictionary entry should be copied
* @param pExpectedSize This function writes the size of the copied value (in Byte)
* into this variable.
* @param *pDataType Pointer to the type of the data. See objdictdef.h
* @param checkAccess if other than 0, do not read if the data is Write Only
* [Not used today. Put always 0].
* @param endianize Set to 0, data is not endianized and copied in machine native
* endianness
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
*/
#define readLocalDict( OD, wIndex, bSubindex, pDestData, pExpectedSize, \
pDataType, checkAccess) \
_getODentry( OD, wIndex, bSubindex, pDestData, pExpectedSize, \
pDataType, checkAccess, 0)
/* By this function you can write an entry into the object dictionary
* @param *d Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to write
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pSourceData Pointer to the variable that holds the value that should
* be copied into the object dictionary
* @param *pExpectedSize The size of the value (in Byte).
* @param checkAccess Flag that indicate if a check rights must be perfomed (0 : no , other than 0 : yes)
* @param endianize When not 0, data is endianized into network byte order
* when 0, data is not endianized and copied in machine native
* endianness
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
*/
UNS32 _setODentry( CO_Data* d,
UNS16 wIndex,
UNS8 bSubindex,
void * pSourceData,
UNS32 * pExpectedSize,
UNS8 checkAccess,
UNS8 endianize);
/**
* @ingroup od
* @brief setODentry converts SourceData from network byte order to machine native
* format, and writes that to OD.
* @code
* // Example usage:
* UNS8 B;
* B = 0xFF; // set transmission type
*
* retcode = setODentry( (UNS16)0x1800, (UNS8)2, &B, sizeof(UNS8), 1 );
* @endcode
* @param d Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to write
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pSourceData Pointer to the variable that holds the value that should
* be copied into the object dictionary
* @param *pExpectedSize The size of the value (in Byte).
* @param checkAccess Flag that indicate if a check rights must be perfomed (0 : no , other than 0 : yes)
* @param endianize Set to 1 : endianized into network byte order
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
*/
#define setODentry( d, wIndex, bSubindex, pSourceData, pExpectedSize, \
checkAccess) \
_setODentry( d, wIndex, bSubindex, pSourceData, pExpectedSize, \
checkAccess, 1)
/** @fn UNS32 writeLocalDict(d, wIndex, bSubindex, pSourceData, pExpectedSize, checkAccess)
* @ingroup od
* @hideinitializer
* @brief Writes machine native SourceData to OD.
* @param d Pointer to a CAN object data structure
* @param wIndex The index in the object dictionary where you want to write
* an entry
* @param bSubindex The subindex of the Index. e.g. mostly subindex 0 is
* used to tell you how many valid entries you can find
* in this index. Look at the canopen standard for further
* information
* @param *pSourceData Pointer to the variable that holds the value that should
* be copied into the object dictionary
* @param *pExpectedSize The size of the value (in Byte).
* @param checkAccess Flag that indicate if a check rights must be perfomed (0 : no , other than 0 : yes)
* @param endianize Data is not endianized and copied in machine native endianness
* @return
* - OD_SUCCESSFUL is returned upon success.
* - SDO abort code is returned if error occurs . (See file def.h)
* \n\n
* @code
* // Example usage:
* UNS8 B;
* B = 0xFF; // set transmission type
*
* retcode = writeLocalDict( (UNS16)0x1800, (UNS8)2, &B, sizeof(UNS8), 1 );
* @endcode
*/
#define writeLocalDict( d, wIndex, bSubindex, pSourceData, pExpectedSize, checkAccess) \
_setODentry( d, wIndex, bSubindex, pSourceData, pExpectedSize, checkAccess, 0)
/**
* @brief Scan the index of object dictionary. Used only by setODentry and getODentry.
* @param *d Pointer to a CAN object data structure
* @param wIndex
* @param *errorCode : OD_SUCCESSFUL if index foundor SDO abort code. (See file def.h)
* @param **Callback
* @return NULL if index not found. Else : return the table part of the object dictionary.
*/
const indextable * scanIndexOD (CO_Data* d, UNS16 wIndex, UNS32 *errorCode, ODCallback_t **Callback);
UNS32 RegisterSetODentryCallBack(CO_Data* d, UNS16 wIndex, UNS8 bSubindex, ODCallback_t Callback);
#ifdef __cplusplus
}
#endif
#endif /* __objacces_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __objdictdef_h__
#define __objdictdef_h__
/************************* CONSTANTES **********************************/
/** this are static defined datatypes taken fCODE the canopen standard. They
* are located at index 0x0001 to 0x001B. As described in the standard, they
* are in the object dictionary for definition purpose only. a device does not
* to support all of this datatypes.
*/
#define boolean 0x01
#define int8 0x02
#define int16 0x03
#define int32 0x04
#define uint8 0x05
#define uint16 0x06
#define uint32 0x07
#define real32 0x08
#define visible_string 0x09
#define octet_string 0x0A
#define unicode_string 0x0B
#define time_of_day 0x0C
#define time_difference 0x0D
#define domain 0x0F
#define int24 0x10
#define real64 0x11
#define int40 0x12
#define int48 0x13
#define int56 0x14
#define int64 0x15
#define uint24 0x16
#define uint40 0x18
#define uint48 0x19
#define uint56 0x1A
#define uint64 0x1B
#define pdo_communication_parameter 0x20
#define pdo_mapping 0x21
#define sdo_parameter 0x22
#define identity 0x23
/* CanFestival is using 0x24 to 0xFF to define some types containing a
value range (See how it works in objdict.c)
*/
/** Each entry of the object dictionary can be READONLY (RO), READ/WRITE (RW),
* WRITE-ONLY (WO)
*/
#define RW 0x00
#define WO 0x01
#define RO 0x02
#define TO_BE_SAVE 0x04
#define DCF_TO_SEND 0x08
/************************ STRUCTURES ****************************/
/** This are some structs which are neccessary for creating the entries
* of the object dictionary.
*/
typedef struct td_subindex
{
UNS8 bAccessType;
UNS8 bDataType; /* Defines of what datatype the entry is */
UNS32 size; /* The size (in Byte) of the variable */
void* pObject; /* This is the pointer of the Variable */
} subindex;
/** Struct for creating entries in the communictaion profile
*/
typedef struct td_indextable
{
subindex* pSubindex; /* Pointer to the subindex */
UNS8 bSubCount; /* the count of valid entries for this subindex
* This count here defines how many memory has been
* allocated. this memory does not have to be used.
*/
UNS16 index;
} indextable;
typedef struct s_quick_index{
UNS16 SDO_SVR;
UNS16 SDO_CLT;
UNS16 PDO_RCV;
UNS16 PDO_RCV_MAP;
UNS16 PDO_TRS;
UNS16 PDO_TRS_MAP;
}quick_index;
/*typedef struct struct_CO_Data CO_Data; */
typedef UNS32 (*ODCallback_t)(CO_Data* d, const indextable *, UNS8 bSubindex);
typedef const indextable * (*scanIndexOD_t)(UNS16 wIndex, UNS32 * errorCode, ODCallback_t **Callback);
/************************** MACROS *********************************/
/* CANopen usefull helpers */
#define GET_NODE_ID(m) (UNS16_LE(m.cob_id) & 0x7f)
#define GET_FUNCTION_CODE(m) (UNS16_LE(m.cob_id) >> 7)
#endif /* __objdictdef_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup pdo Process Data Object (PDO)
* PDO is a communication object defined by the DPO communication parameter and PDA mapping parameter objects.
* It is an uncomfirmed communication service without protocol overhead.
* @ingroup comobj
*/
#ifndef __pdo_h__
#define __pdo_h__
#include <applicfg.h>
#include <def.h>
#include "can.h"
typedef struct struct_s_PDO_status s_PDO_status;
#include "data.h"
/* Handler for RxPDO event timers : empty function that user can overload */
void _RxPDO_EventTimers_Handler(CO_Data *d, UNS32 pdoNum);
/* Status of the TPDO : */
#define PDO_INHIBITED 0x01
#define PDO_RTR_SYNC_READY 0x01
/** The PDO structure */
struct struct_s_PDO_status {
UNS8 transmit_type_parameter;
TIMER_HANDLE event_timer;
TIMER_HANDLE inhibit_timer;
Message last_message;
};
#define s_PDO_status_Initializer {0, TIMER_NONE, TIMER_NONE, Message_Initializer}
/** definitions of the different types of PDOs' transmission
*
* SYNCHRO(n) means that the PDO will be transmited every n SYNC signal.
*/
#define TRANS_EVERY_N_SYNC(n) (n) /*n = 1 to 240 */
#define TRANS_SYNC_ACYCLIC 0 /* Trans after reception of n SYNC. n = 1 to 240 */
#define TRANS_SYNC_MIN 1 /* Trans after reception of n SYNC. n = 1 to 240 */
#define TRANS_SYNC_MAX 240 /* Trans after reception of n SYNC. n = 1 to 240 */
#define TRANS_RTR_SYNC 252 /* Transmission on request */
#define TRANS_RTR 253 /* Transmission on request */
#define TRANS_EVENT_SPECIFIC 254 /* Transmission on event */
#define TRANS_EVENT_PROFILE 255 /* Transmission on event */
/**
* @brief Copy all the data to transmit in process_var
* Prepare the PDO defined at index to be sent
* *pwCobId : returns the value of the cobid. (subindex 1)
* @param *d Pointer on a CAN object data structure
* @param numPdo The PDO number
* @param *pdo Pointer on a CAN message structure
* @return 0 or 0xFF if error.
*/
UNS8 buildPDO(CO_Data* d, UNS8 numPdo, Message *pdo);
/**
* @ingroup pdo
* @brief Transmit a PDO request frame on the network to the slave.
* @param *d Pointer on a CAN object data structure
* @param RPDOIndex Index of the receive PDO
* @return
* - CanFestival file descriptor is returned upon success.
* - 0xFF is returned if RPDO Index is not found.
* @return 0xFF if error, other in success.
*/
UNS8 sendPDOrequest( CO_Data* d, UNS16 RPDOIndex );
/**
* @brief Compute a PDO frame reception
* bus_id is hardware dependant
* @param *d Pointer on a CAN object data structure
* @param *m Pointer on a CAN message structure
* @return 0xFF if error, else return 0
*/
UNS8 proceedPDO (CO_Data* d, Message *m);
/**
* @brief Used by the application to signal changes in process data
* that could be mapped to some TPDO.
* This do not necessarily imply PDO emission.
* Function iterates on all TPDO and look TPDO transmit
* type and content change before sending it.
* @param *d Pointer on a CAN object data structure
*/
UNS8 sendPDOevent (CO_Data* d);
UNS8 sendOnePDOevent (CO_Data* d, UNS8 pdoNum);
/**
* @ingroup pdo
* @brief Function iterates on all TPDO and look TPDO transmit
* type and content change before sending it.
* @param *d Pointer on a CAN object data structure
* @param isSyncEvent
*/
UNS8 _sendPDOevent(CO_Data* d, UNS8 isSyncEvent);
/**
* @brief Initialize PDO feature
* @param *d Pointer on a CAN object data structure
*/
void PDOInit(CO_Data* d);
/**
* @brief Stop PDO feature
* @param *d Pointer on a CAN object data structure
*/
void PDOStop(CO_Data* d);
/**
* @ingroup pdo
* @brief Set timer for PDO event
* @param *d Pointer on a CAN object data structure
* @param pdoNum The PDO number
*/
void PDOEventTimerAlarm(CO_Data* d, UNS32 pdoNum);
/**
* @ingroup pdo
* @brief Inhibit timer for PDO event
* @param *d Pointer on a CAN object data structure
* @param pdoNum The PDO number
*/
void PDOInhibitTimerAlarm(CO_Data* d, UNS32 pdoNum);
/* copy bit per bit in little endian */
void CopyBits(UNS8 NbBits, UNS8* SrcByteIndex, UNS8 SrcBitIndex, UNS8 SrcBigEndian, UNS8* DestByteIndex, UNS8 DestBitIndex, UNS8 DestBigEndian);
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup comobj Communication Objects
* @ingroup userapi
*/
/** @defgroup sdo Service Data Object (SDO)
* SDOs provide the access to entries in the CANopen Object Dictionary.
* An SDO is made up of at least two CAN messages with different identifiers.
* SDO s are always confirmed point-to-point communications services.
* @ingroup comobj
*/
#ifndef __sdo_h__
#define __sdo_h__
struct struct_s_transfer;
#include "timer.h"
/* Block mode : Data consumer receive step
* - set to RXSTEP_STARTED when client receive initiate upload response
* - set to RXSTEP_END when last segment of a block received
*/
typedef enum {RXSTEP_INIT, RXSTEP_STARTED, RXSTEP_END } rxStep_t;
typedef void (*SDOCallback_t)(CO_Data* d, UNS8 nodeId);
/* The Transfer structure
Used to store the different segments of
- a SDO received before writing in the dictionary
- the reading of the dictionary to put on a SDO to transmit
WARNING : after a change in this structure check the macro s_transfer_Initializer in data.h
*/
struct struct_s_transfer {
UNS8 CliServNbr; /**< The index of the SDO client / server in our OD minus 0x1280 / 0x1200 */
UNS8 whoami; /**< Takes the values SDO_CLIENT or SDO_SERVER */
UNS8 state; /**< state of the transmission : Takes the values SDO_... */
UNS8 toggle;
UNS32 abortCode; /**< Sent or received */
/**< index and subindex of the dictionary where to store */
/**< (for a received SDO) or to read (for a transmit SDO) */
UNS16 index;
UNS8 subIndex;
UNS32 count; /**< Number of data received or to be sent. */
UNS32 offset; /**< stack pointer of data[]
* Used only to tranfer part of a line to or from a SDO.
* offset is always pointing on the next free cell of data[].
* WARNING s_transfer.data is subject to ENDIANISATION
* (with respect to CANOPEN_BIG_ENDIAN)
*/
UNS8 data [SDO_MAX_LENGTH_TRANSFER];
#ifdef SDO_DYNAMIC_BUFFER_ALLOCATION
UNS8 *dynamicData;
UNS32 dynamicDataSize;
#endif //SDO_DYNAMIC_BUFFER_ALLOCATION
UNS8 peerCRCsupport; /**< True if peer supports CRC */
UNS8 blksize; /**< Number of segments per block with 0 < blksize < 128 */
UNS8 ackseq; /**< sequence number of last segment that was received successfully */
UNS32 objsize; /**< Size in bytes of the object provided by data producer */
UNS8 lastblockoffset; /**< Value of offset before last block */
UNS8 seqno; /**< Last sequence number received OK or transmitted */
UNS8 endfield; /**< nbr of bytes in last segment of last block that do not contain data */
rxStep_t rxstep; /**< data consumer receive step - set to true when last segment of a block received */
UNS8 tmpData[8]; /**< temporary segment storage */
UNS8 dataType; /**< Defined in objdictdef.h Value is visible_string
* if it is a string, any other value if it is not a string,
* like 0. In fact, it is used only if client.
*/
TIMER_HANDLE timer; /**< Time counter to implement a timeout in milliseconds.
* It is automatically incremented whenever
* the line state is in SDO_DOWNLOAD_IN_PROGRESS or
* SDO_UPLOAD_IN_PROGRESS, and reseted to 0
* when the response SDO have been received.
*/
SDOCallback_t Callback; /**< The user callback func to be called at SDO transaction end */
};
typedef struct struct_s_transfer s_transfer;
#include "data.h"
/**
* @brief Reset of a SDO exchange on timeout.
* Send a SDO abort.
* @param *d Pointer on a CAN object data structure
* @param id
*/
void SDOTimeoutAlarm(CO_Data* d, UNS32 id);
/**
* @brief Reset all SDO buffers.
* @param *d Pointer on a CAN object data structure
*/
void resetSDO (CO_Data* d);
/**
* @brief Copy the data received from the SDO line transfer to the object dictionary.
* @param *d Pointer on a CAN object data structure
* @param line SDO line
* @return SDO error code if error. Else, returns 0.
*/
UNS32 SDOlineToObjdict (CO_Data* d, UNS8 line);
/**
* @brief Copy the data from the object dictionary to the SDO line for a network transfer.
* @param *d Pointer on a CAN object data structure
* @param line SDO line
* @return SDO error code if error. Else, returns 0.
*/
UNS32 objdictToSDOline (CO_Data* d, UNS8 line);
/**
* @brief Copy data from an existant line in the argument "* data"
* @param d Pointer on a CAN object data structure
* @param line SDO line
* @param nbBytes
* @param *data Pointer on the data
* @return 0xFF if error. Else, returns 0.
*/
UNS8 lineToSDO (CO_Data* d, UNS8 line, UNS32 nbBytes, UNS8 * data);
/**
* @brief Add data to an existant line
* @param d Pointer on a CAN object data structure
* @param line SDO line
* @param nbBytes
* @param *data Pointer on the data
* @return 0xFF if error. Else, returns 0.
*/
UNS8 SDOtoLine (CO_Data* d, UNS8 line, UNS32 nbBytes, UNS8 * data);
/**
* @brief Called when an internal SDO abort occurs.
* Release the line * Only if server *
* If client, the line must be released manually in the core application.
* The reason of that is to permit the program to read the transfers structure before its reset,
* because many informations are stored on it : index, subindex, data received or trasmited, ...
* In all cases, sends a SDO abort.
* @param *d Pointer on a CAN object data structure
* @param CliServNbr
* @param whoami
* @param index
* @param subIndex
* @param abortCode
* @return 0
*/
UNS8 failedSDO (CO_Data* d, UNS8 CliServNbr, UNS8 whoami, UNS16 index, UNS8 subIndex, UNS32 abortCode);
/**
* @brief Reset an unused line.
* @param *d Pointer on a CAN object data structure
* @param line SDO line
*/
void resetSDOline (CO_Data* d, UNS8 line);
/**
* @brief Initialize some fields of the structure.
* @param *d Pointer on a CAN object data structure
* @param line
* @param CliServNbr
* @param index
* @param subIndex
* @param state
* @return 0
*/
UNS8 initSDOline (CO_Data* d, UNS8 line, UNS8 CliServNbr, UNS16 index, UNS8 subIndex, UNS8 state);
/**
* @brief Search for an unused line in the transfers array
* to store a new SDO.
* ie a line which value of the field "state" is "SDO_RESET"
* An unused line have the field "state" at the value SDO_RESET
* @param *d Pointer on a CAN object data structure
* @param whoami Create the line for a SDO_SERVER or SDO_CLIENT.
* @param *line Pointer on a SDO line
* @return 0xFF if all the lines are on use. Else, return 0.
*/
UNS8 getSDOfreeLine (CO_Data* d, UNS8 whoami, UNS8 *line);
/**
* @brief Search for the line, in the transfers array, which contains the
* beginning of the reception of a fragmented SDO
* @param *d Pointer on a CAN object data structure
* @param CliServNbr Client or Server object involved
* @param whoami takes 2 values : look for a line opened as SDO_CLIENT or SDO_SERVER
* @param *line Pointer on a SDO line
* @return 0xFF if error. Else, return 0
*/
UNS8 getSDOlineOnUse (CO_Data* d, UNS8 CliServNbr, UNS8 whoami, UNS8 *line);
/**
* @brief Search for the line, in the transfers array, which contains the
* beginning of the reception of a fragmented SDO
*
* Because getSDOlineOnUse() does not return any line in state \c SDO_ABORTED_INTERNAL,
* this funtion is used to return them, too.
*
* @param *d Pointer on a CAN object data structure
* @param CliServNbr Client or Server object involved
* @param whoami takes 2 values : look for a line opened as SDO_CLIENT or SDO_SERVER
* @param *line Pointer on a SDO line
* @return 0xFF if error. Else, return 0
*/
UNS8 getSDOlineToClose (CO_Data* d, UNS8 CliServNbr, UNS8 whoami, UNS8 *line);
/**
* @brief Close a transmission.
* @param *d Pointer on a CAN object data structure
* @param CliServNbr Client or Server object involved
* @param whoami Line opened as SDO_CLIENT or SDO_SERVER
*/
UNS8 closeSDOtransfer (CO_Data* d, UNS8 CliServNbr, UNS8 whoami);
/**
* @brief Bytes in the line structure which must be transmited (or received)
* @param *d Pointer on a CAN object data structure
* @param line SDO line
* @param *nbBytes Pointer on nbBytes
* @return 0.
*/
UNS8 getSDOlineRestBytes (CO_Data* d, UNS8 line, UNS32 * nbBytes);
/**
* @brief Store in the line structure the nb of bytes which must be transmited (or received)
* @param *d Pointer on a CAN object data structure
* @param line SDO line
* @param nbBytes
* @return 0 if success, 0xFF if error.
*/
UNS8 setSDOlineRestBytes (CO_Data* d, UNS8 line, UNS32 nbBytes);
/**
* @brief Transmit a SDO frame on the bus bus_id
* @param *d Pointer on a CAN object data structure
* @param whoami Takes 2 values : SDO_CLIENT or SDO_SERVER
* @param CliServNbr Client or Server object involved
* @param data Array of the 8 bytes to transmit
* @return canSend(bus_id,&m) or 0xFF if error.
*/
UNS8 sendSDO (CO_Data* d, UNS8 whoami, UNS8 CliServNbr, UNS8 *pData);
/**
* @brief Transmit a SDO error to the client. The reasons may be :
* Read/Write to a undefined object
* Read/Write to a undefined subindex
* Read/write a not valid length object
* Write a read only object
* @param *d Pointer on a CAN object data structure
* @param whoami takes 2 values : SDO_CLIENT or SDO_SERVER
* @param CliServNbr
* @param index
* @param subIndex
* @param abortCode
* @return 0
*/
UNS8 sendSDOabort (CO_Data* d, UNS8 whoami, UNS8 CliServNbr, UNS16 index, UNS8 subIndex, UNS32 abortCode);
/**
* @brief Treat a SDO frame reception
* call the function sendSDO
* @param *d Pointer on a CAN object data structure
* @param *m Pointer on a CAN message structure
* @return code :
* - 0xFF if error
* - 0x80 if transfer aborted by the server
* - 0x0 ok
*/
UNS8 proceedSDO (CO_Data* d, Message *m);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to write the data at the index and subIndex indicated
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param count number of bytes to write in the dictionnary.
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @param *data Pointer to data
* @return
* - 0 is returned upon success.
* - 0xFE is returned when no sdo client to communicate with node.
* - 0xFF is returned when error occurs.
*/
UNS8 writeNetworkDict (CO_Data* d, UNS8 nodeId, UNS16 index,
UNS8 subIndex, UNS32 count, UNS8 dataType, void *data, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to write in a distant node dictionnary.
* @details The function Callback which must be defined in the user code is called at the
* end of the exchange. (on succes or abort).
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param count number of bytes to write in the dictionnary.
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @param *data Pointer to data
* @param Callback Callback function
* @return
* - 0 is returned upon success.
* - 0xFE is returned when no sdo client to communicate with node.
* - 0xFF is returned when error occurs.
*/
UNS8 writeNetworkDictCallBack (CO_Data* d, UNS8 nodeId, UNS16 index,
UNS8 subIndex, UNS32 count, UNS8 dataType, void *data, SDOCallback_t Callback, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to write in a distant node dictionnary.
* @details The function Callback which must be defined in the user code is called at the
* end of the exchange. (on succes or abort). First free SDO client parameter is
* automatically initialized for specific node if not already defined.
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param count number of bytes to write in the dictionnary.
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @param *data Pointer to data
* @param Callback Callback function
* @param endianize When not 0, data is endianized into network byte order
* when 0, data is not endianized and copied in machine native
* endianness
* @return
* - 0 is returned upon success.
* - 0xFF is returned when error occurs.
*/
UNS8 writeNetworkDictCallBackAI (CO_Data* d, UNS8 nodeId, UNS16 index,
UNS8 subIndex, UNS32 count, UNS8 dataType, void *data, SDOCallback_t Callback, UNS8 endianize, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to read.
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @return
* - 0 is returned upon success.
* - 0xFE is returned when no sdo client to communicate with node.
* - 0xFF is returned when error occurs.
*/
UNS8 readNetworkDict (CO_Data* d, UNS8 nodeId, UNS16 index, UNS8 subIndex, UNS8 dataType, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to read in a distant node dictionnary.
* @details The function Callback which must be defined in the user code is called at the
* end of the exchange. (on succes or abort).
* @param *d Pointer on a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @param Callback Callback function
* @return
* - 0 is returned upon success.
* - 0xFE is returned when no sdo client to communicate with node.
* - 0xFF is returned when error occurs.
*/
UNS8 readNetworkDictCallback (CO_Data* d, UNS8 nodeId, UNS16 index, UNS8 subIndex, UNS8 dataType, SDOCallback_t Callback, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Used to send a SDO request frame to read in a distant node dictionnary.
* @details The function Callback which must be defined in the user code is called at the
* end of the exchange. (on succes or abort). First free SDO client parameter is
* automatically initialized for specific node if not already defined.
* @param *d Pointer on a CAN object data structure
* @param nodeId Node Id of the slave
* @param index At index indicated
* @param subIndex At subIndex indicated
* @param dataType (defined in objdictdef.h) : put "visible_string" for strings, 0 for integers or reals or other value.
* @param Callback Callback function
* @return
* - 0 is returned upon success.
* - 0xFF is returned when error occurs.
*/
UNS8 readNetworkDictCallbackAI (CO_Data* d, UNS8 nodeId, UNS16 index, UNS8 subIndex, UNS8 dataType, SDOCallback_t Callback, UNS8 useBlockMode);
/**
* @ingroup sdo
* @brief Use this function after calling readNetworkDict to get the result.
*
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param *data Pointer to the buffer to get the data
* @param *size Pointer to the size : MUST contain the size of the buffer before calling
* The function set it to the actual number of written bytes
* @param *abortCode Pointer to the abortcode. (0 = not available. Else : SDO abort code. (received if return SDO_ABORTED_RCV)
*
*
* @return
* - SDO_FINISHED // datas are available
* - SDO_ABORTED_RCV // Transfer failed (abort SDO received)
* - SDO_ABORTED_INTERNAL // Transfer failed (internal abort)
* - SDO_UPLOAD_IN_PROGRESS // Datas are not yet available
* - SDO_DOWNLOAD_IN_PROGRESS // Download is in progress
* - SDO_PROVIDED_BUFFER_TOO_SMALL //The value *size is not enough to store the received data
* \n\n
* example :
* @code
* UNS32 data;
* UNS8 size;
* readNetworkDict(0, 0x05, 0x1016, 1, 0) // get the data index 1016 subindex 1 of node 5
* while (getReadResultNetworkDict (0, 0x05, &data, &size) == SDO_UPLOAD_IN_PROGRESS);
* @endcode
*/
UNS8 getReadResultNetworkDict (CO_Data* d, UNS8 nodeId, void* data, UNS32 *size, UNS32 * abortCode);
/**
* @ingroup sdo
* @brief Use this function after calling writeNetworkDict function to get the result of the write.
* @details It is mandatory to call this function because it is releasing the line used for the transfer.
* @param *d Pointer to a CAN object data structure
* @param nodeId Node Id of the slave
* @param *abortCode Pointer to the abortcode
* - 0 = not available.
* - SDO abort code (received if return SDO_ABORTED_RCV)
*
* @return :
* - SDO_FINISHED // datas are available
* - SDO_ABORTED_RCV // Transfer failed (abort SDO received)
* - SDO_ABORTED_INTERNAL // Transfer failed (Internal abort)
* - SDO_DOWNLOAD_IN_PROGRESS // Datas are not yet available
* - SDO_UPLOAD_IN_PROGRESS // Upload in progress
* \n\n
* example :
* @code
* UNS32 data = 0x50;
* UNS8 size;
* UNS32 abortCode;
* writeNetworkDict(0, 0x05, 0x1016, 1, size, &data) // write the data index 1016 subindex 1 of node 5
* while (getWriteResultNetworkDict (0, 0x05, &abortCode) == SDO_DOWNLOAD_IN_PROGRESS);
* @endcode
*/
UNS8 getWriteResultNetworkDict (CO_Data* d, UNS8 nodeId, UNS32 * abortCode);
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup statemachine State Machine
* @ingroup userapi
*/
#ifndef __states_h__
#define __states_h__
#include <applicfg.h>
/* The nodes states
* -----------------
* values are choosen so, that they can be sent directly
* for heartbeat messages...
* Must be coded on 7 bits only
* */
/* Should not be modified */
enum enum_nodeState {
Initialisation = 0x00,
Disconnected = 0x01,
Connecting = 0x02,
Preparing = 0x02,
Stopped = 0x04,
Operational = 0x05,
Pre_operational = 0x7F,
Unknown_state = 0x0F
};
typedef enum enum_nodeState e_nodeState;
typedef struct
{
INTEGER8 csBoot_Up;
INTEGER8 csSDO;
INTEGER8 csEmergency;
INTEGER8 csSYNC;
INTEGER8 csHeartbeat;
INTEGER8 csPDO;
INTEGER8 csLSS;
} s_state_communication;
/**
* @brief Function that user app can overload
* @ingroup statemachine
*/
typedef void (*initialisation_t)(CO_Data*);
typedef void (*preOperational_t)(CO_Data*);
typedef void (*operational_t)(CO_Data*);
typedef void (*stopped_t)(CO_Data*);
/**
* @ingroup statemachine
* @brief Function that user app can overload
* @param *d Pointer on a CAN object data structure
*/
void _initialisation(CO_Data* d);
/**
* @ingroup statemachine
* @brief Function that user app can overload
* @param *d Pointer on a CAN object data structure
*/
void _preOperational(CO_Data* d);
/**
* @ingroup statemachine
* @brief Function that user app can overload
* @param *d Pointer on a CAN object data structure
*/
void _operational(CO_Data* d);
/**
* @ingroup statemachine
* @brief Function that user app can overload
* @param *d Pointer on a CAN object data structure
*/
void _stopped(CO_Data* d);
#include "data.h"
/************************* prototypes ******************************/
/**
* @brief Called by driver/app when receiving messages
* @param *d Pointer on a CAN object data structure
* @param *m Pointer on a CAN message structure
*/
void canDispatch(CO_Data* d, Message *m);
/**
* @ingroup statemachine
* @brief Returns the state of the node
* @param *d Pointer on a CAN object data structure
* @return The node state
*/
e_nodeState getState (CO_Data* d);
/**
* @ingroup statemachine
* @brief Change the state of the node
* @param *d Pointer on a CAN object data structure
* @param newState The state to assign
* @return
*/
UNS8 setState (CO_Data* d, e_nodeState newState);
/**
* @ingroup statemachine
* @brief Returns the nodId
* @param *d Pointer on a CAN object data structure
* @return
*/
UNS8 getNodeId (CO_Data* d);
/**
* @ingroup statemachine
* @brief Define the node ID. Initialize the object dictionary
* @param *d Pointer on a CAN object data structure
* @param nodeId The node ID to assign
*/
void setNodeId (CO_Data* d, UNS8 nodeId);
/**
* @brief Some stuff to do when the node enter in pre-operational mode
* @param *d Pointer on a CAN object data structure
*/
void initPreOperationalMode (CO_Data* d);
#endif

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup synco Synchronisation Object
* SYNC object is a CANopen message forcing the receiving nodes to sample the inputs mapped into synchronous TPDOS.
* Receiving this message cause the node to set the outputs to values received in the previous synchronous RPDO.
* @ingroup comobj
*/
#ifndef __SYNC_h__
#define __SYNC_h__
void startSYNC(CO_Data* d);
void stopSYNC(CO_Data* d);
typedef void (*post_sync_t)(CO_Data*);
void _post_sync(CO_Data* d);
typedef void (*post_TPDO_t)(CO_Data*);
void _post_TPDO(CO_Data* d);
/**
* @brief Transmit a SYNC message and trigger sync TPDOs
* @param *d Pointer on a CAN object data structure
* @return
*/
UNS8 sendSYNC (CO_Data* d);
/**
* @brief Transmit a SYNC message on CAN bus
* @param *d Pointer on a CAN object data structure
* @return
*/
UNS8 sendSYNCMessage(CO_Data* d);
/**
* @brief This function is called when the node is receiving a SYNC message (cob-id = 0x80).
* - Check if the node is in OERATIONAL mode. (other mode : return 0 but does nothing).
* - Get the SYNC cobId by reading the dictionary index 1005, check it does correspond to the received cobId
* - Trigger sync TPDO emission
* @param *d Pointer on a CAN object data structure
* @return 0 if OK, 0xFF if error
*/
UNS8 proceedSYNC (CO_Data* d);
#endif

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#ifndef __sysdep_h__
#define __sysdep_h__
#include "config.h"
#ifdef CANOPEN_BIG_ENDIAN
/* Warning: the argument must not update pointers, e.g. *p++ */
#define UNS16_LE(v) ((((UNS16)(v) & 0xff00) >> 8) | \
(((UNS16)(v) & 0x00ff) << 8))
#define UNS32_LE(v) ((((UNS32)(v) & 0xff000000) >> 24) | \
(((UNS32)(v) & 0x00ff0000) >> 8) | \
(((UNS32)(v) & 0x0000ff00) << 8) | \
(((UNS32)(v) & 0x000000ff) << 24))
#else
#define UNS16_LE(v) (v)
#define UNS32_LE(v) (v)
#endif
#endif /* __sysdep_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __timer_h__
#define __timer_h__
#include <timerscfg.h>
#include <applicfg.h>
#define TIMER_HANDLE INTEGER16
#include "data.h"
/* --------- types and constants definitions --------- */
#define TIMER_FREE 0
#define TIMER_ARMED 1
#define TIMER_TRIG 2
#define TIMER_TRIG_PERIOD 3
#define TIMER_NONE -1
typedef void (*TimerCallback_t)(CO_Data* d, UNS32 id);
struct struct_s_timer_entry {
UNS8 state;
CO_Data* d;
TimerCallback_t callback; /* The callback func. */
UNS32 id; /* The callback func. */
TIMEVAL val;
TIMEVAL interval; /* Periodicity */
};
typedef struct struct_s_timer_entry s_timer_entry;
/* --------- prototypes --------- */
/*#define SetAlarm(d, id, callback, value, period) printf("%s, %d, SetAlarm(%s, %s, %s, %s, %s)\n",__FILE__, __LINE__, #d, #id, #callback, #value, #period); _SetAlarm(d, id, callback, value, period)*/
/**
* @ingroup timer
* @brief Set an alarm to execute a callback function when expired.
* @param *d Pointer to a CAN object data structure
* @param id The alarm Id
* @param callback A callback function
* @param value Call the callback function at current time + value
* @param period Call periodically the callback function
* @return handle The timer handle
*/
TIMER_HANDLE SetAlarm(CO_Data* d, UNS32 id, TimerCallback_t callback, TIMEVAL value, TIMEVAL period);
/**
* @ingroup timer
* @brief Delete an alarm before expiring.
* @param handle A timer handle
* @return The timer handle
*/
TIMER_HANDLE DelAlarm(TIMER_HANDLE handle);
void TimeDispatch(void);
/**
* @ingroup timer
* @brief Set a timerfor a given time.
* @param value The time value.
*/
void setTimer(TIMEVAL value);
/**
* @ingroup timer
* @brief Get the time elapsed since latest timer occurence.
* @return time elapsed since latest timer occurence
*/
TIMEVAL getElapsedTime(void);
#endif /* #define __timer_h__ */

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/*
This file is part of CanFestival, a library implementing CanOpen Stack.
Copyright (C): Edouard TISSERANT and Francis DUPIN
See COPYING file for copyrights details.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/** @defgroup timer Timer Management
* @ingroup userapi
*/
#ifndef __timer_driver_h__
#define __timer_driver_h__
#include "timerscfg.h"
#include "timer.h"
// For use from CAN driver
#define TIMER_HANDLE INTEGER16
/**
* @ingroup timer
* @brief Acquire mutex
*/
void EnterMutex(void);
/**
* @ingroup timer
* @brief Release mutex
*/
void LeaveMutex(void);
void WaitReceiveTaskEnd(TASK_HANDLE*);
/**
* @ingroup timer
* @brief Initialize Timer
*/
void TimerInit(void);
/**
* @ingroup timer
* @brief Cleanup Timer
*/
void TimerCleanup(void);
/**
* @ingroup timer
* @brief Start the timer task
* @param Callback A callback function
*/
void StartTimerLoop(TimerCallback_t Callback);
/**
* @ingroup timer
* @brief Stop the timer task
* @param Callback A callback function
*/
void StopTimerLoop(TimerCallback_t Callback);
/**
* @brief Stop the timer task
* @param port CanFestival file descriptor
* @param *handle handle of receive loop thread
* @param *ReceiveLoopPtr Pointer on the receive loop function
*/
void CreateReceiveTask(CAN_PORT port, TASK_HANDLE* handle, void* ReceiveLoopPtr);
#endif

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/**
******************************************************************************
* @file rtl8721d_can.h
* @author
* @version V1.0.0
* @date 2018-07-05
* @brief This file contains all the functions prototypes for the CAN firmware
* library.
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#ifndef _RTL8721D_CAN_H_
#define _RTL8721D_CAN_H_
/** @addtogroup AmebaD_Periph_Driver
* @{
*/
/** @defgroup CAN
* @{
*/
/*===================================================================================================*/
/*CAN IP register*/
typedef struct {
__IO u32 CAN_CTL; /*!< CAN control register, Address offset: 0x00*/
__IO u32 CAN_STS; /*!< CAN status register, Address offset: 0x04*/
__IO u32 CAN_FIFO_STS; /*!< CAN protocol bit timing register, Address offset: 0x08*/
__IO u32 CAN_BIT_TIMING; /*!< CAN bit timing register, Address offset: 0x0C*/
__IO u32 CAN_FD_BIT_TIMING; /*!< CAN bit timing register, Address offset: 0x10*/
__IO u32 CAN_FD_SSP_CAL; /*!< CAN bit timing register, Address offset: 0x14*/
__IO u32 CAN_INT_EN; /*!< CAN interrupt flag register, Address offset: 0x18*/
__IO u32 CAN_MB_RXINT_EN; /*!< CAN message buffer rx interrupt register, Address offset: 0x1c*/
__IO u32 CAN_MB_TXINT_EN; /*!< CAN message buffer tx interrupt register, Address offset: 0x20*/
__IO u32 CAN_INT_FLAG; /*!< CAN interrupt status register, Address offset: 0x24*/
__IO u32 CAN_ERR_FLAG; /*!< CAN error status register, Address offset: 0x28*/
__IO u32 CAN_ERR_CNT_CTL; /*!< CAN error counter control register, Address offset: 0x2c*/
__IO u32 CAN_ERR_CNT_STS; /*!< CAN error counter status register, Address offset: 0x30*/
__IO u32 CAN_TX_ERROR_FLAG; /*!< CAN tx error flag register, Address offset: 0x34*/
__IO u32 CAN_TX_FLAG; /*!< CAN tx error flag register, Address offset: 0x38*/
__IO u32 CAN_RX_FLAG; /*!< CAN tx error flag register, Address offset: 0x3c*/
__IO u32 CAN_TIME_STAMP; /*!< CAN time stamp register, Address offset: 0x40*/
__IO u32 CAN_MB_TRIGGER; /*!< CAN time stamp register, Address offset: 0x44*/
__IO u32 CAN_RXDMA_BA; /*!< CAN time stamp register, Address offset: 0x48*/
__IO u32 CAN_RX_DMA_DATA; /*!< CAN time stamp register, Address offset: 0x4c*/
__IO u32 CAN_WAKEPIN_FLT; /*!< CAN wakeup pin filter setting register, Address offset: 0x50*/
__IO u32 CAN_TEST; /*!< CAN test register, Address offset: 0x54*/
__IO u32 RSVD0[42]; /*!< CAN reserved register, Address offset: 0x58~0x9c*/
__IO u32 CAN_MB_STS[16]; /*!< CAN message buffer status, Address offset: 0x100~0x13c*/
__IO u32 RSVD1[48]; /*!< CAN reserved register, Address offset: 0x140~0x1fc*/
__IO u32 CAN_MB_CTRL[16]; /*!< CAN message buffer control register, Address offset: 0x200~0x23c*/
__IO u32 RSVD2[44]; /*!< CAN reserved register, Address offset: 0x240~0x2ec*/
__IO u32 CAN_MB_BA_END; /*!< CAN message buffer base end register, Address offset: 0x2f0*/
__IO u32 RSVD3[3]; /*!< CAN message buffer base end register, Address offset: 0x2f4~0x2fc*/
__IO u32 CAN_RAM_DATA[16]; /*!< CAN message buffer base end register, Address offset: 0x300~0x33c*/
__IO u32 CAN_RAM_ARB; /*!< CAN RAM arbitration register, Address offset: 0X340*/
__IO u32 CAN_RAM_MASK; /*!< CAN RAM MASK register, Address offset: 0x344*/
__IO u32 CAN_RAM_CS; /*!< CAN ram control/status register, Address offset: 0x348*/
__IO u32 CAN_RAM_CMD; /*!< CAN ram command register, Address offset: 0x34c*/
__IO u32 RSVD4[43]; /*!< CAN reserved register, Address offset: 0x450~0x4f8*/
__IO u32 CAN_DUMMY; /*!< CAN dummy register, Address offset: 0x4fc*/
//__IO u32 CAN_RAM_DATA_H;
//__IO u32 CAN_RAM_DATA_L;
}RCAN_TypeDef;
#define RCAN_REG_BASE KEYSCAN_REG_BASE //(SDIO_DEVICE_REG_BASE) //(0x4002C000)
#define RCAN ((RCAN_TypeDef *) RCAN_REG_BASE)
#define APB_CLK_RCAN (20000000)
#define RCAN_MESSAGE_BUFFER_LEN (5)
#define RCAN_MESSAGE_BUFFER_SIZE (16)
#define RCAN_MESSAGE_FIFO_SIZE (4)
#define RCAN_RX_FIFO_READ_MSG_IDX (12)
/*===================================================================================================*/
/* Exported Types --------------------------------------------------------*/
/** @defgroup RCAN_Exported_Types RCAN Exported Types
* @{
*/
/**
* @brief RCAN Mode Initialization structure definition
*/
typedef struct
{
u32 CAN_TimStampEn; /*!< Specifies the CAN stamp timer enable or disable.
This parameter can be ENABLE or DISABLE. */
u32 CAN_TimStampDiv; /*!< Specifies the CAN stamp timer divider.
This parameter can be a number between 0x01 and 0xff. */
u32 CAN_AutoReTxEn; /*!< Specifies the message auto re-transmission configuration.
This parameter can be a ENABLE or DISABLE. */
u32 CAN_TriSampleEn; /*!< Specifies the tripple sampling configuration.
This parameter can be ENABLE or DISABLE. */
u32 CAN_WorkMode; /*!< Specifies the CAN work mode.
This parameter can be of @ref RCAN_WORK_MODE_define. */
u32 CAN_FDCrcMode; /*!< Specifies the CAN FD CRC mode.
This parameter can be of @ref RCAN_FD_CRC_MODE_define. */
u32 CAN_ErrCntThreshold; /*!< Specifies the message length.
This parameter can be a number between 0x000 and 0x1ff*/
u32 CAN_RxFifoEn; /*!< Specifies the CAN FIFO mode configure register.
This parameter can be ENABLE or DISABLE. */
u32 CAN_BitPrescaler; /*!< Specifies the bit timing prescaler.
This parameter can be a number between 0x1 and 0x100*/
u32 CAN_SJW; /*!< Specifies the CAN bit timing SJW.
This parameter can be a number between 0x1 and 0x8. */
u32 CAN_TSEG1; /*!< Specifies the CAN TSEG1.
This parameter can be a number between 0x1 and 0x10. */
u32 CAN_TSEG2; /*!< Specifies the CAN TSEG2.
This parameter can be a number between 0x1 and 0x10. */
u32 CAN_FdBitPrescaler; /*!< Specifies the CAN fd protocol bit timing prescaler.
This parameter can be a number between 0x1 and 0x100*/
u32 CAN_FdSJW; /*!< Specifies the CAN fd protocol bit timing SJW.
This parameter can be a number between 0x1 and 0x8. */
u32 CAN_FdTSEG1; /*!< Specifies the CAN fd protocol TSEG1.
This parameter can be a number between 0x1 and 0x10. */
u32 CAN_FdTSEG2; /*!< Specifies the CAN fd protocol TSEG2.
This parameter can be a number between 0x1 and 0x10. */
u32 CAN_FdCtrl; /*!< Specifies the CAN fd Protocol ENABLE or DISABLE.
This parameter can be ENABLE or DISABLE. */
u32 CAN_FdSspAuto; /*!< Specifies the automatic calculat ssp delay.*/
u32 CAN_FdSspDco; /*!< Specifies the delay compensation offset.
This parameter can be a number between 0x0 and 0xff. */
u32 CAN_FdSspMin; /*!< Specifies the minimum of ssp from start of one bit, only functional when can_fd_ssp_auto set.
This parameter can be a number between 0x0 and 0xff.*/
u32 CAN_FdSsp; /*!< Specifies the ssp position, delay from start of one bit, if automatic calculation is enabled, the field will update after calculation.
This parameter can be a number between 0x0 and 0xff. */
} RCAN_InitTypeDef;
/**
* @}
*/
/**
* @brief RCAN DMA mode ram buffer structure definition
*/
typedef struct
{
__attribute__ ((aligned (4)))
u32 CAN_RAM_DATA[16]; /*!< CAN message buffer base end, Address offset mapping: 0x300~0x33c*/
u32 CAN_RAM_ARB; /*!< CAN RAM arbitration, Address offset mapping : 0X340*/
u32 CAN_RAM_MASK; /*!< CAN RAM MASK register, Address offset mapping: 0x344*/
u32 CAN_RAM_CS; /*!< CAN ram control/status , Address offset mapping: 0x348*/
u32 CAN_RAM_CMD; /*!< CAN ram command , Address offset mapping: 0x34c*/
} RCAN_DmaBufferTypeDef;
/**
* @}
*/
/**
* @brief CAN Tx message descriptor structure definition
*/
typedef struct
{
u32 ProtocolType; /*!< Specifies the protocol type of frame for the message that will
be transmitted. This parameter can be a value of
@ref RCAN_PROTOCOL_TYPE_define */
u32 StdId; /*!< Specifies the standard identifier.
This parameter can be a value between 0 to 0x7FF. */
u32 ExtId; /*!< Specifies the extended identifier.
This parameter can be a value between 0 to 0x1FFFFFFF. */
u32 MsgBufferIdx; /*!< Specifies the extended identifier.
This parameter can be a value between 0 to 0xf. */
u32 IDE; /*!< Specifies the type of identifier for the message that
will be transmitted. This parameter can be a value
of @ref RCAN_ID_TYPE_define */
u32 RTR; /*!< Specifies the type of frame for the message that will
be transmitted. This parameter can be a value of
@ref RCAN_FRAME_TYPE_define */
u32 DLC; /*!< Specifies the length of the frame that will be
transmitted. This parameter can be a value between
0 to 8 */
u32 ESI; /*!< Specifies the FD frame esi bit, indicate error passive of message sending node,
read bit, should always write 0, hardware automatic fill*/
u32 BRS; /*!< Specifies the FD frame brs bit, indicate switch bit timing*/
u32 EDL; /*!< Specifies the FD frame edl bit, indicate it's a FD frame*/
__attribute__ ((aligned (4)))
u8 Data[64]; /*!< Contains the data to be transmitted. It ranges from 0
to 0xFF. */
u32 IDE_MASK; /*!< Specifies the IDE MASK, ####*/
u32 ID_MASK; /*!< Specifies the ID MASK, ####*/
u32 RTR_Mask; /*!< Specifies the RTR MASK, ####*/
} RCAN_TxMsgTypeDef;
/**
* @}
*/
/**
* @brief CAN Rx message descriptor structure definition
*/
typedef struct
{
u32 ProtocolType; /*!< Specifies the protocol type of frame for the message that will
be transmitted. This parameter can be a value of
@ref RCAN_PROTOCOL_TYPE_define */
u32 StdId; /*!< Specifies the standard identifier.
This parameter can be a value between 0 to 0x7FF, ####*/
u32 ExtId; /*!< Specifies the extended identifier.
This parameter can be a value between 0 to 0x1FFFFFFF, #### */
u32 MsgBufferIdx; /*!< Specifies the extended identifier.
This parameter can be a value between 0 to 0xf, ####*/
u32 IDE; /*!< Specifies the type of identifier for the message that
will be transmitted. This parameter can be a value
of @ref RCAN_ID_TYPE_define , ####*/
u32 RTR; /*!< Specifies the type of frame for the message that will
be transmitted. This parameter can be a value of
@ref RCAN_FRAME_TYPE_define, ####*/
u32 DLC; /*!< Specifies the length of the frame that will be
transmitted. This parameter can be a value between
0 to 8*/
u32 ESI; /*!< Specifies the FD frame esi bit, indicate error passive of message sending node,
read bit, should always write 0, hardware automatic fill*/
u32 BRS; /*!< Specifies the FD frame brs bit, indicate switch bit timing*/
u32 EDL; /*!< Specifies the FD frame edl bit, indicate it's a FD frame*/
__attribute__ ((aligned (4)))
u8 Data[64]; /*!< Contains the data to be transmitted. It ranges from 0
to 0xFF. */
u32 ID_MASK; /*!< Specifies the ID MASK*/
u32 RTR_Mask; /*!< Specifies the RTR MASK, refer to RCAN_RTR_MASK_TYPE_define*/
u32 IDE_Mask; /*!< Specifies the IDE MASK, refer to RCAN_IDE_MASK_TYPE_define*/
u32 RxTimStamp; /*!< Specifies the rx time stamp */
u32 RxLost; /*!< Specifies the rx lost times */
} RCAN_RxMsgTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup RCAN_Exported_Constants RCAN Exported Constants
* @{
*/
/** @defgroup RCAN_WORK_MODE_define
* @{
*/
#define RCAN_NORMAL_MODE ((u32)0x00000000)
#define RCAN_SILENCE_MODE ((u32)0x00000001)
#define RCAN_LOOPBACK_MODE ((u32)0x00000002)
#define IS_RCAN_WORK_MODE(MODE) (((MODE) == RCAN_NORMAL_MODE) || \
((MODE) == RCAN_SILENCE_MODE) || \
((MODE) == RCAN_LOOPBACK_MODE))
/**
* @}
*/
/** @defgroup RCAN_PROTOCOL_TYPE_define
* @{
*/
#define RCAN_CAN20_PROTOCOL_FRAME ((u32)0x00000000)
#define RCAN_FD_PROTOCOL_FRAME ((u32)0x00000001)
#define IS_RCAN_PROTOCOL_TYPE(TYPE) (((TYPE) == RCAN_CAN20_PROTOCOL_FRAME) || \
((TYPE) == RCAN_FD_PROTOCOL_FRAME))
/**
* @}
*/
/** @defgroup RCAN_ID_TYPE_define
* @{
*/
#define RCAN_STANDARD_FRAME ((u32)0x00000000)
#define RCAN_EXTEND_FRAME ((u32)0x20000000)
#define IS_RCAN_ID_TYPE(TYPE) (((TYPE) == RCAN_STANDARD_FRAME) || \
((TYPE) == RCAN_EXTEND_FRAME))
/**
* @}
*/
/** @defgroup RCAN_FD_CRC_MODE_define
* @{
*/
#define RCAN_ISO_CRC ((u32)0x00000000)
#define RCAN_NON_ISO_CRC ((u32)0x00000100)
#define IS_RCAN_CRC_TYPE(TYPE) (((TYPE) == RCAN_ISO_CRC) || \
((TYPE) == RCAN_NON_ISO_CRC))
/**
* @}
*/
/** @defgroup RCAN_FD_BIT_TIMING_SWITCH_TYPE_define
* @{
*/
#define RCAN_FD_SWITCH_BIT_TIMING ((u32)0x00000200)
#define RCAN_FD_NOT_SWITCH_BIT_TIMING ((u32)0x00000000)
#define IS_RCAN_FD_BIT_RATE_SWITCH_TYPE(TYPE) (((TYPE) == RCAN_FD_NOT_SWITCH_BIT_TIMING) || \
((TYPE) == RCAN_FD_SWITCH_BIT_TIMING))
/**
* @}
*/
/** @defgroup RCAN_FD_ER_STS_INDICATOR_TYPE_define
* @{
*/
#define RCAN_FD_ERROR_ACTIVE_NODE ((u32)0x00000000)
#define RCAN_FD_ERROR_PASSIVE_NODE ((u32)0x00000400)
#define IS_RCAN_FD_ER_NODE_TYPE(TYPE) (((TYPE) == RCAN_FD_ERROR_ACTIVE_NODE) || \
((TYPE) == RCAN_FD_ERROR_PASSIVE_NODE))
/**
* @}
*/
/** @defgroup RCAN_PROTOCOL_FRAME_TYPE_define
* @{
*/
#define RCAN_FD_FRAME_TYPE ((u32)0x00000100)
#define RCAN_NOT_FD_FRAME_TYPE ((u32)0x00000000)
#define IS_RCAN_PRO_FRAEME_TYPE(TYPE) (((TYPE) == RCAN_FD_FRAME_TYPE) || \
((TYPE) == RCAN_NOT_FD_FRAME_TYPE))
/**
* @}
*/
/** @defgroup RCAN_FRAME_TYPE_define
* @{
*/
#define RCAN_REMOTE_FRAME ((u32)0x40000000)
#define RCAN_DATA_FRAME ((u32)0x00000000)
#define IS_RCAN_FRAME_TYPE(TYPE) (((TYPE) == RCAN_REMOTE_FRAME) || \
((TYPE) == RCAN_DATA_FRAME))
/**
* @}
*/
/** @defgroup RCAN_RTR_MASK_TYPE_define
* @{
*/
#define RCAN_RTR_BIT_MASK ((u32)0x40000000)
#define RCAN_RTR_NIT_NOT_MASK ((u32)0x00000000)
#define IS_RCAN_RTR_BIT_MASK_TYPE(TYPE) (((TYPE) == RCAN_RTR_BIT_MASK) || \
((TYPE) == RCAN_RTR_NIT_NOTE_MASK))
/**
* @}
*/
/** @defgroup RCAN_IDE_MASK_TYPE_define
* @{
*/
#define RCAN_IDE_BIT_MASK ((u32)0x20000000)
#define RCAN_IDE_NIT_NOT_MASK ((u32)0x00000000)
#define IS_RCAN_IDE_BIT_MASK_TYPE(TYPE) (((TYPE) == RCAN_IDE_BIT_MASK) || \
((TYPE) == RCAN_IDE_NIT_NOT_MASK))
/**
* @}
*/
/** @defgroup RCAN_MESSAGE_BUFFER_STATUS_define
* @{
*/
#define RCAN_FRAME_PENDING_TX ((u32)0x00000001)
#define RCAN_FRAME_FINISAH_TX ((u32)0x00000002)
#define RCAN_FRAME_OVWRITR_SEND_TX ((u32)0x00000003)
#define RCAN_FRAME_PENDING_RX ((u32)0x00000004)
#define RCAN_FRAME_FINISH_RX ((u32)0x0000000C)
#define IS_RCAN_MSG_STS_TYPE(TYPE) (((TYPE) == RCAN_FRAME_PENDING_TX) || \
((TYPE) == RCAN_FRAME_FINISAH_TX) || \
((TYPE) == RCAN_FRAME_OVWRITR_SEND_TX) || \
((TYPE) == RCAN_SILENCE_MODE) || \
((TYPE) == RCAN_FRAME_PENDING_RX))
/**
* @}
*/
/** @defgroup RCAN_INTERRUPTS_define
* @{
*/
#define RCAN_TX_INT ((u32)0x00000001)
#define RCAN_RX_INT ((u32)0x00000002)
#define RCAN_ERR_INT ((u32)0x00000004)
#define RCAN_WKUP_INT ((u32)0x00000008)
#define RCAN_BUSOFF_INT ((u32)0x00000010)
#define RCAN_RAM_MOVE_DONE_INT ((u32)0x00000020)
#define IS_RCAN_CONFIG_IT(IT) (((IT) == RCAN_TX_INT) || \
((IT) == RCAN_RX_INT) || \
((IT) == RCAN_ERR_INT)|| \
((IT) == RCAN_WKUP_INT)|| \
((IT) == RCAN_RAM_MOVE_DONE_INT)|| \
((IT) == RCAN_BUSOFF_INT))
#define IS_RCAN_CLEAR_IT(IT) ((((IT) & (u32)0xFFFFFFC0) == 0x00) && ((IT) != 0x00))
/**
* @}
*/
/** @defgroup RCAN_type_define
* @{
*/
#define IS_RCAN_ALL_PERIPH(PERIPH) (PERIPH == RCAN)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup RCAN_Exported_Functions RCAN Exported Functions
* @{
*/
/** @defgroup RCAN_global_functions
* @{
*/
_LONG_CALL_ void RCAN_StructInit(RCAN_InitTypeDef * RCAN_InitStruct);
_LONG_CALL_ void RCAN_Init(RCAN_TypeDef* RCANx, RCAN_InitTypeDef * RCAN_InitStruct);
_LONG_CALL_ void RCAN_LpFilterCmd(RCAN_TypeDef* RCANx, u32 NewState);
_LONG_CALL_ void RCAN_LpFilterConfig(RCAN_TypeDef* RCANx, u32 FltNum);
_LONG_CALL_ void RCAN_BusCmd(RCAN_TypeDef* RCANx, u32 NewState);
_LONG_CALL_ u32 RCAN_BusStatusGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_FifoStatusGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_FifoLvlGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ void RCAN_ReadRxMsgFromFifo(RCAN_TypeDef* RCANx, RCAN_RxMsgTypeDef * RxMsg);
_LONG_CALL_ u32 RCAN_TXErrCntGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_RXErrCntGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_TXErrCntClear(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_RXErrCntClear(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_RXErrCntSTS(RCAN_TypeDef* RCANx);
_LONG_CALL_ void RCAN_WriteMsg(RCAN_TypeDef* RCANx, RCAN_TxMsgTypeDef* TxMsg);
_LONG_CALL_ void RCAN_SetRxMsgBuf(RCAN_TypeDef* RCANx, RCAN_RxMsgTypeDef * RxMsg);
_LONG_CALL_ void RCAN_ReadMsg(RCAN_TypeDef* RCANx, RCAN_RxMsgTypeDef * RxMsg);
_LONG_CALL_ void RCAN_TxAutoReply(RCAN_TypeDef* RCANx, RCAN_TxMsgTypeDef* TxMsg);
_LONG_CALL_ void RCAN_RxAutoReply(RCAN_TypeDef* RCANx, RCAN_RxMsgTypeDef * RxMsg);
_LONG_CALL_ void RCAN_Cmd(RCAN_TypeDef* RCANx, u32 NewState);
/**
* @}
*/
/** @defgroup RCAN_Interrupt_status_functions
* @{
*/
_LONG_CALL_ void RCAN_INTConfig(RCAN_TypeDef* RCANx, u32 RCAN_IT, u32 NewState);
_LONG_CALL_ u32 RCAN_GetINTStatus(RCAN_TypeDef* RCANx);
_LONG_CALL_ void RCAN_ClearINT(RCAN_TypeDef* RCANx, u32 RCAN_IT);
_LONG_CALL_ void RCAN_ClearAllINT(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_GetErrStatus(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_ClearErrStatus(RCAN_TypeDef* RCANx, u32 ERR_STS);
_LONG_CALL_ void RCAN_RxMsgBufINTConfig(RCAN_TypeDef* RCANx, u32 BUF_IT, u32 NewState);
_LONG_CALL_ void RCAN_TxMsgBufINTConfig(RCAN_TypeDef* RCANx, u32 BUF_IT, u32 NewState);
_LONG_CALL_ u32 RCAN_TxMsgBufErrGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_TxMsgBufErrClear(RCAN_TypeDef* RCANx, u32 ERR);
_LONG_CALL_ u32 RCAN_MsgBufStatusRegGet(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ u32 RCAN_MsgBufStatusGet(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ u32 RCAN_CheckMsgBufAvailable(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ u32 RCAN_TxDoneStatusGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_MsgBufTxDoneStatusGet(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ u32 RCAN_RxDoneStatusGet(RCAN_TypeDef* RCANx);
_LONG_CALL_ u32 RCAN_MsgBufRxDoneStatusGet(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ void RCAN_TxDoneStatusClear(RCAN_TypeDef* RCANx, u32 Status);
_LONG_CALL_ void RCAN_MsgBufTxDoneStatusClear(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ void RCAN_RxDoneStatusClear(RCAN_TypeDef* RCANx, u32 Status);
_LONG_CALL_ void RCAN_MsgBufRxDoneStatusClear(RCAN_TypeDef* RCANx, u32 MsgBufIdx);
_LONG_CALL_ void RCAN_TxMsgTriggerCmd(RCAN_TypeDef* RCANx, u32 State);
_LONG_CALL_ void RCAN_TxMsgTriggerConfig(RCAN_TypeDef* RCANx, u32 CloseOffset, u32 Begin);
_LONG_CALL_ void RCAN_RxDmaDestBaseAddrConfig(RCAN_TypeDef* RCANx, u32 Addr);
_LONG_CALL_ u32 RCAN_GetRxDmaData(RCAN_TypeDef* RCANx);
_LONG_CALL_ void RCAN_MsgCtrlRegConfig(RCAN_TypeDef* RCANx, u32 MsgIdx, u32 RxDmaEn, u32 DmaOffset);
_LONG_CALL_ void RCAN_MsgBaseAddrConfig(RCAN_TypeDef* RCANx, u32 MsgIdx, u32 BaseAddr);
_LONG_CALL_ void RCAN_MsgBaseAddrEndReg(RCAN_TypeDef* RCANx, u32 EndAddr);
_LONG_CALL_ u32 RCAN_RamBufferMapConfig(RCAN_TypeDef* RCANx, u32 *pPara);
/**
* @}
*/
/** @defgroup RCAN_dma_functions
* @{
*/
_LONG_CALL_ BOOL RCAN_TXGDMA_Init(u8 CANIndex, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc, u8 *pTxBuf, int TxCount);
_LONG_CALL_ BOOL RCAN_RXGDMA_Init(u8 CANIndex, GDMA_InitTypeDef *GDMA_InitStruct, void *CallbackData, IRQ_FUN CallbackFunc);
_LONG_CALL_ void RCAN_FillTXDmaBuffer(RCAN_DmaBufferTypeDef* RCANxBufer, RCAN_TxMsgTypeDef* TxMsg);
/**
* @}
*/
/**
* @}
*/
/* Registers Definitions --------------------------------------------------------*/
/**************************************************************************//**
* @defgroup RCAN_Register_Definitions RCAN Register Definitions
* @{
*****************************************************************************/
/**************************************************************************//**
* @defgroup CAN_CTL
* @{
*****************************************************************************/
#define RCAN_EN ((u32)0x00000001) /*BIT[0], ECAN enable*/
#define RCAN_BUS_ON_REQ ((u32)0x00000002) /*BIT[1], ECAN bus on request*/
#define RCAN_TRI_SAMPLE ((u32)0x00000004) /*BIT[2], ECAN tripple sample mode*/
#define RCAN_AUTO_RPY_TX_EN ((u32)0x00000008) /*BIT[3], auto re-transmission enabled*/
#define RCAN_TEST_MODE_EN ((u32)0x00000010) /*BIT[4], test mode enable, for lbk or silent mode use*/
#define RCAN_RX_FIFO_EN ((u32)0x00000020) /*BIT[5], rx fifo function enable*/
#define RCAN_FD_EN ((u32)0x00000040) /*BIT[6], CAN FD enable*/
#define RCAN_RXDMA_EN ((u32)0x00000080) /*BIT[7], RX DMA enable*/
#define RCAN_CAN_FD_CRC_MODE ((u32)0x00000100) /*BIT[8], CAN FD CRC mode. 0: ISO CRC, 1: non-ISO CRC*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_STS
* @{
*****************************************************************************/
#define RCAN_BUS_ON_STS ((u32)0x00000001) /*BIT[0], 1 means the can moudle is already bus on*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_FIFO_STS
* @{
*****************************************************************************/
#define RCAN_FIFO_MSG_FULL ((u32)0x00000001) /*BIT[0], rx fifo full */
#define RCAN_FIFO_MSG_EMTY ((u32)0x00000002) /*BIT[1], rx fifo empty*/
#define RCAN_FIFO_MSG_OVERFLW ((u32)0x00000004) /*BIT[2], rx fifo overflow*/
#define RCAN_FIFO_MSG_LVL ((u32)0x00000070) /*BIT[7:4], rx fifo level*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_BIT_TIMING
* @{
*****************************************************************************/
#define RCAN_TSEG1 ((u32)0x000000ff) /*BIT[7:0], TSEG1 length = can_tseg1+1 */
#define RCAN_TSEG2 ((u32)0x0000ff00) /*BIT[15:8], TSEG2 length = can_tseg2+1*/
#define RCAN_SJW ((u32)0x0070000) /*BIT[18:16], SJW length = can_sjw+1*/
#define RCAN_BRP ((u32)0xff000000) /*BIT[31:24], CAN bit timing perscaler = can_brp+1*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_FD_BIT_TIMING
* @{
*****************************************************************************/
#define RCAN_FD_TSEG1 ((u32)0x0000000f) /*BIT[3:0], FD TSEG1 length = can_tseg1+1 */
#define RCAN_FD_TSEG2 ((u32)0x000000f0) /*BIT[7:4], FD TSEG2 length = can_tseg2+1*/
#define RCAN_FD_SJW ((u32)0x00000700) /*BIT[10:8], FD SJW length = can_sjw+1*/
#define RCAN_FD_BRP ((u32)0xff000000) /*BIT[31:24], FD CAN bit timing perscaler = can_brp+1*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_FD_SSP_CAL
* @{
*****************************************************************************/
#define RCAN_CAN_FD_SSP ((u32)0x000000ff) /*BIT[7:0], ssp position, delay from start of one bit, if automatic calculation is enabled, the field will update after calculation */
#define RCAN_CAN_FD_SSP_MIN ((u32)0x0000ff00) /*BIT[15:8], minimum of ssp from start of one bit, only functional when can_fd_ssp_auto set*/
#define RCAN_CAN_FD_SSP_DCO ((u32)0x00ff0000) /*BIT[23:16], delay compensation offset*/
#define RCAN_CAN_FD_SSP_AUTO ((u32)0x01000000) /*BIT[24], automatic calculat ssp delay */
/** @} */
/**************************************************************************//**
* @defgroup CAN_INT_EN
* @{
*****************************************************************************/
#define RCAN_TX_INT_EN ((u32)0x00000001) /*BIT[0], tx interrupt enable */
#define RCAN_RX_INT_EN ((u32)0x00000002) /*BIT[1], rx interrupt enable*/
#define RCAN_ERR_INT_EN ((u32)0x00000004) /*BIT[2], error interrupt enable*/
#define RCAN_WAKEUP_INT_EN ((u32)0x00000008) /*BIT[3], wake up interrupt enable*/
#define RCAN_BUSOFF_INT_EN ((u32)0x00000010) /*BIT[4], bus off interrupt enable*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_RXINT_EN
* @{
*****************************************************************************/
#define RCAN_MB_RXINT_EN ((u32)0x0000FFFF) /*BIT[15:0], message buffer rx interrupt enbale */
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_TXINT_EN
* @{
*****************************************************************************/
#define RCAN_MB_TXINT_EN ((u32)0x0000FFFF) /*BIT[15:0], message buffer tx interrupt enbale */
/** @} */
/**************************************************************************//**
* @defgroup CAN_INT_FLAG
* @{
*****************************************************************************/
#define RCAN_TX_INT_FLAG ((u32)0x00000001) /*BIT[0], tx interrupt flag */
#define RCAN_RX_INT_FLAG ((u32)0x00000002) /*BIT[1], rx interrupt flag*/
#define RCAN_ERR_INT_FLAG ((u32)0x00000004) /*BIT[2], error interrupt flag*/
#define RCAN_WAKEUP_INT_FLAG ((u32)0x00000008) /*BIT[3], wake up interrupt flag*/
#define RCAN_BUSOFF_INT_FLAG ((u32)0x00000010) /*BIT[4], bus off interrupt flag*/
#define RCAN_RAM_MOVE_DONE_INT_FLAG ((u32)0x00000020) /*BIT[5], data exchange between RAM and register interface done interrupt flag*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_ERR_STATUS
* @{
*****************************************************************************/
#define RCAN_ERR_BIT0 ((u32)0x00000001) /*BIT[0], CAN error bit0*/
#define RCAN_ERR_BIT1 ((u32)0x00000002) /*BIT[1], CAN error bit1*/
#define RCAN_ERR_FRAME ((u32)0x00000004) /*BIT[2], CAN frame error*/
#define RCAN_ERR_CRC ((u32)0x00000008) /*BIT[3], CAN CRC error*/
#define RCAN_ERR_STUFF ((u32)0x00000010) /*BIT[4], CAN stuff error*/
#define RCAN_ERR_ACK ((u32)0x00000020) /*BIT[5], CAN ACK error*/
#define RCAN_ERR_TX ((u32)0x00000100) /*BIT[8], CAN tx error*/
#define RCAN_ERR_RX ((u32)0x00000200) /*BIT[9], CAN rx error*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_ERR_CNT_CTL
* @{
*****************************************************************************/
#define RCAN_TX_ERR_CNT_CLR ((u32)0x00000001) /*BIT[0], CAN tx error counter clear*/
#define RCAN_RX_ERR_CNT_CLR ((u32)0x00000002) /*BIT[1], CAN rx error counter clear*/
#define RCAN_ERR_WARN_THRES ((u32)0x0000FF00) /*BIT[16:8], error counter warning threshold, programable, default 96*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_ERR_CNT_STS
* @{
*****************************************************************************/
#define RCAN_TX_ERR_CNT_TEC ((u32)0x000001FF) /*BIT[8:0], transmit error count*/
#define RCAN_TX_ERR_CNT_REC ((u32)0x01ff0000) /*BIT[24:16], receive error count*/
#define RCAN_TX_ERR_PASSIVE ((u32)0x10000000) /*BIT[28], error counter arrive at error passive level*/
#define RCAN_TX_ERR_BUSOFF ((u32)0x20000000) /*BIT[29], error counter arrive at bus off level*/
#define RCAN_TX_ERR_WARNING ((u32)0x40000000) /*BIT[30], error counter arrive at warning threshold*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_TX_ERROR_FLAG
* @{
*****************************************************************************/
#define RCAN_TX_ERR_FLAG ((u32)0x0000FFFF) /*BIT[15:0], indicate which message tx buffer have error detected, cpu can write 1 to clear */
/** @} */
/**************************************************************************//**
* @defgroup CAN_TX_DONE_FLAG
* @{
*****************************************************************************/
#define RCAN_TX_DONE_FLAG ((u32)0x0000FFFF) /*BIT[15:0], tx done for each message buffer*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RX_DONE_FLAG
* @{
*****************************************************************************/
#define RCAN_RX_DONE_FLAG ((u32)0x0000FFFF) /*BIT[15:0], rx done for each message buffer*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_TIME_STAMP
* @{
*****************************************************************************/
#define RCAN_TIME_STAMP ((u32)0x0000FFFF) /*BIT[15:0], time stamp counter value, up count*/
#define RCAN_TIME_STAMP_DIV ((u32)0x00FF0000) /*BIT[23:16], time stamp divider, up count*/
#define RCAN_TIME_STAMP_EN ((u32)0x80000000) /*BIT[31], time stamp function enable and time stamp counter start*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_TRIGGER
* @{
*****************************************************************************/
#define RCAN_TX_TRIGGER_BEGIN ((u32)0x0000FFFF) /*BIT[15:0] start of trigger time*/
#define RCAN_TX_TRIGGER_CLOSE_OFFSET ((u32)0x00FF0000) /*BIT[23:16], end of trigger time = tx_trigger_begin + tx_trigger_close*/
#define RCAN_TX_TRIGGER_EN ((u32)0x80000000) /*BIT[24], End of message buffer base address in RAM*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RXDMA_BA
* @{
*****************************************************************************/
#define RCAN_RXDMA_DEST_BA ((u32)0xFFFFFFFF) /*BIT[31:0] can rx dma destation base address */
/** @} */
/**************************************************************************//**
* @defgroup CAN_RX_DMA_DATA
* @{
*****************************************************************************/
#define RCAN_RX_DMA_DATA ((u32)0xFFFFFFFF) /*BIT[31:0] For DMA read received data */
/** @} */
/**************************************************************************//**
* @defgroup CAN_RX_DMA_DATA
* @{
*****************************************************************************/
#define RCAN_RX_DMA_DATA ((u32)0xFFFFFFFF) /*BIT[31:0] For DMA read received data */
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_CTRL
* @{
*****************************************************************************/
#define RCAN_MSG_BA ((u32)0x000001FF) /*BIT[8:0] message buffer base address in RAM*/
#define RCAN_MSG_DMA_OFFSET ((u32)0x0007FC00) /*BIT[18:10] dma offset from dma base address*/
#define RCAN_MSG_RXDMA_EN ((u32)0x01000000) /*BIT[24] dma enable when the message buffer used as rx*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_BA_END
* @{
*****************************************************************************/
#define RCAN_MSG_BA_END ((u32)0x000003FF) /*BIT[9:0] End of message buffer base address in RAM*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RAM_CMD
* @{
*****************************************************************************/
#define RCAN_RAM_ACC_NUM ((u32)0x000000FF) /*BIT[7:0], access buffer number, one buffer take 5 words in RAM*/
#define RCAN_RAM_ACC_DAT0 ((u32)0x00000800) /*BIT[11], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT1 ((u32)0x00001000) /*BIT[12], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT2 ((u32)0x00002000) /*BIT[13], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT3 ((u32)0x00004000) /*BIT[14], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT4 ((u32)0x00008000) /*BIT[15], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT5 ((u32)0x00010000) /*BIT[16], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT6 ((u32)0x00020000) /*BIT[17], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT7 ((u32)0x00040000) /*BIT[18], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT8 ((u32)0x00080000) /*BIT[19], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT9 ((u32)0x00100000) /*BIT[20], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT10 ((u32)0x00200000) /*BIT[21], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT11 ((u32)0x00400000) /*BIT[22], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT12 ((u32)0x00800000) /*BIT[23], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT13 ((u32)0x01000000) /*BIT[24], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT14 ((u32)0x02000000) /*BIT[25], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT15 ((u32)0x04000000) /*BIT[26], access field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_DAT_MASK ((u32)0x07FFF800) /*BIT[23:8], access field mask*/
#define RCAN_RAM_ACC_MASK ((u32)0x00000100) /*BIT[8], access CAN_RAM_MASK field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_CS ((u32)0x00000200) /*BIT[9], access CAN_RAM_CS field, the field will exchange with RAM space*/
#define RCAN_RAM_ACC_ARB ((u32)0x00000400) /*BIT[10], access CAN_RAM_ARB field, the field will exchange with RAM space*/
#define RCAN_RAM_BUFFER_EN ((u32)0x20000000) /*BIT[29], enable the can_ram_acc_num specified message buffer for rx/tx*/
#define RCAN_RAM_DIR ((u32)0x40000000) /*BIT[30], 0 is for read from RAM to CAN_RAM_* registers, 1 is for write from CAN_RAM_* to RAM*/
#define RCAN_RAM_START ((u32)0x80000000) /*BIT[31], start to exchange data with RAM, the bit will clear automatically after the data change is finshed.*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RAM_CS
* @{
*****************************************************************************/
#define RCAN_RAM_DLC ((u32)0x0000000F) /*BIT[3:0], the data length*/
#define RCAN_RAM_LOST ((u32)0x00000010) /*BIT[4], data have lost in the read buffer, means more than one frame have beed received since last read*/
#define RCAN_RAM_RXTX ((u32)0x00000020) /*BIT[5], can frame RX or TX, 0 is for RX, 1 is for TX*/
#define RCAN_RAM_EDL ((u32)0x00000100) /*BIT[8], FD frame edl bit, indicate it¡¯s a FD frameX*/
#define RCAN_RAM_BRS ((u32)0x00000200) /*BIT[9], FD frame brs bit, indicate switch bit timing*/
#define RCAN_RAM_ESI ((u32)0x00000400) /*BIT[10], FD frame esi bit, indicate error passive of message sending node, read bit, should always write 0, hardware automatic fill*/
#define RCAN_RAM_AUTORLY ((u32)0x00000040) /*BIT[6], can frame RTR bit, determine DATA or REMOTE frame*/
#define RCAN_RAM_TIMESTAMP ((u32)0xFFFF0000) /*BIT[31:16], the received message time stamp*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RAM_ARB
* @{
*****************************************************************************/
#define RCAN_RAM_ID ((u32)0x1FFFFFFF) /*BIT[28:0], can frame ID, including low 18 bit extend ID and high 11 bit standard ID*/
#define RCAN_RAM_STD_ID_MASK ((u32)0x1FFC0000) /*BIT[28:18], can frame standard ID, high 11 bit*/
#define RCAN_RAM_EXT_ID_MASK ((u32)0x0003FFFF) /*BIT[17:0], can frame extend ID, low 18 bit*/
#define RCAN_RAM_IDE ((u32)0x20000000) /*BIT[29], can frame IDE bit, determine standard or extend format*/
#define RCAN_RAM_RTR ((u32)0x40000000) /*BIT[30], can frame RTR bit, determine DATA or REMOTE frame*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_RAM_MASK
* @{
*****************************************************************************/
#define RCAN_RAM_MASK ((u32)0x1FFFFFFF) /*BIT[28:0], can frame ID mask, 1 means the ID bit in CAN_RAM_ARB don't care, 0 means the bit should match.*/
#define RCAN_RAM_IDE_MASK ((u32)0x20000000) /*BIT[29], can frame IDE mask, 1 means don't care, 0 means the bit should match*/
#define RCAN_RAM_RTR_MASK ((u32)0x40000000) /*BIT[30], can frame RTR mask, 1 means don't care, 0 means the bit should match*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_WAKEPIN_FLT
* @{
*****************************************************************************/
#define RCAN_WAKEUP_PIN_FLT_LEN ((u32)0X000000FF) /*BIT[7:0], wakeup pin digital filter length.*/
#define RCAN_WAKEUP_PIN_FLT_EN ((u32)0X80000000) /*BIT[31], wakeup pin digital filter enable*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_TEST
* @{
*****************************************************************************/
#define RCAN_LPB_EN ((u32)0X00000001) /*BIT[0], can loop back enable*/
#define RCAN_SILENCE_MODE_EN ((u32)0X00000002) /*BIT[1], can silence modle enable*/
/** @} */
/**************************************************************************//**
* @defgroup CAN_MB_STS
* @{
*****************************************************************************/
#define RCAN_MSG_TX_REQ ((u32)0X00000001) /*BIT[0], tx message is pending for transmit*/
#define RCAN_MSG_TX_DONE ((u32)0X00000002) /*BIT[1], tx message in the message buffer finish sending*/
#define RCAN_MSG_TX_RDY ((u32)0X00000004) /*BIT[2], the message buffer is ready for receiving a new message*/
#define RCAN_MSG_TX_VLD ((u32)0X00000008) /*BIT[3], new message have been received in the message buffer*/
/** @} */
/** @} */
/**
* @}
*/
/**
* @}
*/
/* Other Definitions --------------------------------------------------------*/
typedef struct
{
RCAN_TypeDef* RCANx;
u32 Tx_HandshakeInterface;
u32 Rx_HandshakeInterface;
IRQn_Type IrqNum;
} CAN_DevTable;
//extern RCAN_DmaBufferTypeDef TestDmaRamBuffer;
#endif
/******************* (C) COPYRIGHT 2017 Realtek Semiconductor *****END OF FILE****/

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#ifndef _RTL8721D_CAN_TEST_H_
#define _RTL8721D_CAN_TEST_H_
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _CRYPTOSIM_H_
#define _CRYPTOSIM_H_
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
// AES
#define SWDECRYPT_ECB_AES 0x20
#define SWDECRYPT_CBC_AES 0x21
#define SWDECRYPT_CFB_AES 0x22
#define SWDECRYPT_OFB_AES 0x23
#define SWDECRYPT_CTR_AES 0x24
#define SWDECRYPT_GCM_AES 0x28
#define SWENCRYPT_ECB_AES 0xa0
#define SWENCRYPT_CBC_AES 0xa1
#define SWENCRYPT_CFB_AES 0xa2
#define SWENCRYPT_OFB_AES 0xa3
#define SWENCRYPT_CTR_AES 0xa4
#define SWENCRYPT_GCM_AES 0xa8
// DES
#define SWDECRYPT_ECB_DES 0x00
#define SWDECRYPT_CBC_DES 0x01
#define SWDECRYPT_CFB_DES 0x02
#define SWDECRYPT_OFB_DES 0x03
#define SWDECRYPT_CTR_DES 0x04
#define SWDECRYPT_ECB_3DES 0x10
#define SWDECRYPT_CBC_3DES 0x11
#define SWDECRYPT_CFB_3DES 0x12
#define SWDECRYPT_OFB_3DES 0x13
#define SWDECRYPT_CTR_3DES 0x14
#define SWENCRYPT_ECB_DES 0x80
#define SWENCRYPT_CBC_DES 0x81
#define SWENCRYPT_CFB_DES 0x82
#define SWENCRYPT_OFB_DES 0x83
#define SWENCRYPT_CTR_DES 0x84
#define SWENCRYPT_ECB_3DES 0x90
#define SWENCRYPT_CBC_3DES 0x91
#define SWENCRYPT_CFB_3DES 0x92
#define SWENCRYPT_OFB_3DES 0x93
#define SWENCRYPT_CTR_3DES 0x94
// chacha
void CRYPTO_sim_chacha_20(unsigned char *out,
const unsigned char *in, size_t in_len,
const unsigned char key[32],
const unsigned char nonce[8],
size_t counter);
// poly1305
//
struct poly1305_state_st {
uint32_t r0,r1,r2,r3,r4;
uint32_t s1,s2,s3,s4;
uint32_t h0,h1,h2,h3,h4;
unsigned char buf[16];
unsigned int buf_used;
unsigned char key[16];
};
typedef struct poly1305_state_st poly1305_state;
void CRYPTO_sim_poly1305_init(poly1305_state *state, const unsigned char key[32]);
void CRYPTO_sim_poly1305_update(poly1305_state *state, const unsigned char *in, size_t in_len);
void CRYPTO_sim_poly1305_finish(poly1305_state *state, unsigned char mac[16]);
#define CHACHA20_NONCE_LEN 8
#define POLY1305_TAG_LEN 16
#define CHACHA20POLY1305_KEY_LEN 32
int aead_chacha20_poly1305_enc(unsigned char *out, size_t max_out_len,
const unsigned char *in, size_t in_len,
const unsigned char *ad, size_t ad_len,
const unsigned char *nonce, const unsigned char key[CHACHA20POLY1305_KEY_LEN]);
int aead_chacha20_poly1305_dec(unsigned char *out, size_t max_out_len,
const unsigned char *in, size_t in_len,
const unsigned char *ad, size_t ad_len,
const unsigned char *nonce, const unsigned char key[CHACHA20POLY1305_KEY_LEN]);
void rtl_crypto_auth_sim(const uint32_t authtype,
const unsigned char *pKey, const int keylen, const unsigned char* pText, const int textlen,
unsigned char *pDigest, const int digestlen);
int rtl_crypto_esp_sim(const uint32_t modeCrypto,
const unsigned char *pKey, const int keylen, const unsigned char *pIv, const int ivLen, const int init_count,
const unsigned char* pAAD, const int aadLen, const unsigned char *pText, const int textlen,
unsigned char *pResult, unsigned char *pTag);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _CRYPTOSIM_MD5_H_
#define _CRYPTOSIM_MD5_H_
#include "rtl8711b_crypto.h"
/**
* \brief MD5 context structure
*/
typedef struct
{
uint32_t total[2] __attribute__ ((aligned(4))); /*!< number of bytes processed */
uint32_t state[4] __attribute__ ((aligned(4))); /*!< intermediate digest state */
unsigned char buffer[64] __attribute__ ((aligned(4))); /*!< data block being processed */
unsigned char ipad[64] __attribute__ ((aligned(4))); /*!< HMAC: inner padding */
unsigned char opad[64] __attribute__ ((aligned(4))); /*!< HMAC: outer padding */
}
md5_context;
/**
* \brief MD5 context setup
*
* \param ctx context to be initialized
*/
void md5_starts( md5_context *ctx );
/**
* \brief MD5 process buffer
*
* \param ctx MD5 context
* \param input buffer holding the data
* \param ilen length of the input data
*/
void md5_update( md5_context *ctx, const unsigned char *input, size_t ilen );
/**
* \brief MD5 final digest
*
* \param ctx MD5 context
* \param output MD5 checksum result
*/
void md5_finish( md5_context *ctx, unsigned char output[16] );
/* Internal use */
void md5_process( md5_context *ctx, const unsigned char data[64] );
/**
* \brief Output = MD5( input buffer )
*
* \param input buffer holding the data
* \param ilen length of the input data
* \param output MD5 checksum result
*/
void md5( const unsigned char *input, size_t ilen, unsigned char output[16] );
/**
* \brief MD5 HMAC context setup
*
* \param ctx HMAC context to be initialized
* \param key HMAC secret key
* \param keylen length of the HMAC key
*/
void md5_hmac_starts( md5_context *ctx,
const unsigned char *key, size_t keylen );
/**
* \brief MD5 HMAC process buffer
*
* \param ctx HMAC context
* \param input buffer holding the data
* \param ilen length of the input data
*/
void md5_hmac_update( md5_context *ctx,
const unsigned char *input, size_t ilen );
/**
* \brief MD5 HMAC final digest
*
* \param ctx HMAC context
* \param output MD5 HMAC checksum result
*/
void md5_hmac_finish( md5_context *ctx, unsigned char output[16] );
/**
* \brief MD5 HMAC context reset
*
* \param ctx HMAC context to be reset
*/
void md5_hmac_reset( md5_context *ctx );
/**
* \brief Output = HMAC-MD5( hmac key, input buffer )
*
* \param key HMAC secret key
* \param keylen length of the HMAC key
* \param input buffer holding the data
* \param ilen length of the input data
* \param output HMAC-MD5 result
*/
void md5_hmac( const unsigned char *key, size_t keylen,
const unsigned char *input, size_t ilen,
unsigned char output[16] );
/**
* \brief Checkup routine
*
* \return 0 if successful, or 1 if the test failed
*/
int md5_self_test( int verbose );
// TODO:
// merge with upper software in the future.
//
/* compatibility */
#define MD5_CTX md5_context
#define MD5Init(x) md5_starts((x))
#define MD5Update(x, y, z) md5_update((x), (y), (z))
#define MD5Final(x, y) md5_finish((x), (y))
#endif /* ! _CRYPTOSIM_MD5_H_*/

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/*
* Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the project nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* FIPS pub 180-1: Secure Hash Algorithm (SHA-1)
* based on: http://csrc.nist.gov/fips/fip180-1.txt
* implemented by Jun-ichiro itojun Itoh <itojun@itojun.org>
*/
#ifndef _CRYPTOSIM_SHA_H_
#define _CRYPTOSIM_SHA_H_
#include "rtl8711b_crypto.h"
#define UL64(x) x##ULL
/**
* \brief SHA-1 context structure
*/
typedef struct
{
uint32_t total[2] __attribute__ ((aligned(4))); /*!< number of bytes processed */
uint32_t state[5] __attribute__ ((aligned(4))); /*!< intermediate digest state */
unsigned char buffer[64] __attribute__ ((aligned(4))); /*!< data block being processed */
unsigned char ipad[64] __attribute__ ((aligned(4))); /*!< HMAC: inner padding */
unsigned char opad[64] __attribute__ ((aligned(4))); /*!< HMAC: outer padding */
}
sha1_context;
#define SHA1_SIZE 20
typedef struct
{
uint32_t Intermediate_Hash[SHA1_SIZE/4]; /* Message Digest */
uint32_t Length_Low; /* Message length in bits */
uint32_t Length_High; /* Message length in bits */
uint16_t Message_Block_Index; /* Index into message block array */
uint8_t Message_Block[64] __attribute__ ((aligned(4)));; /* 512-bit message blocks */
} SHA1_CTX;
typedef struct
{
uint32_t total[2]; /*!< number of bytes processed */
uint32_t state[8]; /*!< intermediate digest state */
unsigned char buffer[64]; /*!< data block being processed */
unsigned char ipad[64]; /*!< HMAC: inner padding */
unsigned char opad[64]; /*!< HMAC: outer padding */
int is224; /*!< 0 => SHA-256, else SHA-224 */
}
sha256_context;
typedef struct
{
uint64_t total[2]; /*!< number of bytes processed */
uint64_t state[8]; /*!< intermediate digest state */
unsigned char buffer[128]; /*!< data block being processed */
unsigned char ipad[128]; /*!< HMAC: inner padding */
unsigned char opad[128]; /*!< HMAC: outer padding */
int is384; /*!< 0 => SHA-512, else SHA-384 */
}
sha512_context;
/**
* \brief SHA-1 context setup
*
* \param ctx context to be initialized
*/
extern void sha1_starts( sha1_context *ctx );
/**
* \brief SHA-1 process buffer
*
* \param ctx SHA-1 context
* \param input buffer holding the data
* \param ilen length of the input data
*/
extern void sha1_update( sha1_context *ctx, const unsigned char *input, size_t ilen );
/**
* \brief SHA-1 final digest
*
* \param ctx SHA-1 context
* \param output SHA-1 checksum result
*/
extern void sha1_finish( sha1_context *ctx, unsigned char output[20] );
/* Internal use */
extern void sha1_process( sha1_context *ctx, const unsigned char data[64] );
/**
* \brief Output = SHA-1( input buffer )
*
* \param input buffer holding the data
* \param ilen length of the input data
* \param output SHA-1 checksum result
*/
extern void sha1( const unsigned char *input, size_t ilen, unsigned char output[20] );
extern void sha2( const unsigned char *input, size_t ilen, unsigned char output[32], uint32 digestlen);
/**
* \brief SHA-1 HMAC context setup
*
* \param ctx HMAC context to be initialized
* \param key HMAC secret key
* \param keylen length of the HMAC key
*/
extern void sha1_hmac_starts( sha1_context *ctx, const unsigned char *key, size_t keylen );
/**
* \brief SHA-1 HMAC process buffer
*
* \param ctx HMAC context
* \param input buffer holding the data
* \param ilen length of the input data
*/
extern void sha1_hmac_update( sha1_context *ctx, const unsigned char *input, size_t ilen );
/**
* \brief SHA-1 HMAC final digest
*
* \param ctx HMAC context
* \param output SHA-1 HMAC checksum result
*/
extern void sha1_hmac_finish( sha1_context *ctx, unsigned char output[20] );
/**
* \brief SHA-1 HMAC context reset
*
* \param ctx HMAC context to be reset
*/
extern void sha1_hmac_reset( sha1_context *ctx );
/**
* \brief Output = HMAC-SHA-1( hmac key, input buffer )
*
* \param key HMAC secret key
* \param keylen length of the HMAC key
* \param input buffer holding the data
* \param ilen length of the input data
* \param output HMAC-SHA-1 result
*/
extern void sha1_hmac( const unsigned char *key, size_t keylen,
const unsigned char *input, size_t ilen,
unsigned char output[20] );
/**
* \brief Checkup routine
*
* \return 0 if successful, or 1 if the test failed
*/
extern int sha1_self_test( int verbose );
//typedef sha1_context SHA1_CTX;
//#define SHA1Init(x) sha1_starts((x))
//#define SHA1Update(x, y, z) sha1_update((x), (y), (z))
//#define SHA1Final(x, y) sha1_finish((y), (x))
extern void sha256_hmac( const unsigned char *key, size_t keylen,
const unsigned char *input, size_t ilen,
unsigned char output[32], int is224);
#endif /*_CRYPTOSIM_SHA_H_*/

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#ifndef __RTL8721D_CRYPTO_TEST_H__
#define __RTL8721D_CRYPTO_TEST_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#ifndef CRYPTO_MAX_MSG_LENGTH
#define CRYPTO_MAX_MSG_LENGTH 8192 //8192 // 18432 // 4096 //32768 // 64 // 16383
#endif
#define AUTH_NOCRYPTO ((u32)-1)
#define CRYPTO_NOAUTH ((u32)-1)
/** @defgroup CRYPTO_MODE_definitions
* @{
*/
#define CRYPTO_MS_TYPE_CIPHER (0)
#define CRYPTO_MS_TYPE_AUTH (1)
#define CRYPTO_MS_TYPE_MIX (2)
/**
* @}
*/
#define ERRNO_CRYPTO_TEST_ARG (-100)
#define ERRNO_CRYPTO_TEST_INIT (-200)
int throughput_test(u32 modetype, u32 cipher_type, u32 authtype, u32 loops);
int rtl_crypto_test(u16 argc, u8 *argv[]);
int vector_test_auth(uint32_t authtype);
int vector_test_cipher(uint32_t cipher_type);
#ifdef __cplusplus
}
#endif
#endif // __RTL8721D_CRYPTO_TEST_H__

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/**
******************************************************************************
* @file rtl8721d_ecc.h
* @author
* @version V1.0.0
* @date 2018-06-05
* @brief This file contains all the functions prototypes for the ECC engine firmware
* library.
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2018, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#ifndef _RTL8721D_ECC_H_
#define _RTL8721D_ECC_H_
/** @addtogroup AmebaD_Periph_Driver
* @{
*/
/** @defgroup ECC
* @{
*/
/*===================================================================================================*/
/*ECC IP Slave configure address space*/
typedef struct {
__IO u32 reg_ec_control;
__IO u32 reg_ec_ins_fifoin;
__IO u32 reg_ec_status;
__IO u32 reg_msglen;
__IO u32 reg_msgaddr;
__IO u32 debug_ctrls;
__IO u32 debug_output;
}ECC_SLAVE_TypeDef;
/*ECC IP master memory space*/
typedef struct {
#if 1
u8 Rsvd1[32*4];
#endif
u8 EC_BX[32];
u8 EC_BY[32];
union {
u8 Private_Key[32];
u8 I[32];
} Key_I;
u8 Secret_Key[32];
#if 1
u8 Rsvd[32];
#endif
u8 S[32];
u8 R[32];
u8 A[32];
}ECC_Ed25519_MASTER_TypeDef;
/*ECC ed25519 result*/
typedef struct {
u8 Public_Key[32];
u8 Sig[64];
}ECC_Ed25519_Res_TypeDef;
/*ECC hardware FIFO size*/
#define ECC_INS_FIFO_SIZE (64)
/*ECC master operate unit size*/
#define ECC_MASTER_OPERATE_UNIT (32)
/*ECC master header size*/
#define ECC_MASTER_HDR_SIZE (12)
/*Master memory header size*/
#define ECC_MASTER_HDR_OFFSET (ECC_MASTER_OPERATE_UNIT*ECC_MASTER_HDR_SIZE)
#define ECC_SLAVE_BASE (SDIO_DEVICE_REG_BASE) //(0x4002C000)
#define ECC_CONFIG_BASE ((ECC_SLAVE_TypeDef *) ECC_SLAVE_BASE)
/*===================================================================================================*/
/* Exported Types --------------------------------------------------------*/
/** @defgroup ECC_Exported_Types ECC Exported Types
* @{
*/
/**
* @brief ECC ed25519 Mode Initialization structure definition
*/
typedef struct
{
u32 ECC_Ed25519MsgLen; /*!< Specifies the message length.
This parameter can be a number between 0x000000 and 0xffffff, unit: Byte. */
u32 ECC_Ed25519MsgAddr; /*!< Specifies the message address. */
//u32 ECC_Ed25519BaseXP; /*!< Specifies the base point X buffer start address. */
//u32 ECC_Ed25519BaseYP; /*!< Specifies the base point Y buffer start address. */
u32 ECC_Ed25519ScretKeyP; /*!< Specifies the secret key buffer start address. */
u32 ECC_Ed25519ScretKeyLen; /*!< Specifies the secret key length. */
} ECC_Ed25519GenSigInitTypeDef;
/**
* @}
*/
/**
* @brief ECC ed25519 Mode Initialization structure definition
*/
typedef struct
{
u32 ECC_Ed25519MsgLen;
u32 ECC_Ed25519MsgAddr;
//u32 ECC_Ed25519BaseXP;
//u32 ECC_Ed25519BaseYP;
u32 ECC_Ed25519PublicKeyP;
u32 ECC_Ed25519SigP;
} ECC_Ed25519VerifySigInitTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup ECC_Exported_Constants ECC Exported Constants
* @{
*/
/** @defgroup ECC_MODE_define
* @{
*/
#define ECC_CFG_ENGINE_SM2 ((u32)0x00000040)
#define ECC_CFG_ENGINE_NIST256 ((u32)0x00000020)
#define ECC_CFG_ENGINE_ED25519 ((u32)0x00000010)
#define IS_ECC_WORK_MODE(MODE) (((MODE) == ECC_CFG_ENGINE_SM2) || \
((MODE) == ECC_CFG_ENGINE_NIST256) || \
((MODE) == ECC_CFG_ENGINE_ED25519))
/**
* @}
*/
/** @defgroup ECC_ERROR_define
* @{
*/
#define ECC_EC_INT_STS ((u32)0x00000001)
#define ECC_AXIM_ERR_STS ((u32)0x00000002)
#define ECC_ENGNE_ERR_STS ((u32)0x00000004)
#define IS_ECC_CLEAR_ERR(ERR) ((((ERR) & (u32)0xFFFFFFF8) == 0x00) && ((ERR) != 0x00))
/**
* @}
*/
/** @defgroup ECC_RESET_TYPE_define
* @{
*/
#define ECC_FIFO_RST ((u32)0x00000001)
#define ECC_ENGINE_RST ((u32)0x00000002)
#define ECC_AXIM_RST ((u32)0x00000004)
#define IS_ECC_RESET_TYPE(TYPE) ((((TYPE) & (u32)0xFFFFFFF8) == 0x00) && ((TYPE) != 0x00))
/**
* @}
*/
/** @defgroup ECC_type_define
* @{
*/
#define IS_ECC_ALL_PERIPH(PERIPH) (PERIPH == ECC_CONFIG_BASE)
/**
* @}
*/
/** @defgroup ECC_debug_type_define
* @{
*/
#define ECC_RF_DEBUG_MUX ((u32)0x00000000)
#define ECC_ID_DEBUG ((u32)0x00000020)
#define ECC_EX_DEBUG ((u32)0x00000040)
#define ECC_AXIM_DEBUG ((u32)0x00000060)
#define ECC_FSM_DEBUG ((u32)0x00000080)
#define IS_ECC_DEBUG_MODE(MODE) (((MODE) == ECC_RF_DEBUG_MUX) || \
((MODE) == ECC_ID_DEBUG) || \
((MODE) == ECC_EX_DEBUG) || \
((MODE) == ECC_EX_DEBUG) || \
((MODE) == ECC_FSM_DEBUG))
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup ECC_Exported_Functions ECC Exported Functions
* @{
*/
/** @defgroup ECC_ed25519_functions
* @{
*/
_LONG_CALL_ void ECC_Ed25519GenSigStructInit(ECC_Ed25519GenSigInitTypeDef * ECC_Ed25519GenSigInitStruct);
_LONG_CALL_ void ECC_Ed25519GenSigInit(ECC_SLAVE_TypeDef* ECCx, ECC_Ed25519GenSigInitTypeDef * ECC_Ed25519GenSigInitStruct);
_LONG_CALL_ void ECC_Ed25519GenSigResGet(ECC_Ed25519_Res_TypeDef * Res, ECC_Ed25519_MASTER_TypeDef * MasterMem);
_LONG_CALL_ void ECC_Ed25519VerifySigStructInit(ECC_Ed25519VerifySigInitTypeDef * ECC_Ed25519VerifySigInitStruct);
_LONG_CALL_ void ECC_Ed25519VerifySigInit(ECC_SLAVE_TypeDef* ECCx, ECC_Ed25519VerifySigInitTypeDef * ECC_Ed25519VerifySigInitStruct);
_LONG_CALL_ void ECC_Ed25519VerifySigResGet(ECC_Ed25519_Res_TypeDef * Res, ECC_Ed25519_MASTER_TypeDef * MasterMem);
/**
* @}
*/
/** @defgroup ECC_common_functions
* @{
*/
_LONG_CALL_ void ECC_FillInstruction(ECC_SLAVE_TypeDef* ECCx, u32 * Ins, u32 InsLen);
_LONG_CALL_ u32 ECC_GetFIFOEmptySize(ECC_SLAVE_TypeDef* ECCx);
_LONG_CALL_ u32 ECC_GetErrorStatus(ECC_SLAVE_TypeDef* ECCx);
_LONG_CALL_ void ECC_ClearErrorStatus(ECC_SLAVE_TypeDef* ECCx, u32 ErrorType);
_LONG_CALL_ void ECC_Reset(ECC_SLAVE_TypeDef* ECCx, u32 RstType);
_LONG_CALL_ void ECC_Cmd(ECC_SLAVE_TypeDef* ECCx, u32 NewState);
/**
* @}
*/
/** @defgroup ECC_Debug_functions
* @{
*/
_LONG_CALL_ u32 ECC_DebugOutputGet(ECC_SLAVE_TypeDef* ECCx);
_LONG_CALL_ void ECC_DebugRfMuxSel(ECC_SLAVE_TypeDef* ECCx, u32 Dbg_RfMux);
_LONG_CALL_ void ECC_DebugSelect(ECC_SLAVE_TypeDef* ECCx, u32 Dbg_Sel2, u32 Dbg_Sel_Sub);
_LONG_CALL_ void ECC_DebugCmd(ECC_SLAVE_TypeDef* ECCx, u32 NewState);
/**
* @}
*/
/* Registers Definitions --------------------------------------------------------*/
/**************************************************************************//**
* @defgroup ECC_Register_Definitions ECC Register Definitions
* @{
*****************************************************************************/
/**************************************************************************//**
* @defgroup ECC_REG_EC_CONTROL
* @{
*****************************************************************************/
#define ECC_CFG_FIFO_RST ((u32)0x00000001) /*BIT[0], fifo reset*/
#define ECC_CFG_ENGINE_RST ((u32)0x00000002) /*BIT[1], engine reset*/
#define ECC_CFG_AXIM_RST ((u32)0x00000004) /*BIT[2], axim reset*/
#define ECC_ENGINE_START ((u32)0x00000008) /*BIT[3], engine start*/
#define ECC_ENGINE_ED25519 ((u32)0x00000010) /*BIT[4], ed25519 mode*/
#define ECC_ENGINE_NISTP256 ((u32)0x00000020) /*BIT[5], nist P 256 mode*/
#define ECC_ENGINE_SM2 ((u32)0x00000040) /*BIT[6], SM2 mode*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_EC_INS_FIFOIN
* @{
*****************************************************************************/
#define ECC_INS_FIFO_WDATA ((u32)0xFFFFFFFF) /*BIT[31:0], write instructon fifo*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_EC_STATUS
* @{
*****************************************************************************/
#define ECC_ERR_MASK ((u32)0x00000007) /*BIT[2:0], error field */
#define ECC_EC_INT ((u32)0x00000001) /*BIT[0], interrupt assert*/
#define ECC_AXIM_ERR ((u32)0x00000002) /*BIT[1], axi-bus protocol error*/
#define ECC_ENGNE_ERR ((u32)0x00000004) /*BIT[2], ins-excute-error*/
#define ECC_INS_FIFO_SLOTNUM ((u32)0x0000FF00) /*BIT[15:8], slot number not used in ins-fifo*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_MSGLEN
* @{
*****************************************************************************/
#define ECC_CFG_MSGLEN ((u32)0x00FFFFFF) /*BIT[23:0], message length used by hash, counted by byte*/
#define ECC_CFG_SKLEN ((u32)0x3f000000) /*BIT[29:24], secret key length, counted by byte*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_MSGADDR
* @{
*****************************************************************************/
#define ECC_CFG_MSGADDR ((u32)0xFFFFFFFF) /*BIT[31:0], message address*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_DEBUG_STRLS
* @{
*****************************************************************************/
#define ECC_CFG_DEBUG_SEL_SUB ((u32)0x0000001F) /*BIT[4:0], select the sub-signals from ex_dbg or id_dbg or rf_dbg or axim_dbg*/
#define ECC_CFG_DEBUG_SEL2 ((u32)0x000000E0) /*BIT[7:5], debug port selection2*/
#define ECC_CFG_DEBUG_RF ((u32)0x00000000) /*BIT[7:5], rf_debug_mux*/
#define ECC_CFG_DEBUG_ID ((u32)0x00000020) /*BIT[7:5], id_debug*/
#define ECC_CFG_DEBUG_EX ((u32)0x00000040) /*BIT[7:5], ex_debug*/
#define ECC_CFG_DEBUG_AXIM ((u32)0x00000060) /*BIT[7:5], axim_debug*/
#define ECC_CFG_DEBUG_FSM ((u32)0x00000080) /*BIT[7:5], FSM_debug*/
#define ECC_CFG_DEBUG_RFMUX ((u32)0x00000700) /*BIT[10:8], rf debug*/
#define ECC_CFG_DEBUG_EN ((u32)0x00008000) /*BIT[15], debug enable*/
/** @} */
/**************************************************************************//**
* @defgroup ECC_REG_DEBUG_OUTPUT
* @{
*****************************************************************************/
#define ECC_CFG_DEBUG_OUTPUT ((u32)0XFFFFFFFF) /*BIT[31:0], debug info output from ec-engine*/
/** @} */
/** @} */
/**
* @}
*/
/**
* @}
*/
/* Other Definitions --------------------------------------------------------*/
#endif
/******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/

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#ifndef _RTL8721D_ECC_TEST_H_
#define _RTL8721D_ECC_TEST_H_
#endif

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sdk/component/soc/realtek/amebad/verification/ft_test/adc/rtl8195a_dac_sin_23p84.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_DAC_SIN_23p84_H_
#define _RTL8195A_DAC_SIN_23p84_H_
extern const unsigned short Sin23p84Table[];
#endif

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sdk/component/soc/realtek/amebad/verification/ft_test/adc/rtl8195a_ft_adc_dac.h Normal file
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#ifndef _RTL8195A_FT_ADC_DAC_H_
#define _RTL8195A_FT_ADC_DAC_H_
//--------- Verification control flag >----------------------------------------
// Enable SPI DAC
#define SPI_DAC_OUTPUT 1
// To reduce harmonic for better SNR result
#define FFT_REDUCE_HARMONIC 1
#define FFT_HARMONIC_ORDER 6
// Enable FFT debug msg
#define FFT_DBG_INFO 0
// Engineer verification only
#define FLOW_VERIFICATION 0
//--------- Verification control flag <----------------------------------------
#define ADDA_VERI_SUBJECT_NO 2
typedef enum ADDA_VEFI_TYPE {
DAC_SRC_SPI_DMA = 0,
DAC_SRC_I2C_DMA = 1,
};
#define I2C_DAC_FFT_CRITERION (float32_t)60.000
#define EXTER_DAC_FFT_CRITERION (float32_t)56.000
extern int FTAdcFFTTest(IN unsigned char TestItem);
#endif

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sdk/component/soc/realtek/amebad/verification/ft_test/adc/rtl8195a_i2c_spi_dac.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_I2C_SPI_DAC_H_
#define _RTL8195A_I2C_SPI_DAC_H_
typedef struct {
GDMA_InitTypeDef SSITxGdmaInitStruct;
SPI_TypeDef *spi_dev;
void (*TxCompCallback)(void *Para);
void *TxCompCbPara;
void *TxData;
u32 TxLength;
u32 Index;
u32 Role;
}HAL_SSI_ADAPTOR, *PHAL_SSI_ADAPTOR;
extern HAL_SSI_ADAPTOR HalSsiAdaptorMaster;
typedef struct _SAL_I2C_TRANSFER_BUF_ {
u16 DataLen; //I2C Transmfer Length
u16 TargetAddr; //I2C Target Address. It's only valid in Master Mode.
u32 RegAddr; //I2C Register Address. It's only valid in Master Mode.
u32 RSVD; //
u8 *pDataBuf; //I2C Transfer Buffer Pointer
}SAL_I2C_TRANSFER_BUF,*PSAL_I2C_TRANSFER_BUF;
//I2C SAL management adapter
typedef struct _SAL_I2C_MNGT_ADPT_ {
I2C_InitTypeDef HalInitDat; //Pointer to HAL I2C initial data( HAL_I2C_INIT_DAT )
I2C_TypeDef* I2Cx; //Pointer to I2C Device
IRQn_Type IrqNum;
VOID (*DMATXCCB) (VOID *Data);
u32 DMATXCCBData;
GDMA_InitTypeDef I2CTxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
PSAL_I2C_TRANSFER_BUF pTXBuf; //Pointer to I2C TX buffer
u32 TimeOut; //I2C IO Timeout count, in ms
u8 PinMux; //I2C pin mux seletion
volatile u8 DevSts; //I2C device status
} SAL_I2C_MNGT_ADPT, *PSAL_I2C_MNGT_ADPT;
#define ADC_VERI_DATA_LEN 2048
//#define ADC_VERI_DATA_LEN 184
#endif

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sdk/component/soc/realtek/amebad/verification/ft_test/adc/rtl8195a_spidac_sin_5p722k.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_SPIDAC_SIN_5p722_H_
#define _RTL8195A_SPIDAC_SIN_5p722_H_
extern const unsigned short SpiSin5p722kTable[];
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_I2C_H_ //#ifndef _HAL_I2C_H_
#define _HAL_I2C_H_
#include "ameba_soc.h"
//================= I2C CONFIGURATION START ==================
// I2C SAL User Configuration Flags
// I2C SAL operation types
#define I2C_POLL_OP_TYPE 1
#define I2C_INTR_OP_TYPE 1
#define I2C_DMA_OP_TYPE 1
// I2C SAL used module. Please set the I2C module flag to 1 to enable the related
// I2C module functions.
#define I2C0_USED 1
#define I2C1_USED 1
#define I2C2_USED 1
#define I2C3_USED 1
//================= I2C CONFIGURATION END ===================
//================= I2C HAL START ==========================
// I2C debug output
#define I2C_PREFIX "RTL8195A[i2c]: "
#define I2C_PREFIX_LVL " [i2c_DBG]: "
typedef enum _I2C_DBG_LVL_ {
HAL_I2C_LVL = 0x01,
SAL_I2C_LVL = 0x02,
VERI_I2C_LVL = 0x03,
}I2C_DBG_LVL,*PI2C_DBG_LVL;
#ifdef CONFIG_DEBUG_LOG
#define CONFIG_DEBUG_LOG_I2C_HAL 1
#define DBG_I2C_LOG_PERD 100
#ifdef CONFIG_DEBUG_LOG_I2C_HAL
#define I2CDBGLVL 0xFF
#endif
#endif
//======================================================
//================= I2C HAL END ===========================
//================= I2C SAL START ==========================
//I2C SAL Macros
//======================================================
// I2C SAL related enumerations
// I2C Extend Features
typedef enum _I2C_EXD_SUPPORT_{
I2C_EXD_USER_REG = 0x40, //BIT_6, Using User Register Address
I2C_EXD_MTR_ADDR_RTY= 0x100, //BIT_8, Master retries to send start condition and Slave address when the slave doesn't ack
// the address.
I2C_EXD_MTR_ADDR_UPD= 0x200, //BIT_9, Master dynamically updates slave address
I2C_EXD_MTR_HOLD_BUS= 0x400, //BIT_10, Master doesn't generate STOP when the FIFO is empty. This would make Master hold
// the bus.
}I2C_EXD_SUPPORT,*PI2C_EXD_SUPPORT;
// I2C operation type
typedef enum _I2C_OP_TYPE_ {
I2C_POLL_TYPE = 0x0,
I2C_DMA_TYPE = 0x1,
I2C_INTR_TYPE = 0x2,
}I2C_OP_TYPE, *PI2C_OP_TYPE;
// I2C device status
typedef enum _I2C_Device_STATUS_ {
I2C_STS_UNINITIAL = 0x00,
I2C_STS_INITIALIZED = 0x01,
I2C_STS_IDLE = 0x02,
I2C_STS_TX_READY = 0x03,
I2C_STS_TX_ING = 0x04,
I2C_STS_RX_READY = 0x05,
I2C_STS_RX_ING = 0x06,
I2C_STS_ERROR = 0x10,
I2C_STS_TIMEOUT = 0x11,
}I2C_Device_STATUS, *PI2C_Device_STATUS;
//I2C DMA module number
typedef enum _I2C_DMA_MODULE_SEL_ {
I2C_DMA_MODULE_0 = 0x0,
I2C_DMA_MODULE_1 = 0x1
}I2C_DMA_MODULE_SEL, *PI2C_DMA_MODULE_SEL;
// I2C0 DMA peripheral number
typedef enum _I2C0_DMA_PERI_NUM_ {
I2C0_DMA_TX_NUM = 0x8,
I2C0_DMA_RX_NUM = 0x9,
}I2C0_DMA_PERI_NUM,*PI2C0_DMA_PERI_NUM;
// I2C1 DMA peripheral number
typedef enum _I2C1_DMA_PERI_NUM_ {
I2C1_DMA_TX_NUM = 0xA,
I2C1_DMA_RX_NUM = 0xB,
}I2C1_DMA_PERI_NUM,*PI2C1_DMA_PERI_NUM;
// I2C0 DMA module used
typedef enum _I2C0_DMA_MODULE_ {
I2C0_DMA0 = 0x0,
I2C0_DMA1 = 0x1,
}I2C0_DMA_MODULE,*PI2C0_DMA_MODULE;
// I2C0 DMA module used
typedef enum _I2C1_DMA_MODULE_ {
I2C1_DMA0 = 0x0,
I2C1_DMA1 = 0x1,
}I2C1_DMA_MODULE,*PI2C1_DMA_MODULE;
// I2C command type
typedef enum _I2C_COMMAND_TYPE_ {
I2C_WRITE_CMD = 0x0,
I2C_READ_CMD = 0x1,
}I2C_COMMAND_TYPE,*PI2C_COMMAND_TYPE;
// I2C STOP BIT
typedef enum _I2C_STOP_TYPE_ {
I2C_STOP_DIS = 0x0,
I2C_STOP_EN = 0x1,
}I2C_STOP_TYPE, *PI2C_STOP_TYPE;
// I2C error type
typedef enum _I2C_ERR_TYPE_ {
I2C_ERR_RX_UNDER = 0x01, //I2C RX FIFO Underflow
I2C_ERR_RX_OVER = 0x02, //I2C RX FIFO Overflow
I2C_ERR_TX_OVER = 0x04, //I2C TX FIFO Overflow
I2C_ERR_TX_ABRT = 0x08, //I2C TX terminated
I2C_ERR_SLV_TX_NACK = 0x10, //I2C slave transmission terminated by master NACK,
//but there are data in slave TX FIFO
I2C_ERR_USER_REG_TO = 0x20,
I2C_ERR_RX_CMD_TO = 0x21,
I2C_ERR_RX_FF_TO = 0x22,
I2C_ERR_TX_CMD_TO = 0x23,
I2C_ERR_TX_FF_TO = 0x24,
I2C_ERR_TX_ADD_TO = 0x25,
I2C_ERR_RX_ADD_TO = 0x26,
I2C_ERR_TX_TO_NOT_SET = 0x27,
I2C_ERR_RX_TO_NOT_SET = 0x28,
}I2C_ERR_TYPE, *PI2C_ERR_TYPE;
// I2C Time Out type
typedef enum _I2C_TIMEOUT_TYPE_ {
I2C_TIMEOOUT_DISABLE = 0x00,
I2C_TIMEOOUT_ENDLESS = 0xFFFFFFFF,
}I2C_TIMEOUT_TYPE, *PI2C_TIMEOUT_TYPE;
//======================================================
// SAL I2C related data structures
// I2C user callback adapter
typedef struct _SAL_I2C_USERCB_ADPT_ {
VOID (*USERCB) (VOID *Data);
u32 USERData;
}SAL_I2C_USERCB_ADPT, *PSAL_I2C_USERCB_ADPT;
// I2C user callback structure
typedef struct _SAL_I2C_USER_CB_ {
SAL_I2C_USERCB_ADPT TXCCB; //I2C Transmit Complete Callback
SAL_I2C_USERCB_ADPT RXCCB; //I2C Receive Complete Callback
SAL_I2C_USERCB_ADPT RDREQCB; //I2C Read Request Callback
SAL_I2C_USERCB_ADPT ERRCB; //I2C Error Callback
SAL_I2C_USERCB_ADPT DMATXCCB; //I2C DMA Transmit Complete Callback
SAL_I2C_USERCB_ADPT DMARXCCB; //I2C DMA Receive Complete Callback
SAL_I2C_USERCB_ADPT GENCALLCB; //I2C General Call Callback
}SAL_I2C_USER_CB, *PSAL_I2C_USER_CB;
// I2C Transmit Buffer
typedef struct _SAL_I2C_TRANSFER_BUF_ {
u16 DataLen; //I2C Transmfer Length
u16 TargetAddr; //I2C Target Address. It's only valid in Master Mode.
u32 RegAddr; //I2C Register Address. It's only valid in Master Mode.
u32 RSVD; //
u8 *pDataBuf; //I2C Transfer Buffer Pointer
}SAL_I2C_TRANSFER_BUF,*PSAL_I2C_TRANSFER_BUF;
//======================================================
// I2C SAL Function Prototypes
//================= I2C SAL MANAGEMENT START =================
// I2C SAL management macros
#define SAL_USER_CB_NUM (sizeof(SAL_I2C_USER_CB) / sizeof(PSAL_I2C_USERCB_ADPT))
//======================================================
//I2C SAL management adapter
typedef struct _SAL_I2C_MNGT_ADPT_ {
I2C_InitTypeDef HalInitDat; //Pointer to HAL I2C initial data( HAL_I2C_INIT_DAT )
I2C_TypeDef* I2Cx; //Pointer to I2C Device
IRQn_Type IrqNum;
SAL_I2C_USER_CB UserCB; //Pointer to SAL user callbacks (SAL_I2C_USER_CB )
volatile u32 MstRDCmdCnt; //Used for Master Read command count
GDMA_InitTypeDef I2CTxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
GDMA_InitTypeDef I2CRxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
PSAL_I2C_TRANSFER_BUF pTXBuf; //Pointer to I2C TX buffer
PSAL_I2C_TRANSFER_BUF pRXBuf; //Pointer to I2C RX buffer
u32 TimeOut; //I2C IO Timeout count, in ms
u8 PinMux; //I2C pin mux seletion
u8 OpType; //I2C operation type selection
volatile u8 DevSts; //I2C device status
u32 I2CExd; //I2C extended options:
//bit 0: I2C RESTART supported,
// 0 for NOT supported,
// 1 for supported
//bit 1: I2C General Call supported
// 0 for NOT supported,
// 1 for supported
//bit 2: I2C START Byte supported
// 0 for NOT supported,
// 1 for supported
//bit 3: I2C Slave-No-Ack
// supported
// 0 for NOT supported,
// 1 for supported
//bit 4: I2C bus loading,
// 0 for 100pf,
// 1 for 400pf
//bit 5: I2C slave ack to General
// Call
//bit 6: I2C User register address
//bit 7: I2C 2-Byte User register
// address
//bit 8: I2C slave address no ack retry,
// It's only for Master mode,
// when slave doesn't ack the
// address
//bit 31~bit 8: Reserved
} SAL_I2C_MNGT_ADPT, *PSAL_I2C_MNGT_ADPT;
//======================================================
//SAL I2C management function prototype
HAL_Status RtkI2CInit(IN PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt);
HAL_Status RtkI2CDeInit(IN PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt);
HAL_Status RtkI2CSend(IN PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt);
HAL_Status RtkI2CReceive(IN PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt);
//================= I2C SAL END ===========================
//======================================================
extern VOID I2CISRHandle(IN VOID *Data);
extern VOID I2CTXGDMAISRHandle(IN VOID *Data);
extern VOID I2CRXGDMAISRHandle(IN VOID *Data);
extern HAL_Status I2CIsTimeout (IN u32 StartCount, IN u32 TimeoutCnt);
//======================================================
//================= I2C SAL MANAGEMENT END ==================
#endif //#ifndef _HAL_I2C_H_

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_I2C_TEST_SAL_H_
#define _RTL8195A_I2C_TEST_SAL_H_
#define I2C_VERI_DATA_LEN_SAL 1024
#define I2C_VERI_DMA_LEN_SAL 8
#define I2C_VERI_RXBUF_LEN_SAL 32
#define I2C_VERI_TXBUF_LEN_SAL 32
#define I2C_VERI_PANT_CNT_SAL 6
#define I2C_VERI_ACK_ADDR_SAL 0x23
#define I2C_VERI_ACK_ADDR1_SAL 0x46
#define I2C_VERI_USER_REG_ADDR_SAL 0x75
//#define ONEMST_MULTISLV_TEST
//#define ONESLV_MULTIMST_TEST
typedef enum _I2C_VERI_PROC_CMD_SAL_ {
I2C_TEST_ITEMS_SAL = 0,
I2C_TEST_ALL_SAL = 1,
}I2C_VERI_PROC_CMD_SAL, *PI2C_VERI_PROC_CMD_SAL;
typedef enum _I2C_VERI_ITEM_SAL_ {
I2C_MASTER_TEST = 1,
I2C_SLAVE_TEST = 2,
I2C_GENERAL_CALL_TEST = 3,
I2C_M_NULLDATA_TEST = 4,
I2C_TEST_MultiMrtInit = 5,
I2C_TEST_ALL_CASE = 10
}I2C_VERI_ITEM_SAL, *PI2C_VERI_ITEM_SAL;
typedef struct _I2C_VERI_PARA_SAL_ {
u32 VeriItem;
u32 VeriLoop;
u32 VeriDMA;
u32 VeriItem1;
u32 VeriItem2;
u8 *VeriPattern;
void *VeriDatSrc;
void *VeriDatDes;
u8 SpdMod;
u8 AddrMod;
}I2C_VERI_PARA_SAL,*PI2C_VERI_PARA_SAL;
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_I2S_TEST_H_
#define _RTL8195A_I2S_TEST_H_
struct i2s_test {
u32 tx_isr_cnt; //current tx isr count
u32 rx_isr_cnt; //current rx isr count
u32 mono_val; //when i2s playtone, set mono initial value
u32 stereo_left_val; //when i2s playtone, set stereo left channel init value
u32 stereo_right_val; //when i2s playtone, set stereo right channel init value
u32 c5p1_left_val1; //when i2s playtone, set 5.1 left channel init value 1
u32 c5p1_left_val2; //when i2s playtone, set 5.1 left channel init value 2
u32 c5p1_left_val3; //when i2s playtone, set 5.1 left channel init value 3
u32 c5p1_right_val1;//when i2s playtone, set 5.1 right channel init value 1
u32 c5p1_right_val2;//when i2s playtone, set 5.1 right channel init value 2
u32 c5p1_right_val3;//when i2s playtone, set 5.1 right channel init value 3
};
#endif

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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_KEYSCAN_TEST_H_
#define _RTL8195A_KEYSCAN_TEST_H_
// KEYSCAN debug output
#define KEYSCAN_PREFIX "RTL8195A[KEYSCAN]: "
#define KEYSCAN_PREFIX_LVL " [KEYSCAN_DBG]: "
//#define KEYSCAN_2M
typedef enum _KEYSCAN_VERI_ITEM_SAL_ {
KEYSCAN_TEST_REGULAR_SCAN_MODE = 1,
KEYSCAN_TEST_EVENT_TRIGGER_MODE = 2,
KEYSCAN_TEST_REGISTER_DUMP = 3,
}KEYSCAN_VERI_ITEM_SAL, *PKEYSCAN_VERI_ITEM_SAL;
typedef enum _KEYSCAN_VERI_ITEMS_SAL_ {
KEYSCAN_SIMPLE_RX_BEGIN = 1,
KEYSCAN_SIMPLE_RX_STOP = 2,
KEYSCAN_SIMPLE_MUL_BEGIN = 3,
KEYSCAN_SIMPLE_MUL_STOP = 4,
KEYSCAN_CAPTURE_EDGE = 5,
KEYSCAN_CAPTURE_COMPARE = 6,
KEYSCAN_TX_BASIC = 7,
KEYSCAN_TX_WAVEFORM = 8,
KEYSCAN_TX_FIFO = 9,
}KEYSCAN_VERI_ITEMS_SAL, *PKEYSCAN_VERI_ITEMS_SAL;
// KEYSCAN device status
typedef enum _SKEYSCAN_Device_STATUS_ {
KEYSCAN_STS_UNINITIAL = 0x00,
KEYSCAN_STS_INITIALIZED = 0x01,
KEYSCAN_STS_SCAN_FINISH = 0x02,
}KEYSCAN_Device_STATUS, *PKEYSCAN_Device_STATUS;
typedef struct _HAL_KEYSCAN_ADAPTER_ {
KEYSCAN_TypeDef* KEYSCANx;
IRQn_Type IrqNum;
u32 ColumnSel;
u32 RowSel;
u32 WorkMode;
u32 KeyLimit;
volatile u8 DevSts;
}HAL_KEYSCAN_ADAPTER, *PHAL_KEYSCAN_ADAPTER;
typedef struct _KEYSCAN_VERI_PARA_SAL_ {
u32 VeriItem;
u32 VeriLoop;
u32 VeriPara1;
u32 VeriPara2;
u32 VeriPara3;
}KEYSCAN_VERI_PARA_SAL,*PKEYSCAN_VERI_PARA_SAL;
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/bsp_lcdc_font.h Normal file
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#ifndef __BSP_LCDC_FONT_H
#define __BSP_LCDC_FONT_H
extern const unsigned char asc2_1206[][12];
extern const unsigned char asc2_1608[][16];
extern const unsigned char asc2_2412[][36];
extern const unsigned char asc2_3216[][64];
//#define LCDC_FPGA_VERIFY 1
#endif

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#ifndef __BSP_LED_BOARD_H
#define __BSP_LED_BOARD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#define LED_FRM_BUF_WIDTH 32 //64 //(128+2)
#define LED_FRM_BUF_HEIGHT 32 //64
#define LED_DISP_1CO1CH_IMG_WIDTH 64
#define LED_DISP_1CO1CH_IMG_HEIGHT 16
#define LED_DISP_1CO1CH_IMG_WIDTH_BYTE (LED_DISP_1CO1CH_IMG_WIDTH/8)
#define LED_DISP_1CO2CH_IMG_WIDTH 64
#define LED_DISP_1CO2CH_IMG_HEIGHT 32
#define LED_DISP_1CO2CH_IMG_WIDTH_BYTE (LED_DISP_1CO2CH_IMG_WIDTH/8)
#define LED_HORIZONTAL_SCREEN (0)
#define LED_VERTICAL_SCREEN (1)
#define LED_DEV_DISABLE (0)
#define LED_DEV_ENABLE (1)
#define LED_DISP_ON (0)
#define LED_DISP_OFF (1)
#define LED_WHITE 0//(0)
#define LED_BLACK 1//(1)
#define LED_DEV_1CO1CH (0)
#define LED_DEV_1CO2CH (1)
typedef struct LED_DEV
{
volatile u32 pWidth;
volatile u32 pHeight;
volatile u8 Dir;
volatile u32 Width;
volatile u32 Height;
volatile u32 ScanMode;
volatile u8 * LedFrameBuf;
volatile u32 ScanFreq;
volatile u32 OEActWd;
} _Led_Dev_Info;
extern _Led_Dev_Info LedBdDev;
void LedDevDisplaySwitch(u32 State);
void LedDevInit(void);
void LedDevClear(void);
void LedDevDrawPoint(s16 x, s16 y);
void LedDevDrawPointColor(s16 x, s16 y, u16 color);
u16 LedDevReadPoint(s16 x, s16 y);
void LedDevDrawCircle(s16 x0, s16 y0, u16 r);
void LedDevDrawLine(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevDrawRectangle(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevFill(s16 sx,s16 sy,s16 ex,s16 ey);
void LedDevColorFill(s16 sx,s16 sy,s16 ex,s16 ey,u8 *color);
void LedDevShowChar(s16 x,s16 y,u8 num,u8 size,u8 mode);
void LedDevShowNum(s16 x,s16 y,u32 num,u8 len,u8 size);
void LedDevShowxNum(s16 x,s16 y,u32 num,u8 len,u8 size,u8 mode);
void LedDevShowString(s16 x,s16 y,s16 width,s16 height,u8 size,u8 *p);
void LedDevDisplayDir(u8 dir);
void LedDevSetColor(u16 color);
void LedDevSetBkColor(u16 color);
void LedDevShowChsChar(s16 x,s16 y,u8 * pChar,u8 size,u8 mode);
void LedDevShowChsString(s16 x,s16 y,u8 **pStr, u16 len, u8 size,u8 mode);
#endif

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#ifndef __BSP_MCU_LCD_H
#define __BSP_MCU_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_lcdc_font.h"
#define MCU_LCD_8BIT_IF (0)
#define MCU_LCD_16BIT_IF (1)
#define LCM_ILI9341 (0)
#define LCM_ILI9488 (1)
#define MCULCDBitMode MCU_LCD_8BIT_IF
#define LCD_MODULE LCM_ILI9488
#if (LCD_MODULE == LCM_ILI9341)
#define LCD_WIDTH 240
#define LCD_HEIGHT 320
#define LCD_INITIALIZE ILI9341_Init
#elif (LCD_MODULE == LCM_ILI9488)
#define LCD_WIDTH 320
#define LCD_HEIGHT 480
#define LCD_INITIALIZE ILI9488_Init
#endif
typedef struct
{
u16 width;
u16 height;
u16 id;
u8 dir;
u16 wramcmd;
u16 setxcmd;
u16 setycmd;
volatile u32 McuLcdBitMode;
}_lcd_dev;
extern _lcd_dev lcddev;
extern u16 POINT_COLOR;
extern u16 BACK_COLOR;
#define L2R_U2D 0
#define L2R_D2U 1
#define R2L_U2D 2
#define R2L_D2U 3
#define U2D_L2R 4
#define U2D_R2L 5
#define D2U_L2R 6
#define D2U_R2L 7
#define DFT_SCAN_DIR L2R_U2D
#define WHITE 0xFFFF
#define BLACK 0x0000
#define BLUE 0x001F
#define BRED 0XF81F
#define GRED 0XFFE0
#define GBLUE 0X07FF
#define RED 0xF800
#define MAGENTA 0xF81F
#define GREEN 0x07E0
#define CYAN 0x7FFF
#define YELLOW 0xFFE0
#define BROWN 0XBC40
#define BRRED 0XFC07
#define GRAY 0X8430
#define DARKBLUE 0X01CF
#define LIGHTBLUE 0X7D7C
#define GRAYBLUE 0X5458
#define LIGHTGREEN 0X841F
#define LGRAY 0XC618
#define LGRAYBLUE 0XA651
#define LBBLUE 0X2B12
void BSP_LCD_Init(void);
void LCD_DisplayOn(void);
void LCD_DisplayOff(void);
void LCD_Clear(u16 Color);
void LCD_SetCursor(u16 Xpos, u16 Ypos);
void LCD_DrawPoint(u16 x,u16 y);
void LCD_Fast_DrawPoint(u16 x,u16 y,u16 color);
u16 LCD_ReadPoint(u16 x,u16 y);
void LCD_Draw_Circle(u16 x0,u16 y0,u8 r);
void LCD_DrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_DrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 color);
void LCD_Color_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 *color);
void LCD_ShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void LCD_ShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void LCD_ShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void LCD_ShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void LCD_WriteReg(u16 LCD_Reg, u16 LCD_RegValue);
u16 LCD_ReadReg(u16 LCD_Reg);
void LCD_WriteRAM_Prepare(void);
void LCD_WriteRAM(u16 RGB_Code);
void LCD_Scan_Dir(u8 dir);
void LCD_Display_Dir(u8 dir);
void LCD_SetWindow(u16 xStar, u16 yStar,u16 xEnd,u16 yEnd);
#define delay_ms DelayMs
#define delay_us DelayUs
#define LCD_WR_DATA LCD_WR_DATAX
#define MCULCD_Printf DBG_8195A
#define SSD_HOR_RESOLUTION 800
#define SSD_VER_RESOLUTION 480
#define SSD_HOR_PULSE_WIDTH 1
#define SSD_HOR_BACK_PORCH 46
#define SSD_HOR_FRONT_PORCH 210
#define SSD_VER_PULSE_WIDTH 1
#define SSD_VER_BACK_PORCH 23
#define SSD_VER_FRONT_PORCH 22
#define SSD_HT (SSD_HOR_RESOLUTION+SSD_HOR_BACK_PORCH+SSD_HOR_FRONT_PORCH)
#define SSD_HPS (SSD_HOR_BACK_PORCH)
#define SSD_VT (SSD_VER_RESOLUTION+SSD_VER_BACK_PORCH+SSD_VER_FRONT_PORCH)
#define SSD_VPS (SSD_VER_BACK_PORCH)
#endif

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#ifndef __BSP_RGB_LCD_H
#define __BSP_RGB_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#ifdef LCDC_FPGA_VERIFY
#define RGB_LCD_WIDTH (60) //480
#define RGB_LCD_HEIGHT (32) //(34)
#else
#define RGB_LCD_WIDTH (480)
#define RGB_LCD_HEIGHT (272)
#endif
#define HORIZONTAL_SCREEN (0)
#define VERTICAL_SCREEN (1)
#define RGB_LCD_CLOSE (0)
#define RGB_LCD_OPEN (1)
typedef struct RGB_DEV
{
u32 pWidth;
u32 pHeight;
u32 Hsw;
u32 Hbp;
u32 Hfp;
u32 Vsw;
u32 Vbp;
u32 Vfp;
u8 Dir;
u32 Width;
u32 Height;
u32 PixSize;
u16 * LcdFrameBuf;
} _Rgb_Dev_Info;
extern _Rgb_Dev_Info RgbLcdDev;
void RgbLcdDisplaySwitch(u32 State);
void RgbLcdInit(void);
void RgbLcdClear(void);
void RgbLcdDrawPoint(u16 x, u16 y);
void RgbLcdDrawPointColor(u16 x, u16 y, u16 color);
u16 RgbLcdReadPoint(u16 x, u16 y);
void RgbLcdDrawCircle(u16 x0, u16 y0, u16 r);
void RgbLcdDrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdDrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdFill(u16 sx,u16 sy,u16 ex,u16 ey);
void RgbLcdColorFill(u16 sx,u16 sy,u16 ex,u16 ey,u16 color);
void RgbLcdShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void RgbLcdShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void RgbLcdShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void RgbLcdShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void RgbLcdDisplayDir(u8 dir);
void RgbLcdSetColor(u16 color);
void RgbLcdSetBkColor(u16 color);
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/chris-1016/bsp_lcdc_font.h Normal file
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#ifndef __BSP_LCDC_FONT_H
#define __BSP_LCDC_FONT_H
extern const unsigned char asc2_1206[][12];
extern const unsigned char asc2_1608[][16];
extern const unsigned char asc2_2412[][36];
extern const unsigned char asc2_3216[][64];
#define LCDC_FPGA_VERIFY 1
#endif

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#ifndef __BSP_LED_BOARD_H
#define __BSP_LED_BOARD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#define LED_FRM_BUF_WIDTH 16 //(128+2)
#define LED_FRM_BUF_HEIGHT 16
#define LED_DISP_1CO1CH_IMG_WIDTH 64
#define LED_DISP_1CO1CH_IMG_HEIGHT 16
#define LED_DISP_1CO1CH_IMG_WIDTH_BYTE (LED_DISP_1CO1CH_IMG_WIDTH/8)
#define LED_DISP_1CO2CH_IMG_WIDTH 64
#define LED_DISP_1CO2CH_IMG_HEIGHT 32
#define LED_DISP_1CO2CH_IMG_WIDTH_BYTE (LED_DISP_1CO2CH_IMG_WIDTH/8)
#define LED_HORIZONTAL_SCREEN (0)
#define LED_VERTICAL_SCREEN (1)
#define LED_DEV_DISABLE (0)
#define LED_DEV_ENABLE (1)
#define LED_DISP_ON (0)
#define LED_DISP_OFF (1)
#define LED_WHITE 0//(0)
#define LED_BLACK 1//(1)
#define LED_DEV_1CO1CH (0)
#define LED_DEV_1CO2CH (1)
typedef struct LED_DEV
{
volatile u32 pWidth;
volatile u32 pHeight;
volatile u8 Dir;
volatile u32 Width;
volatile u32 Height;
volatile u32 ScanMode;
volatile u8 * LedFrameBuf;
volatile u32 ScanFreq;
volatile u32 OEActWd;
} _Led_Dev_Info;
extern _Led_Dev_Info LedBdDev;
void LedDevDisplaySwitch(u32 State);
void LedDevInit(void);
void LedDevClear(void);
void LedDevDrawPoint(s16 x, s16 y);
void LedDevDrawPointColor(s16 x, s16 y, u16 color);
u16 LedDevReadPoint(s16 x, s16 y);
void LedDevDrawCircle(s16 x0, s16 y0, u16 r);
void LedDevDrawLine(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevDrawRectangle(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevFill(s16 sx,s16 sy,s16 ex,s16 ey);
void LedDevColorFill(s16 sx,s16 sy,s16 ex,s16 ey,u8 *color);
void LedDevShowChar(s16 x,s16 y,u8 num,u8 size,u8 mode);
void LedDevShowNum(s16 x,s16 y,u32 num,u8 len,u8 size);
void LedDevShowxNum(s16 x,s16 y,u32 num,u8 len,u8 size,u8 mode);
void LedDevShowString(s16 x,s16 y,s16 width,s16 height,u8 size,u8 *p);
void LedDevDisplayDir(u8 dir);
void LedDevSetColor(u16 color);
void LedDevSetBkColor(u16 color);
void LedDevShowChsChar(s16 x,s16 y,u8 * pChar,u8 size,u8 mode);
void LedDevShowChsString(s16 x,s16 y,u8 **pStr, u16 len, u8 size,u8 mode);
#endif

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#ifndef __BSP_MCU_LCD_H
#define __BSP_MCU_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_lcdc_font.h"
#define delay_ms DelayMs
#define delay_us DelayUs
#define MCU_LCD_8BIT_IF (0)
#define MCU_LCD_16BIT_IF (1)
typedef struct
{
u16 width;
u16 height;
u16 id;
u8 dir;
u16 wramcmd;
u16 setxcmd;
u16 setycmd;
volatile u32 McuLcdBitMode;
}_lcd_dev;
extern _lcd_dev lcddev;
extern u16 POINT_COLOR;
extern u16 BACK_COLOR;
#define L2R_U2D 0
#define L2R_D2U 1
#define R2L_U2D 2
#define R2L_D2U 3
#define U2D_L2R 4
#define U2D_R2L 5
#define D2U_L2R 6
#define D2U_R2L 7
#define DFT_SCAN_DIR L2R_U2D
#define WHITE 0xFFFF
#define BLACK 0x0000
#define BLUE 0x001F
#define BRED 0XF81F
#define GRED 0XFFE0
#define GBLUE 0X07FF
#define RED 0xF800
#define MAGENTA 0xF81F
#define GREEN 0x07E0
#define CYAN 0x7FFF
#define YELLOW 0xFFE0
#define BROWN 0XBC40
#define BRRED 0XFC07
#define GRAY 0X8430
#define DARKBLUE 0X01CF
#define LIGHTBLUE 0X7D7C
#define GRAYBLUE 0X5458
#define LIGHTGREEN 0X841F
#define LGRAY 0XC618
#define LGRAYBLUE 0XA651
#define LBBLUE 0X2B12
void BSP_LCD_Init(void);
void LCD_DisplayOn(void);
void LCD_DisplayOff(void);
void LCD_Clear(u16 Color);
void LCD_SetCursor(u16 Xpos, u16 Ypos);
void LCD_DrawPoint(u16 x,u16 y);
void LCD_Fast_DrawPoint(u16 x,u16 y,u16 color);
u16 LCD_ReadPoint(u16 x,u16 y);
void LCD_Draw_Circle(u16 x0,u16 y0,u8 r);
void LCD_DrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_DrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 color);
void LCD_Color_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 *color);
void LCD_ShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void LCD_ShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void LCD_ShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void LCD_ShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void LCD_WriteReg(u16 LCD_Reg, u16 LCD_RegValue);
u16 LCD_ReadReg(u16 LCD_Reg);
void LCD_WriteRAM_Prepare(void);
void LCD_WriteRAM(u16 RGB_Code);
void LCD_Scan_Dir(u8 dir);
void LCD_Display_Dir(u8 dir);
void LCD_Set_Window(u16 sx,u16 sy,u16 width,u16 height);
#define LCD_WR_DATA LCD_WR_DATAX
#define MCULCD_Printf DBG_8195A
#define SSD_HOR_RESOLUTION 800
#define SSD_VER_RESOLUTION 480
#define SSD_HOR_PULSE_WIDTH 1
#define SSD_HOR_BACK_PORCH 46
#define SSD_HOR_FRONT_PORCH 210
#define SSD_VER_PULSE_WIDTH 1
#define SSD_VER_BACK_PORCH 23
#define SSD_VER_FRONT_PORCH 22
#define SSD_HT (SSD_HOR_RESOLUTION+SSD_HOR_BACK_PORCH+SSD_HOR_FRONT_PORCH)
#define SSD_HPS (SSD_HOR_BACK_PORCH)
#define SSD_VT (SSD_VER_RESOLUTION+SSD_VER_BACK_PORCH+SSD_VER_FRONT_PORCH)
#define SSD_VPS (SSD_VER_BACK_PORCH)
#endif

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#ifndef __BSP_RGB_LCD_H
#define __BSP_RGB_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#ifdef LCDC_FPGA_VERIFY
#define RGB_LCD_WIDTH (60)
#define RGB_LCD_HEIGHT (34)
#else
#define RGB_LCD_WIDTH (480)
#define RGB_LCD_HEIGHT (272)
#endif
#define HORIZONTAL_SCREEN (0)
#define VERTICAL_SCREEN (1)
#define RGB_LCD_CLOSE (0)
#define RGB_LCD_OPEN (1)
typedef struct RGB_DEV
{
u32 pWidth;
u32 pHeight;
u32 Hsw;
u32 Hbp;
u32 Hfp;
u32 Vsw;
u32 Vbp;
u32 Vfp;
u8 Dir;
u32 Width;
u32 Height;
u32 PixSize;
u16 * LcdFrameBuf;
} _Rgb_Dev_Info;
extern _Rgb_Dev_Info RgbLcdDev;
void RgbLcdDisplaySwitch(u32 State);
void RgbLcdInit(void);
void RgbLcdClear(void);
void RgbLcdDrawPoint(u16 x, u16 y);
void RgbLcdDrawPointColor(u16 x, u16 y, u16 color);
u16 RgbLcdReadPoint(u16 x, u16 y);
void RgbLcdDrawCircle(u16 x0, u16 y0, u16 r);
void RgbLcdDrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdDrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdFill(u16 sx,u16 sy,u16 ex,u16 ey);
void RgbLcdColorFill(u16 sx,u16 sy,u16 ex,u16 ey,u16 *color);
void RgbLcdShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void RgbLcdShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void RgbLcdShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void RgbLcdShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void RgbLcdDisplayDir(u8 dir);
void RgbLcdSetColor(u16 color);
void RgbLcdSetBkColor(u16 color);
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/chris-1016/rtl8721d_lcdc_test.h Normal file
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#ifndef _RTL8721D_LCDC_TEST_H_
#define _RTL8721D_LCDC_TEST_H_
#define LCDC_TEST_CNT 1000
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/ctiic.h Normal file
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#ifndef __MYCT_IIC_H
#define __MYCT_IIC_H
#include "ameba_soc.h"
#include "platform_stdlib.h"
#include "basic_types.h"
#include "diag.h"
#include "rand.h"
#include "section_config.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc_test.h"
#include "rtl8721d_lcdc.h"
#include "bsp_rgb_lcd.h"
#include "gt9147.h"
#include "touch.h"
#define delay_ms DelayMs
#define delay_us DelayUs
#define CT_SDA_IN CT_SDA_IN_Func
#define CT_SDA_OUT CT_SDA_OUT_Func
#define CT_IIC_SCL CT_IIC_SCL_PIN
#define CT_IIC_SDA CT_IIC_SDA_PIN
#define CT_READ_SDA GPIO_ReadDataBit(GT9147_I2C_SDA_PIN)
void CT_SDA_IN_Func(void);
void CT_SDA_OUT_Func(void);
void CT_IIC_SCL_PIN(int level);
void CT_IIC_SDA_PIN(int level);
void CT_IIC_Init(void);
void CT_IIC_Start(void);
void CT_IIC_Stop(void);
void CT_IIC_Send_Byte(u8 txd);
u8 CT_IIC_Read_Byte(unsigned char ack);
u8 CT_IIC_Wait_Ack(void);
void CT_IIC_Ack(void);
void CT_IIC_NAck(void);
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/clock_menu.h Normal file
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#ifndef CLOCK_MENU_H
#define CLOCK_MENU_H
#include "rt_gui_demo_includes.h"
#include "start_menu.h"
#define u8 unsigned char
#define u16 unsigned short
#define u32 unsigned int
#define s32 signed int
#define uint8_t unsigned char
#define uint16_t unsigned short
#define u8 unsigned char
#define u16 unsigned short
#define PI 3.14159
#define CLOCK_BK_COLOR GUI_BLACK
#define CLOCK_COLOR GUI_YELLOW
#define CLOCK_HOUR_COLOR GUI_RED
#define CLOCK_MIN_COLOR GUI_GREEN
#define CLOCK_SEC_COLOR GUI_YELLOW
#define CLOCK_CENTER_X 135
#define CLOCK_CENTER_Y 170
#define CLOCK_RADIUS 90
#define CLOCK_RADIUS_W 4
#define CLOCK_RADIUS_M 3
#define SCALL_OFFSET_B 6
#define SCALL_OFFSET_S 4
#define NUMBER_OFFSET 14
#define SEC_PTR_OFFSET 25
#define MIN_PTR_OFFSET 35
#define HOUR_PTR_OFFSET 50
#define CUS_CLOCK_RET_BTN_OFFSET CUS_GRAD_RET_BTN_OFFSET
typedef struct
{
uint8_t hour;
uint8_t min;
uint8_t sec;
uint16_t w_year;
uint8_t w_month;
uint8_t w_date;
uint8_t week;
} tm_cus;
extern tm_cus timer_rt;
void DrawClockPointer(uint8_t hour, uint8_t min, uint8_t sec);
void ClearClockPointer(uint8_t hour, uint8_t min, uint8_t sec);
void DrawClockBorder(void);
void ClockShowTime(uint16_t x, uint16_t y);
extern const GUI_BITMAP bmMicriumLogo;
extern const GUI_BITMAP bmMicriumLogo_1bpp;
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/grad_menu.h Normal file
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#ifndef GRAD_MENU_H
#define GRAD_MENU_H
#include "rt_gui_demo_includes.h"
#include "start_menu.h"
#define CUS_GRAD_RET_BTN_OFFSET CUS_TEMPRE_RET_BTN_OFFSET
void GradMenuCusPro(RT_CUS_DEMO_STS_TYPE * Sts);
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/gui_cus_parts.h Normal file
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#ifndef GUI_CUS_PARTS_H
#define GUI_CUS_PARTS_H
#include "rt_gui_demo_includes.h"
#define CUS_DEF_BUTTON_HANDLE u32
#define CUS_DEF_CIRCLE_BUTTON_HANDLE u32
#define CUS_DEF_TEMP_HANDLE u32
#define CUS_RT_WIN_HANDLE u32
#define RT_CUS_CLOCK 0
#define RT_CUS_LIGHT 1
#define RT_CUS_TEMPRE 2
#define RT_CUS_GRAD 3
#define RT_CUS_WAVE 4
#define RT_CUS_MAIN_INVALID 5
#define RT_CUS_CIR_TEMPRE_WORK 6
#define RT_CUS_CIR_TEMPRE_TEST 7
#define RT_CUS_CIR_TEMPRE_RET 8
#define RT_CUS_CIR_TEMPRE_ICON 9
#define RT_CUS_GRAD_PLATE_ICON 10
#define RT_CUS_GRAD_RET 11
#define RT_CUS_LIGHT_SWITCH 12
#define RT_CUS_LIGHT_PALET 13
#define RT_CUS_LIGHT_BULB 14
#define RT_CUS_LIGHT_RED_BAR 15
#define RT_CUS_LIGHT_GREEN_BAR 16
#define RT_CUS_LIGHT_BLUE_BAR 17
#define RT_CUS_LIGHT_RET 18
#define RT_CUS_WAVE_RET 19
#define RT_CUS_CLOCK_RET 20
typedef struct BUTTON_CUS
{
s32 xPos;
s32 yPos;
const GUI_BITMAP *pBitmap;
const GUI_BITMAP *pUnSelBitmap;
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
s32 ID;
s32 SelState;
s32 ProState;
} _BUTTON_CUS_Info;
typedef struct BUTTON_CIRCLE_CUS
{
s32 OrgxPos;
s32 OrgyPos;
s32 InnerR;
s32 OuterR;
const GUI_FONT* Fontp;
u32 CtrColor;
u32 EdgeColor;
u32 FntColor;
const GUI_BITMAP *pBitmap;
u8 * StrInBtn;
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
s32 ID;
s32 SelState;
s32 ProState;
} BUTTON_CIRCLE_CUS_Info;
typedef struct TEMPRE_CUS_ICON
{
s32 OrgX;
s32 OrgY;
s32 L_Dx;
s32 G_Dx;
s32 G_Color;
s32 F_Dx;
s32 Lin_Dx;
s32 Lin_S_Dx;
s32 Lin_L_Dx;
s32 L_Color;
s32 C_X;
s32 C_Y;
s32 C_R;
s32 C_Color;
s32 E_Dx;
s32 S_R_Dx;
s32 S_L_Dx;
s32 S_D_Dx;
s32 S_Len_Dx;
s32 S_La_Color;
s32 L_D_Dx;
s32 H_Dx;
s32 TemprMin;
s32 TemprMax;
const GUI_FONT* Fontp;
u32 FntColor;
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
s32 CurTempre;
s32 CurSetTempre;
s32 WarningSts;
s32 ID;
s32 SelState;
s32 ProState;
} TEMPRE_CUS_ICON_Info;
typedef struct CUS_GRAD_PLATE
{
s32 X0;
s32 Y0;
s32 R0;
u32 Color0;
s32 X1;
s32 Y1;
s32 R1;
u32 Color1;
s32 RangeXmin;
s32 RangeYmin;
s32 RangeXmax;
s32 RangeYmax;
s32 BkColor;
s32 CIntvl;
s32 ClCnt;
s32 CombineClr;
s32 Angle;
s32 OrgDx;
s32 OrgMaxDx;
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
s32 ID;
s32 SelState;
s32 ProState;
} CUS_GRAD_PLATE_Info;
typedef struct LIGHT_PLATE_CUS
{
s32 OrgxPos;
s32 OrgyPos;
s32 XRange;
s32 YRange;
s32 XColor;
s32 YColor;
s32 SelColor;
s32 FixColor;
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
s32 ID;
s32 SelState;
s32 ProState;
} LIGHT_PLATE_CUS_Info;
typedef struct CUS_COLOR_BAR_DEF
{
s32 ColorRange;
s32 BarOrgX;
s32 BarOrgY;
s32 BarXSize;
s32 BarYSize;
s32 BarFillColor;
s32 BtnX;
s32 BtnY;
s32 BtnRange;
s32 BtnR;
s32 BtnFillColor;
s32 CurColorVal;
s32 CurShowStrX;
s32 CurShowStrY;
const GUI_FONT * pFnt;
/*touch range*/
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
/*ID, state*/
s32 ID;
s32 SelState;
s32 ProState;
} CUS_COLOR_BAR_DEF_INFO;
typedef struct CUS_Light_BULB_DISP_DEF
{
s32 OrgX;
s32 OrgY;
s32 R_D_Y;
s32 R_D_X;
s32 R_Color;
s32 Ex;
s32 Ey;
s32 Edx;
s32 Edy;
s32 BulbCurFillColor;
s32 BulbOutColor;
/*touch range*/
s32 TouchXmin;
s32 TouchXmax;
s32 TouchYmin;
s32 TouchYmax;
/*ID, state*/
s32 ID;
s32 SelState;
s32 ProState;
} CUS_Light_BULB_DISP_DEF_INFO;
extern unsigned int CusCreateButton(_BUTTON_CUS_Info * pButton);
extern unsigned int CusCreateCircleButton(BUTTON_CIRCLE_CUS_Info * pBtn);
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/light_menu.h Normal file
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#ifndef LIGHT_MENU_H
#define LIGHT_MENU_H
#include "rt_gui_demo_includes.h"
//#include "start_menu.h"
#define u8 unsigned char
#define u16 unsigned short
#define u32 unsigned int
#define s32 signed int
#define CUS_LIGHT_RET_BTN_OFFSET CUS_CLOCK_RET_BTN_OFFSET
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/main_menu.h Normal file
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#ifndef MAIN_MENU_H
#define MAIN_MENU_H
#include "rt_gui_demo_includes.h"
#include "start_menu.h"
#define u8 unsigned char
#define u16 unsigned short
#define u32 unsigned int
#define s32 signed int
#define CUS_MAIN_MENU_DEFAULT_BK_COLOR GUI_WHITE
#define CUS_MAIN_MENU_DEFAULT_FR_COLOR GUI_RED
#define CUS_MAIN_MENU_SEL_ICON_COLOR GUI_DARKMAGENTA
#define CUS_MAIN_MENU_ICON_NUM (5)
#define CUS_MAIN_EDGE_NUM 15
#define CUS_BTN_SELECT_RANGE_X 6
#define CUS_BTN_SELECT_RANGE_Y 6
#define CUS_BTN_SELECTED_ALPHA_FACTOR 0X2F/*0~255*/
#define CUS_BTN_SELECTED_ALPHA_BACKCOLOR RT_DEFAULT_COLOR/*0~255*/
enum CUS_BUTTON_STS {
RT_CUS_BTN_SEL,
RT_CUS_BTN_UNSEL,
};
enum CUS_TOUCH_STS_FLAG {
RT_CUS_TOUCHED_RELEASE,
RT_CUS_TOUCHED_UNRELEASE,
RT_CUS_NOT_TOUCHED,
};
enum CUS_MAIN_TRANS_STS {
RT_CUS_STARTMENU_PRO,
RT_CUS_MAINMENU_PRO,
RT_CUS_CLOCK_PRO,
RT_CUS_LIGHTCTRL_PRO,
RT_CUS_TEMPRE_PRO,
RT_CUS_TEMPRE_WORK_PRO,
RT_CUS_TEMPRE_TEST_PRO,
RT_CUS_GRAD_PRO,
RT_CUS_WAVE_PRO,
};
typedef struct MAIN_MENU_ICON_MEMDEV_STR{
GUI_MEMDEV_Handle Hdl;
s32 Id;
} MAIN_MENU_ICON_MEMDEV_DEF;
void InitMainArray(void);
void DrawCusMainBkWin(void);
void CusDispAllMainIcon(void);
void CusMainMenuStoreAllIcon(void);
void CusMainMenuFreeAllIcon(void);
void CusMainMenuSelMenuDraw(_BUTTON_CUS_Info * pButton);
void CusMainMenuUnSelMenuDraw(_BUTTON_CUS_Info * pButton);
void CusMainMenuRestoreAllMenu(void);
void CusMainMenuDispTargetIcon(_BUTTON_CUS_Info * pButton);
void MainMenuCusPro(RT_CUS_DEMO_STS_TYPE * Sts);
s32 MainMenuGetPressId(touch_pos_type * PosTemp);
_BUTTON_CUS_Info * MainMenuGetBtnFromId(s32 Id);
void CusGetTouchPos(GUI_PID_STATE * pSts, touch_pos_type * Pos);
s32 CusCheckTouchPressSts(GUI_PID_STATE * pSts);
void MainMenuSingleClickPro(_BUTTON_CUS_Info * pBtn);
void MainMenuStateTransfer(RT_CUS_DEMO_STS_TYPE * Sts);
void CusResetTouchPressSts(void);
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/picture_inc.h Normal file
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#ifndef PICTURE_INC_H
#define PICTURE_INC_H
#include "GUI.h"
extern GUI_CONST_STORAGE GUI_BITMAP bmclock_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmtempre_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmgradienter_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmwave_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmlight_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmrealtek_logo;
extern GUI_CONST_STORAGE GUI_BITMAP bmreturn_btn_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmlight_off_pic;
extern GUI_CONST_STORAGE GUI_BITMAP bmlight_on_pic;
extern const GUI_FONT GUI_FontHZ_rt_demo_chs_font;
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/realtek_demo.h Normal file
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#ifndef REALTEK_DEMO_H
#define REALTEK_DEMO_H
#include "rt_gui_demo_includes.h"
extern RT_CUS_DEMO_STS_TYPE RtCusDemoVar;
void RealtekDemo(void) ;
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/demo_code/rt_gui_demo_includes.h Normal file
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#ifndef RT_GUI_DEMO_INCLUDES_H
#define RT_GUI_DEMO_INCLUDES_H
typedef struct RT_CUS_DEMO_STS{
s32 TransSts;
} RT_CUS_DEMO_STS_TYPE;
extern unsigned int RtCusLanguage;
#define RT_CUS_ENGLISH 0
#define RT_CUS_CHINESE 1
#include "platform_stdlib.h"
#include "basic_types.h"
#include "diag.h"
#include "rand.h"
#include "section_config.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc_test.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_rgb_lcd.h"
#include "bsp_led_board.h"
#include "gt9147.h"
#include "touch.h"
#include "ctiic.h"
#include "picture_inc.h"
#include "gui_cus_parts.h"
#include "main_menu.h"
#include "start_menu.h"
#include "realtek_demo.h"
#include "tempre_menu.h"
#include "grad_menu.h"
#include "light_menu.h"
#include "wave_menu.h"
#include "clock_menu.h"
#define countof(Obj) (sizeof(Obj)/sizeof(Obj[0]))
#define RT_DEFAULT_COLOR 0xBB6F24
#define NULL 0
#endif /* LCDCONF_H */

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#ifndef START_MENU_H
#define START_MENU_H
#include "rt_gui_demo_includes.h"
enum MENU_STATE {
MENULOGO_RT,
MENULOGO_RT_SCAN,
MENU_2,
MENU_2_LAYER_1,
MENU_2_LAYER_2,
};
enum MENU_TOUCH_STATE {
MENU_TOUCH_NULL = 0,
MENU_LOGO_TRG,
MENU_LOGO_RLEASE,
};
typedef struct MENU_RANE_DEF{
int x0;
int y0;
int x1;
int y1;
} menu_range;
typedef struct TOUCH_POS_DEF{
int x;
int y;
} touch_pos_type;
enum MENU_TOUCH_RANGE_STATE {
TOUCH_POS_OUT = 1,
TOUCH_POS_IN,
};
void ShowMainMenuRT(void);
void ShowMainMenuSTR(void);
void RtMenuLogoScan(void);
extern void RtCheckTouchPos(touch_pos_type * pos);
extern void StartMenuFunc(RT_CUS_DEMO_STS_TYPE * Sts) ;
void ShowStartMenuStr(void);
void ShowMainMenuStr(void);
void ShowClockMenuStr(void);
void ShowLightMenuStr(void);
void ShowGradMenuStr(void);
void ShowWaveMenuStr(void);
#endif /* LCDCONF_H */

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#ifndef TEMPRE_MENU_H
#define TEMPRE_MENU_H
#include "rt_gui_demo_includes.h"
#define CUS_TEMPRE_MENU_DEFAULT_BK_COLOR GUI_WHITE
#define CUS_TEMPRE_MENU_DEFAULT_FR_COLOR GUI_RED
#define CUS_TEMPRE_CIRCLE_WORK_BTN_X (50)
#define CUS_TEMPRE_CIRCLE_WORK_BTN_Y (LCD_GET_YSIZE()-80)
#define CUS_TEMPRE_CIRCLE_WORK_IN_R (28)
#define CUS_TEMPRE_CIRCLE_WORK_OUT_R (31)
#define CUS_TEMPRE_CIRCLE_WORK_FNT_TYP (&GUI_Font8x16)//(&GUI_FontComic18B_1) //(&GUI_Font8x16) //
#define CUS_TEMPRE_CIRCLE_WORK_CEN_ENCOLR GUI_BLUE //(0xCADAA9)
#define CUS_TEMPRE_CIRCLE_WORK_CEN_DISCOLR GUI_GRAY//(0xCADAA9)
#define CUS_TEMPRE_CIRCLE_WORK_EDG_COLR GUI_GREEN //(0x98D0DE)
#define CUS_TEMPRE_CIRCLE_WORK_FNT_COLR (GUI_BLACK)
#define CUS_TEMPRE_CIRCLE_TEST_BTN_X (LCD_GET_XSIZE()-100)
#define CUS_TEMPRE_CIRCLE_TEST_BTN_Y (LCD_GET_YSIZE()-80)
#define CUS_TEMPRE_CIRCLE_TEST_IN_R (28)
#define CUS_TEMPRE_CIRCLE_TEST_OUT_R (31)
#define CUS_TEMPRE_CIRCLE_TEST_FNT_TYP (&GUI_Font8x16) //(&GUI_FontComic18B_1) //(&GUI_Font8x16) //
#define CUS_TEMPRE_CIRCLE_TEST_CEN_ENCOLR GUI_BLUE //(0xCADAA9)
#define CUS_TEMPRE_CIRCLE_TEST_CEN_DISCOLR GUI_GRAY //(0xCADAA9)
#define CUS_TEMPRE_CIRCLE_TEST_EDG_COLR GUI_GREEN //(0x98D0DE)
#define CUS_TEMPRE_CIRCLE_TEST_FNT_COLR (GUI_BLACK)
#define TEMPRE_MENU_CIRCLE_BTN_NUM 2
#define TEMPRE_MENU_RET_BTN_NUM 1
#define CUS_TEMPRE_CIRCLE_WORK_STR_Y_OFFSET 10
#define CUS_TEMPRE_RET_BTN_OFFSET 5
#define CUS_TEMPRE_NOT_WARNING 0
#define CUS_TEMPRE_WARNING 1
void TempreMenuCusPro(RT_CUS_DEMO_STS_TYPE * Sts);
s32 TempreMenuGetPressId(touch_pos_type * PosTemp);
void * TempreMenuGetBtnFromId(s32 Id);
#endif /* LCDCONF_H */

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#ifndef WAVE_MENU_H
#define WAVE_MENU_H
#include "rt_gui_demo_includes.h"
#include "start_menu.h"
#include "realtek_demo.h"
#define u8 unsigned char
#define u16 unsigned short
#define u32 unsigned int
#define s32 signed int
#define CUS_WAVE_RET_BTN_OFFSET CUS_GRAD_RET_BTN_OFFSET
extern _BUTTON_CUS_Info WaveMenuVar;
void * WaveMenuGetBtnFromId(s32 Id);
void WaveMenuCusPro(RT_CUS_DEMO_STS_TYPE * Sts);
#endif /* LCDCONF_H */

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sdk/component/soc/realtek/amebad/verification/lcdc/gt9147.h Normal file
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#ifndef __GT9147_H
#define __GT9147_H
#include "ameba_soc.h"
#include "touch.h"
#include "platform_stdlib.h"
#include "basic_types.h"
#include "diag.h"
#include "rand.h"
#include "section_config.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc_test.h"
#include "rtl8721d_lcdc.h"
#include "bsp_rgb_lcd.h"
#include "gt9147.h"
#define TP_I2C_USING_GPIO
#define GT_RST_PIN _PA_16
#define GT_INT_PIN _PA_17
#define RGB_43_SCREEN_RST _PA_18
#define GT9147_I2C_SCL_PIN _PB_24
#define GT9147_I2C_SDA_PIN _PB_25
#define GT_RST GT9147_RST_OUT
#define GT_INT GPIO_ReadDataBit(GT9147_I2C_SDA_PIN)
#define GT_CMD_WR 0X28
#define GT_CMD_RD 0X29
#define GT_CTRL_REG 0X8040
#define GT_CFGS_REG 0X8047
#define GT_CHECK_REG 0X80FF
#define GT_PID_REG 0X8140
#define GT_GSTID_REG 0X814E
#define GT_TP1_REG 0X8150
#define GT_TP2_REG 0X8158
#define GT_TP3_REG 0X8160
#define GT_TP4_REG 0X8168
#define GT_TP5_REG 0X8170
typedef struct
{
u16 width;
u16 height;
u16 id;
u8 dir;
u16 wramcmd;
u16 setxcmd;
u16 setycmd;
volatile u32 McuLcdBitMode;
}_lcd_dev_TP;
extern _lcd_dev_TP TP_LCD_Dev;
void GT9147_RST_OUT(level);
void GT9147_INT_OUT(level);
void GT9147_RST_OUT(level);
u8 GT9147_Send_Cfg(u8 mode);
u8 GT9147_WR_Reg(u16 reg,u8 *buf,u8 len);
void GT9147_RD_Reg(u16 reg,u8 *buf,u8 len);
u8 GT9147_Init(void);
u8 GT9147_Scan(u8 mode);
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/lcdc_chris/bsp_lcdc_font.h Normal file
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#ifndef __BSP_LCDC_FONT_H
#define __BSP_LCDC_FONT_H
extern const unsigned char asc2_1206[][12];
extern const unsigned char asc2_1608[][16];
extern const unsigned char asc2_2412[][36];
extern const unsigned char asc2_3216[][64];
#define LCDC_FPGA_VERIFY 1
#endif

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#ifndef __BSP_LED_BOARD_H
#define __BSP_LED_BOARD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#define LED_FRM_BUF_WIDTH 16 //(128+2)
#define LED_FRM_BUF_HEIGHT 16
#define LED_DISP_1CO1CH_IMG_WIDTH 64
#define LED_DISP_1CO1CH_IMG_HEIGHT 16
#define LED_DISP_1CO1CH_IMG_WIDTH_BYTE (LED_DISP_1CO1CH_IMG_WIDTH/8)
#define LED_DISP_1CO2CH_IMG_WIDTH 64
#define LED_DISP_1CO2CH_IMG_HEIGHT 32
#define LED_DISP_1CO2CH_IMG_WIDTH_BYTE (LED_DISP_1CO2CH_IMG_WIDTH/8)
#define LED_HORIZONTAL_SCREEN (0)
#define LED_VERTICAL_SCREEN (1)
#define LED_DEV_DISABLE (0)
#define LED_DEV_ENABLE (1)
#define LED_DISP_ON (0)
#define LED_DISP_OFF (1)
#define LED_WHITE 0//(0)
#define LED_BLACK 1//(1)
#define LED_DEV_1CO1CH (0)
#define LED_DEV_1CO2CH (1)
typedef struct LED_DEV
{
volatile u32 pWidth;
volatile u32 pHeight;
volatile u8 Dir;
volatile u32 Width;
volatile u32 Height;
volatile u32 ScanMode;
volatile u8 * LedFrameBuf;
volatile u32 ScanFreq;
volatile u32 OEActWd;
} _Led_Dev_Info;
extern _Led_Dev_Info LedBdDev;
void LedDevDisplaySwitch(u32 State);
void LedDevInit(void);
void LedDevClear(void);
void LedDevDrawPoint(s16 x, s16 y);
void LedDevDrawPointColor(s16 x, s16 y, u16 color);
u16 LedDevReadPoint(s16 x, s16 y);
void LedDevDrawCircle(s16 x0, s16 y0, u16 r);
void LedDevDrawLine(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevDrawRectangle(s16 x1, s16 y1, s16 x2, s16 y2);
void LedDevFill(s16 sx,s16 sy,s16 ex,s16 ey);
void LedDevColorFill(s16 sx,s16 sy,s16 ex,s16 ey,u8 *color);
void LedDevShowChar(s16 x,s16 y,u8 num,u8 size,u8 mode);
void LedDevShowNum(s16 x,s16 y,u32 num,u8 len,u8 size);
void LedDevShowxNum(s16 x,s16 y,u32 num,u8 len,u8 size,u8 mode);
void LedDevShowString(s16 x,s16 y,s16 width,s16 height,u8 size,u8 *p);
void LedDevDisplayDir(u8 dir);
void LedDevSetColor(u16 color);
void LedDevSetBkColor(u16 color);
void LedDevShowChsChar(s16 x,s16 y,u8 * pChar,u8 size,u8 mode);
void LedDevShowChsString(s16 x,s16 y,u8 **pStr, u16 len, u8 size,u8 mode);
#endif

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#ifndef __BSP_MCU_LCD_H
#define __BSP_MCU_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_lcdc_font.h"
#define delay_ms DelayMs
#define delay_us DelayUs
#define MCU_LCD_8BIT_IF (0)
#define MCU_LCD_16BIT_IF (1)
typedef struct
{
u16 width;
u16 height;
u16 id;
u8 dir;
u16 wramcmd;
u16 setxcmd;
u16 setycmd;
volatile u32 McuLcdBitMode;
}_lcd_dev;
extern _lcd_dev lcddev;
extern u16 POINT_COLOR;
extern u16 BACK_COLOR;
#define L2R_U2D 0
#define L2R_D2U 1
#define R2L_U2D 2
#define R2L_D2U 3
#define U2D_L2R 4
#define U2D_R2L 5
#define D2U_L2R 6
#define D2U_R2L 7
#define DFT_SCAN_DIR L2R_U2D
#define WHITE 0xFFFF
#define BLACK 0x0000
#define BLUE 0x001F
#define BRED 0XF81F
#define GRED 0XFFE0
#define GBLUE 0X07FF
#define RED 0xF800
#define MAGENTA 0xF81F
#define GREEN 0x07E0
#define CYAN 0x7FFF
#define YELLOW 0xFFE0
#define BROWN 0XBC40
#define BRRED 0XFC07
#define GRAY 0X8430
#define DARKBLUE 0X01CF
#define LIGHTBLUE 0X7D7C
#define GRAYBLUE 0X5458
#define LIGHTGREEN 0X841F
#define LGRAY 0XC618
#define LGRAYBLUE 0XA651
#define LBBLUE 0X2B12
void BSP_LCD_Init(void);
void LCD_DisplayOn(void);
void LCD_DisplayOff(void);
void LCD_Clear(u16 Color);
void LCD_SetCursor(u16 Xpos, u16 Ypos);
void LCD_DrawPoint(u16 x,u16 y);
void LCD_Fast_DrawPoint(u16 x,u16 y,u16 color);
u16 LCD_ReadPoint(u16 x,u16 y);
void LCD_Draw_Circle(u16 x0,u16 y0,u8 r);
void LCD_DrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_DrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void LCD_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 color);
void LCD_Color_Fill(u16 sx,u16 sy,u16 ex,u16 ey,u16 *color);
void LCD_ShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void LCD_ShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void LCD_ShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void LCD_ShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void LCD_WriteReg(u16 LCD_Reg, u16 LCD_RegValue);
u16 LCD_ReadReg(u16 LCD_Reg);
void LCD_WriteRAM_Prepare(void);
void LCD_WriteRAM(u16 RGB_Code);
void LCD_Scan_Dir(u8 dir);
void LCD_Display_Dir(u8 dir);
void LCD_Set_Window(u16 sx,u16 sy,u16 width,u16 height);
#define LCD_WR_DATA LCD_WR_DATAX
#define MCULCD_Printf DBG_8195A
#define SSD_HOR_RESOLUTION 800
#define SSD_VER_RESOLUTION 480
#define SSD_HOR_PULSE_WIDTH 1
#define SSD_HOR_BACK_PORCH 46
#define SSD_HOR_FRONT_PORCH 210
#define SSD_VER_PULSE_WIDTH 1
#define SSD_VER_BACK_PORCH 23
#define SSD_VER_FRONT_PORCH 22
#define SSD_HT (SSD_HOR_RESOLUTION+SSD_HOR_BACK_PORCH+SSD_HOR_FRONT_PORCH)
#define SSD_HPS (SSD_HOR_BACK_PORCH)
#define SSD_VT (SSD_VER_RESOLUTION+SSD_VER_BACK_PORCH+SSD_VER_FRONT_PORCH)
#define SSD_VPS (SSD_VER_BACK_PORCH)
#endif

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#ifndef __BSP_RGB_LCD_H
#define __BSP_RGB_LCD_H
#include "sys.h"
#include "stdlib.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc.h"
#include "bsp_mcu_lcd.h"
#include "bsp_lcdc_font.h"
#ifdef LCDC_FPGA_VERIFY
#define RGB_LCD_WIDTH (60)
#define RGB_LCD_HEIGHT (34)
#else
#define RGB_LCD_WIDTH (480)
#define RGB_LCD_HEIGHT (272)
#endif
#define HORIZONTAL_SCREEN (0)
#define VERTICAL_SCREEN (1)
#define RGB_LCD_CLOSE (0)
#define RGB_LCD_OPEN (1)
typedef struct RGB_DEV
{
u32 pWidth;
u32 pHeight;
u32 Hsw;
u32 Hbp;
u32 Hfp;
u32 Vsw;
u32 Vbp;
u32 Vfp;
u8 Dir;
u32 Width;
u32 Height;
u32 PixSize;
u16 * LcdFrameBuf;
} _Rgb_Dev_Info;
extern _Rgb_Dev_Info RgbLcdDev;
void RgbLcdDisplaySwitch(u32 State);
void RgbLcdInit(void);
void RgbLcdClear(void);
void RgbLcdDrawPoint(u16 x, u16 y);
void RgbLcdDrawPointColor(u16 x, u16 y, u16 color);
u16 RgbLcdReadPoint(u16 x, u16 y);
void RgbLcdDrawCircle(u16 x0, u16 y0, u16 r);
void RgbLcdDrawLine(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdDrawRectangle(u16 x1, u16 y1, u16 x2, u16 y2);
void RgbLcdFill(u16 sx,u16 sy,u16 ex,u16 ey);
void RgbLcdColorFill(u16 sx,u16 sy,u16 ex,u16 ey,u16 *color);
void RgbLcdShowChar(u16 x,u16 y,u8 num,u8 size,u8 mode);
void RgbLcdShowNum(u16 x,u16 y,u32 num,u8 len,u8 size);
void RgbLcdShowxNum(u16 x,u16 y,u32 num,u8 len,u8 size,u8 mode);
void RgbLcdShowString(u16 x,u16 y,u16 width,u16 height,u8 size,u8 *p);
void RgbLcdDisplayDir(u8 dir);
void RgbLcdSetColor(u16 color);
void RgbLcdSetBkColor(u16 color);
#endif

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sdk/component/soc/realtek/amebad/verification/lcdc/lcdc_chris/rtl8721d_lcdc_test.h Normal file
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#ifndef _RTL8721D_LCDC_TEST_H_
#define _RTL8721D_LCDC_TEST_H_
#define LCDC_TEST_CNT 1000
#endif

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#ifndef _RTL8721D_LCDC_TEST_H_
#define _RTL8721D_LCDC_TEST_H_
#define LCDC_TEST_CNT 1000
#define LCDC_FPGA_VERIFICATION 0
/* UI related macro */
#define LCDC_UCGUI 0
#define MCU_IF_GUI 0
#define RGB_IF_GUI 1
#define GUI_IF_TYPE RGB_IF_GUI
#define LCDC_GUI_TYPE LCDC_UCGUI
/* JPG decode macro*/
#define JPG_DECODER_TEST 0
#endif

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#ifndef __TOUCH_H__
#define __TOUCH_H__
//#include "sys.h"
//#include "ott2001a.h"
#include "gt9147.h"
//#include "ft5206.h"
#include "ameba_soc.h"
#include "platform_stdlib.h"
#include "basic_types.h"
#include "diag.h"
#include "rand.h"
#include "section_config.h"
#include "ameba_soc.h"
#include "rtl8721d_lcdc_test.h"
#include "rtl8721d_lcdc.h"
#include "bsp_rgb_lcd.h"
#include "gt9147.h"
//////////////////////////////////////////////////////////////////////////////////
//本程序只供学习使用，未经作者许可，不得用于其它任何用途
//ALIENTEK STM32开发板
//触摸屏驱动（支持ADS7843/7846/UH7843/7846/XPT2046/TSC2046/OTT2001A等） 代码
//正点原子@ALIENTEK
//技术论坛:www.openedv.com
//创建日期:2015/12/28
//版本：V1.0
//版权所有，盗版必究。
//Copyright(C) 广州市星翼电子科技有限公司 2014-2024
//All rights reserved
//********************************************************************************
//修改说明
//无
//////////////////////////////////////////////////////////////////////////////////
#define TP_PRES_DOWN 0x80 //触屏被按下
#define TP_CATH_PRES 0x40 //有按键按下了
#define CT_MAX_TOUCH 5 //电容屏支持的点数,固定为5点
//触摸屏控制器
typedef struct
{
u8 (*init)(void); //初始化触摸屏控制器
u8 (*scan)(u8); //扫描触摸屏.0,屏幕扫描;1,物理坐标;
void (*adjust)(void); //触摸屏校准
u16 x[CT_MAX_TOUCH]; //当前坐标
u16 y[CT_MAX_TOUCH]; //电容屏有最多5组坐标,电阻屏则用x[0],y[0]代表:此次扫描时,触屏的坐标,用
//x[4],y[4]存储第一次按下时的坐标.
u8 sta; //笔的状态
//b7:按下1/松开0;
//b6:0,没有按键按下;1,有按键按下.
//b5:保留
//b4~b0:电容触摸屏按下的点数(0,表示未按下,1表示按下)
/////////////////////触摸屏校准参数(电容屏不需要校准)//////////////////////
float xfac;
float yfac;
short xoff;
short yoff;
//新增的参数,当触摸屏的左右上下完全颠倒时需要用到.
//b0:0,竖屏(适合左右为X坐标,上下为Y坐标的TP)
// 1,横屏(适合左右为Y坐标,上下为X坐标的TP)
//b1~6:保留.
//b7:0,电阻屏
// 1,电容屏
u8 touchtype;
}_m_tp_dev;
extern _m_tp_dev tp_dev; //触屏控制器在touch.c里面定义
#if 0
//电阻屏芯片连接引脚
#define PEN HAL_GPIO_ReadPin(GPIOH,GPIO_PIN_7) //T_PEN
#define DOUT HAL_GPIO_ReadPin(GPIOG,GPIO_PIN_3) //T_MISO
#define TDIN(n) (n?HAL_GPIO_WritePin(GPIOI,GPIO_PIN_3,GPIO_PIN_SET):HAL_GPIO_WritePin(GPIOI,GPIO_PIN_3,GPIO_PIN_RESET))//T_MOSI
#define TCLK(n) (n?HAL_GPIO_WritePin(GPIOH,GPIO_PIN_6,GPIO_PIN_SET):HAL_GPIO_WritePin(GPIOH,GPIO_PIN_6,GPIO_PIN_RESET))//T_SCK
#define TCS(n) (n?HAL_GPIO_WritePin(GPIOI,GPIO_PIN_8,GPIO_PIN_SET):HAL_GPIO_WritePin(GPIOI,GPIO_PIN_8,GPIO_PIN_RESET))//T_CS
//电阻屏函数
void TP_Write_Byte(u8 num); //向控制芯片写入一个数据
u16 TP_Read_AD(u8 CMD); //读取AD转换值
u16 TP_Read_XOY(u8 xy); //带滤波的坐标读取(X/Y)
u8 TP_Read_XY(u16 *x,u16 *y); //双方向读取(X+Y)
u8 TP_Read_XY2(u16 *x,u16 *y); //带加强滤波的双方向坐标读取
void TP_Drow_Touch_Point(u16 x,u16 y,u16 color);//画一个坐标校准点
void TP_Draw_Big_Point(u16 x,u16 y,u16 color); //画一个大点
void TP_Save_Adjdata(void); //保存校准参数
u8 TP_Get_Adjdata(void); //读取校准参数
void TP_Adjust(void); //触摸屏校准
void TP_Adj_Info_Show(u16 x0,u16 y0,u16 x1,u16 y1,u16 x2,u16 y2,u16 x3,u16 y3,u16 fac);//显示校准信息
//电阻屏/电容屏 共用函数
u8 TP_Scan(u8 tp); //扫描
#endif
void CT_GPIO_Init(void);
u8 TP_Init(void); //初始化
#endif

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sdk/component/soc/realtek/amebad/verification/mem/flash_runcode_patch.patch Normal file
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@ -0,0 +1,163 @@
diff -ru sdk_20150303/component/soc/realtek/8711b/cmsis/device/TOOLCHAIN_GCC_ARM/rlx8711B-symbol-rom_v02.ld sdk_20150209/component/soc/realtek/8711b/cmsis/device/TOOLCHAIN_GCC_ARM/rlx8711B-symbol-rom_v02.ld
--- sdk_20150303/component/soc/realtek/8711b/cmsis/device/TOOLCHAIN_GCC_ARM/rlx8711B-symbol-rom_v02.ld 2015-03-03 16:44:33.492769100 +0800
+++ sdk_20150209/component/soc/realtek/8711b/cmsis/device/TOOLCHAIN_GCC_ARM/rlx8711B-symbol-rom_v02.ld 2015-03-03 11:59:49.961404200 +0800
@@ -10,6 +10,7 @@
TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 65536
BD_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 455735
SDRAM_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
+ SPI_FLASH (rx) : ORIGIN = 0x98080000, LENGTH = 65536
}
@@ -109,6 +110,14 @@
} > SDRAM_RAM
+ .spi_flash.text :
+ {
+ __flash_text_start__ = .;
+ *(.spiflash.text*)
+ __flash_text_end__ = .;
+
+ } > SPI_FLASH
+
.heap :
{
__end__ = .;
diff -ru sdk_20150303/component/soc/realtek/8711b/fwlib/ram_lib/startup.c sdk_20150209/component/soc/realtek/8711b/fwlib/ram_lib/startup.c
--- sdk_20150303/component/soc/realtek/8711b/fwlib/ram_lib/startup.c 2015-03-03 16:44:38.992663500 +0800
+++ sdk_20150209/component/soc/realtek/8711b/fwlib/ram_lib/startup.c 2015-03-03 15:50:18.477141600 +0800
@@ -966,7 +966,7 @@
(VOID*)xPortSysTickHandler);
#endif
#endif
- SpicDisableRtl8195A(); // turn off SPIC for power saving
+ //SpicDisableRtl8195A(); // turn off SPIC for power saving
_AppStart();
diff -ru sdk_20150303/component/soc/realtek/8711b/fwlib/test/mem/Makefile sdk_20150209/component/soc/realtek/8711b/fwlib/test/mem/Makefile
--- sdk_20150303/component/soc/realtek/8711b/fwlib/test/mem/Makefile 2015-03-03 16:44:50.867435500 +0800
+++ sdk_20150209/component/soc/realtek/8711b/fwlib/test/mem/Makefile 2015-03-03 16:20:00.880418800 +0800
@@ -9,7 +9,7 @@
#*****************************************************************************#
# Object FILE LIST #
#*****************************************************************************#
-OBJS = sram_access_test.o
+OBJS = sram_access_test.o flash_runcode_test.o
#*****************************************************************************#
# RULES TO GENERATE TARGETS #
diff -ru sdk_20150303/component/soc/realtek/8711b/fwlib/test/mem/sram_access_test.c sdk_20150209/component/soc/realtek/8711b/fwlib/test/mem/sram_access_test.c
--- sdk_20150303/component/soc/realtek/8711b/fwlib/test/mem/sram_access_test.c 2015-03-03 16:44:55.757966600 +0800
+++ sdk_20150209/component/soc/realtek/8711b/fwlib/test/mem/sram_access_test.c 2015-03-03 16:19:12.146979500 +0800
@@ -12,6 +12,11 @@
#include "hal_platform.h"
#include "hal_api.h"
+extern void
+RtlFlashRunCodeApp(
+ VOID
+);
+
typedef enum _SRAM_ACCESS_TYEP_{
ONE_BYTE_ACCESS,
TWO_BYTE_ACCESS,
@@ -44,6 +49,10 @@
DBG_8195A("SdrTestApp: Loop = 0x%08x \n",Loop);
+ if (Cmd[0] = 1) {
+ RtlFlashRunCodeApp();
+ }
+
//Set Sram type
//if (SramType < MAX_SRAM_TYPE) {
// HAL_PERI_ON_WRITE32(0x4,
只在 sdk_20150303/component/soc/realtek/8711b/misc/gnu_utility/flash_download/image 存在：.rtl_gdb_flash_write.txt.swp
diff -ru sdk_20150303/component/soc/realtek/8711b/misc/gnu_utility/flash_download/image/rtl_gdb_flash_write.txt sdk_20150209/component/soc/realtek/8711b/misc/gnu_utility/flash_download/image/rtl_gdb_flash_write.txt
--- sdk_20150303/component/soc/realtek/8711b/misc/gnu_utility/flash_download/image/rtl_gdb_flash_write.txt 2015-03-03 16:45:00.679747100 +0800
+++ sdk_20150209/component/soc/realtek/8711b/misc/gnu_utility/flash_download/image/rtl_gdb_flash_write.txt 2015-03-03 15:45:33.060746700 +0800
@@ -161,6 +161,57 @@
restore ./image/rtl8195a/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
c
+#Download Flash RunCode Start
+set $FlashFileSize = 0x80
+printf "FlashFileSize: %x\n",$FlashFileSize
+
+set $LoopNum2 = ($FlashFileSize / $FLASHDATBUFSIZE)
+printf "LoopNum2 = %x\n", $LoopNum2
+set $TailSize = ($FlashFileSize % $FLASHDATBUFSIZE)
+printf "TailSize = %x\n", $TailSize
+
+printf "global variables\n"
+
+set $FLASHDATSRC = 0x0
+set $FILESTARTADDR = 0X0
+set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
+
+#printf "...\n"
+set $FLASHDATSRC = FlashDatSrc
+printf "FlashDatSrc:%x\n", $FLASHDATSRC
+
+printf "FlashBlockWriteSize "
+set FlashBlockWriteSize = $FLASHDATBUFSIZE
+#p /x FlashBlockWriteSize
+printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
+
+printf "FlashAddrForWrite"
+set FlashAddrForWrite = 0x80000
+
+
+
+printf "Flash write start...\n"
+set $LoopCnt2 = 0
+while ($LoopCnt2 < $LoopNum2)
+ p /x FlashAddrForWrite
+ restore ./image/rtl8195a/ram_3.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
+ c
+
+ printf "FILEENDADDR"
+ p /x $FILEENDADDR
+ set FlashBlockWriteSize = $FLASHDATBUFSIZE
+ set FlashAddrForWrite = $FILEENDADDR
+ set $FILESTARTADDR = $FILEENDADDR
+ set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
+
+ set $LoopCnt2 = $LoopCnt2 + 0x01
+end
+
+set $FILEENDADDR = $FILESTARTADDR + $TailSize
+restore ./image/rtl8195a/ram_3.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
+c
+#Download Flash RunCode End
+
#Set complete flas
set FlashWriteComplete = 0x1
@@ -176,6 +227,9 @@
printf "end addr of dumping"
p /x $dumpendaddr
dump binary memory dump.bin $dumpstartaddr $dumpendaddr
+#Flash RunCode DumpStart
+dump binary memory dump_flash.bin 0x98080000 0x9808002C
+#Flash RunCode DumpEnd
delete
只在 sdk_20150303/project/realtek_amebaz_va0_gcc_verification/asdk 存在：.Makefile.swp
只在 sdk_20150303/project/realtek_amebaz_va0_gcc_verification/asdk/image/rtl8195a 存在：.target.asm.swp
diff -ru sdk_20150303/project/realtek_amebaz_va0_gcc_verification/asdk/Makefile sdk_20150209/project/realtek_amebaz_va0_gcc_verification/asdk/Makefile
--- sdk_20150303/project/realtek_amebaz_va0_gcc_verification/asdk/Makefile 2015-03-03 16:45:05.117161900 +0800
+++ sdk_20150209/project/realtek_amebaz_va0_gcc_verification/asdk/Makefile 2015-03-03 12:00:01.586181000 +0800
@@ -237,6 +237,9 @@
$(FROMELF) -j .image2.start.table -j .ram_image2.text -j .ram.data \
-Obinary $(IMAGE_TARGET_FOLDER)/target_pure.axf $(IMAGE_TARGET_FOLDER)/ram_2.bin
+ $(FROMELF) -j .spi_flash.text \
+ -Obinary $(IMAGE_TARGET_FOLDER)/target_pure.axf $(IMAGE_TARGET_FOLDER)/ram_3.bin
+
@echo "========== Image Info =========="
$(CC_SIZE) -A $(IMAGE_TARGET_FOLDER)/target.axf
$(CC_SIZE) -t $(IMAGE_TARGET_FOLDER)/target.axf

53
sdk/component/soc/realtek/amebad/verification/psram/rtl8721d_psram_test.h Normal file
View file

@ -0,0 +1,53 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8721D_PSRAM_TEST_SAL_H_
#define _RTL8721D_PSRAM_TEST_SAL_H_
// PSRAM debug output
#define PSRAM_PREFIX "RTL8195A[psram]: "
#define PSRAM_PREFIX_LVL " [PSRAM_DBG]: "
//#define CYPRESS_PSRAM
#define PSRAM_DEBUG_GPIO _PA_15
#ifdef CYPRESS_PSRAM
#define PSRAM_SIZE_BYTE (8*1024*1024)
#else
#define PSRAM_SIZE_BYTE (4*1024*1024)
#endif
typedef struct _SAL_PSRAM_MNGT_ADPT_ {
PCTL_InitTypeDef PCTL_InitStruct; //Pointer to PCTL initial data( HAL_I2C_INIT_DAT )
PCTL_TypeDef* PSRAMx; //Pointer to PCTL Device
} SAL_PSRAM_MNGT_ADPT, *PSAL_PSRAM_MNGT_ADPT;
typedef enum _PSRAM_VERI_ITEM_SAL_ {
PSRAM_INIT_TEST = 1,
PSRAM_MEMORY_RW = 2,
PSRAM_DMA_RW = 3,
PSRAM_DPIN_WR = 4,
PSRAM_CACHE_ENABLE = 5,
PSRAM_CACHE_DISABLE = 6,
PSRAM_POWER_TEST = 7,
PSRAM_REG_TEST = 8,
PSRAM_DEBUG_PORT = 9,
PSRAM_FT_TEST = 10,
}PSRAM_VERI_ITEM_SAL, *PPSRAM_VERI_ITEM_SAL;
typedef struct _PSRAM_VERI_PARA_SAL_ {
u32 VeriItem;
u32 VeriLoop;
u32 Verimode1;
u32 Verimode2;
u32 Verimode3;
}PSRAM_VERI_PARA_SAL,*PPSRAM_VERI_PARA_SAL;
#endif

39
sdk/component/soc/realtek/amebad/verification/secure/crypto/rtl8721d_crypto_test_secure.h Normal file
View file

@ -0,0 +1,39 @@
#ifndef __RTL8721D_CRYPTO_TEST_H__
#define __RTL8721D_CRYPTO_TEST_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#ifndef CRYPTO_MAX_MSG_LENGTH
#define CRYPTO_MAX_MSG_LENGTH 8192 //8192 // 18432 // 4096 //32768 // 64 // 16383
#endif
#define AUTH_NOCRYPTO ((u32)-1)
#define CRYPTO_NOAUTH ((u32)-1)
/** @defgroup CRYPTO_MODE_definitions
* @{
*/
#define CRYPTO_MS_TYPE_CIPHER (0)
#define CRYPTO_MS_TYPE_AUTH (1)
#define CRYPTO_MS_TYPE_MIX (2)
/**
* @}
*/
#define ERRNO_CRYPTO_TEST_ARG (-100)
#define ERRNO_CRYPTO_TEST_INIT (-200)
int throughput_test(u32 modetype, u32 cipher_type, u32 authtype, u32 loops);
int rtl_crypto_test(u16 argc, u8 *argv[]);
int vector_test_auth(uint32_t authtype);
int vector_test_cipher(uint32_t cipher_type);
#ifdef __cplusplus
}
#endif
#endif // __RTL8721D_CRYPTO_TEST_H__

115
sdk/component/soc/realtek/amebad/verification/secure/cryptoSimsecure.h Normal file
View file

@ -0,0 +1,115 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _CRYPTOSIM_H_
#define _CRYPTOSIM_H_
#include <stddef.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct ipsec_function{
void ( *crypto_sim_set_len)(int klen, int mlen, int ilen, int alen);
void ( *esp_sim_set)(const uint32_t mode, const unsigned char *Iv, const int initcount, const unsigned char* AAD);
void ( *rtl_crypto_auth_sim)(const uint32_t authtype, const unsigned char *Key, const unsigned char* Text, unsigned char *pDigest);
int (*rtl_crypto_esp_sim)(const unsigned char *Key, const unsigned char *Text, unsigned char *pResult, unsigned char *pTag);
int (*aead_chacha20_poly1305_enc)(unsigned char *out, const unsigned char *Text, const unsigned char *non, const unsigned char key[32]);
int (*aead_chacha20_poly1305_dec)(unsigned char *out, const unsigned char *Text, const unsigned char *non, const unsigned char key[32]);
}ipsec_func_ns;
// AES
#define SWDECRYPT_ECB_AES 0x20
#define SWDECRYPT_CBC_AES 0x21
#define SWDECRYPT_CFB_AES 0x22
#define SWDECRYPT_OFB_AES 0x23
#define SWDECRYPT_CTR_AES 0x24
#define SWDECRYPT_GCM_AES 0x28
#define SWENCRYPT_ECB_AES 0xa0
#define SWENCRYPT_CBC_AES 0xa1
#define SWENCRYPT_CFB_AES 0xa2
#define SWENCRYPT_OFB_AES 0xa3
#define SWENCRYPT_CTR_AES 0xa4
#define SWENCRYPT_GCM_AES 0xa8
// DES
#define SWDECRYPT_ECB_DES 0x00
#define SWDECRYPT_CBC_DES 0x01
#define SWDECRYPT_CFB_DES 0x02
#define SWDECRYPT_OFB_DES 0x03
#define SWDECRYPT_CTR_DES 0x04
#define SWDECRYPT_ECB_3DES 0x10
#define SWDECRYPT_CBC_3DES 0x11
#define SWDECRYPT_CFB_3DES 0x12
#define SWDECRYPT_OFB_3DES 0x13
#define SWDECRYPT_CTR_3DES 0x14
#define SWENCRYPT_ECB_DES 0x80
#define SWENCRYPT_CBC_DES 0x81
#define SWENCRYPT_CFB_DES 0x82
#define SWENCRYPT_OFB_DES 0x83
#define SWENCRYPT_CTR_DES 0x84
#define SWENCRYPT_ECB_3DES 0x90
#define SWENCRYPT_CBC_3DES 0x91
#define SWENCRYPT_CFB_3DES 0x92
#define SWENCRYPT_OFB_3DES 0x93
#define SWENCRYPT_CTR_3DES 0x94
// chacha
void CRYPTO_sim_chacha_20(unsigned char *out,
const unsigned char *in, size_t in_len,
const unsigned char key[32],
const unsigned char nonce[8],
size_t counter);
// poly1305
//
struct poly1305_state_st {
uint32_t r0,r1,r2,r3,r4;
uint32_t s1,s2,s3,s4;
uint32_t h0,h1,h2,h3,h4;
unsigned char buf[16];
unsigned int buf_used;
unsigned char key[16];
};
typedef struct poly1305_state_st poly1305_state;
void CRYPTO_sim_poly1305_init(poly1305_state *state, const unsigned char key[32]);
void CRYPTO_sim_poly1305_update(poly1305_state *state, const unsigned char *in, size_t in_len);
void CRYPTO_sim_poly1305_finish(poly1305_state *state, unsigned char mac[16]);
#define CHACHA20_NONCE_LEN 8
#define POLY1305_TAG_LEN 16
#define CHACHA20POLY1305_KEY_LEN 32
int aead_chacha20_poly1305_enc(unsigned char *out,
const unsigned char *Text, const unsigned char *non, const unsigned char key[CHACHA20POLY1305_KEY_LEN]);
int aead_chacha20_poly1305_dec(unsigned char *out,
const unsigned char *Text, const unsigned char *non, const unsigned char key[CHACHA20POLY1305_KEY_LEN]);
void rtl_crypto_auth_sim(const uint32_t authtype,
const unsigned char *Key, const unsigned char* Text,
unsigned char *pDigest);
int rtl_crypto_esp_sim(const unsigned char *Key, const unsigned char *Text, unsigned char *pResult, unsigned char *pTag);
void crypto_sim_set_len(int klen, int mlen, int ilen, int alen);
void esp_sim_set(const uint32_t mode, const unsigned char *Iv, const int initcount, const unsigned char* AAD);
#ifdef __cplusplus
}
#endif
#endif

93
sdk/component/soc/realtek/amebad/verification/sgpio/rtl8721d_sgpio_test.h Normal file
View file

@ -0,0 +1,93 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8195A_SGPIO_TEST_H_
#define _RTL8195A_SGPIO_TEST_H_
// SGPIO debug output
#define SGPIO_PREFIX "RTL8195A[sgpio]: "
#define SGPIO_PREFIX_LVL " [sgpio_DBG]: "
#define SGPIO_VERI_DATA_LEN_DMA 32*2
#undef SGPIO_APP_TEST
typedef enum _SGPIO_VERI_PROC_CMD_SAL_ {
SGPIO_TEST_ITEMS_SAL = 0,
SGPIO_TEST_ALL_SAL = 1,
}SGPIO_VERI_PROC_CMD_SAL, *PSGPIO_VERI_PROC_CMD_SAL;
typedef enum _SGPIO_VERI_ITEM_SAL_ {
SGPIO_TEST_SIMPLE_RX = 1,
SGPIO_TEST_SIMPLE_MUL = 2,
SGPIO_TEST_CAPTURE = 3,
SGPIO_TEST_TX = 4,
SGPIO_TEST_DALLAS = 5,
SGPIO_TEST_DHT22 = 6,
SGPIO_TEST_PIR = 7,
}SGPIO_VERI_ITEM_SAL, *PSGPIO_VERI_ITEM_SAL;
typedef enum _SGPIO_VERI_ITEMS_SAL_ {
SGPIO_SIMPLE_RX_BEGIN = 1,
SGPIO_SIMPLE_RX_STOP = 2,
SGPIO_SIMPLE_MUL_BEGIN = 3,
SGPIO_SIMPLE_MUL_STOP = 4,
SGPIO_CAPTURE_EDGE = 5,
SGPIO_CAPTURE_COMPARE = 6,
SGPIO_TX_BASIC = 7,
SGPIO_TX_WAVEFORM = 8,
SGPIO_TX_FIFO = 9,
}SGPIO_VERI_ITEMS_SAL, *PSGPIO_VERI_ITEMS_SAL;
typedef enum _SGPIO_TX_MODE_
{
SGPIO_TX_REGISTER_MODE = 0x00,
SGPIO_TX_FIFO_MODE = 0x01,
SGPIO_TX_DMA_MODE = 0x02,
} SGPIO_TX_MODE, *PSGPIO_TX_MODE;
typedef enum _SGPIO_TEST_OBJ_
{
SGPIO_TEST_TO_DALLAS = 0x01,
SGPIO_TEST_TO_DHT22 = 0x02,
SGPIO_TEST_TO_PIR = 0x03,
} SGPIO_TEST_OBJ, *PSGPIO_TEST_OBJ;
// SGPIO device status
typedef enum _SGPIO_Device_STATUS_ {
SGPIO_STS_UNINITIAL = 0x00,
SGPIO_STS_INITIALIZED = 0x01,
SGPIO_STS_SLV_ACCESS = 0x02,
SGPIO_STS_NO_SLV = 0x03,
SGPIO_STS_TRX_READY = 0x04,
SGPIO_STS_CAP = 0x05,
SGPIO_STS_TX_READY = 0x06,
SGPIO_STS_RX_READY = 0x07,
}SGPIO_Device_STATUS, *PSGPIO_Device_STATUS;
typedef struct _HAL_SGPIO_ADAPTER_ {
SGPIO_TypeDef* SGPIOx;
IRQn_Type IrqNum;
u32 TxDataMode;
GDMA_InitTypeDef SGPIOGdmaInitStruct; //Pointer to GDMA_InitTypeDef
volatile u8 DevSts;
u8 TestObj;
}HAL_SGPIO_ADAPTER, *PHAL_SGPIO_ADAPTER;
typedef struct _SGPIO_VERI_PARA_SAL_ {
u32 VeriItem;
u32 VeriLoop;
u32 VeriPara1;
u32 VeriPara2;
u32 VeriPara3;
}SGPIO_VERI_PARA_SAL,*PSGPIO_VERI_PARA_SAL;
#endif

99
sdk/component/soc/realtek/amebad/verification/spi_communication/back_for_ameba1_test/rtl8195a_ssi_main.h Normal file
View file

@ -0,0 +1,99 @@
#ifndef _RTL8195A_SSI_MAIN_H_
#define _RTL8195A_SSI_MAIN_H_
/* Function Prototype */
extern void *
_memset( void *s, int c, SIZE_T n );
typedef struct _SSI_PARAMETER_ {
u8 Para0;
u8 Para1;
u8 Para2;
u8 Para3;
u8 Para4;
u8 Para5;
u8 Para6;
u8 Para7;
u8 Para8;
u8 Para9;
}SSI_PARAMETER, *PSSI_PARAMETER;
#if 0
/**
* SPI Example Pin Map
*/
// SPI0 (TestChip: S2) (MPChip: S1)
#define SPI0_MOSI PC_2
#define SPI0_MISO PC_3
#define SPI0_SCLK PC_1
#define SPI0_CS PC_0
// SPI1 (S1)
#define SPI1_MOSI PB_6
#define SPI1_MISO PB_7
#define SPI1_SCLK PB_5
#define SPI1_CS PB_4
// SPI2 (S2)
#define SPI2_MOSI PD_2
#define SPI2_MISO PD_3
#define SPI2_SCLK PD_1
#define SPI2_CS PD_0
#endif
#if 1 // MP verify (SPI1, SPI0) //Fail
// SPI1 (S1)
/*
#define SPI1_MOSI PB_6
#define SPI1_MISO PB_7
#define SPI1_SCLK PB_5
#define SPI1_CS PB_4
*/
// SPI1 (S2)
#define SPI1_MOSI PA_1
#define SPI1_MISO PA_0
#define SPI1_SCLK PA_2
#define SPI1_CS PA_4
// SPI0 (S1)
#define SPI0_MOSI PC_2
#define SPI0_MISO PC_3
#define SPI0_SCLK PC_1
#define SPI0_CS PC_0
#endif
#if 0 // MP verify (SPI2, SPI0)
// SPI2 (S2)
#define SPI2_MOSI PD_2
#define SPI2_MISO PD_3
#define SPI2_SCLK PD_1
#define SPI2_CS PD_0
// SPI0 (S1) // EEPROM
#define SPI0_MOSI PC_2
#define SPI0_MISO PC_3
#define SPI0_SCLK PC_1
#define SPI0_CS PC_0
#endif
#if 0 // MP verify (SPI2, SPI0)
// SPI2 (S2)
#define SPI2_MOSI PD_2
#define SPI2_MISO PD_3
#define SPI2_SCLK PD_1
#define SPI2_CS PD_0
// SPI0 (S0) // J-Tag
#define SPI0_MOSI PE_2
#define SPI0_MISO PE_3
#define SPI0_SCLK PE_1
#define SPI0_CS PE_0
#endif
#endif

51
sdk/component/soc/realtek/amebad/verification/spi_communication/hal_ssi_test.h Normal file
View file

@ -0,0 +1,51 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_SSI_H_
#define _HAL_SSI_H_
#include "ameba_soc.h"
#define SPI_DMA_RX_EN (1<<0)
#define SPI_DMA_TX_EN (1<<1)
typedef struct {
GDMA_InitTypeDef SSITxGdmaInitStruct;
GDMA_InitTypeDef SSIRxGdmaInitStruct;
IRQn_Type IrqNum;
SPI_TypeDef *spi_dev;
void (*RxCompCallback)(void *Para);
void *RxCompCbPara;
void (*TxCompCallback)(void *Para);
void *TxCompCbPara;
void *RxData;
void *TxData;
u32 RxLength;
u32 TxLength;
u32 Index;
u32 Role;
/* mbed var */
u32 dma_en;
}HAL_SSI_ADAPTOR, *PHAL_SSI_ADAPTOR;
#ifdef CONFIG_GDMA_EN
u32 HalSsiDmaSend(void *Adapter, u8 *pTxData, u32 Length);
u32 HalSsiDmaRecv(void *Adapter, u8 *pRxData, u32 Length);
#endif // end of "#ifdef CONFIG_GDMA_EN"
// ROM code patch
u32 HalSsiIntRead(void *Adapter, void *RxData, u32 Length);
u32 HalSsiIntWrite(void *Adapter, u8 *pTxData, u32 Length);
u32 HalSsiInterruptHandle(void *Adaptor);
#endif

47
sdk/component/soc/realtek/amebad/verification/spi_communication/rtl8721d_ssi_test.h Normal file
View file

@ -0,0 +1,47 @@
#ifndef _RTL8195A_SSI_TEST_H_
#define _RTL8195A_SSI_TEST_H_
/*SPI Test Case*/
typedef enum _SSI_TEST_TYPE_
{
SSI_Master_LOOPBACK = 0, // 0
SSI_Master_TRX_POLL, // 1
SSI_Master_TRX_INTERRUPT, // 2
SSI_Master_TRX_DMA, // 3
SSI_Slave_TRX_POLL, // 4
SSI_Slave_TRX_INTERRUPT, // 5
SSI_Slave_TRX_DMA, // 6
SSI_Master_RX_ONLY, // 7
SSI_Slave_RX_INTERRUPT, // 8
SSI_Master_CS_SOFTWARE, // 9
SSI_MASTER_LONG_RUN, // 10
SSI_SLAVE_LONG_RUN, // 11
SSI_TT_BASIC_IO = 12, // 12
SSI_TT_INTERRUPT, // 13
SSI_TT_DMA_TO_TX, // 14
SSI_TT_RX_TO_DMA, // 15
SSI_TT_DMA_TX_TO_RX, // 16
SSI_MASTER_RX_INTERRUPT, // 17
SSI_MASTER_RX_TO_DMA, // 18
SSI_MASTER_TX_INTERRUPT, // 19
SSI_SLAVE_TX_INTERRUPT, // 20
SSI_MASTER_RX_ONLY, // 21
SSI_TT_TEST_ALL, // 22
SSI_MASTER_CS_SOFTWARE, // 23
OTHER_INTERFACE // 24
} SSI_TEST_TYPE, *PSSI_TEST_TYPE;
typedef enum _SSI_TEST_SRC_DATA_MODE_
{
SSI_TEST_SRCDATA_SEQ,
SSI_TEST_SRCDATA_RND
} SSI_TEST_SRC_DATA_MODE, *PSSI_TEST_SRC_DATA_MODE;
/* Function Prototype */
void SsiDBGPrint(u16 *pSrc, u16 *pDst, u32 Length);
BOOL SsiDataCompare(u16 *pSrc, u16 *pDst, u32 Length);
VOID SsiGenerateRandomTxData(u16 *pTxArray, u32 Length, u32 Mode, BOOL MICROWIRE);
#endif

25
sdk/component/soc/realtek/amebad/verification/spi_flash/rtl8721d_flash_N25Q00AA_patch.h Normal file
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@ -0,0 +1,25 @@
#ifndef _RTL8195A_FLASH_N25Q00AA_PATCH_H_
#define _RTL8195A_FLASH_N25Q00AA_PATCH_H_
#include "device.h"
typedef struct flash_s flash_t;
/**
* global data structure
*/
extern flash_t flash;
void FLASH_ReadFlagStatusReg(void);
void FLASH_SelectSegment(IN u8 SegNum);
void FLASH_EraseDie(u32 Address);
void N25Q00AA_erase_sector(flash_t *obj, u32 address);
void N25Q00AA_erase_block(flash_t *obj, u32 address);
void N25Q00AA_erase_chip(flash_t *obj);
u32 N25Q00AA_read_word(flash_t *obj, u32 address, u32 * data);
u32 N25Q00AA_write_word(flash_t *obj, u32 address, u32 data);
u32 N25Q00AA_stream_read(flash_t *obj, u32 address, u32 len, u8 * data);
u32 N25Q00AA_stream_write(flash_t *obj, u32 address, u32 len, u8 * data);
#endif

170
sdk/component/soc/realtek/amebad/verification/sys/boot_time_test.patch Normal file
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@ -0,0 +1,170 @@
--- startup_old.c 2015-03-24 10:28:37.411372900 +0800
+++ startup.c 2015-03-25 10:50:37.955858900 +0800
@@ -678,6 +678,7 @@
NewVectorTable[2] = (HAL_VECTOR_FUN)HalNMIHandler_Patch;
}
+#define BOOT_TIME_ANALYZE
//3 Image 1
HAL_RAM_TEXT_SECTION
VOID
@@ -685,6 +686,22 @@
VOID
)
{
+ u32 StartCount = 0;
+ u32 EndCount = 0;
+
+ u32 StartFlashCCount = 0;
+ u32 EndFlashCCount = 0;
+
+ u32 StartSdramCCount = 0;
+ u32 EndSdramCCount = 0;
+
+ u32 StartSramDLCount = 0;
+ u32 EndSramDLCount = 0;
+
+ u32 StartSdramDLCount = 0;
+ u32 EndSdramDLCount = 0;
+ StartCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+
#if defined ( __ICCARM__ )
__iar_data_init3();
#endif
@@ -750,9 +767,10 @@
#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM
SpicNVMCalLoadAll();
#endif
-
+ StartFlashCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
/* Jason Deng Modification 20141205 */
SYSCpuClkConfig((u8)(CPU_CLOCK_SEL_VALUE>>4));
+ EndFlashCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
StartupHalInitPlatformLogUart();
#endif //CONFIG_CP
@@ -780,7 +798,7 @@
#endif //CONFIG_MP
SpicFlashInit(SpicBitMode);
#endif //CONFIG_SPIC_MODULE
-
+ StartSdramCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
#ifdef CONFIG_SDR_EN
#if defined ( __ICCARM__ )
// SDRAM init from IAR Macro
@@ -789,7 +807,8 @@
#endif
SdrControllerInit();
#endif
-
+ EndSdramCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+
//3 2) Download image 2
// Get Default Image2 Information
Image2LoadAddr = (HAL_READ32(SPI_FLASH_BASE, 0x18)&0xFFFF) * 1024;
@@ -846,6 +865,7 @@
Image2Len = HAL_READ32(SPI_FLASH_BASE, Image2LoadAddr);
Image2Addr = HAL_READ32(SPI_FLASH_BASE, (Image2LoadAddr+0x4));
+ StartSramDLCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
//RtlConsolRom(1000);//each delay is 100us
DBG_8195A("Flash Image2:Addr 0x%x, Len %d, Load to SRAM 0x%x\n", Image2LoadAddr, Image2Len, Image2Addr);
for (ImageIndex = 0x10 + Image2LoadAddr; ImageIndex < (Image2Len + Image2LoadAddr + 0x10); ImageIndex = ImageIndex + 4) {
@@ -854,11 +874,14 @@
SpicImageIndex += 4;
}
+ EndSramDLCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+
#ifdef CONFIG_SDR_EN
u32 Image3LoadAddr;
u32 Image3Len;
u32 Image3Addr;
+ StartSdramDLCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
Image3LoadAddr = Image2LoadAddr + Image2Len+0x10;
Image3Len = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr);
Image3Addr = HAL_READ32(SPI_FLASH_BASE, Image3LoadAddr + 0x4);
@@ -878,6 +901,7 @@
SpicImageIndex += 4;
}
}
+ EndSdramDLCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
#endif
#endif
//3 3) Jump to image 2
@@ -887,7 +911,20 @@
DBG_8195A("Invalid Image2 Signature\n");
RtlConsolRom(1000);//each delay is 100us
}
-
+ EndCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+#ifdef BOOT_TIME_ANALYZE
+ DiagPrintf("\n\r %s:0x%08x:0x%08x(0x%08x)\n"
+ "flashC:(0x%08x)\n"
+ "SdramC:(0x%08x)\n"
+ "RamD:(0x%08x)\n"
+ "SdramD:(0x%08x)\n", __FUNCTION__,
+ 0xFFFFFFFF - StartCount, 0xFFFFFFFF - EndCount, (StartCount - EndCount),
+ (StartFlashCCount - EndFlashCCount),
+ (StartSdramCCount - EndSdramCCount),
+ (StartSramDLCount - EndSramDLCount),
+ (StartSdramDLCount - EndSdramDLCount)
+ );
+#endif
Image2EntryFun->RamStartFun();
}
@@ -936,8 +973,14 @@
//3 Imgae 2
INFRA_START_SECTION
VOID
-InfraStart(VOID)
-{
+InfraStart(VOID) //558*32 us = 17.856 ms
+{
+ u32 StartCount1 = 0;
+ u32 StartCount2 = 0;
+ u32 Start32KCCount = 0;
+ u32 End32KCCount = 0;
+
+ StartCount1 = HAL_TIMER_READ32(TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
#ifdef CONFIG_FPGA
HAL_WRITE32(0xE000ED00, 0x98, 0);
HAL_WRITE32(0xE000ED00, 0x9C, 0);
@@ -971,7 +1014,7 @@
//4 Ram Bss Iitial
u32 BssLen = (__bss_end__ - __bss_start__);
- _memset((void *) __bss_start__, 0, BssLen);
+ _memset((void *) __bss_start__, 0, BssLen);//24*32
#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM
SpicNVMCalLoadAll();
@@ -991,8 +1034,9 @@
#ifndef CONFIG_FPGA
#ifdef CONFIG_TIMER_MODULE
- Calibration32k();
-
+ Start32KCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+ Calibration32k();//534*32=17.088ms
+ End32KCCount = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
#ifdef CONFIG_WDG
#if WDG_Verify_Mode
WDGInit();
@@ -1042,6 +1086,14 @@
#endif
SpicDisableRtl8195A(); // turn off SPIC for power saving
+ StartCount2 = HAL_READ32(TIMER_REG_BASE, TIMER_INTERVAL + TIMER_CURRENT_VAL_OFF);
+#ifdef BOOT_TIME_ANALYZE
+ printf("\n\r InfraStart StartCount: 0x%x 0x%x (0x%x)\n"
+ "32K cali: 0x%x 0x%x (0x%x) \n",
+ 0xffffffff - StartCount1, 0xffffffff - StartCount2, (StartCount1 - StartCount2),
+ 0xffffffff - Start32KCCount, 0xffffffff - End32KCCount, (Start32KCCount - End32KCCount)
+ );
+#endif
_AppStart();
}

64
sdk/component/soc/realtek/amebad/verification/uart/hal_uart_test.h Normal file
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@ -0,0 +1,64 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_UART_H_
#define _HAL_UART_H_
#include "ameba_soc.h"
#include "rtl8721d_uart.h"
#define AmebaD_KM0_TEST 1
#ifdef AmebaD_KM0_TEST
#define TIMx TIMx_LP
#define TIMx_irq TIMx_irq_LP
#endif
/**
* RUART Configurations
*/
enum uart_transfer_mode{
POLL_BASED,
INT_BASED,
DMA_BASED
};
typedef struct _HAL_RUART_ADAPTER_ {
int TxCount; // how many byte to TX
int RxCount; // how many bytes to RX
u8 *pTxBuf;
u8 *pRxBuf;
u8 UartIndex;
/* for rx DMA timeout */
u32 last_dma_addr;
GDMA_InitTypeDef UARTTxGdmaInitStruct;
GDMA_InitTypeDef UARTRxGdmaInitStruct;
UART_InitTypeDef UART_InitStruct;
UART_TypeDef* UARTx;
IRQn_Type IrqNum;
VOID (*TxCompCallback)(VOID *para, int left_byte); // User Tx complete callback function
VOID (*RxCompCallback)(VOID *para, int left_byte); // User Rx complete callback function
VOID *TxCompCbPara; // the pointer argument for TxCompCbPara
VOID *RxCompCbPara; // the pointer argument for RxCompCallback
}HAL_RUART_ADAPTER, *PHAL_RUART_ADAPTER;
extern u32 HalRuartSend(PHAL_RUART_ADAPTER pHalRuartAdapter, u8 *pTxData, u32 Length, u8 mode);
extern u32 HalRuartRecv(PHAL_RUART_ADAPTER pHalRuartAdapter, u8 *pRxData, u32 Length, u8 mode);
extern void HalRuartDmaDeInitGTimer1ms(void);
void HalRuartDmaInitGTimer1ms(PHAL_RUART_ADAPTER pHalRuartAdapter, u32 Period);
u32 HalRuartIrqHandle(IN VOID *Data);
#endif

6
sdk/component/soc/realtek/amebad/verification/uart/rtl8721d_uart_test.h Normal file
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@ -0,0 +1,6 @@
#ifndef _RTL8721D_UART_TEST_H_
#define _RTL8721D_UART_TEST_H_
#include "hal_uart_test.h"
#endif

74
sdk/component/soc/realtek/amebad/verification/usb_otg/usb_verify_device.h Normal file
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@ -0,0 +1,74 @@
/*
* Ethernet gadget driver -- with CDC and non-CDC options
* Builds on hardware support for a full duplex link.
*
* CDC Ethernet is the standard USB solution for sending Ethernet frames
* using USB. Real hardware tends to use the same framing protocol but look
* different for control features. This driver strongly prefers to use
* this USB-IF standard as its open-systems interoperability solution;
* most host side USB stacks (except from Microsoft) support it.
*
* There's some hardware that can't talk CDC. We make that hardware
* implement a "minimalist" vendor-agnostic CDC core: same framing, but
* link-level setup only requires activating the configuration.
* Linux supports it, but other host operating systems may not.
* (This is a subset of CDC Ethernet.)
*
* A third option is also in use. Rather than CDC Ethernet, or something
* simpler, Microsoft pushes their own approach: RNDIS. The published
* RNDIS specs are ambiguous and appear to be incomplete, and are also
* needlessly complex.
*/
#ifndef __USB_VERIFY_DEVICE_H
#define __USB_VERIFY_DEVICE_H
#include "usb.h"
#include "usb_gadget.h"
#include "core/inc/usb_composite.h"
/*
* DESCRIPTORS ... most are static, but strings and (full) configuration
* descriptors are built on demand. For now we do either full CDC, or
* our simple subset, with RNDIS as an optional second configuration.
*
* RNDIS includes some CDC ACM descriptors ... like CDC Ethernet. But
* the class descriptors match a modem (they're ignored; it's really just
* Ethernet functionality), they don't need the NOP altsetting, and the
* status transfer endpoint isn't optional.
*/
#define STRING_MANUFACTURER 1
#define STRING_PRODUCT 2
#define STRING_SERIALNUMBER 3
#define STRING_DATA 4
/*
* This device advertises one configuration, eth_config, unless RNDIS
* is enabled (rndis_config) on hardware supporting at least two configs.
*
* NOTE: Controllers like superh_udc should probably be able to use
* an RNDIS-only configuration.
*
* FIXME define some higher-powered configurations to make it easier
* to recharge batteries ...
*/
#define DEV_CONFIG_VALUE 1
struct verify_dev{
struct usb_gadget *gadget;
struct usb_request *req; /* for control responses */
/* when configured, we have one of two configs:
* - source data (in to host) and sink it (out from host)
* - or loop it back (out from host back in to host)
*/
u8 config;
struct usb_ep *in_ep;
struct usb_ep *out_ep;
const struct usb_endpoint_descriptor *in, *out, *status;
struct usb_function func;
struct usb_request *reqin; /* for bulkin responses */
struct usb_request *reqout;
u8 running;
unsigned char *req_buffer;
};
#endif

214
sdk/component/soc/realtek/amebad/verification/usi_i2c/hal_usi_i2c_test.h Normal file
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@ -0,0 +1,214 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_USI_I2C_H_ //#ifndef _HAL_I2C_H_
#define _HAL_USI_I2C_H_
// USI I2C debug output
#define USI_I2C_PREFIX "RTL8195A[usi_i2c]: "
#define USI_I2C_PREFIX_LVL " [usi_i2c_DBG]: "
//================= I2C CONFIGURATION START ==================
// I2C SAL User Configuration Flags
#ifdef CONFIG_DEBUG_LOG
#define CONFIG_DEBUG_LOG_I2C_HAL 1
#define DBG_I2C_LOG_PERD 100
#ifdef CONFIG_DEBUG_LOG_I2C_HAL
#define I2CDBGLVL 0xFF
#endif
#endif
//======================================================
//================= I2C HAL END ===========================
//================= I2C SAL START ==========================
//I2C SAL Macros
//======================================================
// I2C SAL related enumerations
// I2C Extend Features
typedef enum _USI_I2C_EXD_SUPPORT_{
USI_I2C_EXD_USER_REG = 0x40, //BIT_6, Using User Register Address
USI_I2C_EXD_MTR_ADDR_RTY= 0x100, //BIT_8, Master retries to send start condition and Slave address when the slave doesn't ack
// the address.
USI_I2C_EXD_MTR_ADDR_UPD= 0x200, //BIT_9, Master dynamically updates slave address
USI_I2C_EXD_MTR_HOLD_BUS= 0x400, //BIT_10, Master doesn't generate STOP when the FIFO is empty. This would make Master hold
// the bus.
}USI_I2C_EXD_SUPPORT,*PUSI_I2C_EXD_SUPPORT;
// I2C operation type
typedef enum _USI_I2C_OP_TYPE_ {
USI_I2C_POLL_TYPE = 0x0,
USI_I2C_DMA_TYPE = 0x1,
USI_I2C_INTR_TYPE = 0x2,
}USI_I2C_OP_TYPE, *PUSI_I2C_OP_TYPE;
// I2C device status
typedef enum _USI_I2C_Device_STATUS_ {
USI_I2C_STS_UNINITIAL = 0x00,
USI_I2C_STS_INITIALIZED = 0x01,
USI_I2C_STS_IDLE = 0x02,
USI_I2C_STS_TX_READY = 0x03,
USI_I2C_STS_TX_ING = 0x04,
USI_I2C_STS_RX_READY = 0x05,
USI_I2C_STS_RX_ING = 0x06,
USI_I2C_STS_ERROR = 0x10,
USI_I2C_STS_TIMEOUT = 0x11,
}USI_I2C_Device_STATUS, *PUSI_I2C_Device_STATUS;
// I2C command type
typedef enum _USI_I2C_COMMAND_TYPE_ {
USI_I2C_WRITE_CMD = 0x0,
USI_I2C_READ_CMD = 0x1,
}USI_I2C_COMMAND_TYPE,*PUSI_I2C_COMMAND_TYPE;
// I2C STOP BIT
typedef enum _USI_I2C_STOP_TYPE_ {
USI_I2C_STOP_DIS = 0x0,
USI_I2C_STOP_EN = 0x1,
}I2C_USI_STOP_TYPE, *PI2C_STOP_TYPE;
// I2C error type
typedef enum _USI_I2C_ERR_TYPE_ {
USI_I2C_ERR_RX_UNDER = 0x01, //I2C RX FIFO Underflow
USI_I2C_ERR_RX_OVER = 0x02, //I2C RX FIFO Overflow
USI_I2C_ERR_TX_OVER = 0x04, //I2C TX FIFO Overflow
USI_I2C_ERR_TX_ABRT = 0x08, //I2C TX terminated
USI_I2C_ERR_SLV_TX_NACK = 0x10, //I2C slave transmission terminated by master NACK,
//but there are data in slave TX FIFO
USI_I2C_ERR_USER_REG_TO = 0x20,
USI_I2C_ERR_RX_CMD_TO = 0x21,
USI_I2C_ERR_RX_FF_TO = 0x22,
USI_I2C_ERR_TX_CMD_TO = 0x23,
USI_I2C_ERR_TX_FF_TO = 0x24,
USI_I2C_ERR_TX_ADD_TO = 0x25,
USI_I2C_ERR_RX_ADD_TO = 0x26,
USI_I2C_ERR_TX_TO_NOT_SET = 0x27,
USI_I2C_ERR_RX_TO_NOT_SET = 0x28,
}USI_I2C_ERR_TYPE, *PUSI_I2C_ERR_TYPE;
// I2C Time Out type
typedef enum _USI_I2C_TIMEOUT_TYPE_ {
USI_I2C_TIMEOOUT_DISABLE = 0x00,
USI_I2C_TIMEOOUT_ENDLESS = 0xFFFFFFFF,
}USI_I2C_TIMEOUT_TYPE, *PUSI_I2C_TIMEOUT_TYPE;
//======================================================
// SAL I2C related data structures
// I2C user callback adapter
typedef struct _SAL_USI_I2C_USERCB_ADPT_ {
VOID (*USERCB) (VOID *Data);
u32 USERData;
}SAL_USI_I2C_USERCB_ADPT, *PSAL_USI_I2C_USERCB_ADPT;
// I2C user callback structure
typedef struct _SAL_USI_I2C_USER_CB_ {
SAL_USI_I2C_USERCB_ADPT TXCCB; //I2C Transmit Complete Callback
SAL_USI_I2C_USERCB_ADPT RXCCB; //I2C Receive Complete Callback
SAL_USI_I2C_USERCB_ADPT RDREQCB; //I2C Read Request Callback
SAL_USI_I2C_USERCB_ADPT ERRCB; //I2C Error Callback
SAL_USI_I2C_USERCB_ADPT DMATXCCB; //I2C DMA Transmit Complete Callback
SAL_USI_I2C_USERCB_ADPT DMARXCCB; //I2C DMA Receive Complete Callback
SAL_USI_I2C_USERCB_ADPT GENCALLCB; //I2C General Call Callback
}SAL_USI_I2C_USER_CB, *PSAL_USI_I2C_USER_CB;
// I2C Transmit Buffer
typedef struct _SAL_USI_I2C_TRANSFER_BUF_ {
u16 DataLen; //I2C Transmfer Length
u16 TargetAddr; //I2C Target Address. It's only valid in Master Mode.
u32 RegAddr; //I2C Register Address. It's only valid in Master Mode.
u32 RSVD; //
u8 *pDataBuf; //I2C Transfer Buffer Pointer
}SAL_USI_I2C_TRANSFER_BUF,*PSAL_USI_I2C_TRANSFER_BUF;
//======================================================
// I2C SAL Function Prototypes
//================= I2C SAL MANAGEMENT START =================
// I2C SAL management macros
#define SAL_USER_CB_NUM (sizeof(SAL_USI_I2C_USER_CB) / sizeof(PSAL_USI_I2C_USERCB_ADPT))
//======================================================
//I2C SAL management adapter
typedef struct _SAL_USI_I2C_MNGT_ADPT_ {
USI_I2C_InitTypeDef HalInitDat; //Pointer to HAL I2C initial data( HAL_I2C_INIT_DAT )
USI_TypeDef* USIx; //Pointer to I2C Device
IRQn_Type IrqNum;
SAL_USI_I2C_USER_CB UserCB; //Pointer to SAL user callbacks (SAL_I2C_USER_CB )
volatile u32 MstRDCmdCnt; //Used for Master Read command count
GDMA_InitTypeDef I2CTxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
GDMA_InitTypeDef I2CRxGdmaInitStruct; //Pointer to GDMA_InitTypeDef
PSAL_USI_I2C_TRANSFER_BUF pTXBuf; //Pointer to I2C TX buffer
PSAL_USI_I2C_TRANSFER_BUF pRXBuf; //Pointer to I2C RX buffer
u32 TimeOut; //I2C IO Timeout count, in ms
u8 PinMux; //I2C pin mux seletion
u8 OpType; //I2C operation type selection
volatile u8 DevSts; //I2C device status
u32 I2CExd; //I2C extended options:
//bit 0: I2C RESTART supported,
// 0 for NOT supported,
// 1 for supported
//bit 1: I2C General Call supported
// 0 for NOT supported,
// 1 for supported
//bit 2: I2C START Byte supported
// 0 for NOT supported,
// 1 for supported
//bit 3: I2C Slave-No-Ack
// supported
// 0 for NOT supported,
// 1 for supported
//bit 4: I2C bus loading,
// 0 for 100pf,
// 1 for 400pf
//bit 5: I2C slave ack to General
// Call
//bit 6: I2C User register address
//bit 7: I2C 2-Byte User register
// address
//bit 8: I2C slave address no ack retry,
// It's only for Master mode,
// when slave doesn't ack the
// address
//bit 31~bit 8: Reserved
} SAL_USI_I2C_MNGT_ADPT, *PSAL_USI_I2C_MNGT_ADPT;
//======================================================
//SAL I2C management function prototype
HAL_Status RtkUSII2CInit(IN PSAL_USI_I2C_MNGT_ADPT pSalUSII2CMngtAdpt);
HAL_Status RtkUSII2CDeInit(IN PSAL_USI_I2C_MNGT_ADPT pSalUSII2CMngtAdpt);
HAL_Status RtkUSII2CSend(IN PSAL_USI_I2C_MNGT_ADPT pSalUSII2CMngtAdpt);
HAL_Status RtkUSII2CReceive(IN PSAL_USI_I2C_MNGT_ADPT pSalUSII2CMngtAdpt);
//================= I2C SAL END ===========================
//======================================================
extern VOID USII2CISRHandle(IN VOID *Data);
extern VOID USII2CTXGDMAISRHandle(IN VOID *Data);
extern VOID USII2CRXGDMAISRHandle(IN VOID *Data);
extern HAL_Status USII2CIsTimeout (IN u32 StartCount, IN u32 TimeoutCnt);
//======================================================
//================= I2C SAL MANAGEMENT END ==================
#endif //#ifndef _HAL_USI_I2C_H_

53
sdk/component/soc/realtek/amebad/verification/usi_i2c/rtl8721d_usi_i2c_test.h Normal file
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@ -0,0 +1,53 @@
/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTL8721D_USI_I2C_TEST_SAL_H_
#define _RTL8721D_USI_I2C_TEST_SAL_H_
#define USI_I2C_VERI_DATA_LEN_SAL 1024
#define USI_I2C_VERI_DMA_LEN_SAL 8
#define USI_I2C_VERI_RXBUF_LEN_SAL 32
#define USI_I2C_VERI_TXBUF_LEN_SAL 32
#define USI_I2C_VERI_PANT_CNT_SAL 6
#define USI_I2C_VERI_ACK_ADDR_SAL 0x23
#define USI_I2C_VERI_ACK_ADDR1_SAL 0x46
#define USI_I2C_VERI_USER_REG_ADDR_SAL 0x75
//#define USII2CMULTISLV
//#define ONESLV_MULTIMST_TEST
typedef enum _USI_I2C_VERI_ITEM_SAL_ {
USI_I2C_MASTER_TEST = 1,
USI_I2C_SLAVE_TEST = 2,
USI_I2C_GENERAL_CALL_TEST = 3,
USI_I2C_M_NULLDATA_TEST = 4,
USI_I2C_TEST_MultiMrtInit = 5,
USI_I2C_TEST_ALL_CASE = 10
}USI_I2C_VERI_ITEM_SAL, *PUSI_I2C_VERI_ITEM_SAL;
typedef struct _USI_I2C_VERI_PARA_SAL_ {
u32 VeriItem;
u32 VeriLoop;
u32 VeriDMA;
u32 VeriItem1;
u32 VeriItem2;
u8 *VeriPattern;
void *VeriDatSrc;
void *VeriDatDes;
u8 SpdMod;
u8 AddrMod;
}USI_I2C_VERI_PARA_SAL,*PUSI_I2C_VERI_PARA_SAL;
#endif

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sdk/component/soc/realtek/amebad/verification/usi_ssi/hal_usi_ssi_test.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_USI_SSI_H_
#define _HAL_USI_SSI_H_
#include "ameba_soc.h"
#define USI_SPI_DMA_RX_EN (1<<0)
#define USI_SPI_DMA_TX_EN (1<<1)
typedef struct {
GDMA_InitTypeDef SSITxGdmaInitStruct;
GDMA_InitTypeDef SSIRxGdmaInitStruct;
IRQn_Type IrqNum;
USI_TypeDef *usi_dev;
void (*RxCompCallback)(void *Para);
void *RxCompCbPara;
void (*TxCompCallback)(void *Para);
void *TxCompCbPara;
void *RxData;
void *TxData;
u32 RxLength;
u32 TxLength;
u32 Index;
u32 Role;
/* mbed var */
u32 dma_en;
}HAL_USISSI_ADAPTOR, *PHAL_USISSI_ADAPTOR;
#ifdef CONFIG_GDMA_EN
u32 HalUSISsiDmaSend(void *Adapter, u8 *pTxData, u32 Length);
u32 HalUSISsiDmaRecv(void *Adapter, u8 *pRxData, u32 Length);
#endif // end of "#ifdef CONFIG_GDMA_EN"
// ROM code patch
u32 HalUSISsiIntRead(void *Adapter, void *RxData, u32 Length);
u32 HalUSISsiIntWrite(void *Adapter, u8 *pTxData, u32 Length);
u32 HalUSISsiInterruptHandle(void *Adaptor);
#endif

41
sdk/component/soc/realtek/amebad/verification/usi_ssi/rtl8721d_usi_ssi_test.h Normal file
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#ifndef _RTL8721D_USI_SSI_TEST_H_
#define _RTL8721D_USI_SSI_TEST_H_
/*SPI Test Case*/
typedef enum _USI_SSI_TEST_TYPE_
{
USI_SSI_Master_LOOPBACK,
USI_SSI_Master_TRX_POLL,
USI_SSI_Master_TRX_INTERRUPT,
USI_SSI_Master_TRX_DMA,
USI_SSI_Slave_TRX_POLL,
USI_SSI_Slave_TRX_INTERRUPT,
USI_SSI_Slave_TRX_DMA,
USI_SSI_Master_RX_ONLY,
USI_SSI_Slave_RX_INTERRUPT,
USI_SSI_MASTER_CS_SOFTWARE_NEW,
USI_SSI_MASTER_LONG_RUN,
USI_SSI_SLAVE_LONG_RUN,
USI_SSI_TT_BASIC_IO,
USI_SSI_TT_INTERRUPT,
USI_SSI_TT_DMA_TO_TX,
USI_SSI_TT_RX_TO_DMA,
USI_SSI_TT_DMA_TX_TO_RX,
USI_SSI_MASTER_RX_INTERRUPT,
USI_SSI_MASTER_RX_TO_DMA,
USI_SSI_MASTER_TX_INTERRUPT,
USI_SSI_SLAVE_TX_INTERRUPT,
USI_SSI_MASTER_RX_ONLY,
USI_SSI_TT_TEST_ALL,
USI_SSI_MASTER_CS_SOFTWARE,
USI_SSI_OTHER_INTERFACE
} USI_SSI_TEST_TYPE, *PUSI_SSI_TEST_TYPE;
typedef enum _USI_SSI_TEST_SRC_DATA_MODE_
{
USI_SSI_TEST_SRCDATA_SEQ,
USI_SSI_TEST_SRCDATA_RND
} USI_SSI_TEST_SRC_DATA_MODE, *PUSI_SSI_TEST_SRC_DATA_MODE;
#endif

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sdk/component/soc/realtek/amebad/verification/usi_uart/hal_usi_uart_test.h Normal file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _HAL_UART_H_
#define _HAL_UART_H_
#include "rtl8721d_usi_uart.h"
/**
* RUART Configurations
*/
enum uart_transfer_mode{
POLL_BASED,
INT_BASED,
DMA_BASED
};
typedef struct _HAL_RUART_ADAPTER_ {
int TxCount; // how many byte to TX
int RxCount; // how many bytes to RX
u8 *pTxBuf;
u8 *pRxBuf;
u8 UsiIndex;
/* for rx DMA timeout */
u32 last_dma_addr;
GDMA_InitTypeDef USIUARTTxGdmaInitStruct;
GDMA_InitTypeDef USIUARTRxGdmaInitStruct;
USI_UARTInitTypeDef USI_UARTInitStruct;
USI_TypeDef* USIx;
IRQn_Type IrqNum;
VOID (*TxCompCallback)(VOID *para, int left_byte); // User Tx complete callback function
VOID (*RxCompCallback)(VOID *para, int left_byte); // User Rx complete callback function
VOID *TxCompCbPara; // the pointer argument for TxCompCbPara
VOID *RxCompCbPara; // the pointer argument for RxCompCallback
}HAL_USIRUART_ADAPTER, *PHAL_USIRUART_ADAPTER;
extern u32 HalUSIRuartSend(PHAL_USIRUART_ADAPTER pHalRuartAdapter, u8 *pTxData, u32 Length, u8 mode);
extern u32 HalUSIRuartRecv(PHAL_USIRUART_ADAPTER pHalRuartAdapter, u8 *pRxData, u32 Length, u8 mode);
extern void HalUSIRuartDmaDeInitGTimer1ms(void);
void HalUSIRuartDmaInitGTimer1ms(PHAL_USIRUART_ADAPTER pHalRuartAdapter, u32 Period);
u32 HalUSIRuartIrqHandle(IN VOID *Data);
#endif

6
sdk/component/soc/realtek/amebad/verification/usi_uart/rtl8721d_usi_uart_test.h Normal file
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#ifndef _RTL8721D_LCDC_TEST_H_
#define _RTL8721D_LCDC_TEST_H_
#define LCDC_TEST_CNT 1000
#endif