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29 lines
1.1 KiB
Makefile
29 lines
1.1 KiB
Makefile
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include $(MAKE_INCLUDE_GEN)
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.PHONY: all clean
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#*****************************************************************************#
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# Object FILE LIST #
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#*****************************************************************************#
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OBJS =
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#*****************************************************************************#
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# Dependency #
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#*****************************************************************************#
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-include $(OBJS:.o=.d)
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#*****************************************************************************#
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# RULES TO GENERATE TARGETS #
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#*****************************************************************************#
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# Define the Rules to build the core targets
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all: CORE_TARGETS
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make -C src all
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#*****************************************************************************#
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# GENERATE OBJECT FILE
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#*****************************************************************************#
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CORE_TARGETS: $(OBJS)
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