diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_misc.h b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_misc.h index b8516ea..040cd5d 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_misc.h +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/hal_misc.h @@ -20,7 +20,7 @@ #define CHIP_ID_8710AM 0xFA enum _HAL_RESET_REASON{ - REASON_DEFAULT_RST = 0, /**< normal startup by power on */ + REASON_DEFAULT_RST = 0, /**< normal startup by power on */ REASON_WDT_RST, /**< hardware watch dog reset */ REASON_EXCEPTION_RST, /**< exception reset, GPIO status won't change */ REASON_SOFT_WDT_RST, /**< software watch dog reset, GPIO status won't change */ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c index 45fb82a..98a84ed 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c @@ -230,19 +230,19 @@ LOCAL int BOOT_RAM_TEXT_SECTION SetSpicBitMode(uint8 BitMode) { // Test Read Pattern if(!SpicCmpDataForCalibrationRtl8195A()) { FLASH_DDL_FCTRL(0x31); // SPI_DLY_CTRL_ADDR [7:0] - for(uint8 i = 1; i < 4; i++) { - for(uint8 x = 0; x < 63; x++) { + for(uint8 BaudRate = 1; BaudRate < 4; BaudRate++) { + for(uint8 RdDummyCyle = 0; RdDummyCyle < 63; RdDummyCyle++) { // Disable SPI_FLASH User Mode HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0); - HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, (HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH) & 0xFFFF0000) | x); - HAL_SPI_WRITE32(REG_SPIC_BAUDR, i); + HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH, (HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH) & 0xFFFF0000) | RdDummyCyle); + HAL_SPI_WRITE32(REG_SPIC_BAUDR, BaudRate); // Enable SPI_FLASH User Mode HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN); // HAL_SPI_WRITE32(REG_SPIC_FLUSH_FIFO, 1); if(SpicCmpDataForCalibrationRtl8195A()) { - DiagPrintf("Spic reinit %d:%d\n", i, x); - pspic->BaudRate = i; - pspic->RdDummyCyle = x; + DiagPrintf("Spic reinit %d:%d\n", BaudRate, RdDummyCyle); + pspic->BaudRate = BaudRate; + pspic->RdDummyCyle = RdDummyCyle; pspic->DelayLine = 0x31; pspic->Mode.Valid = 1; return 1; @@ -532,6 +532,7 @@ LOCAL uint8 BOOT_RAM_TEXT_SECTION IsForceLoadDefaultImg2(void) { // _pHAL_Gpio_Adapter->IrqHandle.IrqFun = NULL; return result; } + /* RTL Console ROM */ LOCAL void BOOT_RAM_TEXT_SECTION RtlConsolRam(void) { // DiagPrintf("\r\nRTL Console ROM\r\n"); @@ -556,7 +557,6 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) { DBG_8195A("\r===== Enter FLASH-Boot ====\n"); else DBG_8195A("\r===== Enter SRAM-Boot %d ====\n", flg); - #if CONFIG_DEBUG_LOG > 1 DBG_8195A("CPU CLK: %d Hz, SOC FUNC EN: %p\r\n", HalGetCpuClk(), HAL_PERI_ON_READ32(REG_SOC_FUNC_EN)); @@ -604,12 +604,15 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) { #endif // test HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); }; + if (!flg) loadUserImges(IsForceLoadDefaultImg2() + 1); + if (_strcmp((const char *) &__image2_validate_code__, IMG2_SIGN_TXT)) { DBG_8195A("Invalid Image Signature!\n"); RtlConsolRam(); } + DBG_8195A("Img Sign: %s, Go @ 0x%08x\r\n", &__image2_validate_code__, __image2_entry_func__); __image2_entry_func__(); diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c index ee68e4a..209310d 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c @@ -18,25 +18,24 @@ #include "wifi_conf.h" #include "rtl_consol.h" -//#define INFRA_START_SECTION __attribute__((section(".infra.ram.start"))) - //------------------------------------------------------------------------- // Function declarations void InfraStart(void); -extern void HalWdgIntrHandle(void); +//extern void HalWdgIntrHandle(void); extern void xPortPendSVHandler(void); extern void xPortSysTickHandler(void); extern void vPortSVCHandler(void); extern void rtl_libc_init(void); //extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID) -void HalNMIHandler_Patch(void); +//void HalNMIHandler_Patch(void); void SDIO_Device_Off(void); -void VectorTableOverrideRtl8195A(u32 StackP); +//void VectorTableOverrideRtl8195A(u32 StackP); void SYSPlatformInit(void); //------------------------------------------------------------------------- // Data declarations extern u8 __bss_start__, __bss_end__; +extern const unsigned char cus_sig[32]; // images name //extern HAL_TIMER_OP HalTimerOp; IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = @@ -49,11 +48,6 @@ void HalNMIHandler_Patch(void) { if ( HAL_READ32(VENDOR_REG_BASE, 0) < 0) HalWdgIntrHandle(); // ROM: HalWdgIntrHandle = 0x3485; } - -//----- VectorTableOverrideRtl8195A -void INFRA_START_SECTION VectorTableOverrideRtl8195A(u32 StackP) { - NewVectorTable[2] = HalNMIHandler_Patch; -} */ /* @@ -65,37 +59,6 @@ LOCAL void INFRA_START_SECTION loguart_wait_tx_fifo_empty(void) { while((!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)) && x--); } -//----- SYSPlatformInit -void INFRA_START_SECTION SYSPlatformInit(void) { - HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, - (HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0) - & (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04))) - | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 - HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, - (HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1) - & (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1))) - | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; -/* - if(HalGetCpuClk() != PLATFORM_CLOCK) { - //----- CLK CPU - loguart_wait_tx_fifo_empty(); // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! -#if CPU_CLOCK_SEL_DIV5_3 - // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); - *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 -#else - // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz - *((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); -#endif // CPU_CLOCK_SEL_DIV5_3 - //----- System - VectorTableInitRtl8195A(STACK_TOP); // 0x1FFFFFFC - HalInitPlatformLogUartV02(); // Show ""... :( - HalInitPlatformTimerV02(); - }; -*/ -} - //----- SDIO_Device_Off void INFRA_START_SECTION SDIO_Device_Off(void) { HAL_PERI_ON_WRITE32(REG_PESOC_HCI_CLK_CTRL0, @@ -109,14 +72,24 @@ void INFRA_START_SECTION SDIO_Device_Off(void) { & (~(BIT_HCI_SDIOD_PIN_EN))); } -__weak void __low_level_init(void) { - // weak function +//----- SYSPlatformInit +void INFRA_START_SECTION SYSPlatformInit(void) { + HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, + (HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0) + & (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04))) + | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 + HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, + (HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1) + & (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1))) + | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; } -// weak main function ! -__weak int main(void) { - HalPinCtrlRtl8195A(JTAG, 0, 1); +// weak __low_level_init function! +__weak void __low_level_init(void) { +} +// weak main function! +__weak int main(void) { DiagPrintf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n"); while (pUartLogCtl->ExecuteEsc != 1); pUartLogCtl->RevdNo = 0; @@ -131,28 +104,41 @@ __weak int main(void) { return 0; } -extern const unsigned char cus_sig[32]; //----- InfraStart void INFRA_START_SECTION InfraStart(void) { // NewVectorTable[2] = HalNMIHandler_Patch; DBG_8195A("===== Enter Image: %s ====\n", cus_sig); - // ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) +// ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__); rtl_libc_init(); // ROM Lib C init (rtl_printf!) -//- Должно быть в boot +// SYSPlatformInit(); +// SDIO_Device_Off(); + //- Должно быть в boot extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter; memset(&gBoot_Gpio_Adapter, 0, sizeof(gBoot_Gpio_Adapter)); _pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter; - SDIO_Device_Off(); - SYSPlatformInit(); - HalTimerOpInit_Patch((VOID*) (&HalTimerOp)); -//- + VectorTableInitRtl8195A(STACK_TOP); // 0x1FFFFFFC + loguart_wait_tx_fifo_empty(); // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! +#if 1 // if set CLK CPU + if(HalGetCpuClk() != PLATFORM_CLOCK) { + //----- CLK CPU +#if CPU_CLOCK_SEL_DIV5_3 + // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); + *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 +#else + // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz + *((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); +#endif // CPU_CLOCK_SEL_DIV5_3 + }; +#endif + PSHalInitPlatformLogUart(); // HalInitPlatformLogUartV02(); // Show ""... :( + HalReInitPlatformTimer(); // HalInitPlatformTimerV02(); HalTimerOpInit_Patch((VOID*) (&HalTimerOp)); SystemCoreClockUpdate(); En32KCalibration(); -#if CONFIG_DEBUG_LOG > 2 - DBG_8195A("\rCPU CLK: %d Hz, SOC FUNC EN: %p\r\n", HalGetCpuClk(), HAL_PERI_ON_READ32(REG_SOC_FUNC_EN)); -#endif + //---- Spic // _memset(SpicInitParaAllClk, 0, sizeof(SpicInitParaAllClk)); *(uint32 *)(&SpicInitParaAllClk[0][0].BaudRate) = 0x01310202; // patch *(uint32 *)(&SpicInitParaAllClk[1][0].BaudRate) = 0x11311301; // patch @@ -172,6 +158,7 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter; }; */ // SpicFlashInitRtl8195A(SpicDualBitMode); // SpicReadIDRtl8195A(); SpicDualBitMode + //---- SDRAM uint8 ChipId = HalGetChipId(); if (ChipId >= CHIP_ID_8195AM) { #ifdef CONFIG_SDR_EN @@ -195,17 +182,26 @@ extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter; LDO25M_CTRL(OFF); HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Off }; + //----- Close Flash SPI_FLASH_PIN_FCTRL(OFF); + InitSoCPM(); VectorTableInitForOSRtl8195A(&vPortSVCHandler, &xPortPendSVHandler, &xPortSysTickHandler); + +#if CONFIG_DEBUG_LOG > 4 + DBG_8195A("\rSet CPU CLK: %d Hz, SOC FUNC EN: %p\r\n", HalGetCpuClk(), HAL_PERI_ON_READ32(REG_SOC_FUNC_EN)); +#endif + // force SP align to 8 byte not 4 byte (initial SP is 4 byte align) __asm( "mov r0, sp\n" "bic r0, r0, #7\n" "mov sp, r0\n" ); + __low_level_init(); + main(); } diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_gpio.h b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_gpio.h index 0acf5bf..30f25fa 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_gpio.h +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_gpio.h @@ -103,7 +103,7 @@ typedef enum typedef struct { GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. */ GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins. */ - GPIOIT_LevelType GPIO_ITTrigger; /**< Interrupt mode is level or edge trigger */ + GPIOIT_LevelType GPIO_ITTrigger; /**< Interrupt mode is level or edge trigger */ GPIOIT_PolarityType GPIO_ITPolarity; /**< Interrupt mode is high or low active trigger */ GPIOIT_DebounceType GPIO_ITDebounce; /**< Enable or disable de-bounce for interrupt */ u32 GPIO_Pin; // Pin: [7:5]: port number, [4:0]: pin number diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 514ff01..a24933e 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin index cfabfa3..7e5cdac 100644 Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin index 3490326..c4ef868 100644 Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin index db370c1..c4ea102 100644 Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index 665f37d..bc59978 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/build/obj/build.nmap b/build/obj/build.nmap index 6628a2d..a2a8374 100644 --- a/build/obj/build.nmap +++ b/build/obj/build.nmap @@ -811,2372 +811,2374 @@ 10006004 D RAM_IMG2_VALID_PATTEN 10006004 D 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stop_ap_mode -1001c780 T rtw_generate_bcn_ie -1001caa4 T _rtw_init_evt_priv -1001cab6 T _rtw_free_cmd_priv -1001cac0 T _rtw_enqueue_cmd -1001caec T _rtw_dequeue_cmd -1001cb20 T _rtw_observequeue_cmd -1001cb34 T rtw_init_cmd_priv -1001cb3e T rtw_init_evt_priv -1001cb42 T rtw_free_evt_priv -1001cb44 T rtw_free_cmd_priv -1001cb48 T rtw_cmd_filter -1001cb66 T rtw_free_cmd_obj -1001cb90 T rtw_enqueue_cmd -1001cbe6 T rtw_set_channel_plan_cmd_callback -1001cbfe T rtw_survey_cmd_callback -1001cc1a T rtw_disassoc_cmd_callback -1001cc4a T rtw_joinbss_cmd_callback -1001cc66 T rtw_setstaKey_cmdrsp_callback -1001cc80 T rtw_cmd_thread -1001cddc T rtw_joinbss_cmd -1001d086 T rtw_disassoc_cmd -1001d0d4 T rtw_setstakey_cmd -1001d1c4 T rtw_clearstakey_cmd -1001d264 T rtw_dynamic_chk_wk_cmd -1001d2b6 T rtw_set_chplan_cmd -1001d336 T dynamic_chk_wk_hdl -1001d3fe T lps_ctrl_wk_hdl -1001d462 T rtw_lps_ctrl_wk_cmd -1001d4cc T rtw_sitesurvey_cmd -1001d594 T rpt_timer_setting_wk_hdl -1001d5a8 T rtw_ps_cmd -1001d604 T rtw_chk_hi_queue_cmd -1001d658 T rtw_drvextra_cmd_hdl -1001d734 t rtw_free_mlme_ie_data -1001d74c T rtw_init_mlme_timer -1001d7a8 T rtw_del_mlme_timer -1001d7c8 T reconnect_timer_hdl -1001d868 T _rtw_init_mlme_priv -1001d8ea T rtw_mfree_mlme_priv_lock -1001d906 T rtw_free_mlme_priv_ie_data -1001d93e T _rtw_free_mlme_priv -1001d966 T _rtw_alloc_network -1001d9b6 T _rtw_free_network -1001da16 T _rtw_free_network_nolock -1001da3c T _rtw_find_network -1001da78 T _rtw_free_network_queue -1001dac0 T rtw_if_up -1001dae0 T rtw_get_capability_from_ie -1001dae4 T rtw_get_capability -1001dafe T rtw_get_beacon_interval_from_ie -1001db02 T rtw_init_mlme_priv -1001db1a T rtw_free_mlme_priv -1001db1e T rtw_free_network_queue -1001db22 T rtw_is_same_ibss -1001db38 T is_same_network -1001db9c T update_network -1001dc36 T rtw_update_scanned_network -1001dd48 T rtw_add_network -1001dd86 T rtw_survey_event_callback -1001de32 T rtw_dummy_event_callback -1001de34 T rtw_free_assoc_resources -1001defe T rtw_indicate_connect -1001df0e T rtw_indicate_disconnect -1001df30 T rtw_indicate_scan_done -1001df34 T rtw_joinbss_event_callback -1001df52 T search_max_mac_id -1001df9a T rtw_stassoc_hw_rpt -1001dfd2 T rtw_stassoc_event_callback -1001e000 T rtw_stadel_event_callback -1001e0a6 T _rtw_join_timeout_handler -1001e130 T rtw_join_timeout_handler -1001e188 T rtw_scan_timeout_handler -1001e1b8 T _rtw_scan_timeout_handler -1001e1bc T rtw_dynamic_check_timer_handlder -1001e214 T _dynamic_check_timer_handlder -1001e258 T rtw_select_and_join_from_scanned_queue -1001e32c T rtw_surveydone_event_callback -1001e444 T rtw_set_auth -1001e494 T rtw_set_key -1001e556 T rtw_restruct_wmm_ie -1001e5bc T rtw_restruct_sec_ie -1001e628 T rtw_joinbss_reset -1001e638 T rtw_restructure_ht_ie -1001e718 T rtw_update_ht_cap -1001e7a2 T rtw_joinbss_event_prehandle -1001e9ce T rtw_linked_check -1001e9ea T rtw_buddy_adapter_up -1001ea22 T check_buddy_fwstate -1001ea40 t get_da -1001ea60 t get_sa -1001ea8a T OnAction -1001ea9c T DoReserved -1001eaa0 t _mgt_dispatcher.isra.2 -1001eaec T rtw_is_channel_set_contains_channel -1001eb0e T init_hw_mlme_ext -1001eb24 T init_channel_set -1001ebbc T free_mlme_ext_priv -1001ebe4 T mgt_dispatcher -1001ec6c T alloc_mgtxmitframe -1001eca4 T update_mgnt_tx_rate -1001ecaa T update_mgntframe_attrib -1001ed06 T rtw_build_mgnt_frame -1001ed5c T dump_mgntframe -1001ed76 T rtw_send_mgnt -1001ed94 t issue_action_BSSCoexistPacket -1001efa0 T update_hidden_ssid -1001eff4 T issue_beacon -1001f20c T issue_probersp -1001f49c T OnProbeReq -1001f564 T issue_probereq -1001f71c T issue_auth -1001f984 T OnAuth -1001fc28 T issue_asocrsp -1001fe9c T issue_assocreq -100201d8 T issue_nulldata -100202c2 T issue_qos_nulldata -100203f4 T issue_deauth -100204dc T issue_action_BA -10020758 T OnAction_back -10020826 T collect_bss_info -10020a58 T start_clnt_auth -10020ae8 T start_clnt_assoc -10020b1c T OnAuthClient -10020bfc T report_scan_result_one -10020dbc T add_site_survey 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sitesurvey_cmd_hdl -10022c5e T concurrent_chk_start_clnt_join -10022cf4 T start_clnt_join -10022dc8 T join_cmd_hdl -10022eec T concurrent_chk_joinbss_done -100230b4 T mlmeext_joinbss_event_callback -100231f0 T set_chplan_hdl -1002320c T init_mlme_ext_timer -10023268 T init_mlme_ext_priv -100233a4 t get_hdr_bssid -100233cc t filter_packet -10023454 t promisc_get_encrypt -100234a6 t promisc_info_get -1002354a t promisc_set_enable -100235e6 T _promisc_deinit -10023638 T _promisc_recv_func -10023b84 T _promisc_set -10023c14 T _is_promisc_enabled -10023c2c t SetEAPOL_KEYIV -10023cca t ToDrv_SetPTK -10023d72 t Message_ReplayCounter_OC2LI.isra.2 -10023da0 t Message_SmallerEqualReplayCounter.isra.4 -10023dd2 t Message_setReplayCounter.isra.5 -10023df0 t INCLargeInteger -10023e10 t INCOctet16_INTEGER -10023e58 t INCOctet32_INTEGER -10023eb8 t ToDrv_DisconnectSTA -10023f7c t CheckMIC.constprop.14 -10023ffc t CalcMIC.constprop.15 -1002405c T DecWPA2KeyData -10024110 T DecGTK -100241cc T ToDrv_SetGTK -1002425c T init_wpa_sta_info -10024348 T SendEAPOL -10024a00 T ClientSendEAPOL -10024ee8 t ResendTimeout -10024f70 T EAPOLKeyRecvd -100250e8 T ClientEAPOLKeyRecvd -100254a8 T psk_derive -1002555c T psk_init -1002564c T psk_strip_rsn_pairwise -100256cc T psk_strip_wpa_pairwise -1002574c T tkip_send_mic_failure_report -100258c0 T pwr_state_check_handler -100258c4 T ips_enter -1002596c T ips_leave -10025a84 T rtw_pwr_unassociated_idle -10025ace T rtw_ps_processor -10025b26 T PS_RDY_CHECK -10025b8e T rtw_set_ps_mode -10025bfc T LPS_RF_ON_check -10025c52 T LPS_Enter -10025cc0 T LPS_Leave -10025cfc T LeaveAllPowerSaveMode -10025d0c T rtw_init_pwrctrl_priv -10025de0 T rtw_free_pwrctrl_priv -10025df4 T _rtw_pwr_wakeup -10025ed0 T rtw_pm_set_lps -10025f18 T rtw_pm_set_ips -10025f5c T rtw_pm_set_tdma_param -10025f78 T rtw_pm_set_lps_dtim -10025f84 T rtw_pm_get_lps_dtim -10025f90 t recvframe_pull -10025fb2 t recvframe_pull_tail -10025fd4 T rtw_signal_stat_timer_hdl -10026072 T _rtw_init_sta_recv_priv -10026090 T _rtw_init_recv_priv -10026138 T rtw_mfree_recv_priv_lock -1002616c T _rtw_alloc_recvframe -1002619e T rtw_alloc_recvframe -100261c4 T rtw_free_recvframe -10026260 T _rtw_enqueue_recvframe -1002628c T rtw_enqueue_recvframe -100262b6 T rtw_free_recvframe_queue -100262ee T rtw_free_uc_swdec_pending_queue -10026316 T _rtw_free_recv_priv -10026346 T rtw_free_buf_pending_queue -1002634a T recvframe_chkmic -10026448 T decryptor -100264e4 T portctrl -1002655a T recv_decache -10026588 T process_pwrbit_data -100265c8 T process_wmmps_data -10026650 T count_rx_stats -100266c4 T sta2sta_data_frame -10026800 T ap2sta_data_frame -1002692c T sta2ap_data_frame -100269b4 T validate_recv_ctrl_frame -10026b4e T validate_recv_data_frame -10026da8 T wlanhdr_to_ethhdr -10026ee4 T recvframe_defrag -10026f8e T recvframe_chk_defrag -10027044 T validate_recv_mgnt_frame -10027080 T validate_recv_frame -10027148 T recv_indicatepkt_reorder -1002716a T process_recv_indicatepkts -100271c2 T recv_func_prehandle -100271ea T recv_func_posthandle -1002724e T recv_func -100272d8 T rtw_recv_entry -10027308 T rtw_recv_tasklet -10027360 T rtw_wep_encrypt -100273a6 T rtw_wep_decrypt -100273ec T rtw_tkip_encrypt -10027458 T rtw_tkip_decrypt -100274c4 T rtw_aes_encrypt -10027530 T rtw_aes_decrypt -10027594 T rtw_init_sec_priv -10027606 T rtw_free_sec_priv -10027626 t wifi_mac_hash -10027650 T _addba_timer_hdl -10027654 T _rtw_init_stainfo -100276ce T _rtw_init_sta_priv -100277b6 T _rtw_free_sta_xmit_priv_lock -100277e2 T rtw_mfree_stainfo -1002780e T rtw_mfree_sta_priv_lock -10027844 T _rtw_free_sta_priv -10027864 T init_addba_retry_timer -1002788c T rtw_alloc_stainfo -10027956 T rtw_free_stainfo -10027af8 T rtw_get_stainfo -10027b74 T rtw_init_bcmc_stainfo -10027ba4 T rtw_get_bcmc_stainfo -10027bc8 T rtw_free_all_stainfo -10027c22 T cckrates_included -10027c4a T cckratesonly_included -10027c72 T networktype_to_raid_ex -10027cd0 T judge_network_type -10027d20 T ratetbl_val_2wifirate -10027d34 T is_basicrate -10027d60 T ratetbl2rateset -10027da4 T get_rate_set -10027dce T UpdateBrateTbl -10027e00 T UpdateBrateTblForSoftAP -10027e34 T Save_DM_Func_Flag -10027e4a T Restore_DM_Func_Flag -10027e60 T Switch_DM_Func -10027e7c T Set_MSR -10027ea0 T set_opmode -10027ee4 T SelectChannel -10027f18 T SetBWMode -10027f54 T set_channel_bwmode -10027faa T get_my_bssid -10027fae T get_beacon_interval -10027fcc T is_client_associated_to_ap -10027fe4 T is_client_associated_to_ibss -10028000 T is_IBSS_empty -10028022 T decide_wait_for_beacon_timeout -1002803e T invalidate_cam_all -10028046 T write_cam -100280bc T clear_cam_entry -100280ea T flush_all_cam_entry -10028148 T WMM_param_handler -1002816e T WMMOnAssocRsp -1002823c T HT_caps_handler -100282dc T HT_info_handler -10028300 T HTOnAssocRsp -10028338 T ERP_IE_handler -10028354 T VCS_update -100283a6 T rtw_check_bcn_info -100285b6 T update_beacon_info -1002860c T is_ap_in_tkip -10028684 T wifirate2_ratetbl_inx -100286f0 T update_basic_rate -1002871e T update_supported_rate -10028748 T update_MCS_rate -10028754 T support_short_GI -10028782 T get_highest_rate_idx -1002879c T Update_RA_Entry -100287a4 T set_sta_rate -100287ac T update_tx_basic_rate -10028804 T check_assoc_AP -100288f8 T update_IOT_info -10028956 T update_capinfo -100289d4 T update_wireless_mode -10028a74 T update_bmc_sta_support_rate -10028a9c T update_TSF -10028aae T correct_TSF -10028ab6 t _init_txservq -10028acc t set_qos -10028b1c T _rtw_init_sta_xmit_priv -10028b62 T rtw_mfree_xmit_priv_lock -10028bae T qos_acm -10028be8 T xmitframe_addmic -10028d46 T xmitframe_swencrypt -10028d72 T rtw_make_wlanhdr -10028f52 T rtw_txframes_pending -10028f8e T rtw_txframes_sta_ac_pending -10028fc4 T rtw_txframes_update_attrib_vcs_info -10029064 T rtw_put_snap -100290a8 T rtw_update_protection -100290ee T rtw_count_tx_stats -1002913e T rtw_free_xmitbuf_ext -10029180 T rtw_alloc_xmitframe -100291d8 T rtw_free_xmitframe -1002922a T rtw_free_xmitframe_queue -10029268 T rtw_get_sta_pending -100292a8 T rtw_xmit_classifier -1002930e T rtw_xmitframe_enqueue -1002931c T rtw_alloc_hwxmits -10029376 T rtw_free_hwxmits -1002938c T _rtw_free_xmit_priv -10029458 T rtw_init_hwxmits -10029470 T _rtw_init_xmit_priv -10029628 T rtw_get_ff_hwaddr -1002963c T xmitframe_enqueue_for_sleeping_sta -100297fc t dequeue_xmitframes_to_sleeping_queue -10029852 T stop_sta_xmit -1002993a T wakeup_sta_to_xmit -10029b50 T xmit_delivery_enabled_frames -10029c6c T rtw_xmit_tasklet -10029cc4 T rtw_xmit_mgnt -10029cc8 T rtw_xmit -10029ff2 T rtw_sctx_done_err -10029ffe T rtw_alloc_xmitbuf -1002a058 T rtw_free_xmitbuf -1002a0ca T rtw_alloc_xmitbuf_ext -1002a150 T rtw_sctx_done -1002a156 t rtl8195a_free_rx_ring -1002a164 t bus_write32 -1002a1c0 t bus_write16 -1002a21c t bus_write8 -1002a278 t bus_read32 -1002a2d2 t bus_read16 -1002a32e t bus_read8 -1002a38a t rtl8195a_free_tx_ring -1002a418 T rtl8195a_init_desc_ring -1002a558 T rtl8195a_free_desc_ring -1002a574 T rtl8195a_reset_desc_ring -1002a60a T InitLxDmaRtl8195a -1002a76c T rtl8195a_check_txdesc_closed -1002a7e4 t rtl8195a_tx_isr -1002a8c8 T InterruptRecognized8195a -1002a958 T InitInterrupt8195a -1002a978 T EnableDMA8195a -1002a9a0 T EnableInterrupt8195a -1002a9e0 T DisableDMA8195a -1002a9ec T DisableInterrupt8195a -1002aa04 T UpdateInterruptMask8195a -1002aa66 T CheckRxTgRtl8195a -1002aaa0 T rtl8192ee_check_rxdesc_remain -1002aad0 T rtl8195a_recv_tasklet -1002ade4 T rtl8195a_tx_int_handler -1002ae10 T InterruptHandle8195a -1002b084 T rtl8195a_xmit_tasklet -1002b0ac T lxbus_set_intf_ops -1002b0ec t GetTxBufDesc -1002b136 t UpdateFirstTxbdtoXmitBuf.isra.3 -1002b168 t check_nic_enough_desc.isra.4 -1002b1b8 T rtl8195ab_init_xmit_priv -1002b1c6 T rtl8195ab_free_xmit_priv -1002b1ce T GetDmaTxbdIdx -1002b1ea T rtl8195a_enqueue_xmitbuf -1002b20e T rtl8195a_dequeue_xmitbuf -1002b232 T SetTxbdForLxDMARtl8195ab -1002b2b2 T UpdateTxbdHostIndex -1002b2f0 T rtw_dump_xframe -1002b4c2 T check_tx_desc_resource -1002b4fc T rtw_dequeue_xframe -1002b590 T rtw_xmitframe_coalesce -1002b844 T rtl8195ab_xmitframe_resume -1002b93a T rtl8195ab_mgnt_xmit -1002b976 T rtl8195ab_hal_xmit -1002ba84 t Hal_GetEfuseDefinition -1002bab4 t ResumeTxBeacon -1002baf8 T UpdateHalRAMask8195A -1002bc90 T HalLittleWifiMCUThreadRtl8195a -1002bce4 T HalCheckInReqStateThreadRtl8195a -1002bd30 T HalTDMAChangeStateThreadRtl8195a -1002bd7c t rtl8195a_read_chip_version -1002bdf0 t Hal_EfuseWordEnableDataWrite -1002c034 t Hal_EfusePowerSwitch -1002c048 t rtl8195a_free_hal_data -1002c062 t StopTxBeacon -1002c0ac T SetHalODMVar8195A -1002c164 T rtl8195a_start_thread -1002c1cc T rtl8195a_stop_thread -1002c1f0 t Hal_ReadEFuse -1002c360 T GetHalODMVar8195A -1002c374 t rtw_flash_map_update.part.12 -1002c414 t rtw_flash_map_erase -1002c458 t Hal_EfusePgPacketWrite -1002c6d4 t Hal_EfuseGetCurrentSize -1002c7b4 t rtw_flash_map_write -1002c982 T rtl8195a_InitBeaconParameters -1002c9f2 T _InitBurstPktLen_8195AB -1002c9fc T rtl8195a_set_hal_ops -1002cadc T rtl8195a_init_default_value -1002cade T rtl8195a_InitLLTTable -1002cb28 T Hal_GetChnlGroup8195A -1002cb64 T rtw_config_map_read -1002cc50 T rtw_config_map_write -1002ccfc T Hal_InitPGData -1002cd5a T Hal_EfuseParseIDCode -1002cd72 T Hal_ReadPowerValueFromPROM_8195A -1002ce10 T Hal_EfuseParseTxPowerInfo_8195A -1002cea8 T Hal_EfuseParseEEPROMVer_8195A -1002cebe T Hal_EfuseParsePackageType_8195A -1002cf28 T Hal_EfuseParseChnlPlan_8195A -1002cf58 T Hal_EfuseParseCustomerID_8195A -1002cf6e T Hal_EfuseParseXtal_8195A -1002cf86 T Hal_EfuseParseThermalMeter_8195A -1002cfae T Hal_ReadRFGainOffset -1002cffe T BWMapping_8195A -1002d01e T SCMapping_8195A -1002d046 T rtl8195a_update_txdesc -1002d316 T rtl8195a_fill_fake_txdesc -1002d3d4 T SetHwReg8195A -1002e094 T GetHwReg8195A -1002e128 T SetHalDefVar8195A -1002e208 T GetHalDefVar8195A -1002e22c T PHY_QueryBBReg_8195A_Safe -1002e258 T PHY_SetBBReg_8195A_Safe -1002e284 t phy_RFSerialRead_8195A -1002e338 T PHY_QueryRFReg_8195A -1002e350 T PHY_SetRFReg_8195A -1002e3a8 T PHY_MACConfig8195A -1002e3c2 T PHY_BBConfig8195A -1002e4d2 T PHY_RFConfig8195A -1002e4d6 T PHY_SetTxPowerIndex_8195A -1002e5e0 T phy_TxPwrAdjInPercentage -1002e620 T PHY_GetTxPowerIndex_8195A -1002e710 T PHY_SetTxPowerLevel8195A -1002e716 T phy_SpurCalibration_8195A -1002e9ce T phy_SetRegBW_8195A -1002ea0c T phy_PostSetBwMode8195A -1002eb68 T phy_SwChnl8195A -1002ec10 T phy_SwChnlAndSetBwMode8195A -1002ec60 T PHY_HandleSwChnlAndSetBW8195A -1002ed10 T PHY_SetBWMode8195A -1002ed32 T PHY_SwChnl8195A -1002ed4c T PHY_SetSwChnlBWMode8195A -1002ed6a t HalTimerEnable -1002ed7c T InitTDMATimer -1002eda4 T ChangeStateByTDMA -1002edb4 T GetMinRateInRRSR -1002ede8 T CheckInReqState -1002edf8 T InitCheckStateTimer -1002ee28 T InitGTimer1ms -1002ee74 T DeInitGTimer1ms -1002eebc T ChangeTransmiteRate -1002eef8 T PowerBitSetting -1002ef74 T ChkandChangePS -1002efd8 T IssueRsvdPagePacketSetting -1002f04c T IssuePSPoll -1002f078 T WaitTxStateMachineOk -1002f0cc T IssueNullData -1002f15c T PsCloseRF -1002f190 T PsOpenRF -1002f1c0 T ChkTxQueueIsEmpty -1002f1d8 T InitPS -1002f248 T ConfigListenBeaconPeriod -1002f26c T PS_S2_Condition_Match -1002f2a0 T PS_S4_Condition_Match -1002f31c T PS_32K_Condition_Match -1002f358 T PS_S2ToS3ToS0State -1002f3c0 T PS_S2ToS0State -1002f3dc T PS_S3ToS2orS0State -1002f40c T PS_S0ToS1ToS2State -1002f468 T PS_S1ToS0orS2State -1002f498 T PS_S2ToS4State -1002f4e4 T PS_S0ToS6State -1002f504 T PS_S6ToS0State -1002f51c T CheckTSFIsStable -1002f56c T WaitHWStateReady -1002f57c T SysClkDown -1002f5ec T SysClkUp -1002f638 T ResetPSParm -1002f6ac T PS_S4ToS2State -1002f6d0 T SleepTo32K -1002f730 T Change_PS_State -1002f8dc T Legacy_PS_Setting -1002f950 T PSModeSetting -1002f9f4 T ChangePSStateByRPWM -1002fa38 T ChangeTDMAState -1002fb58 T TDMAChangeStateTask -1002fb82 T EnterPS -1002fba4 T SetSmartPSTimer -1002fbe0 T GTimer7Handle -1002fc3c T SmartPS2InitTimerAndToGetRxPkt -1002fc78 T PS_OnBeacon -1002fd28 T PSBcnEarlyProcess -1002fde4 T PSMtiBcnEarlyProcess -1002fe90 T PSRxBcnProcess -1002ffe0 T TxPktInPSOn -1003001e T PsBcnToProcess -100300d8 T GTimer6Handle -10030124 T RPWMProcess -10030160 T PSSetMode -100301d8 T SpeRPT -100302f8 T ISR_BcnEarly -10030364 T ISR_MtiBcnEarly -10030398 T ISR_RxBcn -100303b4 T ISR_RxBCMD1 -100303e4 T ISR_RxBCMD0 -10030438 T ISR_RxUCMD1 -10030476 T ISR_RxUCMD0 -100304b2 T ISR_TxPktIn -100304c4 T ISR_TXCCX -100304c8 T H2CHDL_SetPwrMode -100305f0 T CheckInReqStateTask -10030636 T HalGetNullTxRpt -10030654 T ISR_TBTT -100306cc T H2CHDL_BcnIgnoreEDCCA -100306dc T PMUInitial -1003072c T PMUTask -10030838 T PHY_RF6052SetBandwidth8195A -1003087c T PHY_RF6052_Config8195A -10030934 t process_rssi -1003096a T rtl8195a_query_rx_desc_status -10030a1a T rtl8195a_query_rx_phy_status -10030b72 T hal_com_get_channel_plan -10030ba6 T HAL_IsLegalChannel -10030bc4 T MRateToHwRate -10030bd8 T HwRateToMRate -10030bec T HalSetBrateCfg -10030c98 T Hal_MappingOutPipe -10030cb4 T hal_init_macaddr -10030ce0 T hw_var_port_switch -10030f68 T SetHwReg -10030f72 T GetHwReg -10030f74 T switch_power_saving_mode -10030fb8 T rtw_bb_rf_gain_offset -10031000 T PHY_GetRateValuesOfTxPowerByRate -10031198 T PHY_StoreTxPowerByRateNew -10031234 T PHY_InitTxPowerByRate -1003124c T PHY_StoreTxPowerByRate -10031264 T PHY_GetTxPowerIndexBase -10031304 T PHY_GetTxPowerTrackingOffset -10031330 T PHY_GetRateIndexOfTxPowerByRate -10031344 T PHY_GetTxPowerByRate -100313a4 T phy_StoreTxPowerByRateBase -100313f0 T PHY_SetTxPowerByRate -1003142c T phy_ConvertTxPowerByRateInDbmToRelativeValues -1003152c T PHY_TxPowerByRateConfiguration -1003153e T PHY_SetTxPowerIndexByRateArray -1003157c T PHY_SetTxPowerIndexByRateSection -100315e0 T PHY_SetTxPowerLevelByPath -10031616 T phy_GetWorldWideLimit -10031642 T PHY_GetTxPowerLimit -1003176c T PHY_ConvertTxPowerLimitToPowerIndex -100318bc T PHY_InitTxPowerLimit -10031904 T PHY_SetTxPowerLimit -10031980 T PHY_GetTxPowerIndex -10031990 T rtw_hal_chip_configure -100319a6 T rtw_hal_read_chip_info -100319bc T rtw_hal_read_chip_version -100319d2 T rtw_hal_def_value_init -100319e8 T rtw_hal_free_data -100319fe T rtw_hal_dm_init -10031a14 T rtw_hal_dm_deinit -10031a2a T rtw_hal_init -10031a54 T rtw_hal_deinit -10031a6e T rtw_hal_set_hwreg -10031a7c T rtw_hal_get_hwreg -10031a8a T rtw_hal_set_def_var -10031a9c T rtw_hal_get_def_var -10031aae T rtw_hal_set_odm_var -10031abc T rtw_hal_get_odm_var -10031aca T rtw_hal_enable_interrupt -10031aec T rtw_hal_disable_interrupt -10031b0e T rtw_hal_inirp_init -10031b20 T rtw_hal_inirp_deinit -10031b32 T rtw_hal_irp_reset -10031b40 T rtw_hal_xmit -10031b52 T rtw_hal_mgnt_xmit -10031b64 T rtw_hal_init_xmit_priv -10031b76 T rtw_hal_free_xmit_priv -10031b84 T rtw_hal_update_ra_mask -10031bb2 T rtw_hal_add_ra_tid -10031bc0 T rtw_hal_clone_data -10031bce T rtw_hal_start_thread -10031bdc T rtw_hal_stop_thread -10031bea T rtw_hal_read_bbreg -10031c1e T rtw_hal_write_bbreg -10031c4a T rtw_hal_read_rfreg -10031c5c T rtw_hal_write_rfreg -10031c70 T rtw_hal_interrupt_handler -10031c82 T rtw_hal_set_bwmode -10031c90 T rtw_hal_set_chan -10031c9e T rtw_hal_set_chnl_bw -10031cb4 T rtw_hal_dm_watchdog -10031cca T rtw_hal_macid_sleep -10031cea T rtw_hal_macid_wakeup -10031d0a T decide_chip_type_by_device_id -10031d10 t rtw_net_get_stats -10031d60 t netdev_if2_close -10031d80 t netdev_close -10031ddc t rtw_if1_deinit -10031e76 T rtw_os_indicate_connect -10031e7a T rtw_os_indicate_scan_done -10031e7e T rtw_reset_securitypriv -10031f72 T rtw_os_indicate_disconnect -10031fbc T rtw_init_netdev -1003210c T rtw_drv_if2_init -10032314 T rtw_drv_if2_stop -1003236a T rtw_drv_if2_free -100323b8 T _netdev_open -100324d4 T _netdev_if2_open -10032590 T netdev_if2_open -100325b8 T netdev_open -100325e0 T rtw_drv_probe -10032760 T rtw_dev_remove -100327a4 T rtw_drv_entry -100327d0 T rtw_drv_halt -10032800 t rtw_wx_set_autoreconnect -1003282e t rtw_wx_get_autoreconnect -1003283c t rtw_forwarding_set -1003285e t rtw_set_ch_deauth -10032880 t get_priv_size -10032894 t rtw_wx_del_custome_ie -100328e0 t rtw_wx_set_pscan_freq -10032962 t rtw_wx_update_custome_ie -100329d4 t rtw_set_tos_value -100329f4 t rtw_get_tx_power -10032b38 t rtw_wx_set_custome_ie -10032be4 t rtw_pm_get -10032c28 t rtw_pm_set -10032cdc t rtw_wx_read32 -10032d88 t rtw_wx_write32 -10032dec t rtw_wx_set_freq.isra.10 -10032e94 T rtw_ex_set -10032f54 T wireless_send_event -10032f5e T indicate_wx_custom_event -10032fba T indicate_wx_scan_result_present -10032fe2 T indicate_wx_scan_complete_event -1003300c T rtw_indicate_sta_assoc -1003305c T rtw_indicate_sta_disassoc -100330b4 T rtw_indicate_wx_assoc_event -100330e6 T rtw_indicate_wx_disassoc_event -10033116 T rtw_set_wpa_ie -1003322c T strtopsk -10033298 T rtw_wx_get_passphrase -100332e4 T rtw_wx_set_ap_essid -100333d4 T mac_reg_dump -10033480 T bb_reg_dump -100334dc T rf_reg_dump -10033554 t rtw_dbg_port -10033bbc T rtw_set_sta_num -10033bd8 T rtw_ex_get_drv_ability -10033c98 T rtw_ex_get -10033f30 T rtw_ioctl -10034ebc T rtw_os_recv_resource_init -10034ec0 T rtw_os_recv_resource_alloc -10034eca T rtw_os_recv_resource_free -10034ecc T rtw_tkip_countermeasure -10034f6c T rtw_handle_tkip_mic_err -10035014 T rtw_recv_indicatepkt -10035264 T skb_fail_inc -10035280 T skb_fail_get_and_rst -1003529c T init_skb_pool -100352f4 T init_skb_data_pool -1003534c T alloc_skb -1003544c T kfree_skb -100354b4 T kfree_skb_chk_key -100354b8 T skb_put -100354ec T skb_reserve -100354fa T dev_alloc_skb -10035516 T skb_end_pointer -1003551a T skb_set_tail_pointer -10035522 T skb_pull -1003553a T skb_copy -10035562 T rtw_remainder_len -1003556e T _rtw_open_pktfile -10035580 T _rtw_pktfile_read -100355ae T rtw_set_tx_chksum_offload -100355b0 T rtw_os_xmit_resource_alloc -100355ba T rtw_os_xmit_resource_free -100355bc T rtw_os_pkt_complete -100355c4 T rtw_os_xmit_complete -100355d6 T rtw_os_xmit_schedule -10035612 T rtw_xmit_entry -1003565e T rtw_alloc_etherdev_with_old_priv -10035674 T rtw_alloc_etherdev -100356a0 T rtw_free_netdev -100356c0 T timer_wrapper -10035714 T alloc_etherdev -10035770 T free_netdev -1003578a T dev_alloc_name -10035794 T init_timer_wrapper -100357b4 T deinit_timer_wrapper -10035800 T init_timer -100358b8 T mod_timer -10035998 T cancel_timer_ex -100359e0 T del_timer_sync -10035a44 T rtw_init_timer -10035a4c T rtw_set_timer -10035a50 T rtw_cancel_timer -10035a5a T rtw_del_timer -10035a60 T rltk_get_idx_bydev -10035a70 T rltk_wlan_init -10035af8 T rltk_wlan_deinit -10035bbc T rltk_wlan_start -10035bf0 T rltk_wlan_check_isup -10035c00 T rltk_wlan_tx_inc -10035c14 T rltk_wlan_tx_dec -10035c28 T rltk_wlan_get_recv_skb -10035c38 T rltk_wlan_alloc_skb -10035c78 T rltk_wlan_send_skb -10035cac T rltk_netif_rx -10035d58 T rltk_set_sta_num -10035d5c T rltk_set_tx_power_percentage -10035d90 T rltk_wlan_control -10035e24 T rltk_wlan_running -10035e3c T rltk_wlan_handshake_done -10035e70 T rltk_wlan_is_connected_to_ap -10035eb4 T Efuse_PowerSwitch -10035ec0 T Efuse_GetCurrentSize -10035ecc T Efuse_CalculateWordCnts -10035ef0 T EFUSE_GetEfuseDefinition -10035f04 T efuse_OneByteRead -10035f38 T efuse_OneByteWrite -10035f6c T Efuse_PgPacketWrite -10035f80 T efuse_WordEnableDataRead -10035fb2 T Efuse_WordEnableDataWrite -10035fc6 T efuse_GetCurrentSize -10035fee T rtw_efuse_map_read -10036050 T rtw_efuse_map_write -100361d0 T rtw_macaddr_cfg -10036294 T rtw_get_cipher_info -1003630e T rtw_get_bcn_info -100363de T rtw_init_default_value -1003644c T rtw_cancel_all_timer -100364b6 T rtw_free_drv_sw -1003652c T rtw_reset_drv_sw -10036588 T rtw_init_drv_sw -10036610 T rtw_start_drv_threads -100366cc T rtw_stop_drv_threads -10036700 T rtw_read8 -1003670e T rtw_read16 -1003671c T rtw_read32 -1003672a T rtw_write8 -10036738 T rtw_write16 -10036746 T rtw_write32 -10036754 T rtw_do_join -100367f8 T rtw_set_802_11_bssid -1003697c T rtw_set_802_11_ssid -10036a84 T rtw_set_802_11_infrastructure_mode -10036b26 T rtw_set_802_11_bssid_list_scan -10036b76 T rtw_set_802_11_authentication_mode -10036b98 T rtw_set_802_11_add_wep -10036bf8 T ODM_InitRAInfo -10036c98 T InitialRateUpdate -10036d98 T RateUp_search_RateMask -10036dca T RateDown_search_RateMask -10036e1c T StartRateByRSSI -10036e46 T RateUpRAM8195A -10036eda T RateDownTrying -10036f18 T TryDone -10036fb0 T RateDownStepRAM8195A -10037050 T RateDecisionRAM8195A -10037134 T ArfrRefresh -1003733c T H2CHDL_Set_MACID_Config -10037400 T PHY_DM_RA_SetRSSI_8195A -1003742e t CheckPositive.isra.0 -10037510 T ODM_ReadAndConfig_MP_8195A_AGC_TAB -10037588 T ODM_ReadAndConfig_MP_8195A_PHY_REG -10037600 T ODM_GetVersion_MP_8195A_PHY_REG -10037604 T ODM_ReadAndConfig_MP_8195A_PHY_REG_PG -10037638 T odm_ConfigRFReg_8195A -10037670 T odm_ConfigRF_RadioA_8195A -10037680 T odm_ConfigMAC_8195A -10037684 T odm_ConfigBB_AGC_8195A -10037694 T odm_ConfigBB_PHY_REG_PG_8195A -100376c2 T odm_ConfigBB_PHY_8195A -1003770a T odm_ConfigBB_TXPWR_LMT_8195A -10037730 T ODM_CmnInfoInit -10037824 T ODM_CmnInfoHook -100378c8 T ODM_CmnInfoPtrArrayHook -100378d8 T ODM_CmnInfoUpdate -100379a8 T odm_CommonInfoSelfInit -10037a1c T ODM_DMInit -10037a6a T odm_CommonInfoSelfUpdate -10037abc T ODM_DMWatchdog -10037b28 T PhyDM_Get_Structure -10037b4c T Phydm_CheckAdaptivity -10037b7a T Phydm_NHMCounterStatisticsInit -10037bf0 T Phydm_SetEDCCAThreshold -10037c28 T Phydm_MACEDCCAState -10037c66 T Phydm_AdaptivityInit -10037d44 T Phydm_Adaptivity -10037e64 T ODM_CfoTrackingInit -10037e8e T ODM_CfoTracking -10037eae T ODM_ParsingCFO -10037ee0 T ODM_InitDebugSetting -10037ef4 T ODM_Write_DIG -10037f94 T odm_ForbiddenIGICheck -10038026 T ODM_Write_CCK_CCA_Thres -10038060 T odm_DIGInit -100380fa T odm_DigAbort -1003811c T odm_DIGbyRSSI_LPS -100381c8 T odm_FAThresholdCheck -100381f4 T odm_DIG -10038454 T odm_FalseAlarmCounterStatistics -10038480 T odm_CCKPacketDetectionThresh -100384d8 T odm_RxPhyStatus8195A_Parsing -100385dc T odm_Process_RSSIForDM_8195A -1003871e T ODM_PhyStatusQuery_8195A -1003874a T ODM_PhyStatusQuery -1003874e T ODM_ConfigRFWithHeaderFile -1003876c T ODM_ConfigRFWithTxPwrTrackHeaderFile -1003879e T ODM_ConfigBBWithHeaderFile -100387c6 T ODM_ConfigMACWithHeaderFile -100387d8 T ODM_Read1Byte -100387de T ODM_Read4Byte -100387e4 T ODM_Write1Byte -100387ea T ODM_Write2Byte -100387f0 T ODM_Write4Byte -100387f6 T ODM_SetMACReg -100387fc T ODM_SetBBReg -10038802 T ODM_GetBBReg -10038808 T ODM_SetRFReg -1003880e T ODM_GetRFReg -10038814 T ODM_MoveMemory -1003881e T ODM_delay_ms -10038822 T ODM_delay_us -10038828 T getSwingIndex -10038880 T odm_TXPowerTrackingThermalMeterInit -10038932 T odm_TXPowerTrackingInit -10038936 T odm_TXPowerTrackingCheckIOT -1003896a T ODM_TXPowerTrackingCheck -10038978 T odm_RSSIMonitorInit -10038980 T ODM_RAPostActionOnAssoc -10038988 T odm_RSSIMonitorCheckIOT -10038a5c T odm_RSSIMonitorCheck -10038a70 T odm_RateAdaptiveMaskInit -10038a98 T ODM_RAStateCheck -10038ada T odm_RefreshRateAdaptiveMaskIOT -10038b2a T odm_RefreshRateAdaptiveMask -10038b40 T ODM_Get_Rate_Bitmap -10038c30 t _ReadEfuseInfo8195a -10038cf8 t rtl8195a_interface_configure -10038d2c t rtl8195a_hal_deinit -10038d68 T _InitPowerOn -10038de8 t ReadAdapterInfo8195a -10038e18 T _InitDriverInfoSize -10038e22 T _InitNetworkType -10038e44 T _InitWMACSetting -10038eb4 T _InitAdaptiveCtrl -10038ef8 T _InitEDCA -10038f74 T _InitRateFallback -10038fb8 T _InitRetryFunction -10038fe4 T _InitOperationMode -1003902c T _InitInterrupt -1003906c t rtl8195a_hal_init -10039344 T rtl8195ab_set_hal_ops -1003941c T FillH2CCmd8195A -1003943c T CheckFwRsvdPageContent -1003943e T rtl8195a_set_FwRsvdPage_cmd -10039448 T rtl8195a_set_FwMediaStatusRpt_cmd -10039474 T rtl8195a_set_FwMacIdConfig_cmd -10039534 T rtl8195a_set_FwPwrMode_cmd -100395c4 T rtl8195a_download_rsvd_page -100398cc T rtl8195a_set_FwJoinBssRpt_cmd -100398d6 T rtl8195a_Add_RateATid -10039928 T rtw_rpt_h_addr -10039974 T rtw_txrpt_read8 -10039992 T rtw_txrpt_write8 -100399b6 T rtw_ratemask_read8 -100399d4 T rtw_ratemask_write8 -100399f8 T ReadRateMask8 -10039a02 T WriteRateMask8 -10039a06 T ReadTxrpt8 -10039a10 T WriteTxrpt8 -10039a14 T ResetTxrpt -10039a4c T PsuseTxrpt -10039a6c T CheckMaxMacidNum -10039aa4 T GetMediaStatusCommon -10039abe T GetTxrptStatistic -10039b74 T rtl8195a_InitHalDm -10039c98 T rtl8195a_HalDmWatchDog -10039d7c T rtl8195a_init_dm_priv -10039e54 T rtl8195a_deinit_dm_priv -10039e56 T MediaConnection -10039e74 T MediaDisconnection -10039e94 T RATaskEnable -10039ebe T SetMediaStatus -10039efc T H2CHDL_JoinInfo -10039f34 T H2CHDL_SetRsvdPage -10039fcc T H2CCmdCommon -1003a010 T HalPwrSeqCmdParsing -1003a0d0 T hci_dvobj_init -1003a0e0 T hci_dvobj_deinit -1003a0f0 T hci_dvobj_request_irq -1003a100 T hci_dvobj_free_irq -1003a110 T hci_lxbus_dvobj_init -1003a14c T hci_lxbus_dvobj_deinit -1003a18c T hci_lxbus_dvobj_request_irq -1003a1e0 T hci_lxbus_free_irq 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vPortExitCritical +10017a14 T xPortPendSVHandler +10017a54 t pxCurrentTCBConst +10017a58 T xPortSysTickHandler +10017a7c W vPortSuppressTicksAndSleep +10017b94 W vPortSetupTimerInterrupt +10017be4 T xPortStartScheduler +10017c14 T vApplicationIdleHook +10017c18 T vApplicationStackOverflowHook +10017c34 T osKernelSysTick +10017c38 T vListInitialise +10017c4e T vListInitialiseItem +10017c54 T vListInsertEnd +10017c6c T vListInsert +10017c9c T uxListRemove +10017cbc t prvCopyDataToQueue +10017d26 t prvCopyDataFromQueue +10017d4e t prvUnlockQueue +10017db6 T xQueueGenericReset +10017e10 T xQueueGenericCreate +10017e5c T xQueueCreateCountingSemaphore +10017e6e T xQueueGenericSend +10017f4c T xQueueCreateMutex +10017f96 T xQueueGenericSendFromISR +10017ffa T xQueueGenericReceive +100180fe T uxQueueMessagesWaiting +10018110 T vQueueDelete +10018126 T vQueueWaitForMessageRestricted +10018160 t prvGenerateRunTimeOfPeroid +100181a0 t prvGetExpectedIdleTime +100181d0 t prvListTaskWithinSingleList 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max_skbbuf_used_num +10055a8c d skb_fail_count +10055a90 D timer_table +10055a98 D rltk_wlan_info +10055ac8 d timer_used_num +10055acc D max_timer_used_num +10055ad0 D Noisy_State +10055ad4 D pExportWlanIrqSemaphore +10055ad8 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +10055af6 D .ram.bss$$Limit +10055af6 D __bss_end__ +10055af8 B __ram_heap2_start__ 10070000 A __ram_heap2_end__ 1fff0000 D __ram_tcm_start__ 1fff0000 D __tcm_heap_start__