diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld index 42222c7..800d4bf 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld @@ -73,9 +73,8 @@ SECTIONS KEEP(*(.hal.ram.data)) KEEP(*(.hal.flash.data)) /* KEEP(*(.data)); ? */ - build/obj/project/src/user/rtl_bios_data.o (.rodata*) + build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.o (.rodata*) KEEP(*(.ram.boot.text)) - build/obj/project/src/user/rtl_boot.o (.rodata*) __image1_bss_start__ = .; __image1_bss_end__ = .; __ram_image1_text_end__ = .; diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 2d5bef2..00d0b3d 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_1.p.bin b/build/bin/ram_1.p.bin index b681894..3c62439 100644 Binary files a/build/bin/ram_1.p.bin and b/build/bin/ram_1.p.bin differ diff --git a/build/bin/ram_1.r.bin b/build/bin/ram_1.r.bin deleted file mode 100644 index 5a583ca..0000000 Binary files a/build/bin/ram_1.r.bin and /dev/null differ diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin index ab21b6a..2135ade 100644 Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin index f2dd93f..93820b0 100644 Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin index 750476b..5cf8c7f 100644 Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index 89c828e..c94c7d6 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/build/obj/build.nmap b/build/obj/build.nmap index deaff85..d69f751 100644 --- a/build/obj/build.nmap +++ b/build/obj/build.nmap @@ -1,6 +1,26 @@ - U _printf_float - w _scanf_float + U __aeabi_d2iz + U __aeabi_dadd + U __aeabi_dcmpge + U __aeabi_dcmpgt + U __aeabi_dcmple + U __aeabi_dcmplt + U __aeabi_dmul + U __aeabi_dsub + U __aeabi_f2d + U __aeabi_fdiv + U __aeabi_i2d + U __aeabi_i2f + U __aeabi_ui2f + U __ctype_ptr__ + U floor + U free + U localtime + U malloc + U mfl_code_to_length + U pow 00000000 A __vectors_table +00000000 D __rom_image_end__ +00000000 D __rom_image_start__ 000000c0 A UartLogRamCmdTableSize 00000101 A Reset_Handler 00000109 A NMI_Handler @@ -88,7 +108,6 @@ 00003615 A HalSpi0IntrHandle 00003665 A HalGpioIntrHandle 000036b5 A HalUart0IntrHandle -000036e8 A _binary_build_bin_ram_1_r_bin_size 00003705 A HalSpiFlashIntrHandle 00003755 A HalUsbOtgIntrHandle 000037a5 A HalSdioHostIntrHandle @@ -713,73 +732,80 @@ 000492e8 A SdrDramModeReg_rom 00049304 A SdrDramDev_rom 00049314 A __rom_c_cut_rodata_end__ -10000000 A NewVectorTable -10000000 A __ram_image_start__ -10000100 A UserIrqFunTable -10000200 A UserIrqDataTable -10000300 A CfgSysDebugWarn -10000300 A __rom_bss_start__ -10000304 A CfgSysDebugInfo -10000308 A CfgSysDebugErr -1000030c A ConfigDebugWarn -10000310 A ConfigDebugInfo -10000314 A ConfigDebugErr -10000318 A HalTimerOp -10000334 A GPIOState -1000034c A gTimerRecord -10000350 A SSI_DBG_CONFIG -10000354 A _pHAL_Gpio_Adapter -10000358 A Timer2To7VectorTable -10000370 A _rand_first -10000374 A _rand_z1 -10000378 A _rand_z2 -1000037c A _rand_z3 -10000380 A _rand_z4 -10000384 A pUartLogCtl -10000388 A UartLogBuf -10000408 A UartLogCtl -10000430 A UartLogHistoryBuf -100006ac A ArgvArray -100006d4 A rom_wlan_ram_map -100006e0 A FalseAlmCnt -10000720 A ROMInfo -10000738 A DM_CfoTrack -10000760 A rom_libgloss_ram_map -10000780 A __rtl_malloc_av_ -10000b88 A __rtl_malloc_trim_threshold -10000b8c A __rtl_malloc_top_pad -10000b90 A __rtl_malloc_sbrk_base -10000b94 A __rtl_malloc_max_sbrked_mem -10000b98 A __rtl_malloc_max_total_mem -10000b9c A __rtl_malloc_current_mallinfo -10000bc4 A __rtl_errno -10000bc8 A __rom_bss_end__ -10000bc8 A bootloader +10000000 D NewVectorTable +10000000 D __ram_image_start__ +10000100 D UserIrqFunTable +10000200 D UserIrqDataTable +10000300 D CfgSysDebugWarn +10000300 D __rom_bss_start__ +10000304 D CfgSysDebugInfo +10000308 D CfgSysDebugErr +1000030c D ConfigDebugWarn +10000310 D ConfigDebugInfo +10000314 D ConfigDebugErr +10000318 D HalTimerOp +10000334 D GPIOState +1000034c D gTimerRecord +10000350 D SSI_DBG_CONFIG +10000354 D _pHAL_Gpio_Adapter +10000358 D Timer2To7VectorTable +10000370 D _rand_first +10000374 D _rand_z1 +10000378 D _rand_z2 +1000037c D _rand_z3 +10000380 D _rand_z4 +10000384 D pUartLogCtl +10000388 D UartLogBuf +10000408 D UartLogCtl +10000430 D UartLogHistoryBuf +100006ac D ArgvArray +100006d4 D rom_wlan_ram_map +100006e0 D FalseAlmCnt +10000720 D ROMInfo +10000738 D DM_CfoTrack +10000760 D rom_libgloss_ram_map +10000780 D __rtl_malloc_av_ +10000b88 D __rtl_malloc_trim_threshold +10000b8c D __rtl_malloc_top_pad +10000b90 D __rtl_malloc_sbrk_base +10000b94 D __rtl_malloc_max_sbrked_mem +10000b98 D __rtl_malloc_max_total_mem +10000b9c D __rtl_malloc_current_mallinfo +10000bc4 D __rtl_errno +10000bc8 A __ram_start_table_start__ 10000bc8 A gRamStartFun -10000bc8 R _binary_build_bin_ram_1_r_bin_start +10000bc8 D __rom_bss_end__ +10000bc8 T __ram_image1_text_start__ 10000bcc A gRamPatchWAKE 10000bd0 A gRamPatchFun0 10000bd4 A gRamPatchFun1 10000bd8 A gRamPatchFun2 -10000bdc A RAM_IMG1_VALID_PATTEN -10000be4 A rand_x -10000be8 A AvaWds -10001be8 A SdrDramInfo -10001bfc A SdrDramTiming -10001c30 A SdrDramModeReg -10001c4c A SdrDramDev -10001c60 A _rtl_impure_ptr -10001c68 A impure_reent -10002090 A _rom_unc_data -100020b4 A _sdr_rnd2_y -100020b8 A _sdr_rnd2_z -100020bc A _sdr_rnd2_c -10002100 A __ram_image_end__ +10000bdc A __image1_validate_code__ +10000bdc T RAM_IMG1_VALID_PATTEN +10000be4 T rand_x +10000be8 T AvaWds +10001be8 T SdrDramInfo +10001bfc T SdrDramTiming +10001c30 T SdrDramModeReg +10001c4c T SdrDramDev +10001c60 T _rtl_impure_ptr +10001c68 T impure_reent +10002090 T _rom_unc_data +100020b4 T _sdr_rnd2_y +100020b8 T _sdr_rnd2_z +100020bc T _sdr_rnd2_c +100020c0 T __ram_image_end__ +100020c0 T gBoot_Gpio_Adapter +100021ec T SpicInitParaAllClk +1000227c t EnterImage15 +10002328 t RtlBootToSram +100023b4 T __image1_bss_end__ +100023b4 T __image1_bss_start__ +100023b4 T __ram_image1_text_end__ 10002400 B __rom_heap_start__ 10002400 B end 10003000 B __ram_heap1_start__ 10003000 B __rom_heap_end__ -100042b0 R _binary_build_bin_ram_1_r_bin_end 10006000 D .image2.start.table1$$Base 10006000 D __image2_entry_func__ 10006000 D __ram_heap1_end__ @@ -789,2463 +815,2359 @@ 10006004 D __image2_validate_code__ 10006018 D cus_sig 10006038 T VectorTableOverrideRtl8195A -1000604c T SYSPlatformInit -1000606c T InfraStart -10006124 T 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rtw_aes_decrypt -1002772c T rtw_init_sec_priv -1002779e T rtw_free_sec_priv -100277be t wifi_mac_hash -100277e8 T _addba_timer_hdl -100277ec T _rtw_init_stainfo -10027866 T _rtw_init_sta_priv -1002794e T _rtw_free_sta_xmit_priv_lock -1002797a T rtw_mfree_stainfo -100279a6 T rtw_mfree_sta_priv_lock -100279dc T _rtw_free_sta_priv -100279fc T init_addba_retry_timer -10027a24 T rtw_alloc_stainfo -10027aee T rtw_free_stainfo -10027c90 T rtw_get_stainfo -10027d0c T rtw_init_bcmc_stainfo -10027d3c T rtw_get_bcmc_stainfo -10027d60 T rtw_free_all_stainfo -10027dba T cckrates_included -10027de2 T cckratesonly_included -10027e0a T networktype_to_raid_ex -10027e68 T judge_network_type -10027eb8 T ratetbl_val_2wifirate -10027ecc T is_basicrate -10027ef8 T ratetbl2rateset -10027f3c T get_rate_set -10027f66 T UpdateBrateTbl -10027f98 T UpdateBrateTblForSoftAP -10027fcc T Save_DM_Func_Flag -10027fe2 T Restore_DM_Func_Flag -10027ff8 T Switch_DM_Func -10028014 T Set_MSR -10028038 T set_opmode -1002807c T SelectChannel -100280b0 T SetBWMode -100280ec T set_channel_bwmode -10028142 T get_my_bssid -10028146 T get_beacon_interval -10028164 T is_client_associated_to_ap -1002817c T is_client_associated_to_ibss -10028198 T is_IBSS_empty -100281ba T decide_wait_for_beacon_timeout -100281d6 T invalidate_cam_all -100281de T write_cam -10028254 T clear_cam_entry -10028282 T flush_all_cam_entry -100282e0 T WMM_param_handler -10028306 T WMMOnAssocRsp -100283d4 T HT_caps_handler -10028474 T HT_info_handler -10028498 T HTOnAssocRsp -100284d0 T ERP_IE_handler -100284ec T VCS_update -1002853e T rtw_check_bcn_info -1002874e T update_beacon_info -100287a4 T is_ap_in_tkip -1002881c T wifirate2_ratetbl_inx -10028888 T update_basic_rate -100288b6 T update_supported_rate -100288e0 T update_MCS_rate -100288ec T support_short_GI -1002891a T get_highest_rate_idx -10028934 T Update_RA_Entry -1002893c T set_sta_rate -10028944 T update_tx_basic_rate -1002899c T check_assoc_AP -10028a90 T update_IOT_info -10028aee T update_capinfo -10028b6c T update_wireless_mode -10028c0c T update_bmc_sta_support_rate -10028c34 T update_TSF -10028c46 T correct_TSF -10028c4e t _init_txservq -10028c64 t set_qos -10028cb4 T _rtw_init_sta_xmit_priv -10028cfa T rtw_mfree_xmit_priv_lock -10028d46 T qos_acm -10028d80 T xmitframe_addmic -10028ede T xmitframe_swencrypt -10028f0a T rtw_make_wlanhdr -100290ea T rtw_txframes_pending -10029126 T rtw_txframes_sta_ac_pending -1002915c T rtw_txframes_update_attrib_vcs_info -100291fc T rtw_put_snap -10029240 T rtw_update_protection -10029286 T rtw_count_tx_stats -100292d6 T rtw_free_xmitbuf_ext -10029318 T rtw_alloc_xmitframe -10029370 T rtw_free_xmitframe -100293c2 T rtw_free_xmitframe_queue -10029400 T rtw_get_sta_pending -10029440 T rtw_xmit_classifier -100294a6 T rtw_xmitframe_enqueue -100294b4 T rtw_alloc_hwxmits -1002950e T rtw_free_hwxmits -10029524 T _rtw_free_xmit_priv -100295f0 T rtw_init_hwxmits -10029608 T _rtw_init_xmit_priv -100297c0 T rtw_get_ff_hwaddr -100297d4 T xmitframe_enqueue_for_sleeping_sta -10029994 t dequeue_xmitframes_to_sleeping_queue -100299ea T stop_sta_xmit -10029ad2 T wakeup_sta_to_xmit -10029ce8 T xmit_delivery_enabled_frames -10029e04 T rtw_xmit_tasklet -10029e5c T rtw_xmit_mgnt -10029e60 T rtw_xmit -1002a18a T rtw_sctx_done_err -1002a196 T rtw_alloc_xmitbuf -1002a1f0 T rtw_free_xmitbuf -1002a262 T rtw_alloc_xmitbuf_ext -1002a2e8 T rtw_sctx_done -1002a2ee t rtl8195a_free_rx_ring -1002a2fc t bus_write32 -1002a358 t bus_write16 -1002a3b4 t bus_write8 -1002a410 t bus_read32 -1002a46a t bus_read16 -1002a4c6 t bus_read8 -1002a522 t rtl8195a_free_tx_ring -1002a5b0 T rtl8195a_init_desc_ring -1002a6f0 T rtl8195a_free_desc_ring -1002a70c T rtl8195a_reset_desc_ring -1002a7a2 T InitLxDmaRtl8195a -1002a904 T rtl8195a_check_txdesc_closed -1002a97c t rtl8195a_tx_isr -1002aa60 T InterruptRecognized8195a -1002aaf0 T InitInterrupt8195a -1002ab10 T EnableDMA8195a -1002ab38 T EnableInterrupt8195a -1002ab78 T DisableDMA8195a -1002ab84 T DisableInterrupt8195a -1002ab9c T UpdateInterruptMask8195a -1002abfe T CheckRxTgRtl8195a -1002ac38 T rtl8192ee_check_rxdesc_remain -1002ac68 T rtl8195a_recv_tasklet -1002af7c T rtl8195a_tx_int_handler -1002afa8 T InterruptHandle8195a -1002b21c T rtl8195a_xmit_tasklet -1002b244 T lxbus_set_intf_ops -1002b284 t GetTxBufDesc -1002b2ce t UpdateFirstTxbdtoXmitBuf.isra.3 -1002b300 t check_nic_enough_desc.isra.4 -1002b350 T rtl8195ab_init_xmit_priv -1002b35e T rtl8195ab_free_xmit_priv -1002b366 T GetDmaTxbdIdx -1002b382 T rtl8195a_enqueue_xmitbuf -1002b3a6 T rtl8195a_dequeue_xmitbuf -1002b3ca T SetTxbdForLxDMARtl8195ab -1002b44a T UpdateTxbdHostIndex -1002b488 T rtw_dump_xframe -1002b65a T check_tx_desc_resource -1002b694 T rtw_dequeue_xframe -1002b728 T rtw_xmitframe_coalesce -1002b9dc T rtl8195ab_xmitframe_resume -1002bad2 T rtl8195ab_mgnt_xmit -1002bb0e T rtl8195ab_hal_xmit -1002bc1c t Hal_GetEfuseDefinition -1002bc4c t ResumeTxBeacon -1002bc90 T UpdateHalRAMask8195A -1002be28 T HalLittleWifiMCUThreadRtl8195a -1002be7c T HalCheckInReqStateThreadRtl8195a -1002bec8 T HalTDMAChangeStateThreadRtl8195a -1002bf14 t rtl8195a_read_chip_version -1002bf88 t Hal_EfuseWordEnableDataWrite -1002c1cc t Hal_EfusePowerSwitch -1002c1e0 t rtl8195a_free_hal_data -1002c1fa t StopTxBeacon -1002c244 T SetHalODMVar8195A -1002c2fc T rtl8195a_start_thread -1002c364 T rtl8195a_stop_thread -1002c388 t Hal_ReadEFuse -1002c4f8 T GetHalODMVar8195A -1002c50c t rtw_flash_map_update.part.12 -1002c5ac t rtw_flash_map_erase -1002c5f0 t Hal_EfusePgPacketWrite -1002c86c t Hal_EfuseGetCurrentSize -1002c94c t rtw_flash_map_write -1002cb1a T rtl8195a_InitBeaconParameters -1002cb8a T _InitBurstPktLen_8195AB -1002cb94 T rtl8195a_set_hal_ops -1002cc74 T rtl8195a_init_default_value -1002cc76 T rtl8195a_InitLLTTable -1002ccc0 T Hal_GetChnlGroup8195A -1002ccfc T rtw_config_map_read -1002cde8 T rtw_config_map_write -1002ce94 T Hal_InitPGData -1002cef2 T Hal_EfuseParseIDCode -1002cf0a T Hal_ReadPowerValueFromPROM_8195A -1002cfa8 T Hal_EfuseParseTxPowerInfo_8195A -1002d040 T Hal_EfuseParseEEPROMVer_8195A -1002d056 T Hal_EfuseParsePackageType_8195A -1002d0c0 T Hal_EfuseParseChnlPlan_8195A -1002d0f0 T Hal_EfuseParseCustomerID_8195A -1002d106 T Hal_EfuseParseXtal_8195A -1002d11e T Hal_EfuseParseThermalMeter_8195A -1002d146 T Hal_ReadRFGainOffset -1002d196 T BWMapping_8195A -1002d1b6 T SCMapping_8195A -1002d1de T rtl8195a_update_txdesc -1002d4ae T rtl8195a_fill_fake_txdesc -1002d56c T SetHwReg8195A -1002e22c T GetHwReg8195A -1002e2c0 T SetHalDefVar8195A -1002e3a0 T GetHalDefVar8195A -1002e3c4 T PHY_QueryBBReg_8195A_Safe -1002e3f0 T PHY_SetBBReg_8195A_Safe -1002e41c t phy_RFSerialRead_8195A -1002e4d0 T PHY_QueryRFReg_8195A -1002e4e8 T PHY_SetRFReg_8195A -1002e540 T PHY_MACConfig8195A -1002e55a T PHY_BBConfig8195A -1002e66a T PHY_RFConfig8195A -1002e66e T PHY_SetTxPowerIndex_8195A -1002e778 T phy_TxPwrAdjInPercentage -1002e7b8 T PHY_GetTxPowerIndex_8195A -1002e8a8 T PHY_SetTxPowerLevel8195A -1002e8ae T phy_SpurCalibration_8195A -1002eb66 T phy_SetRegBW_8195A -1002eba4 T phy_PostSetBwMode8195A -1002ed00 T phy_SwChnl8195A -1002eda8 T phy_SwChnlAndSetBwMode8195A -1002edf8 T PHY_HandleSwChnlAndSetBW8195A -1002eea8 T PHY_SetBWMode8195A -1002eeca T PHY_SwChnl8195A -1002eee4 T PHY_SetSwChnlBWMode8195A -1002ef02 t HalTimerEnable -1002ef14 T InitTDMATimer -1002ef3c T ChangeStateByTDMA -1002ef4c T GetMinRateInRRSR -1002ef80 T CheckInReqState -1002ef90 T InitCheckStateTimer -1002efc0 T InitGTimer1ms -1002f00c T DeInitGTimer1ms -1002f054 T ChangeTransmiteRate -1002f090 T PowerBitSetting -1002f10c T ChkandChangePS -1002f170 T IssueRsvdPagePacketSetting -1002f1e4 T IssuePSPoll -1002f210 T WaitTxStateMachineOk -1002f264 T IssueNullData -1002f2f4 T PsCloseRF -1002f328 T PsOpenRF -1002f358 T ChkTxQueueIsEmpty -1002f370 T InitPS -1002f3e0 T ConfigListenBeaconPeriod -1002f404 T PS_S2_Condition_Match -1002f438 T PS_S4_Condition_Match -1002f4b4 T PS_32K_Condition_Match -1002f4f0 T PS_S2ToS3ToS0State -1002f558 T PS_S2ToS0State -1002f574 T PS_S3ToS2orS0State -1002f5a4 T PS_S0ToS1ToS2State -1002f600 T PS_S1ToS0orS2State -1002f630 T PS_S2ToS4State -1002f67c T PS_S0ToS6State -1002f69c T PS_S6ToS0State -1002f6b4 T CheckTSFIsStable -1002f704 T WaitHWStateReady -1002f714 T SysClkDown -1002f784 T SysClkUp -1002f7d0 T ResetPSParm -1002f844 T PS_S4ToS2State -1002f868 T SleepTo32K -1002f8c8 T Change_PS_State -1002fa74 T Legacy_PS_Setting -1002fae8 T PSModeSetting -1002fb8c T ChangePSStateByRPWM -1002fbd0 T ChangeTDMAState -1002fcf0 T TDMAChangeStateTask -1002fd1a T EnterPS -1002fd3c T SetSmartPSTimer -1002fd78 T GTimer7Handle -1002fdd4 T SmartPS2InitTimerAndToGetRxPkt -1002fe10 T PS_OnBeacon -1002fec0 T PSBcnEarlyProcess -1002ff7c T PSMtiBcnEarlyProcess -10030028 T PSRxBcnProcess -10030178 T TxPktInPSOn -100301b6 T PsBcnToProcess -10030270 T GTimer6Handle -100302bc T RPWMProcess -100302f8 T PSSetMode -10030370 T SpeRPT -10030490 T ISR_BcnEarly -100304fc T ISR_MtiBcnEarly -10030530 T ISR_RxBcn -1003054c T ISR_RxBCMD1 -1003057c T ISR_RxBCMD0 -100305d0 T ISR_RxUCMD1 -1003060e T ISR_RxUCMD0 -1003064a T ISR_TxPktIn -1003065c T ISR_TXCCX -10030660 T H2CHDL_SetPwrMode -10030788 T CheckInReqStateTask -100307ce T HalGetNullTxRpt -100307ec T ISR_TBTT -10030864 T H2CHDL_BcnIgnoreEDCCA -10030874 T PMUInitial -100308c4 T PMUTask -100309d0 T PHY_RF6052SetBandwidth8195A -10030a14 T PHY_RF6052_Config8195A -10030acc t process_rssi -10030b02 T rtl8195a_query_rx_desc_status -10030bb2 T rtl8195a_query_rx_phy_status -10030d0a T hal_com_get_channel_plan -10030d3e T HAL_IsLegalChannel -10030d5c T MRateToHwRate -10030d70 T HwRateToMRate -10030d84 T HalSetBrateCfg -10030e30 T Hal_MappingOutPipe -10030e4c T hal_init_macaddr -10030e78 T hw_var_port_switch -10031100 T SetHwReg -1003110a T GetHwReg -1003110c T switch_power_saving_mode -10031150 T rtw_bb_rf_gain_offset -10031198 T PHY_GetRateValuesOfTxPowerByRate -10031330 T PHY_StoreTxPowerByRateNew -100313cc T PHY_InitTxPowerByRate -100313e4 T PHY_StoreTxPowerByRate -100313fc T PHY_GetTxPowerIndexBase -1003149c T PHY_GetTxPowerTrackingOffset -100314c8 T PHY_GetRateIndexOfTxPowerByRate -100314dc T PHY_GetTxPowerByRate -1003153c T phy_StoreTxPowerByRateBase -10031588 T PHY_SetTxPowerByRate -100315c4 T phy_ConvertTxPowerByRateInDbmToRelativeValues -100316c4 T PHY_TxPowerByRateConfiguration -100316d6 T PHY_SetTxPowerIndexByRateArray -10031714 T PHY_SetTxPowerIndexByRateSection -10031778 T PHY_SetTxPowerLevelByPath -100317ae T phy_GetWorldWideLimit -100317da T PHY_GetTxPowerLimit -10031904 T PHY_ConvertTxPowerLimitToPowerIndex -10031a54 T PHY_InitTxPowerLimit -10031a9c T PHY_SetTxPowerLimit -10031b18 T PHY_GetTxPowerIndex -10031b28 T rtw_hal_chip_configure -10031b3e T rtw_hal_read_chip_info -10031b54 T rtw_hal_read_chip_version -10031b6a T rtw_hal_def_value_init -10031b80 T rtw_hal_free_data -10031b96 T rtw_hal_dm_init -10031bac T rtw_hal_dm_deinit -10031bc2 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PHY_RFConfig8195A +1002e3fa T PHY_SetTxPowerIndex_8195A +1002e504 T phy_TxPwrAdjInPercentage +1002e544 T PHY_GetTxPowerIndex_8195A +1002e634 T PHY_SetTxPowerLevel8195A +1002e63a T phy_SpurCalibration_8195A +1002e8f2 T phy_SetRegBW_8195A +1002e930 T phy_PostSetBwMode8195A +1002ea8c T phy_SwChnl8195A +1002eb34 T phy_SwChnlAndSetBwMode8195A +1002eb84 T PHY_HandleSwChnlAndSetBW8195A +1002ec34 T PHY_SetBWMode8195A +1002ec56 T PHY_SwChnl8195A +1002ec70 T PHY_SetSwChnlBWMode8195A +1002ec8e t HalTimerEnable +1002eca0 T InitTDMATimer +1002ecc8 T ChangeStateByTDMA +1002ecd8 T GetMinRateInRRSR +1002ed0c T CheckInReqState +1002ed1c T InitCheckStateTimer +1002ed4c T InitGTimer1ms +1002ed98 T DeInitGTimer1ms +1002ede0 T ChangeTransmiteRate +1002ee1c T PowerBitSetting +1002ee98 T ChkandChangePS +1002eefc T IssueRsvdPagePacketSetting +1002ef70 T IssuePSPoll +1002ef9c T WaitTxStateMachineOk +1002eff0 T IssueNullData +1002f080 T PsCloseRF +1002f0b4 T PsOpenRF +1002f0e4 T ChkTxQueueIsEmpty +1002f0fc T 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rtw_hal_set_bwmode +10031bb4 T rtw_hal_set_chan +10031bc2 T rtw_hal_set_chnl_bw +10031bd8 T rtw_hal_dm_watchdog +10031bee T rtw_hal_macid_sleep +10031c0e T rtw_hal_macid_wakeup +10031c2e T decide_chip_type_by_device_id +10031c34 t rtw_net_get_stats +10031c84 t netdev_if2_close +10031ca4 t netdev_close +10031d00 t rtw_if1_deinit +10031d9a T rtw_os_indicate_connect +10031d9e T rtw_os_indicate_scan_done +10031da2 T rtw_reset_securitypriv +10031e96 T rtw_os_indicate_disconnect +10031ee0 T rtw_init_netdev +10032030 T rtw_drv_if2_init +10032238 T rtw_drv_if2_stop +1003228e T rtw_drv_if2_free +100322dc T _netdev_open +100323f8 T _netdev_if2_open +100324b4 T netdev_if2_open +100324dc T netdev_open +10032504 T rtw_drv_probe +10032684 T rtw_dev_remove +100326c8 T rtw_drv_entry +100326f4 T rtw_drv_halt +10032724 t rtw_wx_set_autoreconnect +10032752 t rtw_wx_get_autoreconnect +10032760 t rtw_forwarding_set +10032782 t rtw_set_ch_deauth +100327a4 t get_priv_size +100327b8 t rtw_wx_del_custome_ie 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rtw_os_recv_resource_alloc +10034dd2 T rtw_os_recv_resource_free +10034dd4 T rtw_tkip_countermeasure +10034e74 T rtw_handle_tkip_mic_err +10034f1c T rtw_recv_indicatepkt +1003516c T skb_fail_inc +10035188 T skb_fail_get_and_rst +100351a4 T init_skb_pool +100351fc T init_skb_data_pool +10035254 T alloc_skb +10035354 T kfree_skb +100353bc T kfree_skb_chk_key +100353c0 T skb_put +100353f4 T skb_reserve +10035402 T dev_alloc_skb +1003541e T skb_end_pointer +10035422 T skb_set_tail_pointer +1003542a T skb_pull +10035442 T skb_copy +1003546a T rtw_remainder_len +10035476 T _rtw_open_pktfile +10035488 T _rtw_pktfile_read +100354b6 T rtw_set_tx_chksum_offload +100354b8 T rtw_os_xmit_resource_alloc +100354c2 T rtw_os_xmit_resource_free +100354c4 T rtw_os_pkt_complete +100354cc T rtw_os_xmit_complete +100354de T rtw_os_xmit_schedule +1003551a T rtw_xmit_entry +10035566 T rtw_alloc_etherdev_with_old_priv +1003557c T rtw_alloc_etherdev +100355a8 T rtw_free_netdev +100355c8 T timer_wrapper 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RateUp_search_RateMask +10036c9a T RateDown_search_RateMask +10036cec T StartRateByRSSI +10036d16 T RateUpRAM8195A +10036daa T RateDownTrying +10036de8 T TryDone +10036e80 T RateDownStepRAM8195A +10036f20 T RateDecisionRAM8195A +10037004 T ArfrRefresh +1003720c T H2CHDL_Set_MACID_Config +100372d0 T PHY_DM_RA_SetRSSI_8195A +100372fe t CheckPositive.isra.0 +100373e0 T ODM_ReadAndConfig_MP_8195A_AGC_TAB +10037458 T ODM_ReadAndConfig_MP_8195A_PHY_REG +100374d0 T ODM_GetVersion_MP_8195A_PHY_REG +100374d4 T ODM_ReadAndConfig_MP_8195A_PHY_REG_PG +10037508 T odm_ConfigRFReg_8195A +10037540 T odm_ConfigRF_RadioA_8195A +10037550 T odm_ConfigMAC_8195A +10037554 T odm_ConfigBB_AGC_8195A +10037564 T odm_ConfigBB_PHY_REG_PG_8195A +10037592 T odm_ConfigBB_PHY_8195A +100375da T odm_ConfigBB_TXPWR_LMT_8195A +10037600 T ODM_CmnInfoInit +100376f4 T ODM_CmnInfoHook +10037798 T ODM_CmnInfoPtrArrayHook +100377a8 T ODM_CmnInfoUpdate +10037878 T odm_CommonInfoSelfInit +100378ec T ODM_DMInit +1003793a T odm_CommonInfoSelfUpdate +1003798c T ODM_DMWatchdog +100379f8 T PhyDM_Get_Structure +10037a1c T Phydm_CheckAdaptivity +10037a4a T Phydm_NHMCounterStatisticsInit +10037ac0 T Phydm_SetEDCCAThreshold +10037af8 T Phydm_MACEDCCAState +10037b36 T Phydm_AdaptivityInit +10037c14 T Phydm_Adaptivity +10037d34 T ODM_CfoTrackingInit +10037d5e T ODM_CfoTracking +10037d7e T ODM_ParsingCFO +10037db0 T ODM_InitDebugSetting +10037dc4 T ODM_Write_DIG +10037e64 T odm_ForbiddenIGICheck +10037ef6 T ODM_Write_CCK_CCA_Thres +10037f30 T odm_DIGInit +10037fca T odm_DigAbort +10037fec T odm_DIGbyRSSI_LPS +10038098 T odm_FAThresholdCheck +100380c4 T odm_DIG +10038324 T odm_FalseAlarmCounterStatistics +10038350 T odm_CCKPacketDetectionThresh +100383a8 T odm_RxPhyStatus8195A_Parsing +100384ac T odm_Process_RSSIForDM_8195A +100385ee T ODM_PhyStatusQuery_8195A +1003861a T ODM_PhyStatusQuery +1003861e T ODM_ConfigRFWithHeaderFile +1003863c T ODM_ConfigRFWithTxPwrTrackHeaderFile +1003866e T ODM_ConfigBBWithHeaderFile +10038696 T ODM_ConfigMACWithHeaderFile +100386a8 T ODM_Read1Byte +100386ae T ODM_Read4Byte +100386b4 T ODM_Write1Byte +100386ba T ODM_Write2Byte +100386c0 T ODM_Write4Byte +100386c6 T ODM_SetMACReg +100386cc T ODM_SetBBReg +100386d2 T ODM_GetBBReg +100386d8 T ODM_SetRFReg +100386de T ODM_GetRFReg +100386e4 T ODM_MoveMemory +100386ee T ODM_delay_ms +100386f2 T ODM_delay_us +100386f8 T getSwingIndex +10038750 T odm_TXPowerTrackingThermalMeterInit +10038802 T odm_TXPowerTrackingInit +10038806 T odm_TXPowerTrackingCheckIOT +1003883a T ODM_TXPowerTrackingCheck +10038848 T odm_RSSIMonitorInit +10038850 T ODM_RAPostActionOnAssoc +10038858 T odm_RSSIMonitorCheckIOT +1003892c T odm_RSSIMonitorCheck +10038940 T odm_RateAdaptiveMaskInit +10038968 T ODM_RAStateCheck +100389aa T odm_RefreshRateAdaptiveMaskIOT +100389fa T odm_RefreshRateAdaptiveMask +10038a10 T ODM_Get_Rate_Bitmap +10038b00 t _ReadEfuseInfo8195a +10038bc8 t rtl8195a_interface_configure +10038bfc t rtl8195a_hal_deinit +10038c38 T _InitPowerOn +10038cb8 t ReadAdapterInfo8195a +10038ce8 T _InitDriverInfoSize +10038cf2 T _InitNetworkType +10038d14 T _InitWMACSetting +10038d84 T _InitAdaptiveCtrl +10038dc8 T _InitEDCA +10038e44 T _InitRateFallback +10038e88 T _InitRetryFunction +10038eb4 T _InitOperationMode +10038efc T _InitInterrupt +10038f3c t rtl8195a_hal_init +10039214 T rtl8195ab_set_hal_ops +100392ec T FillH2CCmd8195A +1003930c T CheckFwRsvdPageContent +1003930e T rtl8195a_set_FwRsvdPage_cmd +10039318 T rtl8195a_set_FwMediaStatusRpt_cmd +10039344 T rtl8195a_set_FwMacIdConfig_cmd +10039404 T rtl8195a_set_FwPwrMode_cmd +10039494 T rtl8195a_download_rsvd_page +1003979c T rtl8195a_set_FwJoinBssRpt_cmd +100397a6 T rtl8195a_Add_RateATid +100397f8 T rtw_rpt_h_addr +10039844 T rtw_txrpt_read8 +10039862 T rtw_txrpt_write8 +10039886 T rtw_ratemask_read8 +100398a4 T rtw_ratemask_write8 +100398c8 T ReadRateMask8 +100398d2 T WriteRateMask8 +100398d6 T ReadTxrpt8 +100398e0 T WriteTxrpt8 +100398e4 T ResetTxrpt +1003991c T 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WifiMcuCmdBitMap.20974 +1005579c D p_wlan_init_done_callback +100557a0 D rtw_power_percentage_idx +100557a4 D p_wlan_uart_adapter_callback +100557a8 D rtw_adaptivity_en +100557ac D p_wlan_mgmt_filter +100557b0 D rtw_initmac +100557b4 D rtw_adaptivity_th_l2h_ini +100557b8 d drvpriv +100557cc D skbbuf_used_num +100557d0 V skb_pool +10055988 D skbdata_used_num +1005598c d wrapper_skbbuf_list +10055994 D max_skbdata_used_num +10055998 D max_skbbuf_used_num +1005599c d skb_fail_count +100559a0 D timer_table +100559a8 D rltk_wlan_info +100559d8 d timer_used_num +100559dc D max_timer_used_num +100559e0 D Noisy_State +100559e4 D pExportWlanIrqSemaphore +100559e8 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +10055a06 D .ram.bss$$Limit +10055a06 D __bss_end__ +10055a08 B __ram_heap2_start__ 10070000 A __ram_heap2_end__ 1fff0000 D __ram_tcm_start__ -1fff0000 D ram_heap -1fff0000 T __ram_image1_text_start__ -1fff0000 T __ram_start_table_start__ -1fff0014 T __image1_validate_code__ -1fff0014 T __ram_start_table_end__ -1fff001c T gBoot_Gpio_Adapter -1fff0148 T .ram_image1.bss$$Base -1fff0148 T .ram_image1.bss$$Limit -1fff0148 T SetDebugFlgs -1fff0148 T __image1_bss_end__ -1fff0148 T __image1_bss_start__ -1fff0148 T __ram_image1_data_end__ -1fff0168 T InitSpic -1fff01ec T StartupHalLogUartInit -1fff0280 T StartupHalInitPlatformLogUart -1fff02b4 T RtlConsolRam -1fff02fc T RtlBootToSram -1fff04a4 T SYSCpuClkConfig -1fff04e8 T IsForceLoadDefaultImg2 -1fff0570 T _GetChipId -1fff0598 T StartupHalSpicInit -1fff05e0 T flashcpy -1fff05f8 T PreProcessForVendor -1fff08b8 t __SpicWaitWipRtl8195A_veneer -1fff08c8 t __SpicFlashInitRtl8195A_veneer -1fff08d8 t __SpicReadIDRtl8195A_veneer -1fff08e8 t __SpicNVMCalLoadAll_veneer -1fff08f8 t __HalCpuClkConfig_veneer -1fff0908 t __rtl_memset_veneer -1fff0918 t __UartLogCmdExecute_veneer -1fff0928 t __rtl_strcmp_veneer -1fff0938 t __SpicInitRtl8195A_veneer -1fff0948 t __SpicOneBitCalibrationRtl8195A_veneer -1fff0958 t __SpicCalibrationRtl8195A_veneer -1fff1414 d lfree -1fff1418 d ram_end -1fff141c d mem_mutex -1fff1420 d ram -1fff1424 d memp_memory -1fff5414 d memp_tab -1fff5454 D __tcm_heap_start__ -1fff5454 D tcm_heap +1fff0000 D __tcm_heap_start__ +1fff0000 D tcm_heap 1ffffd00 D __tcm_heap_end__ 30000000 ? __sdram_bss_end__ 30000000 ? __sdram_bss_start__ diff --git a/paths.mk b/paths.mk index f4dcd40..236c126 100644 --- a/paths.mk +++ b/paths.mk @@ -1,7 +1,7 @@ #--------------------------- # User defined #--------------------------- -SDK_PATH = ../RTL00_SDKV35a/ +SDK_PATH = RTL00_SDKV35a/ #GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH #OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/ diff --git a/sdkset.mk b/sdkset.mk index 09286a2..95b6fe7 100644 --- a/sdkset.mk +++ b/sdkset.mk @@ -363,8 +363,8 @@ ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvv ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c -ADD_SRC_C += component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c -ADD_SRC_C += component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c +ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c # ------------------------------------------------------------------- # SAMPLES # -------------------------------------------------------------------