From 9c9e8912a01412cce38477aa9ed1f79f4b8f8cdb Mon Sep 17 00:00:00 2001 From: pvvx Date: Mon, 6 Mar 2017 02:22:35 +0300 Subject: [PATCH] update --- .project | 1 + .settings/language.settings.xml | 6 +- .../component/common/api/wifi/wifi_conf.c | 6 +- .../realtek/8195a/cmsis/device/rtl_stdlib.h | 6 +- .../8195a/fwlib/ram_lib/rtl_bios_data.c | 26 +- .../realtek/8195a/fwlib/ram_lib/rtl_boot.c | 15 +- .../soc/realtek/8195a/fwlib/ram_lib/startup.c | 97 +- .../common/GCC/rlx8195A-symbol-v04-img2.ld | 18 +- .../8195a/misc/driver/rtl_console_new.c | 0 .../misc/rtl_std_lib/lib_rtlstd/ram_libc.c | 23 +- .../rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c | 311 ++ build/bin/ota.bin | Bin 297808 -> 297140 bytes build/bin/ram_1.p.bin | Bin 6156 -> 6300 bytes build/bin/ram_2.bin | Bin 297772 -> 297104 bytes build/bin/ram_2.ns.bin | Bin 297788 -> 297120 bytes build/bin/ram_2.p.bin | Bin 297788 -> 297120 bytes build/bin/ram_all.bin | Bin 342860 -> 342192 bytes build/obj/build.nmap | 4709 ++++++++--------- flasher/RTL_Reset.JLinkScript | 2 +- flasher/RTL_RunRAM.JLinkScript | 2 +- project/src/user/atcmd_user.c | 18 +- project/src/user/main.c | 32 +- sdkbuild.mk | 12 +- sdkset.mk | 26 +- 24 files changed, 2859 insertions(+), 2451 deletions(-) rename project/src/driver/console_api.c => RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c (100%) create mode 100644 RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c diff --git a/.project b/.project index c952035..65aac85 100644 --- a/.project +++ b/.project @@ -8,6 +8,7 @@ org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index f0f54f6..f2c5d7d 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + @@ -16,7 +16,7 @@ - + @@ -27,7 +27,7 @@ - + diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c index 459a746..9a09c87 100644 --- a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c +++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c @@ -32,7 +32,7 @@ extern int inic_stop(void); #define printf(...) #endif -#define sscanf _sscanf +//#define sscanf _sscanf #define SHOW_PRIVATE_OUT 1 // =0 - off, = 1 On @@ -62,6 +62,7 @@ extern int inic_stop(void); * Variables Declarations ******************************************************/ + extern struct netif xnetif[NET_IF_NUM]; /****************************************************** @@ -70,7 +71,8 @@ extern struct netif xnetif[NET_IF_NUM]; static internal_scan_handler_t scan_result_handler_ptr = { 0, 0, 0, RTW_FALSE, 0, 0, 0, 0, 0 }; static internal_join_result_t* join_user_data; -extern rtw_mode_t wifi_mode; +rtw_mode_t wifi_mode = RTW_MODE_NONE; +//extern rtw_mode_t wifi_mode; int error_flag = RTW_UNKNOWN; uint32_t rtw_join_status; #if ATCMD_VER == ATVER_2 diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h b/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h index bcd0c33..aa54e7c 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h @@ -9,7 +9,7 @@ #ifndef _RTL_STDLIB_H_ #define _RTL_STDLIB_H_ - +#if 0 #include #include #include @@ -19,7 +19,7 @@ // #define strlen(str) prvStrLen((const u8*)str) #define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2) -#define sscanf(src, format...) //TODO: Strtoul(src,0,16) / Strtoul(src,0,10) +//#define sscanf(src, format...) //TODO: Strtoul(src,0,16) / Strtoul(src,0,10) #define strtok(str, delim) prvStrTok(str, delim) #define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src) #define atoi(str) prvAtoi(str) @@ -37,5 +37,5 @@ // #define malloc pvPortMalloc #define free vPortFree - +#endif #endif //_RTL_STDLIB_H_ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c index 1757cac..3328a70 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c @@ -10,7 +10,7 @@ */ #include "rtl_bios_data.h" - +extern void * UartLogRomCmdTable; /* ROM + startup.c */ RAM_DEDECATED_VECTOR_TABLE_SECTION IRQ_FUN NewVectorTable[64]; // 10000000 RAM_USER_IRQ_FUN_TABLE_SECTION IRQ_FUN UserIrqFunTable[64]; // 10000100 @@ -37,9 +37,29 @@ INFRA_RAM_BSS_SECTION u32 _rand_z4, _rand_z3, _rand_z2, _rand_z1, _rand_first; / /* ROM + RTL_CONSOL */ MON_RAM_BSS_SECTION u8 *ArgvArray[MAX_ARGV]; // 100006AC *ArgvArray[10] ! MON_RAM_BSS_SECTION u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN]; // 10000430 UartLogHistoryBuf[5][127] ! -MON_RAM_BSS_SECTION volatile UART_LOG_CTL UartLogCtl; // 10000408 +MON_RAM_BSS_SECTION volatile UART_LOG_CTL UartLogCtl; // 10000408 +/* += { + .NewIdx = 0, + .SeeIdx = 0, + .RevdNo = UART_LOG_HISTORY_LEN, + .EscSTS = 0, + .ExecuteCmd = 0, + .ExecuteEsc = 0, + .BootRdy = 0, + .Resvd = 0, + .pTmpLogBuf = &UartLogBuf, + .pfINPUT = (void*) &DiagPrintf, + .pCmdTbl = (PCOMMAND_TABLE) &UartLogRomCmdTable, + .CmdTblSz = 6, + .CRSTS = 0, + .pHistoryBuf = UartLogHistoryBuf, + .TaskRdy = 0 +// .Sema +}; +*/ MON_RAM_BSS_SECTION UART_LOG_BUF UartLogBuf; // 10000388 -MON_RAM_BSS_SECTION volatile UART_LOG_CTL *pUartLogCtl; // 10000384 +MON_RAM_BSS_SECTION volatile UART_LOG_CTL *pUartLogCtl = &UartLogCtl; // 10000384 /* ROM + LIB C */ LIBC_RAM_BSS_SECTION int __rtl_errno; // 10000bc4 __rtl_sread_v1_00(), __rtl_write_v1_00(), __rtl_lseek_v1_00(), __rtl_close_v1_00(), __rtl_sbrk_v1_00().. LIBC_RAM_BSS_SECTION struct mallinfo __rtl_malloc_current_mallinfo; // 10000b9c __rom_mallocr_init_v1_00() diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c index 9d71100..3f16ea6 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c @@ -16,10 +16,10 @@ #define DEFAULT_BAUDRATE UART_BAUD_RATE_38400 -#define BOOT_RAM_TEXT_SECTION __attribute__((section(".ram.boot.text"))) -//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".ram.boot.rodata"))) -//#define BOOT_RAM_DATA_SECTION __attribute__((section(".ram.boot.data"))) -//#define BOOT_RAM_BSS_SECTION __attribute__((section(".ram.boot.bss"))) +#define BOOT_RAM_TEXT_SECTION // __attribute__((section(".boot.text"))) +//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".boot.rodata"))) +//#define BOOT_RAM_DATA_SECTION __attribute__((section(".boot.data"))) +//#define BOOT_RAM_BSS_SECTION __attribute__((section(".boot.bss"))) //------------------------------------------------------------------------- // Function declarations @@ -32,14 +32,11 @@ extern _LONG_CALL_ VOID VectorTableInitRtl8195A(u32 StackP); extern _LONG_CALL_ VOID HalInitPlatformLogUartV02(VOID); extern _LONG_CALL_ VOID HalInitPlatformTimerV02(VOID); -//#pragma arm section code = ".ram.boot.text"; -//#pragma arm section rodata = ".ram.boot.rodata", rwdata = ".ram.boot.data", zidata = ".ram.boot.bss"; +//#pragma arm section code = ".boot.text"; +//#pragma arm section rodata = ".boot.rodata", rwdata = ".boot.data", zidata = ".boot.bss"; typedef void (*START_FUNC)(void); -PRAM_FUNCTION_START_TABLE __attribute__((section(".data.pRamStartFun"))) pRamStartFun = - (PRAM_FUNCTION_START_TABLE) 0x10000BC8; - /* Start table: */ START_RAM_FUN_SECTION RAM_FUNCTION_START_TABLE __ram_start_table_start__ = { RtlBootToSram + 1, // StartFun(), Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c index 520fb13..9748cb7 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c @@ -18,7 +18,6 @@ #include "wifi_conf.h" #include "rtl_consol.h" - //#define INFRA_START_SECTION __attribute__((section(".infra.ram.start"))) //------------------------------------------------------------------------- @@ -28,7 +27,7 @@ extern void HalWdgIntrHandle(void); extern void xPortPendSVHandler(void); extern void xPortSysTickHandler(void); extern void vPortSVCHandler(void); -extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID) +//extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID) void HalNMIHandler_Patch(void); void SDIO_Device_Off(void); void VectorTableOverrideRtl8195A(u32 StackP); @@ -37,11 +36,10 @@ void SYSPlatformInit(void); //------------------------------------------------------------------------- // Data declarations extern u8 __bss_start__, __bss_end__; +//extern HAL_TIMER_OP HalTimerOp; -IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = { InfraStart - + 1 }; - -// HAL_GPIO_ADAPTER PINMUX_RAM_DATA_SECTION gBoot_Gpio_Adapter; +IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = + { InfraStart + 1 }; //----- HalNMIHandler_Patch void HalNMIHandler_Patch(void) { @@ -50,21 +48,23 @@ void HalNMIHandler_Patch(void) { HalWdgIntrHandle(); // ROM: HalWdgIntrHandle = 0x3485; } +/* //----- VectorTableOverrideRtl8195A void INFRA_START_SECTION VectorTableOverrideRtl8195A(u32 StackP) { NewVectorTable[2] = HalNMIHandler_Patch; } +*/ //----- SYSPlatformInit void INFRA_START_SECTION SYSPlatformInit(void) { HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, (HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0) & (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04))) - | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 + | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, (HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1) & (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1))) - | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; + | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; } //----- SDIO_Device_Off @@ -80,22 +80,67 @@ void INFRA_START_SECTION SDIO_Device_Off(void) { & (~(BIT_HCI_SDIOD_PIN_EN))); } +__weak void __low_level_init(void) { + // weak function +} + +// weak main function ! +__weak int main(void) { + HalPinCtrlRtl8195A(JTAG, 0, 1); + + DiagPrintf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n"); + while (pUartLogCtl->ExecuteEsc != 1); + pUartLogCtl->RevdNo = 0; + pUartLogCtl->BootRdy = 1; + DiagPrintf("\r"); + while (1) { + while (pUartLogCtl->ExecuteCmd != 1); + UartLogCmdExecute(pUartLogCtl); + DiagPrintf("\r"); + pUartLogCtl->ExecuteCmd = 0; + } + + return 0; +} + //----- InfraStart void INFRA_START_SECTION InfraStart(void) { NewVectorTable[2] = HalNMIHandler_Patch; - HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0, - HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4); - if (HalCommonInit() != HAL_OK) - DBG_8195A("Hal Common Init Failed.\n"); +#ifdef CONFIG_TIMER_MODULE + HalTimerOpInit_Patch((VOID*) (&HalTimerOp)); +#endif +// HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0, HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4); DBG_8195A("==!== Enter Image 2 ====\n"); - ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) +// ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__); - int clk = (HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) - >> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & 1; - if (clk) { + int flash_en = HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) + & (1 << BIT_SOC_FLASH_EN); + if (flash_en) { + if(!SpicCmpDataForCalibrationRtl8195A()) { + DBG_8195A("ReInit SPIC...\n"); + SpicInitRtl8195AV02(1,0); +// if(!SpicCmpDataForCalibrationRtl8195A()) { + // TODO: Spic Not Init! + // DBG_8195A("Spic error Init!\n"); +// }; + }; SpicNVMCalLoadAll(); SpicReadIDRtl8195A(); - } + }; + while(!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)); // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! +#if CPU_CLOCK_SEL_DIV5_3 + // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); + *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 +#else + // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz + *((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); +#endif + HalReInitPlatformLogUartV02(); +/* HAL_LOG_UART_ADAPTER pUartAdapter; + pUartAdapter.BaudRate = UART_BAUD_RATE_38400; + HalLogUartSetBaudRate(&pUartAdapter); */ SystemCoreClockUpdate(); SYSPlatformInit(); En32KCalibration(); @@ -103,8 +148,22 @@ void INFRA_START_SECTION InfraStart(void) { SDIO_Device_Off(); VectorTableInitForOSRtl8195A(&vPortSVCHandler, &xPortPendSVHandler, &xPortSysTickHandler); - if (clk) + if (flash_en) SpicDisableRtl8195A(); - _AppStart(); +#ifdef CONFIG_SDR_EN + // clear SDRAM bss + extern u8 __sdram_bss_start__[]; + extern u8 __sdram_bss_end__[]; + if((int)__sdram_bss_end__-(int)__sdram_bss_start__ > 0) + memset(__sdram_bss_start__, 0, (int)__sdram_bss_end__-(int)__sdram_bss_start__); +#endif + // force SP align to 8 byte not 4 byte (initial SP is 4 byte align) + __asm( + "mov r0, sp\n" + "bic r0, r0, #7\n" + "mov sp, r0\n" + ); + __low_level_init(); + main(); } diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld index 8c75b97..2e49eb0 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld @@ -56,7 +56,7 @@ SECTIONS { /* __ram_start_table_start__ = .; */ __ram_image1_text_start__ = .; - KEEP(*(SORT(.start.ram.data*))) + KEEP(*(.boot.start.ram.data*)) /* __image1_validate_code__ = .; */ KEEP(*(.image1.validate.rodata)) @@ -67,18 +67,21 @@ SECTIONS KEEP(*(.libc.reent)) KEEP(*(.rom.unc.data)) KEEP(*(.sdr.rand2.data)) - __ram_image_end__ = .; - /* 0x100020c0: end */ + + PROVIDE (__ram_image_end__ = .); /* 0x100020c0: end */ + /* boot & images data */ + KEEP(*(.hal.ram.data)) KEEP(*(.hal.flash.data)) - /* KEEP(*(.data)); ? */ - build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.o (.rodata*) - KEEP(*(.ram.boot.text)) - build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.o (.rodata*) + KEEP(*(.boot.rodata*)) + KEEP(*(.boot.text*)) + KEEP(*(.boot.data)) __image1_bss_start__ = .; + KEEP(*(.boot.bss*)) __image1_bss_end__ = .; __ram_image1_text_end__ = .; + } > BOOT_RAM .romheap : @@ -249,4 +252,5 @@ SECTIONS { KEEP(*(.loader.head*)) } + ASSERT(__ram_image_end__ != 0x100020c0, "Error rom-bios-boot code & data!") } diff --git a/project/src/driver/console_api.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c similarity index 100% rename from project/src/driver/console_api.c rename to RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c index 2cb15f9..e2bc4b3 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c @@ -6,6 +6,8 @@ #include "rtl_bios_data.h" #include "va_list.h" +#define NOT_CHECK_LIBC_INIT 1 + //------------------------------------------------------------------------- // Function declarations @@ -70,6 +72,7 @@ int libc_has_init; void rtl_libc_init(void) { __rom_mallocr_init_v1_00(); init_rom_libgloss_ram_map(); + libc_has_init = 1; } //----- rtl_snprintf() @@ -79,10 +82,11 @@ int rtl_snprintf(char *str, size_t size, const char *fmt, ...) { int result; int w; FILE f; +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif if (size >= 0) { f._flags = 520; if (size) @@ -109,11 +113,11 @@ int rtl_snprintf(char *str, size_t size, const char *fmt, ...) { //----- rtl_sprintf() int rtl_sprintf(char *str, const char *fmt, ...) { FILE f; - +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif f._flags = 520; f._w = 0x7FFFFFFF; f._bf._size = 0x7FFFFFFF; @@ -130,10 +134,11 @@ int rtl_sprintf(char *str, const char *fmt, ...) { //----- rtl_printf() int rtl_printf(const char *fmt, ...) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif va_list args; va_start (args, fmt); int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, @@ -145,10 +150,11 @@ int rtl_printf(const char *fmt, ...) { //----- rtl_vprintf() int rtl_vprintf(const char *fmt, void *param) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout, fmt, *(va_list *)param); __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); @@ -161,11 +167,11 @@ int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param) { int w; int v11; FILE f; - +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif if (size >= 0) { if (size) w = size - 1; @@ -191,10 +197,11 @@ int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param) { //----- rtl_vfprintf() int rtl_vfprintf(FILE *fp, const char *fmt0, va_list ap) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif return __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, fp, fmt0, ap); } diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c new file mode 100644 index 0000000..83a8513 --- /dev/null +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c @@ -0,0 +1,311 @@ +/* + * RTL871x1Ax: RAM libc + * Created on: 22/02/2017 + * Author: pvvx + */ + +#include "rtl_bios_data.h" +#include "va_list.h" + +#define NOT_CHECK_LIBC_INIT 1 + +//------------------------------------------------------------------------- +// Function declarations + +//void libc_init(); +//int snprintf(char *str, size_t size, const char *fmt, ...); +//int sprintf(char *str, const char *fmt, ...); +//int printf(const char *fmt, ...); +//int vprintf(const char *fmt, void *param); +//int vsnprintf(char *str, size_t size, const char *fmt, void *param); +//int vfprintf(FILE *fp, const char *fmt0, va_list ap); +//int memchr(const void *src_void, int c, size_t length); +//int memcmp(const void *m1, const void *m2, size_t n); +//int memcpy(void *dst0, const void *src0, size_t len0); +//int memmove(void *dst_void, const void *src_void, size_t length); +//int memset(void *m, int c, size_t n); +//char * strcat(char *s1, const char *s2); +//char * strchr(const char *s1, int i); +//int strcmp(const char *s1, const char *s2); +//char * strcpy(char *dst0, const char *src0); +//int strlen(const char *str); +//char * strncat(char *s1, const char *s2, size_t n); +//int strncmp(const char *s1, const char *s2, size_t n); +//char * strncpy(char *dst0, const char *src0, size_t count); +//char * strstr(const char *searchee, const char *lookfor); +//char * strsep(char **source_ptr, const char *delim); +//char * strtok(char *s, const char *delim); +// Extern Calls: +// extern int init_rom_libgloss_ram_map(_DWORD) +// extern int _rom_mallocr_init_v1_00(void) +// extern int __rtl_vfprintf_r_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_fflush_r_v1_00(_DWORD, _DWORD) +// extern int __rtl_memchr_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memcmp_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memcpy_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memmove_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memset_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strcat_v1_00(_DWORD, _DWORD) +// extern int __rtl_strchr_v1_00(_DWORD, _DWORD) +// extern int __rtl_strcmp_v1_00(_DWORD, _DWORD) +// extern int __rtl_strcpy_v1_00(_DWORD, _DWORD) +// extern int __rtl_strlen_v1_00(_DWORD) +// extern int __rtl_strncat_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strncmp_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strncpy_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strstr_v1_00(_DWORD, _DWORD) +// extern int __rtl_strsep_v1_00(_DWORD, _DWORD) +// extern int __rtl_strtok_v1_00(_DWORD, _DWORD) + +//------------------------------------------------------------------------- +// Data declarations + +extern struct _reent * _rtl_impure_ptr; + +extern int libc_has_init; +// extern impure_ptr +// extern impure_ptr + +//------------------------------------------------------------------------- +// Function + +//----- snprintf() +int snprintf(char *str, size_t size, const char *fmt, ...) { + va_list args; + va_start (args, fmt); + int result; + int w; + FILE f; +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + if (size >= 0) { + f._flags = 520; + if (size) + w = size - 1; + else + w = 0; + f._w = w; /* write space left for putc() */ + f._bf._size = w; + f._file = -1; /* fileno, if Unix descriptor, else -1 */ + f._p = str; /* current position in (some) buffer */ + f._bf._base = str; + result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, args); + if (result + 1 < 0) + _rtl_impure_ptr->_errno = 139; + if (size) + *f._p = 0; + } else { + _rtl_impure_ptr->_errno = 139; + result = -1; + } + return result; +} + +//----- sprintf() +int sprintf(char *str, const char *fmt, ...) { + FILE f; + +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + f._flags = 520; + f._w = 0x7FFFFFFF; + f._bf._size = 0x7FFFFFFF; + f._file = -1; + f._p = str; + f._bf._base = str; + va_list args; + va_start (args, fmt); + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, args); + *f._p = 0; +// va_end (args); + return result; +} + +//----- printf() +int printf(const char *fmt, ...) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + va_list args; + va_start (args, fmt); + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, + _rtl_impure_ptr->_stdout, fmt, args); + __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); + // va_end (args); + return result; +} + +//----- vprintf() +int vprintf(const char * fmt, __VALIST param) { +//int vprintf(const char *fmt, void *param) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, + _rtl_impure_ptr->_stdout, fmt, param); + __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); + return result; +} + +//----- vsnprintf() +int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) { + int result; + int w; + int v11; + FILE f; +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + if (size >= 0) { + if (size) + w = size - 1; + else + w = 0; + f._flags = 520; + f._p = str; + f._bf._base = str; + f._w = w; + f._bf._size = w; + f._file = -1; + result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, param); + if (result + 1 < 0) + _rtl_impure_ptr->_errno = 139; + if (size) + *f._p = 0; + } else { + _rtl_impure_ptr->_errno = 139; + result = -1; + } + return result; +} + +//----- vfprintf() +int vfprintf(FILE *fp, const char *fmt0, va_list ap) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + return __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, fp, fmt0, ap); +} + +//----- memchr() +void * memchr(const void * src_void , int c , size_t length) { + return __rtl_memchr_v1_00(src_void, c, length); +} + +//----- memcmp() +int memcmp(const void *m1, const void *m2, size_t n) { + return __rtl_memcmp_v1_00(m1, m2, n); +} + +//----- memcpy() +void * memcpy(void *dst0, const void *src0, size_t len0) { + return __rtl_memcpy_v1_00(dst0, src0, len0); +} + +//----- memmove() +void * memmove(void *dst_void, const void *src_void, size_t length) { + return __rtl_memmove_v1_00(dst_void, src_void, length); +} + +//----- memset() +void * memset(void *m, int c, size_t n) { + return __rtl_memset_v1_00(m, c, n); +} + +//----- strcat() +char * strcat(char *s1, const char *s2) { + return (char *) __rtl_strcat_v1_00(s1, s2); +} + +//----- strchr() +char * strchr(const char *s1, int i) { + return (char *) __rtl_strchr_v1_00(s1, i); +} + +//----- strcmp() +int strcmp(const char *s1, const char *s2) { + return __rtl_strcmp_v1_00(s1, s2); +} + +//----- strcpy() +char * strcpy(char *dst0, const char *src0) { + return (char *) __rtl_strcpy_v1_00(dst0, src0); +} + +//----- strlen() +size_t strlen(const char *str) { + return __rtl_strlen_v1_00(str); +} + +//----- strncat() +char * strncat(char *s1, const char *s2, size_t n) { + return (char *) __rtl_strncat_v1_00(s1, s2, n); +} + +//----- strncmp() +int strncmp(const char *s1, const char *s2, size_t n) { + return __rtl_strncmp_v1_00(s1, s2, n); +} + +//----- strncpy() +char * strncpy(char *dst0, const char *src0, size_t count) { + return (char *) __rtl_strncpy_v1_00(dst0, src0, count); +} + +//----- strstr() +char * strstr(const char *searchee, const char *lookfor) { + return (char *) __rtl_strstr_v1_00(searchee, lookfor); +} + +//----- strsep() +char * strsep(char **source_ptr, const char *delim) { + return (char *) __rtl_strsep_v1_00(source_ptr, delim); +} + +//----- strtok() +char * strtok(char *s, const char *delim) { + return (char *) __rtl_strtok_v1_00(s, delim); +} + +int sscanf(const char *buf, const char *fmt, ...) { + va_list args; + int i; + + va_start(args, fmt); + i = _vsscanf(buf, fmt, args); + va_end(args); + + return i; +} + +#define TOUPPER(CH) \ + (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH)) + +int _stricmp (const char *s1, const char *s2) +{ + while (*s2 != 0 && TOUPPER (*s1) == TOUPPER (*s2)) + s1++, s2++; + return (int) (TOUPPER (*s1) - TOUPPER (*s2)); +} + +unsigned long long __aeabi_llsr(unsigned long long val, unsigned int shift) +{ + u32 lo = ((u32)val >> shift) | ((u32)(val >> 32) << (32 - shift)); + u32 hi = (u32)val >> shift; + + return ((unsigned long long)hi << 32) | lo; +} diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 00d0b3dc2772515c707b357b0891676270c4fbf1..1f361e200a8376e78afa7a95a0a7f7e96f9e58f2 100644 GIT binary patch delta 28700 zcmaI82Ut``_c(mdY++f7S3sn*yMWSNz=9nSFCfMejXjDbzH1F?iY7*|#u)oGjy16d zYd|C`MkF!Ols8eZ#U7$Yjj>!TxtC?jcV@vPZ~njM<9QAFGTbPgTE!}8JFgt-%eWNYA?-FJfy>Rm%P;#AgwK|2kA>p>~*#19he)K(-K+u zlycH(mqjp09^4`Uq-!pfbVW(8I%6yc~AG zmN1)3kgJO=VD^w=?H?j_9B)Qo^7lET z=D);-EyVmd%s+?>+l}S;&lie&Rd=*sZ&33UTguj{4}tau#+Ppq`)UKp(+y=4w1Ucw znzljI>pO`LJcHcHy)5~%JGx|pI98wOj;3r7_v%0Q<2I`KnOoGnE}zTr#u{616lZwN zjbNO&BAN-L#w?bd-$XKQqv-3M>Soe^gD7~vLpE(JJK=qkko@wp-Oc_4-vh{$m1GQ~ zHkIvdJ{AI}ZfeAB$B=bb@MbkXY;&2(zZ;486636f0EDnHTn4A&GIGrvcNXyvH;Z#y ze5{XY5~k-Cu~lG%I43ZSNa1B01IGeP6&)?R`#lKP@Sd|9RaS>;lfuQmK`Y4C6XK1a z`HXgKa4Yb8VE|*^LJ1nFHijf?BrKdO{uJ^$BkUG>h_LWUxF4`k8yNx6MvO6Zz?3-3 z&|c(?{r&o)X`MLHXmVUEmr;-{78pND;JCV=3|%?or%9PEZQhmH;yo3oj#t%G-qU3` z<-V1T;hbZM=CWkd571oYYA(r+`FWwU{43_=G?#XWp3$MOQ;dmDff8{@bQ+uzKa39U zsCGt$d(^4*AnNOadWKp&L`d_m$q_v2g0h=Qz3V$#3<7j?$(x*&3THM52b2)Ac7scv zDqfH7(X6$T2wd!=8jn5cf=f1tNiiu-V)Vrz>K4n5}zXO?RPZ=r?I@e&w#>5hYoI-sb{2NZ2abLoOT#NCo$Y{@)3 zXK=}n9O~Gx%bW@Jxa9Z6(XC<%7bunW>I`-5mp##jYrp9keaI=lf>Q9(cMhn1T_S3O zKyaA6kU>|jW^;>H@4Cu;-{TjY5Qp%$+S zmwemR?-`kSKnXB=myV0zYNG_T=ppv|(}wH))A zLzf4FE@yrAdQ-0_=II9PJAVgf;4Aw{E;C>GqIas0sZg=W%9 zM_(-8mz6g(mon;gtI$%VWkrqLT(Xbo86V!f#Ky&vE8TNka)lEN8Yx2T5Z{Z`+r_!@ zfnC3KKy1tFUYoWk2A&f=H|jSkY+rp+Y5v&L(mey``A$Q-@&jV(OKSK4A%*M^pI zMxCIQ4v01JafNT#|5@4_OXoQ`>H7xVdS3d?$r*e~B<#=^O}T+hd5%zl5b}+RzZ9k6 zU&2t;Tb&n@uXg`u-PQF2j#s~;;T@=~h1hjCllKGDqLO~kzMRgKqn3P~zbM>%&Kq0& zT~W_Jk7oEvdEy5Np*WOxCA{i0%ibTClf?}~1+`=mnjOUAPvte1rpD*{uj=$p)Gm-<~jQC1& zLg82Ti9#$I?$54*ihj@DDQG6mu|v1}HEqyLM{=)Rh!c|YlCjbKYmEYDA_fm>zD+HF zxpiM{O`2sGmvy04UTe(nRvT$sBI%@89ch*W3gL!x+6z#ulRmXYpphGpf;UYR41$Mr zOvx!_;YuaVGNO=+z7UufjM;`-wJ9iZk2`0E4d>TdW?F7NFZkPJTbxw!X$ZX$CL9=}j+nm(T=ISEXG-#w|PP;6-*gD@#ntg<;VjI!)a=(|1 zCeCQVW<=Vw7}M05IF}r3>w$4LDF%p-(}I&cY!H=Luz&1>u?geYCN}`b)F`8dFUE$j z&1yiOttIoZ1X~H}#CB~X3mx?tLPsH0NI=X(MHQ>PY!LcK85Gi4o$HdX)EkxaBYr8)Honq0%q`0Im8vke2y<0- zJ?71+_r(9R>y5Z7x#TzN4Z~4qJWj2BDp=2rva0zBi`4v8tf=`CHGdC7bqb`XN~WsD zaMW=UiwpYo9E%2f0B}g5W~Vb{u?;|J6<0M;#{Dn~`K|a;yR^cjdUb8j1WgTFby}mQ zS3A=yUrr!3E_sm4TsttqTodw=(Go9&<)mVhU2=>1*d;ExPrX_wMpfrvBewQ11;q+Z zIo4HO8YlSYq$nhz@?Ls|OLiS;eqH}ku7y#ysrSv>YFVEhFDy7@Qizw);)OLn>ZG{j zDOe>}m5X9A9j1P(;=3aZKp2HEkpbqtg(2%9t+2Gj2lcl=?ASiM;|XP7?a)5?Siw_; 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T SelectChannel -10027e3c T SetBWMode -10027e78 T set_channel_bwmode -10027ece T get_my_bssid -10027ed2 T get_beacon_interval -10027ef0 T is_client_associated_to_ap -10027f08 T is_client_associated_to_ibss -10027f24 T is_IBSS_empty -10027f46 T decide_wait_for_beacon_timeout -10027f62 T invalidate_cam_all -10027f6a T write_cam -10027fe0 T clear_cam_entry -1002800e T flush_all_cam_entry -1002806c T WMM_param_handler -10028092 T WMMOnAssocRsp -10028160 T HT_caps_handler -10028200 T HT_info_handler -10028224 T HTOnAssocRsp -1002825c T ERP_IE_handler -10028278 T VCS_update -100282ca T rtw_check_bcn_info -100284da T update_beacon_info -10028530 T is_ap_in_tkip -100285a8 T wifirate2_ratetbl_inx -10028614 T update_basic_rate -10028642 T update_supported_rate -1002866c T update_MCS_rate -10028678 T support_short_GI -100286a6 T get_highest_rate_idx -100286c0 T Update_RA_Entry -100286c8 T set_sta_rate -100286d0 T update_tx_basic_rate -10028728 T check_assoc_AP -1002881c T update_IOT_info -1002887a T update_capinfo -100288f8 T update_wireless_mode -10028998 T update_bmc_sta_support_rate -100289c0 T update_TSF -100289d2 T correct_TSF -100289da t _init_txservq -100289f0 t set_qos -10028a40 T _rtw_init_sta_xmit_priv -10028a86 T rtw_mfree_xmit_priv_lock -10028ad2 T qos_acm -10028b0c T xmitframe_addmic -10028c6a T xmitframe_swencrypt -10028c96 T rtw_make_wlanhdr -10028e76 T rtw_txframes_pending -10028eb2 T rtw_txframes_sta_ac_pending -10028ee8 T rtw_txframes_update_attrib_vcs_info -10028f88 T rtw_put_snap -10028fcc T rtw_update_protection -10029012 T rtw_count_tx_stats -10029062 T rtw_free_xmitbuf_ext -100290a4 T rtw_alloc_xmitframe -100290fc T rtw_free_xmitframe -1002914e T rtw_free_xmitframe_queue -1002918c T rtw_get_sta_pending -100291cc T rtw_xmit_classifier -10029232 T rtw_xmitframe_enqueue -10029240 T rtw_alloc_hwxmits -1002929a T rtw_free_hwxmits -100292b0 T _rtw_free_xmit_priv -1002937c T rtw_init_hwxmits -10029394 T _rtw_init_xmit_priv -1002954c T rtw_get_ff_hwaddr -10029560 T xmitframe_enqueue_for_sleeping_sta -10029720 t dequeue_xmitframes_to_sleeping_queue -10029776 T stop_sta_xmit -1002985e T wakeup_sta_to_xmit -10029a74 T xmit_delivery_enabled_frames -10029b90 T rtw_xmit_tasklet -10029be8 T rtw_xmit_mgnt -10029bec T rtw_xmit -10029f16 T rtw_sctx_done_err -10029f22 T rtw_alloc_xmitbuf -10029f7c T rtw_free_xmitbuf -10029fee T rtw_alloc_xmitbuf_ext -1002a074 T rtw_sctx_done -1002a07a t rtl8195a_free_rx_ring -1002a088 t bus_write32 -1002a0e4 t bus_write16 -1002a140 t bus_write8 -1002a19c t bus_read32 -1002a1f6 t bus_read16 -1002a252 t bus_read8 -1002a2ae t rtl8195a_free_tx_ring -1002a33c T rtl8195a_init_desc_ring -1002a47c T rtl8195a_free_desc_ring -1002a498 T rtl8195a_reset_desc_ring -1002a52e T InitLxDmaRtl8195a -1002a690 T rtl8195a_check_txdesc_closed -1002a708 t rtl8195a_tx_isr -1002a7ec T InterruptRecognized8195a -1002a87c T InitInterrupt8195a -1002a89c T EnableDMA8195a -1002a8c4 T EnableInterrupt8195a -1002a904 T DisableDMA8195a -1002a910 T DisableInterrupt8195a -1002a928 T UpdateInterruptMask8195a -1002a98a T CheckRxTgRtl8195a -1002a9c4 T rtl8192ee_check_rxdesc_remain -1002a9f4 T rtl8195a_recv_tasklet -1002ad08 T rtl8195a_tx_int_handler -1002ad34 T InterruptHandle8195a -1002afa8 T rtl8195a_xmit_tasklet -1002afd0 T lxbus_set_intf_ops -1002b010 t GetTxBufDesc -1002b05a t UpdateFirstTxbdtoXmitBuf.isra.3 -1002b08c t check_nic_enough_desc.isra.4 -1002b0dc T rtl8195ab_init_xmit_priv -1002b0ea T rtl8195ab_free_xmit_priv -1002b0f2 T GetDmaTxbdIdx -1002b10e T rtl8195a_enqueue_xmitbuf -1002b132 T rtl8195a_dequeue_xmitbuf -1002b156 T SetTxbdForLxDMARtl8195ab -1002b1d6 T UpdateTxbdHostIndex -1002b214 T rtw_dump_xframe -1002b3e6 T check_tx_desc_resource -1002b420 T rtw_dequeue_xframe -1002b4b4 T rtw_xmitframe_coalesce -1002b768 T rtl8195ab_xmitframe_resume -1002b85e T rtl8195ab_mgnt_xmit -1002b89a T rtl8195ab_hal_xmit -1002b9a8 t Hal_GetEfuseDefinition -1002b9d8 t ResumeTxBeacon -1002ba1c T UpdateHalRAMask8195A -1002bbb4 T HalLittleWifiMCUThreadRtl8195a -1002bc08 T HalCheckInReqStateThreadRtl8195a -1002bc54 T HalTDMAChangeStateThreadRtl8195a -1002bca0 t rtl8195a_read_chip_version -1002bd14 t Hal_EfuseWordEnableDataWrite -1002bf58 t Hal_EfusePowerSwitch -1002bf6c t rtl8195a_free_hal_data -1002bf86 t StopTxBeacon -1002bfd0 T SetHalODMVar8195A -1002c088 T rtl8195a_start_thread -1002c0f0 T rtl8195a_stop_thread -1002c114 t Hal_ReadEFuse -1002c284 T GetHalODMVar8195A -1002c298 t rtw_flash_map_update.part.12 -1002c338 t rtw_flash_map_erase -1002c37c t Hal_EfusePgPacketWrite -1002c5f8 t Hal_EfuseGetCurrentSize -1002c6d8 t rtw_flash_map_write -1002c8a6 T rtl8195a_InitBeaconParameters -1002c916 T _InitBurstPktLen_8195AB -1002c920 T rtl8195a_set_hal_ops -1002ca00 T rtl8195a_init_default_value -1002ca02 T rtl8195a_InitLLTTable -1002ca4c T Hal_GetChnlGroup8195A -1002ca88 T rtw_config_map_read -1002cb74 T rtw_config_map_write -1002cc20 T Hal_InitPGData -1002cc7e T Hal_EfuseParseIDCode -1002cc96 T Hal_ReadPowerValueFromPROM_8195A -1002cd34 T Hal_EfuseParseTxPowerInfo_8195A -1002cdcc T Hal_EfuseParseEEPROMVer_8195A -1002cde2 T Hal_EfuseParsePackageType_8195A -1002ce4c T Hal_EfuseParseChnlPlan_8195A -1002ce7c T Hal_EfuseParseCustomerID_8195A -1002ce92 T Hal_EfuseParseXtal_8195A -1002ceaa T Hal_EfuseParseThermalMeter_8195A -1002ced2 T Hal_ReadRFGainOffset -1002cf22 T BWMapping_8195A -1002cf42 T SCMapping_8195A -1002cf6a T rtl8195a_update_txdesc -1002d23a T rtl8195a_fill_fake_txdesc -1002d2f8 T SetHwReg8195A -1002dfb8 T GetHwReg8195A -1002e04c T SetHalDefVar8195A -1002e12c T GetHalDefVar8195A -1002e150 T PHY_QueryBBReg_8195A_Safe -1002e17c T PHY_SetBBReg_8195A_Safe -1002e1a8 t phy_RFSerialRead_8195A -1002e25c T PHY_QueryRFReg_8195A -1002e274 T PHY_SetRFReg_8195A -1002e2cc T PHY_MACConfig8195A -1002e2e6 T PHY_BBConfig8195A -1002e3f6 T PHY_RFConfig8195A -1002e3fa T PHY_SetTxPowerIndex_8195A -1002e504 T phy_TxPwrAdjInPercentage -1002e544 T PHY_GetTxPowerIndex_8195A -1002e634 T PHY_SetTxPowerLevel8195A -1002e63a T phy_SpurCalibration_8195A -1002e8f2 T phy_SetRegBW_8195A -1002e930 T phy_PostSetBwMode8195A -1002ea8c T phy_SwChnl8195A -1002eb34 T phy_SwChnlAndSetBwMode8195A -1002eb84 T PHY_HandleSwChnlAndSetBW8195A -1002ec34 T PHY_SetBWMode8195A -1002ec56 T PHY_SwChnl8195A -1002ec70 T PHY_SetSwChnlBWMode8195A -1002ec8e t HalTimerEnable -1002eca0 T InitTDMATimer -1002ecc8 T ChangeStateByTDMA -1002ecd8 T GetMinRateInRRSR -1002ed0c T CheckInReqState -1002ed1c T InitCheckStateTimer -1002ed4c T InitGTimer1ms -1002ed98 T DeInitGTimer1ms -1002ede0 T ChangeTransmiteRate -1002ee1c T PowerBitSetting -1002ee98 T ChkandChangePS -1002eefc T IssueRsvdPagePacketSetting -1002ef70 T IssuePSPoll -1002ef9c T WaitTxStateMachineOk -1002eff0 T IssueNullData -1002f080 T PsCloseRF -1002f0b4 T PsOpenRF -1002f0e4 T ChkTxQueueIsEmpty -1002f0fc T InitPS -1002f16c T ConfigListenBeaconPeriod -1002f190 T PS_S2_Condition_Match -1002f1c4 T PS_S4_Condition_Match -1002f240 T PS_32K_Condition_Match -1002f27c T PS_S2ToS3ToS0State -1002f2e4 T PS_S2ToS0State -1002f300 T PS_S3ToS2orS0State -1002f330 T PS_S0ToS1ToS2State -1002f38c T PS_S1ToS0orS2State -1002f3bc T PS_S2ToS4State -1002f408 T PS_S0ToS6State -1002f428 T PS_S6ToS0State -1002f440 T CheckTSFIsStable -1002f490 T WaitHWStateReady -1002f4a0 T SysClkDown -1002f510 T SysClkUp -1002f55c T ResetPSParm -1002f5d0 T PS_S4ToS2State -1002f5f4 T SleepTo32K -1002f654 T Change_PS_State -1002f800 T Legacy_PS_Setting -1002f874 T PSModeSetting -1002f918 T ChangePSStateByRPWM -1002f95c T ChangeTDMAState -1002fa7c T TDMAChangeStateTask -1002faa6 T EnterPS -1002fac8 T SetSmartPSTimer -1002fb04 T GTimer7Handle -1002fb60 T SmartPS2InitTimerAndToGetRxPkt -1002fb9c T PS_OnBeacon -1002fc4c T PSBcnEarlyProcess -1002fd08 T PSMtiBcnEarlyProcess -1002fdb4 T PSRxBcnProcess -1002ff04 T TxPktInPSOn -1002ff42 T PsBcnToProcess -1002fffc T GTimer6Handle -10030048 T RPWMProcess -10030084 T PSSetMode -100300fc T SpeRPT -1003021c T ISR_BcnEarly -10030288 T ISR_MtiBcnEarly -100302bc T ISR_RxBcn -100302d8 T ISR_RxBCMD1 -10030308 T ISR_RxBCMD0 -1003035c T ISR_RxUCMD1 -1003039a T ISR_RxUCMD0 -100303d6 T ISR_TxPktIn -100303e8 T ISR_TXCCX -100303ec T H2CHDL_SetPwrMode -10030514 T CheckInReqStateTask -1003055a T HalGetNullTxRpt -10030578 T ISR_TBTT -100305f0 T H2CHDL_BcnIgnoreEDCCA -10030600 T PMUInitial -10030650 T PMUTask -1003075c T PHY_RF6052SetBandwidth8195A -100307a0 T PHY_RF6052_Config8195A -10030858 t process_rssi -1003088e T rtl8195a_query_rx_desc_status -1003093e T rtl8195a_query_rx_phy_status -10030a96 T hal_com_get_channel_plan -10030aca T HAL_IsLegalChannel -10030ae8 T MRateToHwRate -10030afc T HwRateToMRate -10030b10 T HalSetBrateCfg -10030bbc T Hal_MappingOutPipe -10030bd8 T hal_init_macaddr -10030c04 T hw_var_port_switch -10030e8c T SetHwReg -10030e96 T GetHwReg -10030e98 T switch_power_saving_mode -10030edc T rtw_bb_rf_gain_offset -10030f24 T PHY_GetRateValuesOfTxPowerByRate -100310bc T PHY_StoreTxPowerByRateNew -10031158 T PHY_InitTxPowerByRate -10031170 T PHY_StoreTxPowerByRate -10031188 T PHY_GetTxPowerIndexBase -10031228 T PHY_GetTxPowerTrackingOffset -10031254 T PHY_GetRateIndexOfTxPowerByRate -10031268 T PHY_GetTxPowerByRate -100312c8 T phy_StoreTxPowerByRateBase -10031314 T PHY_SetTxPowerByRate -10031350 T phy_ConvertTxPowerByRateInDbmToRelativeValues -10031450 T PHY_TxPowerByRateConfiguration -10031462 T PHY_SetTxPowerIndexByRateArray -100314a0 T PHY_SetTxPowerIndexByRateSection -10031504 T PHY_SetTxPowerLevelByPath -1003153a T phy_GetWorldWideLimit -10031566 T PHY_GetTxPowerLimit -10031690 T PHY_ConvertTxPowerLimitToPowerIndex -100317e0 T PHY_InitTxPowerLimit -10031828 T PHY_SetTxPowerLimit -100318a4 T PHY_GetTxPowerIndex -100318b4 T rtw_hal_chip_configure -100318ca T rtw_hal_read_chip_info -100318e0 T rtw_hal_read_chip_version -100318f6 T rtw_hal_def_value_init -1003190c T rtw_hal_free_data -10031922 T rtw_hal_dm_init -10031938 T rtw_hal_dm_deinit -1003194e T rtw_hal_init -10031978 T rtw_hal_deinit -10031992 T rtw_hal_set_hwreg -100319a0 T rtw_hal_get_hwreg -100319ae T rtw_hal_set_def_var -100319c0 T rtw_hal_get_def_var -100319d2 T rtw_hal_set_odm_var -100319e0 T rtw_hal_get_odm_var -100319ee T rtw_hal_enable_interrupt -10031a10 T rtw_hal_disable_interrupt -10031a32 T rtw_hal_inirp_init -10031a44 T rtw_hal_inirp_deinit -10031a56 T rtw_hal_irp_reset -10031a64 T rtw_hal_xmit -10031a76 T rtw_hal_mgnt_xmit -10031a88 T rtw_hal_init_xmit_priv -10031a9a T rtw_hal_free_xmit_priv -10031aa8 T rtw_hal_update_ra_mask -10031ad6 T rtw_hal_add_ra_tid -10031ae4 T rtw_hal_clone_data -10031af2 T rtw_hal_start_thread -10031b00 T rtw_hal_stop_thread -10031b0e T rtw_hal_read_bbreg -10031b42 T rtw_hal_write_bbreg -10031b6e T rtw_hal_read_rfreg -10031b80 T rtw_hal_write_rfreg -10031b94 T rtw_hal_interrupt_handler -10031ba6 T rtw_hal_set_bwmode -10031bb4 T rtw_hal_set_chan -10031bc2 T rtw_hal_set_chnl_bw -10031bd8 T rtw_hal_dm_watchdog -10031bee T rtw_hal_macid_sleep -10031c0e T rtw_hal_macid_wakeup -10031c2e T decide_chip_type_by_device_id -10031c34 t rtw_net_get_stats -10031c84 t netdev_if2_close -10031ca4 t netdev_close -10031d00 t rtw_if1_deinit -10031d9a T rtw_os_indicate_connect -10031d9e T rtw_os_indicate_scan_done -10031da2 T rtw_reset_securitypriv -10031e96 T rtw_os_indicate_disconnect -10031ee0 T rtw_init_netdev -10032030 T rtw_drv_if2_init -10032238 T rtw_drv_if2_stop -1003228e T rtw_drv_if2_free -100322dc T _netdev_open -100323f8 T _netdev_if2_open -100324b4 T netdev_if2_open -100324dc T netdev_open -10032504 T rtw_drv_probe -10032684 T rtw_dev_remove -100326c8 T rtw_drv_entry -100326f4 T rtw_drv_halt -10032724 t rtw_wx_set_autoreconnect -10032752 t rtw_wx_get_autoreconnect -10032760 t rtw_forwarding_set -10032782 t rtw_set_ch_deauth -100327a4 t get_priv_size -100327b8 t rtw_wx_del_custome_ie -10032804 t rtw_wx_set_pscan_freq -10032886 t rtw_wx_update_custome_ie -100328f8 t rtw_set_tos_value -10032918 t rtw_get_tx_power -10032a5c t rtw_wx_set_custome_ie -10032b08 t rtw_pm_get -10032b4c t rtw_pm_set -10032c00 t rtw_wx_read32 -10032cac t rtw_wx_write32 -10032d10 t rtw_wx_set_freq.isra.10 -10032db8 T rtw_ex_set -10032e78 T wireless_send_event -10032e82 T indicate_wx_custom_event -10032ede T indicate_wx_scan_result_present -10032f06 T indicate_wx_scan_complete_event -10032f30 T rtw_indicate_sta_assoc -10032f80 T rtw_indicate_sta_disassoc -10032fd8 T rtw_indicate_wx_assoc_event -1003300a T rtw_indicate_wx_disassoc_event -1003303a T rtw_set_wpa_ie -10033150 T strtopsk -100331bc T rtw_wx_get_passphrase -10033208 T rtw_wx_set_ap_essid -100332f8 T mac_reg_dump -100333a4 T bb_reg_dump -10033400 T rf_reg_dump -10033478 t rtw_dbg_port -10033ae0 T rtw_ex_get_drv_ability -10033ba0 T rtw_ex_get -10033e38 T rtw_ioctl -10034dc4 T rtw_os_recv_resource_init -10034dc8 T rtw_os_recv_resource_alloc -10034dd2 T rtw_os_recv_resource_free -10034dd4 T rtw_tkip_countermeasure -10034e74 T rtw_handle_tkip_mic_err -10034f1c T rtw_recv_indicatepkt -1003516c T skb_fail_inc -10035188 T skb_fail_get_and_rst -100351a4 T init_skb_pool -100351fc T init_skb_data_pool -10035254 T alloc_skb -10035354 T kfree_skb -100353bc T kfree_skb_chk_key -100353c0 T skb_put -100353f4 T skb_reserve -10035402 T dev_alloc_skb -1003541e T skb_end_pointer -10035422 T skb_set_tail_pointer -1003542a T skb_pull -10035442 T skb_copy -1003546a T rtw_remainder_len -10035476 T _rtw_open_pktfile -10035488 T _rtw_pktfile_read -100354b6 T rtw_set_tx_chksum_offload -100354b8 T rtw_os_xmit_resource_alloc -100354c2 T rtw_os_xmit_resource_free -100354c4 T rtw_os_pkt_complete -100354cc T rtw_os_xmit_complete -100354de T rtw_os_xmit_schedule -1003551a T rtw_xmit_entry -10035566 T rtw_alloc_etherdev_with_old_priv -1003557c T rtw_alloc_etherdev -100355a8 T rtw_free_netdev -100355c8 T timer_wrapper -1003561c T alloc_etherdev -10035678 T free_netdev -10035692 T dev_alloc_name -1003569c T init_timer_wrapper -100356bc T deinit_timer_wrapper -10035708 T init_timer -100357c0 T mod_timer -100358a0 T cancel_timer_ex -100358e8 T del_timer_sync -1003594c T rtw_init_timer -10035954 T rtw_set_timer -10035958 T rtw_cancel_timer -10035962 T rtw_del_timer -10035968 T rltk_get_idx_bydev -10035978 T rltk_wlan_init -10035a00 T rltk_wlan_deinit -10035ac4 T rltk_wlan_start -10035af8 T rltk_wlan_check_isup -10035b08 T rltk_wlan_tx_inc -10035b1c T rltk_wlan_tx_dec -10035b30 T rltk_wlan_get_recv_skb -10035b40 T rltk_wlan_alloc_skb -10035b80 T rltk_wlan_send_skb -10035bb4 T rltk_netif_rx -10035c60 T rltk_wlan_control -10035cf4 T rltk_wlan_running -10035d0c T rltk_wlan_handshake_done -10035d40 T rltk_wlan_is_connected_to_ap -10035d84 T Efuse_PowerSwitch -10035d90 T Efuse_GetCurrentSize -10035d9c T Efuse_CalculateWordCnts -10035dc0 T EFUSE_GetEfuseDefinition -10035dd4 T efuse_OneByteRead -10035e08 T efuse_OneByteWrite -10035e3c T Efuse_PgPacketWrite -10035e50 T efuse_WordEnableDataRead -10035e82 T Efuse_WordEnableDataWrite -10035e96 T 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i2s_set_param +1001a328 T i2s_deinit +1001a32c T i2s_enable +1001a330 T i2s_disable +1001a334 W pinmap_merge +1001a370 W pinmap_find_peripheral +1001a388 W pinmap_peripheral +1001a3c0 T sleep_ex_selective +1001a3d4 T deepsleep_ex +1001a3f8 T us_ticker_read +1001a424 T En32KCalibration +1001a4b8 T WDGInitial +1001a544 T WDGStart +1001a55c T WDGRefresh +1001a578 T I2SISRHandle +1001a634 T RtkI2SDeInit +1001a714 T RtkI2SEnable +1001a750 T RtkI2SDisable +1001a78c T RtkI2SLoadDefault +1001a7f0 T HalI2SOpInit +1001a86c T RtkI2SInit +1001aa30 T HalI2SInit +1001aa6e T HalI2SDisable +1001aa94 T HalI2SEnable +1001aab8 T HalI2SDeInit +1001ab10 T HalTimerOpInit_Patch +1001ab4c T freertos_ready_to_sleep +1001ab5c T freertos_pre_sleep_processing +1001ac20 T freertos_post_sleep_processing +1001ac44 T acquire_wakelock +1001ac84 T release_wakelock +1001ace0 T HalI2SInitRtl8195a_Patch +1001ade2 T HalI2SSetRateRtl8195a +1001ae28 T HalI2SSetWordLenRtl8195a +1001ae50 T HalI2SSetChNumRtl8195a +1001ae78 T HalI2SSetPageNumRtl8195a +1001aea0 T HalI2SSetPageSizeRtl8195a +1001aeca T HalI2SSetDMABufRtl8195a +1001af34 T HalI2SGetTxPageRtl8195a +1001af54 T HalI2SPageSendRtl8195a +1001afa0 T HalI2SClearAllOwnBitRtl8195a +1001afd4 T HalI2SDMACtrlRtl8195a +1001afd8 T HalTimerIrq2To7Handle_Patch +1001b02c T HalTimerIrqRegisterRtl8195a_Patch +1001b0a8 T HalTimerIrqUnRegisterRtl8195a_Patch +1001b120 T HalTimerDeInitRtl8195a_Patch +1001b154 T HalTimerReadCountRtl8195a_Patch +1001b16c T HalTimerReLoadRtl8195a_Patch +1001b1a0 T HalTimerInitRtl8195a_Patch +1001b274 T HalTimerIrqEnRtl8195a +1001b288 T HalTimerEnRtl8195a_Patch +1001b29c T HalTimerDisRtl8195a_Patch +1001b2b0 t rtw_ht_operation_update +1001b362 t associated_clients_update.part.11 +1001b39e T chk_sta_is_alive +1001b3dc T add_RATid +1001b4e4 T update_sta_info_apmode +1001b59c T update_beacon +1001b85c T rtw_check_beacon_data +1001bf5c T associated_clients_update +1001bf66 T bss_cap_update_on_sta_join +1001c116 T bss_cap_update_on_sta_leave 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rtw_is_same_ibss +1001d998 T is_same_network +1001d9fc T update_network +1001da96 T rtw_update_scanned_network +1001dba8 T rtw_add_network +1001dbe6 T rtw_survey_event_callback +1001dc92 T rtw_dummy_event_callback +1001dc94 T rtw_free_assoc_resources +1001dd5e T rtw_indicate_connect +1001dd6e T rtw_indicate_disconnect +1001dd90 T rtw_indicate_scan_done +1001dd94 T rtw_joinbss_event_callback +1001ddb2 T search_max_mac_id +1001ddfa T rtw_stassoc_hw_rpt +1001de32 T rtw_stassoc_event_callback +1001de60 T rtw_stadel_event_callback +1001df06 T _rtw_join_timeout_handler +1001df90 T rtw_join_timeout_handler +1001dfe8 T rtw_scan_timeout_handler +1001e018 T _rtw_scan_timeout_handler +1001e01c T rtw_dynamic_check_timer_handlder +1001e074 T _dynamic_check_timer_handlder +1001e0b8 T rtw_select_and_join_from_scanned_queue +1001e18c T rtw_surveydone_event_callback +1001e2a4 T rtw_set_auth +1001e2f4 T rtw_set_key +1001e3b6 T rtw_restruct_wmm_ie +1001e41c T rtw_restruct_sec_ie +1001e488 T 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+1004a514 d rtw_basic_rate_ofdm +1004a517 D AIRGOCAP_OUI +1004a52b d CSWTCH.66 +1004a544 d CSWTCH.48 +1004a586 d CSWTCH.28 +1004a598 D efuse_map_mask +1004a5a8 D flash_map_mask +1004a644 d __func__.21107 +1004a98a d CSWTCH.15 +1004aa0e d CSWTCH.17 +1004aa7d d CSWTCH.14 +1004ab12 d __FUNCTION__.21257 +1004ab24 d rtw_private_args +1004af32 d __FUNCTION__.21057 +1004af45 d __FUNCTION__.21294 +1004af56 d __FUNCTION__.21241 +1004af65 d __FUNCTION__.21126 +1004af75 d iw_priv_type_size +1004b053 d __FUNCTION__.17334 +1004b05d d __FUNCTION__.17736 +1004b06d d __FUNCTION__.17760 +1004b080 d __FUNCTION__.17712 +1004b08f d __FUNCTION__.17649 +1004b09d d __FUNCTION__.17661 +1004b474 d __FUNCTION__.17827 +1004b48d d __FUNCTION__.17654 +1004b498 d __FUNCTION__.17615 +1004b4a7 d __FUNCTION__.17811 +1004b4b9 d __FUNCTION__.17765 +1004b4c7 d __FUNCTION__.17724 +1004b4d8 d __FUNCTION__.17637 +1004c879 D CCKFCCTable_Ch14_8195A +1004c889 D CCKFCCTable_8195A +1004c89c D OFDMSwingTable_New +1004c948 D CCKCETable_8195A +1004c95e d CSWTCH.39 +1004c973 d __func__.20571 +1004c994 D hci_ops +1004c9b9 V Array_MP_8195A_TXPWR_LMT +1004cf2c D xHeapRegions +1004cf4c D UartLogRamCmdTable +1004cf4c D console_commands1 +1004cffc D console_commands +1004d00c d UartLogRamCmdTable_end +1004d010 D __data_start__ +1004d010 D oversampling +1004d014 d wifi +1004d04c D SystemCoreClock +1004d050 D error_flag +1004d054 d tcp_port +1004d058 d iss.7375 +1004d05c d udp_port +1004d05e d dhcp_recorded_xid +1004d062 d dhcp_server_state_machine +1004d064 d uxCriticalNesting +1004d068 d xNextTaskUnblockTime +1004d06c d seed.11739 +1004d070 d wakeup_event +1004d074 d wakelock +1004d078 d last_wakelock_state +1004d098 D mlme_sta_tbl +1004d108 d PMKID_KDE_TYPE.17744 +1004d110 V nr_xmitbuff +1004d114 V nr_xmitframe +1004d118 d P802_1H_OUI +1004d11b D rtw_adaptivity_mode +1004d11c D g_user_ap_sta_num +1004d120 d rtw_private_handler +1004d164 V max_local_skb_num +1004d168 V max_skb_buf_num +1004d16c D rom_e_rtw_msgp_str_ +1004d348 D ARFB_table +1004d387 D TRYING_NECESSARY_idx +1004d39b D DROPING_NECESSARY +1004d3af D PER_RATE_UP +1004d3c3 D PER_RATE_DOWN +1004d3d8 V Array_MP_8195A_PHY_REG_PG +1004d468 D Array_MP_8195A_AGC_TAB +1004d678 D Array_MP_8195A_PHY_REG +1004dcf0 D rtl8195A_card_disable_flow +1004dd90 D rtl8195A_card_enable_flow +1004de30 D Array_MP_8195A_MAC_REG +1004e138 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_TFBGA96_8195A +1004e158 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_TFBGA96_8195A +1004e178 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN48_8195A +1004e196 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN56_8195A +1004e1b4 D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN48_8195A +1004e1d2 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN56_8195A +1004e1f0 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_TFBGA96_8195A +1004e210 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN56_8195A +1004e22e D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN48_8195A +1004e24c D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN56_8195A +1004e26c D Array_MP_8195A_RadioA +1004e834 D gDeltaSwingTableXtal_MP_P_TxXtalTrack_8195A +1004e852 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_TFBGA96_8195A +1004e872 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN48_8195A +1004e890 D .ram.bss$$Base +1004e890 D __bss_start__ +1004e890 D __data_end__ +1004e890 D __ram_image2_text_end__ +1004e890 d skbdata_list +1004e898 V skb_data_pool +10051c98 d ucIdleTaskHeap +10051db0 D HalI2SOpSAL +10051dec D SYSAdapte +10051df0 D PwrAdapter +1005207c D libc_has_init +10052080 d rheap_end +10052084 D p_write_reconnect_ptr +10052088 d sampCntAdd +1005208c d sampCnt +10052090 D tskreader_enable +10052094 D readBuf +10052098 D tskmad_enable +1005209c d bufUnderrunCt +100520a0 d oldRate +100520a4 d sampDelCnt +100520a8 d ap +100520dc D mp3_serv +1005215e d password +100521a0 D pbuf_fifo +100521a4 D pi2s +100521ac D I2sTxSema +100521b0 D eap_method +100521b1 D eap_phase +100521b4 d param.21295 +100521cc D rtw_join_status +100521d0 D wifi_mode +100521d4 d event_init.21020 +100521d8 d join_user_data +100521dc d event_callback_list +1005235c D paff_array +100523d4 D lwip_init_done +100523d8 D xnetif +10052450 d s_aliases.6960 +10052454 D h_errno +10052458 d s_hostent.6959 +1005246c d s_hostent_addr.6961 +10052470 d s_phostent_addr.6962 +10052478 d select_cb_list +1005247c d sockets +1005253c d select_cb_ctr +10052540 d mbox +10052544 d tcpip_init_done_arg +10052548 d tcpip_init_done +1005254c d allsystems +10052550 d allrouters +10052554 d igmp_group_list +10052558 D current_header +1005255c d ip_id +10052560 D current_iphdr_src +10052564 D current_iphdr_dest +10052568 D current_netif +1005256c d str.6324 +1005257c d reassdatagrams +10052580 d ip_reass_pbufcount +10052582 D dhcp_rx_options_given +1005258c d xid.7366 +10052590 D dhcp_rx_options_val +100525b8 d dns_seqno +100525bc d dns_table +10052a1c d dns_servers +10052a24 d dns_payload_buffer +10052c28 d dns_pcb +10052c2c d dns_payload +10052c30 d tcpip_tcp_timer_active +10052c34 d next_timeout +10052c38 D netif_list +10052c3c D netif_default +10052c40 d netif_num +10052c41 D pbuf_free_ooseq_pending +10052c44 d raw_pcbs +10052c48 D tcp_active_pcbs_changed +10052c4c D tcp_ticks +10052c50 d tcp_timer +10052c54 D tcp_listen_pcbs +10052c58 D tcp_active_pcbs +10052c5c d tcp_timer_ctr +10052c60 D tcp_tw_pcbs +10052c64 D tcp_tmp_pcb +10052c68 D tcp_bound_pcbs +10052c6c d seqno +10052c70 d tcplen +10052c74 d ackno +10052c78 d flags +10052c79 d recv_flags +10052c7c d tcphdr +10052c80 d recv_data +10052c84 d inseg +10052c98 D tcp_input_pcb +10052c9c D udp_pcbs +10052ca0 d etharp_cached_entry +10052ca4 d arp_table +10052d6c D lwip_tickless_used +10052d70 d s_timeoutlist +10052da0 d s_nextthread +10052da4 d dhcps_network_id +10052da8 d dhcps_ip_table_semaphore +10052dac d bound_client_ethernet_address +10052dbc d client_request_ip +10052dc0 d dhcps_local_gateway +10052dc4 d dhcps_send_broadcast_address +10052dc8 d dhcp_message_repository +10052dcc d dhcp_message_total_options_lenth +10052dd0 d dhcps_local_mask +10052dd4 d dhcps_local_address +10052dd8 d dhcp_client_ethernet_address +10052de8 d dhcps_netif +10052dec d dhcps_addr_pool_set +10052df0 d dhcps_pcb +10052df4 d dhcps_subnet_broadcast +10052df8 d dhcps_addr_pool_start +10052dfc d dhcps_allocated_client_address +10052e00 d ip_table +10052e20 d dhcps_addr_pool_end +10052e24 D ext_upper +10052e28 d xFreeBytesRemaining +10052e2c d ext_free +10052e30 D ext_lower +10052e34 d pxEnd +10052e38 d xStart +10052e40 d xMinimumEverFreeBytesRemaining +10052e44 d ulTimerCountsForOneTick +10052e48 d ulStoppedTimerCompensation +10052e4c d xMaximumPossibleSuppressedTicks +10052e50 d xPendingReadyList +10052e64 d uxTopReadyPriority +10052e68 d uxTasksDeleted +10052e6c d xTickCount +10052e70 d pxReadyTasksLists +10052f4c d pxOverflowDelayedTaskList +10052f50 d xTasksWaitingTermination +10052f64 d pxDelayedTaskList +10052f68 d xSchedulerRunning +10052f6c d ulTaskSwitchedInTime +10052f70 D pxCurrentTCB +10052f74 d uxPendedTicks +10052f78 d xSuspendedTaskList +10052f8c d uxCurrentNumberOfTasks +10052f90 d ulDeltaTotalRunTime +10052f94 d xDelayedTaskList2 +10052fa8 d xDelayedTaskList1 +10052fbc d uxTaskNumber +10052fc0 d xYieldPending +10052fc4 d uxSchedulerSuspended +10052fc8 d xNumOfOverflows +10052fcc d pxCurrentTimerList +10052fd0 d xActiveTimerList1 +10052fe4 d xActiveTimerList2 +10052ff8 d xLastTime.5284 +10052ffc d xTimerQueue +10053000 d pxOverflowTimerList +10053004 d xTimerTaskHandle +10053008 d device_mutex +10053014 d mutex_init +10053018 d uxSavedInterruptStatus +1005301c D min_free_heap_size +10053020 d g_heap_inited +10053024 d tcm_lock +10053028 D g_tcm_heap +1005302c D flashobj +10053038 D fspic_isinit +1005303c D WDGAdapter +10053078 d last_acquire_wakelock_time +100530f8 D post_sleep_callback +10053178 D pre_sleep_callback +100531f8 D reserve_pll +100531fc d sys_sleep_time +10053200 d hold_wakelock_time +10053280 D missing_tick +10053284 D Timer2To7HandlerData +1005329c D auto_reconnect_running +100532a0 D p_wlan_autoreconnect_hdl +100532a4 D mac_monitor_callback +100532a8 D mf_list_head +100532ac d pscan_retry_cnt.21430 +100532b0 D promisc_callback_all +100532b4 D promisc_sema +100532b8 D promisc_callback +100532bc D psk_essid +10053304 D psk_passphrase +10053386 D psk_passphrase64 +100533c7 D wpa_global_PSK +10053417 d RFC1042_OUI +1005341c d rx_ring_pool +100554fc d stop_report_count.20629 +100554fd D bCheckStateTIMER +10055500 d WifiMcuCmdBitMap.20974 +10055504 D p_wlan_init_done_callback +10055508 D rtw_power_percentage_idx +1005550c D p_wlan_uart_adapter_callback +10055510 D rtw_adaptivity_en +10055514 D p_wlan_mgmt_filter +10055518 D rtw_initmac +1005551c D rtw_adaptivity_th_l2h_ini +10055520 d drvpriv +10055534 D skbbuf_used_num +10055538 V skb_pool +100556f0 D skbdata_used_num +100556f4 d wrapper_skbbuf_list +100556fc D max_skbdata_used_num +10055700 D max_skbbuf_used_num +10055704 d skb_fail_count +10055708 D timer_table +10055710 D rltk_wlan_info +10055740 d timer_used_num +10055744 D max_timer_used_num +10055748 D Noisy_State +1005574c D pExportWlanIrqSemaphore +10055750 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +1005576e D .ram.bss$$Limit +1005576e D __bss_end__ +10055770 B __ram_heap2_start__ 10070000 A __ram_heap2_end__ 1fff0000 D __ram_tcm_start__ 1fff0000 D __tcm_heap_start__ diff --git a/flasher/RTL_Reset.JLinkScript b/flasher/RTL_Reset.JLinkScript index 40a863d..3c0673f 100644 --- a/flasher/RTL_Reset.JLinkScript +++ b/flasher/RTL_Reset.JLinkScript @@ -4,6 +4,6 @@ r1 trst1 h r -w4 0x40000210,0x00211157 +w4 0x40000210,0x0211157 g q \ No newline at end of file diff --git a/flasher/RTL_RunRAM.JLinkScript b/flasher/RTL_RunRAM.JLinkScript index 82d7980..570d761 100644 --- a/flasher/RTL_RunRAM.JLinkScript +++ b/flasher/RTL_RunRAM.JLinkScript @@ -3,6 +3,6 @@ r loadbin build/bin/ram_1.bin 0x10000bc8 loadbin build/bin/ram_2.bin 0x10006000 r -w4 0x40000210,0x20200113 +w4 0x40000210,0x20111117 g q \ No newline at end of file diff --git a/project/src/user/atcmd_user.c b/project/src/user/atcmd_user.c index e6bb482..1be6214 100644 --- a/project/src/user/atcmd_user.c +++ b/project/src/user/atcmd_user.c @@ -20,7 +20,7 @@ #include "lwip/tcp_impl.h" -rtw_mode_t wifi_mode = RTW_MODE_STA; +extern rtw_mode_t wifi_mode; // = RTW_MODE_STA; mp3_server_setings mp3_serv = {0,{0}}; //{ PLAY_PORT, { PLAY_SERVER }}; @@ -121,11 +121,18 @@ void fATWS(int argc, char *argv[]){ } } +/* RAM/TCM/Heaps info */ +extern void ShowMemInfo(void); +/* +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + */ // Mem info -// Mem info -void fATST(void){ - printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", - HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +void fATST(int argc, char *argv[]) { + ShowMemInfo(); #if 0 //CONFIG_DEBUG_LOG > 1 dump_mem_block_list(); tcm_heap_dump(); @@ -151,7 +158,6 @@ void fATST(void){ } } #endif - } void fATWC(int argc, char *argv[]){ diff --git a/project/src/user/main.c b/project/src/user/main.c index 737de50..3f5de9d 100644 --- a/project/src/user/main.c +++ b/project/src/user/main.c @@ -38,7 +38,7 @@ //Priorities of the reader and the decoder thread. Higher = higher prio. #define PRIO_MAD (tskIDLE_PRIORITY + 3 + PRIORITIE_OFFSET) -#define PRIO_READER (PRIO_MAD + 1) +#define PRIO_READER (PRIO_MAD) #define mMIN(a, b) ((a < b)? a : b) @@ -467,7 +467,7 @@ void connect_start(void) { //Fire up the reader task. The reader task will fire up the MP3 decoder as soon //as it has read enough MP3 data. tskreader_enable = 1; - if (xTaskCreate(tskreader, "tskreader", 300, NULL, PRIO_READER, NULL) != pdPASS) { + if (xTaskCreate(tskreader, "tskreader", 320, NULL, PRIO_READER, NULL) != pdPASS) { #if DEBUG_MAIN_LEVEL > 0 DBG_8195A("\n%s xTaskCreate(tskreader) failed!\n", __FUNCTION__); #endif @@ -481,6 +481,13 @@ void connect_start(void) { #endif } +/* RAM/TCM/Heaps info */ +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + /** * @brief Main program. * @param None @@ -496,22 +503,7 @@ void main(void) CfgSysDebugInfo = -1; CfgSysDebugWarn = -1; #endif - if(HalGetCpuClk() != PLATFORM_CLOCK) { -#if CPU_CLOCK_SEL_DIV5_3 - // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); - *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17); // REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 -#else - // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz - *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) &= ~(1<<17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); -#endif - HAL_LOG_UART_ADAPTER pUartAdapter; - pUartAdapter.BaudRate = UART_BAUD_RATE_38400; - HalLogUartSetBaudRate(&pUartAdapter); - SystemCoreClockUpdate(); - En32KCalibration(); - } + #ifdef CONFIG_WDG_ON_IDLE HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & 0x1FFFFF); WDGInitial(CONFIG_WDG_ON_IDLE * 1000); // 5 s @@ -526,13 +518,13 @@ void main(void) #if DEBUG_MAIN_LEVEL > 0 vPortFree(pvPortMalloc(4)); // Init RAM heap - fATST(); // RAM/TCM/Heaps info + ShowMemInfo(); // RAM/TCM/Heaps info #endif start_init(); // in atcmd_user.c /* pre-processor of application example */ - pre_example_entry(); + example_wlan_fast_connect(); // pre_example_entry(); /* wlan intialization */ #if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK) diff --git a/sdkbuild.mk b/sdkbuild.mk index 8a58ab4..3bb1cfa 100644 --- a/sdkbuild.mk +++ b/sdkbuild.mk @@ -12,8 +12,9 @@ CFLAGS += $(INCFLAGS) SRC_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C))) $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C))) DRAM_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C))) +BOOT_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C))) -SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C)) +SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C)) OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST))) DEPENDENCY_LIST = $(patsubst %.c,$(OBJ_DIR)/%.d,$(SRC_C_LIST)) @@ -43,7 +44,7 @@ build_info: @mv -f .ver project/inc/$@.h .PHONY: application -application: build_info $(SRC_O) $(DRAM_O) +application: build_info $(SRC_O) $(DRAM_O) $(BOOT_O) @echo "===========================================================" @echo "Make BootLoader (ram_1.p.bin, ram_1.r.bin)" # @echo "===========================================================" @@ -80,6 +81,13 @@ $(DRAM_O): %.o : %.c @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ @$(OBJCOPY) --prefix-alloc-sections .sdram $(OBJ_DIR)/$@ @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) + +$(BOOT_O): %.o : %.c + @echo $< + @mkdir -p $(OBJ_DIR)/$(dir $@) + @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ + @$(OBJCOPY) --prefix-alloc-sections .boot $(OBJ_DIR)/$@ + @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) -include $(DEPENDENCY_LIST) diff --git a/sdkset.mk b/sdkset.mk index 95b6fe7..d6103dc 100644 --- a/sdkset.mk +++ b/sdkset.mk @@ -81,17 +81,24 @@ INCLUDES += sdk/component/common/application/xmodem # ------------------------------------------------------------------- SRC_C = DRAM_C = +BOOT_C = + +#bootloader +SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +BOOT_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c + #cmsis SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/system_8195a.c #console -DRAM_C += sdk/component/common/api/at_cmd/atcmd_ethernet.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_lwip.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_sys.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_wifi.c -SRC_C += sdk/component/common/api/at_cmd/log_service.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_ethernet.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_lwip.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_sys.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_wifi.c +#SRC_C += sdk/component/common/api/at_cmd/log_service.c #SRC_C += sdk/component/soc/realtek/8195a/misc/driver/low_level_io.c #SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_consol.c +SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_console_new.c #network - api SRC_C += sdk/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c @@ -346,7 +353,7 @@ SRC_C += sdk/component/common/application/xmodem/uart_fw_update.c # ------------------------------------------------------------------- ADD_SRC_C = # REVERSED -ADD_SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/app_start.c +#ADD_SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/app_start.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_dac.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_common.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c @@ -363,8 +370,6 @@ ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvv ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c -ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c -ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c # ------------------------------------------------------------------- # SAMPLES # ------------------------------------------------------------------- @@ -372,10 +377,10 @@ ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c #ADD_SRC_C += sdk/component/common/example/googlenest/example_google.c #ADD_SRC_C += sdk/component/common/example/mdns/example_mdns.c #ADD_SRC_C += sdk/component/common/example/socket_select/example_socket_select.c -ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c ADD_SRC_C += sdk/component/common/example/wlan_fast_connect/example_wlan_fast_connect.c +#ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c #ADD_SRC_C += sdk/component/common/example/xml/example_xml.c -ADD_SRC_C += sdk/component/common/example/example_entry.c +#ADD_SRC_C += sdk/component/common/example/example_entry.c #ADD_SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sd.c #ADD_SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c #ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_sdio_host.c @@ -405,7 +410,6 @@ ADD_SRC_C += project/src/mad/stream.c #driver ADD_SRC_C += project/src/driver/i2s_freertos.c -ADD_SRC_C += project/src/driver/console_api.c #include INCLUDES += project/inc/mad