diff --git a/.project b/.project index c952035..65aac85 100644 --- a/.project +++ b/.project @@ -8,6 +8,7 @@ org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index f0f54f6..f2c5d7d 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + @@ -16,7 +16,7 @@ - + @@ -27,7 +27,7 @@ - + diff --git a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c index 459a746..9a09c87 100644 --- a/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c +++ b/RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c @@ -32,7 +32,7 @@ extern int inic_stop(void); #define printf(...) #endif -#define sscanf _sscanf +//#define sscanf _sscanf #define SHOW_PRIVATE_OUT 1 // =0 - off, = 1 On @@ -62,6 +62,7 @@ extern int inic_stop(void); * Variables Declarations ******************************************************/ + extern struct netif xnetif[NET_IF_NUM]; /****************************************************** @@ -70,7 +71,8 @@ extern struct netif xnetif[NET_IF_NUM]; static internal_scan_handler_t scan_result_handler_ptr = { 0, 0, 0, RTW_FALSE, 0, 0, 0, 0, 0 }; static internal_join_result_t* join_user_data; -extern rtw_mode_t wifi_mode; +rtw_mode_t wifi_mode = RTW_MODE_NONE; +//extern rtw_mode_t wifi_mode; int error_flag = RTW_UNKNOWN; uint32_t rtw_join_status; #if ATCMD_VER == ATVER_2 diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h b/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h index bcd0c33..aa54e7c 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h @@ -9,7 +9,7 @@ #ifndef _RTL_STDLIB_H_ #define _RTL_STDLIB_H_ - +#if 0 #include #include #include @@ -19,7 +19,7 @@ // #define strlen(str) prvStrLen((const u8*)str) #define strcmp(str1, str2) prvStrCmp((const u8*)str1, (const u8*)str2) -#define sscanf(src, format...) //TODO: Strtoul(src,0,16) / Strtoul(src,0,10) +//#define sscanf(src, format...) //TODO: Strtoul(src,0,16) / Strtoul(src,0,10) #define strtok(str, delim) prvStrTok(str, delim) #define strcpy(dst, src) prvStrCpy((u8 *)dst, (const u8*)src) #define atoi(str) prvAtoi(str) @@ -37,5 +37,5 @@ // #define malloc pvPortMalloc #define free vPortFree - +#endif #endif //_RTL_STDLIB_H_ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c index 1757cac..3328a70 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c @@ -10,7 +10,7 @@ */ #include "rtl_bios_data.h" - +extern void * UartLogRomCmdTable; /* ROM + startup.c */ RAM_DEDECATED_VECTOR_TABLE_SECTION IRQ_FUN NewVectorTable[64]; // 10000000 RAM_USER_IRQ_FUN_TABLE_SECTION IRQ_FUN UserIrqFunTable[64]; // 10000100 @@ -37,9 +37,29 @@ INFRA_RAM_BSS_SECTION u32 _rand_z4, _rand_z3, _rand_z2, _rand_z1, _rand_first; / /* ROM + RTL_CONSOL */ MON_RAM_BSS_SECTION u8 *ArgvArray[MAX_ARGV]; // 100006AC *ArgvArray[10] ! MON_RAM_BSS_SECTION u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN]; // 10000430 UartLogHistoryBuf[5][127] ! -MON_RAM_BSS_SECTION volatile UART_LOG_CTL UartLogCtl; // 10000408 +MON_RAM_BSS_SECTION volatile UART_LOG_CTL UartLogCtl; // 10000408 +/* += { + .NewIdx = 0, + .SeeIdx = 0, + .RevdNo = UART_LOG_HISTORY_LEN, + .EscSTS = 0, + .ExecuteCmd = 0, + .ExecuteEsc = 0, + .BootRdy = 0, + .Resvd = 0, + .pTmpLogBuf = &UartLogBuf, + .pfINPUT = (void*) &DiagPrintf, + .pCmdTbl = (PCOMMAND_TABLE) &UartLogRomCmdTable, + .CmdTblSz = 6, + .CRSTS = 0, + .pHistoryBuf = UartLogHistoryBuf, + .TaskRdy = 0 +// .Sema +}; +*/ MON_RAM_BSS_SECTION UART_LOG_BUF UartLogBuf; // 10000388 -MON_RAM_BSS_SECTION volatile UART_LOG_CTL *pUartLogCtl; // 10000384 +MON_RAM_BSS_SECTION volatile UART_LOG_CTL *pUartLogCtl = &UartLogCtl; // 10000384 /* ROM + LIB C */ LIBC_RAM_BSS_SECTION int __rtl_errno; // 10000bc4 __rtl_sread_v1_00(), __rtl_write_v1_00(), __rtl_lseek_v1_00(), __rtl_close_v1_00(), __rtl_sbrk_v1_00().. LIBC_RAM_BSS_SECTION struct mallinfo __rtl_malloc_current_mallinfo; // 10000b9c __rom_mallocr_init_v1_00() diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c index 9d71100..3f16ea6 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c @@ -16,10 +16,10 @@ #define DEFAULT_BAUDRATE UART_BAUD_RATE_38400 -#define BOOT_RAM_TEXT_SECTION __attribute__((section(".ram.boot.text"))) -//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".ram.boot.rodata"))) -//#define BOOT_RAM_DATA_SECTION __attribute__((section(".ram.boot.data"))) -//#define BOOT_RAM_BSS_SECTION __attribute__((section(".ram.boot.bss"))) +#define BOOT_RAM_TEXT_SECTION // __attribute__((section(".boot.text"))) +//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".boot.rodata"))) +//#define BOOT_RAM_DATA_SECTION __attribute__((section(".boot.data"))) +//#define BOOT_RAM_BSS_SECTION __attribute__((section(".boot.bss"))) //------------------------------------------------------------------------- // Function declarations @@ -32,14 +32,11 @@ extern _LONG_CALL_ VOID VectorTableInitRtl8195A(u32 StackP); extern _LONG_CALL_ VOID HalInitPlatformLogUartV02(VOID); extern _LONG_CALL_ VOID HalInitPlatformTimerV02(VOID); -//#pragma arm section code = ".ram.boot.text"; -//#pragma arm section rodata = ".ram.boot.rodata", rwdata = ".ram.boot.data", zidata = ".ram.boot.bss"; +//#pragma arm section code = ".boot.text"; +//#pragma arm section rodata = ".boot.rodata", rwdata = ".boot.data", zidata = ".boot.bss"; typedef void (*START_FUNC)(void); -PRAM_FUNCTION_START_TABLE __attribute__((section(".data.pRamStartFun"))) pRamStartFun = - (PRAM_FUNCTION_START_TABLE) 0x10000BC8; - /* Start table: */ START_RAM_FUN_SECTION RAM_FUNCTION_START_TABLE __ram_start_table_start__ = { RtlBootToSram + 1, // StartFun(), Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 ) diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c index 520fb13..9748cb7 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c @@ -18,7 +18,6 @@ #include "wifi_conf.h" #include "rtl_consol.h" - //#define INFRA_START_SECTION __attribute__((section(".infra.ram.start"))) //------------------------------------------------------------------------- @@ -28,7 +27,7 @@ extern void HalWdgIntrHandle(void); extern void xPortPendSVHandler(void); extern void xPortSysTickHandler(void); extern void vPortSVCHandler(void); -extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID) +//extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID) void HalNMIHandler_Patch(void); void SDIO_Device_Off(void); void VectorTableOverrideRtl8195A(u32 StackP); @@ -37,11 +36,10 @@ void SYSPlatformInit(void); //------------------------------------------------------------------------- // Data declarations extern u8 __bss_start__, __bss_end__; +//extern HAL_TIMER_OP HalTimerOp; -IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = { InfraStart - + 1 }; - -// HAL_GPIO_ADAPTER PINMUX_RAM_DATA_SECTION gBoot_Gpio_Adapter; +IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = + { InfraStart + 1 }; //----- HalNMIHandler_Patch void HalNMIHandler_Patch(void) { @@ -50,21 +48,23 @@ void HalNMIHandler_Patch(void) { HalWdgIntrHandle(); // ROM: HalWdgIntrHandle = 0x3485; } +/* //----- VectorTableOverrideRtl8195A void INFRA_START_SECTION VectorTableOverrideRtl8195A(u32 StackP) { NewVectorTable[2] = HalNMIHandler_Patch; } +*/ //----- SYSPlatformInit void INFRA_START_SECTION SYSPlatformInit(void) { HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, (HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0) & (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04))) - | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 + | BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000 HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, (HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1) & (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1))) - | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; + | BIT_SYS_XTAL_DRV_RF1(1)); // & 0xFFFFFFE7 | 8; } //----- SDIO_Device_Off @@ -80,22 +80,67 @@ void INFRA_START_SECTION SDIO_Device_Off(void) { & (~(BIT_HCI_SDIOD_PIN_EN))); } +__weak void __low_level_init(void) { + // weak function +} + +// weak main function ! +__weak int main(void) { + HalPinCtrlRtl8195A(JTAG, 0, 1); + + DiagPrintf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n"); + while (pUartLogCtl->ExecuteEsc != 1); + pUartLogCtl->RevdNo = 0; + pUartLogCtl->BootRdy = 1; + DiagPrintf("\r"); + while (1) { + while (pUartLogCtl->ExecuteCmd != 1); + UartLogCmdExecute(pUartLogCtl); + DiagPrintf("\r"); + pUartLogCtl->ExecuteCmd = 0; + } + + return 0; +} + //----- InfraStart void INFRA_START_SECTION InfraStart(void) { NewVectorTable[2] = HalNMIHandler_Patch; - HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0, - HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4); - if (HalCommonInit() != HAL_OK) - DBG_8195A("Hal Common Init Failed.\n"); +#ifdef CONFIG_TIMER_MODULE + HalTimerOpInit_Patch((VOID*) (&HalTimerOp)); +#endif +// HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0, HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4); DBG_8195A("==!== Enter Image 2 ====\n"); - ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) +// ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID) memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__); - int clk = (HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) - >> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & 1; - if (clk) { + int flash_en = HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) + & (1 << BIT_SOC_FLASH_EN); + if (flash_en) { + if(!SpicCmpDataForCalibrationRtl8195A()) { + DBG_8195A("ReInit SPIC...\n"); + SpicInitRtl8195AV02(1,0); +// if(!SpicCmpDataForCalibrationRtl8195A()) { + // TODO: Spic Not Init! + // DBG_8195A("Spic error Init!\n"); +// }; + }; SpicNVMCalLoadAll(); SpicReadIDRtl8195A(); - } + }; + while(!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)); // иначе глючит LogUART, если переключение CLK приходится на вывод символов ! +#if CPU_CLOCK_SEL_DIV5_3 + // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); + *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 +#else + // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz + *((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 + HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); +#endif + HalReInitPlatformLogUartV02(); +/* HAL_LOG_UART_ADAPTER pUartAdapter; + pUartAdapter.BaudRate = UART_BAUD_RATE_38400; + HalLogUartSetBaudRate(&pUartAdapter); */ SystemCoreClockUpdate(); SYSPlatformInit(); En32KCalibration(); @@ -103,8 +148,22 @@ void INFRA_START_SECTION InfraStart(void) { SDIO_Device_Off(); VectorTableInitForOSRtl8195A(&vPortSVCHandler, &xPortPendSVHandler, &xPortSysTickHandler); - if (clk) + if (flash_en) SpicDisableRtl8195A(); - _AppStart(); +#ifdef CONFIG_SDR_EN + // clear SDRAM bss + extern u8 __sdram_bss_start__[]; + extern u8 __sdram_bss_end__[]; + if((int)__sdram_bss_end__-(int)__sdram_bss_start__ > 0) + memset(__sdram_bss_start__, 0, (int)__sdram_bss_end__-(int)__sdram_bss_start__); +#endif + // force SP align to 8 byte not 4 byte (initial SP is 4 byte align) + __asm( + "mov r0, sp\n" + "bic r0, r0, #7\n" + "mov sp, r0\n" + ); + __low_level_init(); + main(); } diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld index 8c75b97..2e49eb0 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld @@ -56,7 +56,7 @@ SECTIONS { /* __ram_start_table_start__ = .; */ __ram_image1_text_start__ = .; - KEEP(*(SORT(.start.ram.data*))) + KEEP(*(.boot.start.ram.data*)) /* __image1_validate_code__ = .; */ KEEP(*(.image1.validate.rodata)) @@ -67,18 +67,21 @@ SECTIONS KEEP(*(.libc.reent)) KEEP(*(.rom.unc.data)) KEEP(*(.sdr.rand2.data)) - __ram_image_end__ = .; - /* 0x100020c0: end */ + + PROVIDE (__ram_image_end__ = .); /* 0x100020c0: end */ + /* boot & images data */ + KEEP(*(.hal.ram.data)) KEEP(*(.hal.flash.data)) - /* KEEP(*(.data)); ? */ - build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.o (.rodata*) - KEEP(*(.ram.boot.text)) - build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.o (.rodata*) + KEEP(*(.boot.rodata*)) + KEEP(*(.boot.text*)) + KEEP(*(.boot.data)) __image1_bss_start__ = .; + KEEP(*(.boot.bss*)) __image1_bss_end__ = .; __ram_image1_text_end__ = .; + } > BOOT_RAM .romheap : @@ -249,4 +252,5 @@ SECTIONS { KEEP(*(.loader.head*)) } + ASSERT(__ram_image_end__ != 0x100020c0, "Error rom-bios-boot code & data!") } diff --git a/project/src/driver/console_api.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c similarity index 100% rename from project/src/driver/console_api.c rename to RTL00_SDKV35a/component/soc/realtek/8195a/misc/driver/rtl_console_new.c diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c index 2cb15f9..e2bc4b3 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c @@ -6,6 +6,8 @@ #include "rtl_bios_data.h" #include "va_list.h" +#define NOT_CHECK_LIBC_INIT 1 + //------------------------------------------------------------------------- // Function declarations @@ -70,6 +72,7 @@ int libc_has_init; void rtl_libc_init(void) { __rom_mallocr_init_v1_00(); init_rom_libgloss_ram_map(); + libc_has_init = 1; } //----- rtl_snprintf() @@ -79,10 +82,11 @@ int rtl_snprintf(char *str, size_t size, const char *fmt, ...) { int result; int w; FILE f; +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif if (size >= 0) { f._flags = 520; if (size) @@ -109,11 +113,11 @@ int rtl_snprintf(char *str, size_t size, const char *fmt, ...) { //----- rtl_sprintf() int rtl_sprintf(char *str, const char *fmt, ...) { FILE f; - +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif f._flags = 520; f._w = 0x7FFFFFFF; f._bf._size = 0x7FFFFFFF; @@ -130,10 +134,11 @@ int rtl_sprintf(char *str, const char *fmt, ...) { //----- rtl_printf() int rtl_printf(const char *fmt, ...) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif va_list args; va_start (args, fmt); int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, @@ -145,10 +150,11 @@ int rtl_printf(const char *fmt, ...) { //----- rtl_vprintf() int rtl_vprintf(const char *fmt, void *param) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout, fmt, *(va_list *)param); __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); @@ -161,11 +167,11 @@ int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param) { int w; int v11; FILE f; - +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif if (size >= 0) { if (size) w = size - 1; @@ -191,10 +197,11 @@ int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param) { //----- rtl_vfprintf() int rtl_vfprintf(FILE *fp, const char *fmt0, va_list ap) { +#if NOT_CHECK_LIBC_INIT if (!libc_has_init) { rtl_libc_init(); - libc_has_init = 1; } +#endif return __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, fp, fmt0, ap); } diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c new file mode 100644 index 0000000..83a8513 --- /dev/null +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c @@ -0,0 +1,311 @@ +/* + * RTL871x1Ax: RAM libc + * Created on: 22/02/2017 + * Author: pvvx + */ + +#include "rtl_bios_data.h" +#include "va_list.h" + +#define NOT_CHECK_LIBC_INIT 1 + +//------------------------------------------------------------------------- +// Function declarations + +//void libc_init(); +//int snprintf(char *str, size_t size, const char *fmt, ...); +//int sprintf(char *str, const char *fmt, ...); +//int printf(const char *fmt, ...); +//int vprintf(const char *fmt, void *param); +//int vsnprintf(char *str, size_t size, const char *fmt, void *param); +//int vfprintf(FILE *fp, const char *fmt0, va_list ap); +//int memchr(const void *src_void, int c, size_t length); +//int memcmp(const void *m1, const void *m2, size_t n); +//int memcpy(void *dst0, const void *src0, size_t len0); +//int memmove(void *dst_void, const void *src_void, size_t length); +//int memset(void *m, int c, size_t n); +//char * strcat(char *s1, const char *s2); +//char * strchr(const char *s1, int i); +//int strcmp(const char *s1, const char *s2); +//char * strcpy(char *dst0, const char *src0); +//int strlen(const char *str); +//char * strncat(char *s1, const char *s2, size_t n); +//int strncmp(const char *s1, const char *s2, size_t n); +//char * strncpy(char *dst0, const char *src0, size_t count); +//char * strstr(const char *searchee, const char *lookfor); +//char * strsep(char **source_ptr, const char *delim); +//char * strtok(char *s, const char *delim); +// Extern Calls: +// extern int init_rom_libgloss_ram_map(_DWORD) +// extern int _rom_mallocr_init_v1_00(void) +// extern int __rtl_vfprintf_r_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_fflush_r_v1_00(_DWORD, _DWORD) +// extern int __rtl_memchr_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memcmp_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memcpy_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memmove_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_memset_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strcat_v1_00(_DWORD, _DWORD) +// extern int __rtl_strchr_v1_00(_DWORD, _DWORD) +// extern int __rtl_strcmp_v1_00(_DWORD, _DWORD) +// extern int __rtl_strcpy_v1_00(_DWORD, _DWORD) +// extern int __rtl_strlen_v1_00(_DWORD) +// extern int __rtl_strncat_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strncmp_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strncpy_v1_00(_DWORD, _DWORD, _DWORD) +// extern int __rtl_strstr_v1_00(_DWORD, _DWORD) +// extern int __rtl_strsep_v1_00(_DWORD, _DWORD) +// extern int __rtl_strtok_v1_00(_DWORD, _DWORD) + +//------------------------------------------------------------------------- +// Data declarations + +extern struct _reent * _rtl_impure_ptr; + +extern int libc_has_init; +// extern impure_ptr +// extern impure_ptr + +//------------------------------------------------------------------------- +// Function + +//----- snprintf() +int snprintf(char *str, size_t size, const char *fmt, ...) { + va_list args; + va_start (args, fmt); + int result; + int w; + FILE f; +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + if (size >= 0) { + f._flags = 520; + if (size) + w = size - 1; + else + w = 0; + f._w = w; /* write space left for putc() */ + f._bf._size = w; + f._file = -1; /* fileno, if Unix descriptor, else -1 */ + f._p = str; /* current position in (some) buffer */ + f._bf._base = str; + result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, args); + if (result + 1 < 0) + _rtl_impure_ptr->_errno = 139; + if (size) + *f._p = 0; + } else { + _rtl_impure_ptr->_errno = 139; + result = -1; + } + return result; +} + +//----- sprintf() +int sprintf(char *str, const char *fmt, ...) { + FILE f; + +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + f._flags = 520; + f._w = 0x7FFFFFFF; + f._bf._size = 0x7FFFFFFF; + f._file = -1; + f._p = str; + f._bf._base = str; + va_list args; + va_start (args, fmt); + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, args); + *f._p = 0; +// va_end (args); + return result; +} + +//----- printf() +int printf(const char *fmt, ...) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + va_list args; + va_start (args, fmt); + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, + _rtl_impure_ptr->_stdout, fmt, args); + __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); + // va_end (args); + return result; +} + +//----- vprintf() +int vprintf(const char * fmt, __VALIST param) { +//int vprintf(const char *fmt, void *param) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + int result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, + _rtl_impure_ptr->_stdout, fmt, param); + __rtl_fflush_r_v1_00(_rtl_impure_ptr, _rtl_impure_ptr->_stdout); + return result; +} + +//----- vsnprintf() +int vsnprintf(char *str, size_t size, const char *fmt, __VALIST param) { + int result; + int w; + int v11; + FILE f; +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + if (size >= 0) { + if (size) + w = size - 1; + else + w = 0; + f._flags = 520; + f._p = str; + f._bf._base = str; + f._w = w; + f._bf._size = w; + f._file = -1; + result = __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, &f, fmt, param); + if (result + 1 < 0) + _rtl_impure_ptr->_errno = 139; + if (size) + *f._p = 0; + } else { + _rtl_impure_ptr->_errno = 139; + result = -1; + } + return result; +} + +//----- vfprintf() +int vfprintf(FILE *fp, const char *fmt0, va_list ap) { +#if NOT_CHECK_LIBC_INIT + if (!libc_has_init) { + rtl_libc_init(); + } +#endif + return __rtl_vfprintf_r_v1_00(_rtl_impure_ptr, fp, fmt0, ap); +} + +//----- memchr() +void * memchr(const void * src_void , int c , size_t length) { + return __rtl_memchr_v1_00(src_void, c, length); +} + +//----- memcmp() +int memcmp(const void *m1, const void *m2, size_t n) { + return __rtl_memcmp_v1_00(m1, m2, n); +} + +//----- memcpy() +void * memcpy(void *dst0, const void *src0, size_t len0) { + return __rtl_memcpy_v1_00(dst0, src0, len0); +} + +//----- memmove() +void * memmove(void *dst_void, const void *src_void, size_t length) { + return __rtl_memmove_v1_00(dst_void, src_void, length); +} + +//----- memset() +void * memset(void *m, int c, size_t n) { + return __rtl_memset_v1_00(m, c, n); +} + +//----- strcat() +char * strcat(char *s1, const char *s2) { + return (char *) __rtl_strcat_v1_00(s1, s2); +} + +//----- strchr() +char * strchr(const char *s1, int i) { + return (char *) __rtl_strchr_v1_00(s1, i); +} + +//----- strcmp() +int strcmp(const char *s1, const char *s2) { + return __rtl_strcmp_v1_00(s1, s2); +} + +//----- strcpy() +char * strcpy(char *dst0, const char *src0) { + return (char *) __rtl_strcpy_v1_00(dst0, src0); +} + +//----- strlen() +size_t strlen(const char *str) { + return __rtl_strlen_v1_00(str); +} + +//----- strncat() +char * strncat(char *s1, const char *s2, size_t n) { + return (char *) __rtl_strncat_v1_00(s1, s2, n); +} + +//----- strncmp() +int strncmp(const char *s1, const char *s2, size_t n) { + return __rtl_strncmp_v1_00(s1, s2, n); +} + +//----- strncpy() +char * strncpy(char *dst0, const char *src0, size_t count) { + return (char *) __rtl_strncpy_v1_00(dst0, src0, count); +} + +//----- strstr() +char * strstr(const char *searchee, const char *lookfor) { + return (char *) __rtl_strstr_v1_00(searchee, lookfor); +} + +//----- strsep() +char * strsep(char **source_ptr, const char *delim) { + return (char *) __rtl_strsep_v1_00(source_ptr, delim); +} + +//----- strtok() +char * strtok(char *s, const char *delim) { + return (char *) __rtl_strtok_v1_00(s, delim); +} + +int sscanf(const char *buf, const char *fmt, ...) { + va_list args; + int i; + + va_start(args, fmt); + i = _vsscanf(buf, fmt, args); + va_end(args); + + return i; +} + +#define TOUPPER(CH) \ + (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH)) + +int _stricmp (const char *s1, const char *s2) +{ + while (*s2 != 0 && TOUPPER (*s1) == TOUPPER (*s2)) + s1++, s2++; + return (int) (TOUPPER (*s1) - TOUPPER (*s2)); +} + +unsigned long long __aeabi_llsr(unsigned long long val, unsigned int shift) +{ + u32 lo = ((u32)val >> shift) | ((u32)(val >> 32) << (32 - shift)); + u32 hi = (u32)val >> shift; + + return ((unsigned long long)hi << 32) | lo; +} diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 00d0b3d..1f361e2 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_1.p.bin b/build/bin/ram_1.p.bin index 3c62439..15af987 100644 Binary files a/build/bin/ram_1.p.bin and b/build/bin/ram_1.p.bin differ diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin index 2135ade..a676cb1 100644 Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin index 93820b0..d9b04df 100644 Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin index 5cf8c7f..e8a7c79 100644 Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index c94c7d6..ede97a5 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/build/obj/build.nmap b/build/obj/build.nmap index d69f751..7850d55 100644 --- a/build/obj/build.nmap +++ b/build/obj/build.nmap @@ -794,16 +794,16 @@ 100020b4 T _sdr_rnd2_y 100020b8 T _sdr_rnd2_z 100020bc T _sdr_rnd2_c -100020c0 T __ram_image_end__ 100020c0 T gBoot_Gpio_Adapter +10002100 A __ram_image_end__ 100021ec T SpicInitParaAllClk -1000227c t EnterImage15 -10002328 t RtlBootToSram -100023b4 T __image1_bss_end__ -100023b4 T __image1_bss_start__ -100023b4 T __ram_image1_text_end__ +1000230c t EnterImage15 +100023b8 t RtlBootToSram 10002400 B __rom_heap_start__ 10002400 B end +10002444 T __image1_bss_end__ +10002444 T __image1_bss_start__ +10002444 T __ram_image1_text_end__ 10003000 B __ram_heap1_start__ 10003000 B __rom_heap_end__ 10006000 D .image2.start.table1$$Base @@ -814,2356 +814,2353 @@ 10006004 D RAM_IMG2_VALID_PATTEN 10006004 D __image2_validate_code__ 10006018 D cus_sig -10006038 T VectorTableOverrideRtl8195A -10006048 T SYSPlatformInit -10006068 T SDIO_Device_Off -1000608c T InfraStart -10006140 T UartLogIrqHandleRam -10006208 T RtlConsolTaskRam -100062d0 T console_init -1000639c T SpicRxCmdRefinedRtl8195A -100064a4 T SpicInitRefinedRtl8195A -10006558 T SpicReadIDRtl8195A -1000665c T SpicConfigAutoModeRtl8195A -100066cc T SpicUserReadRtl8195A -10006840 T SpicUserReadFourByteRtl8195A -1000695c T SpicGetExtendAddrRtl8195A -100069b4 T SpicGetConfigRegRtl8195A -10006a0c T SpicGetFlashStatusRefinedRtl8195A -10006a64 T SpicWaitWipDoneRefinedRtl8195A -10006aa0 T SpicTxCmdWithDataRtl8195A -10006b74 T SpicGetFlashFlagRtl8195A -10006c00 T SpicWaitOperationDoneRtl8195A -10006c3c T SpicDeepPowerDownFlashRtl8195A -10006cc8 T SpicUserProgramRtl8195A -10006ef8 T SpicWaitWipRtl8195A -10006f0c T SpicTxFlashInstRtl8195A -10006fa0 T SpicEraseFlashRefinedRtl8195A -10006faa T SpicDieEraseFlashRtl8195A -10006fcc T SpicBlockEraseFlashRtl8195A -10006fee T SpicSectorEraseFlashRtl8195A -10007010 T SpicSetExtendAddrRtl8195A -1000702a T SpicSetFlashStatusRefinedRtl8195A -1000705c T SpicWriteProtectFlashRtl8195A -10007084 T SpicDisableRtl8195A -10007094 T SpicNVMCalLoad -100071a4 T SpicNVMCalLoadAll -100071c2 T SpicNVMCalStore -1000731c T SpicCalibrationRtl8195A -10007570 T SpicFlashInitRtl8195A -1000761c T SpicOneBitCalibrationRtl8195A -10007634 T ShowRamBuildInfo -10007636 W __low_level_init -10007638 T _AppStart -1000765c T HalCommonInit -1000766c T vWFSSVCHandler -10007672 t svcing -1000768c T PatchHalLogUartInit -10007740 T PSHalInitPlatformLogUart -10007804 T InitSYSIRQ -10007840 T DurationScaleAndPeriodOP -10007878 T CLKCal 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rtw_dummy_event_callback -1001dd58 T rtw_free_assoc_resources -1001de22 T rtw_indicate_connect -1001de32 T rtw_indicate_disconnect -1001de54 T rtw_indicate_scan_done -1001de58 T rtw_joinbss_event_callback -1001de76 T search_max_mac_id -1001debe T rtw_stassoc_hw_rpt -1001def6 T rtw_stassoc_event_callback -1001df24 T rtw_stadel_event_callback -1001dfca T _rtw_join_timeout_handler -1001e054 T rtw_join_timeout_handler -1001e0ac T rtw_scan_timeout_handler -1001e0dc T _rtw_scan_timeout_handler -1001e0e0 T rtw_dynamic_check_timer_handlder -1001e138 T _dynamic_check_timer_handlder -1001e17c T rtw_select_and_join_from_scanned_queue -1001e250 T rtw_surveydone_event_callback -1001e368 T rtw_set_auth -1001e3b8 T rtw_set_key -1001e47a T rtw_restruct_wmm_ie -1001e4e0 T rtw_restruct_sec_ie -1001e54c T rtw_joinbss_reset -1001e55c T rtw_restructure_ht_ie -1001e63c T rtw_update_ht_cap -1001e6c6 T rtw_joinbss_event_prehandle -1001e8f2 T rtw_linked_check -1001e90e T rtw_buddy_adapter_up -1001e946 T check_buddy_fwstate -1001e964 t get_da -1001e984 t get_sa -1001e9ae T OnAction -1001e9c0 T DoReserved -1001e9c4 t _mgt_dispatcher.isra.2 -1001ea10 T rtw_is_channel_set_contains_channel -1001ea32 T init_hw_mlme_ext -1001ea48 T init_channel_set -1001eae0 T free_mlme_ext_priv -1001eb08 T mgt_dispatcher -1001eb90 T alloc_mgtxmitframe -1001ebc8 T update_mgnt_tx_rate -1001ebce T update_mgntframe_attrib -1001ec2a T rtw_build_mgnt_frame -1001ec80 T dump_mgntframe -1001ec9a T rtw_send_mgnt -1001ecb8 t issue_action_BSSCoexistPacket -1001eec4 T update_hidden_ssid -1001ef18 T issue_beacon -1001f130 T issue_probersp -1001f3c0 T OnProbeReq -1001f488 T issue_probereq -1001f640 T issue_auth -1001f8a8 T OnAuth -1001fb4c T issue_asocrsp -1001fdc0 T issue_assocreq -100200fc T issue_nulldata -100201e6 T issue_qos_nulldata -10020318 T issue_deauth -10020400 T issue_action_BA -1002067c T OnAction_back -1002074a T collect_bss_info -1002097c T start_clnt_auth -10020a0c T start_clnt_assoc -10020a40 T OnAuthClient -10020b20 T report_scan_result_one -10020ce0 T add_site_survey -10020e66 T report_survey_event -100210a4 T OnProbeRsp -100210d8 T report_surveydone_event -1002113c T report_join_res -100211ac T OnAssocRsp -100212f8 T report_del_sta_event -1002138a T receive_disconnect -100213e0 T OnBeacon -10021568 T OnDeAuth -100216c0 T OnDisassoc -10021830 T report_add_sta_event -100218a4 T OnAssocReq -10021e94 T rtw_port_switch_chk -10021f18 T update_sta_info -10021f98 T mlmeext_sta_del_event_callback -10022018 T _linked_info_dump -1002207a T _linked_rx_signal_strehgth_display -100220b4 T linked_status_chk -10022328 T survey_timer_hdl -10022408 T _survey_timer_hdl -1002240c T link_timer_hdl -1002248a T _link_timer_hdl -1002248e T addba_timer_hdl -100224ae T NULL_hdl -100224b2 T setopmode_hdl -100224f8 T disconnect_hdl -100225a4 T setauth_hdl -100225b4 T setkey_hdl -1002260c T set_stakey_hdl -10022710 T set_tx_beacon_cmd -10022784 T mlme_evt_hdl -100227d0 T tx_beacon_hdl -1002288a T check_buddy_mlmeinfo_state -100228a4 T site_survey -10022a74 T sitesurvey_cmd_hdl -10022b82 T concurrent_chk_start_clnt_join -10022c18 T start_clnt_join -10022cec T join_cmd_hdl -10022e10 T concurrent_chk_joinbss_done -10022fd8 T mlmeext_joinbss_event_callback -10023114 T set_chplan_hdl -10023130 T init_mlme_ext_timer -1002318c T init_mlme_ext_priv -100232c8 t get_hdr_bssid -100232f0 t filter_packet -10023378 t promisc_get_encrypt -100233ca t promisc_info_get -1002346e t promisc_set_enable -1002350a T _promisc_deinit -1002355c T _promisc_recv_func -10023aa8 T _promisc_set -10023b38 T _is_promisc_enabled -10023b50 t SetEAPOL_KEYIV -10023bee t ToDrv_SetPTK -10023c96 t Message_ReplayCounter_OC2LI.isra.2 -10023cc4 t Message_SmallerEqualReplayCounter.isra.4 -10023cf6 t Message_setReplayCounter.isra.5 -10023d14 t INCLargeInteger -10023d34 t INCOctet16_INTEGER -10023d7c t INCOctet32_INTEGER -10023ddc t ToDrv_DisconnectSTA -10023ea0 t CheckMIC.constprop.14 -10023f20 t CalcMIC.constprop.15 -10023f80 T DecWPA2KeyData -10024034 T DecGTK -100240f0 T ToDrv_SetGTK -10024180 T init_wpa_sta_info -1002426c T SendEAPOL -10024924 T ClientSendEAPOL -10024e0c t ResendTimeout -10024e94 T EAPOLKeyRecvd -1002500c T ClientEAPOLKeyRecvd -100253cc T psk_derive -10025480 T psk_init -10025570 T psk_strip_rsn_pairwise -100255f0 T psk_strip_wpa_pairwise -10025670 T tkip_send_mic_failure_report -100257e4 T pwr_state_check_handler -100257e8 T ips_enter -10025890 T ips_leave -100259a8 T rtw_pwr_unassociated_idle -100259f2 T rtw_ps_processor -10025a4a T PS_RDY_CHECK -10025ab2 T rtw_set_ps_mode -10025b20 T LPS_RF_ON_check -10025b76 T LPS_Enter -10025be4 T LPS_Leave -10025c20 T LeaveAllPowerSaveMode -10025c30 T rtw_init_pwrctrl_priv -10025d04 T rtw_free_pwrctrl_priv -10025d18 T _rtw_pwr_wakeup -10025df4 T rtw_pm_set_lps -10025e3c T rtw_pm_set_ips -10025e80 T rtw_pm_set_tdma_param -10025e9c T rtw_pm_set_lps_dtim -10025ea8 T rtw_pm_get_lps_dtim -10025eb4 t recvframe_pull -10025ed6 t recvframe_pull_tail -10025ef8 T rtw_signal_stat_timer_hdl -10025f96 T _rtw_init_sta_recv_priv -10025fb4 T _rtw_init_recv_priv -1002605c T rtw_mfree_recv_priv_lock -10026090 T _rtw_alloc_recvframe -100260c2 T rtw_alloc_recvframe -100260e8 T rtw_free_recvframe -10026184 T _rtw_enqueue_recvframe -100261b0 T rtw_enqueue_recvframe -100261da T rtw_free_recvframe_queue -10026212 T rtw_free_uc_swdec_pending_queue -1002623a T _rtw_free_recv_priv -1002626a T rtw_free_buf_pending_queue -1002626e T recvframe_chkmic -1002636c T decryptor -10026408 T portctrl -1002647e T recv_decache -100264ac T process_pwrbit_data -100264ec T process_wmmps_data -10026574 T count_rx_stats -100265e8 T sta2sta_data_frame -10026724 T ap2sta_data_frame -10026850 T sta2ap_data_frame -100268d8 T validate_recv_ctrl_frame -10026a72 T validate_recv_data_frame -10026ccc T wlanhdr_to_ethhdr -10026e08 T recvframe_defrag -10026eb2 T recvframe_chk_defrag -10026f68 T validate_recv_mgnt_frame -10026fa4 T validate_recv_frame -1002706c T recv_indicatepkt_reorder -1002708e T process_recv_indicatepkts -100270e6 T recv_func_prehandle -1002710e T recv_func_posthandle -10027172 T recv_func -100271fc T rtw_recv_entry -1002722c T rtw_recv_tasklet -10027284 T rtw_wep_encrypt -100272ca T rtw_wep_decrypt -10027310 T rtw_tkip_encrypt -1002737c T rtw_tkip_decrypt -100273e8 T rtw_aes_encrypt -10027454 T rtw_aes_decrypt -100274b8 T rtw_init_sec_priv -1002752a T rtw_free_sec_priv -1002754a t wifi_mac_hash -10027574 T _addba_timer_hdl -10027578 T _rtw_init_stainfo -100275f2 T _rtw_init_sta_priv -100276da T _rtw_free_sta_xmit_priv_lock -10027706 T rtw_mfree_stainfo -10027732 T rtw_mfree_sta_priv_lock -10027768 T _rtw_free_sta_priv -10027788 T init_addba_retry_timer -100277b0 T rtw_alloc_stainfo -1002787a T rtw_free_stainfo -10027a1c T rtw_get_stainfo -10027a98 T rtw_init_bcmc_stainfo -10027ac8 T rtw_get_bcmc_stainfo -10027aec T rtw_free_all_stainfo -10027b46 T cckrates_included -10027b6e T cckratesonly_included -10027b96 T networktype_to_raid_ex -10027bf4 T judge_network_type -10027c44 T ratetbl_val_2wifirate -10027c58 T is_basicrate -10027c84 T ratetbl2rateset -10027cc8 T get_rate_set -10027cf2 T UpdateBrateTbl -10027d24 T UpdateBrateTblForSoftAP -10027d58 T Save_DM_Func_Flag -10027d6e T Restore_DM_Func_Flag -10027d84 T Switch_DM_Func -10027da0 T Set_MSR -10027dc4 T set_opmode -10027e08 T SelectChannel -10027e3c T SetBWMode -10027e78 T set_channel_bwmode -10027ece T get_my_bssid -10027ed2 T get_beacon_interval -10027ef0 T is_client_associated_to_ap -10027f08 T is_client_associated_to_ibss -10027f24 T is_IBSS_empty -10027f46 T decide_wait_for_beacon_timeout -10027f62 T invalidate_cam_all -10027f6a T write_cam -10027fe0 T clear_cam_entry -1002800e T flush_all_cam_entry -1002806c T WMM_param_handler -10028092 T WMMOnAssocRsp -10028160 T HT_caps_handler -10028200 T HT_info_handler -10028224 T HTOnAssocRsp -1002825c T ERP_IE_handler -10028278 T VCS_update -100282ca T rtw_check_bcn_info -100284da T update_beacon_info -10028530 T is_ap_in_tkip -100285a8 T wifirate2_ratetbl_inx -10028614 T update_basic_rate -10028642 T update_supported_rate -1002866c T update_MCS_rate -10028678 T support_short_GI -100286a6 T get_highest_rate_idx -100286c0 T Update_RA_Entry -100286c8 T set_sta_rate -100286d0 T update_tx_basic_rate -10028728 T check_assoc_AP -1002881c T update_IOT_info -1002887a T update_capinfo -100288f8 T update_wireless_mode -10028998 T update_bmc_sta_support_rate -100289c0 T update_TSF -100289d2 T correct_TSF -100289da t _init_txservq -100289f0 t set_qos -10028a40 T _rtw_init_sta_xmit_priv -10028a86 T rtw_mfree_xmit_priv_lock -10028ad2 T qos_acm -10028b0c T xmitframe_addmic -10028c6a T xmitframe_swencrypt -10028c96 T rtw_make_wlanhdr -10028e76 T rtw_txframes_pending -10028eb2 T rtw_txframes_sta_ac_pending -10028ee8 T rtw_txframes_update_attrib_vcs_info -10028f88 T rtw_put_snap -10028fcc T rtw_update_protection -10029012 T rtw_count_tx_stats -10029062 T rtw_free_xmitbuf_ext -100290a4 T rtw_alloc_xmitframe -100290fc T rtw_free_xmitframe -1002914e T rtw_free_xmitframe_queue -1002918c T rtw_get_sta_pending -100291cc T rtw_xmit_classifier -10029232 T rtw_xmitframe_enqueue -10029240 T rtw_alloc_hwxmits -1002929a T rtw_free_hwxmits -100292b0 T _rtw_free_xmit_priv -1002937c T rtw_init_hwxmits -10029394 T _rtw_init_xmit_priv -1002954c T rtw_get_ff_hwaddr -10029560 T xmitframe_enqueue_for_sleeping_sta -10029720 t dequeue_xmitframes_to_sleeping_queue -10029776 T stop_sta_xmit -1002985e T wakeup_sta_to_xmit -10029a74 T xmit_delivery_enabled_frames -10029b90 T rtw_xmit_tasklet -10029be8 T rtw_xmit_mgnt -10029bec T rtw_xmit -10029f16 T rtw_sctx_done_err -10029f22 T rtw_alloc_xmitbuf -10029f7c T rtw_free_xmitbuf -10029fee T rtw_alloc_xmitbuf_ext -1002a074 T rtw_sctx_done -1002a07a t rtl8195a_free_rx_ring -1002a088 t bus_write32 -1002a0e4 t bus_write16 -1002a140 t bus_write8 -1002a19c t bus_read32 -1002a1f6 t bus_read16 -1002a252 t bus_read8 -1002a2ae t rtl8195a_free_tx_ring -1002a33c T rtl8195a_init_desc_ring -1002a47c T rtl8195a_free_desc_ring -1002a498 T rtl8195a_reset_desc_ring -1002a52e T InitLxDmaRtl8195a -1002a690 T rtl8195a_check_txdesc_closed -1002a708 t rtl8195a_tx_isr -1002a7ec T InterruptRecognized8195a -1002a87c T InitInterrupt8195a -1002a89c T EnableDMA8195a -1002a8c4 T EnableInterrupt8195a -1002a904 T DisableDMA8195a -1002a910 T DisableInterrupt8195a -1002a928 T UpdateInterruptMask8195a -1002a98a T CheckRxTgRtl8195a -1002a9c4 T rtl8192ee_check_rxdesc_remain -1002a9f4 T rtl8195a_recv_tasklet -1002ad08 T rtl8195a_tx_int_handler -1002ad34 T InterruptHandle8195a -1002afa8 T rtl8195a_xmit_tasklet -1002afd0 T lxbus_set_intf_ops -1002b010 t GetTxBufDesc -1002b05a t UpdateFirstTxbdtoXmitBuf.isra.3 -1002b08c t check_nic_enough_desc.isra.4 -1002b0dc T rtl8195ab_init_xmit_priv -1002b0ea T rtl8195ab_free_xmit_priv -1002b0f2 T GetDmaTxbdIdx -1002b10e T rtl8195a_enqueue_xmitbuf -1002b132 T rtl8195a_dequeue_xmitbuf -1002b156 T SetTxbdForLxDMARtl8195ab -1002b1d6 T UpdateTxbdHostIndex -1002b214 T rtw_dump_xframe -1002b3e6 T check_tx_desc_resource -1002b420 T rtw_dequeue_xframe -1002b4b4 T rtw_xmitframe_coalesce -1002b768 T rtl8195ab_xmitframe_resume -1002b85e T rtl8195ab_mgnt_xmit -1002b89a T rtl8195ab_hal_xmit -1002b9a8 t Hal_GetEfuseDefinition -1002b9d8 t ResumeTxBeacon -1002ba1c T UpdateHalRAMask8195A -1002bbb4 T HalLittleWifiMCUThreadRtl8195a -1002bc08 T HalCheckInReqStateThreadRtl8195a -1002bc54 T HalTDMAChangeStateThreadRtl8195a -1002bca0 t rtl8195a_read_chip_version -1002bd14 t Hal_EfuseWordEnableDataWrite -1002bf58 t Hal_EfusePowerSwitch -1002bf6c t rtl8195a_free_hal_data -1002bf86 t StopTxBeacon -1002bfd0 T SetHalODMVar8195A -1002c088 T rtl8195a_start_thread -1002c0f0 T rtl8195a_stop_thread -1002c114 t Hal_ReadEFuse -1002c284 T GetHalODMVar8195A -1002c298 t rtw_flash_map_update.part.12 -1002c338 t rtw_flash_map_erase -1002c37c t Hal_EfusePgPacketWrite -1002c5f8 t Hal_EfuseGetCurrentSize -1002c6d8 t rtw_flash_map_write -1002c8a6 T rtl8195a_InitBeaconParameters -1002c916 T _InitBurstPktLen_8195AB -1002c920 T rtl8195a_set_hal_ops -1002ca00 T rtl8195a_init_default_value -1002ca02 T rtl8195a_InitLLTTable -1002ca4c T Hal_GetChnlGroup8195A -1002ca88 T rtw_config_map_read -1002cb74 T rtw_config_map_write -1002cc20 T Hal_InitPGData -1002cc7e T Hal_EfuseParseIDCode -1002cc96 T Hal_ReadPowerValueFromPROM_8195A -1002cd34 T Hal_EfuseParseTxPowerInfo_8195A -1002cdcc T Hal_EfuseParseEEPROMVer_8195A -1002cde2 T Hal_EfuseParsePackageType_8195A -1002ce4c T Hal_EfuseParseChnlPlan_8195A -1002ce7c T Hal_EfuseParseCustomerID_8195A -1002ce92 T Hal_EfuseParseXtal_8195A -1002ceaa T Hal_EfuseParseThermalMeter_8195A -1002ced2 T Hal_ReadRFGainOffset -1002cf22 T BWMapping_8195A -1002cf42 T SCMapping_8195A -1002cf6a T rtl8195a_update_txdesc -1002d23a T rtl8195a_fill_fake_txdesc -1002d2f8 T SetHwReg8195A -1002dfb8 T GetHwReg8195A -1002e04c T SetHalDefVar8195A -1002e12c T GetHalDefVar8195A -1002e150 T PHY_QueryBBReg_8195A_Safe -1002e17c T PHY_SetBBReg_8195A_Safe -1002e1a8 t phy_RFSerialRead_8195A -1002e25c T PHY_QueryRFReg_8195A -1002e274 T PHY_SetRFReg_8195A -1002e2cc T PHY_MACConfig8195A -1002e2e6 T PHY_BBConfig8195A -1002e3f6 T PHY_RFConfig8195A -1002e3fa T PHY_SetTxPowerIndex_8195A -1002e504 T phy_TxPwrAdjInPercentage -1002e544 T PHY_GetTxPowerIndex_8195A -1002e634 T PHY_SetTxPowerLevel8195A -1002e63a T phy_SpurCalibration_8195A -1002e8f2 T phy_SetRegBW_8195A -1002e930 T phy_PostSetBwMode8195A -1002ea8c T phy_SwChnl8195A -1002eb34 T phy_SwChnlAndSetBwMode8195A -1002eb84 T PHY_HandleSwChnlAndSetBW8195A -1002ec34 T PHY_SetBWMode8195A -1002ec56 T PHY_SwChnl8195A -1002ec70 T PHY_SetSwChnlBWMode8195A -1002ec8e t HalTimerEnable -1002eca0 T InitTDMATimer -1002ecc8 T ChangeStateByTDMA -1002ecd8 T GetMinRateInRRSR -1002ed0c T CheckInReqState -1002ed1c T InitCheckStateTimer -1002ed4c T InitGTimer1ms -1002ed98 T DeInitGTimer1ms -1002ede0 T ChangeTransmiteRate -1002ee1c T PowerBitSetting -1002ee98 T ChkandChangePS -1002eefc T IssueRsvdPagePacketSetting -1002ef70 T IssuePSPoll -1002ef9c T WaitTxStateMachineOk -1002eff0 T IssueNullData -1002f080 T PsCloseRF -1002f0b4 T PsOpenRF -1002f0e4 T ChkTxQueueIsEmpty -1002f0fc T InitPS -1002f16c T ConfigListenBeaconPeriod -1002f190 T PS_S2_Condition_Match -1002f1c4 T PS_S4_Condition_Match -1002f240 T PS_32K_Condition_Match -1002f27c T PS_S2ToS3ToS0State -1002f2e4 T PS_S2ToS0State -1002f300 T PS_S3ToS2orS0State -1002f330 T PS_S0ToS1ToS2State -1002f38c T PS_S1ToS0orS2State -1002f3bc T PS_S2ToS4State -1002f408 T PS_S0ToS6State -1002f428 T PS_S6ToS0State -1002f440 T CheckTSFIsStable -1002f490 T WaitHWStateReady -1002f4a0 T SysClkDown -1002f510 T SysClkUp -1002f55c T ResetPSParm -1002f5d0 T PS_S4ToS2State -1002f5f4 T SleepTo32K -1002f654 T Change_PS_State -1002f800 T Legacy_PS_Setting -1002f874 T PSModeSetting -1002f918 T ChangePSStateByRPWM -1002f95c T ChangeTDMAState -1002fa7c T TDMAChangeStateTask -1002faa6 T EnterPS -1002fac8 T SetSmartPSTimer -1002fb04 T GTimer7Handle -1002fb60 T SmartPS2InitTimerAndToGetRxPkt -1002fb9c T PS_OnBeacon -1002fc4c T PSBcnEarlyProcess -1002fd08 T PSMtiBcnEarlyProcess -1002fdb4 T PSRxBcnProcess -1002ff04 T TxPktInPSOn -1002ff42 T PsBcnToProcess -1002fffc T GTimer6Handle -10030048 T RPWMProcess -10030084 T PSSetMode -100300fc T SpeRPT -1003021c T ISR_BcnEarly -10030288 T ISR_MtiBcnEarly -100302bc T ISR_RxBcn -100302d8 T ISR_RxBCMD1 -10030308 T ISR_RxBCMD0 -1003035c T ISR_RxUCMD1 -1003039a T ISR_RxUCMD0 -100303d6 T ISR_TxPktIn -100303e8 T ISR_TXCCX -100303ec T H2CHDL_SetPwrMode -10030514 T CheckInReqStateTask -1003055a T HalGetNullTxRpt -10030578 T ISR_TBTT -100305f0 T H2CHDL_BcnIgnoreEDCCA -10030600 T PMUInitial -10030650 T PMUTask -1003075c T PHY_RF6052SetBandwidth8195A -100307a0 T PHY_RF6052_Config8195A -10030858 t process_rssi -1003088e T rtl8195a_query_rx_desc_status -1003093e T rtl8195a_query_rx_phy_status -10030a96 T hal_com_get_channel_plan -10030aca T HAL_IsLegalChannel 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gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN56_8195A +1004e1f0 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_TFBGA96_8195A +1004e210 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN56_8195A +1004e22e D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN48_8195A +1004e24c D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN56_8195A +1004e26c D Array_MP_8195A_RadioA +1004e834 D gDeltaSwingTableXtal_MP_P_TxXtalTrack_8195A +1004e852 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_TFBGA96_8195A +1004e872 D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN48_8195A +1004e890 D .ram.bss$$Base +1004e890 D __bss_start__ +1004e890 D __data_end__ +1004e890 D __ram_image2_text_end__ +1004e890 d skbdata_list +1004e898 V skb_data_pool +10051c98 d ucIdleTaskHeap +10051db0 D HalI2SOpSAL +10051dec D SYSAdapte +10051df0 D PwrAdapter +1005207c D libc_has_init +10052080 d rheap_end +10052084 D p_write_reconnect_ptr +10052088 d sampCntAdd +1005208c d sampCnt +10052090 D tskreader_enable +10052094 D readBuf +10052098 D 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g_tcm_heap +1005302c D flashobj +10053038 D fspic_isinit +1005303c D WDGAdapter +10053078 d last_acquire_wakelock_time +100530f8 D post_sleep_callback +10053178 D pre_sleep_callback +100531f8 D reserve_pll +100531fc d sys_sleep_time +10053200 d hold_wakelock_time +10053280 D missing_tick +10053284 D Timer2To7HandlerData +1005329c D auto_reconnect_running +100532a0 D p_wlan_autoreconnect_hdl +100532a4 D mac_monitor_callback +100532a8 D mf_list_head +100532ac d pscan_retry_cnt.21430 +100532b0 D promisc_callback_all +100532b4 D promisc_sema +100532b8 D promisc_callback +100532bc D psk_essid +10053304 D psk_passphrase +10053386 D psk_passphrase64 +100533c7 D wpa_global_PSK +10053417 d RFC1042_OUI +1005341c d rx_ring_pool +100554fc d stop_report_count.20629 +100554fd D bCheckStateTIMER +10055500 d WifiMcuCmdBitMap.20974 +10055504 D p_wlan_init_done_callback +10055508 D rtw_power_percentage_idx +1005550c D p_wlan_uart_adapter_callback +10055510 D rtw_adaptivity_en +10055514 D p_wlan_mgmt_filter +10055518 D rtw_initmac +1005551c D rtw_adaptivity_th_l2h_ini +10055520 d drvpriv +10055534 D skbbuf_used_num +10055538 V skb_pool +100556f0 D skbdata_used_num +100556f4 d wrapper_skbbuf_list +100556fc D max_skbdata_used_num +10055700 D max_skbbuf_used_num +10055704 d skb_fail_count +10055708 D timer_table +10055710 D rltk_wlan_info +10055740 d timer_used_num +10055744 D max_timer_used_num +10055748 D Noisy_State +1005574c D pExportWlanIrqSemaphore +10055750 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +1005576e D .ram.bss$$Limit +1005576e D __bss_end__ +10055770 B __ram_heap2_start__ 10070000 A __ram_heap2_end__ 1fff0000 D __ram_tcm_start__ 1fff0000 D __tcm_heap_start__ diff --git a/flasher/RTL_Reset.JLinkScript b/flasher/RTL_Reset.JLinkScript index 40a863d..3c0673f 100644 --- a/flasher/RTL_Reset.JLinkScript +++ b/flasher/RTL_Reset.JLinkScript @@ -4,6 +4,6 @@ r1 trst1 h r -w4 0x40000210,0x00211157 +w4 0x40000210,0x0211157 g q \ No newline at end of file diff --git a/flasher/RTL_RunRAM.JLinkScript b/flasher/RTL_RunRAM.JLinkScript index 82d7980..570d761 100644 --- a/flasher/RTL_RunRAM.JLinkScript +++ b/flasher/RTL_RunRAM.JLinkScript @@ -3,6 +3,6 @@ r loadbin build/bin/ram_1.bin 0x10000bc8 loadbin build/bin/ram_2.bin 0x10006000 r -w4 0x40000210,0x20200113 +w4 0x40000210,0x20111117 g q \ No newline at end of file diff --git a/project/src/user/atcmd_user.c b/project/src/user/atcmd_user.c index e6bb482..1be6214 100644 --- a/project/src/user/atcmd_user.c +++ b/project/src/user/atcmd_user.c @@ -20,7 +20,7 @@ #include "lwip/tcp_impl.h" -rtw_mode_t wifi_mode = RTW_MODE_STA; +extern rtw_mode_t wifi_mode; // = RTW_MODE_STA; mp3_server_setings mp3_serv = {0,{0}}; //{ PLAY_PORT, { PLAY_SERVER }}; @@ -121,11 +121,18 @@ void fATWS(int argc, char *argv[]){ } } +/* RAM/TCM/Heaps info */ +extern void ShowMemInfo(void); +/* +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + */ // Mem info -// Mem info -void fATST(void){ - printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", - HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +void fATST(int argc, char *argv[]) { + ShowMemInfo(); #if 0 //CONFIG_DEBUG_LOG > 1 dump_mem_block_list(); tcm_heap_dump(); @@ -151,7 +158,6 @@ void fATST(void){ } } #endif - } void fATWC(int argc, char *argv[]){ diff --git a/project/src/user/main.c b/project/src/user/main.c index 737de50..3f5de9d 100644 --- a/project/src/user/main.c +++ b/project/src/user/main.c @@ -38,7 +38,7 @@ //Priorities of the reader and the decoder thread. Higher = higher prio. #define PRIO_MAD (tskIDLE_PRIORITY + 3 + PRIORITIE_OFFSET) -#define PRIO_READER (PRIO_MAD + 1) +#define PRIO_READER (PRIO_MAD) #define mMIN(a, b) ((a < b)? a : b) @@ -467,7 +467,7 @@ void connect_start(void) { //Fire up the reader task. The reader task will fire up the MP3 decoder as soon //as it has read enough MP3 data. tskreader_enable = 1; - if (xTaskCreate(tskreader, "tskreader", 300, NULL, PRIO_READER, NULL) != pdPASS) { + if (xTaskCreate(tskreader, "tskreader", 320, NULL, PRIO_READER, NULL) != pdPASS) { #if DEBUG_MAIN_LEVEL > 0 DBG_8195A("\n%s xTaskCreate(tskreader) failed!\n", __FUNCTION__); #endif @@ -481,6 +481,13 @@ void connect_start(void) { #endif } +/* RAM/TCM/Heaps info */ +void ShowMemInfo(void) +{ + printf("\nCLK CPU\t\t%d Hz\nRAM heap\t%d bytes\nTCM heap\t%d bytes\n", + HalGetCpuClk(), xPortGetFreeHeapSize(), tcm_heap_freeSpace()); +} + /** * @brief Main program. * @param None @@ -496,22 +503,7 @@ void main(void) CfgSysDebugInfo = -1; CfgSysDebugWarn = -1; #endif - if(HalGetCpuClk() != PLATFORM_CLOCK) { -#if CPU_CLOCK_SEL_DIV5_3 - // 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); - *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17); // REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3 -#else - // 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz - *((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) &= ~(1<<17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3 - HalCpuClkConfig(CPU_CLOCK_SEL_VALUE); -#endif - HAL_LOG_UART_ADAPTER pUartAdapter; - pUartAdapter.BaudRate = UART_BAUD_RATE_38400; - HalLogUartSetBaudRate(&pUartAdapter); - SystemCoreClockUpdate(); - En32KCalibration(); - } + #ifdef CONFIG_WDG_ON_IDLE HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & 0x1FFFFF); WDGInitial(CONFIG_WDG_ON_IDLE * 1000); // 5 s @@ -526,13 +518,13 @@ void main(void) #if DEBUG_MAIN_LEVEL > 0 vPortFree(pvPortMalloc(4)); // Init RAM heap - fATST(); // RAM/TCM/Heaps info + ShowMemInfo(); // RAM/TCM/Heaps info #endif start_init(); // in atcmd_user.c /* pre-processor of application example */ - pre_example_entry(); + example_wlan_fast_connect(); // pre_example_entry(); /* wlan intialization */ #if defined(CONFIG_WIFI_NORMAL) && defined(CONFIG_NETWORK) diff --git a/sdkbuild.mk b/sdkbuild.mk index 8a58ab4..3bb1cfa 100644 --- a/sdkbuild.mk +++ b/sdkbuild.mk @@ -12,8 +12,9 @@ CFLAGS += $(INCFLAGS) SRC_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C))) $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C))) DRAM_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C))) +BOOT_O = $(patsubst %.c,%.o,$(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C))) -SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C)) +SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(SRC_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(DRAM_C)) $(patsubst sdk/%,$(SDK_PATH)%,$(BOOT_C)) OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST))) DEPENDENCY_LIST = $(patsubst %.c,$(OBJ_DIR)/%.d,$(SRC_C_LIST)) @@ -43,7 +44,7 @@ build_info: @mv -f .ver project/inc/$@.h .PHONY: application -application: build_info $(SRC_O) $(DRAM_O) +application: build_info $(SRC_O) $(DRAM_O) $(BOOT_O) @echo "===========================================================" @echo "Make BootLoader (ram_1.p.bin, ram_1.r.bin)" # @echo "===========================================================" @@ -80,6 +81,13 @@ $(DRAM_O): %.o : %.c @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ @$(OBJCOPY) --prefix-alloc-sections .sdram $(OBJ_DIR)/$@ @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) + +$(BOOT_O): %.o : %.c + @echo $< + @mkdir -p $(OBJ_DIR)/$(dir $@) + @$(CC) $(CFLAGS) $(INCFLAGS) -c $< -o $(OBJ_DIR)/$@ + @$(OBJCOPY) --prefix-alloc-sections .boot $(OBJ_DIR)/$@ + @$(CC) -MM $(CFLAGS) $(INCFLAGS) $< -MT $@ -MF $(OBJ_DIR)/$(patsubst %.o,%.d,$@) -include $(DEPENDENCY_LIST) diff --git a/sdkset.mk b/sdkset.mk index 95b6fe7..d6103dc 100644 --- a/sdkset.mk +++ b/sdkset.mk @@ -81,17 +81,24 @@ INCLUDES += sdk/component/common/application/xmodem # ------------------------------------------------------------------- SRC_C = DRAM_C = +BOOT_C = + +#bootloader +SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c +BOOT_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c + #cmsis SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/system_8195a.c #console -DRAM_C += sdk/component/common/api/at_cmd/atcmd_ethernet.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_lwip.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_sys.c -DRAM_C += sdk/component/common/api/at_cmd/atcmd_wifi.c -SRC_C += sdk/component/common/api/at_cmd/log_service.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_ethernet.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_lwip.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_sys.c +#DRAM_C += sdk/component/common/api/at_cmd/atcmd_wifi.c +#SRC_C += sdk/component/common/api/at_cmd/log_service.c #SRC_C += sdk/component/soc/realtek/8195a/misc/driver/low_level_io.c #SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_consol.c +SRC_C += sdk/component/soc/realtek/8195a/misc/driver/rtl_console_new.c #network - api SRC_C += sdk/component/common/api/wifi/rtw_wpa_supplicant/wpa_supplicant/wifi_eap_config.c @@ -346,7 +353,7 @@ SRC_C += sdk/component/common/application/xmodem/uart_fw_update.c # ------------------------------------------------------------------- ADD_SRC_C = # REVERSED -ADD_SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/app_start.c +#ADD_SRC_C += sdk/component/soc/realtek/8195a/cmsis/device/app_start.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_dac.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_common.c ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c @@ -363,8 +370,6 @@ ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvv ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c ADD_SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c -ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c -ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c # ------------------------------------------------------------------- # SAMPLES # ------------------------------------------------------------------- @@ -372,10 +377,10 @@ ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c #ADD_SRC_C += sdk/component/common/example/googlenest/example_google.c #ADD_SRC_C += sdk/component/common/example/mdns/example_mdns.c #ADD_SRC_C += sdk/component/common/example/socket_select/example_socket_select.c -ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c ADD_SRC_C += sdk/component/common/example/wlan_fast_connect/example_wlan_fast_connect.c +#ADD_SRC_C += sdk/component/common/example/uart_atcmd/example_uart_atcmd.c #ADD_SRC_C += sdk/component/common/example/xml/example_xml.c -ADD_SRC_C += sdk/component/common/example/example_entry.c +#ADD_SRC_C += sdk/component/common/example/example_entry.c #ADD_SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sd.c #ADD_SRC_C += sdk/component/common/drivers/sdio/realtek/sdio_host/src/sdio_host.c #ADD_SRC_C += sdk/component/soc/realtek/8195a/fwlib/src/hal_sdio_host.c @@ -405,7 +410,6 @@ ADD_SRC_C += project/src/mad/stream.c #driver ADD_SRC_C += project/src/driver/i2s_freertos.c -ADD_SRC_C += project/src/driver/console_api.c #include INCLUDES += project/inc/mad