This commit is contained in:
pvvx 2017-03-24 18:24:37 +03:00
parent ea5f1c1b46
commit 96cac1005b
12 changed files with 71 additions and 87 deletions

View file

@ -374,7 +374,7 @@ void _LwIP_Init(void)
tcpip_init( NULL, NULL );
chk_ap_netif_num(); // Исполняется после _wifi_on()
for(int idx = 0; idx < NET_IF_NUM; idx++) {
for(idx = 0; idx < NET_IF_NUM; idx++) {
xnetif[idx].name[0] = 'r';
xnetif[idx].name[1] = '0' + idx;
}
@ -728,7 +728,7 @@ void fATWT(int argc, char *argv[]) {
#define ReadTSF_Lo32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR)))
#define ReadTSF_Hi32() (*((volatile unsigned int *)(WIFI_REG_BASE + REG_TSFTR1)))
uint64_t get_tsf(void)
LOCAL uint64_t get_tsf(void)
{
return *((uint64_t *)(WIFI_REG_BASE + REG_TSFTR));
}

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@ -207,9 +207,10 @@ struct spic_table_flash_type spic_table_flash = {
BIT_FLASE_SIZE(0x0F), // REG_SPIC_FLASE_SIZE 0x40006124 0x0E ?
BIT_CS_H_WR_DUM_LEN(2)| BIT_AUTO_ADDR__LENGTH(3) | BIT_RD_DUMMY_LENGTH(0x0), // REG_SPIC_AUTO_LENGTH 0x4000611C 0x20030001 ?
{
BIT_WR_BLOCKING, // REG_SPIC_VALID_CMD 0x40006120 0x200 SpicOneBitMode
BIT_WR_BLOCKING | BIT_RD_DUAL_I, // REG_SPIC_VALID_CMD 0x40006120 0x200 SpicOneBitMode
BIT_WR_BLOCKING | BIT_RD_QUAD_O, // REG_SPIC_VALID_CMD 0x40006120 0x200 SpicOneBitMode
BIT_WR_BLOCKING, // REG_SPIC_VALID_CMD 0x40006120 0x200 SpicOneBitMode
BIT_WR_BLOCKING | BIT_RD_DUAL_I, // REG_SPIC_VALID_CMD 0x40006120 0x202 SpicDualBitMode
BIT_WR_BLOCKING | BIT_RD_DUAL_I, // REG_SPIC_VALID_CMD 0x40006120 0x202 SpicDualBitMode
// BIT_WR_BLOCKING | BIT_RD_QUAD_O, // REG_SPIC_VALID_CMD 0x40006120 0x208 SpicQuadBitMode MXIC not QIO
},
0xC2, 0x20 // MX25L8006/MX25L1606
};
@ -274,7 +275,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION InitSpic(uint8 SpicBitMode) {
for(x = 0; x < SpicMaxMode; x++) {
*(uint32 *)&SpicInitParaAllClk[SpicOneBitMode][x].BaudRate = ptr[0];
*(uint32 *)&SpicInitParaAllClk[SpicDualBitMode][x].BaudRate = ptr[CPU_CLK_TYPE_NO];
*(uint32 *)&SpicInitParaAllClk[SpicQuadBitMode][x].BaudRate = ptr[CPU_CLK_TYPE_NO];
*(uint32 *)&SpicInitParaAllClk[SpicQuadBitMode][x].BaudRate = ptr[CPU_CLK_TYPE_NO]; // MXIC not QIO
ptr++;
}
ACTCK_FLASH_CCTRL(1);

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@ -2655,65 +2655,65 @@
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1003c1b0 t __rtw_set_supported_rate_veneer
1003c1c0 t __rtw_set_ie_veneer
1003c1d0 t __AES_UnWRAP_veneer
1003c1e0 t __rtw_get_wps_attr_content_veneer
1003c1f0 t __AES_WRAP_veneer
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1003c220 t __aes_80211_decrypt_veneer
1003c230 t ___vsscanf_veneer
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1003c250 t __prvStrCmp_veneer
1003c260 t __HalI2SClrAllIntrRtl8195a_veneer
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1003c2b0 t __ROM_odm_QueryRxPwrPercentage_veneer
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1003c2e0 t __rtw_get_bit_value_from_ieee_value_veneer
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1003c330 t __rt_md5_hmac_veneer
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1003c370 t __rom_psk_CalcPTK_veneer
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@ -66,7 +66,7 @@ NMAPFILE = $(OBJ_DIR)/$(TARGET).nmap
#FLASHER_PATH ?= flasher/
RAM_IMAGE?= $(BIN_DIR)/ram.bin
#RAM_IMAGE?= $(BIN_DIR)/ram.bin
RAM1_IMAGE ?= $(BIN_DIR)/ram_1.bin
RAM1P_IMAGE ?= $(BIN_DIR)/ram_1.p.bin
@ -91,18 +91,12 @@ TST_IMAGE = $(BIN_DIR)/ram_2.bin
LD_ADDRESS = 0x1000B000
ST_ADDRESS = 0x10006068
.PHONY: copybin1 genbin1 genbin23 flashburn reset test readfullflash
.NOTPARALLEL: all mp copybin1 genbin1 genbin23 flashburn reset test readfullflash _endgenbin
.PHONY: genbin1 genbin23 flashburn reset test readfullflash
.NOTPARALLEL: all mp genbin1 genbin23 flashburn reset test readfullflash _endgenbin
all: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin
mp: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin
copybin1:
# cp $(patsubst sdk/%,$(SDK_PATH)%,$(BOOTS))/ram_1.r.bin $(BIN_DIR)/ram_1.r.bin
cp $(patsubst sdk/%,$(SDK_PATH)%,$(BOOTS))/ram_1.p.bin $(BIN_DIR)/ram_1.p.bin
# @chmod 777 $(OBJ_DIR)/ram_1.r.bin
# @$(OBJCOPY) --rename-section .data=.loader.data,contents,alloc,load,readonly,data -I binary -O elf32-littlearm -B arm $(BIN_DIR)/ram_1.r.bin $(OBJ_DIR)/ram_1.r.o
genbin1: $(ELFFILE) $(RAM1P_IMAGE)
genbin23: $(ELFFILE) $(OTA_IMAGE) $(FLASH_IMAGE) _endgenbin
@ -191,7 +185,7 @@ ifeq ($(RAM1_START_ADDR),$(RAM1_END_ADDR))
ifdef COMPILED_BOOT_BIN
$(OBJCOPY) --change-section-address .boot.head=0x10000ba8 -j .boot.head -j .bootloader -Obinary $(ELFFILE) $(RAM1P_IMAGE)
else
$(OBJCOPY) -j .rom_ram -Obinary $(ELFFILE) $(RAM_IMAGE)
# $(OBJCOPY) -j .rom_ram -Obinary $(ELFFILE) $(RAM_IMAGE)
$(OBJCOPY) -j .ram.start.table -j .ram_image1.text -Obinary $(ELFFILE) $(RAM1R_IMAGE)
$(PICK) 0x$(RAM1_START_ADDR) 0x$(RAM1_END_ADDR) $(RAM1R_IMAGE) $(RAM1P_IMAGE) head+reset_offset 0x0B000
endif

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@ -7,7 +7,6 @@ set $rtl8710_flasher_auto_erase = 1
set $rtl8710_flasher_auto_verify = 1
set $rtl8710_flasher_firmware_ptr = 0x10001000
set $rtl8710_flasher_buffer = 0x10008000
#262144
set $rtl8710_flasher_buffer_size = 421888
set $rtl8710_flasher_sector_size = 4096
set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF

View file

@ -45,18 +45,10 @@ build_info:
.PHONY: application
application: build_info $(SRC_O) $(DRAM_O) $(BOOT_O)
@echo "==========================================================="
@echo "Make BootLoader (ram_1.p.bin, ram_1.r.bin)"
# @echo "==========================================================="
@mkdir -p $(BIN_DIR) $(OBJ_DIR)
## @cp $(patsubst sdk/%,$(SDK_PATH)%,$(BOOTS))/ram_1.r.bin $(BIN_DIR)/ram_1.r.bin
## @cp $(patsubst sdk/%,$(SDK_PATH)%,$(BOOTS))/ram_1.p.bin $(BIN_DIR)/ram_1.p.bin
# @chmod 777 $(OBJ_DIR)/ram_1.r.bin
## $(OBJCOPY) --rename-section .data=.loader.data,contents,alloc,load,readonly,data -I binary -O elf32-littlearm -B arm $(BIN_DIR)/ram_1.r.bin $(OBJ_DIR)/ram_1.r.o
@echo "==========================================================="
@echo "Link ($(TARGET))"
# @echo "==========================================================="
## @$(LD) $(LFLAGS) -o $(ELFFILE) $(OBJ_LIST) $(OBJ_DIR)/ram_1.r.o $(LIBFLAGS) -T$(LDFILE)
@mkdir -p $(BIN_DIR) $(OBJ_DIR)
@$(LD) $(LFLAGS) -o $(ELFFILE) $(OBJ_LIST) $(LIBFLAGS) -T$(LDFILE)
@$(OBJDUMP) -d $(ELFFILE) > $(OBJ_DIR)/$(TARGET).asm
@ -96,7 +88,5 @@ VPATH:=$(OBJ_DIR) $(SDK_PATH)
#.PHONY: clean
clean:
rm -rf $(OBJ_DIR) $(BIN_DIR) $(OBJ_DIR)/$(SDK_PATH)
# @rm -f $(patsubst %.c,%.d,$(SRC_C_LIST))
# @rm -f $(patsubst %.c,%.o,$(SRC_C_LIST))