diff --git a/RTL00_SDKV35a/component/common/api/at_cmd/atcmd_sys.c b/RTL00_SDKV35a/component/common/api/at_cmd/atcmd_sys.c index e1c9095..cf2a735 100644 --- a/RTL00_SDKV35a/component/common/api/at_cmd/atcmd_sys.c +++ b/RTL00_SDKV35a/component/common/api/at_cmd/atcmd_sys.c @@ -618,7 +618,7 @@ void fATSx(void *arg) #define ATCMD_VERSION "v2" //ATCMD MAJOR VERSION, AT FORMAT CHANGED #define ATCMD_SUBVERSION "2" //ATCMD MINOR VERSION, NEW COMMAND ADDED -#define ATCMD_REVISION "1" //ATCMD FIX BUG REVISION +#define ATCMD_REVISION "2" //ATCMD FIX BUG REVISION #define SDK_VERSION "v3.5" //SDK VERSION extern void sys_reset(void); void print_system_at(void *arg); diff --git a/RTL00_SDKV35a/component/common/api/platform/esp_comp.h b/RTL00_SDKV35a/component/common/api/platform/esp_comp.h new file mode 100644 index 0000000..6a6cb87 --- /dev/null +++ b/RTL00_SDKV35a/component/common/api/platform/esp_comp.h @@ -0,0 +1,139 @@ +#ifndef _INCLUDE_ESP_COMP_H_ +#define _INCLUDE_ESP_COMP_H_ + +#include "platform_autoconf.h" +#include "flash_api.h" + +#define ICACHE_FLASH_ATTR +#define ICACHE_RODATA_ATTR +#define DATA_IRAM_ATTR + +#define os_printf(...) rtl_printf(__VA_ARGS__) +#define os_printf_plus(...) rtl_printf(__VA_ARGS__) +#define os_sprintf_fd(...) rtl_sprintf(__VA_ARGS__) +#define ets_sprintf(...) rtl_sprintf(__VA_ARGS__) +/* +#define os_malloc pvPortMalloc +#define os_zalloc pvPortZalloc +#define os_calloc pvPortCalloc +#define os_realloc pvPortRealloc +*/ +#undef os_free +#define os_free vPortFree +#define system_get_free_heap_size xPortGetFreeHeapSize +#undef os_realloc +#define os_realloc pvPortReAlloc + + +#define os_bzero rtl_bzero +#define os_delay_us wait_us // HalDelayUs +//#define os_install_putc1 rtl_install_putc1 +//#define os_install_putc2 rtl_install_putc2 +//#define os_intr_lock rtl_intr_lock +//#define os_intr_unlock rtl_intr_unlock +//#define os_isr_attach rtl_isr_attach +//#define os_isr_mask rtl_isr_mask +//#define os_isr_unmask rtl_isr_unmask +#define os_memcmp rtl_memcmp +#define os_memcpy rtl_memcpy +#define ets_memcpy rtl_memcpy +#define os_memmove rtl_memmove +#define os_memset rtl_memset +#define os_putc rtl_putc +//#define os_str2macaddr rtl_str2macaddr +//#define os_strcat strcat +#define os_strchr rtl_strchr +#define os_strrchr rtl_strrchr +#define os_strcmp rtl_strcmp +#define os_strcpy rtl_strcpy +#define os_strlen rtl_strlen +#define os_strncmp rtl_strncmp +#define os_strncpy rtl_strncpy +#define os_strstr rtl_strstr +#define os_random Rand +//extern uint32 phy_get_rand(void); +#define system_get_os_print() 1 + +#ifdef USE_US_TIMER +#define os_timer_arm_us(a, b, c) rtl_timer_arm_new(a, b, c, 0) +#endif + + +//#define os_timer_arm(a, b, c) rtl_timer_arm_new(a, b, c, 1) +//#define os_timer_disarm rtl_timer_disarm +//#define os_timer_init rtl_timer_init +//#define os_timer_setfn rtl_timer_setfn + +//#define os_timer_done rtl_timer_done +//#define os_timer_handler_isr rtl_timer_handler_isr + +//#define os_update_cpu_frequency rtl_update_cpu_frequency + +//#define os_sprintf ets_sprintf +/* +typedef struct{ + uint32_t deviceId; //+00 + uint32_t chip_size; //+04 chip size in byte + uint32_t block_size; //+08 + uint32_t sector_size; //+0c + uint32_t page_size; //+10 + uint32_t status_mask; //+14 +} SpiFlashChip; + +typedef enum { + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; + +extern SpiFlashChip * flashchip; // in RAM-BIOS: 0x3fffc714 +*/ + +// include "flash_api.h" +#define spi_flash_real_size() flash_get_size(&flashobj) +#define Cache_Read_Disable() SpicDisableRtl8195A() +#define Cache_Read_Enable(a, b, c) flash_turnon() + +#define spi_flash_get_id() ((flashobj.SpicInitPara.id[0] << 16) | (flashobj.SpicInitPara.id[1]<<8) | flashobj.SpicInitPara.id[2]) +//SpiFlashOpResult spi_flash_read_status(uint32_t * sta); +//SpiFlashOpResult spi_flash_write_status(uint32_t sta); +#define spi_flash_erase_sector(sec) flash_erase_sector(&flashobj, (sec)<<12) +#define spi_flash_write(faddr, pbuf, size) flash_stream_write(&flashobj, faddr, size, (uint8_t *)pbuf) +#define spi_flash_read(faddr, pbuf, size) flash_stream_read(&flashobj, faddr, size, (uint8_t *)pbuf) +#define spi_flash_erase_block(blk) flash_erase_block(&flashobj, (blk)<<16); + + +#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0]) +#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1]) +#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2]) +#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3]) +/* These are cast to u16_t, with the intent that they are often arguments + * to printf using the U16_F format from cc.h. */ +#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr)) +#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr)) +#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr)) +#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr)) + +#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \ + ip4_addr2_16(ipaddr), \ + ip4_addr3_16(ipaddr), \ + ip4_addr4_16(ipaddr) + +#define IPSTR "%d.%d.%d.%d" + +/* CONFIG_DEBUG_LOG: +=0 Off all diag/debug msg, +=1 Only errors, +=2 errors + warning, (default) +=3 errors + warning + info, +=4 errors + warning + info + debug, +=5 full */ +#if CONFIG_DEBUG_LOG > 3 +#define DEBUGSOO (CONFIG_DEBUG_LOG - 1) +#elif CONFIG_DEBUG_LOG > 1 +#define DEBUGSOO 2 +#else +#define DEBUGSOO CONFIG_DEBUG_LOG +#endif + +#endif // _INCLUDE_ESP_COMP_H_ diff --git a/RTL00_SDKV35a/component/common/network/netbios/netbios.c b/RTL00_SDKV35a/component/common/network/netbios/netbios.c index 78e5a90..8533dcc 100644 --- a/RTL00_SDKV35a/component/common/network/netbios/netbios.c +++ b/RTL00_SDKV35a/component/common/network/netbios/netbios.c @@ -47,7 +47,7 @@ #include "lwip/udp.h" #include "lwip/netif.h" #include "lwip_netconf.h" -#include "rtl8195a/esp_comp.h" +#include "platform/esp_comp.h" #define NETBIOS_CODE_ATTR #define NETBIOS_DATA_ATTR diff --git a/RTL00_SDKV35a/component/common/utilities/webserver.c b/RTL00_SDKV35a/component/common/utilities/webserver.c index 7da498d..7410fb6 100644 --- a/RTL00_SDKV35a/component/common/utilities/webserver.c +++ b/RTL00_SDKV35a/component/common/utilities/webserver.c @@ -85,10 +85,8 @@ #include "webserver.h" #include "wlan_intf.h" - #define CONFIG_READ_FLASH 1 - #ifdef CONFIG_READ_FLASH #ifndef CONFIG_PLATFORM_8195A @@ -104,7 +102,14 @@ #else #include "flash_api.h" +#include "flash_eep.h" +#include "feep_config.h" #include "device_lock.h" + +#ifndef FEEP_ID_WIFI_AP_CFG +#define FEEP_ID_WIFI_AP_CFG 0x5731 +#endif + #define DATA_SECTOR AP_SETTING_SECTOR #define BACKUP_SECTOR (0x00008000) @@ -542,13 +547,40 @@ int StoreApInfo() void LoadWifiConfig() { - - - flash_t flash; - rtw_wifi_config_t local_config; - uint32_t address; + local_config.boot_mode = 0; +#ifdef USE_FLASH_EEP + if(flash_read_cfg((uint8_t *)(&local_config), FEEP_ID_WIFI_AP_CFG, sizeof(rtw_wifi_config_t)) >= sizeof(rtw_wifi_config_t)) { + printf("%s: Read from FLASH!\n", __FUNCTION__); + printf("%s: local_config.boot_mode=0x%x\n", __FUNCTION__, local_config.boot_mode); + printf("%s: local_config.ssid=%s\n", __FUNCTION__, local_config.ssid); + printf("%s: local_config.channel=%d\n", __FUNCTION__, local_config.channel); + printf("%s: local_config.security_type=%d\n", __FUNCTION__, local_config.security_type); + printf("%s: local_config.password=%s\n", __FUNCTION__, local_config.password); + } + if(local_config.boot_mode == 0x77665502) { + wifi_setting.mode = RTW_MODE_AP; + if(local_config.ssid_len > 32) + local_config.ssid_len = 32; + memcpy(wifi_setting.ssid, local_config.ssid, local_config.ssid_len); + wifi_setting.ssid[local_config.ssid_len] = '\0'; + wifi_setting.channel = local_config.channel; + if(local_config.security_type == 1) + wifi_setting.security_type = RTW_SECURITY_WPA2_AES_PSK; + else + wifi_setting.security_type = RTW_SECURITY_OPEN; + if(local_config.password_len > 32) + local_config.password_len = 32; + memcpy(wifi_setting.password, local_config.password, local_config.password_len); + wifi_setting.password[local_config.password_len] = '\0'; + } + else { + LoadWifiSetting(); + } +#else + flash_t flash; + uint32_t address; address = DATA_SECTOR; @@ -560,6 +592,7 @@ void LoadWifiConfig() flash_stream_read(&flash, address, sizeof(rtw_wifi_config_t),(uint8_t *)(&local_config)); device_mutex_unlock(RT_DEV_LOCK_FLASH); + printf("\r\nLoadWifiConfig(): local_config.boot_mode=0x%x\n", local_config.boot_mode); printf("\r\nLoadWifiConfig(): local_config.ssid=%s\n", local_config.ssid); printf("\r\nLoadWifiConfig(): local_config.channel=%d\n", local_config.channel); @@ -587,12 +620,29 @@ void LoadWifiConfig() { LoadWifiSetting(); } - +#endif } int StoreApInfo() { - +#ifdef USE_FLASH_EEP + rtw_wifi_config_t wifi_config; + // clean wifi_config first + memset(&wifi_config, 0x00, sizeof(rtw_wifi_config_t)); + wifi_config.boot_mode = 0x77665502; + memcpy(wifi_config.ssid, wifi_setting.ssid, strlen((char*)wifi_setting.ssid)); + wifi_config.ssid_len = strlen((char*)wifi_setting.ssid); + wifi_config.security_type = wifi_setting.security_type; + if(wifi_setting.security_type !=0) + wifi_config.security_type = 1; + else + wifi_config.security_type = 0; + memcpy(wifi_config.password, wifi_setting.password, strlen((char*)wifi_setting.password)); + wifi_config.password_len= strlen((char*)wifi_setting.password); + wifi_config.channel = wifi_setting.channel; + printf("\n\rWritting boot mode 0x77665502 and Wi-Fi setting to flash ..."); + flash_write_cfg((uint8_t *)(&wifi_config), FEEP_ID_WIFI_AP_CFG, sizeof(wifi_config)); +#else flash_t flash; rtw_wifi_config_t wifi_config; @@ -659,11 +709,14 @@ int StoreApInfo() //flash_stream_read(&flash, address, sizeof(rtw_wifi_config_t),data); //printf("\n\r Base + 0x000FF000 +4 wifi config = %s",data[4]); //printf("\n\r Base + 0x000FF000 +71 wifi channel = %d",data[71]); - +#endif return 0; } -int EraseApinfo(){ +int EraseApinfo() { +#ifdef USE_FLASH_EEP + flash_write_cfg(NULL, FEEP_ID_WIFI_AP_CFG, 0); +#else flash_t flash; uint32_t address; @@ -671,6 +724,7 @@ int EraseApinfo(){ device_mutex_lock(RT_DEV_LOCK_FLASH); flash_erase_sector(&flash, address); device_mutex_unlock(RT_DEV_LOCK_FLASH); +#endif return 0; } #endif diff --git a/RTL00_SDKV35a/component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c b/RTL00_SDKV35a/component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c index c80d6c2..bc92140 100644 --- a/RTL00_SDKV35a/component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c +++ b/RTL00_SDKV35a/component/os/freertos/freertos_v8.1.2/Source/portable/MemMang/heap_5.c @@ -227,10 +227,8 @@ BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; void *pvReturn = NULL; /* Realtek test code start */ - if(pxEnd == NULL) - { - vPortDefineHeapRegions( xHeapRegions ); - } + if(pxEnd == NULL) vPortDefineHeapRegions( xHeapRegions ); + /* Realtek test code end */ /* The heap must be initialised before the first call to @@ -531,81 +529,87 @@ const HeapRegion_t *pxHeapRegion; xHeapRegions[2].pucStartAddress = (uint8_t*)&__sdram_data_start__; xHeapRegions[2].xSizeInBytes = (u32)0x30200000 - (u32)xHeapRegions[2].pucStartAddress; */ - int chip_id = HalGetChipId(); - if (chip_id >= CHIP_ID_8711AN && chip_id <= CHIP_ID_8711AF) xHeapRegions[2].xSizeInBytes = 0; #endif /* Can only call once! */ configASSERT( pxEnd == NULL ); pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + int chip_id = HalGetChipId(); while( pxHeapRegion->xSizeInBytes > 0 ) { - DBG_8195A("Init Heap Region: %p[%d]\n", pxHeapRegion->pucStartAddress, pxHeapRegion->xSizeInBytes); + if(pxHeapRegion->pucStartAddress > 0x20000000 + && chip_id >= CHIP_ID_8711AN && chip_id <= CHIP_ID_8711AF) { +// pxHeapRegion->pucStartAddress = 0; +// pxHeapRegion->xSizeInBytes = 0; +// DBG_8195A("ChipID: %p !\n", chip_id); + } + else { + DBG_8195A("Init Heap Region: %p[%d]\n", pxHeapRegion->pucStartAddress, pxHeapRegion->xSizeInBytes); #if CONFIG_DEBUG_LOG > 4 -// rtl_memset(pxHeapRegion->pucStartAddress, 0, pxHeapRegion->xSizeInBytes); + rtl_memset(pxHeapRegion->pucStartAddress, 0, pxHeapRegion->xSizeInBytes); #endif - xTotalRegionSize = pxHeapRegion->xSizeInBytes; - /* Ensure the heap region starts on a correctly aligned boundary. */ - ulAddress = ( uint32_t ) pxHeapRegion->pucStartAddress; - if( ( ulAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) - { - ulAddress += ( portBYTE_ALIGNMENT - 1 ); + xTotalRegionSize = pxHeapRegion->xSizeInBytes; + /* Ensure the heap region starts on a correctly aligned boundary. */ + ulAddress = ( uint32_t ) pxHeapRegion->pucStartAddress; + if( ( ulAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + ulAddress += ( portBYTE_ALIGNMENT - 1 ); + ulAddress &= ~portBYTE_ALIGNMENT_MASK; + + /* Adjust the size for the bytes lost to alignment. */ + xTotalRegionSize -= ulAddress - ( uint32_t ) pxHeapRegion->pucStartAddress; + } + + pucAlignedHeap = ( uint8_t * ) ulAddress; + + /* Set xStart if it has not already been set. */ + if( xDefinedRegions == 0 ) + { + /* xStart is used to hold a pointer to the first item in the list of + free blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( BlockLink_t * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; + } + else + { + /* Should only get here if one region has already been added to the + heap. */ + configASSERT( pxEnd != NULL ); + + /* Check blocks are passed in with increasing start addresses. */ + configASSERT( ulAddress > ( uint32_t ) pxEnd ); + } + + /* Remember the location of the end marker in the previous region, if + any. */ + pxPreviousFreeBlock = pxEnd; + + /* pxEnd is used to mark the end of the list of free blocks and is + inserted at the end of the region space. */ + ulAddress = ( ( uint32_t ) pucAlignedHeap ) + xTotalRegionSize; + ulAddress -= uxHeapStructSize; ulAddress &= ~portBYTE_ALIGNMENT_MASK; + pxEnd = ( BlockLink_t * ) ulAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; - /* Adjust the size for the bytes lost to alignment. */ - xTotalRegionSize -= ulAddress - ( uint32_t ) pxHeapRegion->pucStartAddress; + /* To start with there is a single free block in this region that is + sized to take up the entire heap region minus the space taken by the + free block structure. */ + pxFirstFreeBlockInRegion = ( BlockLink_t * ) pucAlignedHeap; + pxFirstFreeBlockInRegion->xBlockSize = ulAddress - ( uint32_t ) pxFirstFreeBlockInRegion; + pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd; + + /* If this is not the first region that makes up the entire heap space + then link the previous region to this region. */ + if( pxPreviousFreeBlock != NULL ) + { + pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion; + } + + xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; } - - pucAlignedHeap = ( uint8_t * ) ulAddress; - - /* Set xStart if it has not already been set. */ - if( xDefinedRegions == 0 ) - { - /* xStart is used to hold a pointer to the first item in the list of - free blocks. The void cast is used to prevent compiler warnings. */ - xStart.pxNextFreeBlock = ( BlockLink_t * ) pucAlignedHeap; - xStart.xBlockSize = ( size_t ) 0; - } - else - { - /* Should only get here if one region has already been added to the - heap. */ - configASSERT( pxEnd != NULL ); - - /* Check blocks are passed in with increasing start addresses. */ - configASSERT( ulAddress > ( uint32_t ) pxEnd ); - } - - /* Remember the location of the end marker in the previous region, if - any. */ - pxPreviousFreeBlock = pxEnd; - - /* pxEnd is used to mark the end of the list of free blocks and is - inserted at the end of the region space. */ - ulAddress = ( ( uint32_t ) pucAlignedHeap ) + xTotalRegionSize; - ulAddress -= uxHeapStructSize; - ulAddress &= ~portBYTE_ALIGNMENT_MASK; - pxEnd = ( BlockLink_t * ) ulAddress; - pxEnd->xBlockSize = 0; - pxEnd->pxNextFreeBlock = NULL; - - /* To start with there is a single free block in this region that is - sized to take up the entire heap region minus the space taken by the - free block structure. */ - pxFirstFreeBlockInRegion = ( BlockLink_t * ) pucAlignedHeap; - pxFirstFreeBlockInRegion->xBlockSize = ulAddress - ( uint32_t ) pxFirstFreeBlockInRegion; - pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd; - - /* If this is not the first region that makes up the entire heap space - then link the previous region to this region. */ - if( pxPreviousFreeBlock != NULL ) - { - pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion; - } - - xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; - /* Move onto the next HeapRegion_t structure. */ xDefinedRegions++; pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.p.bin b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.p.bin deleted file mode 100644 index b681894..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.p.bin and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.r.bin b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.r.bin deleted file mode 100644 index 5a583ca..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/00/ram_1.r.bin and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.p.bin b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.p.bin deleted file mode 100644 index bc3b349..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.p.bin and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.r.bin b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.r.bin deleted file mode 100644 index c553486..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/image/01/ram_1.r.bin and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.a index 06639e8..9fc4305 100644 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.a and b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_new.a differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.a deleted file mode 100644 index 2133143..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.bat deleted file mode 100644 index aab46ed..0000000 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_platform_tst.bat +++ /dev/null @@ -1,18 +0,0 @@ -set libname=lib_platform -del %libname%_tst.a -md %libname%.lib -cd %libname%.lib -PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH% -arm-none-eabi-ar.exe x ..\%libname%.a -del hal_efuse.o -del hal_common.o -del freertos_pmu_8195a.o -del hal_soc_ps_monitor.o -del app_start.o -del hal_log_uart.o -del hal_pinmux.o -del hal_misc.o -del startup.o -arm-none-eabi-ar.exe ru ..\%libname%_tst.a *.o -cd .. -rd /q /s %libname%.lib diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/filelist.txt b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/filelist.txt deleted file mode 100644 index cfca803..0000000 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/filelist.txt +++ /dev/null @@ -1,4 +0,0 @@ -ram_libc.o -ram_libgloss_retarget.o -rtl_eabi_cast_ram.o -rtl_math_ram.o diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/ram_libgloss_retarget.o b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/ram_libgloss_retarget.o deleted file mode 100644 index ed5488f..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/ram_libgloss_retarget.o and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_eabi_cast_ram.o b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_eabi_cast_ram.o deleted file mode 100644 index a9fca8f..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_eabi_cast_ram.o and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_math_ram.o b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_math_ram.o deleted file mode 100644 index 7aca8e5..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd.lib/rtl_math_ram.o and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.a deleted file mode 100644 index 232ea62..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.bat b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.bat deleted file mode 100644 index eceacb0..0000000 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/lib_rtlstd_new.bat +++ /dev/null @@ -1,13 +0,0 @@ -set libname=lib_rtlstd -del %libname%_new.a -md %libname%.lib -cd %libname%.lib -PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.2_2015q4\bin;%PATH% -arm-none-eabi-ar.exe x ..\%libname%.a -del ram_libc.o -rem del ram_libgloss_retarget.o -rem del rtl_eabi_cast_ram.o -rem del rtl_math_ram.o -arm-none-eabi-ar.exe ru ..\%libname%_new.a *.o -cd .. -rem rd /q /s %libname%.lib diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld index 6a74465..3fe1352 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld @@ -8,7 +8,7 @@ INCLUDE "export-rom_v04.txt" MEMORY { ROM_USED_RAM (rwx): ORIGIN = 0x10000bc8, LENGTH = 21560 /* end 0x10006000 */ - ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */ + ROM_HEAP (rwx) : ORIGIN = 0x10002400, LENGTH = 3K /* end 0x10003000 */ RAM_HEAP1 (rwx) : ORIGIN = 0x10003000, LENGTH = 12K /* end 0x10006000 */ BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 424K /* end 0x10070000 */ TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* end 0x20000000 */ @@ -99,17 +99,37 @@ SECTIONS .ram_image2.text : { - *(.infra.ram.start*) + *(.infra.ram.start*) + . = ALIGN(4); + KEEP(*(.init)) + + /* init data */ + . = ALIGN(4); + PROVIDE (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE (__init_array_end = .); + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + PROVIDE (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE (__fini_array_end = .); + *(.mon.ram.text*) - *(.hal.flash.text*) + *(.hal.flash.text*) *(.hal.sdrc.text*) *(.hal.gpio.text*) *(.fwu.text*) - *(.text*) + *(.otg.rom.text*) *(.sdram.text*) *(.p2p.text*) *(.wps.text*) *(.websocket.text*) + *(.text*) } > BD_RAM .ram_image2.rodata : @@ -123,11 +143,11 @@ SECTIONS . = ALIGN(4); xHeapRegions = .; LONG(__ram_heap1_start__) - LONG(__ram_heap1_end__ - __ram_heap1_start__) + LONG(__ram_heap1_end__ - __ram_heap1_start__) LONG(__ram_heap2_start__) LONG(__ram_heap2_end__ - __ram_heap2_start__) LONG(__sdram_heap_start__) - LONG(__sdram_heap_end__ - __sdram_heap_start__) + LONG(__sdram_heap_end__ - __sdram_heap_start__) LONG(0) LONG(0) } > BD_RAM @@ -136,10 +156,6 @@ SECTIONS { __data_start__ = .; *(.data*) - *(.sdram.data*) - *(.p2p.data*) - *(.wps.data*) - *(.websocket.data*) __data_end__ = .; __ram_image2_text_end__ = .; } > BD_RAM @@ -152,6 +168,12 @@ SECTIONS *(.hal.sdrc.data*) *(.hal.gpio.data*) *(.fwu.data*) + *(.bdsram.data*) + *(.bfsram.data*) + *(.sdram.data*) + *(.p2p.data*) + *(.wps.data*) + *(.websocket.data*) *(.bss*) *(COMMON) *(.sdram.bss*) @@ -159,8 +181,6 @@ SECTIONS *(.wps.bss*) *(.websocket.bss*) *(.ssl_ram_map*) - *(.bdsram.data*) - *(.bfsram.data*) __bss_end__ = .; .ram.bss$$Limit = .; diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_mdns.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_mdns.a deleted file mode 100644 index fd952ff..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_mdns.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_platform.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_platform.a deleted file mode 100644 index 8443025..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_platform.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_rtlstd.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_rtlstd.a deleted file mode 100644 index ad5f289..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_rtlstd.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan.a deleted file mode 100644 index d224b40..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan_mp.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan_mp.a deleted file mode 100644 index 0527d41..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wlan_mp.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wps.a b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wps.a deleted file mode 100644 index 1b4f7ef..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/IAR34/lib_wps.a and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut.zip b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut.zip deleted file mode 100644 index c039f79..0000000 Binary files a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/iar_utility/common/flashloader/EWARM_bcut.zip and /dev/null differ diff --git a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c index f717348..afe713a 100644 --- a/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c +++ b/RTL00_SDKV35a/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c @@ -24,8 +24,7 @@ extern char end; //------------------------------------------------------------------------- // Data declarations - -char *heap_end; +static char *rheap_end; // extern __rtl_errno; // extern end; // extern rom_libgloss_ram_map; @@ -77,12 +76,12 @@ int ram_libgloss_read(int file, char *ptr, int len) { char *ram_libgloss_sbrk(int incr) { char *prev_heap_end; - if (!heap_end) - heap_end = (char *) &end; - prev_heap_end = heap_end; - heap_end += incr; + if (!rheap_end) + rheap_end = (char *) &end; + prev_heap_end = rheap_end; + rheap_end += incr; #if CONFIG_DEBUG_LOG > 4 - DBG_8195A("ROM_heap = %p[%d], end = %p\n", prev_heap_end, incr, heap_end); + DBG_8195A("ROM_heap = %p[%d], end = %p\n", prev_heap_end, incr, rheap_end); #endif return prev_heap_end; } diff --git a/build/bin/ota.bin b/build/bin/ota.bin index 4b36579..fb596b3 100644 Binary files a/build/bin/ota.bin and b/build/bin/ota.bin differ diff --git a/build/bin/ram_2.bin b/build/bin/ram_2.bin index f44dba8..e9c0ae5 100644 Binary files a/build/bin/ram_2.bin and b/build/bin/ram_2.bin differ diff --git a/build/bin/ram_2.ns.bin b/build/bin/ram_2.ns.bin index 92f623c..1e26e55 100644 Binary files a/build/bin/ram_2.ns.bin and b/build/bin/ram_2.ns.bin differ diff --git a/build/bin/ram_2.p.bin b/build/bin/ram_2.p.bin index 70d7cd1..667e117 100644 Binary files a/build/bin/ram_2.p.bin and b/build/bin/ram_2.p.bin differ diff --git a/build/bin/ram_all.bin b/build/bin/ram_all.bin index 2fa9a83..abddec1 100644 Binary files a/build/bin/ram_all.bin and b/build/bin/ram_all.bin differ diff --git a/build/obj/build.nmap b/build/obj/build.nmap new file mode 100644 index 0000000..7362fc9 --- /dev/null +++ b/build/obj/build.nmap @@ -0,0 +1,3255 @@ + U _printf_float + w _scanf_float +00000000 A __vectors_table +00000101 A Reset_Handler +00000109 A NMI_Handler +0000010d A HardFault_Handler +00000121 A MemManage_Handler +00000125 A BusFault_Handler +00000129 A UsageFault_Handler +00000201 A HalLogUartInit +000002d9 A HalSerialPutcRtl8195a +00000309 A HalSerialGetcRtl8195a +00000329 A HalSerialGetIsrEnRegRtl8195a +00000335 A HalSerialSetIrqEnRegRtl8195a +00000341 A HalCpuClkConfig +00000355 A HalGetCpuClk +0000039d A HalRomInfo +000003b5 A HalGetRomInfo +000003c5 A HalResetVsr +00000899 A HalDelayUs +000008e1 A HalNMIHandler +00000911 A HalHardFaultHandler +00000c09 A HalMemManageHandler +00000c39 A HalBusFaultHandler +00000c69 A HalUsageFaultHandler +00000cfd A HalUart0PinCtrlRtl8195A +00000dc9 A HalUart1PinCtrlRtl8195A +00000e9d A HalUart2PinCtrlRtl8195A +00000f75 A HalSPI0PinCtrlRtl8195A +00001015 A HalSPI1PinCtrlRtl8195A +000010e5 A HalSPI2PinCtrlRtl8195A +000011b5 A HalSPI0MCSPinCtrlRtl8195A +00001275 A HalI2C0PinCtrlRtl8195A +00001381 A HalI2C1PinCtrlRtl8195A +00001459 A HalI2C2PinCtrlRtl8195A +00001529 A HalI2C3PinCtrlRtl8195A +00001639 A HalI2S0PinCtrlRtl8195A +0000176d A HalI2S1PinCtrlRtl8195A +00001845 A HalPCM0PinCtrlRtl8195A +00001949 A HalPCM1PinCtrlRtl8195A +00001a1d A HalSDIODPinCtrlRtl8195A +00001a6d A HalSDIOHPinCtrlRtl8195A +00001ab9 A HalMIIPinCtrlRtl8195A +00001b51 A HalWLLEDPinCtrlRtl8195A +00001c0d A HalWLANT0PinCtrlRtl8195A +00001c61 A HalWLANT1PinCtrlRtl8195A +00001cb5 A HalWLBTCOEXPinCtrlRtl8195A +00001d05 A HalWLBTCMDPinCtrlRtl8195A +00001d59 A HalNFCPinCtrlRtl8195A +00001da9 A HalPWM0PinCtrlRtl8195A +00001ead A HalPWM1PinCtrlRtl8195A +00001fb5 A HalPWM2PinCtrlRtl8195A +000020b1 A HalPWM3PinCtrlRtl8195A +000021b9 A HalETE0PinCtrlRtl8195A +000022c1 A HalETE1PinCtrlRtl8195A +000023c9 A HalETE2PinCtrlRtl8195A +000024d1 A HalETE3PinCtrlRtl8195A +000025d9 A HalEGTIMPinCtrlRtl8195A +00002679 A HalSPIFlashPinCtrlRtl8195A +00002725 A HalSDRPinCtrlRtl8195A +0000280d A HalJTAGPinCtrlRtl8195A +00002861 A HalTRACEPinCtrlRtl8195A +000028b9 A HalLOGUartPinCtrlRtl8195A +0000291d A HalLOGUartIRPinCtrlRtl8195A +00002981 A HalSICPinCtrlRtl8195A +000029d9 A HalEEPROMPinCtrlRtl8195A +00002a31 A HalDEBUGPinCtrlRtl8195A +00002b39 A HalPinCtrlRtl8195A +00002e5d A SpicRxCmdRtl8195A +00002ea5 A SpicWaitBusyDoneRtl8195A +00002eb5 A SpicGetFlashStatusRtl8195A +00002f55 A SpicWaitWipDoneRtl8195A +00002f6d A SpicTxCmdRtl8195A +00002fc1 A SpicSetFlashStatusRtl8195A +00003049 A SpicCmpDataForCalibrationRtl8195A +00003081 A SpicLoadInitParaFromClockRtl8195A +000030e5 A SpicInitRtl8195A +000031bd A SpicEraseFlashRtl8195A +00003279 A SpiFlashApp +000033b5 A HalPeripheralIntrHandle +00003439 A HalSysOnIntrHandle +00003485 A HalWdgIntrHandle +000034d5 A HalTimer0IntrHandle +00003525 A HalTimer1IntrHandle +00003575 A HalI2C3IntrHandle +000035c5 A HalTimer2To7IntrHandle +00003615 A HalSpi0IntrHandle +00003665 A HalGpioIntrHandle +000036b5 A HalUart0IntrHandle +000036e8 A _binary_build_bin_ram_1_r_bin_size +00003705 A HalSpiFlashIntrHandle +00003755 A HalUsbOtgIntrHandle +000037a5 A HalSdioHostIntrHandle +000037f5 A HalI2s0OrPcm0IntrHandle +00003845 A HalI2s1OrPcm1IntrHandle +00003895 A HalWlDmaIntrHandle +000038e5 A HalWlProtocolIntrHandle +00003935 A HalCryptoIntrHandle +00003985 A HalGmacIntrHandle +000039d5 A HalGdma0Ch0IntrHandle +00003a25 A HalGdma0Ch1IntrHandle +00003a75 A HalGdma0Ch2IntrHandle +00003ac5 A HalGdma0Ch3IntrHandle +00003b15 A HalGdma0Ch4IntrHandle +00003b65 A HalGdma0Ch5IntrHandle +00003bb5 A HalGdma1Ch0IntrHandle +00003c05 A HalGdma1Ch1IntrHandle +00003c55 A HalGdma1Ch2IntrHandle +00003ca5 A HalGdma1Ch3IntrHandle +00003cf5 A HalGdma1Ch4IntrHandle +00003d45 A HalGdma1Ch5IntrHandle +00003d95 A HalSdioDeviceIntrHandle +00003de5 A VectorTableInitRtl8195A +00004019 A VectorTableInitForOSRtl8195A +00004029 A VectorIrqRegisterRtl8195A +00004091 A VectorIrqUnRegisterRtl8195A +000040f1 A VectorIrqEnRtl8195A +0000418d A VectorIrqDisRtl8195A +0000422d A _UartRxDmaIrqHandle +00004281 A HalRuartPutCRtl8195a +0000429d A HalRuartGetCRtl8195a +000042bd A HalRuartRTSCtrlRtl8195a +000042e1 A HalRuartGetDebugValueRtl8195a +000043e1 A HalRuartGetIMRRtl8195a +0000442d A HalRuartSetIMRRtl8195a +00004465 A _UartIrqHandle +00004681 A HalRuartDmaInitRtl8195a +00004845 A HalRuartIntDisableRtl8195a +00004855 A HalRuartDeInitRtl8195a +00004985 A HalRuartIntEnableRtl8195a +00004995 A _UartTxDmaIrqHandle +000049d1 A HalRuartRegIrqRtl8195a +00004a4d A HalRuartAdapterLoadDefRtl8195a +00004add A HalRuartTxGdmaLoadDefRtl8195a +00004bc9 A HalRuartRxGdmaLoadDefRtl8195a +00004cc9 A RuartLock +00004ced A RuartUnLock +00004d09 A HalRuartIntSendRtl8195a +00004e35 A HalRuartDmaSendRtl8195a +00004f89 A HalRuartStopSendRtl8195a +0000504d A HalRuartIntRecvRtl8195a +000051ad A HalRuartDmaRecvRtl8195a +000052cd A HalRuartStopRecvRtl8195a +00005385 A RuartIsTimeout +000053b1 A HalRuartSendRtl8195a +00005599 A HalRuartRecvRtl8195a +00005751 A RuartResetRxFifoRtl8195a +00005775 A HalRuartResetRxFifoRtl8195a +00005829 A HalRuartInitRtl8195a +00005df1 A HalGdmaOnOffRtl8195a +00005e0d A HalGdmaChIsrEnAndDisRtl8195a +00005e51 A HalGdmaChEnRtl8195a +00005e6d A HalGdmaChDisRtl8195a +00005e91 A HalGdamChInitRtl8195a +00005ebd A HalGdmaChSetingRtl8195a +000060dd A HalGdmaChBlockSetingRtl8195a +00006419 A HalGdmaChIsrCleanRtl8195a +000064a1 A HalGdmaChCleanAutoSrcRtl8195a +00006501 A HalGdmaChCleanAutoDstRtl8195a +00006561 A HalEFUSEPowerSwitch8195AROM +000065f9 A HALEFUSEOneByteReadROM +00006699 A HALEFUSEOneByteWriteROM +0000681d A __rtl_memcmpb_v1_00 +00006861 A __rtl_random_v1_00 +00006881 A __rtl_align_to_be32_v1_00 +00006899 A __rtl_memsetw_v1_00 +000068ad A __rtl_memsetb_v1_00 +000068bd A __rtl_memcpyw_v1_00 +000068dd A __rtl_memcpyb_v1_00 +000068f5 A __rtl_memDump_v1_00 +00006901 A __rtl_AES_set_encrypt_key +00006c11 A __rtl_cryptoEngine_AES_set_decrypt_key +00006c95 A __rtl_cryptoEngine_set_security_mode_v1_00 +00006ea9 A __rtl_cryptoEngine_init_v1_00 +00007055 A __rtl_cryptoEngine_exit_v1_00 +000070b1 A __rtl_cryptoEngine_reset_v1_00 +000070ed A __rtl_cryptoEngine_v1_00 +00007c69 A __rtl_crypto_cipher_init_v1_00 +00007c89 A __rtl_crypto_cipher_encrypt_v1_00 +00007cad A __rtl_crypto_cipher_decrypt_v1_00 +00007cd5 A HalSsiPinmuxEnableRtl8195a +00007e45 A HalSsiEnableRtl8195a +00007ef9 A HalSsiDisableRtl8195a +00007fad A HalSsiLoadSettingRtl8195a +00008521 A HalSsiSetInterruptMaskRtl8195a +000085c9 A HalSsiGetInterruptMaskRtl8195a +0000863d A HalSsiSetSclkPolarityRtl8195a +00008715 A HalSsiSetSclkPhaseRtl8195a +000087e9 A HalSsiWriteRtl8195a +00008861 A HalSsiSetDeviceRoleRtl8195a +000088c9 A HalSsiSetRxFifoThresholdLevelRtl8195a +00008941 A HalSsiSetTxFifoThresholdLevelRtl8195a +000089b9 A HalSsiReadRtl8195a +00008a2d A HalSsiGetRxFifoLevelRtl8195a +00008aa5 A HalSsiGetTxFifoLevelRtl8195a +00008b1d A HalSsiGetStatusRtl8195a +00008b91 A HalSsiWriteableRtl8195a +00008c09 A HalSsiReadableRtl8195a +00008c81 A HalSsiBusyRtl8195a +00008cf9 A HalSsiReadInterruptRtl8195a +00008efd A HalSsiWriteInterruptRtl8195a +00009009 A HalSsiSetSlaveEnableRegisterRtl8195a +000090d9 A HalSsiGetInterruptStatusRtl8195a +0000914d A HalSsiInterruptEnableRtl8195a +00009299 A HalSsiInterruptDisableRtl8195a +000093e9 A HalSsiGetRawInterruptStatusRtl8195a +0000945d A HalSsiGetSlaveEnableRegisterRtl8195a +000094d1 A HalSsiInitRtl8195a +00009ba5 A _SsiReadInterrupt +00009db1 A _SsiWriteInterrupt +00009eb1 A _SsiIrqHandle +0000a061 A HalI2CWrite32 +0000a09d A HalI2CRead32 +0000a0dd A HalI2CDeInit8195a +0000a1f1 A HalI2CSendRtl8195a +0000a25d A HalI2CReceiveRtl8195a +0000a271 A HalI2CEnableRtl8195a +0000a389 A HalI2CIntrCtrl8195a +0000a3a1 A HalI2CReadRegRtl8195a +0000a3b1 A HalI2CWriteRegRtl8195a +0000a3c5 A HalI2CSetCLKRtl8195a +0000a6e9 A HalI2CMassSendRtl8195a +0000a749 A HalI2CClrIntrRtl8195a +0000a761 A HalI2CClrAllIntrRtl8195a +0000a775 A HalI2CInit8195a +0000aa31 A HalI2CDMACtrl8195a +0000aa61 A RtkI2CIoCtrl +0000aa65 A RtkI2CPowerCtrl +0000aa69 A HalI2COpInit +0000ac65 A I2CIsTimeout +0000b435 A I2CTXGDMAISRHandle +0000b4c1 A I2CRXGDMAISRHandle +0000b54d A RtkI2CIrqInit +0000b611 A RtkI2CIrqDeInit +0000b675 A RtkI2CPinMuxInit +0000b7c9 A RtkI2CPinMuxDeInit +0000b955 A RtkI2CDMAInit +0000bc95 A RtkI2CInit +0000bdad A RtkI2CDMADeInit +0000be4d A RtkI2CDeInit +0000bee5 A RtkI2CSendUserAddr +0000c07d A RtkI2CSend +0000ce51 A RtkI2CLoadDefault +0000cf21 A RtkSalI2COpInit +0000cf65 A HalI2SWrite32 +0000cf85 A HalI2SRead32 +0000cfa9 A HalI2SDeInitRtl8195a +0000cfc9 A HalI2STxRtl8195a +0000d011 A HalI2SRxRtl8195a +0000d05d A HalI2SEnableRtl8195a +0000d0b1 A HalI2SIntrCtrlRtl8195a +0000d0d1 A HalI2SReadRegRtl8195a +0000d0dd A HalI2SClrIntrRtl8195a +0000d0fd A HalI2SClrAllIntrRtl8195a +0000d11d A HalI2SInitRtl8195a +0000d2e5 A GPIO_GetIPPinName_8195a +0000d331 A GPIO_GetChipPinName_8195a +0000d39d A GPIO_PullCtrl_8195a +0000d421 A GPIO_FuncOn_8195a +0000d481 A GPIO_FuncOff_8195a +0000d4e9 A GPIO_Int_Mask_8195a +0000d511 A GPIO_Int_SetType_8195a +0000d5fd A HAL_GPIO_IrqHandler_8195a +0000d645 A HAL_GPIO_MbedIrqHandler_8195a +0000d6a1 A HAL_GPIO_UserIrqHandler_8195a +0000d6cd A HAL_GPIO_IntCtrl_8195a +0000d805 A HAL_GPIO_Init_8195a +0000dac1 A HAL_GPIO_DeInit_8195a +0000dbd1 A HAL_GPIO_ReadPin_8195a +0000dc91 A HAL_GPIO_WritePin_8195a +0000ddad A HAL_GPIO_RegIrq_8195a +0000ddf5 A HAL_GPIO_UnRegIrq_8195a +0000de15 A HAL_GPIO_UserRegIrq_8195a +0000def9 A HAL_GPIO_UserUnRegIrq_8195a +0000dfc1 A HAL_GPIO_MaskIrq_8195a +0000e061 A HAL_GPIO_UnMaskIrq_8195a +0000e101 A HAL_GPIO_IntDebounce_8195a +0000e1c1 A HAL_GPIO_GetIPPinName_8195a +0000e1c9 A HAL_GPIO_PullCtrl_8195a +0000e259 A DumpForOneBytes +0000e419 A CmdRomHelp +0000e491 A CmdWriteWord +0000e505 A CmdDumpHelfWord +0000e5f1 A CmdDumpWord +0000e6f5 A CmdDumpByte +0000e751 A CmdSpiFlashTool +0000e7a9 A GetRomCmdNum +0000e7ad A CmdWriteByte +0000e7ed A Isspace +0000e801 A Strtoul +0000e8b1 A ArrayInitialize +0000e8c9 A GetArgc +0000e8f9 A GetArgv +0000e95d A UartLogCmdExecute +0000e9fd A UartLogShowBackSpace +0000ea39 A UartLogRecallOldCmd +0000ea71 A UartLogHistoryCmd +0000eadd A UartLogCmdChk +0000ebf5 A UartLogIrqHandle +0000ecc5 A RtlConsolInit +0000ed49 A RtlConsolTaskRom +0000ed79 A RtlExitConsol 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simple_strtoul +0000f96d A simple_strtol +0000f985 A _vsscanf +0000ff71 A _sscanf +0000ff91 A div_u64 +0000ff99 A div_s64 +0000ffa1 A div_u64_rem +0000ffb1 A div_s64_rem +0000ffc1 A _strpbrk +0000ffed A _strchr +00010005 A aes_set_key +000103d1 A aes_encrypt +000114a5 A aes_decrypt +000125c9 A AES_WRAP +00012701 A AES_UnWRAP +00012861 A crc32_get +00012895 A arc4_byte +000128bd A rt_arc4_init +00012901 A rt_arc4_crypt +000131c1 A rt_md5_init +000131f5 A rt_md5_append +0001327d A rt_md5_final +000132d5 A rt_md5_hmac +00013449 A rtw_get_bit_value_from_ieee_value +00013475 A rtw_is_cckrates_included +000134b5 A rtw_is_cckratesonly_included +000134dd A rtw_check_network_type +0001350d A rtw_set_fixed_ie +0001352d A rtw_set_ie +0001355d A rtw_get_ie +00013591 A rtw_set_supported_rate +00013611 A rtw_get_rateset_len +0001362d A rtw_get_wpa_ie +000136c9 A rtw_get_wpa2_ie +00013701 A rtw_get_wpa_cipher_suite +00013769 A rtw_get_wpa2_cipher_suite +000137d1 A rtw_parse_wpa_ie +000138ad A rtw_parse_wpa2_ie +00013965 A rtw_get_sec_ie +00013a15 A rtw_get_wps_ie +00013a99 A rtw_get_wps_attr +00013b49 A rtw_get_wps_attr_content +00013b91 A rtw_ieee802_11_parse_elems +00013d9d A str_2char2num +00013db9 A key_2char2num +00013dd1 A convert_ip_addr +00013e9d A rom_psk_PasswordHash +00013ed5 A rom_psk_CalcGTK +00013f69 A rom_psk_CalcPTK +00014295 A wep_80211_encrypt +000142f5 A wep_80211_decrypt +00014389 A tkip_micappendbyte +000143d9 A rtw_secmicsetkey +00014419 A rtw_secmicappend +00014435 A rtw_secgetmic +0001449d A rtw_seccalctkipmic +000145a5 A tkip_phase1 +00014725 A tkip_phase2 +00014941 A tkip_80211_encrypt +000149d5 A tkip_80211_decrypt +00014a8d A aes1_encrypt +00014c65 A aesccmp_construct_mic_iv +00014ccd A aesccmp_construct_mic_header1 +00014d21 A aesccmp_construct_mic_header2 +00014db5 A aesccmp_construct_ctr_preload +00014e29 A aes_80211_encrypt +000151ad A aes_80211_decrypt +000155b9 A _sha1_process_message_block +00015749 A _sha1_pad_message +000157e5 A rt_sha1_init +00015831 A rt_sha1_update +000158a9 A rt_sha1_finish +00015909 A rt_hmac_sha1 +00015a65 A rom_aes_128_cbc_encrypt +00015ae1 A rom_aes_128_cbc_decrypt +00015b5d A rom_rijndaelKeySetupEnc +00015c39 A rom_aes_decrypt_init +00015d15 A rom_aes_internal_decrypt +00016071 A rom_aes_decrypt_deinit +00016085 A rom_aes_encrypt_init +0001609d A rom_aes_internal_encrypt +00016451 A rom_aes_encrypt_deinit +00017b35 A bignum_init +00017b61 A bignum_deinit +00017b81 A bignum_get_unsigned_bin_len +00017b85 A bignum_get_unsigned_bin +00017c21 A bignum_set_unsigned_bin +00017cd1 A bignum_cmp +00017cd5 A bignum_cmp_d +00017cfd A bignum_add +00017d0d A bignum_sub +00017d1d A bignum_mul +00017d2d A bignum_exptmod +00017d51 A WPS_realloc +00017d99 A os_zalloc +00017dc1 A rom_hmac_sha256_vector +00017ebd A rom_hmac_sha256 +00018009 A rom_sha256_vector +00018221 A phy_CalculateBitShift +00018239 A PHY_SetBBReg_8195A +00018279 A PHY_QueryBBReg_8195A +0001829d A ROM_odm_QueryRxPwrPercentage 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A CRYPTO_poly1305_update +0001bd8d A CRYPTO_poly1305_finish +0001ceb5 A rom_sha512_starts +0001d009 A rom_sha512_update +0001d011 A rom_sha512_finish +0001d261 A rom_sha512 +0001d299 A rom_sha512_hmac_starts +0001d35d A rom_sha512_hmac_update +0001d365 A rom_sha512_hmac_finish +0001d3b5 A rom_sha512_hmac_reset +0001d3d1 A rom_sha512_hmac +0001d40d A rom_sha512_hkdf +0001d501 A rom_ed25519_gen_keypair +0001d505 A rom_ed25519_gen_signature +0001d51d A rom_ed25519_verify_signature +0001d521 A rom_ed25519_crypto_sign_seed_keypair +0001d579 A rom_ed25519_crypto_sign_detached +0001d655 A rom_ed25519_crypto_sign_verify_detached +0001f86d A rom_ed25519_ge_double_scalarmult_vartime +0001fc35 A rom_ed25519_ge_frombytes_negate_vartime +000207d5 A rom_ed25519_ge_p3_tobytes +00020821 A rom_ed25519_ge_scalarmult_base +000209e1 A rom_ed25519_ge_tobytes +00020a2d A rom_ed25519_sc_muladd +0002603d A rom_ed25519_sc_reduce +00028a4d A __rtl_memchr_v1_00 +00028ae1 A __rtl_memcmp_v1_00 +00028b49 A __aeabi_memcpy +00028b49 A __aeabi_memcpy4 +00028b49 A __rtl_memcpy_v1_00 +00028bed A __rtl_memmove_v1_00 +00028cb5 A __aeabi_memset +00028cb5 A __rtl_memset_v1_00 +00028d49 A __rtl_strcat_v1_00 +00028d91 A __rtl_strchr_v1_00 +00028e55 A __rtl_strcmp_v1_00 +00028ec9 A __rtl_strcpy_v1_00 +00028f15 A __rtl_strlen_v1_00 +00028f69 A __rtl_strncat_v1_00 +00028fc5 A __rtl_strncmp_v1_00 +0002907d A __rtl_strncpy_v1_00 +000293cd A __rtl_strstr_v1_00 +0002960d A __rtl_strsep_v1_00 +00029619 A __rtl_strtok_v1_00 +0002962d A __rtl__strtok_r_v1_00 +00029691 A __rtl_strtok_r_v1_00 +00029699 A __rtl_close_v1_00 +000296ad A __rtl_fstat_v1_00 +000296c1 A __rtl_isatty_v1_00 +000296d5 A __rtl_lseek_v1_00 +000296e9 A __rtl_open_v1_00 +000296fd A __rtl_read_v1_00 +00029711 A __rtl_write_v1_00 +00029725 A __rtl_sbrk_v1_00 +000297bd A __rtl_ltoa_v1_00 +00029855 A __rtl_ultoa_v1_00 +000298c5 A __rtl_dtoi_v1_00 +00029945 A __rtl_dtoi64_v1_00 +000299dd A __rtl_dtoui_v1_00 +000299e5 A __rtl_ftol_v1_00 +00029a51 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__rtl_pvalloc_r_v1_00 +0002e441 A __rtl_calloc_r_v1_00 +0002e4a9 A __rtl_cfree_r_v1_00 +0002e515 A __rtl_Balloc_v1_00 +0002e571 A __rtl_Bfree_v1_00 +0002e585 A __rtl_i2b_v1_00 +0002e599 A __rtl_multadd_v1_00 +0002e629 A __rtl_mult_v1_00 +0002e769 A __rtl_pow5mult_v1_00 +0002e809 A __rtl_hi0bits_v1_00 +0002e845 A __rtl_d2b_v1_00 +0002e901 A __rtl_lshift_v1_00 +0002e9bd A __rtl_cmp_v1_00 +0002ea01 A __rtl_diff_v1_00 +0002eae9 A __rtl_sread_v1_00 +0002eb39 A __rtl_seofread_v1_00 +0002eb3d A __rtl_swrite_v1_00 +0002ebc1 A __rtl_sseek_v1_00 +0002ec11 A __rtl_sclose_v1_00 +0002ec41 A __rtl_sbrk_r_v1_00 +0002ef8d A __rtl_fflush_r_v1_00 +0002f661 A __rtl_vfprintf_r_v1_00 +00030c15 A __rtl_fpclassifyd +00030c68 A CpkClkTbl +00030c80 A ROM_IMG1_VALID_PATTEN +00030c88 A SpicCalibrationPattern +00030c98 A SpicInitCPUCLK +00030ca8 A BAUDRATE +00030d1c A OVSR +00030d90 A DIV +00030e04 A OVSR_ADJ +00030e78 A __AES_rcon +00030ea0 A __AES_Te4 +000312a0 A I2CDmaChNo +000312b4 A _GPIO_PinMap_Chip2IP_8195a +0003136c A _GPIO_PinMap_PullCtrl_8195a +00031594 A _GPIO_SWPORT_DDR_TBL +00031598 A _GPIO_EXT_PORT_TBL +0003159c A _GPIO_SWPORT_DR_TBL +000316a0 A UartLogRomCmdTable +00031700 A _HalRuartOp +00031760 A _HalGdmaOp +0003540c A RTW_WPA_OUI_TYPE +00035410 A WPA_CIPHER_SUITE_NONE +00035414 A WPA_CIPHER_SUITE_WEP40 +00035418 A WPA_CIPHER_SUITE_TKIP +0003541c A WPA_CIPHER_SUITE_CCMP +00035420 A WPA_CIPHER_SUITE_WEP104 +00035424 A RSN_CIPHER_SUITE_NONE +00035428 A RSN_CIPHER_SUITE_WEP40 +0003542c A RSN_CIPHER_SUITE_TKIP +00035430 A RSN_CIPHER_SUITE_CCMP +00035434 A RSN_CIPHER_SUITE_WEP104 +00035444 A RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X +00035448 A RSN_AUTH_KEY_MGMT_UNSPEC_802_1X +0003544c A RSN_VERSION_BSD +00035988 A rom_wps_Te0 +00035d88 A rom_wps_rcons +00035d94 A rom_wps_Td4s +00035e94 A rom_wps_Td0 +0003ec24 A txt0123456789ABCDEF +0004467c A __rom_b_cut_end__ +0004467c A __rom_c_cut_text_start__ +0004467d A HalInitPlatformLogUartV02 +0004471d A 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GPIO_Int_Clear_8195aV02 +000473b5 A HAL_GPIO_IntCtrl_8195aV02 +00047541 A FindElementIndexV02 +0004756d A HalRuartInitRtl8195aV02 +00047619 A DramInit_rom +00047979 A ChangeRandSeed_rom +00047985 A Sdr_Rand2_rom +000479dd A MemTest_rom +00047a45 A SdrCalibration_rom +00047d99 A SdrControllerInit_rom +00047e39 A SDIO_EnterCritical +00047e85 A SDIO_ExitCritical +00047ec5 A SDIO_IRQ_Handler_Rom +00047f31 A SDIO_Interrupt_Init_Rom +00047f81 A SDIO_Device_Init_Rom +00048215 A SDIO_Interrupt_DeInit_Rom +00048255 A SDIO_Device_DeInit_Rom +00048281 A SDIO_Enable_Interrupt_Rom +000482a1 A SDIO_Disable_Interrupt_Rom +000482c1 A SDIO_Clear_ISR_Rom +000482d9 A SDIO_Alloc_Rx_Pkt_Rom +00048331 A SDIO_Free_Rx_Pkt_Rom +00048355 A SDIO_Recycle_Rx_BD_Rom +000484f1 A SDIO_RX_IRQ_Handler_BH_Rom +0004851d A SDIO_RxTask_Rom +0004856d A SDIO_Process_H2C_IOMsg_Rom +0004859d A SDIO_Send_C2H_IOMsg_Rom +000485b5 A SDIO_Process_RPWM_Rom +000485e9 A SDIO_Reset_Cmd_Rom +00048611 A SDIO_Rx_Data_Transaction_Rom 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gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_TFBGA96_8195A +10050960 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN48_8195A +1005097e D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN56_8195A +1005099c D gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_QFN48_8195A +100509ba D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN56_8195A +100509d8 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_TFBGA96_8195A +100509f8 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN56_8195A +10050a16 D gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_QFN48_8195A +10050a34 D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_QFN56_8195A +10050a54 D Array_MP_8195A_RadioA +1005101c D gDeltaSwingTableXtal_MP_P_TxXtalTrack_8195A +1005103a D gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_TFBGA96_8195A +1005105a D gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_QFN48_8195A +10051078 D __ctype_ptr__ +1005107c d impure_data +100510dc D _impure_ptr +100510e0 D .ram.bss$$Base +100510e0 D SpicInitParaAllClk +100510e0 D __bss_start__ +100510e0 D __data_end__ +100510e0 D __ram_image2_text_end__ +10051170 d skbdata_list +10051178 V skb_data_pool +10054578 d ucIdleTaskHeap +10054690 D HalI2SOpSAL +100546cc D SYSAdapte +100546d0 D PwrAdapter +1005495c D p_write_reconnect_ptr +10054960 d sampCntAdd +10054964 d sampCnt +10054968 D tskreader_enable +1005496c D readBuf +10054970 D tskmad_enable +10054974 d bufUnderrunCt +10054978 d oldRate +1005497c d sampDelCnt +10054980 d ap +100549b4 D mp3_serv +10054a36 d password +10054a78 D pbuf_fifo +10054a7c D pi2s +10054a84 D libc_has_init +10054a88 d rheap_end +10054a8c D log_buf +10054af0 D __log_init_begin__ +10054af4 D log_rx_interrupt_sema +10054af8 D __log_init_end__ +10054afc D log_hash +10054bfc D eap_method +10054bfd D eap_phase +10054c00 D rtw_join_status +10054c04 d param.16189 +10054c1c d event_init.15914 +10054c20 d join_user_data +10054c24 d event_callback_list +10054da4 D paff_array +10054e1c D lwip_init_done +10054e20 D xnetif +10054e98 d s_hostent_addr.6979 +10054e9c d s_phostent_addr.6980 +10054ea4 D h_errno +10054ea8 d s_aliases.6978 +10054eac d s_hostent.6977 +10054ec0 d select_cb_list +10054ec4 d sockets +10054f84 d select_cb_ctr +10054f88 d mbox +10054f8c d tcpip_init_done_arg +10054f90 d tcpip_init_done +10054f94 d allsystems +10054f98 d allrouters +10054f9c d igmp_group_list +10054fa0 D current_header +10054fa4 d ip_id +10054fa8 D current_iphdr_src +10054fac D current_iphdr_dest +10054fb0 D current_netif +10054fb4 d str.6324 +10054fc4 d reassdatagrams +10054fc8 d ip_reass_pbufcount +10054fca D dhcp_rx_options_given +10054fd4 d xid.7384 +10054fd8 D dhcp_rx_options_val +10055000 d dns_seqno +10055004 d dns_table +10055464 d dns_servers +1005546c d dns_payload_buffer +10055670 d dns_pcb +10055674 d dns_payload +10055678 d tcpip_tcp_timer_active +1005567c d next_timeout +10055680 D netif_list +10055684 D netif_default +10055688 d netif_num +10055689 D pbuf_free_ooseq_pending +1005568c d raw_pcbs +10055690 D tcp_active_pcbs_changed +10055694 D tcp_ticks +10055698 d tcp_timer +1005569c D tcp_listen_pcbs +100556a0 D tcp_active_pcbs +100556a4 d tcp_timer_ctr +100556a8 D tcp_tw_pcbs +100556ac D tcp_tmp_pcb +100556b0 D tcp_bound_pcbs +100556b4 d seqno +100556b8 d tcplen +100556bc d ackno +100556c0 d flags +100556c1 d recv_flags +100556c4 d tcphdr +100556c8 d recv_data +100556cc d inseg +100556e0 D tcp_input_pcb +100556e4 D udp_pcbs +100556e8 d etharp_cached_entry +100556ec d arp_table +100557b4 D lwip_tickless_used +100557b8 d s_timeoutlist +100557e8 d s_nextthread +100557ec d dhcps_network_id +100557f0 d dhcps_ip_table_semaphore +100557f4 d bound_client_ethernet_address +10055804 d client_request_ip +10055808 d dhcps_local_gateway +1005580c d dhcps_send_broadcast_address +10055810 d dhcp_message_repository +10055814 d dhcp_message_total_options_lenth +10055818 d dhcps_local_mask +1005581c d dhcps_local_address +10055820 d dhcp_client_ethernet_address +10055830 d dhcps_netif +10055834 d dhcps_addr_pool_set +10055838 d dhcps_pcb +1005583c d dhcps_subnet_broadcast +10055840 d dhcps_addr_pool_start +10055844 d dhcps_allocated_client_address +10055848 d ip_table +10055868 d dhcps_addr_pool_end +1005586c D ext_upper +10055870 d xFreeBytesRemaining +10055874 d ext_free +10055878 D ext_lower +1005587c d pxEnd +10055880 d xStart +10055888 d xMinimumEverFreeBytesRemaining +1005588c d xBlockAllocatedBit +10055890 d ulTimerCountsForOneTick +10055894 d ulStoppedTimerCompensation +10055898 d xMaximumPossibleSuppressedTicks +1005589c d xPendingReadyList +100558b0 d uxTopReadyPriority +100558b4 d uxTasksDeleted +100558b8 d xTickCount +100558bc d pxReadyTasksLists +10055998 d pxOverflowDelayedTaskList +1005599c d xTasksWaitingTermination +100559b0 d pxDelayedTaskList +100559b4 d xSchedulerRunning +100559b8 d ulTaskSwitchedInTime +100559bc D pxCurrentTCB +100559c0 d uxPendedTicks +100559c4 d xSuspendedTaskList +100559d8 d uxCurrentNumberOfTasks +100559dc d ulDeltaTotalRunTime +100559e0 d xDelayedTaskList2 +100559f4 d xDelayedTaskList1 +10055a08 d uxTaskNumber +10055a0c d xYieldPending +10055a10 d uxSchedulerSuspended +10055a14 d xNumOfOverflows +10055a18 d pxCurrentTimerList +10055a1c d xActiveTimerList1 +10055a30 d xActiveTimerList2 +10055a44 d xLastTime.5284 +10055a48 d xTimerQueue +10055a4c d pxOverflowTimerList +10055a50 d xTimerTaskHandle +10055a54 d device_mutex +10055a60 d mutex_init +10055a64 d uxSavedInterruptStatus +10055a68 D min_free_heap_size +10055a6c d g_heap_inited +10055a70 d tcm_lock +10055a74 D g_tcm_heap +10055a78 D flashobj +10055a84 D fspic_isinit +10055a88 d last_acquire_wakelock_time +10055b08 D post_sleep_callback +10055b88 D pre_sleep_callback +10055c08 D reserve_pll +10055c0c d sys_sleep_time +10055c10 d hold_wakelock_time +10055c90 D missing_tick +10055c94 D Timer2To7HandlerData +10055cac D auto_reconnect_running +10055cb0 D p_wlan_autoreconnect_hdl +10055cb4 D mac_monitor_callback +10055cb8 D mf_list_head +10055cbc d pscan_retry_cnt.21430 +10055cc0 D promisc_callback_all +10055cc4 D promisc_sema +10055cc8 D promisc_callback +10055ccc D psk_essid +10055d14 D psk_passphrase +10055d96 D psk_passphrase64 +10055dd7 D wpa_global_PSK +10055e27 d RFC1042_OUI +10055e2c d rx_ring_pool +10057f0c d stop_report_count.20629 +10057f0d D bCheckStateTIMER +10057f10 d WifiMcuCmdBitMap.20974 +10057f14 D p_wlan_init_done_callback +10057f18 D rtw_power_percentage_idx +10057f1c D p_wlan_uart_adapter_callback +10057f20 D rtw_adaptivity_en +10057f24 D p_wlan_mgmt_filter +10057f28 D rtw_initmac +10057f2c D rtw_adaptivity_th_l2h_ini +10057f30 d drvpriv +10057f44 D skbbuf_used_num +10057f48 V skb_pool +10058100 D skbdata_used_num +10058104 d wrapper_skbbuf_list +1005810c D max_skbdata_used_num +10058110 D max_skbbuf_used_num +10058114 d skb_fail_count +10058118 D timer_table +10058120 D rltk_wlan_info +10058150 d timer_used_num +10058154 D max_timer_used_num +10058158 D Noisy_State +1005815c D pExportWlanIrqSemaphore +10058160 D gDeltaSwingTableXtal_MP_N_TxXtalTrack_8195A +10058180 D __malloc_sbrk_start +10058184 D __malloc_free_list +10058188 d heap_end.4167 +1005818c D errno +10058190 ? __ram_heap2_start__ +10058190 D .ram.bss$$Limit +10058190 D __bss_end__ +10070000 A __ram_heap2_end__ +1fff0000 D __ram_tcm_start__ +1fff0000 D ram_heap +1fff0000 T __ram_image1_text_start__ +1fff0000 T __ram_start_table_start__ +1fff0014 T __image1_validate_code__ +1fff0014 T __ram_start_table_end__ +1fff001c T gBoot_Gpio_Adapter +1fff0148 T .ram_image1.bss$$Base +1fff0148 T .ram_image1.bss$$Limit +1fff0148 T SetDebugFlgs +1fff0148 T __image1_bss_end__ +1fff0148 T __image1_bss_start__ +1fff0148 T __ram_image1_data_end__ +1fff0168 T InitSpic +1fff01ec T StartupHalLogUartInit +1fff0280 T StartupHalInitPlatformLogUart +1fff02b4 T RtlConsolRam +1fff02fc T RtlBootToSram +1fff04a4 T SYSCpuClkConfig +1fff04e8 T IsForceLoadDefaultImg2 +1fff0570 T _GetChipId +1fff0598 T StartupHalSpicInit +1fff05e0 T flashcpy +1fff05f8 T PreProcessForVendor +1fff08b8 t __SpicWaitWipRtl8195A_veneer +1fff08c8 t __SpicFlashInitRtl8195A_veneer +1fff08d8 t __SpicReadIDRtl8195A_veneer +1fff08e8 t __SpicNVMCalLoadAll_veneer +1fff08f8 t __HalCpuClkConfig_veneer +1fff0908 t __rtl_memset_veneer +1fff0918 t __UartLogCmdExecute_veneer +1fff0928 t __rtl_strcmp_veneer +1fff0938 t __SpicInitRtl8195A_veneer +1fff0948 t __SpicOneBitCalibrationRtl8195A_veneer +1fff0958 t __SpicCalibrationRtl8195A_veneer +1fff1414 d lfree +1fff1418 d ram_end +1fff141c d mem_mutex +1fff1420 d ram +1fff1424 d memp_memory +1fff5414 d memp_tab +1fff5454 D __tcm_heap_start__ +1fff5454 D tcm_heap +1ffffd00 D __tcm_heap_end__ +30000000 ? __sdram_bss_end__ +30000000 ? __sdram_bss_start__ +30000000 ? __sdram_data_end__ +30000000 ? __sdram_data_start__ +30000000 ? __sdram_heap_start__ +30200000 A __sdram_heap_end__ diff --git a/project/inc/feep_config.h b/project/inc/feep_config.h index 273eeb1..bd7d8bc 100644 --- a/project/inc/feep_config.h +++ b/project/inc/feep_config.h @@ -9,6 +9,7 @@ #define _INC_FEEP_CONFIG_H_ #define FEEP_ID_WIFI_CFG 0x5730 // id:'0W', type: struct wlan_fast_reconnect +#define FEEP_ID_WIFI_AP_CFG 0x5731 // id:'1W', type: struct rtw_wifi_config_t #define FEEP_ID_UART_CFG 0x5530 // id:'0U', type: UART_LOG_CONF #define FEEP_ID_LWIP_CFG 0x4C30 // id:'0L', type: struct atcmd_lwip_conf #define FEEP_ID_DHCP_CFG 0x4430 // id:'0D', type: struct