mirror of
https://github.com/drasko/open-ameba.git
synced 2024-11-23 14:34:17 +00:00
update
This commit is contained in:
parent
8f1ce60a14
commit
38dc83bcb8
55 changed files with 2059 additions and 80 deletions
35
Makefile
35
Makefile
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@ -1,50 +1,39 @@
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||||||
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include userset.mk
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all: ram_all
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all: ram_all
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mp: ram_all_mp
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mp: ram_all_mp
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.PHONY: ram_all
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.PHONY: ram_all
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ram_all:
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ram_all:
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@$(MAKE) -f sdkbuild.mk
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk
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@$(MAKE) -f flasher.mk genbin1 genbin23
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@$(MAKE) -f $(SDK_PATH)flasher.mk genbin1 genbin23
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.PHONY: ram_all_mp
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.PHONY: ram_all_mp
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ram_all_mp:
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ram_all_mp:
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@$(MAKE) -f sdkbuild.mk mp
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk mp
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@$(MAKE) -f flasher.mk mp
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@$(MAKE) -f $(SDK_PATH)flasher.mk mp
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.PHONY: clean clean_all
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.PHONY: clean clean_all
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clean:
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clean:
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@$(MAKE) -f sdkbuild.mk clean
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk clean
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clean_all:
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clean_all:
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@$(MAKE) -f sdkbuild.mk clean_all
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk clean_all
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.PHONY: flashburn runram reset test readfullflash flashwebfs
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.PHONY: flashburn runram reset test readfullflash flashwebfs
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flashburn:
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flashburn:
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#JLinkGDB-WrFlash.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk flashburn
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@$(MAKE) -f flasher.mk flashburn
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flash_OTA:
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flash_OTA:
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@$(MAKE) -f flasher.mk flash_OTA
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@$(MAKE) -f $(SDK_PATH)flasher.mk flash_OTA
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runram:
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runram:
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#JLink-RunRAM.bat
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@$(MAKE) --f $(SDK_PATH)flasher.mk runram
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@$(MAKE) --f flasher.mk runram
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reset:
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reset:
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#JLink-Reset.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk reset
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@$(MAKE) -f flasher.mk reset
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test:
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JLink-RTL00ConsoleROM.bat
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#@make -f flasher.mk test
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readfullflash:
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readfullflash:
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#JLink-RdFullFlash.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk readfullflash
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@$(MAKE) -f flasher.mk readfullflash
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.PHONY: prerequirement
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prerequirement:
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@$(file >DEPENDENCY_LIST.txt,$(DEPENDENCY_LIST))
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39
RTL00_SDKV35a/Makefile
Normal file
39
RTL00_SDKV35a/Makefile
Normal file
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@ -0,0 +1,39 @@
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include userset.mk
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all: ram_all
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mp: ram_all_mp
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.PHONY: ram_all
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ram_all:
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk
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@$(MAKE) -f $(SDK_PATH)flasher.mk genbin1 genbin23
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.PHONY: ram_all_mp
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ram_all_mp:
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk mp
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@$(MAKE) -f $(SDK_PATH)flasher.mk mp
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.PHONY: clean clean_all
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clean:
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk clean
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clean_all:
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk clean_all
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.PHONY: flashburn runram reset test readfullflash flashwebfs
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flashburn:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flashburn
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flash_OTA:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flash_OTA
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runram:
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@$(MAKE) --f $(SDK_PATH)flasher.mk runram
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reset:
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@$(MAKE) -f $(SDK_PATH)flasher.mk reset
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readfullflash:
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@$(MAKE) -f $(SDK_PATH)flasher.mk readfullflash
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@ -534,10 +534,3 @@ int __aeabi_fcmpgt(float a, float b)
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{
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{
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return __rtl_fcmpgt_v1_00(a, b);
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return __rtl_fcmpgt_v1_00(a, b);
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}
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}
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|
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@ -1,6 +1,7 @@
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# RTL8710 Flasher v0.0.alfa
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# RTL8710 Flasher v0.0.alfa
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# pvvx 21.09.2016
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# pvvx 21.09.2016
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-include paths.mk
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include userset.mk
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include $(SDK_PATH)paths.mk
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#---------------------------
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#---------------------------
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#FLASHER = stlink-v2-1
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#FLASHER = stlink-v2-1
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#FLASHER = stlink-v2
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#FLASHER = stlink-v2
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@ -133,6 +134,18 @@ flashburn:
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#@taskkill /F /IM $(JLINK_GDBSRV)
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#@taskkill /F /IM $(JLINK_GDBSRV)
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flashwebfs:
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flashwebfs:
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@echo define call1>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/WEBFiles.bin))>>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
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@echo end>>$(FLASHER_PATH)file_info.jlink
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@echo define call2>>$(FLASHER_PATH)file_info.jlink
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@echo FlasherWrite $(BIN_DIR)/WEBFiles.bin '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
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@echo end>>$(FLASHER_PATH)file_info.jlink
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@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
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@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
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#@taskkill /F /IM $(JLINK_GDBSRV)
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flashespfs:
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@echo define call1>$(FLASHER_PATH)file_info.jlink
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@echo define call1>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/webpages.espfs))>>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/webpages.espfs))>>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
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@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
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@ -144,6 +157,7 @@ flashwebfs:
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@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
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@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
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#@taskkill /F /IM $(JLINK_GDBSRV)
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#@taskkill /F /IM $(JLINK_GDBSRV)
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flash_OTA:
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flash_OTA:
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@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
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@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
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@$(GDB) -x $(FLASHER_PATH)gdb_ota.jlink
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@$(GDB) -x $(FLASHER_PATH)gdb_ota.jlink
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@ -167,9 +181,14 @@ flashimage2p:
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flashwebfs:
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flashwebfs:
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@$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \
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@$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \
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-c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \
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-c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \
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-c "rtl8710_flash_write $(BIN_DIR)/ 0xd0000" \
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-c "rtl8710_flash_write $(BIN_DIR)/WEBFiles.bin 0xd0000" \
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-c "rtl8710_reboot" -c "reset run" -c shutdown
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-c "rtl8710_reboot" -c "reset run" -c shutdown
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flashespfs:
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@$(OPENOCD) -f interface/$(FLASHER).cfg -c "transport select swd" -f $(FLASHER_PATH)rtl8710.ocd -c "init" -c "adapter_khz $(FLASHER_SPEED)" -c "reset halt" \
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-c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" \
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-c "rtl8710_flash_write $(BIN_DIR)/webpages.espfs 0xd0000" \
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-c "rtl8710_reboot" -c "reset run" -c shutdown
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reset:
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reset:
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# @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) flasher/RTLreset.JLinkScript
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# @$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) flasher/RTLreset.JLinkScript
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6
RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript
Normal file
6
RTL00_SDKV35a/flasher/RTL00ConsoleROM.JLinkScript
Normal file
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@ -0,0 +1,6 @@
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h
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||||||
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loadbin flasher/RTL00Console_ROM.bin 0x10000ba8
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|
r
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w4 0x40000210,0x4011117
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g
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q
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BIN
RTL00_SDKV35a/flasher/RTL00Console_ROM.bin
Normal file
BIN
RTL00_SDKV35a/flasher/RTL00Console_ROM.bin
Normal file
Binary file not shown.
119
RTL00_SDKV35a/flasher/RTL8710.jflash
Normal file
119
RTL00_SDKV35a/flasher/RTL8710.jflash
Normal file
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@ -0,0 +1,119 @@
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|
AppVersion = 47812
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[GENERAL]
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ConnectMode = 0
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CurrentFile = "fullflash.bin"
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DataFileSAddr = 0x98000000
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||||||
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GUIMode = 0
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||||||
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HostName = ""
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TargetIF = 1
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||||||
|
USBPort = 0
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||||||
|
USBSerialNo = 0x00000000
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||||||
|
[JTAG]
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||||||
|
IRLen = 0
|
||||||
|
MultipleTargets = 0
|
||||||
|
NumDevices = 0
|
||||||
|
Speed0 = 400
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||||||
|
Speed1 = 12000
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||||||
|
TAP_Number = 0
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||||||
|
UseAdaptive0 = 0
|
||||||
|
UseAdaptive1 = 0
|
||||||
|
UseMaxSpeed0 = 0
|
||||||
|
UseMaxSpeed1 = 0
|
||||||
|
[CPU]
|
||||||
|
CheckCoreID = 0
|
||||||
|
ChipName = "RTL8710AF"
|
||||||
|
ClockSpeed = 0x00000000
|
||||||
|
Core = 0x030000FF
|
||||||
|
CoreID = 0x00000000
|
||||||
|
CoreIDMask = 0x0F000FFF
|
||||||
|
DeviceFamily = 0x00000003
|
||||||
|
EndianMode = 0
|
||||||
|
HasInternalFlash = 0
|
||||||
|
InitStep0_Action = "Reset"
|
||||||
|
InitStep0_Comment = "Reset and Halt"
|
||||||
|
InitStep0_Value0 = 0x00000000
|
||||||
|
InitStep0_Value1 = 0x00000005
|
||||||
|
InitStep1_Action = "Go"
|
||||||
|
InitStep1_Comment = ""
|
||||||
|
InitStep1_Value0 = 0x00000000
|
||||||
|
InitStep1_Value1 = 0x00000000
|
||||||
|
InitStep2_Action = "Reset"
|
||||||
|
InitStep2_Comment = "Reset and halt target"
|
||||||
|
InitStep2_Value0 = 0x00000000
|
||||||
|
InitStep2_Value1 = 0x00000005
|
||||||
|
InitStep3_Action = "Write Register"
|
||||||
|
InitStep3_Comment = "Only T=1"
|
||||||
|
InitStep3_Value0 = 0x00000010
|
||||||
|
InitStep3_Value1 = 0x01000000
|
||||||
|
InitStep4_Action = "Write 32bit"
|
||||||
|
InitStep4_Comment = "Setup SystemCoreClock"
|
||||||
|
InitStep4_Value0 = 0x40000014
|
||||||
|
InitStep4_Value1 = 0x00000001
|
||||||
|
InitStep5_Action = "Delay"
|
||||||
|
InitStep5_Comment = ""
|
||||||
|
InitStep5_Value0 = 0x00000000
|
||||||
|
InitStep5_Value1 = 0x00000005
|
||||||
|
InitStep6_Action = "Write 32bit"
|
||||||
|
InitStep6_Comment = "Write Page Size"
|
||||||
|
InitStep6_Value0 = 0x1FFFFFF0
|
||||||
|
InitStep6_Value1 = 0x00000100
|
||||||
|
InitStep7_Action = "Write 32bit"
|
||||||
|
InitStep7_Comment = "Write Sector Size"
|
||||||
|
InitStep7_Value0 = 0x1FFFFFF4
|
||||||
|
InitStep7_Value1 = 0x00001000
|
||||||
|
InitStep8_Action = "Write 32bit"
|
||||||
|
InitStep8_Comment = "Write Block Size"
|
||||||
|
InitStep8_Value0 = 0x1FFFFFF8
|
||||||
|
InitStep8_Value1 = 0x00010000
|
||||||
|
InitStep9_Action = "Write 32bit"
|
||||||
|
InitStep9_Comment = "Write Block Count"
|
||||||
|
InitStep9_Value0 = 0x1FFFFFFC
|
||||||
|
InitStep9_Value1 = 0x00000010
|
||||||
|
NumExitSteps = 0
|
||||||
|
NumInitSteps = 10
|
||||||
|
RAMAddr = 0x10000000
|
||||||
|
RAMSize = 0x00010000
|
||||||
|
ScriptFile = ""
|
||||||
|
UseAutoSpeed = 0x00000001
|
||||||
|
UseRAM = 1
|
||||||
|
UseScriptFile = 0
|
||||||
|
[FLASH]
|
||||||
|
aSectorSel[0] =
|
||||||
|
AutoDetect = 1
|
||||||
|
BankName = ""
|
||||||
|
BankSelMode = 1
|
||||||
|
BaseAddr = 0x98000000
|
||||||
|
CheckId = 3
|
||||||
|
CustomRAMCode = "RTL8710AF.hex"
|
||||||
|
DeviceName = "Auto detected flash memory"
|
||||||
|
EndBank = 8191
|
||||||
|
NumBanks = 1
|
||||||
|
OrgNumBits = 16
|
||||||
|
OrgNumChips = 1
|
||||||
|
StartBank = 0
|
||||||
|
UseCustomRAMCode = 1
|
||||||
|
[PRODUCTION]
|
||||||
|
AutoPerformsErase = 1
|
||||||
|
AutoPerformsHardLock = 0
|
||||||
|
AutoPerformsHardUnlock = 0
|
||||||
|
AutoPerformsProgram = 1
|
||||||
|
AutoPerformsSecure = 0
|
||||||
|
AutoPerformsSoftLock = 0
|
||||||
|
AutoPerformsSoftUnlock = 1
|
||||||
|
AutoPerformsStartApp = 0
|
||||||
|
AutoPerformsUnsecure = 0
|
||||||
|
AutoPerformsVerify = 1
|
||||||
|
EnableProductionMode = 0
|
||||||
|
EnableTargetPower = 0
|
||||||
|
EraseType = 2
|
||||||
|
ProductionDelay = 0x000001F4
|
||||||
|
ProductionThreshold = 0x00000BB8
|
||||||
|
ProgramSN = 0
|
||||||
|
SerialFile = ""
|
||||||
|
SNAddr = 0x00000000
|
||||||
|
SNInc = 0x00000001
|
||||||
|
SNLen = 0x00000004
|
||||||
|
SNListFile = ""
|
||||||
|
SNValue = 0x00000001
|
||||||
|
TargetPowerDelay = 0x00000014
|
||||||
|
VerifyType = 1
|
130
RTL00_SDKV35a/flasher/RTL8710AF.hex
Normal file
130
RTL00_SDKV35a/flasher/RTL8710AF.hex
Normal file
|
@ -0,0 +1,130 @@
|
||||||
|
:100000007D0439057F05FF056506D506D706000086
|
||||||
|
:10001000D44908707047D44800680005FBD0D14827
|
||||||
|
:100020000078C0B2704710B5D048006850F44070F6
|
||||||
|
:10003000CE490860CE48006850F01000CC490860F6
|
||||||
|
:10004000CC480468062000F0B7F934F00600C9492E
|
||||||
|
:100050000860C848006850F00100C64908600020E8
|
||||||
|
:10006000C54908600020C54908600120C4490860EE
|
||||||
|
:100070000220C44908600020C34908600020C34929
|
||||||
|
:1000800008600020C249086010BD2DE9F04104005D
|
||||||
|
:100090000D001600B6B2002E01D1002048E0B6B225
|
||||||
|
:1000A000112E01DB102006004FF4407000F084F99F
|
||||||
|
:1000B00080465FF4401000F07FF95FF4403000F0BC
|
||||||
|
:1000C0007BF95FF4402000F077F9032010FA08F084
|
||||||
|
:1000D00010F44070AF490860B6B2AF480660032024
|
||||||
|
:1000E000FFF796FF200CC0B2FFF792FF200AC0B2C4
|
||||||
|
:1000F000FFF78EFF2000C0B2FFF78AFF01209E4964
|
||||||
|
:100100000860002007003800310080B289B28842C0
|
||||||
|
:1001100005D2FFF780FFBFB2E8557F1CF3E79F4889
|
||||||
|
:100120000068C007FBD4002093490860300080B20B
|
||||||
|
:10013000BDE8F08138B54FF4407000F03DF905009E
|
||||||
|
:100140005FF4401000F038F95FF4403000F034F90B
|
||||||
|
:100150005FF4402000F030F90320A84010F4407014
|
||||||
|
:100160008C49086003208C4908600120824908609E
|
||||||
|
:100170009F20FFF74DFFFFF74EFF0400FFF74BFFF7
|
||||||
|
:1001800054EA00200400FFF746FF54EA0040040050
|
||||||
|
:1001900082480068C007FBD400207749086020002F
|
||||||
|
:1001A00032BD38B54FF4407000F006F905005FF439
|
||||||
|
:1001B000401000F001F95FF4403000F0FDF85FF40A
|
||||||
|
:1001C000402000F0F9F80320A84010F44070714975
|
||||||
|
:1001D0000860012070490860012067490860052017
|
||||||
|
:1001E000FFF716FFFFF717FF04006C480068C00711
|
||||||
|
:1001F000FBD40020604908602000C0B232BD38B591
|
||||||
|
:1002000004004FF4407000F0D7F805005FF4401090
|
||||||
|
:1002100000F0D2F85FF4403000F0CEF85FF44020F8
|
||||||
|
:1002200000F0CAF80120A84010F440705949086055
|
||||||
|
:100230000120514908602000C0B2FFF7E9FE57488D
|
||||||
|
:100240000068C007FBD400204B49086031BD38B5B9
|
||||||
|
:1002500004004FF4407000F0AFF805005FF4401068
|
||||||
|
:1002600000F0AAF85FF4403000F0A6F85FF44020F8
|
||||||
|
:1002700000F0A2F80120A84010F440704549086041
|
||||||
|
:1002800001203D4908602020FFF7C2FE200CC0B2CB
|
||||||
|
:10029000FFF7BEFE200AC0B2FFF7BAFE2000C0B2D0
|
||||||
|
:1002A000FFF7B6FE3D480068C007FBD40020324986
|
||||||
|
:1002B000086031BD2DE9F04104000D001600B6B212
|
||||||
|
:1002C000002E01D100204BE0B6B2B6F5807F02DDF2
|
||||||
|
:1002D0004FF4807006004FF4407000F06DF88046D7
|
||||||
|
:1002E0005FF4401000F068F85FF4403000F064F80C
|
||||||
|
:1002F0005FF4402000F060F8012010FA08F010F4DC
|
||||||
|
:1003000040702449086001201B4908600220FFF763
|
||||||
|
:100310007FFE200CC0B2FFF77BFE200AC0B2FFF7C1
|
||||||
|
:1003200077FE2000C0B2FFF773FE00200700380000
|
||||||
|
:10033000310080B289B2884205D2BFB2E85DFFF7D2
|
||||||
|
:1003400067FE7F1CF3E7154800684007FBD513489C
|
||||||
|
:100350000068C007FBD4002007490860300080B265
|
||||||
|
:10036000BDE8F08160600040246000403002004041
|
||||||
|
:1003700010020040C0020040086000402C600040B5
|
||||||
|
:100380001060004014600040186000401C60004095
|
||||||
|
:100390004C60004000600040046000402860004065
|
||||||
|
:1003A00080B5FFF7FEFEC007FBD401BD80B5FFF7A7
|
||||||
|
:1003B000F8FE8007FBD501BD90FAA0F0B0FA80F0FE
|
||||||
|
:1003C00070470000010051EA510151EA910151EAE0
|
||||||
|
:1003D000111151EA112151EA1141064A7A441432AD
|
||||||
|
:1003E000DFF8B03203FB01F3DB0E52F823201000DC
|
||||||
|
:1003F000704700BF80030000DFF89C02006850F0E7
|
||||||
|
:100400004070DFF894120860DFF89002006850F442
|
||||||
|
:100410008070DFF888120860FF20DFF8841208601F
|
||||||
|
:10042000FF20DFF880120860704780B500F054F9B3
|
||||||
|
:1004300001BD0120DFF870120860704780B571B609
|
||||||
|
:1004400072B6FFF7F6FFFFF7D7FFFFF7EEFF01BD2C
|
||||||
|
:1004500080B5FFF7E8FDFFF7A3FFFFF76BFEFFF79F
|
||||||
|
:100460009FFF92480068FFF7ADFF914908609148EF
|
||||||
|
:100470000068FFF7A7FF9049086001BDF8B50400C8
|
||||||
|
:100480000D0016008D4800688D49884204D18D48C2
|
||||||
|
:1004900000688D49884209D08948884908608A489F
|
||||||
|
:1004A00088490860FFF7CAFFFFF7D2FF814800685C
|
||||||
|
:1004B00086490968864A12685143B1FBF0F27368B5
|
||||||
|
:1004C00040271F807A4F3F689F700027DF70012709
|
||||||
|
:1004D0001F7101275F7100279F710127DF710127BD
|
||||||
|
:1004E0001F7200275F7201279F7201271F6100277B
|
||||||
|
:1004F000DFF8DCC1DCF800C067451CD2DFF8CCC1F6
|
||||||
|
:10050000DCF800C00CFB07FC5FF00C0E0EFB07FED6
|
||||||
|
:100510009E44CEF814C05FF00C0C0CFB07FC9C440E
|
||||||
|
:10052000CCF818205FF00C0C0CFB07FC9C44CCF8BA
|
||||||
|
:100530001C007F1CDCE7F1BD2DE9F04704000D0035
|
||||||
|
:1005400016007769D6F81080D6F80490002F14D0E2
|
||||||
|
:10055000200000F0C0F8112F02D35FF0100A00E075
|
||||||
|
:10056000BA46524692B249464046FFF78EFD1AEB14
|
||||||
|
:100570000808D144B7EB0A07E8E7BDE8F0872DE9A2
|
||||||
|
:10058000F84F04000D0016000020286077694848E5
|
||||||
|
:100590000068B84638FA00F8D6F810904448006869
|
||||||
|
:1005A00039FA00F9D6F804A0B8F1000F25D0B7F554
|
||||||
|
:1005B000807F02D94FF4807B00E0BB46FFF7F0FE5E
|
||||||
|
:1005C0000620FFF71CFEFFF7F1FE5A4692B2514695
|
||||||
|
:1005D0003648006800FB09F0FFF76CFEFFF7E0FE0D
|
||||||
|
:1005E0000420FFF70CFEFFF7DBFEDA44B7EB0B0746
|
||||||
|
:1005F000B8F1010819F10109D6E7BDE8F18F2DE93D
|
||||||
|
:10060000F84304000D00160030692B490968C84002
|
||||||
|
:10061000070070698046002028602648006800FBBB
|
||||||
|
:1006200007F08146B8F1000F1AD0200000F053F80F
|
||||||
|
:10063000FFF7B6FE0620FFF7E2FDFFF7B7FE4846DC
|
||||||
|
:10064000FFF705FEFFF7ACFE0420FFF7D8FDFFF72C
|
||||||
|
:10065000A7FE1848006810EB0909B8F10108E1E7A6
|
||||||
|
:10066000BDE8F18310B504001448006814498842BD
|
||||||
|
:1006700004D1144800681449884209D010480F4931
|
||||||
|
:10068000086011480F490860FFF7D8FEFFF7E0FE49
|
||||||
|
:1006900010BD0000DDACC407300200401C02004069
|
||||||
|
:1006A000200300402403004014000040F0FFFF1F1F
|
||||||
|
:1006B000E0FFFF1FF4FFFF1FE4FFFF1FE8FFFF1F26
|
||||||
|
:1006C000AA55AA55ECFFFF1F55AA55AAF8FFFF1F10
|
||||||
|
:1006D000FCFFFF1F7047704710B51E48006850F4BC
|
||||||
|
:1006E00040501C4908601C48006850F480501A496A
|
||||||
|
:1006F00008601A4800684006FBD5194804685FF492
|
||||||
|
:100700004000FFF759FE34F44000154908601448D2
|
||||||
|
:10071000006850F4801012490860002011490860F8
|
||||||
|
:100720001148006850F080000F49086044200F49CC
|
||||||
|
:10073000086000200B49086003240320FFF73CFEFB
|
||||||
|
:1007400014FA00F010F0030007490860002008497F
|
||||||
|
:10075000086010BD3002004010020040143000401C
|
||||||
|
:10076000C0020040043000400C3000400030004027
|
||||||
|
:1007700008300040000000000900000001000000F7
|
||||||
|
:100780000A0000000D00000015000000020000003B
|
||||||
|
:100790001D0000000B0000000E0000001000000013
|
||||||
|
:1007A0001200000016000000190000000300000005
|
||||||
|
:1007B0001E000000080000000C00000014000000F3
|
||||||
|
:1007C0001C0000000F0000001100000018000000D5
|
||||||
|
:1007D00007000000130000001B00000017000000CD
|
||||||
|
:1007E000060000001A0000000500000004000000E0
|
||||||
|
:0407F0001F000000E6
|
||||||
|
:0400000500000000F7
|
||||||
|
:00000001FF
|
17
RTL00_SDKV35a/flasher/RTL_FFlash.JLinkScript
Normal file
17
RTL00_SDKV35a/flasher/RTL_FFlash.JLinkScript
Normal file
|
@ -0,0 +1,17 @@
|
||||||
|
h
|
||||||
|
r
|
||||||
|
w4 0x40000230,0x0000D3C4
|
||||||
|
w4 0x40000210,0x00200113
|
||||||
|
w4 0x400002C0,0x00110001
|
||||||
|
w4 0x40006008,0
|
||||||
|
w4 0x4000602C,0
|
||||||
|
w4 0x40006010,1
|
||||||
|
w4 0x40006014,2
|
||||||
|
w4 0x40006018,0
|
||||||
|
w4 0x4000601C,0
|
||||||
|
w4 0x4000604C,0
|
||||||
|
savebin fullflash.bin 0x98000000 0x100000
|
||||||
|
w4 0x40000210,0x211157
|
||||||
|
r
|
||||||
|
g
|
||||||
|
q
|
11
RTL00_SDKV35a/flasher/RTL_RdROM.JLinkScript
Normal file
11
RTL00_SDKV35a/flasher/RTL_RdROM.JLinkScript
Normal file
|
@ -0,0 +1,11 @@
|
||||||
|
r0
|
||||||
|
trst0
|
||||||
|
r1
|
||||||
|
trst1
|
||||||
|
h
|
||||||
|
r
|
||||||
|
savebin bios-rom.bin 0x00000000 0x100000
|
||||||
|
w4 0x40000210,0x211157
|
||||||
|
r
|
||||||
|
g
|
||||||
|
q
|
9
RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript
Normal file
9
RTL00_SDKV35a/flasher/RTL_Reset.JLinkScript
Normal file
|
@ -0,0 +1,9 @@
|
||||||
|
r0
|
||||||
|
trst0
|
||||||
|
r1
|
||||||
|
trst1
|
||||||
|
h
|
||||||
|
r
|
||||||
|
w4 0x40000210,0x111157
|
||||||
|
g
|
||||||
|
q
|
12
RTL00_SDKV35a/flasher/RTL_RunRAM.JLinkScript
Normal file
12
RTL00_SDKV35a/flasher/RTL_RunRAM.JLinkScript
Normal file
|
@ -0,0 +1,12 @@
|
||||||
|
r0
|
||||||
|
trst0
|
||||||
|
r1
|
||||||
|
trst1
|
||||||
|
h
|
||||||
|
r
|
||||||
|
loadbin build/bin/ram_1.r.bin 0x10000bc8
|
||||||
|
loadbin build/bin/ram_2.bin 0x10006000
|
||||||
|
r
|
||||||
|
w4 0x40000210,0x20111157
|
||||||
|
g
|
||||||
|
q
|
|
@ -0,0 +1,3 @@
|
||||||
|
@echo off
|
||||||
|
call paths.bat
|
||||||
|
start JLink.exe -Device CORTEX-M3 -If SWD -Speed 4000 flasher\RTL00ConsoleROM.JLinkScript
|
|
@ -0,0 +1,3 @@
|
||||||
|
@echo off
|
||||||
|
call paths.bat
|
||||||
|
JLink.exe -Device CORTEX-M3 -If SWD -Speed 10000 flasher/RTL_FFlash.JLinkScript
|
3
RTL00_SDKV35a/flasher/add_sample_bat/JLink-Reset.bat
Normal file
3
RTL00_SDKV35a/flasher/add_sample_bat/JLink-Reset.bat
Normal file
|
@ -0,0 +1,3 @@
|
||||||
|
@echo off
|
||||||
|
call paths.bat
|
||||||
|
JLink.exe -Device CORTEX-M3 -If SWD -Speed 1000 flasher\RTL_Reset.JLinkScript
|
3
RTL00_SDKV35a/flasher/add_sample_bat/JLink-RunRAM.bat
Normal file
3
RTL00_SDKV35a/flasher/add_sample_bat/JLink-RunRAM.bat
Normal file
|
@ -0,0 +1,3 @@
|
||||||
|
@echo off
|
||||||
|
call paths.bat
|
||||||
|
start JLink.exe -Device CORTEX-M3 -If SWD -Speed 4000 flasher\RTL_RunRAM.JLinkScript
|
40
RTL00_SDKV35a/flasher/add_sample_bat/ameba_tools.py
Normal file
40
RTL00_SDKV35a/flasher/add_sample_bat/ameba_tools.py
Normal file
|
@ -0,0 +1,40 @@
|
||||||
|
import jlinkarm as jl
|
||||||
|
|
||||||
|
def loaddll(dll_path):
|
||||||
|
jl.loadJLinkARMdll(dll_path)
|
||||||
|
jl.open()
|
||||||
|
if jl.is_connected == 0:
|
||||||
|
raise RuntimeError('Jlink not connected')
|
||||||
|
jl.exec_command('device Cortex-M3', 0, 0)
|
||||||
|
jl.exec_command('endian little', 0, 0)
|
||||||
|
jl.tif_select(1)
|
||||||
|
jl.set_speed(1000)
|
||||||
|
jl.clear_RESET()
|
||||||
|
jl.clear_TRST()
|
||||||
|
time.sleep(0.01)
|
||||||
|
jl.set_RESET()
|
||||||
|
jl.set_TRST()
|
||||||
|
jl.reset()
|
||||||
|
jl.halt()
|
||||||
|
jl.set_speed(3500)
|
||||||
|
|
||||||
|
def ram_all(binfile, image1=True, image2=True):
|
||||||
|
bin = None
|
||||||
|
with file(binfile, 'rb') as f:
|
||||||
|
bin = f.read()
|
||||||
|
get_dword = lambda address: struct.unpack('<L', bin[address:address + 4])[0]
|
||||||
|
|
||||||
|
if image1:
|
||||||
|
i1_address = 0x0
|
||||||
|
i1_length = get_dword(0x10)
|
||||||
|
jl.write_mem(0x10000bc8, bin[i1_address + 0x20: i1_address + 0x20 + i1_length])
|
||||||
|
|
||||||
|
if image2:
|
||||||
|
i2_address = (get_dword(0x18) & 0xffff) * 1024
|
||||||
|
i2_length = get_dword(i2_address) + 0x10
|
||||||
|
jl.write_mem(0x10006000, bin[i2_address + 0x10: i2_address + 0x10 + i2_length])
|
||||||
|
|
||||||
|
jl.reset()
|
||||||
|
jl.write_u32(0x40000210, 0x20111113)
|
||||||
|
jl.go()
|
||||||
|
jl.close()
|
113
RTL00_SDKV35a/flasher/add_sample_bat/jlinkarm.py
Normal file
113
RTL00_SDKV35a/flasher/add_sample_bat/jlinkarm.py
Normal file
|
@ -0,0 +1,113 @@
|
||||||
|
import ctypes
|
||||||
|
|
||||||
|
_jl = None
|
||||||
|
|
||||||
|
def loadJLinkARMdll(lib_str):
|
||||||
|
global _jl
|
||||||
|
_jl = ctypes.cdll.LoadLibrary(lib_str)
|
||||||
|
if _jl:
|
||||||
|
return _jl
|
||||||
|
else:
|
||||||
|
raise RuntimeError('JLink ARM dynamic library is not loaded')
|
||||||
|
|
||||||
|
def _jlink():
|
||||||
|
if _jl:
|
||||||
|
return _jl
|
||||||
|
else:
|
||||||
|
raise RuntimeError('JLink ARM dynamic library is not loaded')
|
||||||
|
|
||||||
|
def open():
|
||||||
|
r = _jlink().JLINKARM_Open()
|
||||||
|
if r != 0: raise RuntimeError('Adapter is not found')
|
||||||
|
|
||||||
|
def exec_command(cmd, a, b):
|
||||||
|
r = _jlink().JLINKARM_ExecCommand(cmd, a, b)
|
||||||
|
#if r != 0: raise RuntimeError('Unable to execute command')
|
||||||
|
|
||||||
|
def tif_select(n):
|
||||||
|
if not isinstance(n, ctypes.c_ulong):
|
||||||
|
n = ctypes.c_ulong(n)
|
||||||
|
r = _jlink().JLINKARM_TIF_Select(n)
|
||||||
|
if r != 0: raise RuntimeError('Unable to select TIF')
|
||||||
|
|
||||||
|
def set_speed(speed):
|
||||||
|
if not isinstance(speed, ctypes.c_ulong):
|
||||||
|
speed = ctypes.c_ulong(speed)
|
||||||
|
r = _jlink().JLINKARM_SetSpeed(speed)
|
||||||
|
#if r != 0: raise RuntimeError('Unable to set speed')
|
||||||
|
|
||||||
|
def reset():
|
||||||
|
r = _jlink().JLINKARM_Reset()
|
||||||
|
if r != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def is_connected():
|
||||||
|
if _jlink().JLINKARM_IsConnected() != 0: return True
|
||||||
|
else: return False
|
||||||
|
|
||||||
|
def go():
|
||||||
|
r = _jlink().JLINKARM_Go()
|
||||||
|
#if r != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def write_u32(r, val):
|
||||||
|
if not isinstance(val, ctypes.c_ulong):
|
||||||
|
val = ctypes.c_ulong(val)
|
||||||
|
r = _jlink().JLINKARM_WriteU32(r, val)
|
||||||
|
if r != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def read_reg(r):
|
||||||
|
return _jlink().JLINKARM_ReadReg(r)
|
||||||
|
|
||||||
|
def write_reg(r, val):
|
||||||
|
if not isinstance(val, ctypes.c_ulong):
|
||||||
|
val = ctypes.c_ulong(val)
|
||||||
|
ret = _jlink().JLINKARM_WriteReg(r, val)
|
||||||
|
#if ret != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def get_speed():
|
||||||
|
return _jlink().JLINKARM_GetSpeed()
|
||||||
|
|
||||||
|
def write_mem(startaddress, buf):
|
||||||
|
_jlink().JLINKARM_WriteMem.argtypes = [ctypes.c_int, ctypes.c_int, ctypes.c_char_p]
|
||||||
|
_jlink().JLINKARM_WriteMem.restype = ctypes.c_int
|
||||||
|
print "writemem addr %s size %s" % (hex(startaddress), hex(len(buf)))
|
||||||
|
r = _jlink().JLINKARM_WriteMem(startaddress, len(buf), buf)
|
||||||
|
#if r != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def read_mem_U32(startaddress, count):
|
||||||
|
buftype=ctypes.c_uint32 * int(count)
|
||||||
|
buf=buftype()
|
||||||
|
r=_jlink().JLINKARM_ReadMemU32(startaddress, count, buf, 0)
|
||||||
|
#if r != 0: raise RuntimeError('fail')
|
||||||
|
return buf
|
||||||
|
|
||||||
|
def close():
|
||||||
|
r = _jlink().JLINKARM_Close()
|
||||||
|
#if r != 0: raise RuntimeError('fail')
|
||||||
|
|
||||||
|
def clear_TCK():
|
||||||
|
r = _jlink().JLINKARM_ClrTCK()
|
||||||
|
def set_TCK():
|
||||||
|
r = _jlink().JLINKARM_SetTCK()
|
||||||
|
|
||||||
|
def clear_TMS():
|
||||||
|
r = _jlink().JLINKARM_ClrTMS()
|
||||||
|
def set_TMS():
|
||||||
|
r = _jlink().JLINKARM_SetTMS()
|
||||||
|
|
||||||
|
def clear_TDI():
|
||||||
|
r = _jlink().JLINKARM_ClrTDI()
|
||||||
|
def set_TDI():
|
||||||
|
r = _jlink().JLINKARM_SetTDI()
|
||||||
|
|
||||||
|
def clear_TRST():
|
||||||
|
r = _jlink().JLINKARM_ClrTRST()
|
||||||
|
def set_TRST():
|
||||||
|
r = _jlink().JLINKARM_SetTRST()
|
||||||
|
|
||||||
|
def clear_RESET():
|
||||||
|
r = _jlink().JLINKARM_ClrRESET()
|
||||||
|
def set_RESET():
|
||||||
|
r = _jlink().JLINKARM_SetRESET()
|
||||||
|
|
||||||
|
def halt():
|
||||||
|
r = _jlink().JLINKARM_Halt()
|
1
RTL00_SDKV35a/flasher/add_sample_bat/paths.bat
Normal file
1
RTL00_SDKV35a/flasher/add_sample_bat/paths.bat
Normal file
|
@ -0,0 +1 @@
|
||||||
|
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.4_2016q2\bin;D:\MCU\SEGGER\JLink_V612i;%PATH%
|
53
RTL00_SDKV35a/flasher/add_sample_bat/runram.py
Normal file
53
RTL00_SDKV35a/flasher/add_sample_bat/runram.py
Normal file
|
@ -0,0 +1,53 @@
|
||||||
|
#!/usr/bin/env python3
|
||||||
|
# -*- coding: cp1251 -*-
|
||||||
|
import jlinkarm as jl
|
||||||
|
import os, sys, time, struct
|
||||||
|
|
||||||
|
dllfilename = 'D:/MCU/SEGGER/JLink_V612i/JLinkARM.dll'
|
||||||
|
|
||||||
|
if __name__ == '__main__':
|
||||||
|
if len(sys.argv) >= 2:
|
||||||
|
if sys.argv[1] == '-h':
|
||||||
|
print 'Usage: ldram.py ram_all.bin'
|
||||||
|
exit(0)
|
||||||
|
imgfilename = 'build/bin/ram_all.bin'
|
||||||
|
|
||||||
|
if len(sys.argv) > 1:
|
||||||
|
if sys.argv[1]:
|
||||||
|
imgfilename = sys.argv[1]
|
||||||
|
try:
|
||||||
|
ff = open(imgfilename, "rb")
|
||||||
|
except:
|
||||||
|
print "Error file open " + imgfilename
|
||||||
|
exit(1)
|
||||||
|
jl.loadJLinkARMdll(dllfilename)
|
||||||
|
jl.open()
|
||||||
|
if jl.is_connected == 0:
|
||||||
|
raise RuntimeError('Jlink not connected')
|
||||||
|
jl.exec_command('device Cortex-M3', 0, 0)
|
||||||
|
jl.exec_command('endian little', 0, 0)
|
||||||
|
jl.tif_select(1)
|
||||||
|
jl.set_speed(1000)
|
||||||
|
jl.clear_RESET()
|
||||||
|
jl.clear_TRST()
|
||||||
|
time.sleep(0.01)
|
||||||
|
jl.set_RESET()
|
||||||
|
jl.set_TRST()
|
||||||
|
jl.reset()
|
||||||
|
jl.halt()
|
||||||
|
jl.set_speed(3500)
|
||||||
|
bin = ff.read()
|
||||||
|
get_dword = lambda address: struct.unpack('<L', bin[address:address + 4])[0]
|
||||||
|
i1_address = 0x0
|
||||||
|
i1_length = get_dword(0x10)
|
||||||
|
jl.write_mem(0x10000bc8, bin[i1_address + 0x20: i1_address + 0x20 + i1_length])
|
||||||
|
i2_address = (get_dword(0x18) & 0xffff) * 1024
|
||||||
|
i2_length = get_dword(i2_address) + 0x10
|
||||||
|
jl.write_mem(0x10006000, bin[i2_address + 0x10: i2_address + 0x10 + i2_length])
|
||||||
|
jl.reset()
|
||||||
|
jl.write_u32(0x40000210, 0x20111113)
|
||||||
|
jl.go()
|
||||||
|
jl.close()
|
||||||
|
|
||||||
|
ff.close()
|
||||||
|
exit(0)
|
124
RTL00_SDKV35a/flasher/ameba1.cfg
Normal file
124
RTL00_SDKV35a/flasher/ameba1.cfg
Normal file
|
@ -0,0 +1,124 @@
|
||||||
|
# Main file for Ameba1 series Cortex-M3 parts
|
||||||
|
#
|
||||||
|
# !!!!!!
|
||||||
|
#
|
||||||
|
|
||||||
|
set CHIPNAME rtl8195a
|
||||||
|
set CHIPSERIES ameba1
|
||||||
|
|
||||||
|
# Adapt based on what transport is active.
|
||||||
|
source [find target/swj-dp.tcl]
|
||||||
|
|
||||||
|
if { [info exists CHIPNAME] } {
|
||||||
|
set _CHIPNAME $CHIPNAME
|
||||||
|
} else {
|
||||||
|
error "CHIPNAME not set. Please do not include ameba1.cfg directly."
|
||||||
|
}
|
||||||
|
|
||||||
|
if { [info exists CHIPSERIES] } {
|
||||||
|
# Validate chip series is supported
|
||||||
|
if { $CHIPSERIES != "ameba1" } {
|
||||||
|
error "Unsupported chip series specified."
|
||||||
|
}
|
||||||
|
set _CHIPSERIES $CHIPSERIES
|
||||||
|
} else {
|
||||||
|
error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
|
||||||
|
}
|
||||||
|
|
||||||
|
if { [info exists CPUTAPID] } {
|
||||||
|
# Allow user override
|
||||||
|
set _CPUTAPID $CPUTAPID
|
||||||
|
} else {
|
||||||
|
# Ameba1 use a Cortex M3 core.
|
||||||
|
if { $_CHIPSERIES == "ameba1" } {
|
||||||
|
if { [using_jtag] } {
|
||||||
|
set _CPUTAPID 0x4ba00477
|
||||||
|
} {
|
||||||
|
set _CPUTAPID 0x2ba01477
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||||
|
|
||||||
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
|
||||||
|
|
||||||
|
|
||||||
|
# Run with *real slow* clock by default since the
|
||||||
|
# boot rom could have been playing with the PLL, so
|
||||||
|
# we have no idea what clock the target is running at.
|
||||||
|
adapter_khz 1000
|
||||||
|
|
||||||
|
# delays on reset lines
|
||||||
|
adapter_nsrst_delay 200
|
||||||
|
if {[using_jtag]} {
|
||||||
|
jtag_ntrst_delay 200
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
# Ameba1 (Cortex M3 core) support SYSRESETREQ
|
||||||
|
if {![using_hla]} {
|
||||||
|
# if srst is not fitted use SYSRESETREQ to
|
||||||
|
# perform a soft reset
|
||||||
|
cortex_m reset_config sysresetreq
|
||||||
|
}
|
||||||
|
|
||||||
|
$_TARGETNAME configure -event reset-init {ameba1_init}
|
||||||
|
|
||||||
|
# Ameba1 SDRAM enable
|
||||||
|
proc ameba1_init { } {
|
||||||
|
# init System
|
||||||
|
mww 0x40000014 0x00000021
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000304 0x1fc00002
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000250 0x00000400
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000340 0x00000000
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000230 0x0000dcc4
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000210 0x00011117
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000210 0x00011157
|
||||||
|
sleep 10
|
||||||
|
mww 0x400002c0 0x00110011
|
||||||
|
sleep 10
|
||||||
|
mww 0x40000320 0xffffffff
|
||||||
|
sleep 10
|
||||||
|
# init SDRAM
|
||||||
|
mww 0x40000040 0x00fcc702
|
||||||
|
sleep 10
|
||||||
|
mdw 0x40000040
|
||||||
|
mww 0x40005224 0x00000001
|
||||||
|
sleep 10
|
||||||
|
mww 0x40005004 0x00000208
|
||||||
|
sleep 10
|
||||||
|
mww 0x40005008 0xffffd000
|
||||||
|
sleep 13
|
||||||
|
mww 0x40005020 0x00000022
|
||||||
|
sleep 13
|
||||||
|
mww 0x40005010 0x09006201
|
||||||
|
sleep 13
|
||||||
|
mww 0x40005014 0x00002611
|
||||||
|
sleep 13
|
||||||
|
mww 0x40005018 0x00068413
|
||||||
|
sleep 13
|
||||||
|
mww 0x4000501c 0x00000042
|
||||||
|
sleep 13
|
||||||
|
mww 0x4000500c 0x700 ;# set Idle
|
||||||
|
sleep 20
|
||||||
|
mww 0x40005000 0x1 ;# start init
|
||||||
|
sleep 100
|
||||||
|
mdw 0x40005000
|
||||||
|
mww 0x4000500c 0x600 ;# enter memory mode
|
||||||
|
sleep 30
|
||||||
|
|
||||||
|
mww 0x40005008 0x00000000 ;# 0xf00
|
||||||
|
;# mww 0x40005008 0x00000f00
|
||||||
|
sleep 3
|
||||||
|
mww 0x40000300 0x0006005e ;# 0x5e
|
||||||
|
;# mww 0x40000300 0x0000005e
|
||||||
|
sleep 3
|
||||||
|
}
|
99
RTL00_SDKV35a/flasher/cortex.ocd
Normal file
99
RTL00_SDKV35a/flasher/cortex.ocd
Normal file
|
@ -0,0 +1,99 @@
|
||||||
|
proc cortex_bootstrap {start} {
|
||||||
|
# disable interrupts
|
||||||
|
reg faultmask 0x01
|
||||||
|
set vectors ""
|
||||||
|
mem2array vectors 32 $start 2
|
||||||
|
reg sp $vectors(0)
|
||||||
|
reg pc $vectors(1)
|
||||||
|
resume
|
||||||
|
}
|
||||||
|
|
||||||
|
proc cortex_reboot {} {
|
||||||
|
set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000210 ] ] ]
|
||||||
|
# set aaa [ format "0x%08x" [ expr 0x40000210 ] ]
|
||||||
|
echo "CLK_CTRL1 = $ddd"
|
||||||
|
# echo "# Set processor clock to default before system reset"
|
||||||
|
set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000014 ] ] ]
|
||||||
|
# set aaa [ format "0x%08x" [ expr 0x40000014 ] ]
|
||||||
|
echo "SOC_FUNC_EN = $ddd"
|
||||||
|
# mww 0x40000014 0x00000021
|
||||||
|
sleep 10
|
||||||
|
echo "# Reboot (system reset)"
|
||||||
|
mww 0xE000ED0C 0x05FA0007
|
||||||
|
}
|
||||||
|
|
||||||
|
proc init_system {} {
|
||||||
|
# Set processor clock to default before system reset
|
||||||
|
# CLK_CTRL1
|
||||||
|
# mww 0x40000014 0x00000011
|
||||||
|
mww 0x40000014 0x00000021
|
||||||
|
sleep 10
|
||||||
|
# PESOC_SOC_CTRL
|
||||||
|
# mww 0x40000304 0x1fc00001
|
||||||
|
mww 0x40000304 0x1fc00002
|
||||||
|
sleep 10
|
||||||
|
# PESOC_CLK_SEL
|
||||||
|
mww 0x40000250 0x00000400
|
||||||
|
sleep 10
|
||||||
|
# GPIO_PULL_CTRL4
|
||||||
|
mww 0x40000340 0x00000000
|
||||||
|
sleep 10
|
||||||
|
# PESOC_CLK_CTRL
|
||||||
|
# mww 0x40000230 0x0000d3c4
|
||||||
|
mww 0x40000230 0x0000dcc4
|
||||||
|
sleep 10
|
||||||
|
# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE
|
||||||
|
# mww 0x40000210 0x00211117
|
||||||
|
mww 0x40000210 0x00011117
|
||||||
|
sleep 10
|
||||||
|
# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE + MEM_CTRL
|
||||||
|
mww 0x40000210 0x00011157
|
||||||
|
sleep 10
|
||||||
|
# CPU_PERIPHERAL_CTRL SPI_FLASH_PIN_EN|SDR_PIN_EN|SWD_PIN_EN|LOG_UART_PIN_EN ?
|
||||||
|
# mww 0x400002c0 0x00110000
|
||||||
|
mww 0x400002c0 0x00110011
|
||||||
|
sleep 10
|
||||||
|
# GPIO_SHTDN_CTRL
|
||||||
|
# mww 0x40000320 0x00000033
|
||||||
|
mww 0x40000320 0xffffffff
|
||||||
|
sleep 10
|
||||||
|
|
||||||
|
mww 0x40005008 0x00000000
|
||||||
|
sleep 10
|
||||||
|
# PESOC_MEM_CTRL
|
||||||
|
mww 0x40000300 0x0006005e
|
||||||
|
sleep 10
|
||||||
|
|
||||||
|
# set baudrate to 38400
|
||||||
|
# mww 0x40003010 0x00000080
|
||||||
|
# mww 0x40003008 0x00000022
|
||||||
|
# mww 0x4000300C 0x00000000
|
||||||
|
# mww 0x40003010 0x00000000
|
||||||
|
}
|
||||||
|
|
||||||
|
proc boot_from_flash {} {
|
||||||
|
echo "# skip sdram init, it has been init in openocd config"
|
||||||
|
mww 0x40000210 0x211157
|
||||||
|
}
|
||||||
|
|
||||||
|
proc boot_from_ram {} {
|
||||||
|
echo "# boot from ram, igonore loading flash"
|
||||||
|
mww 0x40000210 0x8011157
|
||||||
|
}
|
||||||
|
|
||||||
|
proc restart_from_falsh {} {
|
||||||
|
init
|
||||||
|
init_system
|
||||||
|
boot_from_flash
|
||||||
|
cortex_reboot
|
||||||
|
}
|
||||||
|
|
||||||
|
proc load_ram_binary { local_filename address } {
|
||||||
|
# set address 0x10000BC8
|
||||||
|
init
|
||||||
|
reset halt
|
||||||
|
set size [file size $local_filename]
|
||||||
|
load_image $local_filename $address bin $address $size
|
||||||
|
boot_from_ram
|
||||||
|
resume
|
||||||
|
}
|
9
RTL00_SDKV35a/flasher/flash_file.jlink
Normal file
9
RTL00_SDKV35a/flasher/flash_file.jlink
Normal file
|
@ -0,0 +1,9 @@
|
||||||
|
define call1
|
||||||
|
SetFirwareSize build/bin/ram_all.bin
|
||||||
|
end
|
||||||
|
define call2
|
||||||
|
FlasherWrite build/bin/ram_all.bin 0 $Image1Size
|
||||||
|
end
|
||||||
|
define call3
|
||||||
|
FlasherWrite build/bin/ram_all.bin $Image2Addr $Image2Size
|
||||||
|
end
|
198
RTL00_SDKV35a/flasher/gdb_flasher.jlink
Normal file
198
RTL00_SDKV35a/flasher/gdb_flasher.jlink
Normal file
|
@ -0,0 +1,198 @@
|
||||||
|
####################################
|
||||||
|
# J-LINK GDB SERVER initialization #
|
||||||
|
####################################
|
||||||
|
define InitJlink
|
||||||
|
printf "Jlink Init:\n"
|
||||||
|
set verbose off
|
||||||
|
set complaints 0
|
||||||
|
set confirm off
|
||||||
|
set exec-done-display off
|
||||||
|
show exec-done-display
|
||||||
|
set trace-commands off
|
||||||
|
#set debug aix-thread off
|
||||||
|
#set debug dwarf2-die 0
|
||||||
|
set debug displaced off
|
||||||
|
set debug expression 0
|
||||||
|
set debug frame 0
|
||||||
|
set debug infrun 0
|
||||||
|
set debug observer 0
|
||||||
|
set debug overload 0
|
||||||
|
#set debugvarobj 0
|
||||||
|
set pagination off
|
||||||
|
set print address off
|
||||||
|
set print symbol-filename off
|
||||||
|
set print symbol off
|
||||||
|
set print pretty off
|
||||||
|
set print object off
|
||||||
|
#set debug notification off
|
||||||
|
set debug parser off
|
||||||
|
set debug remote 0
|
||||||
|
target remote localhost:2331
|
||||||
|
set remotetimeout 10000
|
||||||
|
monitor device Cortex-M3
|
||||||
|
monitor endian little
|
||||||
|
monitor reset
|
||||||
|
# Set max speed
|
||||||
|
monitor speed 4000
|
||||||
|
set mem inaccessible-by-default off
|
||||||
|
# Setup GDB FOR FASTER DOWNLOADS
|
||||||
|
set remote memory-write-packet-size 8192
|
||||||
|
set remote memory-write-packet-size fixed
|
||||||
|
end
|
||||||
|
#############
|
||||||
|
# Boot_Flash
|
||||||
|
define SetBootFlash
|
||||||
|
printf "SetBoot = Flash:\n"
|
||||||
|
monitor long 0x40000210 = 0x211157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
|
||||||
|
define SetBootCall0
|
||||||
|
printf "SetBoot = Call0:\n"
|
||||||
|
monitor long 0x40000210 = 0x80111157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 )
|
||||||
|
define SetBootCall1
|
||||||
|
printf "SetBoot = Call1:\n"
|
||||||
|
monitor long 0x40000210 = 0x20111157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 )
|
||||||
|
define SetBootCall2
|
||||||
|
printf "SetBoot = Call2:\n"
|
||||||
|
monitor long 0x40000210 = 0x10111157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
|
||||||
|
define SetBootCall3
|
||||||
|
printf "SetBoot = Call3:\n"
|
||||||
|
monitor long 0x40000210 = 0x8111157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 )
|
||||||
|
define SetBootCall4
|
||||||
|
printf "SetBoot = Call4:\n"
|
||||||
|
monitor long 0x40000210 = 0x4111157
|
||||||
|
end
|
||||||
|
# CPU CLK 166 MHz?
|
||||||
|
define SetClk166MHz
|
||||||
|
printf "SetCLK 166.66MHz:\n"
|
||||||
|
monitor long 0x40000014 = 0x00000011
|
||||||
|
end
|
||||||
|
# CPU CLK 83 MHz?
|
||||||
|
define SetClk83MHz
|
||||||
|
printf "SetCLK 83.33MHz:\n"
|
||||||
|
monitor long 0x40000014 = 0x00000021
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# System Init #
|
||||||
|
###############
|
||||||
|
define SystemInit
|
||||||
|
printf "System Init:\n"
|
||||||
|
monitor long 0x40000304 = 0x1FC00002
|
||||||
|
monitor long 0x40000250 = 0x400
|
||||||
|
monitor long 0x40000340 = 0x0
|
||||||
|
monitor long 0x40000230 = 0xdcc4
|
||||||
|
monitor long 0x40000210 = 0x11117
|
||||||
|
monitor long 0x40000210 = 0x11157
|
||||||
|
monitor long 0x400002c0 = 0x110011
|
||||||
|
monitor long 0x40000320 = 0xffffffff
|
||||||
|
end
|
||||||
|
############
|
||||||
|
# SPI Init #
|
||||||
|
############
|
||||||
|
define SPI_Init
|
||||||
|
printf "Init SPI:\n"
|
||||||
|
#enable spi flash peripheral clock
|
||||||
|
set $Temp = {int}(0x40000230)
|
||||||
|
set $Temp = ($Temp | 0x300)
|
||||||
|
set {int}(0x40000230) = $Temp
|
||||||
|
#enable spi flash peripheral
|
||||||
|
set $Temp = {int}(0x40000210)
|
||||||
|
set $Temp = ($Temp | 0x10)
|
||||||
|
set {int}(0x40000210) = $Temp
|
||||||
|
#select spi flash pinout (0 - internal), enable spi flash pins
|
||||||
|
set $Temp = {int}(0x400002C0)
|
||||||
|
set $Temp = (($Temp & 0xFFFFFFF8) | 1)
|
||||||
|
set {int}(0x400002C0) = $Temp
|
||||||
|
#disable SPI FLASH operation
|
||||||
|
monitor long 0x40006008 = 0
|
||||||
|
#disable all interrupts
|
||||||
|
monitor long 0x4000602C = 0
|
||||||
|
#use first "slave select" pin
|
||||||
|
monitor long 0x40006010 = 1
|
||||||
|
#baud rate, default value
|
||||||
|
monitor long 0x40006014 = 2
|
||||||
|
#tx fifo threshold
|
||||||
|
monitor long 0x40006018 = 0
|
||||||
|
#rx fifo threshold
|
||||||
|
monitor long 0x4000601C = 0
|
||||||
|
#disable DMA
|
||||||
|
monitor long 0x4000604C = 0
|
||||||
|
set $SPI_FLASH_BASE = 0x98000000
|
||||||
|
end
|
||||||
|
###################
|
||||||
|
# SetFirwareSize #
|
||||||
|
###################
|
||||||
|
define SetFirwareSize
|
||||||
|
set $rambuffer = 0x10000300
|
||||||
|
printf "Get ImagesSize:\n"
|
||||||
|
restore $arg0 binary $rambuffer 0 0x20
|
||||||
|
set $Image1Size = {int}($rambuffer+0x10) + 32
|
||||||
|
set $Image1LoadAddr = {int}($rambuffer+0x14)
|
||||||
|
set $Image2Addr = {short}($rambuffer+0x18) * 1024
|
||||||
|
if $Image1Size != 0 && $Image1Size < 0x1000000
|
||||||
|
if $Image2Addr == 0
|
||||||
|
set $Image2Addr = $Image1Size
|
||||||
|
end
|
||||||
|
printf "Image1Size = %d\n", $Image1Size
|
||||||
|
printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr
|
||||||
|
printf "Image2FlashAddr = 0x%08x\n", $Image2Addr
|
||||||
|
set $parms1 = $rambuffer - $Image2Addr
|
||||||
|
set $parms3 = $Image2Addr + 0x08
|
||||||
|
restore $arg0 binary $parms1 $Image2Addr $parms3
|
||||||
|
set $Image2Size = {int}($rambuffer)
|
||||||
|
set $Image2LoadAddr = {int}($rambuffer+0x4)
|
||||||
|
if $Image2Size != 0xFFFFFFFF && $Image2Size != 0
|
||||||
|
set $Image2Size = $Image2Size + 16
|
||||||
|
printf "Image2Size = %d\n", $Image2Size
|
||||||
|
printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr
|
||||||
|
set $FirmwareSize = $Image2Addr + $Image2Size
|
||||||
|
printf "FirmwareSize = %d\n", $FirmwareSize
|
||||||
|
else
|
||||||
|
set $Image2Size = 0
|
||||||
|
printf "Image2 - None\n"
|
||||||
|
set $FirmwareSize = $Image1Size
|
||||||
|
printf "FirmwareSize = %d\n", $FirmwareSize
|
||||||
|
end
|
||||||
|
else
|
||||||
|
set $Image1Size = 0
|
||||||
|
set $Image2Size = 0
|
||||||
|
set $Image2Addr = 0
|
||||||
|
set $FirmwareSize = 0
|
||||||
|
printf "Image not format Firmware!\n"
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#####################
|
||||||
|
# Flash Images Info #
|
||||||
|
#####################
|
||||||
|
define FlashImagesInfo
|
||||||
|
printf "Flash Info:\n"
|
||||||
|
set $Image1Size = {int}($SPI_FLASH_BASE + 0x10) + 32
|
||||||
|
set $Image1LoadAddr = {int}($SPI_FLASH_BASE + 0x14)
|
||||||
|
if $Image1LoadAddr == 0xFFFFFFFF
|
||||||
|
printf "Image1 - None\n"
|
||||||
|
else
|
||||||
|
set $Image2FlashAddr = {short}($SPI_FLASH_BASE + 0x18) * 1024
|
||||||
|
if $Image2FlashAddr == 0
|
||||||
|
$Image2FlashAddr = $Image1Size
|
||||||
|
end
|
||||||
|
set $Image2Size = {int}($Image2FlashAddr + $SPI_FLASH_BASE)
|
||||||
|
set $Image2LoadAddr = {int}($Image2FlashAddr + $SPI_FLASH_BASE + 0x4)
|
||||||
|
printf "Image1Size = %d\n", $Image1Size
|
||||||
|
printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr
|
||||||
|
printf "Image2FlashAddr = 0x%08x\n", $Image2FlashAddr
|
||||||
|
if $Image2Size != 0xFFFFFFFF
|
||||||
|
printf "Image2Size = %d\n", $Image2Size
|
||||||
|
printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr
|
||||||
|
else
|
||||||
|
printf "Image2 - None\n"
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end
|
30
RTL00_SDKV35a/flasher/gdb_init.jlink
Normal file
30
RTL00_SDKV35a/flasher/gdb_init.jlink
Normal file
|
@ -0,0 +1,30 @@
|
||||||
|
#
|
||||||
|
# J-LINK GDB SERVER initialization
|
||||||
|
#
|
||||||
|
target remote localhost:2331
|
||||||
|
set remotetimeout 10000
|
||||||
|
monitor device Cortex-M3
|
||||||
|
monitor endian little
|
||||||
|
monitor reset
|
||||||
|
# Set max speed
|
||||||
|
monitor speed 4000
|
||||||
|
set mem inaccessible-by-default off
|
||||||
|
# Setup GDB FOR FASTER DOWNLOADS
|
||||||
|
#set remote memory-write-packet-size 4096
|
||||||
|
#set remote memory-write-packet-size fixed
|
||||||
|
# Boot Flash
|
||||||
|
monitor long 0x40000210 = 0x211157
|
||||||
|
# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
|
||||||
|
#monitor long 0x40000210 = 0x80011117
|
||||||
|
# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 )
|
||||||
|
#monitor long 0x40000210 = 0x20011117
|
||||||
|
# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 )
|
||||||
|
#monitor long 0x40000210 = 0x10011117
|
||||||
|
# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
|
||||||
|
#monitor long 0x40000210 = 0x8011117
|
||||||
|
# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 )
|
||||||
|
monitor long 0x40000210 = 0x4011117
|
||||||
|
# CPU CLK 166 MHz?
|
||||||
|
# monitor long 0x40000014 = 0x00000011
|
||||||
|
# CPU CLK 83 MHz?
|
||||||
|
#monitor long 0x40000014 = 0x00000021
|
374
RTL00_SDKV35a/flasher/gdb_ota.jlink
Normal file
374
RTL00_SDKV35a/flasher/gdb_ota.jlink
Normal file
|
@ -0,0 +1,374 @@
|
||||||
|
####################################
|
||||||
|
# J-LINK GDB SERVER initialization #
|
||||||
|
####################################
|
||||||
|
define InitJlink
|
||||||
|
printf "Jlink Init:\n"
|
||||||
|
set verbose off
|
||||||
|
set complaints 0
|
||||||
|
set confirm off
|
||||||
|
set exec-done-display off
|
||||||
|
show exec-done-display
|
||||||
|
set trace-commands off
|
||||||
|
#set debug aix-thread off
|
||||||
|
#set debug dwarf2-die 0
|
||||||
|
set debug displaced off
|
||||||
|
set debug expression 0
|
||||||
|
set debug frame 0
|
||||||
|
set debug infrun 0
|
||||||
|
set debug observer 0
|
||||||
|
set debug overload 0
|
||||||
|
#set debugvarobj 0
|
||||||
|
set pagination off
|
||||||
|
set print address off
|
||||||
|
set print symbol-filename off
|
||||||
|
set print symbol off
|
||||||
|
set print pretty off
|
||||||
|
set print object off
|
||||||
|
#set debug notification off
|
||||||
|
set debug parser off
|
||||||
|
set debug remote 0
|
||||||
|
target remote localhost:2331
|
||||||
|
set remotetimeout 10000
|
||||||
|
monitor device Cortex-M3
|
||||||
|
monitor endian little
|
||||||
|
monitor reset
|
||||||
|
# Set max speed
|
||||||
|
monitor speed 4000
|
||||||
|
set mem inaccessible-by-default off
|
||||||
|
# Setup GDB FOR FASTER DOWNLOADS
|
||||||
|
set remote memory-write-packet-size 8192
|
||||||
|
set remote memory-write-packet-size fixed
|
||||||
|
end
|
||||||
|
#############
|
||||||
|
# Boot_Flash
|
||||||
|
define SetBootFlash
|
||||||
|
printf "SetBoot = Flash:\n"
|
||||||
|
monitor long 0x40000210 = 0x211157
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr0() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )
|
||||||
|
define SetBootCall0
|
||||||
|
printf "SetBoot = Call0:\n"
|
||||||
|
monitor long 0x40000210 = 0x80011117
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr1() Run if ( v40000210 & 0x20000000 )
|
||||||
|
define SetBootCall1
|
||||||
|
printf "SetBoot = Call1:\n"
|
||||||
|
monitor long 0x40000210 = 0x20011117
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr2() Run if ( v40000210 & 0x10000000 )
|
||||||
|
define SetBootCall2
|
||||||
|
printf "SetBoot = Call2:\n"
|
||||||
|
monitor long 0x40000210 = 0x10011117
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr3() Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x8000000 )
|
||||||
|
define SetBootCall3
|
||||||
|
printf "SetBoot = Call3:\n"
|
||||||
|
monitor long 0x40000210 = 0x8011117
|
||||||
|
end
|
||||||
|
# Boot RAM start_addr4() Init console, Run if ( v40000210 & 0x4000000 )
|
||||||
|
define SetBootCall4
|
||||||
|
printf "SetBoot = Call4:\n"
|
||||||
|
monitor long 0x40000210 = 0x4011117
|
||||||
|
end
|
||||||
|
# CPU CLK 166 MHz?
|
||||||
|
define SetClk166MHz
|
||||||
|
printf "SetCLK 166.66MHz:\n"
|
||||||
|
monitor long 0x40000014 = 0x00000011
|
||||||
|
end
|
||||||
|
# CPU CLK 83 MHz?
|
||||||
|
define SetClk83MHz
|
||||||
|
printf "SetCLK 83.33MHz:\n"
|
||||||
|
monitor long 0x40000014 = 0x00000021
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# System Init #
|
||||||
|
###############
|
||||||
|
define SystemInit
|
||||||
|
printf "System Init:\n"
|
||||||
|
monitor long 0x40000304 = 0x1FC00002
|
||||||
|
monitor long 0x40000250 = 0x400
|
||||||
|
monitor long 0x40000340 = 0x0
|
||||||
|
monitor long 0x40000230 = 0xdcc4
|
||||||
|
monitor long 0x40000210 = 0x11117
|
||||||
|
monitor long 0x40000210 = 0x11157
|
||||||
|
monitor long 0x400002c0 = 0x110011
|
||||||
|
monitor long 0x40000320 = 0xffffffff
|
||||||
|
end
|
||||||
|
############
|
||||||
|
# SPI Init #
|
||||||
|
############
|
||||||
|
define SPI_Init
|
||||||
|
printf "Init SPI:\n"
|
||||||
|
#enable spi flash peripheral clock
|
||||||
|
set $Temp = {int}(0x40000230)
|
||||||
|
set $Temp = ($Temp | 0x300)
|
||||||
|
set {int}(0x40000230) = $Temp
|
||||||
|
#enable spi flash peripheral
|
||||||
|
set $Temp = {int}(0x40000210)
|
||||||
|
set $Temp = ($Temp | 0x10)
|
||||||
|
set {int}(0x40000210) = $Temp
|
||||||
|
#select spi flash pinout (0 - internal), enable spi flash pins
|
||||||
|
set $Temp = {int}(0x400002C0)
|
||||||
|
set $Temp = (($Temp & 0xFFFFFFF8) | 1)
|
||||||
|
set {int}(0x400002C0) = $Temp
|
||||||
|
#disable SPI FLASH operation
|
||||||
|
monitor long 0x40006008 = 0
|
||||||
|
#disable all interrupts
|
||||||
|
monitor long 0x4000602C = 0
|
||||||
|
#use first "slave select" pin
|
||||||
|
monitor long 0x40006010 = 1
|
||||||
|
#baud rate, default value
|
||||||
|
monitor long 0x40006014 = 2
|
||||||
|
#tx fifo threshold
|
||||||
|
monitor long 0x40006018 = 0
|
||||||
|
#rx fifo threshold
|
||||||
|
monitor long 0x4000601C = 0
|
||||||
|
#disable DMA
|
||||||
|
monitor long 0x4000604C = 0
|
||||||
|
set $SPI_FLASH_BASE = 0x98000000
|
||||||
|
end
|
||||||
|
###################
|
||||||
|
# GetOtaSize #
|
||||||
|
###################
|
||||||
|
define GetOtaSize
|
||||||
|
set $rambuffer = 0x10000300
|
||||||
|
printf "Get ImagesSize:\n"
|
||||||
|
set $ImageOtaSize = 0
|
||||||
|
restore $arg0 binary $rambuffer 0 4
|
||||||
|
set $ImageAddSize = {int}($rambuffer+0)
|
||||||
|
if $ImageAddSize != 0
|
||||||
|
printf "Image2Size = %d\n", $ImageAddSize
|
||||||
|
set $ImageOtaSize = $ImageOtaSize + $ImageAddSize + 16
|
||||||
|
set $parms1 = $rambuffer - $ImageOtaSize
|
||||||
|
set $parms3 = $ImageOtaSize + 4
|
||||||
|
restore $arg0 binary $parms1 $ImageOtaSize $parms3
|
||||||
|
set $ImageAddSize = {int}($rambuffer+0)
|
||||||
|
if $ImageAddSize < 0x200000
|
||||||
|
printf "ImageSdramSize = %d\n", $ImageAddSize
|
||||||
|
set $ImageOtaSize = $ImageOtaSize + $ImageAddSize + 20
|
||||||
|
end
|
||||||
|
else
|
||||||
|
printf "Image2Size = %d !\n", $ImageOtaSize
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#####################
|
||||||
|
# Flash Images Info #
|
||||||
|
#####################
|
||||||
|
define FlashImagesInfo
|
||||||
|
printf "Flash Info:\n"
|
||||||
|
set $Image1Size = {int}($SPI_FLASH_BASE + 0x10) + 32
|
||||||
|
set $Image1LoadAddr = {int}($SPI_FLASH_BASE + 0x14)
|
||||||
|
if $Image1LoadAddr == 0xFFFFFFFF
|
||||||
|
printf "Image1 - None\n"
|
||||||
|
else
|
||||||
|
set $Image2FlashAddr = {short}($SPI_FLASH_BASE + 0x18) * 1024
|
||||||
|
if $Image2FlashAddr == 0
|
||||||
|
$Image2FlashAddr = $Image1Size
|
||||||
|
end
|
||||||
|
set $Image2Size = {int}($Image2FlashAddr + $SPI_FLASH_BASE)
|
||||||
|
set $Image2LoadAddr = {int}($Image2FlashAddr + $SPI_FLASH_BASE + 0x4)
|
||||||
|
printf "Image1Size = %d\n", $Image1Size
|
||||||
|
printf "Image1LoadAddr = 0x%08x\n", $Image1LoadAddr
|
||||||
|
printf "Image2FlashAddr = 0x%08x\n", $Image2FlashAddr
|
||||||
|
if $Image2Size != 0xFFFFFFFF
|
||||||
|
printf "Image2Size = %d\n", $Image2Size
|
||||||
|
printf "Image2LoadAddr = 0x%08x\n", $Image2LoadAddr
|
||||||
|
else
|
||||||
|
printf "Image2 - None\n"
|
||||||
|
end
|
||||||
|
end
|
||||||
|
set $ImageOtaAddr = {int}($SPI_FLASH_BASE + 0x9000)
|
||||||
|
if $ImageOtaAddr != 0x80000
|
||||||
|
printf "ImageOtaAddr = 0x%08x - Invalid!\n", $ImageOtaAddr
|
||||||
|
else
|
||||||
|
printf "ImageOtaAddr = 0x%08x\n", $ImageOtaAddr
|
||||||
|
end
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# FlasherInit #
|
||||||
|
###############
|
||||||
|
define FlasherInit
|
||||||
|
set $rtl8710_flasher_capacity = 0
|
||||||
|
set $rtl8710_flasher_auto_erase = 1
|
||||||
|
set $rtl8710_flasher_auto_verify = 1
|
||||||
|
set $rtl8710_flasher_firmware_ptr = 0x10001000
|
||||||
|
set $rtl8710_flasher_buffer = 0x10008000
|
||||||
|
set $rtl8710_flasher_buffer_size = 421888
|
||||||
|
set $rtl8710_flasher_sector_size = 4096
|
||||||
|
set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# FlasherWait #
|
||||||
|
###############
|
||||||
|
define FlasherWait
|
||||||
|
set $fresult = {int}($rtl8710_flasher_buffer)
|
||||||
|
while ($fresult != 0)
|
||||||
|
set $fresult = {int}($rtl8710_flasher_buffer)
|
||||||
|
end
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# FlasherLoad #
|
||||||
|
###############
|
||||||
|
define FlasherLoad
|
||||||
|
if $rtl8710_flasher_capacity == 0
|
||||||
|
printf "initializing RTL8710 flasher\n"
|
||||||
|
restore $arg0 binary $rtl8710_flasher_firmware_ptr 0 968
|
||||||
|
monitor reset
|
||||||
|
set $pc = $rtl8710_flasher_firmware_ptr
|
||||||
|
set $sp = 0x1ffffffc
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
#continue
|
||||||
|
monitor go
|
||||||
|
FlasherWait
|
||||||
|
set $id = {int}($rtl8710_flasher_buffer + 0x0C)
|
||||||
|
set $rtl8710_flasher_capacity = 1 << (($id >> 16) & 0x0ff)
|
||||||
|
if ($id == 0x1420c2)
|
||||||
|
printf "Flash ID = 0x%08x : MX25L8006E (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10
|
||||||
|
else
|
||||||
|
printf "Flash ID = 0x%08x : (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10
|
||||||
|
end
|
||||||
|
printf "RTL8710 flasher initialized\n"
|
||||||
|
else
|
||||||
|
printf "reinitializing RTL8710 flasher\n"
|
||||||
|
end
|
||||||
|
end
|
||||||
|
##################
|
||||||
|
# FlasherRdBlock #
|
||||||
|
##################
|
||||||
|
define FlasherRdBlock
|
||||||
|
#printf "FlashRdBlock 0x%08x, 0x%08x\n", $arg0, $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 3
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x14) = $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x08)
|
||||||
|
if $status > 0
|
||||||
|
error "read error, offset 0x%08x", $arg0
|
||||||
|
end
|
||||||
|
end
|
||||||
|
##################
|
||||||
|
# FlasherWrBlock #
|
||||||
|
##################
|
||||||
|
define FlasherWrBlock
|
||||||
|
#printf "FlashWrBlock 0x%08x, 0x%08x\n", $arg0, $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 4
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x14) = $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x08)
|
||||||
|
if $status > 0
|
||||||
|
error "write error, offset 0x%08x", $arg0
|
||||||
|
end
|
||||||
|
end
|
||||||
|
##################
|
||||||
|
# FlasherVrBlock #
|
||||||
|
##################
|
||||||
|
define FlasherVrBlock
|
||||||
|
#printf "FlashVrBlock 0x%08x, 0x%08x\n", $arg0, $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 5
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x14) = $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x08)
|
||||||
|
if $status > 0
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x0C)
|
||||||
|
set $status = {int}($status + $arg0)
|
||||||
|
error "verify error, offset 0x%08x", $status
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#################
|
||||||
|
# FlashSecErase #
|
||||||
|
#################
|
||||||
|
define FlashSecErase
|
||||||
|
#printf "FlashSecErase 0x%08x, 0x%08x\n", $rtl8710_flasher_buffer, $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 2
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
end
|
||||||
|
################
|
||||||
|
# FlasherWrite #
|
||||||
|
################
|
||||||
|
define FlasherWrite
|
||||||
|
set $sector = 0
|
||||||
|
set $offset = 0
|
||||||
|
set $size = $arg2
|
||||||
|
while $offset < $size
|
||||||
|
set $len = $size - $offset
|
||||||
|
if $len > $rtl8710_flasher_buffer_size
|
||||||
|
set $len = $rtl8710_flasher_buffer_size
|
||||||
|
end
|
||||||
|
set $flash_offset = $arg1 + $offset
|
||||||
|
printf "write offset 0x%08x\n", $flash_offset
|
||||||
|
set $parms1 = $rtl8710_flasher_buffer + 0x20 - $offset
|
||||||
|
set $parms2 = $offset
|
||||||
|
set $parms3 = $offset + $len
|
||||||
|
restore $arg0 binary $parms1 $parms2 $parms3
|
||||||
|
if $rtl8710_flasher_auto_erase != 0
|
||||||
|
set $count_i = $flash_offset
|
||||||
|
while $count_i < ($flash_offset + $len)
|
||||||
|
set $sector = $count_i/$rtl8710_flasher_sector_size
|
||||||
|
if $rtl8710_flasher_auto_erase_sector != $sector
|
||||||
|
set $parms1 = $sector * $rtl8710_flasher_sector_size
|
||||||
|
printf "erase sector %d at 0x%08x\n", $sector, $parms1
|
||||||
|
FlashSecErase $parms1
|
||||||
|
set $rtl8710_flasher_auto_erase_sector = $sector
|
||||||
|
end
|
||||||
|
set $count_i = $count_i + 1
|
||||||
|
end
|
||||||
|
end
|
||||||
|
FlasherWrBlock $flash_offset $len
|
||||||
|
printf "write %d bytes at 0x%08x\n", $len, $flash_offset
|
||||||
|
if $rtl8710_flasher_auto_verify != 0
|
||||||
|
printf "verify offset 0x%08x len %d\n", $flash_offset, $len
|
||||||
|
FlasherVrBlock $flash_offset $len
|
||||||
|
end
|
||||||
|
set $offset = $offset + $rtl8710_flasher_buffer_size
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#########################################
|
||||||
|
InitJlink
|
||||||
|
SystemInit
|
||||||
|
SetClk166MHz
|
||||||
|
SPI_Init
|
||||||
|
GetOtaSize build/bin/ota.bin
|
||||||
|
if $ImageOtaSize != 0
|
||||||
|
FlasherInit
|
||||||
|
FlasherLoad flasher/rtl8710_flasher.bin
|
||||||
|
set $FixOtaAddr = 0x80000
|
||||||
|
set $pbuffer = $rtl8710_flasher_buffer + 0x20
|
||||||
|
FlasherRdBlock 0x9000 0x1000
|
||||||
|
set $ImageOtaAddr = {int}($pbuffer)
|
||||||
|
if $ImageOtaAddr != $FixOtaAddr
|
||||||
|
printf "ImageOtaAddr = 0x%08x - Invalid!\n", $ImageOtaAddr
|
||||||
|
set {int}($pbuffer) = $FixOtaAddr
|
||||||
|
set $Temp = $ImageOtaAddr & $FixOtaAddr
|
||||||
|
if $Temp != $FixOtaAddr
|
||||||
|
printf "FlashSecErase at 0x9000\n"
|
||||||
|
FlashSecErase 0x9000
|
||||||
|
printf "Write offset 0x9000 4096 bytes\n"
|
||||||
|
FlasherWrBlock 0x9000 0x1000
|
||||||
|
else
|
||||||
|
printf "Write offset 0x9000 4 bytes\n"
|
||||||
|
FlasherWrBlock 0x9000 0x0004
|
||||||
|
end
|
||||||
|
end
|
||||||
|
FlasherWrite build/bin/ota.bin $FixOtaAddr $ImageOtaSize
|
||||||
|
restore build/bin/ota.bin binary $pbuffer 0 0x1000
|
||||||
|
set {int}($pbuffer + 0x08) = 0x35393138
|
||||||
|
set {int}($pbuffer + 0x0C) = 0x31313738
|
||||||
|
FlasherWrBlock $FixOtaAddr 0x10
|
||||||
|
FlashImagesInfo
|
||||||
|
end
|
||||||
|
monitor reset
|
||||||
|
SetBootFlash
|
||||||
|
monitor go
|
||||||
|
quit
|
17
RTL00_SDKV35a/flasher/gdb_rdflash.jlink
Normal file
17
RTL00_SDKV35a/flasher/gdb_rdflash.jlink
Normal file
|
@ -0,0 +1,17 @@
|
||||||
|
# GDB Jlink read fullflash
|
||||||
|
# Init
|
||||||
|
source -v flasher/gdb_flasher.jlink
|
||||||
|
InitJlink
|
||||||
|
SystemInit
|
||||||
|
SPI_Init
|
||||||
|
monitor speed 12000
|
||||||
|
#FlashInfo
|
||||||
|
# Read FullFlash
|
||||||
|
printf "Read FullFlash:\n"
|
||||||
|
set $dumpstartaddr = $SPI_FLASH_BASE
|
||||||
|
set $dumpendaddr = $SPI_FLASH_BASE + 0x100000
|
||||||
|
printf "Start addr of dumping = 0x%08x\n", $dumpstartaddr
|
||||||
|
printf "End addr of dumping = 0x%08x\n", $dumpendaddr
|
||||||
|
dump binary memory ../fullflash.bin $dumpstartaddr $dumpendaddr
|
||||||
|
printf "FullFlash saved in ./build/bin/fullflash.bin - OK.\n"
|
||||||
|
quit
|
11
RTL00_SDKV35a/flasher/gdb_run_ram.jlink
Normal file
11
RTL00_SDKV35a/flasher/gdb_run_ram.jlink
Normal file
|
@ -0,0 +1,11 @@
|
||||||
|
#
|
||||||
|
# J-LINK GDB SERVER initialization
|
||||||
|
#
|
||||||
|
source -v flasher/gdb_flasher.jlink
|
||||||
|
InitJlink
|
||||||
|
load build/obj/build.axf
|
||||||
|
SetBootCall4
|
||||||
|
monitor reset
|
||||||
|
monitor go
|
||||||
|
quit
|
||||||
|
|
166
RTL00_SDKV35a/flasher/gdb_wrflash.jlink
Normal file
166
RTL00_SDKV35a/flasher/gdb_wrflash.jlink
Normal file
|
@ -0,0 +1,166 @@
|
||||||
|
###############
|
||||||
|
# FlasherInit #
|
||||||
|
###############
|
||||||
|
define FlasherInit
|
||||||
|
set $rtl8710_flasher_capacity = 0
|
||||||
|
set $rtl8710_flasher_auto_erase = 1
|
||||||
|
set $rtl8710_flasher_auto_verify = 1
|
||||||
|
set $rtl8710_flasher_firmware_ptr = 0x10001000
|
||||||
|
set $rtl8710_flasher_buffer = 0x10008000
|
||||||
|
#262144
|
||||||
|
set $rtl8710_flasher_buffer_size = 421888
|
||||||
|
set $rtl8710_flasher_sector_size = 4096
|
||||||
|
set $rtl8710_flasher_auto_erase_sector = 0xFFFFFFFF
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# FlasherWait #
|
||||||
|
###############
|
||||||
|
define FlasherWait
|
||||||
|
set $fresult = {int}($rtl8710_flasher_buffer)
|
||||||
|
while ($fresult != 0)
|
||||||
|
set $fresult = {int}($rtl8710_flasher_buffer)
|
||||||
|
end
|
||||||
|
end
|
||||||
|
###############
|
||||||
|
# FlasherLoad #
|
||||||
|
###############
|
||||||
|
define FlasherLoad
|
||||||
|
if $rtl8710_flasher_capacity == 0
|
||||||
|
printf "initializing RTL8710 flasher\n"
|
||||||
|
restore $arg0 binary $rtl8710_flasher_firmware_ptr 0 968
|
||||||
|
monitor reset
|
||||||
|
set $pc = $rtl8710_flasher_firmware_ptr
|
||||||
|
set $sp = 0x1ffffffc
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
#continue
|
||||||
|
monitor go
|
||||||
|
FlasherWait
|
||||||
|
set $id = {int}($rtl8710_flasher_buffer + 0x0C)
|
||||||
|
if ($id == 0x1420c2)
|
||||||
|
set $rtl8710_flasher_capacity = 1 << (($id >> 16) & 0x0ff)
|
||||||
|
printf "Flash ID = 0x%08x : MX25L8006E (%d kbytes)\n", $id, $rtl8710_flasher_capacity>>10
|
||||||
|
else
|
||||||
|
set $rtl8710_flasher_capacity = 1024*1024)
|
||||||
|
error "Flash ID = 0x%08x : ?\n", $id
|
||||||
|
end
|
||||||
|
printf "RTL8710 flasher initialized\n"
|
||||||
|
else
|
||||||
|
printf "reinitializing RTL8710 flasher\n"
|
||||||
|
end
|
||||||
|
end
|
||||||
|
##################
|
||||||
|
# FlasherWrBlock #
|
||||||
|
##################
|
||||||
|
define FlasherWrBlock
|
||||||
|
#printf "FlashWrBlock 0x%08x, 0x%08x\n", $arg0, $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 4
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x14) = $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x08)
|
||||||
|
if $status > 0
|
||||||
|
error "write error, offset 0x%08x", $arg0
|
||||||
|
end
|
||||||
|
end
|
||||||
|
##################
|
||||||
|
# FlasherVrBlock #
|
||||||
|
##################
|
||||||
|
define FlasherVrBlock
|
||||||
|
#printf "FlashVrBlock 0x%08x, 0x%08x\n", $arg0, $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 5
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x14) = $arg1
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x08)
|
||||||
|
if $status > 0
|
||||||
|
set $status = {int}($rtl8710_flasher_buffer + 0x0C)
|
||||||
|
set $status = {int}($status + $arg0)
|
||||||
|
error "verify error, offset 0x%08x", $status
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#################
|
||||||
|
# FlashSecErase #
|
||||||
|
#################
|
||||||
|
define FlashSecErase
|
||||||
|
#printf "FlashSecErase 0x%08x, 0x%08x\n", $rtl8710_flasher_buffer, $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x04) = 2
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x08) = 0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x10) = $arg0
|
||||||
|
set {int}($rtl8710_flasher_buffer + 0x00) = 1
|
||||||
|
FlasherWait
|
||||||
|
end
|
||||||
|
################
|
||||||
|
# FlasherWrite #
|
||||||
|
################
|
||||||
|
define FlasherWrite
|
||||||
|
set $sector = 0
|
||||||
|
set $offset = 0
|
||||||
|
set $size = $arg2
|
||||||
|
while $offset < $size
|
||||||
|
set $len = $size - $offset
|
||||||
|
if $len > $rtl8710_flasher_buffer_size
|
||||||
|
set $len = $rtl8710_flasher_buffer_size
|
||||||
|
end
|
||||||
|
set $flash_offset = $arg1 + $offset
|
||||||
|
printf "write offset 0x%08x\n", $flash_offset
|
||||||
|
set $parms1 = $rtl8710_flasher_buffer + 0x20 - $offset - $arg1
|
||||||
|
set $parms2 = $offset + $arg1
|
||||||
|
set $parms3 = $offset + $len + $arg1
|
||||||
|
restore $arg0 binary $parms1 $parms2 $parms3
|
||||||
|
if $rtl8710_flasher_auto_erase != 0
|
||||||
|
set $count_i = $flash_offset
|
||||||
|
while $count_i < ($flash_offset + $len)
|
||||||
|
set $sector = $count_i/$rtl8710_flasher_sector_size
|
||||||
|
if $rtl8710_flasher_auto_erase_sector != $sector
|
||||||
|
set $parms1 = $sector * $rtl8710_flasher_sector_size
|
||||||
|
printf "erase sector %d at 0x%08x\n", $sector, $parms1
|
||||||
|
FlashSecErase $parms1
|
||||||
|
set $rtl8710_flasher_auto_erase_sector = $sector
|
||||||
|
end
|
||||||
|
set $count_i = $count_i + 1
|
||||||
|
end
|
||||||
|
end
|
||||||
|
FlasherWrBlock $flash_offset $len
|
||||||
|
printf "wrote %d bytes at 0x%08x\n", $len, $flash_offset
|
||||||
|
if $rtl8710_flasher_auto_verify != 0
|
||||||
|
printf "verify offset 0x%08x len %d\n", $flash_offset, $len
|
||||||
|
FlasherVrBlock $flash_offset $len
|
||||||
|
end
|
||||||
|
set $offset = $offset + $rtl8710_flasher_buffer_size
|
||||||
|
end
|
||||||
|
end
|
||||||
|
#########################################
|
||||||
|
source -v flasher/gdb_flasher.jlink
|
||||||
|
source -v flasher/flash_file.jlink
|
||||||
|
InitJlink
|
||||||
|
SystemInit
|
||||||
|
SetClk166MHz
|
||||||
|
SPI_Init
|
||||||
|
FlashImagesInfo
|
||||||
|
#SetFirwareSize $wr_flile
|
||||||
|
call1
|
||||||
|
if $FirmwareSize == 0
|
||||||
|
error "FirmwareSize = 0!"
|
||||||
|
end
|
||||||
|
FlasherInit
|
||||||
|
FlasherLoad flasher/rtl8710_flasher.bin
|
||||||
|
if $Image1Size != 0
|
||||||
|
printf "Write Image1 size %d to Flash addr 0x00000000:\n", $Image1Size
|
||||||
|
#FlasherWrite $wr_flile 0 $Image1Size
|
||||||
|
call2
|
||||||
|
if $Image2Size != 0 && $Image2Addr >= $Image1Size
|
||||||
|
printf "Write Image2 size %d to Flash addr 0x%08x:\n", $Image2Size, $Image2Addr
|
||||||
|
#FlasherWrite $wr_flile $Image2Addr $Image2Size
|
||||||
|
call3
|
||||||
|
end
|
||||||
|
end
|
||||||
|
FlashImagesInfo
|
||||||
|
monitor reset
|
||||||
|
SetBootFlash
|
||||||
|
monitor go
|
||||||
|
quit
|
340
RTL00_SDKV35a/flasher/rtl8710.ocd
Normal file
340
RTL00_SDKV35a/flasher/rtl8710.ocd
Normal file
|
@ -0,0 +1,340 @@
|
||||||
|
#
|
||||||
|
# OpenOCD script for RTL8710
|
||||||
|
# Copyright (C) 2016 Rebane, rebane@alkohol.ee
|
||||||
|
#
|
||||||
|
set CHIPNAME rtl8195a
|
||||||
|
set CHIPSERIES ameba1
|
||||||
|
|
||||||
|
# Adapt based on what transport is active.
|
||||||
|
|
||||||
|
source [find target/swj-dp.tcl]
|
||||||
|
|
||||||
|
if { [info exists CHIPNAME] } {
|
||||||
|
set _CHIPNAME $CHIPNAME
|
||||||
|
} else {
|
||||||
|
set _CHIPNAME rtl8710
|
||||||
|
}
|
||||||
|
|
||||||
|
if { [info exists ENDIAN] } {
|
||||||
|
set _ENDIAN $ENDIAN
|
||||||
|
} else {
|
||||||
|
set _ENDIAN little
|
||||||
|
}
|
||||||
|
|
||||||
|
if { [info exists WORKAREASIZE] } {
|
||||||
|
set _WORKAREASIZE $WORKAREASIZE
|
||||||
|
} else {
|
||||||
|
set _WORKAREASIZE 0x800
|
||||||
|
}
|
||||||
|
|
||||||
|
if { [info exists CPUTAPID] } {
|
||||||
|
set _CPUTAPID $CPUTAPID
|
||||||
|
} else {
|
||||||
|
set _CPUTAPID 0x2ba01477
|
||||||
|
}
|
||||||
|
|
||||||
|
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||||
|
|
||||||
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||||
|
|
||||||
|
$_TARGETNAME configure -work-area-phys 0x10001000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
||||||
|
|
||||||
|
# adapter_khz 500
|
||||||
|
adapter_nsrst_delay 100
|
||||||
|
|
||||||
|
if {![using_hla]} {
|
||||||
|
cortex_m reset_config sysresetreq vectreset
|
||||||
|
}
|
||||||
|
|
||||||
|
set rtl8710_flasher_firmware_ptr 0x10001000
|
||||||
|
set rtl8710_flasher_buffer 0x10008000
|
||||||
|
set rtl8710_flasher_buffer_size 262144
|
||||||
|
set rtl8710_flasher_sector_size 4096
|
||||||
|
|
||||||
|
array set rtl8710_flasher_code {
|
||||||
|
0 0xB671B57F 1 0x25FF4B58 2 0x6B196B1A 3 0x7040F042 4 0x69D96318 5 0xF4414E55
|
||||||
|
6 0x69D97480 7 0xF8D361DC 8 0xF8C32120 9 0xF8D35120 10 0xF8C31124 11 0x47B05124
|
||||||
|
12 0x47B04E4F 13 0x47984B4F 14 0x60104A4F 15 0x484F47B0 16 0x60012100 17 0x2C006804
|
||||||
|
18 0x4D4DD0FC 19 0xB93E682E 20 0x60264C49 21 0x47B04E46 22 0x47984B46 23 0xE7ED6020
|
||||||
|
24 0x2B01682B 25 0x4E42D109 26 0x4C4647B0 27 0x47A02006 28 0x47904A45 29 0x47A020C7
|
||||||
|
30 0x682AE00D 31 0xD10E2A02 32 0x47B04E3B 33 0x20064C3F 34 0x483F47A0 35 0x493F4780
|
||||||
|
36 0x68084D3F 37 0x47B047A8 38 0x47A02004 39 0x6828E7CE 40 0xD1132803 41 0x47A04C32
|
||||||
|
42 0x24004838 43 0x4E396805 44 0x68311960 45 0xD206428C 46 0x4B384A37 47 0x221018A1
|
||||||
|
48 0x34104798 49 0x4D2AE7F3 50 0xE7B847A8 51 0x29046829 52 0x2400D11B 53 0x6806482F
|
||||||
|
54 0xD2B042B4 55 0x47A84D24 56 0x20064E28 57 0x4B2847B0 58 0x49284798 59 0x680A4B2A
|
||||||
|
60 0x18A018E1 61 0xF44F4B2A 62 0x47987280 63 0x200447A8 64 0xF50447B0 65 0x47A87480
|
||||||
|
66 0x682CE7E4 67 0xD1232C05 68 0x47984B17 69 0x4D1F2400 70 0x4294682A 71 0x481BD28F
|
||||||
|
72 0x68012210 73 0x18604E1D 74 0x47B04669 75 0x1B19682B 76 0xBF282910 77 0x23002110
|
||||||
|
78 0xD011428B 79 0xF81D4A16 80 0x18A05003 81 0x42B55CC6 82 0x3301D101 83 0x4A15E7F4
|
||||||
|
84 0x60112101 85 0xE7726054 86 0x25014E12 87 0xE76E6035 88 0x47A84D03 89 0xE7D63410
|
||||||
|
90 0x40000200 91 0x100011BD 92 0x100013DD 93 0x10001289 94 0x1000800C 95 0x10008000
|
||||||
|
96 0x10008004 97 0x1000130D 98 0x100013ED 99 0x10008010 100 0x10001335 101 0x10008014
|
||||||
|
102 0x10008020 103 0x10001221 104 0x10001375 105 0x10008008 106 0x6A5A4B03 107 0xD0FB0512
|
||||||
|
108 0x0060F893 109 0xBF004770 110 0x40006000 111 0x6B194B17 112 0xF4416B1A 113 0x63187040
|
||||||
|
114 0x69186919 115 0x0110F041 116 0xF8D36119 117 0x220000C0 118 0x0106F020 119 0x00C0F8D3
|
||||||
|
120 0x10C0F8C3 121 0x00C0F8D3 122 0x0101F040 123 0x00C0F8D3 124 0x10C0F8C3 125 0x43BCF503
|
||||||
|
126 0x609A6899 127 0x20016AD9 128 0x691962DA 129 0x69596118 130 0x61592102 131 0x619A6999
|
||||||
|
132 0x61DA69D9 133 0x64DA6CD9 134 0xBF004770 135 0x40000200 136 0x460EB570 137 0xB34A4614
|
||||||
|
138 0xF3C04B15 139 0x681A4507 140 0x7240F44F 141 0x685A601A 142 0xF3C02103 143 0x2C102207
|
||||||
|
144 0x2410BF28 145 0x605CB2C0 146 0x1060F883 147 0x5060F883 148 0xF8832101 149 0xF8832060
|
||||||
|
150 0x689A0060 151 0x60992500 152 0x47984B08 153 0x35015570 154 0x42A2B2AA 155 0x4804D3F8
|
||||||
|
156 0xF0116A81 157 0xD1FA0301 158 0x60836881 159 0xBD704620 160 0x40006000 161 0x100011A9
|
||||||
|
162 0x4C10B5F8 163 0x68232003 164 0x7340F44F 165 0x68636023 166 0x60602101 167 0x68A3229F
|
||||||
|
168 0x60A14D0B 169 0x2060F884 170 0x460647A8 171 0x460747A8 172 0x040347A8 173 0x2707EA43
|
||||||
|
174 0x0006EA47 175 0x4B036AA1 176 0x0201F011 177 0x6899D1FA 178 0xBDF8609A 179 0x40006000
|
||||||
|
180 0x100011A9 181 0x4C0BB510 182 0x68232001 183 0x7340F44F 184 0x68636023 185 0x60602105
|
||||||
|
186 0x60A068A2 187 0xF8844A06 188 0x47901060 189 0x4B036AA1 190 0x0201F011 191 0x6899D1FA
|
||||||
|
192 0xBD10609A 193 0x40006000 194 0x100011A9 195 0x21014B08 196 0xF44F681A 197 0x601A7280
|
||||||
|
198 0x6099689A 199 0x0060F883 200 0x48036A9A 201 0x0101F012 202 0x6883D1FA 203 0x47706081
|
||||||
|
204 0x40006000 205 0x21014B0E 206 0xF44F681A 207 0x601A7280 208 0x2220689A 209 0xF8836099
|
||||||
|
210 0xF3C02060 211 0xF3C04107 212 0xB2C02207 213 0x1060F883 214 0x2060F883 215 0x0060F883
|
||||||
|
216 0x4A036A99 217 0x0001F011 218 0x6893D1FA 219 0x47706090 220 0x40006000 221 0xB36AB530
|
||||||
|
222 0x25014B17 223 0xF44F681C 224 0x601C7480 225 0x2402689C 226 0xF883609D 227 0xF3C04060
|
||||||
|
228 0xF3C04507 229 0xB2C02407 230 0x5060F883 231 0x7F80F5B2 232 0xF44FBF28 233 0xF8837280
|
||||||
|
234 0xF8834060 235 0x20000060 236 0x4C095C0D 237 0xF8843001 238 0xB2855060 239 0xD3F74295
|
||||||
|
240 0x07496A99 241 0x6AA0D5FC 242 0xF0104B03 243 0xD1FA0101 244 0x60996898 245 0xBD304610
|
||||||
|
246 0x40006000 247 0x4B02B508 248 0x07C04798 249 0xBD08D4FB 250 0x100012D5 251 0x4B04B508
|
||||||
|
252 0xF0004798 253 0xB2C10002 254 0xD0F82900 255 0xBF00BD08 256 0x100012D5
|
||||||
|
}
|
||||||
|
|
||||||
|
set rtl8710_flasher_command_read_id 0
|
||||||
|
set rtl8710_flasher_command_mass_erase 1
|
||||||
|
set rtl8710_flasher_command_sector_erase 2
|
||||||
|
set rtl8710_flasher_command_read 3
|
||||||
|
set rtl8710_flasher_command_write 4
|
||||||
|
set rtl8710_flasher_command_verify 5
|
||||||
|
|
||||||
|
set rtl8710_flasher_ready 0
|
||||||
|
set rtl8710_flasher_capacity 0
|
||||||
|
set rtl8710_flasher_auto_erase 0
|
||||||
|
set rtl8710_flasher_auto_verify 0
|
||||||
|
set rtl8710_flasher_auto_erase_sector 0xFFFFFFFF
|
||||||
|
|
||||||
|
proc rtl8710_flasher_init {} {
|
||||||
|
global rtl8710_flasher_firmware_ptr
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_capacity
|
||||||
|
global rtl8710_flasher_ready
|
||||||
|
global rtl8710_flasher_code
|
||||||
|
|
||||||
|
if {[expr {$rtl8710_flasher_ready == 0}]} {
|
||||||
|
echo "initializing RTL8710 flasher"
|
||||||
|
halt
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
array2mem rtl8710_flasher_code 32 $rtl8710_flasher_firmware_ptr [array size rtl8710_flasher_code]
|
||||||
|
reg faultmask 0x01
|
||||||
|
reg sp 0x20000000
|
||||||
|
reg pc $rtl8710_flasher_firmware_ptr
|
||||||
|
resume
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||||
|
set rtl8710_flasher_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||||
|
set rtl8710_flasher_ready 1
|
||||||
|
echo "RTL8710 flasher initialized"
|
||||||
|
}
|
||||||
|
return ""
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_mrw {reg} {
|
||||||
|
set value ""
|
||||||
|
mem2array value 32 $reg 1
|
||||||
|
return $value(0)
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_wait {} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
while {[rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x00}]]} { }
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_load_block {local_filename offset len} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
load_image $local_filename [expr {$rtl8710_flasher_buffer + 0x20 - $offset}] bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_read_block {offset len} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_command_read
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||||
|
if {[expr {$status > 0}]} {
|
||||||
|
error "read error, offset $offset"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_write_block {offset len} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_command_write
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_write
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||||
|
if {[expr {$status > 0}]} {
|
||||||
|
error "write error, offset $offset"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flasher_verify_block {offset len} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_command_verify
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_verify
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x14}] $len
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x08}]]
|
||||||
|
if {[expr {$status > 0}]} {
|
||||||
|
set status [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||||
|
set status [expr {$status + $offset}]
|
||||||
|
error "verify error, offset $status"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_read_id {} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_capacity
|
||||||
|
global rtl8710_flasher_command_read_id
|
||||||
|
rtl8710_flasher_init
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_read_id
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
set id [rtl8710_flasher_mrw [expr {$rtl8710_flasher_buffer + 0x0C}]]
|
||||||
|
set manufacturer_id [format "0x%02X" [expr {$id & 0xFF}]]
|
||||||
|
set memory_type [format "0x%02X" [expr {($id >> 8) & 0xFF}]]
|
||||||
|
set memory_capacity [expr {2 ** [expr {($id >> 16) & 0xFF}]}]
|
||||||
|
echo "manufacturer ID: $manufacturer_id, memory type: $memory_type, memory capacity: $memory_capacity bytes"
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_mass_erase {} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_command_mass_erase
|
||||||
|
rtl8710_flasher_init
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_mass_erase
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_sector_erase {offset} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_command_sector_erase
|
||||||
|
rtl8710_flasher_init
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x04}] $rtl8710_flasher_command_sector_erase
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x08}] 0x00000000
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x10}] $offset
|
||||||
|
mww [expr {$rtl8710_flasher_buffer + 0x00}] 0x00000001
|
||||||
|
rtl8710_flasher_wait
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_read {local_filename loc size} {
|
||||||
|
global rtl8710_flasher_buffer
|
||||||
|
global rtl8710_flasher_buffer_size
|
||||||
|
rtl8710_flasher_init
|
||||||
|
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len [expr {$size - $offset}]
|
||||||
|
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len $rtl8710_flasher_buffer_size
|
||||||
|
}
|
||||||
|
set flash_offset [expr {$loc + $offset}]
|
||||||
|
echo "read offset $flash_offset"
|
||||||
|
rtl8710_flasher_read_block $flash_offset $len
|
||||||
|
dump_image _rtl8710_flasher.bin [expr {$rtl8710_flasher_buffer + 0x20}] $len
|
||||||
|
exec dd conv=notrunc if=_rtl8710_flasher.bin "of=$local_filename" bs=1 "seek=$offset"
|
||||||
|
echo "read $len bytes"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_write {local_filename loc} {
|
||||||
|
global rtl8710_flasher_buffer_size
|
||||||
|
global rtl8710_flasher_sector_size
|
||||||
|
global rtl8710_flasher_auto_erase
|
||||||
|
global rtl8710_flasher_auto_verify
|
||||||
|
global rtl8710_flasher_auto_erase_sector
|
||||||
|
rtl8710_flasher_init
|
||||||
|
set sector 0
|
||||||
|
set size [file size $local_filename]
|
||||||
|
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len [expr {$size - $offset}]
|
||||||
|
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len $rtl8710_flasher_buffer_size
|
||||||
|
}
|
||||||
|
set flash_offset [expr {$loc + $offset}]
|
||||||
|
echo "write offset $flash_offset"
|
||||||
|
rtl8710_flasher_load_block $local_filename $offset $len
|
||||||
|
if {[expr {$rtl8710_flasher_auto_erase != 0}]} {
|
||||||
|
for {set i $flash_offset} {$i < [expr {$flash_offset + $len}]} {incr i} {
|
||||||
|
set sector [expr {$i / $rtl8710_flasher_sector_size}]
|
||||||
|
if {[expr {$rtl8710_flasher_auto_erase_sector != $sector}]} {
|
||||||
|
echo "erase sector $sector"
|
||||||
|
rtl8710_flash_sector_erase [expr {$sector * $rtl8710_flasher_sector_size}]
|
||||||
|
set rtl8710_flasher_auto_erase_sector $sector
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
rtl8710_flasher_write_block $flash_offset $len
|
||||||
|
echo "wrote $len bytes"
|
||||||
|
if {[expr {$rtl8710_flasher_auto_verify != 0}]} {
|
||||||
|
echo "verify offset $flash_offset"
|
||||||
|
rtl8710_flasher_verify_block $flash_offset $len
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_verify {local_filename loc} {
|
||||||
|
global rtl8710_flasher_buffer_size
|
||||||
|
rtl8710_flasher_init
|
||||||
|
set size [file size $local_filename]
|
||||||
|
for {set offset 0} {$offset < $size} {set offset [expr {$offset + $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len [expr {$size - $offset}]
|
||||||
|
if {[expr {$len > $rtl8710_flasher_buffer_size}]} {
|
||||||
|
set len $rtl8710_flasher_buffer_size
|
||||||
|
}
|
||||||
|
set flash_offset [expr {$loc + $offset}]
|
||||||
|
echo "read offset $flash_offset"
|
||||||
|
rtl8710_flasher_load_block $local_filename $offset $len
|
||||||
|
echo "verify offset $flash_offset"
|
||||||
|
rtl8710_flasher_verify_block $flash_offset $len
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_auto_erase {on} {
|
||||||
|
global rtl8710_flasher_auto_erase
|
||||||
|
if {[expr {$on != 0}]} {
|
||||||
|
set rtl8710_flasher_auto_erase 1
|
||||||
|
echo "auto erase on"
|
||||||
|
} else {
|
||||||
|
set rtl8710_flasher_auto_erase 0
|
||||||
|
echo "auto erase off"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_flash_auto_verify {on} {
|
||||||
|
global rtl8710_flasher_auto_verify
|
||||||
|
if {[expr {$on != 0}]} {
|
||||||
|
set rtl8710_flasher_auto_verify 1
|
||||||
|
echo "auto verify on"
|
||||||
|
} else {
|
||||||
|
set rtl8710_flasher_auto_verify 0
|
||||||
|
echo "auto verify off"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
proc rtl8710_reboot {} {
|
||||||
|
echo "# Set processor clock to default before system reset"
|
||||||
|
mww 0x40000014 0x00000021
|
||||||
|
sleep 10
|
||||||
|
echo "# Reboot (system reset)"
|
||||||
|
mww 0xE000ED0C 0x05FA0007
|
||||||
|
}
|
||||||
|
|
BIN
RTL00_SDKV35a/flasher/rtl8710_flasher.bin
Normal file
BIN
RTL00_SDKV35a/flasher/rtl8710_flasher.bin
Normal file
Binary file not shown.
|
@ -1,13 +1,13 @@
|
||||||
#---------------------------
|
#---------------------------
|
||||||
# User defined
|
# User defined (in userset.mk)
|
||||||
#---------------------------
|
#---------------------------
|
||||||
SDK_PATH = RTL00_SDKV35a/
|
SDK_PATH ?= ../RTL00MP3/RTL00_SDKV35a/
|
||||||
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH
|
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH
|
||||||
#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH
|
#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH
|
||||||
TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
|
TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
|
||||||
FLASHER_TYPE ?= Jlink
|
FLASHER_TYPE ?= Jlink
|
||||||
#FLASHER_TYPE ?= OCD
|
#FLASHER_TYPE ?= OCD
|
||||||
FLASHER_PATH ?= flasher/
|
FLASHER_PATH ?= $(SDK_PATH)flasher/
|
||||||
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
|
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
|
||||||
JLINK_GDBSRV ?= JLinkGDBServer.exe
|
JLINK_GDBSRV ?= JLinkGDBServer.exe
|
||||||
#---------------------------
|
#---------------------------
|
|
@ -1,6 +1,6 @@
|
||||||
|
include userset.mk
|
||||||
include sdkset.mk
|
include $(SDK_PATH)paths.mk
|
||||||
include paths.mk
|
include project.mk
|
||||||
|
|
||||||
INCFLAGS = $(patsubst %,-I%,$(patsubst sdk/%,$(SDK_PATH)%,$(INCLUDES)))
|
INCFLAGS = $(patsubst %,-I%,$(patsubst sdk/%,$(SDK_PATH)%,$(INCLUDES)))
|
||||||
|
|
|
@ -1,34 +1,45 @@
|
||||||
|
#=============================================
|
||||||
|
# USER CONFIG (in project.mk)
|
||||||
|
#=============================================
|
||||||
#USE_AT = 1
|
#USE_AT = 1
|
||||||
#USE_FATFS = 1
|
#USE_FATFS = 1
|
||||||
#USE_SDIOH = 1
|
#USE_SDIOH = 1
|
||||||
#USE_POLARSSL = 1
|
#USE_POLARSSL = 1
|
||||||
#USE_P2P_WPS = 1
|
#USE_P2P_WPS = 1
|
||||||
ifndef USE_AT
|
#ifndef USE_AT
|
||||||
USE_NEWCONSOLE = 1
|
#USE_NEWCONSOLE = 1
|
||||||
USE_WIFI_API = 1
|
#USE_WIFI_API = 1
|
||||||
endif
|
#endif
|
||||||
USE_MBED = 1
|
#USE_MBED = 1
|
||||||
|
#USE_GCC_LIB = 1
|
||||||
#RTOSDIR=freertos_v8.1.2
|
#RTOSDIR=freertos_v8.1.2
|
||||||
RTOSDIR=freertos_v9.0.0
|
#RTOSDIR=freertos_v9.0.0
|
||||||
LWIPDIR=lwip_v1.4.1
|
#LWIPDIR=lwip_v1.4.1
|
||||||
|
# -------------------------------------------------------------------
|
||||||
# FLAGS
|
# FLAGS
|
||||||
# -------------------------------------------------------------------
|
# -------------------------------------------------------------------
|
||||||
CFLAGS = -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK -DF_CPU=166666666L -DNDEBUG
|
CFLAGS = -DM3 -DCONFIG_PLATFORM_8195A -DGCC_ARMCM3 -DARDUINO_SDK -DF_CPU=166666666L -DNDEBUG
|
||||||
CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 -Wall -Werror
|
CFLAGS += -mcpu=cortex-m3 -mthumb -g2 -Os -std=gnu99 -Wall -Werror
|
||||||
CFLAGS += -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -fsigned-char
|
CFLAGS += -fno-common -fmessage-length=0 -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-short-enums -fsigned-char
|
||||||
CFLAGS += -w -Wno-pointer-sign
|
CFLAGS += -w -Wno-pointer-sign
|
||||||
|
ifdef USE_GCC_LIB
|
||||||
|
LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles --specs=nano.specs
|
||||||
|
else
|
||||||
LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles -nostdlib
|
LFLAGS = -mcpu=cortex-m3 -mthumb -g -Os -nostartfiles -nostdlib
|
||||||
#--specs=nano.specs
|
endif
|
||||||
LFLAGS += -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning -Wl,-nostdlib
|
LFLAGS += -Wl,--gc-sections -Wl,--cref -Wl,--entry=Reset_Handler -Wl,--no-enum-size-warning -Wl,--no-wchar-size-warning -Wl,-nostdlib
|
||||||
|
|
||||||
# LIBS
|
# LIBS
|
||||||
# -------------------------------------------------------------------
|
# -------------------------------------------------------------------
|
||||||
LIBS =
|
LIBS =
|
||||||
|
ifdef USE_GCC_LIB
|
||||||
|
all: LIBS +=_platform_new _wlan _p2p _wps _websocket _sdcard _xmodem _mdns gcc m c nosys
|
||||||
|
mp: LIBS +=_platform_new _wlan_mp _wps _p2p _websocket _sdcard _xmodem _mdns gcc m c nosys
|
||||||
|
else
|
||||||
all: LIBS +=_platform_new _wlan _p2p _wps _websocket _sdcard _xmodem _mdns
|
all: LIBS +=_platform_new _wlan _p2p _wps _websocket _sdcard _xmodem _mdns
|
||||||
# m c nosys gcc
|
|
||||||
mp: LIBS +=_platform_new _wlan_mp _wps _p2p _websocket _sdcard _xmodem _mdns
|
mp: LIBS +=_platform_new _wlan_mp _wps _p2p _websocket _sdcard _xmodem _mdns
|
||||||
|
endif
|
||||||
|
# m c nosys gcc
|
||||||
PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
|
PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
|
||||||
LDFILE = rlx8195A-symbol-v04-img2.ld
|
LDFILE = rlx8195A-symbol-v04-img2.ld
|
||||||
BOOTS = sdk/component/soc/realtek/8195a/misc/bsp/image
|
BOOTS = sdk/component/soc/realtek/8195a/misc/bsp/image
|
||||||
|
@ -370,7 +381,9 @@ SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libglos
|
||||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
|
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
|
||||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
|
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
|
||||||
#if +- nostdlib..
|
#if +- nostdlib..
|
||||||
|
ifndef USE_GCC_LIB
|
||||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
|
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
|
||||||
|
endif
|
||||||
#if c_printf() float
|
#if c_printf() float
|
||||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
|
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/c_stdio.c
|
||||||
# -------------------------------------------------------------------
|
# -------------------------------------------------------------------
|
||||||
|
@ -423,34 +436,3 @@ endif
|
||||||
#ADD_SRC_C += sdk/component/common/example/mdns/example_mdns.c
|
#ADD_SRC_C += sdk/component/common/example/mdns/example_mdns.c
|
||||||
#ADD_SRC_C += sdk/component/common/example/socket_select/example_socket_select.c
|
#ADD_SRC_C += sdk/component/common/example/socket_select/example_socket_select.c
|
||||||
#ADD_SRC_C += sdk/component/common/example/xml/example_xml.c
|
#ADD_SRC_C += sdk/component/common/example/xml/example_xml.c
|
||||||
|
|
||||||
#=============================================
|
|
||||||
# PROGECT
|
|
||||||
#=============================================
|
|
||||||
#user main
|
|
||||||
ADD_SRC_C += project/src/user/main.c
|
|
||||||
# components
|
|
||||||
ADD_SRC_C += project/src/user/wifi_console.c
|
|
||||||
ADD_SRC_C += project/src/user/atcmd_user.c
|
|
||||||
ADD_SRC_C += project/src/user/spiram_fifo.c
|
|
||||||
|
|
||||||
#lib mad
|
|
||||||
ADD_SRC_C += project/src/mad/mad_version.c
|
|
||||||
ADD_SRC_C += project/src/mad/mpg12/layer12.c
|
|
||||||
ADD_SRC_C += project/src/mad/frame.c
|
|
||||||
ADD_SRC_C += project/src/mad/layer3.c
|
|
||||||
ADD_SRC_C += project/src/mad/align.c
|
|
||||||
ADD_SRC_C += project/src/mad/decoder.c
|
|
||||||
ADD_SRC_C += project/src/mad/huffman.c
|
|
||||||
ADD_SRC_C += project/src/mad/fixed.c
|
|
||||||
ADD_SRC_C += project/src/mad/bit.c
|
|
||||||
ADD_SRC_C += project/src/mad/synth.c
|
|
||||||
ADD_SRC_C += project/src/mad/timer.c
|
|
||||||
ADD_SRC_C += project/src/mad/stream.c
|
|
||||||
|
|
||||||
#driver
|
|
||||||
ADD_SRC_C += project/src/driver/i2s_freertos.c
|
|
||||||
|
|
||||||
#include
|
|
||||||
INCLUDES += project/inc/mad
|
|
||||||
#=============================================
|
|
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
54
project.mk
Normal file
54
project.mk
Normal file
|
@ -0,0 +1,54 @@
|
||||||
|
#=============================================
|
||||||
|
# SDK CONFIG
|
||||||
|
#=============================================
|
||||||
|
#USE_AT = 1
|
||||||
|
#USE_FATFS = 1
|
||||||
|
#USE_SDIOH = 1
|
||||||
|
#USE_POLARSSL = 1
|
||||||
|
#USE_P2P_WPS = 1
|
||||||
|
#USE_GCC_LIB = 1
|
||||||
|
USE_MBED = 1
|
||||||
|
|
||||||
|
ifndef USE_AT
|
||||||
|
USE_NEWCONSOLE = 1
|
||||||
|
USE_WIFI_API = 1
|
||||||
|
endif
|
||||||
|
|
||||||
|
#RTOSDIR=freertos_v8.1.2
|
||||||
|
RTOSDIR=freertos_v9.0.0
|
||||||
|
LWIPDIR=lwip_v1.4.1
|
||||||
|
include $(SDK_PATH)sdkset.mk
|
||||||
|
#compile
|
||||||
|
CFLAGS += -DLOGUART_STACK_SIZE=1024
|
||||||
|
#CFLAGS += -DDEFAULT_BAUDRATE=1562500
|
||||||
|
#=============================================
|
||||||
|
# User Files
|
||||||
|
#=============================================
|
||||||
|
#user main
|
||||||
|
ADD_SRC_C += project/src/user/main.c
|
||||||
|
# components
|
||||||
|
ADD_SRC_C += project/src/user/wifi_console.c
|
||||||
|
ADD_SRC_C += project/src/user/atcmd_user.c
|
||||||
|
ADD_SRC_C += project/src/user/spiram_fifo.c
|
||||||
|
|
||||||
|
#lib mad
|
||||||
|
ADD_SRC_C += project/src/mad/mad_version.c
|
||||||
|
ADD_SRC_C += project/src/mad/mpg12/layer12.c
|
||||||
|
ADD_SRC_C += project/src/mad/frame.c
|
||||||
|
ADD_SRC_C += project/src/mad/layer3.c
|
||||||
|
ADD_SRC_C += project/src/mad/align.c
|
||||||
|
ADD_SRC_C += project/src/mad/decoder.c
|
||||||
|
ADD_SRC_C += project/src/mad/huffman.c
|
||||||
|
ADD_SRC_C += project/src/mad/fixed.c
|
||||||
|
ADD_SRC_C += project/src/mad/bit.c
|
||||||
|
ADD_SRC_C += project/src/mad/synth.c
|
||||||
|
ADD_SRC_C += project/src/mad/timer.c
|
||||||
|
ADD_SRC_C += project/src/mad/stream.c
|
||||||
|
|
||||||
|
#driver
|
||||||
|
ADD_SRC_C += project/src/driver/i2s_freertos.c
|
||||||
|
|
||||||
|
#include
|
||||||
|
INCLUDES += project/inc/mad
|
||||||
|
|
||||||
|
|
12
userset.mk
Normal file
12
userset.mk
Normal file
|
@ -0,0 +1,12 @@
|
||||||
|
#=============================================
|
||||||
|
# User defined
|
||||||
|
#=============================================
|
||||||
|
SDK_PATH ?= RTL00_SDKV35a/
|
||||||
|
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/5.2_2015q4/bin/# + or set in PATH
|
||||||
|
#OPENOCD_PATH = d:/MCU/OpenOCD/bin/# + or set in PATH
|
||||||
|
TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
|
||||||
|
FLASHER_TYPE ?= Jlink
|
||||||
|
#FLASHER_TYPE ?= OCD
|
||||||
|
FLASHER_PATH ?= $(SDK_PATH)flasher/
|
||||||
|
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
|
||||||
|
JLINK_GDBSRV ?= JLinkGDBServer.exe
|
Loading…
Reference in a new issue