mirror of
https://github.com/drasko/open-ameba.git
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288 lines
8.8 KiB
C
288 lines
8.8 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __HAL_COMMON_H__
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#define __HAL_COMMON_H__
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#include "HalVerDef.h"
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#include "hal_pg.h"
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#include "hal_intf.h"
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#include "hal_phy.h"
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#include "hal_phy_reg.h"
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#include "hal_com_reg.h"
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#include "hal_com_phycfg.h"
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//----------------------------------------------------------------------------
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// Rate Definition
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//----------------------------------------------------------------------------
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//CCK
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#define RATR_1M 0x00000001
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#define RATR_2M 0x00000002
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#define RATR_55M 0x00000004
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#define RATR_11M 0x00000008
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//OFDM
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#define RATR_6M 0x00000010
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#define RATR_9M 0x00000020
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#define RATR_12M 0x00000040
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#define RATR_18M 0x00000080
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#define RATR_24M 0x00000100
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#define RATR_36M 0x00000200
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#define RATR_48M 0x00000400
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#define RATR_54M 0x00000800
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//MCS 1 Spatial Stream
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#define RATR_MCS0 0x00001000
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#define RATR_MCS1 0x00002000
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#define RATR_MCS2 0x00004000
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#define RATR_MCS3 0x00008000
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#define RATR_MCS4 0x00010000
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#define RATR_MCS5 0x00020000
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#define RATR_MCS6 0x00040000
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#define RATR_MCS7 0x00080000
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//MCS 2 Spatial Stream
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#define RATR_MCS8 0x00100000
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#define RATR_MCS9 0x00200000
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#define RATR_MCS10 0x00400000
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#define RATR_MCS11 0x00800000
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#define RATR_MCS12 0x01000000
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#define RATR_MCS13 0x02000000
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#define RATR_MCS14 0x04000000
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#define RATR_MCS15 0x08000000
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//CCK
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#define RATE_1M BIT(0)
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#define RATE_2M BIT(1)
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#define RATE_5_5M BIT(2)
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#define RATE_11M BIT(3)
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//OFDM
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#define RATE_6M BIT(4)
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#define RATE_9M BIT(5)
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#define RATE_12M BIT(6)
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#define RATE_18M BIT(7)
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#define RATE_24M BIT(8)
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#define RATE_36M BIT(9)
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#define RATE_48M BIT(10)
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#define RATE_54M BIT(11)
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//MCS 1 Spatial Stream
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#define RATE_MCS0 BIT(12)
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#define RATE_MCS1 BIT(13)
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#define RATE_MCS2 BIT(14)
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#define RATE_MCS3 BIT(15)
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#define RATE_MCS4 BIT(16)
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#define RATE_MCS5 BIT(17)
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#define RATE_MCS6 BIT(18)
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#define RATE_MCS7 BIT(19)
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//MCS 2 Spatial Stream
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#define RATE_MCS8 BIT(20)
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#define RATE_MCS9 BIT(21)
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#define RATE_MCS10 BIT(22)
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#define RATE_MCS11 BIT(23)
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#define RATE_MCS12 BIT(24)
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#define RATE_MCS13 BIT(25)
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#define RATE_MCS14 BIT(26)
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#define RATE_MCS15 BIT(27)
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// ALL CCK Rate
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#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M
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#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\
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RATR_36M|RATR_48M|RATR_54M
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#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\
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RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7
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#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\
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RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
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/*------------------------------ Tx Desc definition Macro ------------------------*/
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//#pragma mark -- Tx Desc related definition. --
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//----------------------------------------------------------------------------
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//-----------------------------------------------------------
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// Rate
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//-----------------------------------------------------------
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// CCK Rates, TxHT = 0
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#define DESC_RATE1M 0x00
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#define DESC_RATE2M 0x01
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#define DESC_RATE5_5M 0x02
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#define DESC_RATE11M 0x03
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// OFDM Rates, TxHT = 0
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#define DESC_RATE6M 0x04
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#define DESC_RATE9M 0x05
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#define DESC_RATE12M 0x06
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#define DESC_RATE18M 0x07
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#define DESC_RATE24M 0x08
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#define DESC_RATE36M 0x09
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#define DESC_RATE48M 0x0a
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#define DESC_RATE54M 0x0b
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// MCS Rates, TxHT = 1
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#define DESC_RATEMCS0 0x0c
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#define DESC_RATEMCS1 0x0d
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#define DESC_RATEMCS2 0x0e
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#define DESC_RATEMCS3 0x0f
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#define DESC_RATEMCS4 0x10
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#define DESC_RATEMCS5 0x11
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#define DESC_RATEMCS6 0x12
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#define DESC_RATEMCS7 0x13
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#define DESC_RATEMCS8 0x14
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#define DESC_RATEMCS9 0x15
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#define DESC_RATEMCS10 0x16
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#define DESC_RATEMCS11 0x17
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#define DESC_RATEMCS12 0x18
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#define DESC_RATEMCS13 0x19
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#define DESC_RATEMCS14 0x1a
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#define DESC_RATEMCS15 0x1b
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#define DESC_RATEMCS16 0x1C
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#define DESC_RATEMCS17 0x1D
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#define DESC_RATEMCS18 0x1E
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#define DESC_RATEMCS19 0x1F
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#define DESC_RATEMCS20 0x20
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#define DESC_RATEMCS21 0x21
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#define DESC_RATEMCS22 0x22
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#define DESC_RATEMCS23 0x23
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#define DESC_RATEMCS24 0x24
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#define DESC_RATEMCS25 0x25
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#define DESC_RATEMCS26 0x26
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#define DESC_RATEMCS27 0x27
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#define DESC_RATEMCS28 0x28
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#define DESC_RATEMCS29 0x29
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#define DESC_RATEMCS30 0x2A
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#define DESC_RATEMCS31 0x2B
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#define DESC_RATEVHTSS1MCS0 0x2c
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#define DESC_RATEVHTSS1MCS1 0x2d
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#define DESC_RATEVHTSS1MCS2 0x2e
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#define DESC_RATEVHTSS1MCS3 0x2f
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#define DESC_RATEVHTSS1MCS4 0x30
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#define DESC_RATEVHTSS1MCS5 0x31
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#define DESC_RATEVHTSS1MCS6 0x32
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#define DESC_RATEVHTSS1MCS7 0x33
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#define DESC_RATEVHTSS1MCS8 0x34
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#define DESC_RATEVHTSS1MCS9 0x35
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#define DESC_RATEVHTSS2MCS0 0x36
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#define DESC_RATEVHTSS2MCS1 0x37
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#define DESC_RATEVHTSS2MCS2 0x38
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#define DESC_RATEVHTSS2MCS3 0x39
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#define DESC_RATEVHTSS2MCS4 0x3a
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#define DESC_RATEVHTSS2MCS5 0x3b
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#define DESC_RATEVHTSS2MCS6 0x3c
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#define DESC_RATEVHTSS2MCS7 0x3d
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#define DESC_RATEVHTSS2MCS8 0x3e
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#define DESC_RATEVHTSS2MCS9 0x3f
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#define DESC_RATEVHTSS3MCS0 0x40
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#define DESC_RATEVHTSS3MCS1 0x41
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#define DESC_RATEVHTSS3MCS2 0x42
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#define DESC_RATEVHTSS3MCS3 0x43
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#define DESC_RATEVHTSS3MCS4 0x44
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#define DESC_RATEVHTSS3MCS5 0x45
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#define DESC_RATEVHTSS3MCS6 0x46
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#define DESC_RATEVHTSS3MCS7 0x47
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#define DESC_RATEVHTSS3MCS8 0x48
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#define DESC_RATEVHTSS3MCS9 0x49
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#define DESC_RATEVHTSS4MCS0 0x4A
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#define DESC_RATEVHTSS4MCS1 0x4B
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#define DESC_RATEVHTSS4MCS2 0x4C
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#define DESC_RATEVHTSS4MCS3 0x4D
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#define DESC_RATEVHTSS4MCS4 0x4E
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#define DESC_RATEVHTSS4MCS5 0x4F
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#define DESC_RATEVHTSS4MCS6 0x50
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#define DESC_RATEVHTSS4MCS7 0x51
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#define DESC_RATEVHTSS4MCS8 0x52
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#define DESC_RATEVHTSS4MCS9 0x53
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typedef enum _FIRMWARE_SOURCE {
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FW_SOURCE_IMG_FILE = 0,
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FW_SOURCE_HEADER_FILE = 1, //from header file
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} FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
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// BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
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//#define MAX_TX_QUEUE 9
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#define TX_SELE_HQ BIT(0) // High Queue
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#define TX_SELE_LQ BIT(1) // Low Queue
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#define TX_SELE_NQ BIT(2) // Normal Queue
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#define TX_SELE_EQ BIT(3) // Extern Queue
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#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
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#define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len)&0xFF ? 1:0))
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#define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0))
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#define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0))
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#define DYNAMIC_FUNC_DISABLE (0x0)
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#define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF
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void dump_chip_info(HAL_VERSION ChipVersion);
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u8 //return the final channel plan decision
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hal_com_get_channel_plan(
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IN PADAPTER padapter,
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IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
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IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
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IN u8 def_channel_plan, //channel plan used when the former two is invalid
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IN BOOLEAN AutoLoadFail
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);
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u8 MRateToHwRate(u8 rate);
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void HalSetBrateCfg(
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IN PADAPTER Adapter,
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IN u8 *mBratesOS,
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OUT u16 *pBrateCfg);
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BOOLEAN
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Hal_MappingOutPipe(
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IN PADAPTER pAdapter,
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IN u8 NumOutPipe
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);
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BOOLEAN
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HAL_IsLegalChannel(
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IN _adapter * Adapter,
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IN u32 Channel
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);
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void hal_init_macaddr(_adapter *adapter);
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void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
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void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
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#if defined (CONFIG_RTL8188F) || defined (CONFIG_RTL8711B)
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typedef enum _RT_MEDIA_STATUS {
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RT_MEDIA_DISCONNECT = 0,
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RT_MEDIA_CONNECT = 1
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} RT_MEDIA_STATUS;
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void GetHalODMVar(
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PADAPTER Adapter,
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HAL_ODM_VARIABLE eVariable,
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PVOID pValue1,
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PVOID pValue2);
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void SetHalODMVar(
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PADAPTER Adapter,
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HAL_ODM_VARIABLE eVariable,
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PVOID pValue1,
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BOOLEAN bSet);
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u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
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u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
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void rtw_hal_wow_enable(_adapter *adapter);
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void rtw_hal_wow_disable(_adapter *adapter);
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#endif
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#endif //__HAL_COMMON_H__
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