(kicad_pcb (version 20211014) (generator pcbnew)

  (general
    (thickness 1.6)
  )

  (paper "A4")
  (layers
    (0 "F.Cu" signal)
    (31 "B.Cu" signal)
    (32 "B.Adhes" user "B.Adhesive")
    (33 "F.Adhes" user "F.Adhesive")
    (34 "B.Paste" user)
    (35 "F.Paste" user)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Dwgs.User" user "User.Drawings")
    (41 "Cmts.User" user "User.Comments")
    (42 "Eco1.User" user "User.Eco1")
    (43 "Eco2.User" user "User.Eco2")
    (44 "Edge.Cuts" user)
    (45 "Margin" user)
    (46 "B.CrtYd" user "B.Courtyard")
    (47 "F.CrtYd" user "F.Courtyard")
    (48 "B.Fab" user)
    (49 "F.Fab" user)
    (50 "User.1" user "Nutzer.1")
    (51 "User.2" user "Nutzer.2")
    (52 "User.3" user "Nutzer.3")
    (53 "User.4" user "Nutzer.4")
    (54 "User.5" user "Nutzer.5")
    (55 "User.6" user "Nutzer.6")
    (56 "User.7" user "Nutzer.7")
    (57 "User.8" user "Nutzer.8")
    (58 "User.9" user "Nutzer.9")
  )

  (setup
    (stackup
      (layer "F.SilkS" (type "Top Silk Screen"))
      (layer "F.Paste" (type "Top Solder Paste"))
      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
      (layer "F.Cu" (type "copper") (thickness 0.035))
      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
      (layer "B.Cu" (type "copper") (thickness 0.035))
      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
      (layer "B.Paste" (type "Bottom Solder Paste"))
      (layer "B.SilkS" (type "Bottom Silk Screen"))
      (copper_finish "None")
      (dielectric_constraints no)
    )
    (pad_to_mask_clearance 0)
    (grid_origin 167.894 27.686)
    (pcbplotparams
      (layerselection 0x00010fc_ffffffff)
      (disableapertmacros false)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes true)
      (creategerberjobfile true)
      (svguseinch false)
      (svgprecision 6)
      (excludeedgelayer true)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (dxfpolygonmode true)
      (dxfimperialunits true)
      (dxfusepcbnewfont true)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (sketchpadsonfab false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory "")
    )
  )

  (net 0 "")
  (net 1 "+3V3")
  (net 2 "GND")
  (net 3 "~{BUSRST}")
  (net 4 "Net-(C4-Pad1)")
  (net 5 "Net-(C8-Pad1)")
  (net 6 "/fiatlux_cc48_channel_driver2/DRI_DIM")
  (net 7 "+48V")
  (net 8 "/fiatlux_cc48_channel_driver2/DRI_VCC")
  (net 9 "/fiatlux_cc48_channel_driver2/DRI_COM")
  (net 10 "/fiatlux_cc48_channel_driver2/OUT+")
  (net 11 "/fiatlux_cc48_channel_driver2/OUT-")
  (net 12 "/fiatlux_cc48_channel_driver1/DRI_DIM")
  (net 13 "/fiatlux_cc48_channel_driver1/DRI_VCC")
  (net 14 "/fiatlux_cc48_channel_driver1/DRI_COM")
  (net 15 "/fiatlux_cc48_channel_driver1/OUT+")
  (net 16 "/fiatlux_cc48_channel_driver1/OUT-")
  (net 17 "/fiatlux_cc48_channel_driver3/DRI_DIM")
  (net 18 "/fiatlux_cc48_channel_driver3/DRI_VCC")
  (net 19 "/fiatlux_cc48_channel_driver3/DRI_COM")
  (net 20 "/fiatlux_cc48_channel_driver3/OUT+")
  (net 21 "/fiatlux_cc48_channel_driver3/OUT-")
  (net 22 "/fiatlux_cc48_channel_driver5/DRI_DIM")
  (net 23 "/fiatlux_cc48_channel_driver5/DRI_VCC")
  (net 24 "/fiatlux_cc48_channel_driver5/DRI_COM")
  (net 25 "/fiatlux_cc48_channel_driver5/OUT+")
  (net 26 "/fiatlux_cc48_channel_driver5/OUT-")
  (net 27 "Net-(D1-Pad2)")
  (net 28 "ACT_LED")
  (net 29 "Net-(D3-Pad2)")
  (net 30 "/fiatlux_cc48_channel_driver4/DRI_DIM")
  (net 31 "/fiatlux_cc48_channel_driver4/DRI_VCC")
  (net 32 "/fiatlux_cc48_channel_driver4/DRI_COM")
  (net 33 "/fiatlux_cc48_channel_driver4/OUT+")
  (net 34 "/fiatlux_cc48_channel_driver4/OUT-")
  (net 35 "SWIM")
  (net 36 "/fiatlux_cc48_channel_driver6/DRI_DIM")
  (net 37 "/fiatlux_cc48_channel_driver6/DRI_VCC")
  (net 38 "/fiatlux_cc48_channel_driver6/DRI_COM")
  (net 39 "/fiatlux_cc48_channel_driver6/OUT+")
  (net 40 "/fiatlux_cc48_channel_driver6/OUT-")
  (net 41 "/fiatlux_cc48_channel_driver2/DRI_SOURCE")
  (net 42 "/fiatlux_cc48_channel_driver1/DRI_SOURCE")
  (net 43 "/fiatlux_cc48_channel_driver3/DRI_SOURCE")
  (net 44 "DAC_SYNC")
  (net 45 "Net-(R2-Pad2)")
  (net 46 "SCLK")
  (net 47 "Net-(R3-Pad2)")
  (net 48 "MOSI")
  (net 49 "Net-(R4-Pad2)")
  (net 50 "MISO")
  (net 51 "Net-(R5-Pad2)")
  (net 52 "CH2_DIM")
  (net 53 "Net-(R9-Pad1)")
  (net 54 "CH1_DIM")
  (net 55 "CH3_DIM")
  (net 56 "CH5_DIM")
  (net 57 "CH4_DIM")
  (net 58 "Net-(R21-Pad1)")
  (net 59 "CH6_DIM")
  (net 60 "Net-(C13-Pad1)")
  (net 61 "unconnected-(U2-Pad11)")
  (net 62 "unconnected-(U2-Pad12)")
  (net 63 "INIT_{IN}")
  (net 64 "~{INT}")
  (net 65 "INIT_{OUT}")
  (net 66 "unconnected-(U3-Pad9)")
  (net 67 "SW_SCLK")
  (net 68 "SW_MOSI")
  (net 69 "SW_MISO")
  (net 70 "unconnected-(U3-Pad17)")
  (net 71 "CH1_PWM")
  (net 72 "CH2_PWM")
  (net 73 "CH3_PWM")
  (net 74 "CH4_PWM")
  (net 75 "unconnected-(U3-Pad25)")
  (net 76 "unconnected-(U3-Pad27)")
  (net 77 "CH6_PWM")
  (net 78 "CH5_PWM")
  (net 79 "unconnected-(U3-Pad32)")
  (net 80 "/fiatlux_cc48_channel_driver5/DRI_SOURCE")
  (net 81 "/fiatlux_cc48_channel_driver4/DRI_SOURCE")
  (net 82 "/fiatlux_cc48_channel_driver6/DRI_SOURCE")
  (net 83 "/fiatlux_cc48_channel_driver2/DRI_GATE")
  (net 84 "/fiatlux_cc48_channel_driver1/DRI_GATE")
  (net 85 "/fiatlux_cc48_channel_driver3/DRI_GATE")
  (net 86 "/fiatlux_cc48_channel_driver5/DRI_GATE")
  (net 87 "/fiatlux_cc48_channel_driver4/DRI_GATE")
  (net 88 "/fiatlux_cc48_channel_driver6/DRI_GATE")
  (net 89 "unconnected-(U3-Pad30)")
  (net 90 "unconnected-(U3-Pad31)")
  (net 91 "unconnected-(U3-Pad14)")
  (net 92 "unconnected-(U3-Pad15)")
  (net 93 "unconnected-(U3-Pad7)")
  (net 94 "Net-(C19-Pad1)")
  (net 95 "Net-(C25-Pad1)")
  (net 96 "Net-(C31-Pad1)")
  (net 97 "Net-(C37-Pad1)")
  (net 98 "Net-(C43-Pad1)")
  (net 99 "Net-(R13-Pad1)")
  (net 100 "Net-(R17-Pad1)")
  (net 101 "Net-(R25-Pad1)")
  (net 102 "Net-(R29-Pad1)")

  (footprint "fiatlux:PCD0503" (layer "F.Cu")
    (tedit 0) (tstamp 009ec14e-e28f-414d-b4d6-f22082f5a9e3)
    (at 210.713 73.66 -90)
    (property "LCSC" "C324308")
    (property "Sheetfile" "fiatlux_cc48_channel_driver.kicad_sch")
    (property "Sheetname" "fiatlux_cc48_channel_driver3")
    (path "/0f2c710f-e0cf-4531-985d-317b699b8a1b/c4a8317f-0ec5-42b5-bb36-e799c3b9465f")
    (attr smd)
    (fp_text reference "L3" (at 0 -3.81 -90 unlocked) (layer "F.SilkS")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp f39a3bf3-dd1f-40cf-82c7-a312661d3c3a)
    )
    (fp_text value "330µ" (at 0 0 -90 unlocked) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp f6ec26b7-acdf-4190-be71-fbebcfbdf2f8)
    )
    (fp_text user "${REFERENCE}" (at 0 3.81 -90 unlocked) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp cdc01ccf-a8ed-4f13-803c-ba574a4b6756)
    )
    (pad "1" smd rect (at 0 -1.925 270) (size 5.5 2.15) (layers "F.Cu" "F.Paste" "F.Mask")
      (net 21 "/fiatlux_cc48_channel_driver3/OUT-") (pinfunction "1") (pintype "passive") (tstamp 18566a09-3ebe-4482-b1b2-fc653ada4444))
    (pad "2" smd rect (at 0 1.925 270) (size 5.5 2.15) (layers "F.Cu" "F.Paste" "F.Mask")
      (net 43 "/fiatlux_cc48_channel_driver3/DRI_SOURCE") (pinfunction "2") (pintype "passive") (tstamp c38cd726-e869-4e53-b00c-56f4f817a8c1))
  )

  (footprint "TerminalBlock:TerminalBlock_bornier-2_P5.08mm" (layer "F.Cu")
    (tedit 59FF03AB) (tstamp 06e5fdcb-b2e1-4a49-882f-a83d55e4d87d)
    (at 224.917 90.17 90)
    (descr "simple 2-pin terminal block, pitch 5.08mm, revamped version of bornier2")
    (tags "terminal block bornier2")
    (property "Sheetfile" "fiatlux_cc48.kicad_sch")
    (property "Sheetname" "")
    (path "/1f07e96b-c733-4c6f-8c9e-608a3ee7f6de")
    (attr through_hole)
    (fp_text reference "J6" (at 8.636 0 180) (layer "F.SilkS")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp 6a8db11d-eb2a-4790-867b-dccfe3708fb3)
    )
    (fp_text value "Conn_01x02_Male" (at 2.54 5.08 90) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp 6e264b0c-9e59-4bd7-9027-2efc77d4efe4)
    )
    (fp_text user "${REFERENCE}" (at 2.54 0 90) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp f049aa5b-8ea7-4439-8089-e4f6c3f15bb3)
    )
    (fp_line (start 7.62 3.81) (end 7.62 -3.81) (layer "F.SilkS") (width 0.12) (tstamp 4ec5857f-f7a5-4874-8b51-2350f1586b80))
    (fp_line (start -2.54 3.81) (end 7.62 3.81) (layer "F.SilkS") (width 0.12) (tstamp 5752eee8-c887-44d6-ad69-68ade24c9d15))
    (fp_line (start 7.62 -3.81) (end -2.54 -3.81) (layer "F.SilkS") (width 0.12) (tstamp 71eafd37-d5fe-4d92-ba1c-8bc60fddba4f))
    (fp_line (start -2.54 -3.81) (end -2.54 3.81) (layer "F.SilkS") (width 0.12) (tstamp c07cbfab-a727-48a5-9c5a-b1052092ba6e))
    (fp_line (start 7.62 2.54) (end -2.54 2.54) (layer "F.SilkS") (width 0.12) (tstamp dd3e1a66-bab5-4a97-ba89-feb2cc0132b2))
    (fp_line (start -2.71 -4) (end 7.79 -4) (layer "F.CrtYd") (width 0.05) (tstamp 16d4c1a5-776b-4189-86ee-90b7faf5a2a4))
    (fp_line (start 7.79 4) (end 7.79 -4) (layer "F.CrtYd") (width 0.05) (tstamp 828a583e-cb33-4ecb-861b-475bc4fb6d8a))
    (fp_line (start 7.79 4) (end -2.71 4) (layer "F.CrtYd") (width 0.05) (tstamp 9e7484a8-4109-4fce-ab10-3f9829f8a6ee))
    (fp_line (start -2.71 -4) (end -2.71 4) (layer "F.CrtYd") (width 0.05) (tstamp c71d6bf9-1656-497a-ad7c-ae8572011425))
    (fp_line (start -2.46 -3.75) (end -2.46 3.75) (layer "F.Fab") (width 0.1) (tstamp 1ac48b89-49a0-46e7-bac2-6525df78f0ed))
    (fp_line (start 7.54 -3.75) (end -2.46 -3.75) (layer "F.Fab") (width 0.1) (tstamp 20cd96f1-d4a8-4acb-b548-5797e50ce5e7))
    (fp_line (start -2.41 2.55) (end 7.49 2.55) (layer "F.Fab") (width 0.1) (tstamp 5b0ec543-f6fe-4c1f-9b21-0cef27eeb50d))
    (fp_line (start 7.54 3.75) (end 7.54 -3.75) (layer "F.Fab") (width 0.1) (tstamp 922999f8-975f-4590-83ee-f3435c75e54a))
    (fp_line (start -2.46 3.75) (end 7.54 3.75) (layer "F.Fab") (width 0.1) (tstamp fecc69ff-ffa6-4c61-829d-6556c915e45a))
    (pad "1" thru_hole rect (at 0 0 90) (size 3 3) (drill 1.52) (layers *.Cu *.Mask)
      (net 11 "/fiatlux_cc48_channel_driver2/OUT-") (pinfunction "Pin_1") (pintype "passive") (tstamp fb7149e3-67c2-401d-b26b-b650007f58c5))
    (pad "2" thru_hole circle (at 5.08 0 90) (size 3 3) (drill 1.52) (layers *.Cu *.Mask)
      (net 10 "/fiatlux_cc48_channel_driver2/OUT+") (pinfunction "Pin_2") (pintype "passive") (tstamp 240a2e69-6b53-4741-a7cb-045100f434e1))
    (model "${KICAD6_3DMODEL_DIR}/TerminalBlock.3dshapes/TerminalBlock_bornier-2_P5.08mm.wrl"
      (offset (xyz 2.539999962 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (footprint "Capacitor_SMD:C_0805_2012Metric" (layer "F.Cu")
    (tedit 5F68FEEE) (tstamp 07362170-1fce-4ded-87cc-e31b4ae06325)
    (at 183.515 110.236 180)
    (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
    (tags "capacitor")
    (property "Sheetfile" "fiatlux_cc48_channel_driver.kicad_sch")
    (property "Sheetname" "fiatlux_cc48_channel_driver1")
    (path "/ec392c76-0785-4274-a56a-aeb995601b34/51c873db-0602-4fbf-b5f8-9bb8f65d1d74")
    (attr smd)
    (fp_text reference "C15" (at 3.429 0) (layer "F.SilkS")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp 7c0bee2e-f9cb-44db-a4a5-6afab609ea93)
    )
    (fp_text value "4µ7" (at 0 1.68) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp 886d9a68-774a-4f6a-b329-23273de087b1)
    )
    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
      (effects (font (size 0.5 0.5) (thickness 0.08)))
      (tstamp b494e1ef-1f90-4321-8299-7c97112b0a23)
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    (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 6bb03ee7-4b4d-4ae7-918e-9f97f8365d0e))
    (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer "F.SilkS") (width 0.12) (tstamp b60cea43-0b34-4bca-b33b-d671bb478b6d))
    (fp_line (start 1.7 -0.98) (end 1.7 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 16ad8d21-33e3-42cb-9b38-0df97e6a5f1e))
    (fp_line (start -1.7 -0.98) (end 1.7 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp 5cf0794f-8b26-4066-a6c1-a6eb34abf22c))
    (fp_line (start -1.7 0.98) (end -1.7 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp 6ed7653f-0ec4-4b05-bc5a-4b20756d8e1d))
    (fp_line (start 1.7 0.98) (end -1.7 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 7b84d7cb-481e-4ce4-9161-b78f90c20424))
    (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 03614592-01f6-4fc8-b03b-8c9a975138bc))
    (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp 048386cf-b6ee-45fa-a405-613671aba7ed))
    (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 930d6228-c74a-4b5b-806a-a9328b5ff06b))
    (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp ddfce288-279b-4929-8165-d8fc369618e2))
    (pad "1" smd roundrect (at -0.95 0 180) (size 1 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
      (net 12 "/fiatlux_cc48_channel_driver1/DRI_DIM") (pintype "passive") (tstamp 1954a6c2-875a-4cf1-b887-456038dd6264))
    (pad "2" smd roundrect (at 0.95 0 180) (size 1 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
      (net 2 "GND") (pintype "passive") (tstamp e06e13d4-498b-425d-9814-7fc28c393e85))
    (model "${KICAD6_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (footprint "Capacitor_SMD:C_0603_1608Metric" (layer "F.Cu")
    (tedit 5F68FEEE) (tstamp 0788b736-f886-45db-be4a-9f2be7d89378)
    (at 194.31 81.026 -90)
    (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
    (tags "capacitor")
    (property "Sheetfile" "fiatlux_cc48_channel_driver.kicad_sch")
    (property "Sheetname" "fiatlux_cc48_channel_driver3")
    (path "/0f2c710f-e0cf-4531-985d-317b699b8a1b/f3c33fd9-092c-4652-9339-310cf6da105a")
    (attr smd)
    (fp_text reference "C25" (at 0 -1.43 90) (layer "F.SilkS") hide
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp a4715961-0a5b-49b4-a086-ee562ce1c9eb)
    )
    (fp_text value "10p" (at 0 1.43 90) (layer "F.Fab")
      (effects (font (size 1 1) (thickness 0.15)))
      (tstamp 9287d9e2-cbb6-4d43-842d-13771ed3d881)
    )
    (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
      (effects (font (size 0.4 0.4) (thickness 0.06)))
      (tstamp 7afd289e-f1ce-4b30-a729-7e5b821112c8)
    )
    (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer "F.SilkS") (width 0.12) (tstamp 63b4c631-90c3-4424-9051-dbac475ca55c))
    (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer "F.SilkS") (width 0.12) (tstamp 6f8d100e-dbc9-4c91-b529-298b0b54b150))
    (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer "F.CrtYd") (width 0.05) (tstamp 0916da97-0efc-4c8d-8606-2d83ec23e2a5))
    (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer "F.CrtYd") (width 0.05) (tstamp 4bcbcaee-89f8-425b-8c6c-58ff460af0a2))
    (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer "F.CrtYd") (width 0.05) (tstamp b248643f-60e8-4f03-b832-632e40f10825))
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