(kicad_pcb (version 20211014) (generator pcbnew) (general (thickness 1.6) ) (paper "A4") (layers (0 "F.Cu" signal) (31 "B.Cu" signal) (32 "B.Adhes" user "B.Adhesive") (33 "F.Adhes" user "F.Adhesive") (34 "B.Paste" user) (35 "F.Paste" user) (36 "B.SilkS" user "B.Silkscreen") (37 "F.SilkS" user "F.Silkscreen") (38 "B.Mask" user) (39 "F.Mask" user) (40 "Dwgs.User" user "User.Drawings") (41 "Cmts.User" user "User.Comments") (42 "Eco1.User" user "User.Eco1") (43 "Eco2.User" user "User.Eco2") (44 "Edge.Cuts" user) (45 "Margin" user) (46 "B.CrtYd" user "B.Courtyard") (47 "F.CrtYd" user "F.Courtyard") (48 "B.Fab" user) (49 "F.Fab" user) (50 "User.1" user "Nutzer.1") (51 "User.2" user "Nutzer.2") (52 "User.3" user "Nutzer.3") (53 "User.4" user "Nutzer.4") (54 "User.5" user "Nutzer.5") (55 "User.6" user "Nutzer.6") (56 "User.7" user "Nutzer.7") (57 "User.8" user "Nutzer.8") (58 "User.9" user "Nutzer.9") ) (setup (stackup (layer "F.SilkS" (type "Top Silk Screen")) (layer "F.Paste" (type "Top Solder Paste")) (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) (layer "F.Cu" (type "copper") (thickness 0.035)) (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) (layer "B.Cu" (type "copper") (thickness 0.035)) (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) (layer "B.Paste" (type "Bottom Solder Paste")) (layer "B.SilkS" (type "Bottom Silk Screen")) (copper_finish "None") (dielectric_constraints no) ) (pad_to_mask_clearance 0) (grid_origin 167.894 27.686) (pcbplotparams (layerselection 0x00010fc_ffffffff) (disableapertmacros false) (usegerberextensions false) (usegerberattributes true) (usegerberadvancedattributes true) (creategerberjobfile true) (svguseinch false) (svgprecision 6) (excludeedgelayer true) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) (dxfpolygonmode true) (dxfimperialunits true) (dxfusepcbnewfont true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) (sketchpadsonfab false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "") ) ) (net 0 "") (net 1 "+3V3") (net 2 "GND") (net 3 "~{BUSRST}") (net 4 "Net-(C4-Pad1)") (net 5 "Net-(C8-Pad1)") (net 6 "/fiatlux_cc48_channel_driver2/DRI_DIM") (net 7 "+48V") (net 8 "/fiatlux_cc48_channel_driver2/DRI_VCC") (net 9 "/fiatlux_cc48_channel_driver2/DRI_COM") (net 10 "/fiatlux_cc48_channel_driver2/OUT+") (net 11 "/fiatlux_cc48_channel_driver2/OUT-") (net 12 "/fiatlux_cc48_channel_driver1/DRI_DIM") (net 13 "/fiatlux_cc48_channel_driver1/DRI_VCC") (net 14 "/fiatlux_cc48_channel_driver1/DRI_COM") (net 15 "/fiatlux_cc48_channel_driver1/OUT+") (net 16 "/fiatlux_cc48_channel_driver1/OUT-") (net 17 "/fiatlux_cc48_channel_driver3/DRI_DIM") (net 18 "/fiatlux_cc48_channel_driver3/DRI_VCC") (net 19 "/fiatlux_cc48_channel_driver3/DRI_COM") (net 20 "/fiatlux_cc48_channel_driver3/OUT+") (net 21 "/fiatlux_cc48_channel_driver3/OUT-") (net 22 "/fiatlux_cc48_channel_driver5/DRI_DIM") (net 23 "/fiatlux_cc48_channel_driver5/DRI_VCC") (net 24 "/fiatlux_cc48_channel_driver5/DRI_COM") (net 25 "/fiatlux_cc48_channel_driver5/OUT+") (net 26 "/fiatlux_cc48_channel_driver5/OUT-") (net 27 "Net-(D1-Pad2)") (net 28 "ACT_LED") (net 29 "Net-(D3-Pad2)") (net 30 "/fiatlux_cc48_channel_driver4/DRI_DIM") (net 31 "/fiatlux_cc48_channel_driver4/DRI_VCC") (net 32 "/fiatlux_cc48_channel_driver4/DRI_COM") (net 33 "/fiatlux_cc48_channel_driver4/OUT+") (net 34 "/fiatlux_cc48_channel_driver4/OUT-") (net 35 "SWIM") (net 36 "/fiatlux_cc48_channel_driver6/DRI_DIM") (net 37 "/fiatlux_cc48_channel_driver6/DRI_VCC") (net 38 "/fiatlux_cc48_channel_driver6/DRI_COM") (net 39 "/fiatlux_cc48_channel_driver6/OUT+") (net 40 "/fiatlux_cc48_channel_driver6/OUT-") (net 41 "/fiatlux_cc48_channel_driver2/DRI_SOURCE") (net 42 "/fiatlux_cc48_channel_driver1/DRI_SOURCE") (net 43 "/fiatlux_cc48_channel_driver3/DRI_SOURCE") (net 44 "DAC_SYNC") (net 45 "Net-(R2-Pad2)") (net 46 "SCLK") (net 47 "Net-(R3-Pad2)") (net 48 "MOSI") (net 49 "Net-(R4-Pad2)") (net 50 "MISO") (net 51 "Net-(R5-Pad2)") (net 52 "CH2_DIM") (net 53 "Net-(R9-Pad1)") (net 54 "CH1_DIM") (net 55 "CH3_DIM") (net 56 "CH5_DIM") (net 57 "CH4_DIM") (net 58 "Net-(R21-Pad1)") (net 59 "CH6_DIM") (net 60 "Net-(C13-Pad1)") (net 61 "unconnected-(U2-Pad11)") (net 62 "unconnected-(U2-Pad12)") (net 63 "INIT_{IN}") (net 64 "~{INT}") (net 65 "INIT_{OUT}") (net 66 "unconnected-(U3-Pad9)") (net 67 "SW_SCLK") (net 68 "SW_MOSI") (net 69 "SW_MISO") (net 70 "unconnected-(U3-Pad17)") (net 71 "CH1_PWM") (net 72 "CH2_PWM") (net 73 "CH3_PWM") (net 74 "CH4_PWM") (net 75 "unconnected-(U3-Pad25)") (net 76 "unconnected-(U3-Pad27)") (net 77 "CH6_PWM") (net 78 "CH5_PWM") (net 79 "unconnected-(U3-Pad32)") (net 80 "/fiatlux_cc48_channel_driver5/DRI_SOURCE") (net 81 "/fiatlux_cc48_channel_driver4/DRI_SOURCE") (net 82 "/fiatlux_cc48_channel_driver6/DRI_SOURCE") (net 83 "/fiatlux_cc48_channel_driver2/DRI_GATE") (net 84 "/fiatlux_cc48_channel_driver1/DRI_GATE") (net 85 "/fiatlux_cc48_channel_driver3/DRI_GATE") (net 86 "/fiatlux_cc48_channel_driver5/DRI_GATE") (net 87 "/fiatlux_cc48_channel_driver4/DRI_GATE") (net 88 "/fiatlux_cc48_channel_driver6/DRI_GATE") (net 89 "unconnected-(U3-Pad30)") (net 90 "unconnected-(U3-Pad31)") (net 91 "unconnected-(U3-Pad14)") (net 92 "unconnected-(U3-Pad15)") (net 93 "unconnected-(U3-Pad7)") (net 94 "Net-(C19-Pad1)") (net 95 "Net-(C25-Pad1)") (net 96 "Net-(C31-Pad1)") (net 97 "Net-(C37-Pad1)") (net 98 "Net-(C43-Pad1)") (net 99 "Net-(R13-Pad1)") (net 100 "Net-(R17-Pad1)") (net 101 "Net-(R25-Pad1)") (net 102 "Net-(R29-Pad1)") (footprint "fiatlux:PCD0503" (layer "F.Cu") (tedit 0) (tstamp 009ec14e-e28f-414d-b4d6-f22082f5a9e3) (at 213.36 73.66 180) (property "LCSC" "C324308") (property "Sheetfile" "fiatlux_cc48_channel_driver.kicad_sch") (property "Sheetname" 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