stash

.build.yml

@@ -25,7 +25,8 @@ steps:
   commands:
   - apt update
   - apt install -y make zip
-  - make pcb -j$(nproc)
+  - make pcb -j$(nproc) BOARD=fiatlux
+  - make pcb -j$(nproc) BOARD=fiatlux_cc48
 
 - name: case
   image: debian:sid
@@ -60,7 +61,8 @@ steps:
     files: 
       - firmware/firmware/fiatlux.bin
       - firmware/otaflash.py
-      - pcb/pcb.zip
+      - pcb/fiatlux_pcb.zip
+      - pcb/fiatlux_cc48_pcb.zip
     checksum:
       - sha512
       - md5

pcb/.gitignore

@@ -16,6 +16,7 @@ _autosave-*
 *-save.pro
 *-save.kicad_pcb
 fp-info-cache
+*-backups/
 
 # Netlist files (exported from Eeschema)
 *.net

pcb/Makefile

@@ -1,52 +1,54 @@
-.NOTPARALLEL:  gen/fab/fiatlux-F_Cu.gbr gen/fab/fiatlux-B_Cu.gbr gen/fab/fiatlux-F_Mask.gbr gen/fab/fiatlux-B_Mask.gbr  gen/fab/fiatlux-F_Paste.gbr gen/fab/fiatlux-B_Paste.gbr gen/fab/fiatlux-F_SilkS.gbr gen/fab/fiatlux-B_SilkS.gbr
+.NOTPARALLEL:  gen/fab/$(BOARD)-F_Cu.gbr gen/fab/$(BOARD)-B_Cu.gbr gen/fab/$(BOARD)-F_Mask.gbr gen/fab/$(BOARD)-B_Mask.gbr  gen/fab/$(BOARD)-F_Paste.gbr gen/fab/$(BOARD)-B_Paste.gbr gen/fab/$(BOARD)-F_SilkS.gbr gen/fab/$(BOARD)-B_SilkS.gbr
 
-all: test fab doc pcb.zip
+all: test fab doc pcb
 
-pcb.zip: fab doc
+test: gen/$(BOARD)-drc.txt gen/$(BOARD)-erc.txt
+
+pcb: $(BOARD)_pcb.zip
+
+doc: gen/$(BOARD).pdf gen/$(BOARD)-front.svg gen/$(BOARD)-back.svg
+
+fab: test gen/$(BOARD)_fab.zip gen/$(BOARD).csv gen/$(BOARD)-top-pos.csv
+
+$(BOARD)_pcb.zip: fab doc
 	@mkdir -p gen
-	@cd gen; zip -r ../pcb.zip fab.zip fiatlux.csv fiatlux-top-pos.csv fiatlux-front.svg fiatlux-back.svg fiatlux.pdf
+	cd gen; zip -r ../$(BOARD)_pcb.zip $(BOARD)_fab.zip $(BOARD).csv $(BOARD)-top-pos.csv $(BOARD)-front.svg $(BOARD)-back.svg $(BOARD).pdf
-	@cd gen; zip -r ../debug.zip .
+	cd gen; zip -r ../$(BOARD)_debug.zip .
 
-test: gen/fiatlux-drc.txt gen/fiatlux-erc.txt
+gen/$(BOARD)_fab.zip: gen/fab/$(BOARD)-F_Cu.gbr gen/fab/$(BOARD)-B_Cu.gbr gen/fab/$(BOARD)-F_Mask.gbr gen/fab/$(BOARD)-B_Mask.gbr
-
+gen/$(BOARD)_fab.zip: gen/fab/$(BOARD)-F_Paste.gbr gen/fab/$(BOARD)-B_Paste.gbr gen/fab/$(BOARD)-F_SilkS.gbr gen/fab/$(BOARD)-B_SilkS.gbr
-doc: gen/fiatlux.pdf gen/fiatlux-front.svg gen/fiatlux-back.svg
-
-fab: test gen/fab.zip gen/fiatlux.csv gen/fiatlux-top-pos.csv
-
-gen/fab.zip: gen/fab/fiatlux-F_Cu.gbr gen/fab/fiatlux-B_Cu.gbr gen/fab/fiatlux-F_Mask.gbr gen/fab/fiatlux-B_Mask.gbr
-gen/fab.zip: gen/fab/fiatlux-F_Paste.gbr gen/fab/fiatlux-B_Paste.gbr gen/fab/fiatlux-F_SilkS.gbr gen/fab/fiatlux-B_SilkS.gbr
 	@mkdir -p gen/fab
-	@cd gen/fab; zip -r ../fab.zip *.gbr
+	cd gen/fab; zip -r ../$(BOARD)_fab.zip *.gbr
 
-gen/fiatlux-erc.txt:  fiatlux.kiplot.yaml fiatlux.pro fiatlux.kicad_pcb
+gen/$(BOARD)-erc.txt:  $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_pcb
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s update_xml,run_drc -i
+	kibot -d gen -c $(BOARD).kiplot.yaml -s update_xml,run_drc -i
 
-gen/fiatlux-drc.txt:  fiatlux.kiplot.yaml fiatlux.pro fiatlux.sch
+gen/$(BOARD)-drc.txt:  $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_sch
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s update_xml,run_erc -i
+	kibot -d gen -c $(BOARD).kiplot.yaml -s update_xml,run_erc -i
 
-gen/fab/%.gbr: fiatlux.kiplot.yaml fiatlux.pro fiatlux.kicad_pcb
+gen/fab/%.gbr: $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_pcb
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s all print_front gerbers
+	kibot -d gen -c $(BOARD).kiplot.yaml -s all print_front gerbers
 
-gen/fiatlux-top-pos.csv: fiatlux.kiplot.yaml fiatlux.pro fiatlux.kicad_pcb
+gen/$(BOARD)-top-pos.csv: $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_pcb
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s all print_front position
+	kibot -d gen -c $(BOARD).kiplot.yaml -s all print_front position
 
-gen/fiatlux.csv: fiatlux.kiplot.yaml fiatlux.pro fiatlux.kicad_pcb
+gen/$(BOARD).csv: $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_pcb
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s all print_front bom
+	kibot -d gen -c $(BOARD).kiplot.yaml -s all print_front bom
 
-gen/fiatlux.pdf: fiatlux.kiplot.yaml fiatlux.pro fiatlux.sch
+gen/$(BOARD).pdf: $(BOARD).kiplot.yaml $(BOARD).kicad_pro $(BOARD).kicad_sch
 	@mkdir -p gen
-	kibot -d gen -c fiatlux.kiplot.yaml -s run_drc,run_erc print_sch
+	kibot -d gen -c $(BOARD).kiplot.yaml -s run_drc,run_erc print_sch
 
-gen/fiatlux-front.svg: fiatlux.kicad_pcb
+gen/$(BOARD)-front.svg: $(BOARD).kicad_pcb
 	@mkdir -p gen
 	pcbdraw --libs default $< $@
 
-gen/fiatlux-back.svg: fiatlux.kicad_pcb
+gen/$(BOARD)-back.svg: $(BOARD).kicad_pcb
 	@mkdir -p gen
 	pcbdraw --libs default --back $< $@
 

pcb/bus_node.kicad_sch

@@ -0,0 +1,525 @@
+(kicad_sch (version 20211123) (generator eeschema)
+
+  (uuid 0a742bb2-0657-47bc-9dea-e70308e1113a)
+
+  (paper "A4")
+
+  (lib_symbols
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+        (effects (font (size 1.27 1.27)) (justify left))
+      )
+      (property "Value" "C_Polarized" (id 1) (at 0.635 -2.54 0)
+        (effects (font (size 1.27 1.27)) (justify left))
+      )
+      (property "Footprint" "" (id 2) (at 0.9652 -3.81 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "Datasheet" "~" (id 3) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_keywords" "cap capacitor" (id 4) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_description" "Polarized capacitor" (id 5) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_fp_filters" "CP_*" (id 6) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (symbol "C_Polarized_0_1"
+        (rectangle (start -2.286 0.508) (end 2.286 1.016)
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+        )
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+          (fill (type outline))
+        )
+      )
+      (symbol "C_Polarized_1_1"
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+          (number "1" (effects (font (size 1.27 1.27))))
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+        (pin passive line (at 0 -3.81 90) (length 2.794)
+          (name "~" (effects (font (size 1.27 1.27))))
+          (number "2" (effects (font (size 1.27 1.27))))
+        )
+      )
+    )
+    (symbol "MCU_ST_STM8:STM8S003F3U" (in_bom yes) (on_board yes)
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+        (effects (font (size 1.27 1.27)) (justify left))
+      )
+      (property "Value" "STM8S003F3U" (id 1) (at 1.27 22.86 0)
+        (effects (font (size 1.27 1.27)) (justify left))
+      )
+      (property "Footprint" "Package_DFN_QFN:ST_UFQFPN-20_3x3mm_P0.5mm" (id 2) (at 1.27 27.94 0)
+        (effects (font (size 1.27 1.27)) (justify left) hide)
+      )
+      (property "Datasheet" "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00024550.pdf" (id 3) (at -1.27 -10.16 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_keywords" "STM8S Mainstream Value line 8-bit, 16MHz, 1k RAM, 128 EEPROM" (id 4) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_description" "16MHz, 8K Flash, 1K RAM, 128 EEPROM, USART, I²C, SPI, UFQFPN-20" (id 5) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_fp_filters" "ST?UFQFPN*3x3mm*P0.5mm*" (id 6) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (symbol "STM8S003F3U_0_1"
+        (rectangle (start -11.43 21.59) (end 11.43 -21.59)
+          (stroke (width 0.254) (type default) (color 0 0 0 0))
+          (fill (type background))
+        )
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+      (symbol "STM8S003F3U_1_1"
+        (pin input line (at -15.24 -15.24 0) (length 3.81)
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+        )
+        (pin bidirectional line (at -15.24 0 0) (length 3.81)
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+          (number "10" (effects (font (size 1.27 1.27))))
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+        (pin bidirectional line (at -15.24 -2.54 0) (length 3.81)
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+          (number "11" (effects (font (size 1.27 1.27))))
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+        (pin bidirectional line (at -15.24 -5.08 0) (length 3.81)
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+        (pin bidirectional line (at -15.24 -7.62 0) (length 3.81)
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+          (number "13" (effects (font (size 1.27 1.27))))
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+        (pin bidirectional line (at -15.24 -10.16 0) (length 3.81)
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+        )
+      )
+    )
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+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.25,
+      "pin_symbol_size": 0.0,
+      "text_offset_ratio": 0.08
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "Pcbnew",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_external_command": "spice \"%I\"",
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "814763c2-92e5-4a2c-941c-9bbd073f6e87",
+      ""
+    ],
+    [
+      "00000000-0000-0000-0000-00006078273a",
+      "Power"
+    ],
+    [
+      "704d02d9-6cb6-48ad-b961-61eafd0de7c6",
+      "Ext-IO"
+    ],
+    [
+      "599586a3-9dc2-4d0b-adc6-1c8befb3d77e",
+      "Frontseat_stm32g031g"
+    ]
+  ],
+  "text_variables": {}
+}

pcb/fiatlux.kicad_sym

@@ -0,0 +1,136 @@
+(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
+  (symbol "STM32G031G8Ux" (in_bom yes) (on_board yes)
+    (property "Reference" "U" (id 0) (at 2.54 -21.59 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Value" "STM32G031G8Ux" (id 1) (at 2.54 -24.13 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Footprint" "Package_DFN_QFN:QFN-28_4x4mm_P0.5mm" (id 2) (at 24.13 -26.67 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "Datasheet" "" (id 3) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (symbol "STM32G031G8Ux_0_1"
+      (rectangle (start -10.16 19.05) (end 10.16 -19.05)
+        (stroke (width 0) (type default) (color 0 0 0 0))
+        (fill (type background))
+      )
+    )
+    (symbol "STM32G031G8Ux_1_1"
+      (pin bidirectional line (at -12.7 11.43 0) (length 2.54)
+        (name "PC14" (effects (font (size 1.27 1.27))))
+        (number "1" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 6.35 180) (length 2.54)
+        (name "PA4" (effects (font (size 1.27 1.27))))
+        (number "10" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 3.81 180) (length 2.54)
+        (name "PA5" (effects (font (size 1.27 1.27))))
+        (number "11" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 1.27 180) (length 2.54)
+        (name "PA6" (effects (font (size 1.27 1.27))))
+        (number "12" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -1.27 180) (length 2.54)
+        (name "PA7" (effects (font (size 1.27 1.27))))
+        (number "13" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 1.27 0) (length 2.54)
+        (name "PB0" (effects (font (size 1.27 1.27))))
+        (number "14" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -1.27 0) (length 2.54)
+        (name "PB1" (effects (font (size 1.27 1.27))))
+        (number "15" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -3.81 180) (length 2.54)
+        (name "PA8" (effects (font (size 1.27 1.27))))
+        (number "16" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 6.35 0) (length 2.54)
+        (name "PC6" (effects (font (size 1.27 1.27))))
+        (number "17" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -6.35 180) (length 2.54)
+        (name "PA11" (effects (font (size 1.27 1.27))))
+        (number "18" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -8.89 180) (length 2.54)
+        (name "PA12" (effects (font (size 1.27 1.27))))
+        (number "19" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 8.89 0) (length 2.54)
+        (name "PC15" (effects (font (size 1.27 1.27))))
+        (number "2" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -11.43 180) (length 2.54)
+        (name "PA13" (effects (font (size 1.27 1.27))))
+        (number "20" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -13.97 180) (length 2.54)
+        (name "PA14" (effects (font (size 1.27 1.27))))
+        (number "21" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 -16.51 180) (length 2.54)
+        (name "PA15" (effects (font (size 1.27 1.27))))
+        (number "22" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -3.81 0) (length 2.54)
+        (name "PB3" (effects (font (size 1.27 1.27))))
+        (number "23" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -6.35 0) (length 2.54)
+        (name "PB4" (effects (font (size 1.27 1.27))))
+        (number "24" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -8.89 0) (length 2.54)
+        (name "PB5" (effects (font (size 1.27 1.27))))
+        (number "25" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -11.43 0) (length 2.54)
+        (name "PB6" (effects (font (size 1.27 1.27))))
+        (number "26" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -13.97 0) (length 2.54)
+        (name "PB7" (effects (font (size 1.27 1.27))))
+        (number "27" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at -12.7 -16.51 0) (length 2.54)
+        (name "PB8" (effects (font (size 1.27 1.27))))
+        (number "28" (effects (font (size 1.27 1.27))))
+      )
+      (pin power_in line (at 0 21.59 270) (length 2.54)
+        (name "VDD" (effects (font (size 1.27 1.27))))
+        (number "3" (effects (font (size 1.27 1.27))))
+      )
+      (pin power_in line (at 0 -21.59 90) (length 2.54)
+        (name "VSS" (effects (font (size 1.27 1.27))))
+        (number "4" (effects (font (size 1.27 1.27))))
+      )
+      (pin input line (at -12.7 16.51 0) (length 2.54)
+        (name "NRST" (effects (font (size 1.27 1.27))))
+        (number "5" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 16.51 180) (length 2.54)
+        (name "PA0" (effects (font (size 1.27 1.27))))
+        (number "6" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 13.97 180) (length 2.54)
+        (name "PA1" (effects (font (size 1.27 1.27))))
+        (number "7" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 11.43 180) (length 2.54)
+        (name "PA2" (effects (font (size 1.27 1.27))))
+        (number "8" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 12.7 8.89 180) (length 2.54)
+        (name "PA3" (effects (font (size 1.27 1.27))))
+        (number "9" (effects (font (size 1.27 1.27))))
+      )
+    )
+  )
+)

pcb/fiatlux.kiplot.yaml

@@ -8,6 +8,23 @@ preflight:
   run_drc: true
   check_zone_fills: false
   ignore_unconnected: false
+  filters:
+    - error: 'courtyards_overlap'
+      regex: '((?s)J4(.*)J13)|((?s)J13(.*)J21)|((?s)J2(.*)J15)|((?s)J2(.*)J4)'
+    - error: 'courtyards_overlap'
+      regex: '(?s)J3(.*)J12'
+    - error: 'clearance'
+      regex: '(.*)no net(.*) of J1'
+
+global:
+  filters:
+    - error: 'courtyards_overlap'
+      regex: '((?s)J4(.*)J13)|((?s)J13(.*)J21)|((?s)J2(.*)J15)|((?s)J2(.*)J4)'
+    - error: 'courtyards_overlap'
+      regex: '(?s)J3(.*)J12'
+    - error: 'clearance'
+      regex: '(.*)no net(.*) of J1'
+    - error: 'silk_overlap'
 
 # global:
 #   kiauto_wait_start: 60

pcb/fiatlux.pro

@@ -1,252 +0,0 @@
-update=Mo 12 Jul 2021 16:48:53 CEST
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-[schematic_editor]
-version=1
-PageLayoutDescrFile=
-PlotDirectoryName=
-SubpartIdSeparator=0
-SubpartFirstId=65
-NetFmtName=Pcbnew
-SpiceAjustPassiveValues=0
-LabSize=50
-ERC_TestSimilarLabels=1
-[pcbnew]
-version=1
-PageLayoutDescrFile=
-LastNetListRead=fiatlux.net
-CopperLayerCount=2
-BoardThickness=1.6
-AllowMicroVias=0
-AllowBlindVias=0
-RequireCourtyardDefinitions=0
-ProhibitOverlappingCourtyards=1
-MinTrackWidth=0.2
-MinViaDiameter=0.4
-MinViaDrill=0.3
-MinMicroViaDiameter=0.2
-MinMicroViaDrill=0.09999999999999999
-MinHoleToHole=0.25
-TrackWidth1=0.25
-TrackWidth2=0.25
-TrackWidth3=0.5
-TrackWidth4=1
-TrackWidth5=2
-ViaDiameter1=0.8
-ViaDrill1=0.4
-dPairWidth1=0.2
-dPairGap1=0.25
-dPairViaGap1=0.25
-SilkLineWidth=0.15
-SilkTextSizeV=1
-SilkTextSizeH=1
-SilkTextSizeThickness=0.15
-SilkTextItalic=0
-SilkTextUpright=1
-CopperLineWidth=0.2
-CopperTextSizeV=1.5
-CopperTextSizeH=1.5
-CopperTextThickness=0.3
-CopperTextItalic=0
-CopperTextUpright=1
-EdgeCutLineWidth=0.09999999999999999
-CourtyardLineWidth=0.05
-OthersLineWidth=0.15
-OthersTextSizeV=1
-OthersTextSizeH=1
-OthersTextSizeThickness=0.15
-OthersTextItalic=0
-OthersTextUpright=1
-SolderMaskClearance=0
-SolderMaskMinWidth=0
-SolderPasteClearance=0
-SolderPasteRatio=-0
-[pcbnew/Layer.F.Cu]
-Name=F.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In1.Cu]
-Name=In1.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In2.Cu]
-Name=In2.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In3.Cu]
-Name=In3.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In4.Cu]
-Name=In4.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In5.Cu]
-Name=In5.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In6.Cu]
-Name=In6.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In7.Cu]
-Name=In7.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In8.Cu]
-Name=In8.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In9.Cu]
-Name=In9.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In10.Cu]
-Name=In10.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In11.Cu]
-Name=In11.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In12.Cu]
-Name=In12.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In13.Cu]
-Name=In13.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In14.Cu]
-Name=In14.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In15.Cu]
-Name=In15.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In16.Cu]
-Name=In16.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In17.Cu]
-Name=In17.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In18.Cu]
-Name=In18.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In19.Cu]
-Name=In19.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In20.Cu]
-Name=In20.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In21.Cu]
-Name=In21.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In22.Cu]
-Name=In22.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In23.Cu]
-Name=In23.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In24.Cu]
-Name=In24.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In25.Cu]
-Name=In25.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In26.Cu]
-Name=In26.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In27.Cu]
-Name=In27.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In28.Cu]
-Name=In28.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In29.Cu]
-Name=In29.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In30.Cu]
-Name=In30.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.B.Cu]
-Name=B.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.B.Adhes]
-Enabled=1
-[pcbnew/Layer.F.Adhes]
-Enabled=1
-[pcbnew/Layer.B.Paste]
-Enabled=1
-[pcbnew/Layer.F.Paste]
-Enabled=1
-[pcbnew/Layer.B.SilkS]
-Enabled=1
-[pcbnew/Layer.F.SilkS]
-Enabled=1
-[pcbnew/Layer.B.Mask]
-Enabled=1
-[pcbnew/Layer.F.Mask]
-Enabled=1
-[pcbnew/Layer.Dwgs.User]
-Enabled=1
-[pcbnew/Layer.Cmts.User]
-Enabled=1
-[pcbnew/Layer.Eco1.User]
-Enabled=1
-[pcbnew/Layer.Eco2.User]
-Enabled=1
-[pcbnew/Layer.Edge.Cuts]
-Enabled=1
-[pcbnew/Layer.Margin]
-Enabled=1
-[pcbnew/Layer.B.CrtYd]
-Enabled=1
-[pcbnew/Layer.F.CrtYd]
-Enabled=1
-[pcbnew/Layer.B.Fab]
-Enabled=1
-[pcbnew/Layer.F.Fab]
-Enabled=1
-[pcbnew/Layer.Rescue]
-Enabled=0
-[pcbnew/Netclasses]
-[pcbnew/Netclasses/Default]
-Name=Default
-Clearance=0.127
-TrackWidth=0.25
-ViaDiameter=0.8
-ViaDrill=0.4
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.2
-dPairGap=0.25
-dPairViaGap=0.25

pcb/hw_test/hw_test.kicad_pro

@@ -0,0 +1,436 @@
+{
+  "board": {
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.09999999999999999,
+        "copper_line_width": 0.19999999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.762,
+          "height": 1.524,
+          "width": 1.524
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.508
+        }
+      },
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "copper_edge_clearance": "error",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint_type_mismatch": "error",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zone_has_empty_net": "error",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_copper_edge_clearance": 0.0,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_silk_clearance": 0.0,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.19999999999999998,
+        "min_via_annular_width": 0.049999999999999996,
+        "min_via_diameter": 0.39999999999999997,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "use_height_for_length_calcs": true
+      },
+      "track_widths": [],
+      "via_dimensions": [],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "layer_presets": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
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+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_label_syntax": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "hw_test.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
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+        "bus_width": 12.0,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
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+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.25,
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6.0
+      }
+    ],
+    "meta": {
+      "version": 2
+    },
+    "net_colors": null
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
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+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
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+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_external_command": "spice \"%I\"",
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "416a4216-683d-4c31-9c69-0c1695999893",
+      ""
+    ],
+    [
+      "a6cf2d2a-674b-4985-91c6-5d8a2d438456",
+      "Frontseat_stm32g031g1"
+    ],
+    [
+      "3cd7c206-0af5-4876-b4e5-4cddd2336028",
+      "Frontseat_stm32l011f"
+    ],
+    [
+      "eafc1a6b-2ced-415d-8c36-b290c8fa7b43",
+      "Power"
+    ],
+    [
+      "9abe4e8b-91d7-4d72-88b6-09a5b2a0bce8",
+      "USB Programmer"
+    ]
+  ],
+  "text_variables": {}
+}

pcb/hw_test/sym-lib-table

@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name "fiatlux")(type "KiCad")(uri "/home/jedi/Projects/fiatlux/pcb/fiatlux.kicad_sym")(options "")(descr ""))
+)

pcb/power.sch

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+      (effects (font (size 1.27 1.27)) (justify right) hide)
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+    (property "Datasheet" "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00206508.pdf" (id 3) (at 121.92 86.36 0)
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+)

pcb/sym-lib-table

@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name "fiatlux")(type "KiCad")(uri "${KIPRJMOD}/fiatlux.kicad_sym")(options "")(descr ""))
+)